€•Ë.Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ /translations/zh_CN/hwmon/nsa320”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ /translations/zh_TW/hwmon/nsa320”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ /translations/it_IT/hwmon/nsa320”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ /translations/ja_JP/hwmon/nsa320”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ /translations/ko_KR/hwmon/nsa320”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ /translations/sp_SP/hwmon/nsa320”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒKernel driver nsa320_hwmon”h]”hŒKernel driver nsa320_hwmon”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒ:/var/lib/git/docbuild/linux/Documentation/hwmon/nsa320.rst”h KubhŒ paragraph”“”)”}”(hŒSupported chips:”h]”hŒSupported chips:”…””}”(hh¹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒ block_quote”“”)”}”(hX* Holtek HT46R065 microcontroller with onboard firmware that configures it to act as a hardware monitor. Prefix: 'nsa320' Addresses scanned: none Datasheet: Not available, driver was reverse engineered based upon the Zyxel kernel source ”h]”hŒ bullet_list”“”)”}”(hhh]”hŒ list_item”“”)”}”(hŒúHoltek HT46R065 microcontroller with onboard firmware that configures it to act as a hardware monitor. Prefix: 'nsa320' Addresses scanned: none Datasheet: Not available, driver was reverse engineered based upon the Zyxel kernel source ”h]”(h¸)”}”(hŒEHoltek HT46R065 microcontroller with onboard firmware that configures”h]”hŒEHoltek HT46R065 microcontroller with onboard firmware that configures”…””}”(hhØhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KhhÔubhÈ)”}”(hŒ!it to act as a hardware monitor. ”h]”h¸)”}”(hŒ it to act as a hardware monitor.”h]”hŒ it to act as a hardware monitor.”…””}”(hhêhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khhæubah}”(h]”h ]”h"]”h$]”h&]”uh1hÇhŸh¶h KhhÔubh¸)”}”(hŒPrefix: 'nsa320'”h]”hŒPrefix: ‘nsa320’”…””}”(hhþhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K hhÔubh¸)”}”(hŒAddresses scanned: none”h]”hŒAddresses scanned: none”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K hhÔubh¸)”}”(hŒFDatasheet: Not available, driver was reverse engineered based upon the”h]”hŒFDatasheet: Not available, driver was reverse engineered based upon the”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KhhÔubhÈ)”}”(hŒZyxel kernel source ”h]”h¸)”}”(hŒZyxel kernel source”h]”hŒZyxel kernel source”…””}”(hj,hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khj(ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÇhŸh¶h KhhÔubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÒhhÏubah}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hÍhŸh¶h KhhÉubah}”(h]”h ]”h"]”h$]”h&]”uh1hÇhŸh¶h Khh£hžhubh¸)”}”(hŒAuthor:”h]”hŒAuthor:”…””}”(hjThžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhÈ)”}”(hŒ$Adam Baker ”h]”h¸)”}”(hŒ#Adam Baker ”h]”(hŒ Adam Baker <”…””}”(hjfhžhhŸNh NubhŒ reference”“”)”}”(hŒlinux@baker-net.org.uk”h]”hŒlinux@baker-net.org.uk”…””}”(hjphžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:linux@baker-net.org.uk”uh1jnhjfubhŒ>”…””}”(hjfhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khjbubah}”(h]”h ]”h"]”h$]”h&]”uh1hÇhŸh¶h Khh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒ Description”h]”hŒ Description”…””}”(hj“hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjhžhhŸh¶h Kubh¸)”}”(hXThis chip is known to be used in the Zyxel NSA320 and NSA325 NAS Units and also in some variants of the NSA310 but the driver has only been tested on the NSA320. In all of these devices it is connected to the same 3 GPIO lines which are used to provide chip select, clock and data lines. The interface behaves similarly to SPI but at much lower speeds than are normally used for SPI.”h]”hXThis chip is known to be used in the Zyxel NSA320 and NSA325 NAS Units and also in some variants of the NSA310 but the driver has only been tested on the NSA320. In all of these devices it is connected to the same 3 GPIO lines which are used to provide chip select, clock and data lines. The interface behaves similarly to SPI but at much lower speeds than are normally used for SPI.”…””}”(hj¡hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khjhžhubh¸)”}”(hŒøFollowing each chip select pulse the chip will generate a single 32 bit word that contains 0x55 as a marker to indicate that data is being read correctly, followed by an 8 bit fan speed in 100s of RPM and a 16 bit temperature in tenths of a degree.”h]”hŒøFollowing each chip select pulse the chip will generate a single 32 bit word that contains 0x55 as a marker to indicate that data is being read correctly, followed by an 8 bit fan speed in 100s of RPM and a 16 bit temperature in tenths of a degree.”…””}”(hj¯hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K"hjhžhubeh}”(h]”Œ description”ah ]”h"]”Œ description”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒsysfs-Interface”h]”hŒsysfs-Interface”…””}”(hjÈhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjÅhžhhŸh¶h K)ubhŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”K uh1jàhjÝubjá)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1jàhjÝubhŒtbody”“”)”}”(hhh]”(hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”h¸)”}”(hŒ temp1_input”h]”hŒ temp1_input”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K,hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjýubj)”}”(hhh]”h¸)”}”(hŒtemperature input”h]”hŒtemperature input”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K,hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjýubeh}”(h]”h ]”h"]”h$]”h&]”uh1jûhjøubjü)”}”(hhh]”(j)”}”(hhh]”h¸)”}”(hŒ fan1_input”h]”hŒ fan1_input”…””}”(hj<hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K-hj9ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj6ubj)”}”(hhh]”h¸)”}”(hŒ fan speed”h]”hŒ fan speed”…””}”(hjShžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K-hjPubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj6ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jûhjøubeh}”(h]”h ]”h"]”h$]”h&]”uh1jöhjÝubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1jÛhjØubah}”(h]”h ]”h"]”h$]”h&]”uh1jÖhjÅhžhhŸh¶h Nubeh}”(h]”Œsysfs-interface”ah ]”h"]”Œsysfs-interface”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K)ubh¢)”}”(hhh]”(h§)”}”(hŒNotes”h]”hŒNotes”…””}”(hj‹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjˆhžhhŸh¶h K1ubh¸)”}”(hX"The access timings used in the driver are the same as used in the Zyxel provided kernel. Testing has shown that if the delay between chip select and the first clock pulse is reduced from 100 ms to just under 10ms then the chip will not produce any output. If the duration of either phase of the clock is reduced from 100 us to less than 15 us then data pulses are likely to be read twice corrupting the output. The above analysis is based upon a sample of one unit but suggests that the Zyxel provided delay values include a reasonable tolerance.”h]”hX"The access timings used in the driver are the same as used in the Zyxel provided kernel. Testing has shown that if the delay between chip select and the first clock pulse is reduced from 100 ms to just under 10ms then the chip will not produce any output. If the duration of either phase of the clock is reduced from 100 us to less than 15 us then data pulses are likely to be read twice corrupting the output. The above analysis is based upon a sample of one unit but suggests that the Zyxel provided delay values include a reasonable tolerance.”…””}”(hj™hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K3hjˆhžhubh¸)”}”(hXzThe driver incorporates a limit that it will not check for updated values faster than once a second. This is because the hardware takes a relatively long time to read the data from the device and when it does it reads both temp and fan speed. As the most likely case for two accesses in quick succession is to read both of these values avoiding a second read delay is desirable.”h]”hXzThe driver incorporates a limit that it will not check for updated values faster than once a second. This is because the hardware takes a relatively long time to read the data from the device and when it does it reads both temp and fan speed. As the most likely case for two accesses in quick succession is to read both of these values avoiding a second read delay is desirable.”…””}”(hj§hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K