€• Œsphinx.addnodes”Œdocument”“”)�”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)�”}”(hhh]”(hŒ pending_xref”“”)�”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…”�”}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ%/translations/zh_CN/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)�”}”(hhh]”hŒChinese (Traditional)”…”�”}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ%/translations/zh_TW/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒItalian”…”�”}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ%/translations/it_IT/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒJapanese”…”�”}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ%/translations/ja_JP/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒKorean”…”�”}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ%/translations/ko_KR/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒPortuguese (Brazilian)”…”�”}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ%/translations/pt_BR/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒSpanish”…”�”}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ%/translations/sp_SP/hid/intel-ish-hid”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)�”}”(hhh]”(hŒtitle”“”)�”}”(hŒ!Intel Integrated Sensor Hub (ISH)”h]”hŒ!Intel Integrated Sensor Hub (ISH)”…”�”}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³Œ?/var/lib/git/docbuild/linux/Documentation/hid/intel-ish-hid.rst”h´KubhŒ paragraph”“”)�”}”(hŒåA sensor hub enables the ability to offload sensor polling and algorithm processing to a dedicated low power co-processor. This allows the core processor to go into low power modes more often, resulting in increased battery life.”h]”hŒåA sensor hub enables the ability to offload sensor polling and algorithm processing to a dedicated low power co-processor. This allows the core processor to go into low power modes more often, resulting in increased battery life.”…”�”}”(hhÍh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khh·h²hubhÌ)�”}”(hŒÙThere are many vendors providing external sensor hubs conforming to HID Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops and embedded products. Linux has had this support since Linux 3.9.”h]”hŒÙThere are many vendors providing external sensor hubs conforming to HID Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops and embedded products. Linux has had this support since Linux 3.9.”…”�”}”(hhÛh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K hh·h²hubhÌ)�”}”(hXÉIntel® introduced integrated sensor hubs as a part of the SoC starting from Cherry Trail and now supported on multiple generations of CPU packages. There are many commercial devices already shipped with Integrated Sensor Hubs (ISH). These ISH also comply to HID sensor specification, but the difference is the transport protocol used for communication. The current external sensor hubs mainly use HID over I2C or USB. But ISH doesn't use either I2C or USB.”h]”hXËIntel® introduced integrated sensor hubs as a part of the SoC starting from Cherry Trail and now supported on multiple generations of CPU packages. There are many commercial devices already shipped with Integrated Sensor Hubs (ISH). These ISH also comply to HID sensor specification, but the difference is the transport protocol used for communication. The current external sensor hubs mainly use HID over I2C or USB. But ISH doesn’t use either I2C or USB.”…”�”}”(hhéh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khh·h²hubh¶)�”}”(hhh]”(h»)�”}”(hŒOverview”h]”hŒOverview”…”�”}”(hhúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh÷h²hh³hÊh´KubhÌ)�”}”(hŒsUsing a analogy with a usbhid implementation, the ISH follows a similar model for a very high speed communication::”h]”hŒrUsing a analogy with a usbhid implementation, the ISH follows a similar model for a very high speed communication:”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khh÷h²hubhŒ literal_block”“”)�”}”(hXs----------------- ---------------------- | USB HID | --> | ISH HID | ----------------- ---------------------- ----------------- ---------------------- | USB protocol | --> | ISH Transport | ----------------- ---------------------- ----------------- ---------------------- | EHCI/XHCI | --> | ISH IPC | ----------------- ---------------------- PCI PCI ----------------- ---------------------- |Host controller| --> | ISH processor | ----------------- ---------------------- USB Link ----------------- ---------------------- | USB End points| --> | ISH Clients | ----------------- ----------------------”h]”hXs----------------- ---------------------- | USB HID | --> | ISH HID | ----------------- ---------------------- ----------------- ---------------------- | USB protocol | --> | ISH Transport | ----------------- ---------------------- ----------------- ---------------------- | EHCI/XHCI | --> | ISH IPC | ----------------- ---------------------- PCI PCI ----------------- ---------------------- |Host controller| --> | ISH processor | ----------------- ---------------------- USB Link ----------------- ---------------------- | USB End points| --> | ISH Clients | ----------------- ----------------------”…”�”}”hjsbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1jh³hÊh´Khh÷h²hubhÌ)�”}”(hX Like USB protocol provides a method for device enumeration, link management and user data encapsulation, the ISH also provides similar services. But it is very light weight tailored to manage and communicate with ISH client applications implemented in the firmware.”h]”hX Like USB protocol provides a method for device enumeration, link management and user data encapsulation, the ISH also provides similar services. But it is very light weight tailored to manage and communicate with ISH client applications implemented in the firmware.”…”�”}”(hj(h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K-hh÷h²hubhÌ)�”}”(hXFThe ISH allows multiple sensor management applications executing in the firmware. Like USB endpoints the messaging can be to/from a client. As part of enumeration process, these clients are identified. These clients can be simple HID sensor applications, sensor calibration applications or sensor firmware update applications.”h]”hXFThe ISH allows multiple sensor management applications executing in the firmware. Like USB endpoints the messaging can be to/from a client. As part of enumeration process, these clients are identified. These clients can be simple HID sensor applications, sensor calibration applications or sensor firmware update applications.”…”�”}”(hj6h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K2hh÷h²hubhÌ)�”}”(hX-The implementation model is similar, like USB bus, ISH transport is also implemented as a bus. Each client application executing in the ISH processor is registered as a device on this bus. The driver, which binds each device (ISH HID driver) identifies the device type and registers with the HID core.”h]”hX-The implementation model is similar, like USB bus, ISH transport is also implemented as a bus. Each client application executing in the ISH processor is registered as a device on this bus. The driver, which binds each device (ISH HID driver) identifies the device type and registers with the HID core.”…”�”}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K8hh÷h²hubeh}”(h]”Œoverview”ah ]”h"]”Œoverview”ah$]”h&]”uh1hµhh·h²hh³hÊh´Kubh¶)�”}”(hhh]”(h»)�”}”(hŒ!ISH Implementation: Block Diagram”h]”hŒ!ISH Implementation: Block Diagram”…”�”}”(hj]h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjZh²hh³hÊh´K>ubj)�”}”(hX --------------------------- | User Space Applications | --------------------------- ----------------IIO ABI---------------- -------------------------- | IIO Sensor Drivers | -------------------------- -------------------------- | IIO core | -------------------------- -------------------------- | HID Sensor Hub MFD | -------------------------- -------------------------- | HID Core | -------------------------- -------------------------- | HID over ISH Client | -------------------------- -------------------------- | ISH Transport (ISHTP) | -------------------------- -------------------------- | IPC Drivers | -------------------------- OS ---------------- PCI ----------------- Hardware + Firmware ---------------------------- | ISH Hardware/Firmware(FW) | ----------------------------”h]”hX --------------------------- | User Space Applications | --------------------------- ----------------IIO ABI---------------- -------------------------- | IIO Sensor Drivers | -------------------------- -------------------------- | IIO core | -------------------------- -------------------------- | HID Sensor Hub MFD | -------------------------- -------------------------- | HID Core | -------------------------- -------------------------- | HID over ISH Client | -------------------------- -------------------------- | ISH Transport (ISHTP) | -------------------------- -------------------------- | IPC Drivers | -------------------------- OS ---------------- PCI ----------------- Hardware + Firmware ---------------------------- | ISH Hardware/Firmware(FW) | ----------------------------”…”�”}”hjksbah}”(h]”h ]”h"]”h$]”h&]”j&j'uh1jh³hÊh´KBhjZh²hubeh}”(h]”Œ ish-implementation-block-diagram”ah ]”h"]”Œ!ish implementation: block diagram”ah$]”h&]”uh1hµhh·h²hh³hÊh´K>ubh¶)�”}”(hhh]”(h»)�”}”(hŒ%High level processing in above blocks”h]”hŒ%High level processing in above blocks”…”�”}”(hj„h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj�h²hh³hÊh´Kdubh¶)�”}”(hhh]”(h»)�”}”(hŒHardware Interface”h]”hŒHardware Interface”…”�”}”(hj•h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj’h²hh³hÊh´KgubhÌ)�”}”(hŒôThe ISH is exposed as "Non-VGA unclassified PCI device" to the host. The PCI product and vendor IDs are changed from different generations of processors. So the source code which enumerates drivers needs to update from generation to generation.”h]”hŒøThe ISH is exposed as “Non-VGA unclassified PCI deviceâ€� to the host. The PCI product and vendor IDs are changed from different generations of processors. So the source code which enumerates drivers needs to update from generation to generation.”…”�”}”(hj£h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kihj’h²hubeh}”(h]”Œhardware-interface”ah ]”h"]”Œhardware interface”ah$]”h&]”uh1hµhj�h²hh³hÊh´Kgubh¶)�”}”(hhh]”(h»)�”}”(hŒ*Inter Processor Communication (IPC) driver”h]”hŒ*Inter Processor Communication (IPC) driver”…”�”}”(hj¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj¹h²hh³hÊh´KoubhÌ)�”}”(hŒ'Location: drivers/hid/intel-ish-hid/ipc”h]”hŒ'Location: drivers/hid/intel-ish-hid/ipc”…”�”}”(hjÊh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kqhj¹h²hubhÌ)�”}”(hŒSThe IPC message uses memory mapped I/O. The registers are defined in hw-ish-regs.h.”h]”hŒSThe IPC message uses memory mapped I/O. The registers are defined in hw-ish-regs.h.”…”�”}”(hjØh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kshj¹h²hubh¶)�”}”(hhh]”(h»)�”}”(hŒIPC/FW message types”h]”hŒIPC/FW message types”…”�”}”(hjéh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjæh²hh³hÊh´KwubhÌ)�”}”(hŒrThere are two types of messages, one for management of link and another for messages to and from transport layers.”h]”hŒrThere are two types of messages, one for management of link and another for messages to and from transport layers.”…”�”}”(hj÷h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kyhjæh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒTX and RX of Transport messages”h]”hŒTX and RX of Transport messages”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K}ubhÌ)�”}”(hX A set of memory mapped register offers support of multi-byte messages TX and RX (e.g. IPC_REG_ISH2HOST_MSG, IPC_REG_HOST2ISH_MSG). The IPC layer maintains internal queues to sequence messages and send them in order to the firmware. Optionally the caller can register handler to get notification of completion. A doorbell mechanism is used in messaging to trigger processing in host and client firmware side. When ISH interrupt handler is called, the ISH2HOST doorbell register is used by host drivers to determine that the interrupt is for ISH.”h]”hX A set of memory mapped register offers support of multi-byte messages TX and RX (e.g. IPC_REG_ISH2HOST_MSG, IPC_REG_HOST2ISH_MSG). The IPC layer maintains internal queues to sequence messages and send them in order to the firmware. Optionally the caller can register handler to get notification of completion. A doorbell mechanism is used in messaging to trigger processing in host and client firmware side. When ISH interrupt handler is called, the ISH2HOST doorbell register is used by host drivers to determine that the interrupt is for ISH.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjh²hubhÌ)�”}”(hŒmEach side has 32 32-bit message registers and a 32-bit doorbell. Doorbell register has the following format::”h]”hŒlEach side has 32 32-bit message registers and a 32-bit doorbell. Doorbell register has the following format:”…”�”}”(hj$h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kˆhjh²hubj)�”}”(hŒõBits 0..6: fragment length (7 bits are used) Bits 10..13: encapsulated protocol Bits 16..19: management command (for IPC management protocol) Bit 31: doorbell trigger (signal H/W interrupt to the other side) Other bits are reserved, should be 0.”h]”hŒõBits 0..6: fragment length (7 bits are used) Bits 10..13: encapsulated protocol Bits 16..19: management command (for IPC management protocol) Bit 31: doorbell trigger (signal H/W interrupt to the other side) Other bits are reserved, should be 0.”…”�”}”hj2sbah}”(h]”h ]”h"]”h$]”h&]”j&j'uh1jh³hÊh´K‹hjh²hubeh}”(h]”Œtx-and-rx-of-transport-messages”ah ]”h"]”Œtx and rx of transport messages”ah$]”h&]”uh1hµhjæh²hh³hÊh´K}ubeh}”(h]”Œipc-fw-message-types”ah ]”h"]”Œipc/fw message types”ah$]”h&]”uh1hµhj¹h²hh³hÊh´Kwubh¶)�”}”(hhh]”(h»)�”}”(hŒTransport layer interface”h]”hŒTransport layer interface”…”�”}”(hjSh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjPh²hh³hÊh´K’ubhÌ)�”}”(hŒ±To abstract HW level IPC communication, a set of callbacks is registered. The transport layer uses them to send and receive messages. Refer to struct ishtp_hw_ops for callbacks.”h]”hŒ±To abstract HW level IPC communication, a set of callbacks is registered. The transport layer uses them to send and receive messages. Refer to struct ishtp_hw_ops for callbacks.”…”�”}”(hjah²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K”hjPh²hubeh}”(h]”Œtransport-layer-interface”ah ]”h"]”Œtransport layer interface”ah$]”h&]”uh1hµhj¹h²hh³hÊh´K’ubeh}”(h]”Œ(inter-processor-communication-ipc-driver”ah ]”h"]”Œ*inter processor communication (ipc) driver”ah$]”h&]”uh1hµhj�h²hh³hÊh´Koubh¶)�”}”(hhh]”(h»)�”}”(hŒISH Transport layer”h]”hŒISH Transport layer”…”�”}”(hj‚h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K™ubhÌ)�”}”(hŒ*Location: drivers/hid/intel-ish-hid/ishtp/”h]”hŒ*Location: drivers/hid/intel-ish-hid/ishtp/”…”�”}”(hj�h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K›hjh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒA Generic Transport Layer”h]”hŒA Generic Transport Layer”…”�”}”(hj¡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjžh²hh³hÊh´KžubhÌ)�”}”(hŒÚThe transport layer is a bi-directional protocol, which defines: - Set of commands to start, stop, connect, disconnect and flow control (see ishtp/hbm.h for details) - A flow control mechanism to avoid buffer overflows”h]”hŒÚThe transport layer is a bi-directional protocol, which defines: - Set of commands to start, stop, connect, disconnect and flow control (see ishtp/hbm.h for details) - A flow control mechanism to avoid buffer overflows”…”�”}”(hj¯h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K hjžh²hubhÌ)�”}”(hŒÓThis protocol resembles bus messages described in the following document: http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/dcmi-hi-1-0-spec.pdf "Chapter 7: Bus Message Layer".”h]”(hŒJThis protocol resembles bus messages described in the following document: ”…”�”}”(hj½h²hh³Nh´NubhŒ reference”“”)�”}”(hŒihttp://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/dcmi-hi-1-0-spec.pdf”h]”hŒihttp://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/dcmi-hi-1-0-spec.pdf”…”�”}”(hjÇh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jÉuh1jÅhj½ubhŒ$ “Chapter 7: Bus Message Layerâ€�.”…”�”}”(hj½h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K¥hjžh²hubeh}”(h]”Œa-generic-transport-layer”ah ]”h"]”Œa generic transport layer”ah$]”h&]”uh1hµhjh²hh³hÊh´Kžubh¶)�”}”(hhh]”(h»)�”}”(hŒ%Connection and Flow Control Mechanism”h]”hŒ%Connection and Flow Control Mechanism”…”�”}”(hjëh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjèh²hh³hÊh´KªubhÌ)�”}”(hXEach FW client and a protocol is identified by a UUID. In order to communicate to a FW client, a connection must be established using connect request and response bus messages. If successful, a pair (host_client_id and fw_client_id) will identify the connection.”h]”hXEach FW client and a protocol is identified by a UUID. In order to communicate to a FW client, a connection must be established using connect request and response bus messages. If successful, a pair (host_client_id and fw_client_id) will identify the connection.”…”�”}”(hjùh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K¬hjèh²hubhÌ)�”}”(hX›Once connection is established, peers send each other flow control bus messages independently. Every peer may send a message only if it has received a flow-control credit before. Once it has sent a message, it may not send another one before receiving the next flow control credit. Either side can send disconnect request bus message to end communication. Also the link will be dropped if major FW reset occurs.”h]”hX›Once connection is established, peers send each other flow control bus messages independently. Every peer may send a message only if it has received a flow-control credit before. Once it has sent a message, it may not send another one before receiving the next flow control credit. Either side can send disconnect request bus message to end communication. Also the link will be dropped if major FW reset occurs.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K±hjèh²hubeh}”(h]”Œ%connection-and-flow-control-mechanism”ah ]”h"]”Œ%connection and flow control mechanism”ah$]”h&]”uh1hµhjh²hh³hÊh´Kªubh¶)�”}”(hhh]”(h»)�”}”(hŒPeer to Peer data transfer”h]”hŒPeer to Peer data transfer”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K¹ubhÌ)�”}”(hŒ¼Peer to Peer data transfer can happen with or without using DMA. Depending on the sensor bandwidth requirement DMA can be enabled by using module parameter ishtp_use_dma under intel_ishtp.”h]”hŒ¼Peer to Peer data transfer can happen with or without using DMA. Depending on the sensor bandwidth requirement DMA can be enabled by using module parameter ishtp_use_dma under intel_ishtp.”…”�”}”(hj.h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K»hjh²hubhÌ)�”}”(hXEach side (host and FW) manages its DMA transfer memory independently. When an ISHTP client from either host or FW side wants to send something, it decides whether to send over IPC or over DMA; for each transfer the decision is independent. The sending side sends DMA_XFER message when the message is in the respective host buffer (TX when host client sends, RX when FW client sends). The recipient of DMA message responds with DMA_XFER_ACK, indicating the sender that the memory region for that message may be reused.”h]”hXEach side (host and FW) manages its DMA transfer memory independently. When an ISHTP client from either host or FW side wants to send something, it decides whether to send over IPC or over DMA; for each transfer the decision is independent. The sending side sends DMA_XFER message when the message is in the respective host buffer (TX when host client sends, RX when FW client sends). The recipient of DMA message responds with DMA_XFER_ACK, indicating the sender that the memory region for that message may be reused.”…”�”}”(hj<h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K¿hjh²hubhÌ)�”}”(hXÀDMA initialization is started with host sending DMA_ALLOC_NOTIFY bus message (that includes RX buffer) and FW responds with DMA_ALLOC_NOTIFY_ACK. Additionally to DMA address communication, this sequence checks capabilities: if the host doesn't support DMA, then it won't send DMA allocation, so FW can't send DMA; if FW doesn't support DMA then it won't respond with DMA_ALLOC_NOTIFY_ACK, in which case host will not use DMA transfers. Here ISH acts as busmaster DMA controller. Hence when host sends DMA_XFER, it's request to do host->ISH DMA transfer; when FW sends DMA_XFER, it means that it already did DMA and the message resides at host. Thus, DMA_XFER and DMA_XFER_ACK act as ownership indicators.”h]”hXÌDMA initialization is started with host sending DMA_ALLOC_NOTIFY bus message (that includes RX buffer) and FW responds with DMA_ALLOC_NOTIFY_ACK. Additionally to DMA address communication, this sequence checks capabilities: if the host doesn’t support DMA, then it won’t send DMA allocation, so FW can’t send DMA; if FW doesn’t support DMA then it won’t respond with DMA_ALLOC_NOTIFY_ACK, in which case host will not use DMA transfers. Here ISH acts as busmaster DMA controller. Hence when host sends DMA_XFER, it’s request to do host->ISH DMA transfer; when FW sends DMA_XFER, it means that it already did DMA and the message resides at host. Thus, DMA_XFER and DMA_XFER_ACK act as ownership indicators.”…”�”}”(hjJh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÇhjh²hubhÌ)�”}”(hXpAt initial state all outgoing memory belongs to the sender (TX to host, RX to FW), DMA_XFER transfers ownership on the region that contains ISHTP message to the receiving side, DMA_XFER_ACK returns ownership to the sender. A sender need not wait for previous DMA_XFER to be ack'ed, and may send another message as long as remaining continuous memory in its ownership is enough. In principle, multiple DMA_XFER and DMA_XFER_ACK messages may be sent at once (up to IPC MTU), thus allowing for interrupt throttling. Currently, ISH FW decides to send over DMA if ISHTP message is more than 3 IPC fragments and via IPC otherwise.”h]”hXrAt initial state all outgoing memory belongs to the sender (TX to host, RX to FW), DMA_XFER transfers ownership on the region that contains ISHTP message to the receiving side, DMA_XFER_ACK returns ownership to the sender. A sender need not wait for previous DMA_XFER to be ack’ed, and may send another message as long as remaining continuous memory in its ownership is enough. In principle, multiple DMA_XFER and DMA_XFER_ACK messages may be sent at once (up to IPC MTU), thus allowing for interrupt throttling. Currently, ISH FW decides to send over DMA if ISHTP message is more than 3 IPC fragments and via IPC otherwise.”…”�”}”(hjXh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÒhjh²hubeh}”(h]”Œpeer-to-peer-data-transfer”ah ]”h"]”Œpeer to peer data transfer”ah$]”h&]”uh1hµhjh²hh³hÊh´K¹ubh¶)�”}”(hhh]”(h»)�”}”(hŒ Ring Buffers”h]”hŒ Ring Buffers”…”�”}”(hjqh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjnh²hh³hÊh´KÝubhÌ)�”}”(hXWhen a client initiates a connection, a ring of RX and TX buffers is allocated. The size of ring can be specified by the client. HID client sets 16 and 32 for TX and RX buffers respectively. On send request from client, the data to be sent is copied to one of the send ring buffer and scheduled to be sent using bus message protocol. These buffers are required because the FW may have not have processed the last message and may not have enough flow control credits to send. Same thing holds true on receive side and flow control is required.”h]”hXWhen a client initiates a connection, a ring of RX and TX buffers is allocated. The size of ring can be specified by the client. HID client sets 16 and 32 for TX and RX buffers respectively. On send request from client, the data to be sent is copied to one of the send ring buffer and scheduled to be sent using bus message protocol. These buffers are required because the FW may have not have processed the last message and may not have enough flow control credits to send. Same thing holds true on receive side and flow control is required.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kßhjnh²hubeh}”(h]”Œ ring-buffers”ah ]”h"]”Œ ring buffers”ah$]”h&]”uh1hµhjh²hh³hÊh´KÝubh¶)�”}”(hhh]”(h»)�”}”(hŒHost Enumeration”h]”hŒHost Enumeration”…”�”}”(hj˜h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj•h²hh³hÊh´KèubhÌ)�”}”(hŒšThe host enumeration bus command allows discovery of clients present in the FW. There can be multiple sensor clients and clients for calibration function.”h]”hŒšThe host enumeration bus command allows discovery of clients present in the FW. There can be multiple sensor clients and clients for calibration function.”…”�”}”(hj¦h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kêhj•h²hubhÌ)�”}”(hŒÑTo ease implementation and allow independent drivers to handle each client, this transport layer takes advantage of Linux Bus driver model. Each client is registered as device on the transport bus (ishtp bus).”h]”hŒÑTo ease implementation and allow independent drivers to handle each client, this transport layer takes advantage of Linux Bus driver model. Each client is registered as device on the transport bus (ishtp bus).”…”�”}”(hj´h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kíhj•h²hubhÌ)�”}”(hŒ!Enumeration sequence of messages:”h]”hŒ!Enumeration sequence of messages:”…”�”}”(hjÂh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kñhj•h²hubhŒ bullet_list”“”)�”}”(hhh]”(hŒ list_item”“”)�”}”(hŒFHost sends HOST_START_REQ_CMD, indicating that host ISHTP layer is up.”h]”hÌ)�”}”(hjÙh]”hŒFHost sends HOST_START_REQ_CMD, indicating that host ISHTP layer is up.”…”�”}”(hjÛh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kóhj×ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´NubjÖ)�”}”(hŒ#FW responds with HOST_START_RES_CMD”h]”hÌ)�”}”(hjðh]”hŒ#FW responds with HOST_START_RES_CMD”…”�”}”(hjòh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kôhjîubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´NubjÖ)�”}”(hŒ3Host sends HOST_ENUM_REQ_CMD (enumerate FW clients)”h]”hÌ)�”}”(hjh]”hŒ3Host sends HOST_ENUM_REQ_CMD (enumerate FW clients)”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kõhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´NubjÖ)�”}”(hŒRFW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW client IDs”h]”hÌ)�”}”(hŒRFW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW client IDs”h]”hŒRFW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW client IDs”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Köhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´NubjÖ)�”}”(hŒMFor each FW ID found in that bitmap host sends HOST_CLIENT_PROPERTIES_REQ_CMD”h]”hÌ)�”}”(hŒMFor each FW ID found in that bitmap host sends HOST_CLIENT_PROPERTIES_REQ_CMD”h]”hŒMFor each FW ID found in that bitmap host sends HOST_CLIENT_PROPERTIES_REQ_CMD”…”�”}”(hj8h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Køhj4ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´NubjÖ)�”}”(hŒfFW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID, max ISHTP message size, etc.”h]”hÌ)�”}”(hŒfFW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID, max ISHTP message size, etc.”h]”hŒfFW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID, max ISHTP message size, etc.”…”�”}”(hjPh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KúhjLubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´NubjÖ)�”}”(hŒ†Once host received properties for that last discovered client, it considers ISHTP device fully functional (and allocates DMA buffers) ”h]”hÌ)�”}”(hŒ…Once host received properties for that last discovered client, it considers ISHTP device fully functional (and allocates DMA buffers)”h]”hŒ…Once host received properties for that last discovered client, it considers ISHTP device fully functional (and allocates DMA buffers)”…”�”}”(hjhh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kühjdubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1jÐh³hÊh´Kóhj•h²hubeh}”(h]”Œhost-enumeration”ah ]”h"]”Œhost enumeration”ah$]”h&]”uh1hµhjh²hh³hÊh´Kèubeh}”(h]”Œish-transport-layer”ah ]”h"]”Œish transport layer”ah$]”h&]”uh1hµhj�h²hh³hÊh´K™ubh¶)�”}”(hhh]”(h»)�”}”(hŒHID over ISH Client”h]”hŒHID over ISH Client”…”�”}”(hj—h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj”h²hh³hÊh´MubhÌ)�”}”(hŒ#Location: drivers/hid/intel-ish-hid”h]”hŒ#Location: drivers/hid/intel-ish-hid”…”�”}”(hj¥h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mhj”h²hubhÌ)�”}”(hŒ+The ISHTP client driver is responsible for:”h]”hŒ+The ISHTP client driver is responsible for:”…”�”}”(hj³h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mhj”h²hubjÑ)�”}”(hhh]”(jÖ)�”}”(hŒ)enumerate HID devices under FW ISH client”h]”hÌ)�”}”(hjÆh]”hŒ)enumerate HID devices under FW ISH client”…”�”}”(hjÈh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MhjÄubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´NubjÖ)�”}”(hŒGet Report descriptor”h]”hÌ)�”}”(hjÝh]”hŒGet Report descriptor”…”�”}”(hjßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MhjÛubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´NubjÖ)�”}”(hŒ%Register with HID core as a LL driver”h]”hÌ)�”}”(hjôh]”hŒ%Register with HID core as a LL driver”…”�”}”(hjöh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mhjòubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´NubjÖ)�”}”(hŒProcess Get/Set feature request”h]”hÌ)�”}”(hj h]”hŒProcess Get/Set feature request”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´NubjÖ)�”}”(hŒGet input reports ”h]”hÌ)�”}”(hŒGet input reports”h]”hŒGet input reports”…”�”}”(hj$h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j‚jƒuh1jÐh³hÊh´Mhj”h²hubeh}”(h]”Œhid-over-ish-client”ah ]”h"]”Œhid over ish client”ah$]”h&]”uh1hµhj�h²hh³hÊh´Mubh¶)�”}”(hhh]”(h»)�”}”(hŒ)HID Sensor Hub MFD and IIO sensor drivers”h]”hŒ)HID Sensor Hub MFD and IIO sensor drivers”…”�”}”(hjIh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjFh²hh³hÊh´M ubhÌ)�”}”(hŒÆThe functionality in these drivers is the same as an external sensor hub. Refer to Documentation/hid/hid-sensor.rst for HID sensor Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.”h]”hŒÆThe functionality in these drivers is the same as an external sensor hub. Refer to Documentation/hid/hid-sensor.rst for HID sensor Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.”…”�”}”(hjWh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MhjFh²hubeh}”(h]”Œ)hid-sensor-hub-mfd-and-iio-sensor-drivers”ah ]”h"]”Œ)hid sensor hub mfd and iio sensor drivers”ah$]”h&]”uh1hµhj�h²hh³hÊh´M ubh¶)�”}”(hhh]”(h»)�”}”(hŒ)End to End HID transport Sequence Diagram”h]”hŒ)End to End HID transport Sequence Diagram”…”�”}”(hjph²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjmh²hh³hÊh´Mubj)�”}”(hXÕHID-ISH-CLN ISHTP IPC HW | | | | | | |-----WAKE UP------------------>| | | | | | | |-----HOST READY--------------->| | | | | | | |<----MNG_RESET_NOTIFY_ACK----- | | | | | | |<----ISHTP_START------ | | | | | | | |<-----------------HOST_START_RES_CMD-------------------| | | | | | |------------------QUERY_SUBSCRIBER-------------------->| | | | | | |------------------HOST_ENUM_REQ_CMD------------------->| | | | | | |<-----------------HOST_ENUM_RES_CMD--------------------| | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |--Repeat HOST_CLIENT_PROPERTIES_REQ_CMD-till last one--| | | | | probed() |----ishtp_cl_connect--->|----------------- CLIENT_CONNECT_REQ_CMD-------------->| | | | | | |<----------------CLIENT_CONNECT_RES_CMD----------------| | | | | |register event callback | | | | | | | |ishtp_cl_send( HOSTIF_DM_ENUM_DEVICES) |----------fill ishtp_msg_hdr struct write to HW----- >| | | | | | | |<-----IRQ(IPC_PROTOCOL_ISHTP---| | | | | |<--ENUM_DEVICE RSP------| | | | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_HID_DESCRIPTOR|----------fill ishtp_msg_hdr struct write to HW----- >| | | | | ...Response | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_REPORT_DESCRIPTOR|--------------fill ishtp_msg_hdr struct write to HW-- >| | | | | | | | | hid_allocate_device | | | | hid_add_device | | | | | | |”h]”hXÕHID-ISH-CLN ISHTP IPC HW | | | | | | |-----WAKE UP------------------>| | | | | | | |-----HOST READY--------------->| | | | | | | |<----MNG_RESET_NOTIFY_ACK----- | | | | | | |<----ISHTP_START------ | | | | | | | |<-----------------HOST_START_RES_CMD-------------------| | | | | | |------------------QUERY_SUBSCRIBER-------------------->| | | | | | |------------------HOST_ENUM_REQ_CMD------------------->| | | | | | |<-----------------HOST_ENUM_RES_CMD--------------------| | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |--Repeat HOST_CLIENT_PROPERTIES_REQ_CMD-till last one--| | | | | probed() |----ishtp_cl_connect--->|----------------- CLIENT_CONNECT_REQ_CMD-------------->| | | | | | |<----------------CLIENT_CONNECT_RES_CMD----------------| | | | | |register event callback | | | | | | | |ishtp_cl_send( HOSTIF_DM_ENUM_DEVICES) |----------fill ishtp_msg_hdr struct write to HW----- >| | | | | | | |<-----IRQ(IPC_PROTOCOL_ISHTP---| | | | | |<--ENUM_DEVICE RSP------| | | | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_HID_DESCRIPTOR|----------fill ishtp_msg_hdr struct write to HW----- >| | | | | ...Response | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_REPORT_DESCRIPTOR|--------------fill ishtp_msg_hdr struct write to HW-- >| | | | | | | | | hid_allocate_device | | | | hid_add_device | | | | | | |”…”�”}”hj~sbah}”(h]”h ]”h"]”h$]”h&]”j&j'uh1jh³hÊh´Mhjmh²hubeh}”(h]”Œ)end-to-end-hid-transport-sequence-diagram”ah ]”h"]”Œ)end to end hid transport sequence diagram”ah$]”h&]”uh1hµhj�h²hh³hÊh´Mubh¶)�”}”(hhh]”(h»)�”}”(hŒ#ISH Firmware Loading from Host Flow”h]”hŒ#ISH Firmware Loading from Host Flow”…”�”}”(hj—h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj”h²hh³hÊh´MWubhÌ)�”}”(hX-Starting from the Lunar Lake generation, the ISH firmware has been divided into two components for better space optimization and increased flexibility. These components include a bootloader that is integrated into the BIOS, and a main firmware that is stored within the operating system's file system.”h]”hX/Starting from the Lunar Lake generation, the ISH firmware has been divided into two components for better space optimization and increased flexibility. These components include a bootloader that is integrated into the BIOS, and a main firmware that is stored within the operating system’s file system.”…”�”}”(hj¥h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MYhj”h²hubhÌ)�”}”(hŒThe process works as follows:”h]”hŒThe process works as follows:”…”�”}”(hj³h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M[hj”h²hubjÑ)�”}”(hhh]”(jÖ)�”}”(hXEInitially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins. ”h]”hÌ)�”}”(hXDInitially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins.”h]”hXDInitially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins.”…”�”}”(hjÈh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M]hjÄubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´NubjÖ)�”}”(hX‰During this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware. ”h]”hÌ)�”}”(hXˆDuring this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware.”h]”hXˆDuring this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware.”…”�”}”(hjàh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M_hjÜubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´NubjÖ)�”}”(hŒUAfter the process concludes, the ISHTP driver calls the release_firmware() function. ”h]”hÌ)�”}”(hŒTAfter the process concludes, the ISHTP driver calls the release_firmware() function.”h]”hŒTAfter the process concludes, the ISHTP driver calls the release_firmware() function.”…”�”}”(hjøh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mahjôubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÁh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j‚jƒuh1jÐh³hÊh´M]hj”h²hubhÌ)�”}”(hŒTFor more detailed information, please refer to the flow descriptions provided below:”h]”hŒTFor more detailed information, please refer to the flow descriptions provided below:”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mchj”h²hubj)�”}”(hXo+---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+ | | |~~~Send HOST_START_REQ_CMD~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send HOST_START_RES_CMD(Includes ISHTP_SUPPORT_CAP_LOADER bit)----| | | **************************************************************************************** * if ISHTP_SUPPORT_CAP_LOADER bit is set * **************************************************************************************** | | |~~~start loading firmware from host process~~~+ | | | | |<---------------------------------------------+ | | | --------------------------- | | Call request_firmware() | | --------------------------- | | | |~~~Send LOADER_CMD_XFER_QUERY~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_XFER_FRAGMENT~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_START~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | | |~~~Jump to Main Firmware~~~+ | | | | |<--------------------------+ | | --------------------------- | | Call release_firmware() | | --------------------------- | | | **************************************************************************************** * end if * **************************************************************************************** | | +---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+”h]”hXo+---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+ | | |~~~Send HOST_START_REQ_CMD~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send HOST_START_RES_CMD(Includes ISHTP_SUPPORT_CAP_LOADER bit)----| | | **************************************************************************************** * if ISHTP_SUPPORT_CAP_LOADER bit is set * **************************************************************************************** | | |~~~start loading firmware from host process~~~+ | | | | |<---------------------------------------------+ | | | --------------------------- | | Call request_firmware() | | --------------------------- | | | |~~~Send LOADER_CMD_XFER_QUERY~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_XFER_FRAGMENT~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_START~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | | |~~~Jump to Main Firmware~~~+ | | | | |<--------------------------+ | | --------------------------- | | Call release_firmware() | | --------------------------- | | | **************************************************************************************** * end if * **************************************************************************************** | | +---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+”…”�”}”hj sbah}”(h]”h ]”h"]”h$]”h&]”j&j'uh1jh³hÊh´Mghj”h²hubh¶)�”}”(hhh]”(h»)�”}”(hŒVendor Custom Firmware Loading”h]”hŒVendor Custom Firmware Loading”…”�”}”(hj1h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj.h²hh³hÊh´M˜ubhÌ)�”}”(hX×The firmware running inside ISH can be provided by Intel or developed by vendors using the Firmware Development Kit (FDK) provided by Intel. Intel will upstream the Intel-built firmware to the ``linux-firmware.git`` repository, located under the path ``intel/ish/``. For the Lunar Lake platform, the Intel-built ISH firmware will be named ``ish_lnlm.bin``. Vendors who wish to upstream their custom firmware should follow these guidelines for naming their firmware files:”h]”(hŒÁThe firmware running inside ISH can be provided by Intel or developed by vendors using the Firmware Development Kit (FDK) provided by Intel. Intel will upstream the Intel-built firmware to the ”…”�”}”(hj?h²hh³Nh´NubhŒliteral”“”)�”}”(hŒ``linux-firmware.git``”h]”hŒlinux-firmware.git”…”�”}”(hjIh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj?ubhŒ$ repository, located under the path ”…”�”}”(hj?h²hh³Nh´NubjH)�”}”(hŒ``intel/ish/``”h]”hŒ intel/ish/”…”�”}”(hj[h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj?ubhŒJ. For the Lunar Lake platform, the Intel-built ISH firmware will be named ”…”�”}”(hj?h²hh³Nh´NubjH)�”}”(hŒ``ish_lnlm.bin``”h]”hŒ ish_lnlm.bin”…”�”}”(hjmh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj?ubhŒt. Vendors who wish to upstream their custom firmware should follow these guidelines for naming their firmware files:”…”�”}”(hj?h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mšhj.h²hubjÑ)�”}”(hhh]”(jÖ)�”}”(hXíThe firmware filename should use one of the following patterns: - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin`` ”h]”(hÌ)�”}”(hŒ?The firmware filename should use one of the following patterns:”h]”hŒ?The firmware filename should use one of the following patterns:”…”�”}”(hjŒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MžhjˆubjÑ)�”}”(hhh]”(jÖ)�”}”(hŒt``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hjŸh]”jH)�”}”(hjŸh]”hŒpish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hj¤h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj¡ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M hj�ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒ^``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hj¿h]”jH)�”}”(hj¿h]”hŒZish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hjÄh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjÁubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¡hj½ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒ_``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin``”h]”hÌ)�”}”(hjßh]”jH)�”}”(hjßh]”hŒ[ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin”…”�”}”(hjäh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjáubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¢hjÝubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒI``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin``”h]”hÌ)�”}”(hjÿh]”jH)�”}”(hjÿh]”hŒEish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M£hjýubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒ\``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hjh]”jH)�”}”(hjh]”hŒXish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hj$h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj!ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¤hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒF``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hj?h]”jH)�”}”(hj?h]”hŒBish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjAubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¥hj=ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒG``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin``”h]”hÌ)�”}”(hj_h]”jH)�”}”(hj_h]”hŒCish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin”…”�”}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjaubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¦hj]ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubjÖ)�”}”(hŒ2``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin`` ”h]”hÌ)�”}”(hŒ1``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin``”h]”jH)�”}”(hjƒh]”hŒ-ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin”…”�”}”(hj…h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj�ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M§hj}ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjšubeh}”(h]”h ]”h"]”h$]”h&]”j‚jƒuh1jÐh³hÊh´M hjˆubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj…h²hh³Nh´NubjÖ)�”}”(hŒ‰``${intel_plat_gen}`` indicates the Intel platform generation (e.g., ``lnlm`` for Lunar Lake) and must not exceed 8 characters in length.”h]”hÌ)�”}”(hj¬h]”(jH)�”}”(hŒ``${intel_plat_gen}``”h]”hŒ${intel_plat_gen}”…”�”}”(hj±h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj®ubhŒ0 indicates the Intel platform generation (e.g., ”…”�”}”(hj®h²hh³Nh´NubjH)�”}”(hŒ``lnlm``”h]”hŒlnlm”…”�”}”(hjÃh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj®ubhŒ< for Lunar Lake) and must not exceed 8 characters in length.”…”�”}”(hj®h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M©hjªubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj…h²hh³hÊh´NubjÖ)�”}”(hŒp``${SYS_VENDOR_CRC32}`` is the CRC32 checksum of the ``sys_vendor`` value from the DMI field ``DMI_SYS_VENDOR``.”h]”hÌ)�”}”(hjãh]”(jH)�”}”(hŒ``${SYS_VENDOR_CRC32}``”h]”hŒ${SYS_VENDOR_CRC32}”…”�”}”(hjèh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjåubhŒ is the CRC32 checksum of the ”…”�”}”(hjåh²hh³Nh´NubjH)�”}”(hŒ``sys_vendor``”h]”hŒ sys_vendor”…”�”}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjåubhŒ value from the DMI field ”…”�”}”(hjåh²hh³Nh´NubjH)�”}”(hŒ``DMI_SYS_VENDOR``”h]”hŒDMI_SYS_VENDOR”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjåubhŒ.”…”�”}”(hjåh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mªhjáubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj…h²hh³hÊh´NubjÖ)�”}”(hŒ|``${PRODUCT_FAMILY_CRC32}`` is the CRC32 checksum of the ``product_family`` value from the DMI field ``DMI_PRODUCT_FAMILY``.”h]”hÌ)�”}”(hj,h]”(jH)�”}”(hŒ``${PRODUCT_FAMILY_CRC32}``”h]”hŒ${PRODUCT_FAMILY_CRC32}”…”�”}”(hj1h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj.ubhŒ is the CRC32 checksum of the ”…”�”}”(hj.h²hh³Nh´NubjH)�”}”(hŒ``product_family``”h]”hŒproduct_family”…”�”}”(hjCh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj.ubhŒ value from the DMI field ”…”�”}”(hj.h²hh³Nh´NubjH)�”}”(hŒ``DMI_PRODUCT_FAMILY``”h]”hŒDMI_PRODUCT_FAMILY”…”�”}”(hjUh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj.ubhŒ.”…”�”}”(hj.h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M«hj*ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj…h²hh³hÊh´NubjÖ)�”}”(hŒv``${PRODUCT_NAME_CRC32}`` is the CRC32 checksum of the ``product_name`` value from the DMI field ``DMI_PRODUCT_NAME``.”h]”hÌ)�”}”(hjuh]”(jH)�”}”(hŒ``${PRODUCT_NAME_CRC32}``”h]”hŒ${PRODUCT_NAME_CRC32}”…”�”}”(hjzh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjwubhŒ is the CRC32 checksum of the ”…”�”}”(hjwh²hh³Nh´NubjH)�”}”(hŒ``product_name``”h]”hŒ product_name”…”�”}”(hjŒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjwubhŒ value from the DMI field ”…”�”}”(hjwh²hh³Nh´NubjH)�”}”(hŒ``DMI_PRODUCT_NAME``”h]”hŒDMI_PRODUCT_NAME”…”�”}”(hjžh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjwubhŒ.”…”�”}”(hjwh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¬hjsubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj…h²hh³hÊh´NubjÖ)�”}”(hŒt``${PRODUCT_SKU_CRC32}`` is the CRC32 checksum of the ``product_sku`` value from the DMI field ``DMI_PRODUCT_SKU``. ”h]”hÌ)�”}”(hŒs``${PRODUCT_SKU_CRC32}`` is the CRC32 checksum of the ``product_sku`` value from the DMI field ``DMI_PRODUCT_SKU``.”h]”(jH)�”}”(hŒ``${PRODUCT_SKU_CRC32}``”h]”hŒ${PRODUCT_SKU_CRC32}”…”�”}”(hjÄh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjÀubhŒ is the CRC32 checksum of the ”…”�”•,^}”(hjÀh²hh³Nh´NubjH)�”}”(hŒ``product_sku``”h]”hŒ product_sku”…”�”}”(hjÖh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjÀubhŒ value from the DMI field ”…”�”}”(hjÀh²hh³Nh´NubjH)�”}”(hŒ``DMI_PRODUCT_SKU``”h]”hŒDMI_PRODUCT_SKU”…”�”}”(hjèh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjÀubhŒ.”…”�”}”(hjÀh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M­hj¼ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj…h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j‚jƒuh1jÐh³hÊh´Mžhj.h²hubhÌ)�”}”(hŒ¤During system boot, the ISH Linux driver will attempt to load the firmware in the following order, prioritizing custom firmware with more precise matching patterns:”h]”hŒ¤During system boot, the ISH Linux driver will attempt to load the firmware in the following order, prioritizing custom firmware with more precise matching patterns:”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¯hj.h²hubhŒenumerated_list”“”)�”}”(hhh]”(jÖ)�”}”(hŒ~``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hj! h]”jH)�”}”(hj! h]”hŒzintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hj& h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj# ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M±hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒh``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hjA h]”jH)�”}”(hjA h]”hŒdintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hjF h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjC ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M²hj? ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒi``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin``”h]”hÌ)�”}”(hja h]”jH)�”}”(hja h]”hŒeintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}_${PRODUCT_NAME_CRC32}.bin”…”�”}”(hjf h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjc ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M³hj_ ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒS``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin``”h]”hÌ)�”}”(hj� h]”jH)�”}”(hj� h]”hŒOintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_FAMILY_CRC32}.bin”…”�”}”(hj† h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjƒ ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M´hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒf``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hj¡ h]”jH)�”}”(hj¡ h]”hŒbintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hj¦ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj£ ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MµhjŸ ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒP``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin``”h]”hÌ)�”}”(hjÁ h]”jH)�”}”(hjÁ h]”hŒLintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin”…”�”}”(hjÆ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjà ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¶hj¿ ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒQ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin``”h]”hÌ)�”}”(hjá h]”jH)�”}”(hjá h]”hŒMintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin”…”�”}”(hjæ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhjã ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M·hjß ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒ;``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin``”h]”hÌ)�”}”(hj h]”jH)�”}”(hj h]”hŒ7intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¸hjÿ ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´NubjÖ)�”}”(hŒ(``intel/ish/ish_${intel_plat_gen}.bin`` ”h]”hÌ)�”}”(hŒ'``intel/ish/ish_${intel_plat_gen}.bin``”h]”jH)�”}”(hj% h]”hŒ#intel/ish/ish_${intel_plat_gen}.bin”…”�”}”(hj' h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jGhj# ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M¹hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1j hj.h²hh³hÊh´M±ubhÌ)�”}”(hXThe driver will load the first matching firmware and skip the rest. If no matching firmware is found, it will proceed to the next pattern in the specified order. If all searches fail, the default Intel firmware, listed last in the order above, will be loaded.”h]”hXThe driver will load the first matching firmware and skip the rest. If no matching firmware is found, it will proceed to the next pattern in the specified order. If all searches fail, the default Intel firmware, listed last in the order above, will be loaded.”…”�”}”(hjK h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M»hj.h²hubeh}”(h]”Œvendor-custom-firmware-loading”ah ]”h"]”Œvendor custom firmware loading”ah$]”h&]”uh1hµhj”h²hh³hÊh´M˜ubeh}”(h]”Œ#ish-firmware-loading-from-host-flow”ah ]”h"]”Œ#ish firmware loading from host flow”ah$]”h&]”uh1hµhj�h²hh³hÊh´MWubh¶)�”}”(hhh]”(h»)�”}”(hŒ ISH Debugging”h]”hŒ ISH Debugging”…”�”}”(hjl h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhji h²hh³hÊh´M¾ubhÌ)�”}”(hŒETo debug ISH, event tracing mechanism is used. To enable debug logs::”h]”hŒDTo debug ISH, event tracing mechanism is used. To enable debug logs:”…”�”}”(hjz h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MÀhji h²hubj)�”}”(hŒRecho 1 > /sys/kernel/tracing/events/intel_ish/enable cat /sys/kernel/tracing/trace”h]”hŒRecho 1 > /sys/kernel/tracing/events/intel_ish/enable cat /sys/kernel/tracing/trace”…”�”}”hjˆ sbah}”(h]”h ]”h"]”h$]”h&]”j&j'uh1jh³hÊh´MÂhji h²hubeh}”(h]”Œ ish-debugging”ah ]”h"]”Œ ish debugging”ah$]”h&]”uh1hµhj�h²hh³hÊh´M¾ubh¶)�”}”(hhh]”(h»)�”}”(hŒ1ISH IIO sysfs Example on Lenovo thinkpad Yoga 260”h]”hŒ1ISH IIO sysfs Example on Lenovo thinkpad Yoga 260”…”�”}”(hj¡ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjž h²hh³hÊh´MÆubj)�”}”(hX4root@otcpl-ThinkPad-Yoga-260:~# tree -l /sys/bus/iio/devices/ /sys/bus/iio/devices/ ├── iio:device0 -> ../../../devices/0044:8086:22D8.0001/HID-SENSOR-200073.9.auto/iio:device0 │   ├── buffer │   │   ├── enable │   │   ├── length │   │   └── watermark ... │   ├── in_accel_hysteresis │   ├── in_accel_offset │   ├── in_accel_sampling_frequency │   ├── in_accel_scale │   ├── in_accel_x_raw │   ├── in_accel_y_raw │   ├── in_accel_z_raw │   ├── name │   ├── scan_elements │   │   ├── in_accel_x_en │   │   ├── in_accel_x_index │   │   ├── in_accel_x_type │   │   ├── in_accel_y_en │   │   ├── in_accel_y_index │   │   ├── in_accel_y_type │   │   ├── in_accel_z_en │   │   ├── in_accel_z_index │   │   └── in_accel_z_type ... │   │   ├── devices │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_intensity_both_raw │   │   │   │   ├── in_intensity_hysteresis │   │   │   │   ├── in_intensity_offset │   │   │   │   ├── in_intensity_sampling_frequency │   │   │   │   ├── in_intensity_scale │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_intensity_both_en │   │   │   │   │   ├── in_intensity_both_index │   │   │   │   │   └── in_intensity_both_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_magn_hysteresis │   │   │   │   ├── in_magn_offset │   │   │   │   ├── in_magn_sampling_frequency │   │   │   │   ├── in_magn_scale │   │   │   │   ├── in_magn_x_raw │   │   │   │   ├── in_magn_y_raw │   │   │   │   ├── in_magn_z_raw │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_raw │   │   │   │   ├── in_rot_hysteresis │   │   │   │   ├── in_rot_offset │   │   │   │   ├── in_rot_sampling_frequency │   │   │   │   ├── in_rot_scale │   │   │   │   ├── name ... │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_magn_x_en │   │   │   │   │   ├── in_magn_x_index │   │   │   │   │   ├── in_magn_x_type │   │   │   │   │   ├── in_magn_y_en │   │   │   │   │   ├── in_magn_y_index │   │   │   │   │   ├── in_magn_y_type │   │   │   │   │   ├── in_magn_z_en │   │   │   │   │   ├── in_magn_z_index │   │   │   │   │   ├── in_magn_z_type │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_en │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_index │   │   │   │   │   └── in_rot_from_north_magnetic_tilt_comp_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ...”h]”hX4root@otcpl-ThinkPad-Yoga-260:~# tree -l /sys/bus/iio/devices/ /sys/bus/iio/devices/ ├── iio:device0 -> ../../../devices/0044:8086:22D8.0001/HID-SENSOR-200073.9.auto/iio:device0 │   ├── buffer │   │   ├── enable │   │   ├── length │   │   └── watermark ... │   ├── in_accel_hysteresis │   ├── in_accel_offset │   ├── in_accel_sampling_frequency │   ├── in_accel_scale │   ├── in_accel_x_raw │   ├── in_accel_y_raw │   ├── in_accel_z_raw │   ├── name │   ├── scan_elements │   │   ├── in_accel_x_en │   │   ├── in_accel_x_index │   │   ├── in_accel_x_type │   │   ├── in_accel_y_en │   │   ├── in_accel_y_index │   │   ├── in_accel_y_type │   │   ├── in_accel_z_en │   │   ├── in_accel_z_index │   │   └── in_accel_z_type ... │   │   ├── devices │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_intensity_both_raw │   │   │   │   ├── in_intensity_hysteresis │   │   │   │   ├── in_intensity_offset │   │   │   │   ├── in_intensity_sampling_frequency │   │   │   │   ├── in_intensity_scale │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_intensity_both_en │   │   │   │   │   ├── in_intensity_both_index │   │   │   │   │   └── in_intensity_both_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_magn_hysteresis │   │   │   │   ├── in_magn_offset │   │   │   │   ├── in_magn_sampling_frequency │   │   │   │   ├── in_magn_scale │   │   │   │   ├── in_magn_x_raw │   │   │   │   ├── in_magn_y_raw │   │   │   │   ├── in_magn_z_raw │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_raw │   │   │   │   ├── in_rot_hysteresis │   │   │   │   ├── in_rot_offset │   │   │   │   ├── in_rot_sampling_frequency │   │   │   │   ├── in_rot_scale │   │   │   │   ├── name ... │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_magn_x_en │   │   │   │   │   ├── in_magn_x_index │   │   │   │   │   ├── in_magn_x_type │   │   │   │   │   ├── in_magn_y_en │   │   │   │   │   ├── in_magn_y_index │   │   │   │   │   ├── in_magn_y_type │   │   │   │   │   ├── in_magn_z_en │   │   │   │   │   ├── in_magn_z_index │   │   │   │   │   ├── in_magn_z_type │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_en │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_index │   │   │   │   │   └── in_rot_from_north_magnetic_tilt_comp_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ...”…”�”}”hj¯ sbah}”(h]”h ]”h"]”h$]”h&]”j&j'uh1jh³hÊh´MÊhjž h²hubeh}”(h]”Œ1ish-iio-sysfs-example-on-lenovo-thinkpad-yoga-260”ah ]”h"]”Œ1ish iio sysfs example on lenovo thinkpad yoga 260”ah$]”h&]”uh1hµhj�h²hh³hÊh´MÆubeh}”(h]”Œ%high-level-processing-in-above-blocks”ah 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_destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jÒ jÏ jWjTj~j{jÊ jÇ j¶j³j|jyjMjJjEjBjtjqj‘jŽjåjâjjjkjhj’j�j‰j†jCj@jjjgj‘jŽjf jc j^ j[ j› j˜ j j¿ uŒ nametypes”}”(jÒ ‰jW‰j~‰jÊ ‰j¶‰j|‰jM‰jE‰jt‰j‘‰jå‰j‰jk‰j’‰j‰‰jC‰jj‰j‘‰jf ‰j^ ‰j› ‰j ‰uh}”(jÏ h·jTh÷j{jZjÇ j�j³j’jyj¹jJjæjBjjqjPjŽjjâjžjjèjhjj�jnj†j•j@j”jgjFjŽjmjc j”j[ j.j˜ ji j¿ jž uŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.