sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget%/translations/zh_CN/hid/intel-ish-hidmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget%/translations/zh_TW/hid/intel-ish-hidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget%/translations/it_IT/hid/intel-ish-hidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget%/translations/ja_JP/hid/intel-ish-hidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget%/translations/ko_KR/hid/intel-ish-hidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget%/translations/sp_SP/hid/intel-ish-hidmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h!Intel Integrated Sensor Hub (ISH)h]h!Intel Integrated Sensor Hub (ISH)}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh?/var/lib/git/docbuild/linux/Documentation/hid/intel-ish-hid.rsthKubh paragraph)}(hA sensor hub enables the ability to offload sensor polling and algorithm processing to a dedicated low power co-processor. This allows the core processor to go into low power modes more often, resulting in increased battery life.h]hA sensor hub enables the ability to offload sensor polling and algorithm processing to a dedicated low power co-processor. This allows the core processor to go into low power modes more often, resulting in increased battery life.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hThere are many vendors providing external sensor hubs conforming to HID Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops and embedded products. Linux has had this support since Linux 3.9.h]hThere are many vendors providing external sensor hubs conforming to HID Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops and embedded products. Linux has had this support since Linux 3.9.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hXIntel® introduced integrated sensor hubs as a part of the SoC starting from Cherry Trail and now supported on multiple generations of CPU packages. There are many commercial devices already shipped with Integrated Sensor Hubs (ISH). These ISH also comply to HID sensor specification, but the difference is the transport protocol used for communication. The current external sensor hubs mainly use HID over I2C or USB. But ISH doesn't use either I2C or USB.h]hXIntel® introduced integrated sensor hubs as a part of the SoC starting from Cherry Trail and now supported on multiple generations of CPU packages. There are many commercial devices already shipped with Integrated Sensor Hubs (ISH). These ISH also comply to HID sensor specification, but the difference is the transport protocol used for communication. The current external sensor hubs mainly use HID over I2C or USB. But ISH doesn’t use either I2C or USB.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hsUsing a analogy with a usbhid implementation, the ISH follows a similar model for a very high speed communication::h]hrUsing a analogy with a usbhid implementation, the ISH follows a similar model for a very high speed communication:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh literal_block)}(hXs----------------- ---------------------- | USB HID | --> | ISH HID | ----------------- ---------------------- ----------------- ---------------------- | USB protocol | --> | ISH Transport | ----------------- ---------------------- ----------------- ---------------------- | EHCI/XHCI | --> | ISH IPC | ----------------- ---------------------- PCI PCI ----------------- ---------------------- |Host controller| --> | ISH processor | ----------------- ---------------------- USB Link ----------------- ---------------------- | USB End points| --> | ISH Clients | ----------------- ----------------------h]hXs----------------- ---------------------- | USB HID | --> | ISH HID | ----------------- ---------------------- ----------------- ---------------------- | USB protocol | --> | ISH Transport | ----------------- ---------------------- ----------------- ---------------------- | EHCI/XHCI | --> | ISH IPC | ----------------- ---------------------- PCI PCI ----------------- ---------------------- |Host controller| --> | ISH processor | ----------------- ---------------------- USB Link ----------------- ---------------------- | USB End points| --> | ISH Clients | ----------------- ----------------------}hjsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1jhhhKhhhhubh)}(hX Like USB protocol provides a method for device enumeration, link management and user data encapsulation, the ISH also provides similar services. But it is very light weight tailored to manage and communicate with ISH client applications implemented in the firmware.h]hX Like USB protocol provides a method for device enumeration, link management and user data encapsulation, the ISH also provides similar services. But it is very light weight tailored to manage and communicate with ISH client applications implemented in the firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hhhhubh)}(hXFThe ISH allows multiple sensor management applications executing in the firmware. Like USB endpoints the messaging can be to/from a client. As part of enumeration process, these clients are identified. These clients can be simple HID sensor applications, sensor calibration applications or sensor firmware update applications.h]hXFThe ISH allows multiple sensor management applications executing in the firmware. Like USB endpoints the messaging can be to/from a client. As part of enumeration process, these clients are identified. These clients can be simple HID sensor applications, sensor calibration applications or sensor firmware update applications.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hhhhubh)}(hX-The implementation model is similar, like USB bus, ISH transport is also implemented as a bus. Each client application executing in the ISH processor is registered as a device on this bus. The driver, which binds each device (ISH HID driver) identifies the device type and registers with the HID core.h]hX-The implementation model is similar, like USB bus, ISH transport is also implemented as a bus. Each client application executing in the ISH processor is registered as a device on this bus. The driver, which binds each device (ISH HID driver) identifies the device type and registers with the HID core.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK8hhhhubeh}(h]overviewah ]h"]overviewah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h!ISH Implementation: Block Diagramh]h!ISH Implementation: Block Diagram}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhhhhhK>ubj)}(hX --------------------------- | User Space Applications | --------------------------- ----------------IIO ABI---------------- -------------------------- | IIO Sensor Drivers | -------------------------- -------------------------- | IIO core | -------------------------- -------------------------- | HID Sensor Hub MFD | -------------------------- -------------------------- | HID Core | -------------------------- -------------------------- | HID over ISH Client | -------------------------- -------------------------- | ISH Transport (ISHTP) | -------------------------- -------------------------- | IPC Drivers | -------------------------- OS ---------------- PCI ----------------- Hardware + Firmware ---------------------------- | ISH Hardware/Firmware(FW) | ----------------------------h]hX --------------------------- | User Space Applications | --------------------------- ----------------IIO ABI---------------- -------------------------- | IIO Sensor Drivers | -------------------------- -------------------------- | IIO core | -------------------------- -------------------------- | HID Sensor Hub MFD | -------------------------- -------------------------- | HID Core | -------------------------- -------------------------- | HID over ISH Client | -------------------------- -------------------------- | ISH Transport (ISHTP) | -------------------------- -------------------------- | IPC Drivers | -------------------------- OS ---------------- PCI ----------------- Hardware + Firmware ---------------------------- | ISH Hardware/Firmware(FW) | ----------------------------}hjWsbah}(h]h ]h"]h$]h&]jjuh1jhhhKBhjFhhubeh}(h] ish-implementation-block-diagramah ]h"]!ish implementation: block diagramah$]h&]uh1hhhhhhhhK>ubh)}(hhh](h)}(h%High level processing in above blocksh]h%High level processing in above blocks}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhhhhhKdubh)}(hhh](h)}(hHardware Interfaceh]hHardware Interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hhhhhKgubh)}(hThe ISH is exposed as "Non-VGA unclassified PCI device" to the host. The PCI product and vendor IDs are changed from different generations of processors. So the source code which enumerates drivers needs to update from generation to generation.h]hThe ISH is exposed as “Non-VGA unclassified PCI device” to the host. The PCI product and vendor IDs are changed from different generations of processors. So the source code which enumerates drivers needs to update from generation to generation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihj~hhubeh}(h]hardware-interfaceah ]h"]hardware interfaceah$]h&]uh1hhjmhhhhhKgubh)}(hhh](h)}(h*Inter Processor Communication (IPC) driverh]h*Inter Processor Communication (IPC) driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKoubh)}(h'Location: drivers/hid/intel-ish-hid/ipch]h'Location: drivers/hid/intel-ish-hid/ipc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKqhjhhubh)}(hSThe IPC message uses memory mapped I/O. The registers are defined in hw-ish-regs.h.h]hSThe IPC message uses memory mapped I/O. The registers are defined in hw-ish-regs.h.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjhhubh)}(hhh](h)}(hIPC/FW message typesh]hIPC/FW message types}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKwubh)}(hrThere are two types of messages, one for management of link and another for messages to and from transport layers.h]hrThere are two types of messages, one for management of link and another for messages to and from transport layers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKyhjhhubh)}(hhh](h)}(hTX and RX of Transport messagesh]hTX and RX of Transport messages}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK}ubh)}(hX A set of memory mapped register offers support of multi-byte messages TX and RX (e.g. IPC_REG_ISH2HOST_MSG, IPC_REG_HOST2ISH_MSG). The IPC layer maintains internal queues to sequence messages and send them in order to the firmware. Optionally the caller can register handler to get notification of completion. A doorbell mechanism is used in messaging to trigger processing in host and client firmware side. When ISH interrupt handler is called, the ISH2HOST doorbell register is used by host drivers to determine that the interrupt is for ISH.h]hX A set of memory mapped register offers support of multi-byte messages TX and RX (e.g. IPC_REG_ISH2HOST_MSG, IPC_REG_HOST2ISH_MSG). The IPC layer maintains internal queues to sequence messages and send them in order to the firmware. Optionally the caller can register handler to get notification of completion. A doorbell mechanism is used in messaging to trigger processing in host and client firmware side. When ISH interrupt handler is called, the ISH2HOST doorbell register is used by host drivers to determine that the interrupt is for ISH.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hmEach side has 32 32-bit message registers and a 32-bit doorbell. Doorbell register has the following format::h]hlEach side has 32 32-bit message registers and a 32-bit doorbell. Doorbell register has the following format:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(hBits 0..6: fragment length (7 bits are used) Bits 10..13: encapsulated protocol Bits 16..19: management command (for IPC management protocol) Bit 31: doorbell trigger (signal H/W interrupt to the other side) Other bits are reserved, should be 0.h]hBits 0..6: fragment length (7 bits are used) Bits 10..13: encapsulated protocol Bits 16..19: management command (for IPC management protocol) Bit 31: doorbell trigger (signal H/W interrupt to the other side) Other bits are reserved, should be 0.}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjhhubeh}(h]tx-and-rx-of-transport-messagesah ]h"]tx and rx of transport messagesah$]h&]uh1hhjhhhhhK}ubeh}(h]ipc-fw-message-typesah ]h"]ipc/fw message typesah$]h&]uh1hhjhhhhhKwubh)}(hhh](h)}(hTransport layer interfaceh]hTransport layer interface}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hhhhhKubh)}(hTo abstract HW level IPC communication, a set of callbacks is registered. The transport layer uses them to send and receive messages. Refer to struct ishtp_hw_ops for callbacks.h]hTo abstract HW level IPC communication, a set of callbacks is registered. The transport layer uses them to send and receive messages. Refer to struct ishtp_hw_ops for callbacks.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj<hhubeh}(h]transport-layer-interfaceah ]h"]transport layer interfaceah$]h&]uh1hhjhhhhhKubeh}(h](inter-processor-communication-ipc-driverah ]h"]*inter processor communication (ipc) driverah$]h&]uh1hhjmhhhhhKoubh)}(hhh](h)}(hISH Transport layerh]hISH Transport layer}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhhhhhKubh)}(h*Location: drivers/hid/intel-ish-hid/ishtp/h]h*Location: drivers/hid/intel-ish-hid/ishtp/}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjkhhubh)}(hhh](h)}(hA Generic Transport Layerh]hA Generic Transport Layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe transport layer is a bi-directional protocol, which defines: - Set of commands to start, stop, connect, disconnect and flow control (see ishtp/hbm.h for details) - A flow control mechanism to avoid buffer overflowsh]hThe transport layer is a bi-directional protocol, which defines: - Set of commands to start, stop, connect, disconnect and flow control (see ishtp/hbm.h for details) - A flow control mechanism to avoid buffer overflows}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hThis protocol resembles bus messages described in the following document: http://www.intel.com/content/dam/www/public/us/en/documents/technical-\ specifications/dcmi-hi-1-0-spec.pdf "Chapter 7: Bus Message Layer"h](hJThis protocol resembles bus messages described in the following document: }(hjhhhNhNubh reference)}(hEhttp://www.intel.com/content/dam/www/public/us/en/documents/technicalh]hEhttp://www.intel.com/content/dam/www/public/us/en/documents/technical}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1jhjubhI- specifications/dcmi-hi-1-0-spec.pdf “Chapter 7: Bus Message Layer”}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]a-generic-transport-layerah ]h"]a generic transport layerah$]h&]uh1hhjkhhhhhKubh)}(hhh](h)}(h%Connection and Flow Control Mechanismh]h%Connection and Flow Control Mechanism}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXEach FW client and a protocol is identified by a UUID. In order to communicate to a FW client, a connection must be established using connect request and response bus messages. If successful, a pair (host_client_id and fw_client_id) will identify the connection.h]hXEach FW client and a protocol is identified by a UUID. In order to communicate to a FW client, a connection must be established using connect request and response bus messages. If successful, a pair (host_client_id and fw_client_id) will identify the connection.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXOnce connection is established, peers send each other flow control bus messages independently. Every peer may send a message only if it has received a flow-control credit before. Once it has sent a message, it may not send another one before receiving the next flow control credit. Either side can send disconnect request bus message to end communication. Also the link will be dropped if major FW reset occurs.h]hXOnce connection is established, peers send each other flow control bus messages independently. Every peer may send a message only if it has received a flow-control credit before. Once it has sent a message, it may not send another one before receiving the next flow control credit. Either side can send disconnect request bus message to end communication. Also the link will be dropped if major FW reset occurs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]%connection-and-flow-control-mechanismah ]h"]%connection and flow control mechanismah$]h&]uh1hhjkhhhhhKubh)}(hhh](h)}(hPeer to Peer data transferh]hPeer to Peer data transfer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hPeer to Peer data transfer can happen with or without using DMA. Depending on the sensor bandwidth requirement DMA can be enabled by using module parameter ishtp_use_dma under intel_ishtp.h]hPeer to Peer data transfer can happen with or without using DMA. Depending on the sensor bandwidth requirement DMA can be enabled by using module parameter ishtp_use_dma under intel_ishtp.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hXEach side (host and FW) manages its DMA transfer memory independently. When an ISHTP client from either host or FW side wants to send something, it decides whether to send over IPC or over DMA; for each transfer the decision is independent. The sending side sends DMA_XFER message when the message is in the respective host buffer (TX when host client sends, RX when FW client sends). The recipient of DMA message responds with DMA_XFER_ACK, indicating the sender that the memory region for that message may be reused.h]hXEach side (host and FW) manages its DMA transfer memory independently. When an ISHTP client from either host or FW side wants to send something, it decides whether to send over IPC or over DMA; for each transfer the decision is independent. The sending side sends DMA_XFER message when the message is in the respective host buffer (TX when host client sends, RX when FW client sends). The recipient of DMA message responds with DMA_XFER_ACK, indicating the sender that the memory region for that message may be reused.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hXDMA initialization is started with host sending DMA_ALLOC_NOTIFY bus message (that includes RX buffer) and FW responds with DMA_ALLOC_NOTIFY_ACK. Additionally to DMA address communication, this sequence checks capabilities: if the host doesn't support DMA, then it won't send DMA allocation, so FW can't send DMA; if FW doesn't support DMA then it won't respond with DMA_ALLOC_NOTIFY_ACK, in which case host will not use DMA transfers. Here ISH acts as busmaster DMA controller. Hence when host sends DMA_XFER, it's request to do host->ISH DMA transfer; when FW sends DMA_XFER, it means that it already did DMA and the message resides at host. Thus, DMA_XFER and DMA_XFER_ACK act as ownership indicators.h]hXDMA initialization is started with host sending DMA_ALLOC_NOTIFY bus message (that includes RX buffer) and FW responds with DMA_ALLOC_NOTIFY_ACK. Additionally to DMA address communication, this sequence checks capabilities: if the host doesn’t support DMA, then it won’t send DMA allocation, so FW can’t send DMA; if FW doesn’t support DMA then it won’t respond with DMA_ALLOC_NOTIFY_ACK, in which case host will not use DMA transfers. Here ISH acts as busmaster DMA controller. Hence when host sends DMA_XFER, it’s request to do host->ISH DMA transfer; when FW sends DMA_XFER, it means that it already did DMA and the message resides at host. Thus, DMA_XFER and DMA_XFER_ACK act as ownership indicators.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hXpAt initial state all outgoing memory belongs to the sender (TX to host, RX to FW), DMA_XFER transfers ownership on the region that contains ISHTP message to the receiving side, DMA_XFER_ACK returns ownership to the sender. A sender need not wait for previous DMA_XFER to be ack'ed, and may send another message as long as remaining continuous memory in its ownership is enough. In principle, multiple DMA_XFER and DMA_XFER_ACK messages may be sent at once (up to IPC MTU), thus allowing for interrupt throttling. Currently, ISH FW decides to send over DMA if ISHTP message is more than 3 IPC fragments and via IPC otherwise.h]hXrAt initial state all outgoing memory belongs to the sender (TX to host, RX to FW), DMA_XFER transfers ownership on the region that contains ISHTP message to the receiving side, DMA_XFER_ACK returns ownership to the sender. A sender need not wait for previous DMA_XFER to be ack’ed, and may send another message as long as remaining continuous memory in its ownership is enough. In principle, multiple DMA_XFER and DMA_XFER_ACK messages may be sent at once (up to IPC MTU), thus allowing for interrupt throttling. Currently, ISH FW decides to send over DMA if ISHTP message is more than 3 IPC fragments and via IPC otherwise.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubeh}(h]peer-to-peer-data-transferah ]h"]peer to peer data transferah$]h&]uh1hhjkhhhhhKubh)}(hhh](h)}(h Ring Buffersh]h Ring Buffers}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhhhhhKubh)}(hXWhen a client initiates a connection, a ring of RX and TX buffers is allocated. The size of ring can be specified by the client. HID client sets 16 and 32 for TX and RX buffers respectively. On send request from client, the data to be sent is copied to one of the send ring buffer and scheduled to be sent using bus message protocol. These buffers are required because the FW may have not have processed the last message and may not have enough flow control credits to send. Same thing holds true on receive side and flow control is required.h]hXWhen a client initiates a connection, a ring of RX and TX buffers is allocated. The size of ring can be specified by the client. HID client sets 16 and 32 for TX and RX buffers respectively. On send request from client, the data to be sent is copied to one of the send ring buffer and scheduled to be sent using bus message protocol. These buffers are required because the FW may have not have processed the last message and may not have enough flow control credits to send. Same thing holds true on receive side and flow control is required.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjZhhubeh}(h] ring-buffersah ]h"] ring buffersah$]h&]uh1hhjkhhhhhKubh)}(hhh](h)}(hHost Enumerationh]hHost Enumeration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe host enumeration bus command allows discovery of clients present in the FW. There can be multiple sensor clients and clients for calibration function.h]hThe host enumeration bus command allows discovery of clients present in the FW. There can be multiple sensor clients and clients for calibration function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hTo ease implementation and allow independent drivers to handle each client, this transport layer takes advantage of Linux Bus driver model. Each client is registered as device on the transport bus (ishtp bus).h]hTo ease implementation and allow independent drivers to handle each client, this transport layer takes advantage of Linux Bus driver model. Each client is registered as device on the transport bus (ishtp bus).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(h!Enumeration sequence of messages:h]h!Enumeration sequence of messages:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh bullet_list)}(hhh](h list_item)}(hFHost sends HOST_START_REQ_CMD, indicating that host ISHTP layer is up.h]h)}(hjh]hFHost sends HOST_START_REQ_CMD, indicating that host ISHTP layer is up.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h#FW responds with HOST_START_RES_CMDh]h)}(hjh]h#FW responds with HOST_START_RES_CMD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h3Host sends HOST_ENUM_REQ_CMD (enumerate FW clients)h]h)}(hjh]h3Host sends HOST_ENUM_REQ_CMD (enumerate FW clients)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hRFW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW client IDsh]h)}(hRFW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW client IDsh]hRFW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW client IDs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hMFor each FW ID found in that bitmap host sends HOST_CLIENT_PROPERTIES_REQ_CMDh]h)}(hMFor each FW ID found in that bitmap host sends HOST_CLIENT_PROPERTIES_REQ_CMDh]hMFor each FW ID found in that bitmap host sends HOST_CLIENT_PROPERTIES_REQ_CMD}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hfFW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID, max ISHTP message size, etc.h]h)}(hfFW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID, max ISHTP message size, etc.h]hfFW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID, max ISHTP message size, etc.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj8ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hOnce host received properties for that last discovered client, it considers ISHTP device fully functional (and allocates DMA buffers) h]h)}(hOnce host received properties for that last discovered client, it considers ISHTP device fully functional (and allocates DMA buffers)h]hOnce host received properties for that last discovered client, it considers ISHTP device fully functional (and allocates DMA buffers)}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjPubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]bullet-uh1jhhhKhjhhubeh}(h]host-enumerationah ]h"]host enumerationah$]h&]uh1hhjkhhhhhKubeh}(h]ish-transport-layerah ]h"]ish transport layerah$]h&]uh1hhjmhhhhhKubh)}(hhh](h)}(hHID over ISH Clienth]hHID over ISH Client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(h#Location: drivers/hid/intel-ish-hidh]h#Location: drivers/hid/intel-ish-hid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(h+The ISHTP client driver is responsible for:h]h+The ISHTP client driver is responsible for:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(hhh](j)}(h)enumerate HID devices under FW ISH clienth]h)}(hjh]h)enumerate HID devices under FW ISH client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hGet Report descriptorh]h)}(hjh]hGet Report descriptor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h%Register with HID core as a LL driverh]h)}(hjh]h%Register with HID core as a LL driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hProcess Get/Set feature requesth]h)}(hjh]hProcess Get/Set feature request}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hGet input reports h]h)}(hGet input reportsh]hGet input reports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]jnjouh1jhhhMhjhhubeh}(h]hid-over-ish-clientah ]h"]hid over ish clientah$]h&]uh1hhjmhhhhhMubh)}(hhh](h)}(h)HID Sensor Hub MFD and IIO sensor driversh]h)HID Sensor Hub MFD and IIO sensor drivers}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hhhhhM ubh)}(hThe functionality in these drivers is the same as an external sensor hub. Refer to Documentation/hid/hid-sensor.rst for HID sensor Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.h]hThe functionality in these drivers is the same as an external sensor hub. Refer to Documentation/hid/hid-sensor.rst for HID sensor Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj2hhubeh}(h])hid-sensor-hub-mfd-and-iio-sensor-driversah ]h"])hid sensor hub mfd and iio sensor driversah$]h&]uh1hhjmhhhhhM ubh)}(hhh](h)}(h)End to End HID transport Sequence Diagramh]h)End to End HID transport Sequence Diagram}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhhhhhMubj)}(hXHID-ISH-CLN ISHTP IPC HW | | | | | | |-----WAKE UP------------------>| | | | | | | |-----HOST READY--------------->| | | | | | | |<----MNG_RESET_NOTIFY_ACK----- | | | | | | |<----ISHTP_START------ | | | | | | | |<-----------------HOST_START_RES_CMD-------------------| | | | | | |------------------QUERY_SUBSCRIBER-------------------->| | | | | | |------------------HOST_ENUM_REQ_CMD------------------->| | | | | | |<-----------------HOST_ENUM_RES_CMD--------------------| | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |--Repeat HOST_CLIENT_PROPERTIES_REQ_CMD-till last one--| | | | | probed() |----ishtp_cl_connect--->|----------------- CLIENT_CONNECT_REQ_CMD-------------->| | | | | | |<----------------CLIENT_CONNECT_RES_CMD----------------| | | | | |register event callback | | | | | | | |ishtp_cl_send( HOSTIF_DM_ENUM_DEVICES) |----------fill ishtp_msg_hdr struct write to HW----- >| | | | | | | |<-----IRQ(IPC_PROTOCOL_ISHTP---| | | | | |<--ENUM_DEVICE RSP------| | | | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_HID_DESCRIPTOR|----------fill ishtp_msg_hdr struct write to HW----- >| | | | | ...Response | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_REPORT_DESCRIPTOR|--------------fill ishtp_msg_hdr struct write to HW-- >| | | | | | | | | hid_allocate_device | | | | hid_add_device | | | | | | |h]hXHID-ISH-CLN ISHTP IPC HW | | | | | | |-----WAKE UP------------------>| | | | | | | |-----HOST READY--------------->| | | | | | | |<----MNG_RESET_NOTIFY_ACK----- | | | | | | |<----ISHTP_START------ | | | | | | | |<-----------------HOST_START_RES_CMD-------------------| | | | | | |------------------QUERY_SUBSCRIBER-------------------->| | | | | | |------------------HOST_ENUM_REQ_CMD------------------->| | | | | | |<-----------------HOST_ENUM_RES_CMD--------------------| | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>| | | | | | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------| | Create new device on in ishtp bus | | | | | | | |--Repeat HOST_CLIENT_PROPERTIES_REQ_CMD-till last one--| | | | | probed() |----ishtp_cl_connect--->|----------------- CLIENT_CONNECT_REQ_CMD-------------->| | | | | | |<----------------CLIENT_CONNECT_RES_CMD----------------| | | | | |register event callback | | | | | | | |ishtp_cl_send( HOSTIF_DM_ENUM_DEVICES) |----------fill ishtp_msg_hdr struct write to HW----- >| | | | | | | |<-----IRQ(IPC_PROTOCOL_ISHTP---| | | | | |<--ENUM_DEVICE RSP------| | | | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_HID_DESCRIPTOR|----------fill ishtp_msg_hdr struct write to HW----- >| | | | | ...Response | | | | for each enumerated device |ishtp_cl_send( HOSTIF_GET_REPORT_DESCRIPTOR|--------------fill ishtp_msg_hdr struct write to HW-- >| | | | | | | | | hid_allocate_device | | | | hid_add_device | | | | | | |}hjjsbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjYhhubeh}(h])end-to-end-hid-transport-sequence-diagramah ]h"])end to end hid transport sequence diagramah$]h&]uh1hhjmhhhhhMubh)}(hhh](h)}(h#ISH Firmware Loading from Host Flowh]h#ISH Firmware Loading from Host Flow}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMWubh)}(hX-Starting from the Lunar Lake generation, the ISH firmware has been divided into two components for better space optimization and increased flexibility. These components include a bootloader that is integrated into the BIOS, and a main firmware that is stored within the operating system's file system.h]hX/Starting from the Lunar Lake generation, the ISH firmware has been divided into two components for better space optimization and increased flexibility. These components include a bootloader that is integrated into the BIOS, and a main firmware that is stored within the operating system’s file system.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMYhjhhubh)}(hThe process works as follows:h]hThe process works as follows:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM[hjhhubj)}(hhh](j)}(hXEInitially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins. h]h)}(hXDInitially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins.h]hXDInitially, the ISHTP driver sends a command, HOST_START_REQ_CMD, to the ISH bootloader. In response, the bootloader sends back a HOST_START_RES_CMD. This response includes the ISHTP_SUPPORT_CAP_LOADER bit. Subsequently, the ISHTP driver checks if this bit is set. If it is, the firmware loading process from the host begins.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM]hjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hXDuring this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware. h]h)}(hXDuring this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware.h]hXDuring this process, the ISHTP driver first invokes the request_firmware() function, followed by sending a LOADER_CMD_XFER_QUERY command. Upon receiving a response from the bootloader, the ISHTP driver sends a LOADER_CMD_XFER_FRAGMENT command. After receiving another response, the ISHTP driver sends a LOADER_CMD_START command. The bootloader responds and then proceeds to the Main Firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM_hjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hUAfter the process concludes, the ISHTP driver calls the release_firmware() function. h]h)}(hTAfter the process concludes, the ISHTP driver calls the release_firmware() function.h]hTAfter the process concludes, the ISHTP driver calls the release_firmware() function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMahjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]jnjouh1jhhhM]hjhhubh)}(hTFor more detailed information, please refer to the flow descriptions provided below:h]hTFor more detailed information, please refer to the flow descriptions provided below:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMchjhhubj)}(hXo+---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+ | | |~~~Send HOST_START_REQ_CMD~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send HOST_START_RES_CMD(Includes ISHTP_SUPPORT_CAP_LOADER bit)----| | | **************************************************************************************** * if ISHTP_SUPPORT_CAP_LOADER bit is set * **************************************************************************************** | | |~~~start loading firmware from host process~~~+ | | | | |<---------------------------------------------+ | | | --------------------------- | | Call request_firmware() | | --------------------------- | | | |~~~Send LOADER_CMD_XFER_QUERY~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_XFER_FRAGMENT~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_START~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | | |~~~Jump to Main Firmware~~~+ | | | | |<--------------------------+ | | --------------------------- | | Call release_firmware() | | --------------------------- | | | **************************************************************************************** * end if * **************************************************************************************** | | +---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+h]hXo+---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+ | | |~~~Send HOST_START_REQ_CMD~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send HOST_START_RES_CMD(Includes ISHTP_SUPPORT_CAP_LOADER bit)----| | | **************************************************************************************** * if ISHTP_SUPPORT_CAP_LOADER bit is set * **************************************************************************************** | | |~~~start loading firmware from host process~~~+ | | | | |<---------------------------------------------+ | | | --------------------------- | | Call request_firmware() | | --------------------------- | | | |~~~Send LOADER_CMD_XFER_QUERY~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_XFER_FRAGMENT~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | |~~~Send LOADER_CMD_START~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~>| | | |<--Send response-----------------------------------------------------| | | | |~~~Jump to Main Firmware~~~+ | | | | |<--------------------------+ | | --------------------------- | | Call release_firmware() | | --------------------------- | | | **************************************************************************************** * end if * **************************************************************************************** | | +---------------+ +-----------------+ | ISHTP Driver | | ISH Bootloader | +---------------+ +-----------------+}hj sbah}(h]h ]h"]h$]h&]jjuh1jhhhMghjhhubh)}(hhh](h)}(hVendor Custom Firmware Loadingh]hVendor Custom Firmware Loading}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXThe firmware running inside ISH can be provided by Intel or developed by vendors using the Firmware Development Kit (FDK) provided by Intel. Intel will upstream the Intel-built firmware to the ``linux-firmware.git`` repository, located under the path ``intel/ish/``. For the Lunar Lake platform, the Intel-built ISH firmware will be named ``ish_lnlm.bin``. Vendors who wish to upstream their custom firmware should follow these guidelines for naming their firmware files:h](hThe firmware running inside ISH can be provided by Intel or developed by vendors using the Firmware Development Kit (FDK) provided by Intel. Intel will upstream the Intel-built firmware to the }(hj+hhhNhNubhliteral)}(h``linux-firmware.git``h]hlinux-firmware.git}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hj+ubh$ repository, located under the path }(hj+hhhNhNubj4)}(h``intel/ish/``h]h intel/ish/}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hj+ubhJ. For the Lunar Lake platform, the Intel-built ISH firmware will be named }(hj+hhhNhNubj4)}(h``ish_lnlm.bin``h]h ish_lnlm.bin}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hj+ubht. Vendors who wish to upstream their custom firmware should follow these guidelines for naming their firmware files:}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(hhh](j)}(hXgThe firmware filename should use one of the following patterns: - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin`` - ``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin`` h](h)}(h?The firmware filename should use one of the following patterns:h]h?The firmware filename should use one of the following patterns:}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjtubj)}(hhh](j)}(h\``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin``h]h)}(hjh]j4)}(hjh]hXish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hF``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin``h]h)}(hjh]j4)}(hjh]hBish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hG``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin``h]h)}(hjh]j4)}(hjh]hCish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(h2``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin`` h]h)}(h1``ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin``h]j4)}(hjh]h-ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]jnjouh1jhhhMhjtubeh}(h]h ]h"]h$]h&]uh1jhjqhhhNhNubj)}(h``${intel_plat_gen}`` indicates the Intel platform generation (e.g., ``lnlm`` for Lunar Lake) and must not exceed 8 characters in length.h]h)}(hjh](j4)}(h``${intel_plat_gen}``h]h${intel_plat_gen}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh0 indicates the Intel platform generation (e.g., }(hjhhhNhNubj4)}(h``lnlm``h]hlnlm}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh< for Lunar Lake) and must not exceed 8 characters in length.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjqhhhhhNubj)}(hp``${SYS_VENDOR_CRC32}`` is the CRC32 checksum of the ``sys_vendor`` value from the DMI field ``DMI_SYS_VENDOR``.h]h)}(hjOh](j4)}(h``${SYS_VENDOR_CRC32}``h]h${SYS_VENDOR_CRC32}}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjQubh is the CRC32 checksum of the }(hjQhhhNhNubj4)}(h``sys_vendor``h]h sys_vendor}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjQubh value from the DMI field }(hjQhhhNhNubj4)}(h``DMI_SYS_VENDOR``h]hDMI_SYS_VENDOR}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjQubh.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjMubah}(h]h ]h"]h$]h&]uh1jhjqhhhhhNubj)}(hv``${PRODUCT_NAME_CRC32}`` is the CRC32 checksum of the ``product_name`` value from the DMI field ``DMI_PRODUCT_NAME``.h]h)}(hjh](j4)}(h``${PRODUCT_NAME_CRC32}``h]h${PRODUCT_NAME_CRC32}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh is the CRC32 checksum of the }(hjhhhNhNubj4)}(h``product_name``h]h product_name}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh value from the DMI field }(hjhhhNhNubj4)}(h``DMI_PRODUCT_NAME``h]hDMI_PRODUCT_NAME}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjqhhhhhNubj)}(ht``${PRODUCT_SKU_CRC32}`` is the CRC32 checksum of the ``product_sku`` value from the DMI field ``DMI_PRODUCT_SKU``. h]h)}(hs``${PRODUCT_SKU_CRC32}`` is the CRC32 checksum of the ``product_sku`` value from the DMI field ``DMI_PRODUCT_SKU``.h](j4)}(h``${PRODUCT_SKU_CRC32}``h]h${PRODUCT_SKU_CRC32}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh is the CRC32 checksum of the }(hjhhhNhNubj4)}(h``product_sku``h]h product_sku}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh value from the DMI field }(hjhhhNhNubj4)}(h``DMI_PRODUCT_SKU``h]hDMI_PRODUCT_SKU}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjqhhhhhNubeh}(h]h ]h"]h$]h&]jnjouh1jhhhMhjhhubh)}(hDuring system boot, the ISH Linux driver will attempt to load the firmware in the following order, prioritizing custom firmware with more precise matching patterns:h]hDuring system boot, the ISH Linux driver will attempt to load the firmware in the following order, prioritizing custom firmware with more precise matching patterns:}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubhenumerated_list)}(hhh](j)}(hf``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin``h]h)}(hjDh]j4)}(hjDh]hbintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}_${PRODUCT_SKU_CRC32}.bin}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjFubah}(h]h ]h"]h$]h&]uh1hhhhMhjBubah}(h]h ]h"]h$]h&]uh1jhj?hhhhhNubj)}(hP``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin``h]h)}(hjdh]j4)}(hjdh]hLintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_SKU_CRC32}.bin}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjfubah}(h]h ]h"]h$]h&]uh1hhhhMhjbubah}(h]h ]h"]h$]h&]uh1jhj?hhhhhNubj)}(hQ``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin``h]h)}(hjh]j4)}(hjh]hMintel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}_${PRODUCT_NAME_CRC32}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhj?hhhhhNubj)}(h;``intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin``h]h)}(hjh]j4)}(hjh]h7intel/ish/ish_${intel_plat_gen}_${SYS_VENDOR_CRC32}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhj?hhhhhNubj)}(h(``intel/ish/ish_${intel_plat_gen}.bin`` h]h)}(h'``intel/ish/ish_${intel_plat_gen}.bin``h]j4)}(hjh]h#intel/ish/ish_${intel_plat_gen}.bin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhj?hhhhhNubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j=hjhhhhhMubh)}(hXThe driver will load the first matching firmware and skip the rest. If no matching firmware is found, it will proceed to the next pattern in the specified order. If all searches fail, the default Intel firmware, listed last in the order above, will be loaded.]Jh]hXThe driver will load the first matching firmware and skip the rest. If no matching firmware is found, it will proceed to the next pattern in the specified order. If all searches fail, the default Intel firmware, listed last in the order above, will be loaded.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h]vendor-custom-firmware-loadingah ]h"]vendor custom firmware loadingah$]h&]uh1hhjhhhhhMubeh}(h]#ish-firmware-loading-from-host-flowah ]h"]#ish firmware loading from host flowah$]h&]uh1hhjmhhhhhMWubh)}(hhh](h)}(h ISH Debuggingh]h ISH Debugging}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hETo debug ISH, event tracing mechanism is used. To enable debug logs::h]hDTo debug ISH, event tracing mechanism is used. To enable debug logs:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubj)}(hRecho 1 > /sys/kernel/tracing/events/intel_ish/enable cat /sys/kernel/tracing/traceh]hRecho 1 > /sys/kernel/tracing/events/intel_ish/enable cat /sys/kernel/tracing/trace}hj+ sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhj hhubeh}(h] ish-debuggingah ]h"] ish debuggingah$]h&]uh1hhjmhhhhhMubh)}(hhh](h)}(h1ISH IIO sysfs Example on Lenovo thinkpad Yoga 260h]h1ISH IIO sysfs Example on Lenovo thinkpad Yoga 260}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjA hhhhhMubj)}(hX4root@otcpl-ThinkPad-Yoga-260:~# tree -l /sys/bus/iio/devices/ /sys/bus/iio/devices/ ├── iio:device0 -> ../../../devices/0044:8086:22D8.0001/HID-SENSOR-200073.9.auto/iio:device0 │   ├── buffer │   │   ├── enable │   │   ├── length │   │   └── watermark ... │   ├── in_accel_hysteresis │   ├── in_accel_offset │   ├── in_accel_sampling_frequency │   ├── in_accel_scale │   ├── in_accel_x_raw │   ├── in_accel_y_raw │   ├── in_accel_z_raw │   ├── name │   ├── scan_elements │   │   ├── in_accel_x_en │   │   ├── in_accel_x_index │   │   ├── in_accel_x_type │   │   ├── in_accel_y_en │   │   ├── in_accel_y_index │   │   ├── in_accel_y_type │   │   ├── in_accel_z_en │   │   ├── in_accel_z_index │   │   └── in_accel_z_type ... │   │   ├── devices │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_intensity_both_raw │   │   │   │   ├── in_intensity_hysteresis │   │   │   │   ├── in_intensity_offset │   │   │   │   ├── in_intensity_sampling_frequency │   │   │   │   ├── in_intensity_scale │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_intensity_both_en │   │   │   │   │   ├── in_intensity_both_index │   │   │   │   │   └── in_intensity_both_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_magn_hysteresis │   │   │   │   ├── in_magn_offset │   │   │   │   ├── in_magn_sampling_frequency │   │   │   │   ├── in_magn_scale │   │   │   │   ├── in_magn_x_raw │   │   │   │   ├── in_magn_y_raw │   │   │   │   ├── in_magn_z_raw │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_raw │   │   │   │   ├── in_rot_hysteresis │   │   │   │   ├── in_rot_offset │   │   │   │   ├── in_rot_sampling_frequency │   │   │   │   ├── in_rot_scale │   │   │   │   ├── name ... │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_magn_x_en │   │   │   │   │   ├── in_magn_x_index │   │   │   │   │   ├── in_magn_x_type │   │   │   │   │   ├── in_magn_y_en │   │   │   │   │   ├── in_magn_y_index │   │   │   │   │   ├── in_magn_y_type │   │   │   │   │   ├── in_magn_z_en │   │   │   │   │   ├── in_magn_z_index │   │   │   │   │   ├── in_magn_z_type │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_en │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_index │   │   │   │   │   └── in_rot_from_north_magnetic_tilt_comp_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ...h]hX4root@otcpl-ThinkPad-Yoga-260:~# tree -l /sys/bus/iio/devices/ /sys/bus/iio/devices/ ├── iio:device0 -> ../../../devices/0044:8086:22D8.0001/HID-SENSOR-200073.9.auto/iio:device0 │   ├── buffer │   │   ├── enable │   │   ├── length │   │   └── watermark ... │   ├── in_accel_hysteresis │   ├── in_accel_offset │   ├── in_accel_sampling_frequency │   ├── in_accel_scale │   ├── in_accel_x_raw │   ├── in_accel_y_raw │   ├── in_accel_z_raw │   ├── name │   ├── scan_elements │   │   ├── in_accel_x_en │   │   ├── in_accel_x_index │   │   ├── in_accel_x_type │   │   ├── in_accel_y_en │   │   ├── in_accel_y_index │   │   ├── in_accel_y_type │   │   ├── in_accel_z_en │   │   ├── in_accel_z_index │   │   └── in_accel_z_type ... │   │   ├── devices │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_intensity_both_raw │   │   │   │   ├── in_intensity_hysteresis │   │   │   │   ├── in_intensity_offset │   │   │   │   ├── in_intensity_sampling_frequency │   │   │   │   ├── in_intensity_scale │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_intensity_both_en │   │   │   │   │   ├── in_intensity_both_index │   │   │   │   │   └── in_intensity_both_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_magn_hysteresis │   │   │   │   ├── in_magn_offset │   │   │   │   ├── in_magn_sampling_frequency │   │   │   │   ├── in_magn_scale │   │   │   │   ├── in_magn_x_raw │   │   │   │   ├── in_magn_y_raw │   │   │   │   ├── in_magn_z_raw │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_raw │   │   │   │   ├── in_rot_hysteresis │   │   │   │   ├── in_rot_offset │   │   │   │   ├── in_rot_sampling_frequency │   │   │   │   ├── in_rot_scale │   │   │   │   ├── name ... │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_magn_x_en │   │   │   │   │   ├── in_magn_x_index │   │   │   │   │   ├── in_magn_x_type │   │   │   │   │   ├── in_magn_y_en │   │   │   │   │   ├── in_magn_y_index │   │   │   │   │   ├── in_magn_y_type │   │   │   │   │   ├── in_magn_z_en │   │   │   │   │   ├── in_magn_z_index │   │   │   │   │   ├── in_magn_z_type │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_en │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_index │   │   │   │   │   └── in_rot_from_north_magnetic_tilt_comp_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ... │   │   │   │   ├── buffer │   │   │   │   │   ├── enable │   │   │   │   │   ├── length │   │   │   │   │   └── watermark │   │   │   │   ├── dev │   │   │   │   ├── in_anglvel_hysteresis │   │   │   │   ├── in_anglvel_offset │   │   │   │   ├── in_anglvel_sampling_frequency │   │   │   │   ├── in_anglvel_scale │   │   │   │   ├── in_anglvel_x_raw │   │   │   │   ├── in_anglvel_y_raw │   │   │   │   ├── in_anglvel_z_raw │   │   │   │   ├── name │   │   │   │   ├── scan_elements │   │   │   │   │   ├── in_anglvel_x_en │   │   │   │   │   ├── in_anglvel_x_index │   │   │   │   │   ├── in_anglvel_x_type │   │   │   │   │   ├── in_anglvel_y_en │   │   │   │   │   ├── in_anglvel_y_index │   │   │   │   │   ├── in_anglvel_y_type │   │   │   │   │   ├── in_anglvel_z_en │   │   │   │   │   ├── in_anglvel_z_index │   │   │   │   │   └── in_anglvel_z_type │   │   │   │   ├── trigger │   │   │   │   │   └── current_trigger ...}hjR sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjA hhubeh}(h]1ish-iio-sysfs-example-on-lenovo-thinkpad-yoga-260ah ]h"]1ish iio sysfs example on lenovo thinkpad yoga 260ah$]h&]uh1hhjmhhhhhMubeh}(h]%high-level-processing-in-above-blocksah ]h"]%high level processing in above blocksah$]h&]uh1hhhhhhhhKdubeh}(h]intel-integrated-sensor-hub-ishah ]h"]!intel integrated sensor hub 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