sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget!/translations/zh_CN/gpu/xe/xe_rtpmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/zh_TW/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/it_IT/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ja_JP/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ko_KR/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/sp_SP/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh;/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp.rsthKubhsection)}(hhh](htitle)}(hRegister Table Processingh]hRegister Table Processing}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hXInternal infrastructure to define how registers should be updated based on rules and actions. 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./drivers/gpu/drm/xe/xe_rtp.hhK:hhhhubh block_quote)}(hCreate rule matching platform h]h)}(hCreate rule matching platformh]hCreate rule matching platform}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK3hjubah}(h]h ]h"]h$]h&]uh1jhjhK3hhhhubj)}(hk**Parameters** ``plat_`` platform to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK7hjubj)}(hhh]j)}(h``plat_`` platform to match h](j)}(h ``plat_``h]j)}(hjh]hplat_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK4hjubj)}(hhh]h)}(hplatform to matchh]hplatform to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h 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]h"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK@hjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK@hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h#XE_RTP_RULE_GRAPHICS_STEP (C macro)c.XE_RTP_RULE_GRAPHICS_STEPhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_GRAPHICS_STEPh]j )}(hXE_RTP_RULE_GRAPHICS_STEPh]j2)}(hXE_RTP_RULE_GRAPHICS_STEPh]j8)}(hjh]hXE_RTP_RULE_GRAPHICS_STEP}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKOubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhKOubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKOhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhKOubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h,``XE_RTP_RULE_GRAPHICS_STEP (start_, end_)``h]j)}(hjh]h(XE_RTP_RULE_GRAPHICS_STEP (start_, end_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKQhhhhubj)}(h'Create rule matching graphics stepping h]h)}(h&Create rule matching graphics steppingh]h&Create rule matching graphics stepping}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKFhjubah}(h]h ]h"]h$]h&]uh1jhjhKFhhhhubj)}(hX,**Parameters** ``start_`` First stepping matching the rule ``end_`` First stepping that does not match the rule **Description** Note that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKJhjubj)}(hhh](j)}(h,``start_`` First stepping matching the rule h](j)}(h ``start_``h]j)}(hj+h]hstart_}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKGhj%ubj)}(hhh]h)}(h First stepping matching the ruleh]h First stepping matching the rule}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKGhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj@hKGhj"ubj)}(h5``end_`` First stepping that does not match the rule h](j)}(h``end_``h]j)}(hjdh]hend_}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKHhj^ubj)}(hhh]h)}(h+First stepping that does not match the ruleh]h+First stepping that does not match the rule}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhKHhjzubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jhjyhKHhj"ubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKJhjubh)}(hwNote that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right.h](h,Note that the range matching this rule is [ }(hjhhhNhNubj)}(h **start_**h]hstart_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh, }(hjhhhNhNubj)}(h**end_**h]hend_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh7 ), i.e. inclusive on the left, exclusive on the right.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKJhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h XE_RTP_RULE_MEDIA_STEP (C macro)c.XE_RTP_RULE_MEDIA_STEPhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_MEDIA_STEPh]j )}(hXE_RTP_RULE_MEDIA_STEPh]j2)}(hXE_RTP_RULE_MEDIA_STEPh]j8)}(hjh]hXE_RTP_RULE_MEDIA_STEP}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK\ubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhj.hK\ubah}(h]j ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj.hK\hj hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchj hhhj.hK\ubeh}(h]h ](jmacroeh"]h$]h&]jjjjGjjGjjjuh1hhhhhhNhNubh)}(h)``XE_RTP_RULE_MEDIA_STEP (start_, end_)``h]j)}(hjMh]h%XE_RTP_RULE_MEDIA_STEP (start_, end_)}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK^hhhhubj)}(h$Create rule matching media stepping h]h)}(h#Create rule matching media steppingh]h#Create rule matching media stepping}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKShjcubah}(h]h ]h"]h$]h&]uh1jhjuhKShhhhubj)}(hX,**Parameters** ``start_`` First stepping matching the rule ``end_`` First stepping that does not match the rule **Description** Note that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKWhj|ubj)}(hhh](j)}(h,``start_`` First stepping matching the rule h](j)}(h ``start_``h]j)}(hjh]hstart_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKThjubj)}(hhh]h)}(h First stepping matching the ruleh]h First stepping matching the rule}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKThjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKThjubj)}(h5``end_`` First stepping that does not match the rule h](j)}(h``end_``h]j)}(hjh]hend_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKUhjubj)}(hhh]h)}(h+First stepping that does not match the ruleh]h+First stepping that does not match the rule}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKUhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKUhjubeh}(h]h ]h"]h$]h&]uh1jhj|ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKWhj|ubh)}(hwNote that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right.h](h,Note that the range matching this rule is [ }(hj+hhhNhNubj)}(h **start_**h]hstart_}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubh, }(hj+hhhNhNubj)}(h**end_**h]hend_}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubh7 ), i.e. inclusive on the left, exclusive on the right.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKWhj|ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKZhj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h"XE_RTP_RULE_ENGINE_CLASS (C macro)c.XE_RTP_RULE_ENGINE_CLASShNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_ENGINE_CLASSh]j )}(hXE_RTP_RULE_ENGINE_CLASSh]j2)}(hXE_RTP_RULE_ENGINE_CLASSh]j8)}(hjh]hXE_RTP_RULE_ENGINE_CLASS}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKeubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhKeubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKehjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhKeubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h#``XE_RTP_RULE_ENGINE_CLASS (cls_)``h]j)}(hjh]hXE_RTP_RULE_ENGINE_CLASS (cls_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKghhhhubj)}(h%Create rule matching an engine class h]h)}(h$Create rule matching an engine classh]h$Create rule matching an engine class}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK`hjubah}(h]h ]h"]h$]h&]uh1jhjhK`hhhhubj)}(hn**Parameters** ``cls_`` Engine class to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKdhjubj)}(hhh]j)}(h``cls_`` Engine class to match h](j)}(h``cls_``h]j)}(hj h]hcls_}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKahj ubj)}(hhh]h)}(hEngine class to matchh]hEngine class to match}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj, hKahj- ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj, hKahj ubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjR h]h Description}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjP ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKchjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKchjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_RULE_FUNC (C macro)c.XE_RTP_RULE_FUNChNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_FUNCh]j )}(hXE_RTP_RULE_FUNCh]j2)}(hXE_RTP_RULE_FUNCh]j8)}(hj h]hXE_RTP_RULE_FUNC}(hj hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKrubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj hhhj hKrubah}(h]j ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj hKrhj hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchj hhhj hKrubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1hhhhhhNhNubh)}(h``XE_RTP_RULE_FUNC (func__)``h]j)}(hj h]hXE_RTP_RULE_FUNC (func__)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKthhhhubj)}(h.Create rule using callback function for match h]h)}(h-Create rule using callback function for matchh]h-Create rule using callback function for match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKihj ubah}(h]h ]h"]h$]h&]uh1jhj hKihhhhubj)}(hX/**Parameters** ``func__`` Function to call to decide if rule matches **Description** This allows more complex checks to be performed. The ``XE_RTP`` infrastructure will simply call the function **func_** passed to decide if this rule matches the device. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKmhj ubj)}(hhh]j)}(h6``func__`` Function to call to decide if rule matches h](j)}(h ``func__``h]j)}(hj! h]hfunc__}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKjhj ubj)}(hhh]h)}(h*Function to call to decide if rule matchesh]h*Function to call to decide if rule matches}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6 hKjhj7 ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj6 hKjhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj\ h]h Description}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZ ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKlhj ubh)}(hThis allows more complex checks to be performed. The ``XE_RTP`` infrastructure will simply call the function **func_** passed to decide if this rule matches the device.h](h5This allows more complex checks to be performed. The }(hjr hhhNhNubj)}(h ``XE_RTP``h]hXE_RTP}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjr ubh. infrastructure will simply call the function }(hjr hhhNhNubj)}(h **func_**h]hfunc_}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjr ubh2 passed to decide if this rule matches the device.}(hjr hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKlhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKphj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h&XE_RTP_RULE_GRAPHICS_VERSION (C macro)c.XE_RTP_RULE_GRAPHICS_VERSIONhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_GRAPHICS_VERSIONh]j )}(hXE_RTP_RULE_GRAPHICS_VERSIONh]j2)}(hXE_RTP_RULE_GRAPHICS_VERSIONh]j8)}(hj h]hXE_RTP_RULE_GRAPHICS_VERSION}(hj hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK|ubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj hhhj hK|ubah}(h]j ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj hK|hj hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchj hhhj hK|ubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1hhhhhhNhNubh)}(h(``XE_RTP_RULE_GRAPHICS_VERSION (ver__)``h]j)}(hj h]h$XE_RTP_RULE_GRAPHICS_VERSION (ver__)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK~hhhhubj)}(h&Create rule matching graphics version h]h)}(h%Create rule matching graphics versionh]h%Create rule matching graphics version}(hj$ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKwhj ubah}(h]h ]h"]h$]h&]uh1jhj2 hKwhhhhubj)}(hv**Parameters** ``ver__`` Graphics IP version to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj? h]h Parameters}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj= ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK{hj9 ubj)}(hhh]j)}(h'``ver__`` Graphics IP version to match h](j)}(h ``ver__``h]j)}(hj^ h]hver__}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKxhjX ubj)}(hhh]h)}(hGraphics IP version to matchh]hGraphics IP version to match}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjs hKxhjt ubah}(h]h ]h"]h$]h&]uh1jhjX ubeh}(h]h ]h"]h$]h&]uh1jhjs hKxhjU ubah}(h]h ]h"]h$]h&]uh1jhj9 ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKzhj9 ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKzhj9 ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h,XE_RTP_RULE_GRAPHICS_VERSION_RANGE (C macro)$c.XE_RTP_RULE_GRAPHICS_VERSION_RANGEhNtauh1hhhhhhNhNubh)}(hhh](j)}(h"XE_RTP_RULE_GRAPHICS_VERSION_RANGEh]j )}(h"XE_RTP_RULE_GRAPHICS_VERSION_RANGEh]j2)}(h"XE_RTP_RULE_GRAPHICS_VERSION_RANGEh]j8)}(hj h]h"XE_RTP_RULE_GRAPHICS_VERSION_RANGE}(hj hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj hhhj hKubah}(h]j ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj hKhj hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchj hhhj hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1hhhhhhNhNubh)}(h?``XE_RTP_RULE_GRAPHICS_VERSION_RANGE (ver_start__, ver_end__)``h]j)}(hj h]h;XE_RTP_RULE_GRAPHICS_VERSION_RANGE (ver_start__, ver_end__)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h1Create rule matching a range of graphics version h]h)}(h0Create rule matching a range of graphics versionh]h0Create rule matching a range of graphics version}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj* ubah}(h]h ]h"]h$]h&]uh1jhj< hKhhhhubj)}(hX!**Parameters** ``ver_start__`` First graphics IP version to match ``ver_end__`` Last graphics IP version to match **Description** Note that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sides Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjI h]h Parameters}(hjK hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjG ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjC ubj)}(hhh](j)}(h3``ver_start__`` First graphics IP version to match h](j)}(h``ver_start__``h]j)}(hjh h]h ver_start__}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjf ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjb ubj)}(hhh]h)}(h"First graphics IP version to matchh]h"First graphics IP version to match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj} hKhj~ ubah}(h]h ]h"]h$]h&]uh1jhjb ubeh}(h]h ]h"]h$]h&]uh1jhj} hKhj_ ubj)}(h0``ver_end__`` Last graphics IP version to match h](j)}(h ``ver_end__``h]j)}(hj h]h ver_end__}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]h)}(h!Last graphics IP version to matchh]h!Last graphics IP version to match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj_ ubeh}(h]h ]h"]h$]h&]uh1jhjC ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjC ubh)}(hjNote that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sidesh](h,Note that the range matching this rule is [ }(hj hhhNhNubj)}(h**ver_start__**h]h ver_start__}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh, }(hj hhhNhNubj)}(h **ver_end__**h]h ver_end__}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh ], i.e. inclusive on both sides}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjC ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjC ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h-XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT (C macro)%c.XE_RTP_RULE_GRAPHICS_VERSION_ANY_GThNtauh1hhhhhhNhNubh)}(hhh](j)}(h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GTh]j )}(h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GTh]j2)}(h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GTh]j8)}(hjN h]h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT}(hjX hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjT ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjP hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjL hhhjk hKubah}(h]jG ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjk hKhjI hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjI hhhjk hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1hhhhhhNhNubh)}(h/``XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT (ver__)``h]j)}(hj h]h+XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT (ver__)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h0Create rule matching graphics version on any GT h]h)}(h/Create rule matching graphics version on any GTh]h/Create rule matching graphics version on any GT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj hKhhhhubj)}(hXP**Parameters** ``ver__`` Graphics IP version to match **Description** Like XE_RTP_RULE_GRAPHICS_VERSION, but it matches even if the current GT being checked is not of the graphics type. It allows to add RTP entries to another GT when the device contains a Graphics IP with that version. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]j)}(h'``ver__`` Graphics IP version to match h](j)}(h ``ver__``h]j)}(hj h]hver__}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]h)}(hGraphics IP version to matchh]hGraphics IP version to match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(hLike XE_RTP_RULE_GRAPHICS_VERSION, but it matches even if the current GT being checked is not of the graphics type. It allows to add RTP entries to another GT when the device contains a Graphics IP with that version.h]hLike XE_RTP_RULE_GRAPHICS_VERSION, but it matches even if the current GT being checked is not of the graphics type. It allows to add RTP entries to another GT when the device contains a Graphics IP with that version.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h#XE_RTP_RULE_MEDIA_VERSION (C macro)c.XE_RTP_RULE_MEDIA_VERSIONhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_MEDIA_VERSIONh]j )}(hXE_RTP_RULE_MEDIA_VERSIONh]j2)}(hXE_RTP_RULE_MEDIA_VERSIONh]j8)}(hjgh]hXE_RTP_RULE_MEDIA_VERSION}(hjqhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjmubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjihhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjehhhjhKubah}(h]j`ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKhjbhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjbhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h%``XE_RTP_RULE_MEDIA_VERSION (ver__)``h]j)}(hjh]h!XE_RTP_RULE_MEDIA_VERSION (ver__)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h#Create rule matching media version h]h)}(h"Create rule matching media versionh]h"Create rule matching media version}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(hs**Parameters** ``ver__`` Media IP version to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]j)}(h$``ver__`` Media IP version to match h](j)}(h ``ver__``h]j)}(hjh]hver__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hMedia IP version to matchh]hMedia IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hKhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj2h]h Description}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h)XE_RTP_RULE_MEDIA_VERSION_RANGE (C macro)!c.XE_RTP_RULE_MEDIA_VERSION_RANGEhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_MEDIA_VERSION_RANGEh]j )}(hXE_RTP_RULE_MEDIA_VERSION_RANGEh]j2)}(hXE_RTP_RULE_MEDIA_VERSION_RANGEh]j8)}(hjqh]hXE_RTP_RULE_MEDIA_VERSION_RANGE}(hj{hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjwubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjshhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjohhhjhKubah}(h]jjah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKhjlhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjlhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h<``XE_RTP_RULE_MEDIA_VERSION_RANGE (ver_start__, ver_end__)``h]j)}(hjh]h8XE_RTP_RULE_MEDIA_VERSION_RANGE (ver_start__, ver_end__)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h.Create rule matching a range of media version h]h)}(h-Create rule matching a range of media versionh]h-Create rule matching a range of media version}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(hX**Parameters** ``ver_start__`` First media IP version to match ``ver_end__`` Last media IP version to match **Description** Note that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sides Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh](j)}(h0``ver_start__`` First media IP version to match h](j)}(h``ver_start__``h]j)}(hjh]h ver_start__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hFirst media IP version to matchh]hFirst media IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h-``ver_end__`` Last media IP version to match h](j)}(h ``ver_end__``h]j)}(hj:h]h ver_end__}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj4ubj)}(hhh]h)}(hLast media IP version to matchh]hLast media IP version to match}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhjOhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(hjNote that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sidesh](h,Note that the range matching this rule is [ }(hjhhhNhNubj)}(h**ver_start__**h]h ver_start__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh, }(hjhhhNhNubj)}(h **ver_end__**h]h ver_end__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh ], i.e. inclusive on both sides}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h*XE_RTP_RULE_MEDIA_VERSION_ANY_GT (C macro)"c.XE_RTP_RULE_MEDIA_VERSION_ANY_GThNtauh1hhhhhhNhNubh)}(hhh](j)}(h XE_RTP_RULE_MEDIA_VERSION_ANY_GTh]j )}(h XE_RTP_RULE_MEDIA_VERSION_ANY_GTh]j2)}(h XE_RTP_RULE_MEDIA_VERSION_ANY_GTh]j8)}(hjh]h XE_RTP_RULE_MEDIA_VERSION_ANY_GT}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhKubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h,``XE_RTP_RULE_MEDIA_VERSION_ANY_GT (ver__)``h]j)}(hj#h]h(XE_RTP_RULE_MEDIA_VERSION_ANY_GT (ver__)}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h-Create rule matching media version on any GT h]h)}(h,Create rule matching media version on any GTh]h,Create rule matching media version on any GT}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj9ubah}(h]h ]h"]h$]h&]uh1jhjKhKhhhhubj)}(hXD**Parameters** ``ver__`` Media IP version to match **Description** Like XE_RTP_RULE_MEDIA_VERSION, but it matches even if the current GT being checked is not of the media type. It allows to add RTP entries to another GT when the device contains a Media IP with that version. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjXh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjVubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubj)}(hhh]j)}(h$``ver__`` Media IP version to match h](j)}(h ``ver__``h]j)}(hjwh]hver__}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjqubj)}(hhh]h)}(hMedia IP version to matchh]hMedia IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jhjhKhjnubah}(h]h ]h"]h$]h&]uh1jhjRubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubh)}(hLike XE_RTP_RULE_MEDIA_VERSION, but it matches even if the current GT being checked is not of the media type. It allows to add RTP entries to another GT when the device contains a Media IP with that version.h]hLike XE_RTP_RULE_MEDIA_VERSION, but it matches even if the current GT being checked is not of the media type. It allows to add RTP entries to another GT when the device contains a Media IP with that version.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h#XE_RTP_RULE_IS_INTEGRATED (C macro)c.XE_RTP_RULE_IS_INTEGRATEDhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_IS_INTEGRATEDh]j )}(hXE_RTP_RULE_IS_INTEGRATEDh]j2)}(hXE_RTP_RULE_IS_INTEGRATEDh]j8)}(hjh]hXE_RTP_RULE_IS_INTEGRATED}(hj hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhKubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjj6jj6jjjuh1hhhhhhNhNubh)}(h``XE_RTP_RULE_IS_INTEGRATED``h]j)}(hj<h]hXE_RTP_RULE_IS_INTEGRATED}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hs Create a rule matching integrated graphics devices **Description** Refer to XE_RTP_RULES() for expected usage. h](j)}(h3Create a rule matching integrated graphics devices h]h)}(h2Create a rule matching integrated graphics devicesh]h2Create a rule matching integrated graphics devices}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjVubah}(h]h ]h"]h$]h&]uh1jhjhhKhjRubh)}(h**Description**h]j)}(hjqh]h Description}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubeh}(h]h ]h"]h$]h&]uh1jhjhhKhhhhubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h!XE_RTP_RULE_IS_DISCRETE (C macro)c.XE_RTP_RULE_IS_DISCRETEhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_IS_DISCRETEh]j )}(hXE_RTP_RULE_IS_DISCRETEh]j2)}(hXE_RTP_RULE_IS_DISCRETEh]j8)}(hjh]hXE_RTP_RULE_IS_DISCRETE}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhKubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhKhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h``XE_RTP_RULE_IS_DISCRETE``h]j)}(hjh]hXE_RTP_RULE_IS_DISCRETE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hq Create a rule matching discrete graphics devices **Description** Refer to XE_RTP_RULES() for expected usage. h](j)}(h1Create a rule matching discrete graphics devices h]h)}(h0Create a rule matching discrete graphics devicesh]h0Create a rule matching discrete graphics devices}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhjubh)}(h**Description**h]j)}(hj h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhhhhubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_RULE_OR (C macro)c.XE_RTP_RULE_ORhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_RULE_ORh]j )}(hXE_RTP_RULE_ORh]j2)}(hXE_RTP_RULE_ORh]j8)}(hj^ h]hXE_RTP_RULE_OR}(hjhhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjdubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj`hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj\hhhj{hKubah}(h]jWah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj{hKhjYhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjYhhhj{hKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h``XE_RTP_RULE_OR``h]j)}(hjh]hXE_RTP_RULE_OR}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hX Create an OR condition for rtp rules **Description** RTP rules are AND'ed when evaluated and all of them need to match. XE_RTP_RULE_OR allows to create set of rules where any of them matching is sufficient for the action to trigger. Example: .. code-block:: c const struct xe_rtp_entry_sr entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(PLATFORM(DG2), OR, PLATFORM(TIGERLAKE)), ... }, ... }; h](j)}(h%Create an OR condition for rtp rules h]h)}(h$Create an OR condition for rtp rulesh]h$Create an OR condition for rtp rules}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(hRTP rules are AND'ed when evaluated and all of them need to match. XE_RTP_RULE_OR allows to create set of rules where any of them matching is sufficient for the action to trigger. Example:h]hRTP rules are AND’ed when evaluated and all of them need to match. XE_RTP_RULE_OR allows to create set of rules where any of them matching is sufficient for the action to trigger. Example:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hconst struct xe_rtp_entry_sr entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(PLATFORM(DG2), OR, PLATFORM(TIGERLAKE)), ... }, ... };h]hconst struct xe_rtp_entry_sr entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(PLATFORM(DG2), OR, PLATFORM(TIGERLAKE)), ... }, ... };}hjsbah}(h]h ]h"]h$]h&]hhforcelanguagejhighlight_args}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhhhhubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_ACTION_WR (C macro)c.XE_RTP_ACTION_WRhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTION_WRh]j )}(hXE_RTP_ACTION_WRh]j2)}(hXE_RTP_ACTION_WRh]j8)}(hj h]hXE_RTP_ACTION_WR}(hj*hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj&ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj"hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhj=hKubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj=hKhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhj=hKubeh}(h]h ](jmacroeh"]h$]h&]jjjjVjjVjjjuh1hhhhhhNhNubh)}(h&``XE_RTP_ACTION_WR (reg_, val_, ...)``h]j)}(hj\h]h"XE_RTP_ACTION_WR (reg_, val_, ...)}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hAHelper to write a value to the register, overriding all the bits h]h)}(h@Helper to write a value to the register, overriding all the bitsh]h@Helper to write a value to the register, overriding all the bits}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjrubah}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(h**Parameters** ``reg_`` Register ``val_`` Value to set ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** The correspondent notation in bspec is: REGNAME = VALUEh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjh]hreg_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h``val_`` Value to set h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(h Value to seth]h Value to set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hj"h]h...}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hKhj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj7hKhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj]h]h Description}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h'The correspondent notation in bspec is:h]h'The correspondent notation in bspec is:}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hREGNAME = VALUEh]h)}(hjh]hREGNAME = VALUE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_ACTION_SET (C macro)c.XE_RTP_ACTION_SEThNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTION_SETh]j )}(hXE_RTP_ACTION_SETh]j2)}(hXE_RTP_ACTION_SETh]j8)}(hjh]hXE_RTP_ACTION_SET}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhMubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhMhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h'``XE_RTP_ACTION_SET (reg_, val_, ...)``h]j)}(hjh]h#XE_RTP_ACTION_SET (reg_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h(Set bits from **val_** in the register. h]h)}(h'Set bits from **val_** in the register.h](hSet bits from }(hj hhhNhNubj)}(h**val_**h]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh in the register.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhj*hKhhhhubj)}(hX**Parameters** ``reg_`` Register ``val_`` Bits to set in the register ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** For masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any): REGNAME[2] = 1 REGNAME[5] = 1h](h)}(h**Parameters**h]j)}(hj7h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj1ubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjVh]hreg_}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjTubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjPubj)}(hhh]h)}(hRegisterh]hRegister}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhKhjlubah}(h]h ]h"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]uh1jhjkhKhjMubj)}(h%``val_`` Bits to set in the register h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hBits to set in the registerh]hBits to set in the register}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjMubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjh]h...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjMubeh}(h]h ]h"]h$]h&]uh1jhj1ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj1ubh)}(hFor masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):h]hFor masked registers this translates to a single write, while for other registers it’s a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj1ubj)}(hREGNAME[2] = 1 REGNAME[5] = 1h]h)}(hREGNAME[2] = 1 REGNAME[5] = 1h]hREGNAME[2] = 1 REGNAME[5] = 1}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj(ubah}(h]h ]h"]h$]h&]uh1jhj:hMhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_ACTION_CLR (C macro)c.XE_RTP_ACTION_CLRhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTION_CLRh]j )}(hXE_RTP_ACTION_CLRh]j2)}(hXE_RTP_ACTION_CLRh]j8)}(hj[h]hXE_RTP_ACTION_CLR}(hjehhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjaubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj]hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjYhhhjxhMubah}(h]jTah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjxhMhjVhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjVhhhjxhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h'``XE_RTP_ACTION_CLR (reg_, val_, ...)``h]j)}(hjh]h#XE_RTP_ACTION_CLR (reg_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h*Clear bits from **val_** in the register. h]h)}(h)Clear bits from **val_** in the register.h](hClear bits from }(hjhhhNhNubj)}(h**val_**h]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh in the register.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjubah}(h]h ]h"]h$]h&]uh1jhjhM hhhhubj)}(hX**Parameters** ``reg_`` Register ``val_`` Bits to clear in the register ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** For masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any): REGNAME[2] = 0 REGNAME[5] = 0h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjh]hreg_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjubj)}(h'``val_`` Bits to clear in the register h](j)}(h``val_``h]j)}(hj6h]hval_}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hj0ubj)}(hhh]h)}(hBits to clear in the registerh]hBits to clear in the register}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhM hjLubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jhjKhM hjubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjoh]h...}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjiubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jhjhM hjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubh)}(hFor masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):h]hFor masked registers this translates to a single write, while for other registers it’s a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hREGNAME[2] = 0 REGNAME[5] = 0h]h)}(hREGNAME[2] = 0 REGNAME[5] = 0h]hREGNAME[2] = 0 REGNAME[5] = 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h!XE_RTP_ACTION_FIELD_SET (C macro)c.XE_RTP_ACTION_FIELD_SEThNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTION_FIELD_SETh]j )}(hXE_RTP_ACTION_FIELD_SETh]j2)}(hXE_RTP_ACTION_FIELD_SETh]j8)}(hjh]hXE_RTP_ACTION_FIELD_SET}(hj hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM'ubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhM'ubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhM'hjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhM'ubeh}(h]h ](jmacroeh"]h$]h&]jjjj8jj8jjjuh1hhhhhhNhNubh)}(h9``XE_RTP_ACTION_FIELD_SET (reg_, mask_bits_, val_, ...)``h]j)}(hj>h]h5XE_RTP_ACTION_FIELD_SET (reg_, mask_bits_, val_, ...)}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM)hhhhubj)}(hSet a bit range h]h)}(hSet a bit rangeh]hSet a bit range}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjTubah}(h]h ]h"]h$]h&]uh1jhjfhMhhhhubj)}(hX**Parameters** ``reg_`` Register ``mask_bits_`` Mask of bits to be changed in the register, forming a field ``val_`` Value to set in the field denoted by **mask_bits_** ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** For masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is: REGNAME[:] = VALUEh](h)}(h**Parameters**h]j)}(hjsh]h Parameters}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjmubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjh]hreg_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(hK``mask_bits_`` Mask of bits to be changed in the register, forming a field h](j)}(h``mask_bits_``h]j)}(hjh]h mask_bits_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh]h)}(h;Mask of bits to be changed in the register, forming a fieldh]h;Mask of bits to be changed in the register, forming a field}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h=``val_`` Value to set in the field denoted by **mask_bits_** h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh]h)}(h3Value to set in the field denoted by **mask_bits_**h](h%Value to set in the field denoted by }(hjhhhNhNubj)}(h**mask_bits_**h]h mask_bits_}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjKh]h...}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjEubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM hjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jhj`hM hjubeh}(h]h ]h"]h$]h&]uh1jhjmubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM"hjmubh)}(hFor masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is:h]hFor masked registers this translates to a single write, while for other registers it’s a RMW. The correspondent bspec notation is:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM"hjmubj)}(hREGNAME[:] = VALUEh]h)}(hjh]hREGNAME[:] = VALUE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM%hjubah}(h]h ]h"]h$]h&]uh1jhjhM%hjmubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h!XE_RTP_ACTION_WHITELIST (C macro)c.XE_RTP_ACTION_WHITELISThNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTION_WHITELISTh]j )}(hXE_RTP_ACTION_WHITELISTh]j2)}(hXE_RTP_ACTION_WHITELISTh]j8)}(hjh]hXE_RTP_ACTION_WHITELIST}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM:ubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhM:ubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhM:hjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhM:ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h-``XE_RTP_ACTION_WHITELIST (reg_, val_, ...)``h]j)}(hjh]h)XE_RTP_ACTION_WHITELIST (reg_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM<hhhhubj)}(h$Add register to userspace whitelist h]h)}(h#Add register to userspace whitelisth]h#Add register to userspace whitelist}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM2hj/ubah}(h]h ]h"]h$]h&]uh1jhjAhM2hhhhubj)}(hX**Parameters** ``reg_`` Register ``val_`` Whitelist-specific flags to set ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** Add a register to the whitelist, allowing userspace to modify the ster with regular user privileges.h](h)}(h**Parameters**h]j)}(hjNh]h Parameters}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM6hjHubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjmh]hreg_}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jhjkubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM3hjgubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM3hjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jhjhM3hjdubj)}(h)``val_`` Whitelist-specific flags to set h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM4hjubj)}(hhh]h)}(hWhitelist-specific flags to seth]hWhitelist-specific flags to set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM4hjdubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjh]h...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM5hjubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM5hjdubeh}(h]h ]h"]h$]h&]uh1jhjHubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM7hjHubh)}(hdAdd a register to the whitelist, allowing userspace to modify the ster with regular user privileges.h]hdAdd a register to the whitelist, allowing userspace to modify the ster with regular user privileges.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: 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]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMBhjubah}(h]h ]h"]h$]h&]uh1jhjhMBhhhhubj)}(h**Parameters** ``s_`` Name describing this rule, often a HW-specific number **Description** TODO: maybe move this behind a debug config?h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMFhjubj)}(hhh]j)}(h=``s_`` Name describing this rule, often a HW-specific number h](j)}(h``s_``h]j)}(hjh]hs_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMChjubj)}(hhh]h)}(h5Name describing this rule, often a HW-specific numberh]h5Name describing this rule, often a HW-specific number}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMChjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMEhjubh)}(h,TODO: maybe move this behind a debug config?h]h,TODO: maybe move this behind a debug config?}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMEhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_ENTRY_FLAG (C macro)c.XE_RTP_ENTRY_FLAGhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ENTRY_FLAGh]j )}(hXE_RTP_ENTRY_FLAGh]j2)}(hXE_RTP_ENTRY_FLAGh]j8)}(hjch]hXE_RTP_ENTRY_FLAG}(hjmhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjiubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjehhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM\ubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjahhhjhM\ubah}(h]j\ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhM\hj^hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchj^hhhjhM\ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h``XE_RTP_ENTRY_FLAG (...)``h]j)}(hjh]hXE_RTP_ENTRY_FLAG (...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM^hhhhubj)}(h9Helper to add multiple flags to a struct xe_rtp_entry_sr h]h)}(h8Helper to add multiple flags to a struct xe_rtp_entry_srh]h8Helper to add multiple flags to a struct xe_rtp_entry_sr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMJhjubah}(h]h ]h"]h$]h&]uh1jhjhMJhhhhubj)}(hX**Parameters** ``...`` Entry flags, without the ``XE_RTP_ENTRY_FLAG_`` prefix **Description** Helper to automatically add a ``XE_RTP_ENTRY_FLAG_`` prefix to the flags when defining struct xe_rtp_entry entries. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ... }, ... };h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMNhjubj)}(hhh]j)}(h?``...`` Entry flags, without the ``XE_RTP_ENTRY_FLAG_`` prefix h](j)}(h``...``h]j)}(hjh]h...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMKhjubj)}(hhh]h)}(h6Entry flags, without the ``XE_RTP_ENTRY_FLAG_`` prefixh](hEntry flags, without the }(hj hhhNhNubj)}(h``XE_RTP_ENTRY_FLAG_``h]hXE_RTP_ENTRY_FLAG_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh prefix}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMKhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj@h]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMMhjubh)}(h|Helper to automatically add a ``XE_RTP_ENTRY_FLAG_`` prefix to the flags when defining struct xe_rtp_entry entries. Example:h](hHelper to automatically add a }(hjVhhhNhNubj)}(h``XE_RTP_ENTRY_FLAG_``h]hXE_RTP_ENTRY_FLAG_}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjVubhH prefix to the flags when defining struct xe_rtp_entry entries. Example:}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMMhjubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ... }, ... };}hjwsbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMPhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_ACTION_FLAG (C macro)c.XE_RTP_ACTION_FLAGhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTION_FLAGh]j )}(hXE_RTP_ACTION_FLAGh]j2)}(hXE_RTP_ACTION_FLAGh]j8)}(hjh]hXE_RTP_ACTION_FLAG}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMrubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhMrubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhMrhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhMrubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1hhhhhhNhNubh)}(h``XE_RTP_ACTION_FLAG (...)``h]j)}(hjh]hXE_RTP_ACTION_FLAG (...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMthhhhubj)}(h7Helper to add multiple flags to a struct xe_rtp_action h]h)}(h6Helper to add multiple flags to a struct xe_rtp_actionh]h6Helper to add multiple flags to a struct xe_rtp_action}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM`hjubah}(h]h ]h"]h$]h&]uh1jhjhM`hhhhubj)}(hX**Parameters** ``...`` Action flags, without the ``XE_RTP_ACTION_FLAG_`` prefix **Description** Helper to automatically add a ``XE_RTP_ACTION_FLAG_`` prefix to the flags when defining struct xe_rtp_action entries. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ACTION_SET(..., XE_RTP_ACTION_FLAG(FOREACH_ENGINE)), ... }, ... };h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMdhj ubj)}(hhh]j)}(hA``...`` Action flags, without the ``XE_RTP_ACTION_FLAG_`` prefix h](j)}(h``...``h]j)}(hj1h]h...}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMahj+ubj)}(hhh]h)}(h8Action flags, without the ``XE_RTP_ACTION_FLAG_`` prefixh](hAction flags, without the }(hjJhhhNhNubj)}(h``XE_RTP_ACTION_FLAG_``h]hXE_RTP_ACTION_FLAG_}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjJubh prefix}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhMahjGubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhjFhMahj(ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMchj ubh)}(h~Helper to automatically add a ``XE_RTP_ACTION_FLAG_`` prefix to the flags when defining struct xe_rtp_action entries. Example:h](hHelper to automatically add a }(hjhhhNhNubj)}(h``XE_RTP_ACTION_FLAG_``h]hXE_RTP_ACTION_FLAG_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhI prefix to the flags when defining struct xe_rtp_action entries. Example:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMchj ubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ACTION_SET(..., XE_RTP_ACTION_FLAG(FOREACH_ENGINE)), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ACTION_SET(..., XE_RTP_ACTION_FLAG(FOREACH_ENGINE)), ... }, ... };}hjsbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMfhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_RULES (C macro)c.XE_RTP_RULEShNtauh1hhhhhhNhNubh)}(hhh](j)}(h XE_RTP_RULESh]j )}(h XE_RTP_RULESh]j2)}(h XE_RTP_RULESh]j8)}(hjh]h XE_RTP_RULES}(hjhhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhjhhhjhMubah}(h]jah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhjhMhjhhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchjhhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1hhhhhhNhNubh)}(h``XE_RTP_RULES (...)``h]j)}(hj h]hXE_RTP_RULES (...)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h?Helper to set multiple rules to a struct xe_rtp_entry_sr entry h]h)}(h>Helper to set multiple rules to a struct xe_rtp_entry_sr entryh]h>Helper to set multiple rules to a struct xe_rtp_entry_sr entry}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMvhj1 ubah}(h]h ]h"]h$]h&]uh1jhjC hMvhhhhubj)}(hX**Parameters** ``...`` Rules **Description** At least one rule is needed and up to 12 are supported. Multiple rules are AND'ed together, i.e. all the rules must evaluate to true for the entry to be processed. See XE_RTP_MATCH_* for the possible match rules. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)), ... }, ... };h](h)}(h**Parameters**h]j)}(hjP h]h Parameters}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjN ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMzhjJ ubj)}(hhh]j)}(h``...`` Rules h](j)}(h``...``h]j)}(hjo h]h...}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjm ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMwhji ubj)}(hhh]h)}(hRulesh]hRules}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMwhj ubah}(h]h ]h"]h$]h&]uh1jhji ubeh}(h]h ]h"]h$]h&]uh1jhj hMwhjf ubah}(h]h ]h"]h$]h&]uh1jhjJ ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMyhjJ ubh)}(hAt least one rule is needed and up to 12 are supported. Multiple rules are AND'ed together, i.e. all the rules must evaluate to true for the entry to be processed. See XE_RTP_MATCH_* for the possible match rules. Example:h]hAt least one rule is needed and up to 12 are supported. Multiple rules are AND’ed together, i.e. all the rules must evaluate to true for the entry to be processed. See XE_RTP_MATCH_* for the possible match rules. Example:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMyhjJ ubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)), ... }, ... };}hj sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM}hjJ ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hXE_RTP_ACTIONS (C macro)c.XE_RTP_ACTIONShNtauh1hhhhhhNhNubh)}(hhh](j)}(hXE_RTP_ACTIONSh]j )}(hXE_RTP_ACTIONSh]j2)}(hXE_RTP_ACTIONSh]j8)}(hj h]hXE_RTP_ACTIONS}(hj!hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj hhhj!hMubah}(h]j ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj!hMhj hhubjd)}(hhh]h}(h]h ]h"]h$]h&]uh1jchj hhhj!hMubeh}(h]h ](jmacroeh"]h$]h&]jjjj/!jj/!jjjuh1hhhhhhNhNubh)}(h``XE_RTP_ACTIONS (...)``h]j)}(hj5!h]hXE_RTP_ACTIONS (...)}(hj7!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h;Helper to set multiple actions to a struct xe_rtp_entry_sr h]h)}(h:Helper to set multiple actions to a struct xe_rtp_entry_srh]h:Helper to set multiple actions to a struct xe_rtp_entry_sr}(hjO!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjK!ubah}(h]h ]h"]h$]h&]uh1jhj]!hMhhhhubj)}(hX**Parameters** ``...`` Actions to be taken **Description** At least one action is needed and up to 12 are supported. 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Bits are never cleared: entries with matching rules set the corresponding bit in the bitmap.h](h)}(h**Parameters**h]j)}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj&ubj)}(hhh](j)}(hH``struct xe_rtp_process_ctx *ctx`` The context for processing the table h](j)}(h"``struct xe_rtp_process_ctx *ctx``h]j)}(hj4&h]hstruct xe_rtp_process_ctx *ctx}(hj6&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2&ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj.&ubj)}(hhh]h)}(h$The context for processing the tableh]h$The context for processing the table}(hjM&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI&hKhjJ&ubah}(h]h ]h"]h$]h&]uh1jhj.&ubeh}(h]h ]h"]h$]h&]uh1jhjI&hKhj+&ubj)}(hE``unsigned long *active_entries`` bitmap to store the active entries h](j)}(h!``unsigned long *active_entries``h]j)}(hjm&h]hunsigned long *active_entries}(hjo&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjk&ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhjg&ubj)}(hhh]h)}(h"bitmap to store the active entriesh]h"bitmap to store the active entriesE\}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhj&ubah}(h]h ]h"]h$]h&]uh1jhjg&ubeh}(h]h ]h"]h$]h&]uh1jhj&hKhj+&ubj)}(h7``size_t n_entries`` number of entries to be processed h](j)}(h``size_t n_entries``h]j)}(hj&h]hsize_t n_entries}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj&ubj)}(hhh]h)}(h!number of entries to be processedh]h!number of entries to be processed}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jhj&hKhj+&ubeh}(h]h ]h"]h$]h&]uh1jhj&ubh)}(h**Description**h]j)}(hj&h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj&ubh)}(hSet additional metadata to track what entries are considered "active", i.e. their rules match the condition. Bits are never cleared: entries with matching rules set the corresponding bit in the bitmap.h]hSet additional metadata to track what entries are considered “active”, i.e. their rules match the condition. Bits are never cleared: entries with matching rules set the corresponding bit in the bitmap.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](h!xe_rtp_process_to_sr (C function)c.xe_rtp_process_to_srhNtauh1hhhhhhNhNubh)}(hhh](j)}(hvoid xe_rtp_process_to_sr (struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry_sr *entries, size_t n_entries, struct xe_reg_sr *sr)h]j )}(hvoid xe_rtp_process_to_sr(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry_sr *entries, size_t n_entries, struct xe_reg_sr *sr)h](j")}(hvoidh]hvoid}(hj&'hhhNhNubah}(h]h ]j&"ah"]h$]h&]uh1j"hj"'hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKubj!)}(h h]h }(hj5'hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj"'hhhj4'hKubj2)}(hxe_rtp_process_to_srh]j8)}(hxe_rtp_process_to_srh]hxe_rtp_process_to_sr}(hjG'hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hjC'ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj"'hhhj4'hKubjR")}(ho(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry_sr *entries, size_t n_entries, struct xe_reg_sr *sr)h](jX")}(hstruct xe_rtp_process_ctx *ctxh](j)}(hjh]hstruct}(hjc'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_'ubj!)}(h h]h }(hjp'hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj_'ubh)}(hhh]j8)}(hxe_rtp_process_ctxh]hxe_rtp_process_ctx}(hj'hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj~'ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj'modnameN classnameNj"j")}j"]j")}j"jI'sbc.xe_rtp_process_to_srasbuh1hhj_'ubj!)}(h h]h }(hj'hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj_'ubj")}(hj"h]h*}(hj'hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1j"hj_'ubj8)}(hctxh]hctx}(hj'hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj_'ubeh}(h]h ]h"]h$]h&]noemphhhuh1jW"hj['ubjX")}(h%const struct xe_rtp_entry_sr *entriesh](j)}(hj_"h]hconst}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj!)}(h h]h }(hj'hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj'ubj)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj!)}(h h]h }(hj'hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj'ubh)}(hhh]j8)}(hxe_rtp_entry_srh]hxe_rtp_entry_sr}(hj(hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj (ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj(modnameN classnameNj"j")}j"]j'c.xe_rtp_process_to_srasbuh1hhj'ubj!)}(h h]h }(hj,(hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj'ubj")}(hj"h]h*}(hj:(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1j"hj'ubj8)}(hentriesh]hentries}(hjG(hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj'ubeh}(h]h ]h"]h$]h&]noemphhhuh1jW"hj['ubjX")}(hsize_t n_entriesh](h)}(hhh]j8)}(hsize_th]hsize_t}(hjc(hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj`(ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetje(modnameN classnameNj"j")}j"]j'c.xe_rtp_process_to_srasbuh1hhj\(ubj!)}(h h]h }(hj(hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj\(ubj8)}(h n_entriesh]h n_entries}(hj(hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj\(ubeh}(h]h ]h"]h$]h&]noemphhhuh1jW"hj['ubjX")}(hstruct xe_reg_sr *srh](j)}(hjh]hstruct}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj!)}(h h]h }(hj(hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj(ubh)}(hhh]j8)}(h xe_reg_srh]h xe_reg_sr}(hj(hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj(ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj(modnameN classnameNj"j")}j"]j'c.xe_rtp_process_to_srasbuh1hhj(ubj!)}(h h]h }(hj(hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj(ubj")}(hj"h]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1j"hj(ubj8)}(hsrh]hsr}(hj(hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj(ubeh}(h]h ]h"]h$]h&]noemphhhuh1jW"hj['ubeh}(h]h ]h"]h$]h&]hhuh1jQ"hj"'hhhj4'hKubeh}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj'hhhj4'hKubah}(h]j'ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj4'hKhj'hhubjd)}(hhh]h)}(hSProcess all rtp **entries**, adding the matching ones to the save-restore argument.h](hProcess all rtp }(hj))hhhNhNubj)}(h **entries**h]hentries}(hj1)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj))ubh8, adding the matching ones to the save-restore argument.}(hj))hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj&)hhubah}(h]h ]h"]h$]h&]uh1jchj'hhhj4'hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjS)jjS)jjjuh1hhhhhhNhNubj)}(hX**Parameters** ``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe ``const struct xe_rtp_entry_sr *entries`` Table with RTP definitions ``size_t n_entries`` Number of entries to process, usually ARRAY_SIZE(entries) ``struct xe_reg_sr *sr`` Save-restore struct where matching rules execute the action. This can be viewed as the "coalesced view" of multiple the tables. The bits for each register set are expected not to collide with previously added entries **Description** Walk the table pointed by **entries** (with an empty sentinel) and add all entries with matching rules to **sr**. If **hwe** is not NULL, its mmio_base is used to calculate the right register offseth](h)}(h**Parameters**h]j)}(hj])h]h Parameters}(hj_)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[)ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhjW)ubj)}(hhh](j)}(hg``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe h](j)}(h"``struct xe_rtp_process_ctx *ctx``h]j)}(hj|)h]hstruct xe_rtp_process_ctx *ctx}(hj~)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjz)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhjv)ubj)}(hhh]h)}(hCThe context for processing the table, with one of device, gt or hweh]hCThe context for processing the table, with one of device, gt or hwe}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hKhj)ubah}(h]h ]h"]h$]h&]uh1jhjv)ubeh}(h]h ]h"]h$]h&]uh1jhj)hKhjs)ubj)}(hE``const struct xe_rtp_entry_sr *entries`` Table with RTP definitions h](j)}(h)``const struct xe_rtp_entry_sr *entries``h]j)}(hj)h]h%const struct xe_rtp_entry_sr *entries}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj)ubj)}(hhh]h)}(hTable with RTP definitionsh]hTable with RTP definitions}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hKhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj)hKhjs)ubj)}(hO``size_t n_entries`` Number of entries to process, usually ARRAY_SIZE(entries) h](j)}(h``size_t n_entries``h]j)}(hj)h]hsize_t n_entries}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj)ubj)}(hhh]h)}(h9Number of entries to process, usually ARRAY_SIZE(entries)h]h9Number of entries to process, usually ARRAY_SIZE(entries)}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hKhj*ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj*hKhjs)ubj)}(h``struct xe_reg_sr *sr`` Save-restore struct where matching rules execute the action. This can be viewed as the "coalesced view" of multiple the tables. The bits for each register set are expected not to collide with previously added entries h](j)}(h``struct xe_reg_sr *sr``h]j)}(hj'*h]hstruct xe_reg_sr *sr}(hj)*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%*ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj!*ubj)}(hhh]h)}(hSave-restore struct where matching rules execute the action. This can be viewed as the "coalesced view" of multiple the tables. The bits for each register set are expected not to collide with previously added entriesh]hSave-restore struct where matching rules execute the action. This can be viewed as the “coalesced view” of multiple the tables. The bits for each register set are expected not to collide with previously added entries}(hj@*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj=*ubah}(h]h ]h"]h$]h&]uh1jhj!*ubeh}(h]h ]h"]h$]h&]uh1jhj<*hKhjs)ubeh}(h]h ]h"]h$]h&]uh1jhjW)ubh)}(h**Description**h]j)}(hjc*h]h Description}(hje*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhja*ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhjW)ubh)}(hWalk the table pointed by **entries** (with an empty sentinel) and add all entries with matching rules to **sr**. If **hwe** is not NULL, its mmio_base is used to calculate the right register offseth](hWalk the table pointed by }(hjy*hhhNhNubj)}(h **entries**h]hentries}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjy*ubhE (with an empty sentinel) and add all entries with matching rules to }(hjy*hhhNhNubj)}(h**sr**h]hsr}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjy*ubh. If }(hjy*hhhNhNubj)}(h**hwe**h]hhwe}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjy*ubhJ is not NULL, its mmio_base is used to calculate the right register offset}(hjy*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhjW)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](hxe_rtp_process (C function)c.xe_rtp_processhNtauh1hhhhhhNhNubh)}(hhh](j)}(hXvoid xe_rtp_process (struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry *entries)h]j )}(hWvoid xe_rtp_process(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry *entries)h](j")}(hvoidh]hvoid}(hj*hhhNhNubah}(h]h ]j&"ah"]h$]h&]uh1j"hj*hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chM)ubj!)}(h h]h }(hj*hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj*hhhj*hM)ubj2)}(hxe_rtp_processh]j8)}(hxe_rtp_processh]hxe_rtp_process}(hj*hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj*ubah}(h]h ](jJjKeh"]h$]h&]hhuh1j1hj*hhhj*hM)ubjR")}(hD(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry *entries)h](jX")}(hstruct xe_rtp_process_ctx *ctxh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj!)}(h h]h }(hj(+hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj+ubh)}(hhh]j8)}(hxe_rtp_process_ctxh]hxe_rtp_process_ctx}(hj9+hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj6+ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj;+modnameN classnameNj"j")}j"]j")}j"j+sbc.xe_rtp_processasbuh1hhj+ubj!)}(h h]h }(hjY+hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj+ubj")}(hj"h]h*}(hjg+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1j"hj+ubj8)}(hctxh]hctx}(hjt+hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj+ubeh}(h]h ]h"]h$]h&]noemphhhuh1jW"hj+ubjX")}(h"const struct xe_rtp_entry *entriesh](j)}(hj_"h]hconst}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj!)}(h h]h }(hj+hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj+ubj)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj!)}(h h]h }(hj+hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj+ubh)}(hhh]j8)}(h xe_rtp_entryh]h xe_rtp_entry}(hj+hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj+modnameN classnameNj"j")}j"]jU+c.xe_rtp_processasbuh1hhj+ubj!)}(h h]h }(hj+hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj+ubj")}(hj"h]h*}(hj+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1j"hj+ubj8)}(hentriesh]hentries}(hj+hhhNhNubah}(h]h ]jCah"]h$]h&]uh1j7hj+ubeh}(h]h ]h"]h$]h&]noemphhhuh1jW"hj+ubeh}(h]h ]h"]h$]h&]hhuh1jQ"hj*hhhj*hM)ubeh}(h]h ]h"]h$]h&]hhjUuh1jjVjWhj*hhhj*hM)ubah}(h]j*ah ](j[j\eh"]h$]h&]j`ja)jbhuh1jhj*hM)hj*hhubjd)}(hhh]h)}(h7Process all rtp **entries**, without running any actionh](hProcess all rtp }(hj),hhhNhNubj)}(h **entries**h]hentries}(hj1,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj),ubh, without running any action}(hj),hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj&,hhubah}(h]h ]h"]h$]h&]uh1jchj*hhhj*hM)ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjS,jjS,jjjuh1hhhhhhNhNubj)}(hX**Parameters** ``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe ``const struct xe_rtp_entry *entries`` Table with RTP definitions **Description** Walk the table pointed by **entries** (with an empty sentinel), executing the rules. One difference from xe_rtp_process_to_sr(): there is no action associated with each entry since this uses struct xe_rtp_entry. Its main use is for marking active workarounds via xe_rtp_process_ctx_enable_active_tracking().h](h)}(h**Parameters**h]j)}(hj],h]h Parameters}(hj_,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[,ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chM#hjW,ubj)}(hhh](j)}(hg``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe h](j)}(h"``struct xe_rtp_process_ctx *ctx``h]j)}(hj|,h]hstruct xe_rtp_process_ctx *ctx}(hj~,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjz,ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chM hjv,ubj)}(hhh]h)}(hCThe context for processing the table, with one of device, gt or hweh]hCThe context for processing the table, with one of device, gt or hwe}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM hj,ubah}(h]h ]h"]h$]h&]uh1jhjv,ubeh}(h]h ]h"]h$]h&]uh1jhj,hM hjs,ubj)}(hB``const struct xe_rtp_entry *entries`` Table with RTP definitions h](j)}(h&``const struct xe_rtp_entry *entries``h]j)}(hj,h]h"const struct xe_rtp_entry *entries}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chM!hj,ubj)}(hhh]h)}(hTable with RTP definitionsh]hTable with RTP definitions}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM!hj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hM!hjs,ubeh}(h]h ]h"]h$]h&]uh1jhjW,ubh)}(h**Description**h]j)}(hj,h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chM#hjW,ubh)}(hX3Walk the table pointed by **entries** (with an empty sentinel), executing the rules. One difference from xe_rtp_process_to_sr(): there is no action associated with each entry since this uses struct xe_rtp_entry. Its main use is for marking active workarounds via xe_rtp_process_ctx_enable_active_tracking().h](hWalk the table pointed by }(hj-hhhNhNubj)}(h **entries**h]hentries}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubhX (with an empty sentinel), executing the rules. One difference from xe_rtp_process_to_sr(): there is no action associated with each entry since this uses struct xe_rtp_entry. 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