sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget!/translations/zh_CN/gpu/xe/xe_rtpmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/zh_TW/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/it_IT/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ja_JP/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ko_KR/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/pt_BR/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/sp_SP/gpu/xe/xe_rtpmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh;/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp.rsthKubhsection)}(hhh](htitle)}(hRegister Table Processingh]hRegister Table Processing}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hXInternal infrastructure to define how registers should be updated based on rules and actions. This can be used to define tables with multiple entries (one per register) that will be walked over at some point in time to apply the values to the registers that have matching rules.h]hXInternal infrastructure to define how registers should be updated based on rules and actions. This can be used to define tables with multiple entries (one per register) that will be walked over at some point in time to apply the values to the registers that have matching rules.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:7: ./drivers/gpu/drm/xe/xe_rtp.chKhhhhubh)}(hhh](h)}(h Internal APIh]h Internal API}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singlexe_rtp_action (C struct)c.xe_rtp_actionhNtauh1hhhhhh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhNubhdesc)}(hhh](hdesc_signature)}(h xe_rtp_actionh]hdesc_signature_line)}(hstruct xe_rtp_actionh](hdesc_sig_keyword)}(hstructh]hstruct}(hj$hhhNhNubah}(h]h ]kah"]h$]h&]uh1j"hjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKubhdesc_sig_space)}(h h]h }(hj6hhhNhNubah}(h]h ]wah"]h$]h&]uh1j4hjhhhj3hKubh desc_name)}(h xe_rtp_actionh]h desc_sig_name)}(hjh]h xe_rtp_action}(hjMhhhNhNubah}(h]h ]nah"]h$]h&]uh1jKhjGubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jEhjhhhj3hKubeh}(h]h ]h"]h$]h&]hhƌ add_permalinkuh1jsphinx_line_type declaratorhjhhhj3hKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhj3hKhjhhubh desc_content)}(hhh]h)}(h$action to take for any matching ruleh]h$action to take for any matching rule}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhjyhhubah}(h]h ]h"]h$]h&]uh1jwhjhhhj3hKubeh}(h]h ](cstructeh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhhhjhNubh container)}(hXA**Definition**:: struct xe_rtp_action { struct xe_reg reg; u32 clr_bits; u32 set_bits; #define XE_RTP_NOCHECK .read_mask = 0; u32 read_mask; #define XE_RTP_ACTION_FLAG_ENGINE_BASE BIT(0); u8 flags; }; **Members** ``reg`` Register ``clr_bits`` bits to clear when updating register. It's always a superset of bits being modified ``set_bits`` bits to set when updating register ``read_mask`` mask for bits to consider when reading value back ``flags`` flags to apply on rule evaluation or actionh](h)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhjubh literal_block)}(hstruct xe_rtp_action { struct xe_reg reg; u32 clr_bits; u32 set_bits; #define XE_RTP_NOCHECK .read_mask = 0; u32 read_mask; #define XE_RTP_ACTION_FLAG_ENGINE_BASE BIT(0); u8 flags; };h]hstruct xe_rtp_action { struct xe_reg reg; u32 clr_bits; u32 set_bits; #define XE_RTP_NOCHECK .read_mask = 0; u32 read_mask; #define XE_RTP_ACTION_FLAG_ENGINE_BASE BIT(0); u8 flags; };}hjsbah}(h]h ]h"]h$]h&]hhuh1jh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhjubh)}(h **Members**h]j)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhK"hjubhdefinition_list)}(hhh](hdefinition_list_item)}(h``reg`` Register h](hterm)}(h``reg``h]hliteral)}(hjh]hreg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhjubh definition)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(ha``clr_bits`` bits to clear when updating register. It's always a superset of bits being modified h](j)}(h ``clr_bits``h]j)}(hj9h]hclr_bits}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhj3ubj)}(hhh]h)}(hSbits to clear when updating register. It's always a superset of bits being modifiedh]hUbits to clear when updating register. It’s always a superset of bits being modified}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhjOubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jhjNhKhjubj)}(h0``set_bits`` bits to set when updating register h](j)}(h ``set_bits``h]j)}(hjsh]hset_bits}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhK hjmubj)}(hhh]h)}(h"bits to set when updating registerh]h"bits to set when updating register}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK hjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jhjhK hjubj)}(h@``read_mask`` mask for bits to consider when reading value back h](j)}(h ``read_mask``h]j)}(hjh]h read_mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhK#hjubj)}(hhh]h)}(h1mask for bits to consider when reading value backh]h1mask for bits to consider when reading value back}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK#hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK#hjubj)}(h5``flags`` flags to apply on rule evaluation or actionh](j)}(h ``flags``h]j)}(hjh]hflags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhK%hjubj)}(hhh]h)}(h+flags to apply on rule evaluation or actionh]h+flags to apply on rule evaluation or action}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhK&hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK%hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhjhNubh)}(h**Description**h]j)}(hj(h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhK)hhhhubh)}(h{This struct records what action should be taken in a register that has a matching rule. Example of actions: set/clear bits.h]h{This struct records what action should be taken in a register that has a matching rule. Example of actions: set/clear bits.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:13: ./drivers/gpu/drm/xe/xe_rtp_types.hhKhhhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_RULE_PLATFORM (C macro)c.XE_RTP_RULE_PLATFORMhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_PLATFORMh]j)}(hXE_RTP_RULE_PLATFORMh]jF)}(hXE_RTP_RULE_PLATFORMh]jL)}(hj`h]hXE_RTP_RULE_PLATFORM}(hjjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjfubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjbhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK7ubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj^hhhj}hK7ubah}(h]jYah ](jojpeh"]h$]h&]jtju)jvhuh1jhj}hK7hj[hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj[hhhj}hK7ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h ``XE_RTP_RULE_PLATFORM (plat_)``h]j)}(hjh]hXE_RTP_RULE_PLATFORM (plat_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK9hhhhubh block_quote)}(hCreate rule matching platform h]h)}(hCreate rule matching platformh]hCreate rule matching platform}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK7hjubah}(h]h ]h"]h$]h&]uh1jhjhK7hhhhubj)}(hk**Parameters** ``plat_`` platform to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK;hjubj)}(hhh]j)}(h``plat_`` platform to match h](j)}(h ``plat_``h]j)}(hjh]hplat_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK8hjubj)}(hhh]h)}(hplatform to matchh]hplatform to match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK8hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK8hjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj-h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK:hjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK9hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j !XE_RTP_RULE_SUBPLATFORM (C macro)c.XE_RTP_RULE_SUBPLATFORMhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_SUBPLATFORMh]j)}(hXE_RTP_RULE_SUBPLATFORMh]jF)}(hXE_RTP_RULE_SUBPLATFORMh]jL)}(hjlh]hXE_RTP_RULE_SUBPLATFORM}(hjvhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjrubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjnhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK@ubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjjhhhjhK@ubah}(h]jeah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhK@hjghhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjghhhjhK@ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h)``XE_RTP_RULE_SUBPLATFORM (plat_, sub_)``h]j)}(hjh]h%XE_RTP_RULE_SUBPLATFORM (plat_, sub_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKBhhhhubj)}(h/Create rule matching platform and sub-platform h]h)}(h.Create rule matching platform and sub-platformh]h.Create rule matching platform and sub-platform}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK@hjubah}(h]h ]h"]h$]h&]uh1jhjhK@hhhhubj)}(h**Parameters** ``plat_`` platform to match ``sub_`` sub-platform to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKDhjubj)}(hhh](j)}(h``plat_`` platform to match h](j)}(h ``plat_``h]j)}(hjh]hplat_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKAhjubj)}(hhh]h)}(hplatform to matchh]hplatform to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKAhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKAhjubj)}(h``sub_`` sub-platform to match h](j)}(h``sub_``h]j)}(hj5h]hsub_}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKBhj/ubj)}(hhh]h)}(hsub-platform to matchh]hsub-platform to match}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKBhjKubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhjJhKBhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKDhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKChjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j #XE_RTP_RULE_PLATFORM_STEP (C macro)c.XE_RTP_RULE_PLATFORM_STEPhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_PLATFORM_STEPh]j)}(hXE_RTP_RULE_PLATFORM_STEPh]jF)}(hXE_RTP_RULE_PLATFORM_STEPh]jL)}(hjh]hXE_RTP_RULE_PLATFORM_STEP}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKJubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKJubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKJhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKJubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h,``XE_RTP_RULE_PLATFORM_STEP (start_, end_)``h]j)}(hjh]h(XE_RTP_RULE_PLATFORM_STEP (start_, end_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKLhhhhubj)}(h-Create rule matching platform-level stepping h]h)}(h,Create rule matching platform-level steppingh]h,Create rule matching platform-level stepping}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKJhjubah}(h]h ]h"]h$]h&]uh1jhjhKJhhhhubj)}(hX**Parameters** ``start_`` First stepping matching the rule ``end_`` First stepping that does not match the rule **Description** Note that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right. You need to make sure that proper support for reading platform-level stepping information is present for the target platform before using this rule. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKNhjubj)}(hhh](j)}(h,``start_`` First stepping matching the rule h](j)}(h ``start_``h]j)}(hj?h]hstart_}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKKhj9ubj)}(hhh]h)}(h First stepping matching the ruleh]h First stepping matching the rule}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKKhjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhjThKKhj6ubj)}(h5``end_`` First stepping that does not match the rule h](j)}(h``end_``h]j)}(hjxh]hend_}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKLhjrubj)}(hhh]h)}(h+First stepping that does not match the ruleh]h+First stepping that does not match the rule}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKLhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jhjhKLhj6ubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKNhjubh)}(hwNote that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right.h](h,Note that the range matching this rule is [ }(hjhhhNhNubj)}(h **start_**h]hstart_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh, }(hjhhhNhNubj)}(h**end_**h]hend_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh7 ), i.e. inclusive on the left, exclusive on the right.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKMhjubh)}(hYou need to make sure that proper support for reading platform-level stepping information is present for the target platform before using this rule.h]hYou need to make sure that proper support for reading platform-level stepping information is present for the target platform before using this rule.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKPhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKShjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j #XE_RTP_RULE_GRAPHICS_STEP (C macro)c.XE_RTP_RULE_GRAPHICS_STEPhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_GRAPHICS_STEPh]j)}(hXE_RTP_RULE_GRAPHICS_STEPh]jF)}(hXE_RTP_RULE_GRAPHICS_STEPh]jL)}(hj4h]hXE_RTP_RULE_GRAPHICS_STEP}(hj>hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj:ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj6hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKZubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj2hhhjQhKZubah}(h]j-ah ](jojpeh"]h$]h&]jtju)jvhuh1jhjQhKZhj/hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj/hhhjQhKZubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjjjuh1jhhhhhNhNubh)}(h,``XE_RTP_RULE_GRAPHICS_STEP (start_, end_)``h]j)}(hjph]h(XE_RTP_RULE_GRAPHICS_STEP (start_, end_)}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK\hhhhubj)}(h'Create rule matching graphics stepping h]h)}(h&Create rule matching graphics steppingh]h&Create rule matching graphics stepping}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKZhjubah}(h]h ]h"]h$]h&]uh1jhjhKZhhhhubj)}(hX,**Parameters** ``start_`` First stepping matching the rule ``end_`` First stepping that does not match the rule **Description** Note that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK^hjubj)}(hhh](j)}(h,``start_`` First stepping matching the rule h](j)}(h ``start_``h]j)}(hjh]hstart_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK[hjubj)}(hhh]h)}(h First stepping matching the ruleh]h First stepping matching the rule}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK[hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK[hjubj)}(h5``end_`` First stepping that does not match the rule h](j)}(h``end_``h]j)}(hjh]hend_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK\hjubj)}(hhh]h)}(h+First stepping that does not match the ruleh]h+First stepping that does not match the rule}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK\hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK\hjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj8h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK^hjubh)}(hwNote that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right.h](h,Note that the range matching this rule is [ }(hjNhhhNhNubj)}(h **start_**h]hstart_}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjNubh, }(hjNhhhNhNubj)}(h**end_**h]hend_}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjNubh7 ), i.e. inclusive on the left, exclusive on the right.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK]hjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK`hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j  XE_RTP_RULE_MEDIA_STEP (C macro)c.XE_RTP_RULE_MEDIA_STEPhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_MEDIA_STEPh]j)}(hXE_RTP_RULE_MEDIA_STEPh]jF)}(hXE_RTP_RULE_MEDIA_STEPh]jL)}(hjh]hXE_RTP_RULE_MEDIA_STEP}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKgubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKgubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKghjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKgubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h)``XE_RTP_RULE_MEDIA_STEP (start_, end_)``h]j)}(hjh]h%XE_RTP_RULE_MEDIA_STEP (start_, end_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKihhhhubj)}(h$Create rule matching media stepping h]h)}(h#Create rule matching media steppingh]h#Create rule matching media stepping}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKghjubah}(h]h ]h"]h$]h&]uh1jhj hKghhhhubj)}(hX,**Parameters** ``start_`` First stepping matching the rule ``end_`` First stepping that does not match the rule **Description** Note that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKkhj ubj)}(hhh](j)}(h,``start_`` First stepping matching the rule h](j)}(h ``start_``h]j)}(hj: h]hstart_}(hj< hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8 ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhj4 ubj)}(hhh]h)}(h First stepping matching the ruleh]h First stepping matching the rule}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjO hKhhjP ubah}(h]h ]h"]h$]h&]uh1jhj4 ubeh}(h]h ]h"]h$]h&]uh1jhjO hKhhj1 ubj)}(h5``end_`` First stepping that does not match the rule h](j)}(h``end_``h]j)}(hjs h]hend_}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjq ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKihjm ubj)}(hhh]h)}(h+First stepping that does not match the ruleh]h+First stepping that does not match the rule}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKihj ubah}(h]h ]h"]h$]h&]uh1jhjm ubeh}(h]h ]h"]h$]h&]uh1jhj hKihj1 ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKkhj ubh)}(hwNote that the range matching this rule is [ **start_**, **end_** ), i.e. inclusive on the left, exclusive on the right.h](h,Note that the range matching this rule is [ }(hj hhhNhNubj)}(h **start_**h]hstart_}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh, }(hj hhhNhNubj)}(h**end_**h]hend_}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh7 ), i.e. inclusive on the left, exclusive on the right.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKjhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKmhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j "XE_RTP_RULE_ENGINE_CLASS (C macro)c.XE_RTP_RULE_ENGINE_CLASShNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_ENGINE_CLASSh]j)}(hXE_RTP_RULE_ENGINE_CLASSh]jF)}(hXE_RTP_RULE_ENGINE_CLASSh]jL)}(hj h]hXE_RTP_RULE_ENGINE_CLASS}(hj* hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj& ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj" hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKtubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj hhhj= hKtubah}(h]j ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj= hKthj hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj hhhj= hKtubeh}(h]h ](jmacroeh"]h$]h&]jjjjV jjV jjjuh1jhhhhhNhNubh)}(h#``XE_RTP_RULE_ENGINE_CLASS (cls_)``h]j)}(hj\ h]hXE_RTP_RULE_ENGINE_CLASS (cls_)}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZ ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKvhhhhubj)}(h%Create rule matching an engine class h]h)}(h$Create rule matching an engine classh]h$Create rule matching an engine class}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKthjr ubah}(h]h ]h"]h$]h&]uh1jhj hKthhhhubj)}(hn**Parameters** ``cls_`` Engine class to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKxhj ubj)}(hhh]j)}(h``cls_`` Engine class to match h](j)}(h``cls_``h]j)}(hj h]hcls_}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKuhj ubj)}(hhh]h)}(hEngine class to matchh]hEngine class to match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKuhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKuhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKwhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKvhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_RULE_FUNC (C macro)c.XE_RTP_RULE_FUNChNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_FUNCh]j)}(hXE_RTP_RULE_FUNCh]jF)}(hXE_RTP_RULE_FUNCh]jL)}(hj* h]hXE_RTP_RULE_FUNC}(hj4 hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj0 ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj, hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK}ubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj( hhhjG hK}ubah}(h]j# ah ](jojpeh"]h$]h&]jtju)jvhuh1jhjG hK}hj% hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj% hhhjG hK}ubeh}(h]h ](jmacroeh"]h$]h&]jjjj` jj` jjjuh1jhhhhhNhNubh)}(h``XE_RTP_RULE_FUNC (func__)``h]j)}(hjf h]hXE_RTP_RULE_FUNC (func__)}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjd ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h.Create rule using callback function for match h]h)}(h-Create rule using callback function for matchh]h-Create rule using callback function for match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK}hj| ubah}(h]h ]h"]h$]h&]uh1jhj hK}hhhhubj)}(hX/**Parameters** ``func__`` Function to call to decide if rule matches **Description** This allows more complex checks to be performed. The ``XE_RTP`` infrastructure will simply call the function **func_** passed to decide if this rule matches the device. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]j)}(h6``func__`` Function to call to decide if rule matches h](j)}(h ``func__``h]j)}(hj h]hfunc__}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhK~hj ubj)}(hhh]h)}(h*Function to call to decide if rule matchesh]h*Function to call to decide if rule matches}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK~hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK~hj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(hThis allows more complex checks to be performed. The ``XE_RTP`` infrastructure will simply call the function **func_** passed to decide if this rule matches the device.h](h5This allows more complex checks to be performed. The }(hj hhhNhNubj)}(h ``XE_RTP``h]hXE_RTP}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh. infrastructure will simply call the function }(hj hhhNhNubj)}(h **func_**h]hfunc_}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh2 passed to decide if this rule matches the device.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j &XE_RTP_RULE_GRAPHICS_VERSION (C macro)c.XE_RTP_RULE_GRAPHICS_VERSIONhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_GRAPHICS_VERSIONh]j)}(hXE_RTP_RULE_GRAPHICS_VERSIONh]jF)}(hXE_RTP_RULE_GRAPHICS_VERSIONh]jL)}(hjg h]hXE_RTP_RULE_GRAPHICS_VERSION}(hjq hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjm ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhji hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhje hhhj hKubah}(h]j` ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj hKhjb hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjb hhhj hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubh)}(h(``XE_RTP_RULE_GRAPHICS_VERSION (ver__)``h]j)}(hj h]h$XE_RTP_RULE_GRAPHICS_VERSION (ver__)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h&Create rule matching graphics version h]h)}(h%Create rule matching graphics versionh]h%Create rule matching graphics version}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj hKhhhhubj)}(hv**Parameters** ``ver__`` Graphics IP version to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]j)}(h'``ver__`` Graphics IP version to match h](j)}(h ``ver__``h]j)}(hj h]hver__}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]h)}(hGraphics IP version to matchh]hGraphics IP version to match}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj2 h]h Description}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0 ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j ,XE_RTP_RULE_GRAPHICS_VERSION_RANGE (C macro)$c.XE_RTP_RULE_GRAPHICS_VERSION_RANGEhNtauh1hhhhhhNhNubj)}(hhh](j)}(h"XE_RTP_RULE_GRAPHICS_VERSION_RANGEh]j)}(h"XE_RTP_RULE_GRAPHICS_VERSION_RANGEh]jF)}(h"XE_RTP_RULE_GRAPHICS_VERSION_RANGEh]jL)}(hjq h]h"XE_RTP_RULE_GRAPHICS_VERSION_RANGE}(hj{ hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjw ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjs hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjo hhhj hKubah}(h]jj ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj hKhjl hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjl hhhj hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubh)}(h?``XE_RTP_RULE_GRAPHICS_VERSION_RANGE (ver_start__, ver_end__)``h]j)}(hj h]h;XE_RTP_RULE_GRAPHICS_VERSION_RANGE (ver_start__, ver_end__)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h1Create rule matching a range of graphics version h]h)}(h0Create rule matching a range of graphics versionh]h0Create rule matching a range of graphics version}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj hKhhhhubj)}(hX!**Parameters** ``ver_start__`` First graphics IP version to match ``ver_end__`` Last graphics IP version to match **Description** Note that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sides Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh](j)}(h3``ver_start__`` First graphics IP version to match h](j)}(h``ver_start__``h]j)}(hjh]h ver_start__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]h)}(h"First graphics IP version to matchh]h"First graphics IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h0``ver_end__`` Last graphics IP version to match h](j)}(h ``ver_end__``h]j)}(hj:h]h ver_end__}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj4ubj)}(hhh]h)}(h!Last graphics IP version to matchh]h!Last graphics IP version to match}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhjOhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(hjNote that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sidesh](h,Note that the range matching this rule is [ }(hjhhhNhNubj)}(h**ver_start__**h]h ver_start__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh, }(hjhhhNhNubj)}(h **ver_end__**h]h ver_end__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh ], i.e. inclusive on both sides}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j -XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT (C macro)%c.XE_RTP_RULE_GRAPHICS_VERSION_ANY_GThNtauh1hhhhhhNhNubj)}(hhh](j)}(h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GTh]j)}(h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GTh]jF)}(h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GTh]jL)}(hjh]h#XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h/``XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT (ver__)``h]j)}(hj#h]h+XE_RTP_RULE_GRAPHICS_VERSION_ANY_GT (ver__)}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h0Create rule matching graphics version on any GT h]h)}(h/Create rule matching graphics version on any GTh]h/Create rule matching graphics version on any GT}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj9ubah}(h]h ]h"]h$]h&]uh1jhjKhKhhhhubj)}(hXP**Parameters** ``ver__`` Graphics IP version to match **Description** Like XE_RTP_RULE_GRAPHICS_VERSION, but it matches even if the current GT being checked is not of the graphics type. It allows to add RTP entries to another GT when the device contains a Graphics IP with that version. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjXh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjVubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubj)}(hhh]j)}(h'``ver__`` Graphics IP version to match h](j)}(h ``ver__``h]j)}(hjwh]hver__}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjqubj)}(hhh]h)}(hGraphics IP version to matchh]hGraphics IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jhjhKhjnubah}(h]h ]h"]h$]h&]uh1jhjRubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubh)}(hLike XE_RTP_RULE_GRAPHICS_VERSION, but it matches even if the current GT being checked is not of the graphics type. It allows to add RTP entries to another GT when the device contains a Graphics IP with that version.h]hLike XE_RTP_RULE_GRAPHICS_VERSION, but it matches even if the current GT being checked is not of the graphics type. It allows to add RTP entries to another GT when the device contains a Graphics IP with that version.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j #XE_RTP_RULE_MEDIA_VERSION (C macro)c.XE_RTP_RULE_MEDIA_VERSIONhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_MEDIA_VERSIONh]j)}(hXE_RTP_RULE_MEDIA_VERSIONh]jF)}(hXE_RTP_RULE_MEDIA_VERSIONh]jL)}(hjh]hXE_RTP_RULE_MEDIA_VERSION}(hj hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjj6jj6jjjuh1jhhhhhNhNubh)}(h%``XE_RTP_RULE_MEDIA_VERSION (ver__)``h]j)}(hj<h]h!XE_RTP_RULE_MEDIA_VERSION (ver__)}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h#Create rule matching media version h]h)}(h"Create rule matching media versionh]h"Create rule matching media version}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjRubah}(h]h ]h"]h$]h&]uh1jhjdhKhhhhubj)}(hs**Parameters** ``ver__`` Media IP version to match **Description** Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjqh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjkubj)}(hhh]j)}(h$``ver__`` Media IP version to match h](j)}(h ``ver__``h]j)}(hjh]hver__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hMedia IP version to matchh]hMedia IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjkubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjkubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j )XE_RTP_RULE_MEDIA_VERSION_RANGE (C macro)!c.XE_RTP_RULE_MEDIA_VERSION_RANGEhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_MEDIA_VERSION_RANGEh]j)}(hXE_RTP_RULE_MEDIA_VERSION_RANGEh]jF)}(hXE_RTP_RULE_MEDIA_VERSION_RANGEh]jL)}(hj h]hXE_RTP_RULE_MEDIA_VERSION_RANGE}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhj'hKubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhj'hKhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhj'hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj@jj@jjjuh1jhhhhhNhNubh)}(h<``XE_RTP_RULE_MEDIA_VERSION_RANGE (ver_start__, ver_end__)``h]j)}(hjFh]h8XE_RTP_RULE_MEDIA_VERSION_RANGE (ver_start__, ver_end__)}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h.Create rule matching a range of media version h]h)}(h-Create rule matching a range of media versionh]h-Create rule matching a range of media version}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj\ubah}(h]h ]h"]h$]h&]uh1jhjnhKhhhhubj)}(hX**Parameters** ``ver_start__`` First media IP version to match ``ver_end__`` Last media IP version to match **Description** Note that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sides Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hj{h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjuubj)}(hhh](j)}(h0``ver_start__`` First media IP version to match h](j)}(h``ver_start__``h]j)}(hjh]h ver_start__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hFirst media IP version to matchh]hFirst media IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h-``ver_end__`` Last media IP version to match h](j)}(h ``ver_end__``h]j)}(hjh]h ver_end__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]h)}(hLast media IP version to matchh]hLast media IP version to match}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjuubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjuubh)}(hjNote that the range matching this rule is [ **ver_start__**, **ver_end__** ], i.e. inclusive on both sidesh](h,Note that the range matching this rule is [ }(hj$hhhNhNubj)}(h**ver_start__**h]h ver_start__}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubh, }(hj$hhhNhNubj)}(h **ver_end__**h]h ver_end__}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubh ], i.e. inclusive on both sides}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjuubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjuubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j *XE_RTP_RULE_MEDIA_VERSION_ANY_GT (C macro)"c.XE_RTP_RULE_MEDIA_VERSION_ANY_GThNtauh1hhhhhhNhNubj)}(hhh](j)}(h XE_RTP_RULE_MEDIA_VERSION_ANY_GTh]j)}(h XE_RTP_RULE_MEDIA_VERSION_ANY_GTh]jF)}(h XE_RTP_RULE_MEDIA_VERSION_ANY_GTh]jL)}(hjh]h XE_RTP_RULE_MEDIA_VERSION_ANY_GT}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj~hhhjhKubah}(h]jyah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKhj{hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj{hhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h,``XE_RTP_RULE_MEDIA_VERSION_ANY_GT (ver__)``h]j)}(hjh]h(XE_RTP_RULE_MEDIA_VERSION_ANY_GT (ver__)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(h-Create rule matching media version on any GT h]h)}(h,Create rule matching media version on any GTh]h,Create rule matching media version on any GT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(hXD**Parameters** ``ver__`` Media IP version to match **Description** Like XE_RTP_RULE_MEDIA_VERSION, but it matches even if the current GT being checked is not of the media type. It allows to add RTP entries to another GT when the device contains a Media IP with that version. Refer to XE_RTP_RULES() for expected usage.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubj)}(hhh]j)}(h$``ver__`` Media IP version to match h](j)}(h ``ver__``h]j)}(hjh]hver__}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubj)}(hhh]h)}(hMedia IP version to matchh]hMedia IP version to match}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hKhj&ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj%hKhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjKh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(hLike XE_RTP_RULE_MEDIA_VERSION, but it matches even if the current GT being checked is not of the media type. It allows to add RTP entries to another GT when the device contains a Media IP with that version."h]hLike XE_RTP_RULE_MEDIA_VERSION, but it matches even if the current GT being checked is not of the media type. It allows to add RTP entries to another GT when the device contains a Media IP with that version.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j #XE_RTP_RULE_IS_INTEGRATED (C macro)c.XE_RTP_RULE_IS_INTEGRATEDhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_IS_INTEGRATEDh]j)}(hXE_RTP_RULE_IS_INTEGRATEDh]jF)}(hXE_RTP_RULE_IS_INTEGRATEDh]jL)}(hjh]hXE_RTP_RULE_IS_INTEGRATED}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h``XE_RTP_RULE_IS_INTEGRATED``h]j)}(hjh]hXE_RTP_RULE_IS_INTEGRATED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hs Create a rule matching integrated graphics devices **Description** Refer to XE_RTP_RULES() for expected usage. h](j)}(h3Create a rule matching integrated graphics devices h]h)}(h2Create a rule matching integrated graphics devicesh]h2Create a rule matching integrated graphics devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhjubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j !XE_RTP_RULE_IS_DISCRETE (C macro)c.XE_RTP_RULE_IS_DISCRETEhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_IS_DISCRETEh]j)}(hXE_RTP_RULE_IS_DISCRETEh]jF)}(hXE_RTP_RULE_IS_DISCRETEh]jL)}(hjHh]hXE_RTP_RULE_IS_DISCRETE}(hjRhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjNubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjJhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjFhhhjehKubah}(h]jAah ](jojpeh"]h$]h&]jtju)jvhuh1jhjehKhjChhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjChhhjehKubeh}(h]h ](jmacroeh"]h$]h&]jjjj~jj~jjjuh1jhhhhhNhNubh)}(h``XE_RTP_RULE_IS_DISCRETE``h]j)}(hjh]hXE_RTP_RULE_IS_DISCRETE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hq Create a rule matching discrete graphics devices **Description** Refer to XE_RTP_RULES() for expected usage. h](j)}(h1Create a rule matching discrete graphics devices h]h)}(h0Create a rule matching discrete graphics devicesh]h0Create a rule matching discrete graphics devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubh)}(h+Refer to XE_RTP_RULES() for expected usage.h]h+Refer to XE_RTP_RULES() for expected usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_RULE_OR (C macro)c.XE_RTP_RULE_ORhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_RULE_ORh]j)}(hXE_RTP_RULE_ORh]jF)}(hXE_RTP_RULE_ORh]jL)}(hjh]hXE_RTP_RULE_OR}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjj-jj-jjjuh1jhhhhhNhNubh)}(h``XE_RTP_RULE_OR``h]j)}(hj3h]hXE_RTP_RULE_OR}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hX Create an OR condition for rtp rules **Description** RTP rules are AND'ed when evaluated and all of them need to match. XE_RTP_RULE_OR allows to create set of rules where any of them matching is sufficient for the action to trigger. Example: .. code-block:: c const struct xe_rtp_entry_sr entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(PLATFORM(DG2), OR, PLATFORM(TIGERLAKE)), ... }, ... }; h](j)}(h%Create an OR condition for rtp rules h]h)}(h$Create an OR condition for rtp rulesh]h$Create an OR condition for rtp rules}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjMubah}(h]h ]h"]h$]h&]uh1jhj_hKhjIubh)}(h**Description**h]j)}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjfubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjIubh)}(hRTP rules are AND'ed when evaluated and all of them need to match. XE_RTP_RULE_OR allows to create set of rules where any of them matching is sufficient for the action to trigger. Example:h]hRTP rules are AND’ed when evaluated and all of them need to match. XE_RTP_RULE_OR allows to create set of rules where any of them matching is sufficient for the action to trigger. Example:}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjIubj)}(hconst struct xe_rtp_entry_sr entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(PLATFORM(DG2), OR, PLATFORM(TIGERLAKE)), ... }, ... };h]hconst struct xe_rtp_entry_sr entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(PLATFORM(DG2), OR, PLATFORM(TIGERLAKE)), ... }, ... };}hjsbah}(h]h ]h"]h$]h&]hhƌforcelanguagejhighlight_args}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjIubeh}(h]h ]h"]h$]h&]uh1jhj_hKhhhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_ACTION_WR (C macro)c.XE_RTP_ACTION_WRhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTION_WRh]j)}(hXE_RTP_ACTION_WRh]jF)}(hXE_RTP_ACTION_WRh]jL)}(hjh]hXE_RTP_ACTION_WR}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhKubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhKhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h&``XE_RTP_ACTION_WR (reg_, val_, ...)``h]j)}(hjh]h"XE_RTP_ACTION_WR (reg_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhhhhubj)}(hAHelper to write a value to the register, overriding all the bits h]h)}(h@Helper to write a value to the register, overriding all the bitsh]h@Helper to write a value to the register, overriding all the bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhjhKhhhhubj)}(h**Parameters** ``reg_`` Register ``val_`` Value to set ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** The correspondent notation in bspec is: REGNAME = VALUEh](h)}(h**Parameters**h]j)}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj$ubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjIh]hreg_}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhjCubj)}(hhh]h)}(hRegisterh]hRegister}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jhj^hKhj@ubj)}(h``val_`` Value to set h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhKhj|ubj)}(hhh]h)}(h Value to seth]h Value to set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jhjhKhj@ubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjh]h...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhj@ubeh}(h]h ]h"]h$]h&]uh1jhj$ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj$ubh)}(h'The correspondent notation in bspec is:h]h'The correspondent notation in bspec is:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj$ubj)}(hREGNAME = VALUEh]h)}(hjh]hREGNAME = VALUE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubah}(h]h ]h"]h$]h&]uh1jhj,hMhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_ACTION_SET (C macro)c.XE_RTP_ACTION_SEThNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTION_SETh]j)}(hXE_RTP_ACTION_SETh]jF)}(hXE_RTP_ACTION_SETh]jL)}(hjMh]hXE_RTP_ACTION_SET}(hjWhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjSubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjOhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM ubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjKhhhjjhM ubah}(h]jFah ](jojpeh"]h$]h&]jtju)jvhuh1jhjjhM hjHhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjHhhhjjhM ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h'``XE_RTP_ACTION_SET (reg_, val_, ...)``h]j)}(hjh]h#XE_RTP_ACTION_SET (reg_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h(Set bits from **val_** in the register. h]h)}(h'Set bits from **val_** in the register.h](hSet bits from }(hjhhhNhNubj)}(h**val_**h]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh in the register.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjubah}(h]h ]h"]h$]h&]uh1jhjhM hhhhubj)}(hX**Parameters** ``reg_`` Register ``val_`` Bits to set in the register ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** For masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any): REGNAME[2] = 1 REGNAME[5] = 1h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjh]hreg_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjubj)}(h%``val_`` Bits to set in the register h](j)}(h``val_``h]j)}(hj(h]hval_}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubj)}(hhh]h)}(hBits to set in the registerh]hBits to set in the register}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jhj=hMhjubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjah]h...}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj[ubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjwubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jhjvhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubh)}(hFor masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):h]hFor masked registers this translates to a single write, while for other registers it’s a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hREGNAME[2] = 1 REGNAME[5] = 1h]h)}(hREGNAME[2] = 1 REGNAME[5] = 1h]hREGNAME[2] = 1 REGNAME[5] = 1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_ACTION_CLR (C macro)c.XE_RTP_ACTION_CLRhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTION_CLRh]j)}(hXE_RTP_ACTION_CLRh]jF)}(hXE_RTP_ACTION_CLRh]jL)}(hjh]hXE_RTP_ACTION_CLR}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhMubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhMhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjj*jj*jjjuh1jhhhhhNhNubh)}(h'``XE_RTP_ACTION_CLR (reg_, val_, ...)``h]j)}(hj0h]h#XE_RTP_ACTION_CLR (reg_, val_, ...)}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hhhhubj)}(h*Clear bits from **val_** in the register. h]h)}(h)Clear bits from **val_** in the register.h](hClear bits from }(hjJhhhNhNubj)}(h**val_**h]hval_}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjJubh in the register.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjFubah}(h]h ]h"]h$]h&]uh1jhjjhMhhhhubj)}(hX**Parameters** ``reg_`` Register ``val_`` Bits to clear in the register ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** For masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any): REGNAME[2] = 0 REGNAME[5] = 0h](h)}(h**Parameters**h]j)}(hjwh]h Parameters}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM"hjqubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjh]hreg_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h'``val_`` Bits to clear in the register h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hjubj)}(hhh]h)}(hBits to clear in the registerh]hBits to clear in the register}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjh]h...}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM!hjubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM!hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM!hjubeh}(h]h ]h"]h$]h&]uh1jhjqubh)}(h**Description**h]j)}(hjCh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM#hjqubh)}(hFor masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):h]hFor masked registers this translates to a single write, while for other registers it’s a RMW. The correspondent bspec notation is (example for bits 2 and 5, but could be any):}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM"hjqubj)}(hREGNAME[2] = 0 REGNAME[5] = 0h]h)}(hREGNAME[2] = 0 REGNAME[5] = 0h]hREGNAME[2] = 0 REGNAME[5] = 0}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM&hjhubah}(h]h ]h"]h$]h&]uh1jhjzhM&hjqubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j !XE_RTP_ACTION_FIELD_SET (C macro)c.XE_RTP_ACTION_FIELD_SEThNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTION_FIELD_SETh]j)}(hXE_RTP_ACTION_FIELD_SETh]jF)}(hXE_RTP_ACTION_FIELD_SETh]jL)}(hjh]hXE_RTP_ACTION_FIELD_SET}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM0ubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhM0ubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhM0hjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhM0ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h9``XE_RTP_ACTION_FIELD_SET (reg_, mask_bits_, val_, ...)``h]j)}(hjh]h5XE_RTP_ACTION_FIELD_SET (reg_, mask_bits_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM2hhhhubj)}(hSet a bit range h]h)}(hSet a bit rangeh]hSet a bit range}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM0hjubah}(h]h ]h"]h$]h&]uh1jhjhM0hhhhubj)}(hX**Parameters** ``reg_`` Register ``mask_bits_`` Mask of bits to be changed in the register, forming a field ``val_`` Value to set in the field denoted by **mask_bits_** ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** For masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is: REGNAME[:] = VALUEh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM4hjubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hj+h]hreg_}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM1hj%ubj)}(hhh]h)}(hRegisterh]hRegister}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM1hjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj@hM1hj"ubj)}(hK``mask_bits_`` Mask of bits to be changed in the register, forming a field h](j)}(h``mask_bits_``h]j)}(hjdh]h mask_bits_}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM2hj^ubj)}(hhh]h)}(h;Mask of bits to be changed in the register, forming a fieldh]h;Mask of bits to be changed in the register, forming a field}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhM2hjzubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jhjyhM2hj"ubj)}(h=``val_`` Value to set in the field denoted by **mask_bits_** h](j)}(h``val_``h]j)}(hjh]hval_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM3hjubj)}(hhh]h)}(h3Value to set in the field denoted by **mask_bits_**h](h%Value to set in the field denoted by }(hjhhhNhNubj)}(h**mask_bits_**h]h mask_bits_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1hhjhM3hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM3hj"ubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjh]h...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM4hjubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM4hj"ubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM6hjubh)}(hFor masked registers this translates to a single write, while for other registers it's a RMW. The correspondent bspec notation is:h]hFor masked registers this translates to a single write, while for other registers it’s a RMW. The correspondent bspec notation is:}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM5hjubj)}(hREGNAME[:] = VALUEh]h)}(hjFh]hREGNAME[:] = VALUE}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM8hjDubah}(h]h ]h"]h$]h&]uh1jhjUhM8hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j !XE_RTP_ACTION_WHITELIST (C macro)c.XE_RTP_ACTION_WHITELISThNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTION_WHITELISTh]j)}(hXE_RTP_ACTION_WHITELISTh]jF)}(hXE_RTP_ACTION_WHITELISTh]jL)}(hjvh]hXE_RTP_ACTION_WHITELIST}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj|ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjxhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMFubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjthhhjhMFubah}(h]joah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhMFhjqhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjqhhhjhMFubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubh)}(h-``XE_RTP_ACTION_WHITELIST (reg_, val_, ...)``h]j)}(hjh]h)XE_RTP_ACTION_WHITELIST (reg_, val_, ...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMHhhhhubj)}(h$Add register to userspace whitelist h]h)}(h#Add register to userspace whitelisth]h#Add register to userspace whitelist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMFhjubah}(h]h ]h"]h$]h&]uh1jhjhMFhhhhubj)}(hX**Parameters** ``reg_`` Register ``val_`` Whitelist-specific flags to set ``...`` Additional fields to override in the struct xe_rtp_action entry **Description** Add a register to the whitelist, allowing userspace to modify the ster with regular user privileges.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMJhjubj)}(hhh](j)}(h``reg_`` Register h](j)}(h``reg_``h]j)}(hjh]hreg_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMGhjubj)}(hhh]h)}(hRegisterh]hRegister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMGhjubj)}(h)``val_`` Whitelist-specific flags to set h](j)}(h``val_``h]j)}(hj?h]hval_}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMHhj9ubj)}(hhh]h)}(hWhitelist-specific flags to seth]hWhitelist-specific flags to set}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMHhjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhjThMHhjubj)}(hH``...`` Additional fields to override in the struct xe_rtp_action entry h](j)}(h``...``h]j)}(hjxh]h...}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMIhjrubj)}(hhh]h)}(h?Additional fields to override in the struct xe_rtp_action entryh]h?Additional fields to override in the struct xe_rtp_action entry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMIhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jhjhMIhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMKhjubh)}(hdAdd a register to the whitelist, allowing userspace to modify the ster with regular user privileges.h]hdAdd a register to the whitelist, allowing userspace to modify the ster with regular user privileges.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMJhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_NAME (C macro) c.XE_RTP_NAMEhNtauh1hhhhhhNhNubj)}(hhh](j)}(h XE_RTP_NAMEh]j)}(h XE_RTP_NAMEh]jF)}(h XE_RTP_NAMEh]jL)}(hjh]h XE_RTP_NAME}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMVubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhMVubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhMVhjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhMVubeh}(h]h ](jmacroeh"]h$]h&]jjjj(jj(jjjuh1jhhhhhNhNubh)}(h``XE_RTP_NAME (s_)``h]j)}(hj.h]hXE_RTP_NAME (s_)}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMXhhhhubj)}(h'Helper to set the name in xe_rtp_entry h]h)}(h&Helper to set the name in xe_rtp_entryh]h&Helper to set the name in xe_rtp_entry}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMVhjDubah}(h]h ]h"]h$]h&]uh1jhjVhMVhhhhubj)}(h**Parameters** ``s_`` Name describing this rule, often a HW-specific number **Description** TODO: maybe move this behind a debug config?h](h)}(h**Parameters**h]j)}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMZhj]ubj)}(hhh]j)}(h=``s_`` Name describing this rule, often a HW-specific number h](j)}(h``s_``h]j)}(hjh]hs_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMWhj|ubj)}(hhh]h)}(h5Name describing this rule, often a HW-specific numberh]h5Name describing this rule, often a HW-specific number}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMWhjubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jhjhMWhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMYhj]ubh)}(h,TODO: maybe move this behind a debug config?h]h,TODO: maybe move this behind a debug config?}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMXhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_ENTRY_FLAG (C macro)c.XE_RTP_ENTRY_FLAGhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ENTRY_FLAGh]j)}(hXE_RTP_ENTRY_FLAGh]jF)}(hXE_RTP_ENTRY_FLAGh]jL)}(hjh]hXE_RTP_ENTRY_FLAG}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM^ubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjhhhjhM^ubah}(h]jah ](jojpeh"]h$]h&]jtju)jvhuh1jhjhM^hjhhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjhhhjhM^ubeh}(h]h ](jmacroeh"]h$]h&]jjjj2jj2jjjuh1jhhhhhNhNubh)}(h``XE_RTP_ENTRY_FLAG (...)``h]j)}(hj8h]hXE_RTP_ENTRY_FLAG (...)}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM`hhhhubj)}(h9Helper to add multiple flags to a struct xe_rtp_entry_sr h]h)}(h8Helper to add multiple flags to a struct xe_rtp_entry_srh]h8Helper to add multiple flags to a struct xe_rtp_entry_sr}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM^hjNubah}(h]h ]h"]h$]h&]uh1jhj`hM^hhhhubj)}(hX**Parameters** ``...`` Entry flags, without the ``XE_RTP_ENTRY_FLAG_`` prefix **Description** Helper to automatically add a ``XE_RTP_ENTRY_FLAG_`` prefix to the flags when defining struct xe_rtp_entry entries. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ... }, ... };h](h)}(h**Parameters**h]j)}(hjmh]h Parameters}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jhjkubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMbhjgubj)}(hhh]j)}(h?``...`` Entry flags, without the ``XE_RTP_ENTRY_FLAG_`` prefix h](j)}(h``...``h]j)}(hjh]h...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM_hjubj)}(hhh]h)}(h6Entry flags, without the ``XE_RTP_ENTRY_FLAG_`` prefixh](hEntry flags, without the }(hjhhhNhNubj)}(h``XE_RTP_ENTRY_FLAG_``h]hXE_RTP_ENTRY_FLAG_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh prefix}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM_hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM_hjubah}(h]h ]h"]h$]h&]uh1jhjgubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMahjgubh)}(h|Helper to automatically add a ``XE_RTP_ENTRY_FLAG_`` prefix to the flags when defining struct xe_rtp_entry entries. Example:h](hHelper to automatically add a }(hjhhhNhNubj)}(h``XE_RTP_ENTRY_FLAG_``h]hXE_RTP_ENTRY_FLAG_}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhH prefix to the flags when defining struct xe_rtp_entry entries. Example:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM`hjgubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), ... }, ... };}hj sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMchjgubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_ACTION_FLAG (C macro)c.XE_RTP_ACTION_FLAGhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTION_FLAGh]j)}(hXE_RTP_ACTION_FLAGh]jF)}(hXE_RTP_ACTION_FLAGh]jL)}(hj: h]hXE_RTP_ACTION_FLAG}(hjD hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj@ ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj< hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMtubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj8 hhhjW hMtubah}(h]j3 ah ](jojpeh"]h$]h&]jtju)jvhuh1jhjW hMthj5 hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj5 hhhjW hMtubeh}(h]h ](jmacroeh"]h$]h&]jjjjp jjp jjjuh1jhhhhhNhNubh)}(h``XE_RTP_ACTION_FLAG (...)``h]j)}(hjv h]hXE_RTP_ACTION_FLAG (...)}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjt ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMvhhhhubj)}(h7Helper to add multiple flags to a struct xe_rtp_action h]h)}(h6Helper to add multiple flags to a struct xe_rtp_actionh]h6Helper to add multiple flags to a struct xe_rtp_action}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMthj ubah}(h]h ]h"]h$]h&]uh1jhj hMthhhhubj)}(hX**Parameters** ``...`` Action flags, without the ``XE_RTP_ACTION_FLAG_`` prefix **Description** Helper to automatically add a ``XE_RTP_ACTION_FLAG_`` prefix to the flags when defining struct xe_rtp_action entries. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ACTION_SET(..., XE_RTP_ACTION_FLAG(FOREACH_ENGINE)), ... }, ... };h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMxhj ubj)}(hhh]j)}(hA``...`` Action flags, without the ``XE_RTP_ACTION_FLAG_`` prefix h](j)}(h``...``h]j)}(hj h]h...}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMuhj ubj)}(hhh]h)}(h8Action flags, without the ``XE_RTP_ACTION_FLAG_`` prefixh](hAction flags, without the }(hj hhhNhNubj)}(h``XE_RTP_ACTION_FLAG_``h]hXE_RTP_ACTION_FLAG_}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh prefix}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMuhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMuhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMwhj ubh)}(h~Helper to automatically add a ``XE_RTP_ACTION_FLAG_`` prefix to the flags when defining struct xe_rtp_action entries. Example:h](hHelper to automatically add a }(hj-!hhhNhNubj)}(h``XE_RTP_ACTION_FLAG_``h]hXE_RTP_ACTION_FLAG_}(hj5!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-!ubhI prefix to the flags when defining struct xe_rtp_action entries. Example:}(hj-!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMvhj ubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ACTION_SET(..., XE_RTP_ACTION_FLAG(FOREACH_ENGINE)), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), ... XE_RTP_ACTION_SET(..., XE_RTP_ACTION_FLAG(FOREACH_ENGINE)), ... }, ... };}hjN!sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMyhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_RULES (C macro)c.XE_RTP_RULEShNtauh1hhhhhhNhNubj)}(hhh](j)}(h XE_RTP_RULESh]j)}(h XE_RTP_RULESh]jF)}(h XE_RTP_RULESh]jL)}(hjx!h]h XE_RTP_RULES}(hj!hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj~!ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhjz!hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhjv!hhhj!hMubah}(h]jq!ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj!hMhjs!hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhjs!hhhj!hMubeh}(h]h ](jmacroeh"]h$]h&]jjjj!jj!jjjuh1jhhhhhNhNubh)}(h``XE_RTP_RULES (...)``h]j)}(hj!h]hXE_RTP_RULES (...)}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h?Helper to set multiple rules to a struct xe_rtp_entry_sr entry h]h)}(h>Helper to set multiple rules to a struct xe_rtp_entry_sr entryh]h>Helper to set multiple rules to a struct xe_rtp_entry_sr entry}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj!ubah}(h]h ]h"]h$]h&]uh1jhj!hMhhhhubj)}(hX**Parameters** ``...`` Rules **Description** At least one rule is needed and up to 12 are supported. Multiple rules are AND'ed together, i.e. all the rules must evaluate to true for the entry to be processed. See XE_RTP_MATCH_* for the possible match rules. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)), ... }, ... };h](h)}(h**Parameters**h]j)}(hj!h]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj!ubj)}(hhh]j)}(h``...`` Rules h](j)}(h``...``h]j)}(hj"h]h...}(hj "hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubj)}(hhh]h)}(hRulesh]hRules}(hj!"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMhj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jhj"hMhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubh)}(h**Description**h]j)}(hjC"h]h Description}(hjE"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjA"ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj!ubh)}(hAt least one rule is needed and up to 12 are supported. Multiple rules are AND'ed together, i.e. all the rules must evaluate to true for the entry to be processed. See XE_RTP_MATCH_* for the possible match rules. Example:h]hAt least one rule is needed and up to 12 are supported. Multiple rules are AND’ed together, i.e. all the rules must evaluate to true for the entry to be processed. See XE_RTP_MATCH_* for the possible match rules. Example:}(hjY"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj!ubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(SUBPLATFORM(DG2, G10), GRAPHICS_STEP(A0, B0)), ... }, ... };}hjh"sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j XE_RTP_ACTIONS (C macro)c.XE_RTP_ACTIONShNtauh1hhhhhhNhNubj)}(hhh](j)}(hXE_RTP_ACTIONSh]j)}(hXE_RTP_ACTIONSh]jF)}(hXE_RTP_ACTIONSh]jL)}(hj"h]hXE_RTP_ACTIONS}(hj"hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj"ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj"hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubah}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj"hhhj"hMubah}(h]j"ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj"hMhj"hhubjx)}(hhh]h}(h]h ]h"]h$]h&]uh1jwhj"hhhj"hMubeh}(h]h ](jmacroeh"]h$]h&]jjjj"jj"jjjuh1jhhhhhNhNubh)}(h``XE_RTP_ACTIONS (...)``h]j)}(hj"h]hXE_RTP_ACTIONS (...)}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhhhhubj)}(h;Helper to set multiple actions to a struct xe_rtp_entry_sr h]h)}(h:Helper to set multiple actions to a struct xe_rtp_entry_srh]h:Helper to set multiple actions to a struct xe_rtp_entry_sr}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubah}(h]h ]h"]h$]h&]uh1jhj"hMhhhhubj)}(hX**Parameters** ``...`` Actions to be taken **Description** At least one action is needed and up to 12 are supported. See XE_RTP_ACTION_* for the possible actions. Example: .. code-block:: c const struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(...), XE_RTP_ACTIONS(SET(..), SET(...), CLR(...)), ... }, ... };h](h)}(h**Parameters**h]j)}(hj#h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubj)}(hhh]j)}(h``...`` Actions to be taken h](j)}(h``...``h]j)}(hj"#h]h...}(hj$#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj #ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj#ubj)}(hhh]h)}(hActions to be takenh]hActions to be taken}(hj;#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7#hMhj8#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jhj7#hMhj#ubah}(h]h ]h"]h$]h&]uh1jhj"ubh)}(h**Description**h]j)}(hj]#h]h Description}(hj_#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[#ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubh)}(hpAt least one action is needed and up to 12 are supported. See XE_RTP_ACTION_* for the possible actions. Example:h]hpAt least one action is needed and up to 12 are supported. See XE_RTP_ACTION_* for the possible actions. Example:}(hjs#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubj)}(hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(...), XE_RTP_ACTIONS(SET(..), SET(...), CLR(...)), ... }, ... };h]hconst struct xe_rtp_entry_sr wa_entries[] = { ... { XE_RTP_NAME("test-entry"), XE_RTP_RULES(...), XE_RTP_ACTIONS(SET(..), SET(...), CLR(...)), ... }, ... };}hj#sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j 'xe_rtp_match_even_instance (C function)c.xe_rtp_match_even_instancehNtauh1hhhhhhNhNubj)}(hhh](j)}(htbool xe_rtp_match_even_instance (const struct xe_device *xe, const struct xe_gt *gt, const struct xe_hw_engine *hwe)h]j)}(hsbool xe_rtp_match_even_instance(const struct xe_device *xe, const struct xe_gt *gt, const struct xe_hw_engine *hwe)h](hdesc_sig_keyword_type)}(hboolh]hbool}(hj#hhhNhNubah}(h]h ]ktah"]h$]h&]uh1j#hj#hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubj5)}(h h]h }(hj#hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj#hhhj#hMubjF)}(hxe_rtp_match_even_instanceh]jL)}(hxe_rtp_match_even_instanceh]hxe_rtp_match_even_instance}(hj#hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj#ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj#hhhj#hMubhdesc_parameterlist)}(hT(const struct xe_device *xe, const struct xe_gt *gt, const struct xe_hw_engine *hwe)h](hdesc_parameter)}(hconst struct xe_device *xeh](j#)}(hconsth]hconst}(hj#hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj#ubj5)}(h h]h }(hj$hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj#ubj#)}(hj&h]hstruct}(hj$hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj#ubj5)}(h h]h }(hj$hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj#ubh)}(hhh]jL)}(h xe_deviceh]h xe_device}(hj0$hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj-$ubah}(h]h ]h"]h$]h&] refdomainjreftype identifier reftargetj2$modnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]jK$ ASTIdentifier)}jF$j#sbc.xe_rtp_match_even_instanceasbuh1hhj#ubj5)}(h h]h }(hjX$hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj#ubhdesc_sig_punctuation)}(h*h]h*}(hjh$hhhNhNubah}(h]h ]pah"]h$]h&]uh1jf$hj#ubjL)}(hxeh]hxe}(hjw$hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj#ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj#ubj#)}(hconst struct xe_gt *gth](j#)}(hj#h]hconst}(hj$hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj$ubj5)}(h h]h }(hj$hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj$ubj#)}(hj&h]hstruct}(hj$hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj$ubj5)}(h h]h }(hj$hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj$ubh)}(hhh]jL)}(hxe_gth]hxe_gt}(hj$hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj$modnameN classnameNjJ$jM$)}jP$]jT$c.xe_rtp_match_even_instanceasbuh1hhj$ubj5)}(h h]h }(hj$hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj$ubjg$)}(hjj$h]h*}(hj$hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj$ubjL)}(hgth]hgt}(hj%hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj$ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj#ubj#)}(hconst struct xe_hw_engine *hweh](j#)}(hj#h]hconst}(hj%hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj%ubj5)}(h h]h }(hj(%hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj%ubj#)}(hj&h]hstruct}(hj6%hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj%ubj5)}(h h]h }(hjC%hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj%ubh)}(hhh]jL)}(h xe_hw_engineh]h xe_hw_engine}(hjT%hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjQ%ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetjV%modnameN classnameNjJ$jM$)}jP$]jT$c.xe_rtp_match_even_instanceasbuh1hhj%ubj5)}(h h]h }(hjr%hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj%ubjg$)}(hjj$h]h*}(hj%hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj%ubjL)}(hhweh]hhwe}(hj%hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj%ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj#ubeh}(h]h ]h"]h$]h&]hhuh1j#hj#hhhj#hMubeh}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj#hhhj#hMubah}(h]j#ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj#hMhj#hhubjx)}(hhh]h)}(h Match if engine instance is evenh]h Match if engine instance is even}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj%hhubah}(h]h ]h"]h$]h&]uh1jwhj#hhhj#hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj%jj%jjjuh1jhhhhhNhNubj)}(h**Parameters** ``const struct xe_device *xe`` Device structure ``const struct xe_gt *gt`` GT structure ``const struct xe_hw_engine *hwe`` Engine instance **Return** true if engine instance is even, false otherwiseh](h)}(h**Parameters**h]j)}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj%ubj)}(hhh](j)}(h0``const struct xe_device *xe`` Device structure h](j)}(h``const struct xe_device *xe``h]j)}(hj%h]hconst struct xe_device *xe}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj%ubj)}(hhh]h)}(hDevice structureh]hDevice structure}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj &hMhj&ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj &hMhj%ubj)}(h(``const struct xe_gt *gt`` GT structure h](j)}(h``const struct xe_gt *gt``h]j)}(hj1&h]hconst struct xe_gt *gt}(hj3&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/&ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hzhMhj+&ubj)}(hhh]h)}(h GT structureh]h GT structure}(hjJ&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjF&hMhjG&ubah}(h]h ]h"]h$]h&]uh1jhj+&ubeh}(h]h ]h"]h$]h&]uh1jhjF&hMhj%ubj)}(h3``const struct xe_hw_engine *hwe`` Engine instance h](j)}(h"``const struct xe_hw_engine *hwe``h]j)}(hjj&h]hconst struct xe_hw_engine *hwe}(hjl&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjh&ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjd&ubj)}(hhh]h)}(hEngine instanceh]hEngine instance}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj&ubah}(h]h ]h"]h$]h&]uh1jhjd&ubeh}(h]h ]h"]h$]h&]uh1jhj&hMhj%ubeh}(h]h ]h"]h$]h&]uh1jhj%ubh)}(h **Return**h]j)}(hj&h]hReturn}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj%ubh)}(h0true if engine instance is even, false otherwiseh]h0true if engine instance is even, false otherwise}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j &xe_rtp_match_has_flat_ccs (C function)c.xe_rtp_match_has_flat_ccshNtauh1hhhhhhNhNubj)}(hhh](j)}(hsbool xe_rtp_match_has_flat_ccs (const struct xe_device *xe, const struct xe_gt *gt, const struct xe_hw_engine *hwe)h]j)}(hrbool xe_rtp_match_has_flat_ccs(const struct xe_device *xe, const struct xe_gt *gt, const struct xe_hw_engine *hwe)h](j#)}(hj#h]hbool}(hj&hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj&hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMubj5)}(h h]h }(hj&hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj&hhhj&hMubjF)}(hxe_rtp_match_has_flat_ccsh]jL)}(hxe_rtp_match_has_flat_ccsh]hxe_rtp_match_has_flat_ccs}(hj 'hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj'ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj&hhhj&hMubj#)}(hT(const struct xe_device *xe, const struct xe_gt *gt, const struct xe_hw_engine *hwe)h](j#)}(hconst struct xe_device *xeh](j#)}(hj#h]hconst}(hj&'hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj"'ubj5)}(h h]h }(hj3'hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj"'ubj#)}(hj&h]hstruct}(hjA'hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj"'ubj5)}(h h]h }(hjN'hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj"'ubh)}(hhh]jL)}(h xe_deviceh]h xe_device}(hj_'hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj\'ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetja'modnameN classnameNjJ$jM$)}jP$]jS$)}jF$j 'sbc.xe_rtp_match_has_flat_ccsasbuh1hhj"'ubj5)}(h h]h }(hj'hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj"'ubjg$)}(hjj$h]h*}(hj'hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj"'ubjL)}(hxeh]hxe}(hj'hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj"'ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj'ubj#)}(hconst struct xe_gt *gth](j#)}(hj#h]hconst}(hj'hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj'ubj5)}(h h]h }(hj'hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj'ubj#)}(hj&h]hstruct}(hj'hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj'ubj5)}(h h]h }(hj'hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj'ubh)}(hhh]jL)}(hxe_gth]hxe_gt}(hj'hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj'modnameN classnameNjJ$jM$)}jP$]j{'c.xe_rtp_match_has_flat_ccsasbuh1hhj'ubj5)}(h h]h }(hj (hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj'ubjg$)}(hjj$h]h*}(hj(hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj'ubjL)}(hgth]hgt}(hj%(hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj'ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj'ubj#)}(hconst struct xe_hw_engine *hweh](j#)}(hj#h]hconst}(hj>(hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj:(ubj5)}(h h]h }(hjK(hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj:(ubj#)}(hj&h]hstruct}(hjY(hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj:(ubj5)}(h h]h }(hjf(hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj:(ubh)}(hhh]jL)}(h xe_hw_engineh]h xe_hw_engine}(hjw(hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjt(ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetjy(modnameN classnameNjJ$jM$)}jP$]j{'c.xe_rtp_match_has_flat_ccsasbuh1hhj:(ubj5)}(h h]h }(hj(hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj:(ubjg$)}(hjj$h]h*}(hj(hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj:(ubjL)}(hhweh]hhwe}(hj(hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj:(ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj'ubeh}(h]h ]h"]h$]h&]hhuh1j#hj&hhhj&hMubeh}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj&hhhj&hMubah}(h]j&ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj&hMhj&hhubjx)}(hhh]h)}(h+Match when platform has FlatCCS compressionh]h+Match when platform has FlatCCS compression}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj(hhubah}(h]h ]h"]h$]h&]uh1jwhj&hhhj&hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj(jj(jjjuh1jhhhhhNhNubj)}(h**Parameters** ``const struct xe_device *xe`` Device structure ``const struct xe_gt *gt`` GT structure ``const struct xe_hw_engine *hwe`` Engine instance **Return** true if platform has FlatCCS compression, false otherwiseh](h)}(h**Parameters**h]j)}(hj(h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj(ubj)}(hhh](j)}(h0``const struct xe_device *xe`` Device structure h](j)}(h``const struct xe_device *xe``h]j)}(hj)h]hconst struct xe_device *xe}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj)ubj)}(hhh]h)}(hDevice structureh]hDevice structure}(hj4)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0)hMhj1)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj0)hMhj)ubj)}(h(``const struct xe_gt *gt`` GT structure h](j)}(h``const struct xe_gt *gt``h]j)}(hjT)h]hconst struct xe_gt *gt}(hjV)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjR)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhjN)ubj)}(hhh]h)}(h GT structureh]h GT structure}(hjm)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhji)hMhjj)ubah}(h]h ]h"]h$]h&]uh1jhjN)ubeh}(h]h ]h"]h$]h&]uh1jhji)hMhj)ubj)}(h3``const struct xe_hw_engine *hwe`` Engine instance h](j)}(h"``const struct xe_hw_engine *hwe``h]j)}(hj)h]hconst struct xe_hw_engine *hwe}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhMhj)ubj)}(hhh]h)}(hEngine instanceh]hEngine instance}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj)hMhj)ubeh}(h]h ]h"]h$]h&]uh1jhj(ubh)}(h **Return**h]j)}(hj)h]hReturn}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hj(ubh)}(h9true if platform has FlatCCS compression, false otherwiseh]h9true if platform has FlatCCS compression, false otherwise}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:16: ./drivers/gpu/drm/xe/xe_rtp.hhM hj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j 6xe_rtp_process_ctx_enable_active_tracking (C function)+c.xe_rtp_process_ctx_enable_active_trackinghNtauh1hhhhhhNhNubj)}(hhh](j)}(hvoid xe_rtp_process_ctx_enable_active_tracking (struct xe_rtp_process_ctx *ctx, unsigned long *active_entries, size_t n_entries)h]j)}(hvoid xe_rtp_process_ctx_enable_active_tracking(struct xe_rtp_process_ctx *ctx, unsigned long *active_entries, size_t n_entries)h](j#)}(hvoidh]hvoid}(hj *hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj *hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKubj5)}(h h]h }(hj*hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj *hhhj*hKubjF)}(h)xe_rtp_process_ctx_enable_active_trackingh]jL)}(h)xe_rtp_process_ctx_enable_active_trackingh]h)xe_rtp_process_ctx_enable_active_tracking}(hj.*hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj**ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj *hhhj*hKubj#)}(hQ(struct xe_rtp_process_ctx *ctx, unsigned long *active_entries, size_t n_entries)h](j#)}(hstruct xe_rtp_process_ctx *ctxh](j#)}(hj&h]hstruct}(hjJ*hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hjF*ubj5)}(h h]h }(hjW*hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjF*ubh)}(hhh]jL)}(hxe_rtp_process_ctxh]hxe_rtp_process_ctx}(hjh*hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhje*ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetjj*modnameN classnameNjJ$jM$)}jP$]jS$)}jF$j0*sb+c.xe_rtp_process_ctx_enable_active_trackingasbuh1hhjF*ubj5)}(h h]h }(hj*hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjF*ubjg$)}(hjj$h]h*}(hj*hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hjF*ubjL)}(hctxh]hctx}(hj*hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjF*ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hjB*ubj#)}(hunsigned long *active_entriesh](j#)}(hunsignedh]hunsigned}(hj*hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj*ubj5)}(h h]h }(hj*hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj*ubj#)}(hlongh]hlong}(hj*hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj*ubj5)}(h h]h }(hj*hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj*ubjg$)}(hjj$h]h*}(hj*hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj*ubjL)}(hactive_entriesh]hactive_entries}(hj+hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj*ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hjB*ubj#)}(hsize_t n_entriesh](h)}(hhh]jL)}(hsize_th]hsize_t}(hj+hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj+modnameN classnameNjJ$jM$)}jP$]j*+c.xe_rtp_process_ctx_enable_active_trackingasbuh1hhj+ubj5)}(h h]h }(hj;+hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj+ubjL)}(h n_entriesh]h n_entries}(hjI+hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj+ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hjB*ubeh}(h]h ]h"]h$]h&]hhuh1j#hj *hhhj*hKubeh}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj*hhhj*hKubah}(h]j*ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj*hKhj*hhubjx)}(hhh]h)}(h!Enable tracking of active entriesh]h!Enable tracking of active entries}(hjs+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhjp+hhubah}(h]h ]h"]h$]h&]uh1jwhj*hhhj*hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct xe_rtp_process_ctx *ctx`` The context for processing the table ``unsigned long *active_entries`` bitmap to store the active entries ``size_t n_entries`` number of entries to be processed **Description** Set additional metadata to track what entries are considered "active", i.e. their rules match the condition. Bits are never cleared: entries with matching rules set the corresponding bit in the bitmap.h](h)}(h**Parameters**h]j)}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj+ubj)}(hhh](j)}(hH``struct xe_rtp_process_ctx *ctx`` The context for processing the table h](j)}(h"``struct xe_rtp_process_ctx *ctx``h]j)}(hj+h]hstruct xe_rtp_process_ctx *ctx}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj+ubj)}(hhh]h)}(h$The context for processing the tableh]h$The context for processing the table}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj+hKhj+ubj)}(hE``unsigned long *active_entries`` bitmap to store the active entries h](j)}(h!``unsigned long *active_entries``h]j)}(hj+h]hunsigned long *active_entries}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj+ubj)}(hhh]h)}(h"bitmap to store the active entriesh]h"bitmap to store the active entries}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(h7``size_t n_entries`` number of entries to be processed h](j)}(h``size_t n_entries``h]j)}(hj&,h]hsize_t n_entries}(hj(,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$,ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj ,ubj)}(hhh]h)}(h!number of entries to be processedh]h!number of entries to be processed}(hj?,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;,hKhj<,ubah}(h]h ]h"]h$]h&]uh1jhj ,ubeh}(h]h ]h"]h$]h&]uh1jhj;,hKhj+ubeh}(h]h ]h"]h$]h&]uh1jhj+ubh)}(h**Description**h]j)}(hja,h]h Description}(hjc,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_,ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj+ubh)}(hSet additional metadata to track what entries are considered "active", i.e. their rules match the condition. Bits are never cleared: entries with matching rules set the corresponding bit in the bitmap.h]hSet additional metadata to track what entries are considered “active”, i.e. their rules match the condition. Bits are never cleared: entries with matching rules set the corresponding bit in the bitmap.}(hjw,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chKhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j !xe_rtp_process_to_sr (C function)c.xe_rtp_process_to_srhNtauh1hhhhhhNhNubj)}(hhh](j)}(hvoid xe_rtp_process_to_sr (struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry_sr *entries, size_t n_entries, struct xe_reg_sr *sr, bool process_in_vf)h]j)}(hvoid xe_rtp_process_to_sr(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry_sr *entries, size_t n_entries, struct xe_reg_sr *sr, bool process_in_vf)h](j#)}(hvoidh]hvoid}(hj,hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj,hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMubj5)}(h h]h }(hj,hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj,hhhj,hMubjF)}(hxe_rtp_process_to_srh]jL)}(hxe_rtp_process_to_srh]hxe_rtp_process_to_sr}(hj,hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj,ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj,hhhj,hMubj#)}(h(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry_sr *entries, size_t n_entries, struct xe_reg_sr *sr, bool process_in_vf)h](j#)}(hstruct xe_rtp_process_ctx *ctxh](j#)}(hj&h]hstruct}(hj,hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj,ubj5)}(h h]h }(hj,hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj,ubh)}(hhh]jL)}(hxe_rtp_process_ctxh]hxe_rtp_process_ctx}(hj-hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj,ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj-modnameN classnameNjJ$jM$)}jP$]jS$)}jF$j,sbc.xe_rtp_process_to_srasbuh1hhj,ubj5)}(h h]h }(hj!-hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj,ubjg$)}(hjj$h]h*}(hj/-hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj,ubjL)}(hctxh]hctx}(hj<-hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj,ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj,ubj#)}(h%const struct xe_rtp_entry_sr *entriesh](j#)}(hj#h]hconst}(hjU-hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hjQ-ubj5)}(h h]h }(hjb-hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjQ-ubj#)}(hj&h]hstruct}(hjp-hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hjQ-ubj5)}(h h]h }(hj}-hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjQ-ubh)}(hhh]jL)}(hxe_rtp_entry_srh]hxe_rtp_entry_sr}(hj-hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj-ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj-modnameN classnameNjJ$jM$)}jP$]j-c.xe_rtp_process_to_srasbuh1hhjQ-ubj5)}(h h]h }(hj-hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjQ-ubjg$)}(hjj$h]h*}(hj-hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hjQ-ubjL)}(hentriesh]hentries}(hj-hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjQ-ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj,ubj#)}(hsize_t n_entriesh](h)}(hhh]jL)}(hsize_th]hsize_t}(hj-hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj-ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj-modnameN classnameNjJ$jM$)}jP$]j-c.xe_rtp_process_to_srasbuh1hhj-ubj5)}(h h]h }(hj.hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj-ubjL)}(h n_entriesh]h n_entries}(hj.hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj-ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj,ubj#)}(hstruct xe_reg_sr *srh](j#)}(hj&h]hstruct}(hj(.hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj$.ubj5)}(h h]h }(hj5.hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj$.ubh)}(hhh]jL)}(h xe_reg_srh]h xe_reg_sr}(hjF.hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjC.ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetjH.modnameN classnameNjJ$jM$)}jP$]j-c.xe_rtp_process_to_srasbuh1hhj$.ubj5)}(h h]h }(hjd.hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj$.ubjg$)}(hjj$h]h*}(hjr.hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj$.ubjL)}(hsrh]hsr}(hj.hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj$.ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj,ubj#)}(hbool process_in_vfh](j#)}(hj#h]hbool}(hj.hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj.ubj5)}(h h]h }(hj.hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj.ubjL)}(h process_in_vfh]h process_in_vf}(hj.hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj.ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj,ubeh}(h]h ]h"]h$]h&]hhuh1j#hj,hhhj,hMubeh}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj,hhhj,hMubah}(h]j,ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj,hMhj,hhubjx)}(hhh]h)}(hSProcess all rtp **entries**, adding the matching ones to the save-restore argument.h](hProcess all rtp }(hj.hhhNhNubj)}(h **entries**h]hentries}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubh8, adding the matching ones to the save-restore argument.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj.hhubah}(h]h ]h"]h$]h&]uh1jwhj,hhhj,hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj/jj/jjjuh1jhhhhhNhNubj)}(hXt**Parameters** ``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe ``const struct xe_rtp_entry_sr *entries`` Table with RTP definitions ``size_t n_entries`` Number of entries to process, usually ARRAY_SIZE(entries) ``struct xe_reg_sr *sr`` Save-restore struct where matching rules execute the action. This can be viewed as the "coalesced view" of multiple the tables. The bits for each register set are expected not to collide with previously added entries ``bool process_in_vf`` Whether this RTP table should get processed for SR-IOV VF devices. Should generally only be 'true' for LRC tables. **Description** Walk the table pointed by **entries** (with an empty sentinel) and add all entries with matching rules to **sr**. If **hwe** is not NULL, its mmio_base is used to calculate the right register offseth](h)}(h**Parameters**h]j)}(hj/h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj /ubj)}(hhh](j)}(hg``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe h](j)}(h"``struct xe_rtp_process_ctx *ctx``h]j)}(hj0/h]hstruct xe_rtp_process_ctx *ctx}(hj2/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj./ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj*/ubj)}(hhh]h)}(hCThe context for processing the table, with one of device, gt or hweh]hCThe context for processing the table, with one of device, gt or hwe}(hjI/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjE/hMhjF/ubah}(h]h ]h"]h$]h&]uh1jhj*/ubeh}(h]h ]h"]h$]h&]uh1jhjE/hMhj'/ubj)}(hE``const struct xe_rtp_entry_sr *entries`` Table with RTP definitions h](j)}(h)``const struct xe_rtp_entry_sr *entries``h]j)}(hji/h]h%const struct xe_rtp_entry_sr *entries}(hjk/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjg/ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhjc/ubj)}(hhh]h)}(hTable with RTP definitionsh]hTable with RTP definitions}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~/hMhj/ubah}(h]h ]h"]h$]h&]uh1jhjc/ubeh}(h]h ]h"]h$]h&]uh1jhj~/hMhj'/ubj)}(hO``size_t n_entries`` Number of entries to process, usually ARRAY_SIZE(entries) h](j)}(h``size_t n_entries``h]j)}(hj/h]hsize_t n_entries}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj/ubj)}(hhh]h)}(h9Number of entries to process, usually ARRAY_SIZE(entries)h]h9Number of entries to process, usually ARRAY_SIZE(entries)}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhj/hMhj'/ubj)}(h``struct xe_reg_sr *sr`` Save-restore struct where matching rules execute the action. This can be viewed as the "coalesced view" of multiple the tables. The bits for each register set are expected not to collide with previously added entries h](j)}(h``struct xe_reg_sr *sr``h]j)}(hj/h]hstruct xe_reg_sr *sr}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj/ubj)}(hhh]h)}(hSave-restore struct where matching rules execute the action. This can be viewed as the "coalesced view" of multiple the tables. The bits for each register set are expected not to collide with previously added entriesh]hSave-restore struct where matching rules execute the action. This can be viewed as the “coalesced view” of multiple the tables. The bits for each register set are expected not to collide with previously added entries}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhj/hMhj'/ubj)}(h``bool process_in_vf`` Whether this RTP table should get processed for SR-IOV VF devices. Should generally only be 'true' for LRC tables. h](j)}(h``bool process_in_vf``h]j)}(hj0h]hbool process_in_vf}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj0ubj)}(hhh]h)}(hsWhether this RTP table should get processed for SR-IOV VF devices. Should generally only be 'true' for LRC tables.h]hwWhether this RTP table should get processed for SR-IOV VF devices. Should generally only be ‘true’ for LRC tables.}(hj.0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj+0ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jhj*0hMhj'/ubeh}(h]h ]h"]h$]h&]uh1jhj /ubh)}(h**Description**h]j)}(hjQ0h]h Description}(hjS0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjO0ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj /ubh)}(hWalk the table pointed by **entries** (with an empty sentinel) and add all entries with matching rules to **sr**. If **hwe** is not NULL, its mmio_base is used to calculate the right register offseth](hWalk the table pointed by }(hjg0hhhNhNubj)}(h **entries**h]hentries}(hjo0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjg0ubhE (with an empty sentinel) and add all entries with matching rules to }(hjg0hhhNhNubj)}(h**sr**h]hsr}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjg0ubh. If }(hjg0hhhNhNubj)}(h**hwe**h]hhwe}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjg0ubhJ is not NULL, its mmio_base is used to calculate the right register offset}(hjg0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMhj /ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j xe_rtp_process (C function)c.xe_rtp_processhNtauh1hhhhhhNhNubj)}(hhh](j)}(hXvoid xe_rtp_process (struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry *entries)h]j)}(hWvoid xe_rtp_process(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry *entries)h](j#)}(hvoidh]hvoid}(hj0hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1j#hj0hhhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMFubj5)}(h h]h }(hj0hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj0hhhj0hMFubjF)}(hxe_rtp_processh]jL)}(hxe_rtp_processh]hxe_rtp_process}(hj0hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj0ubah}(h]h ](j^j_eh"]h$]h&]hhuh1jEhj0hhhj0hMFubj#)}(hD(struct xe_rtp_process_ctx *ctx, const struct xe_rtp_entry *entries)h](j#)}(hstruct xe_rtp_process_ctx *ctxh](j#)}(hj&h]hstruct}(hj 1hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hj1ubj5)}(h h]h }(hj1hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj1ubh)}(hhh]jL)}(hxe_rtp_process_ctxh]hxe_rtp_process_ctx}(hj'1hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj$1ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj)1modnameN classnameNjJ$jM$)}jP$]jS$)}jF$j0sbc.xe_rtp_processasbuh1hhj1ubj5)}(h h]h }(hjG1hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hj1ubjg$)}(hjj$h]h*}(hjU1hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hj1ubjL)}(hctxh]hctx}(hjb1hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj1ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj1ubj#)}(h"const struct xe_rtp_entry *entriesh](j#)}(hj#h]hconst}(hj{1hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hjw1ubj5)}(h h]h }(hj1hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjw1ubj#)}(hj&h]hstruct}(hj1hhhNhNubah}(h]h ]j/ah"]h$]h&]uh1j"hjw1ubj5)}(h h]h }(hj1hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjw1ubh)}(hhh]jL)}(h xe_rtp_entryh]h xe_rtp_entry}(hj1hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhj1ubah}(h]h ]h"]h$]h&] refdomainjreftypejF$ reftargetj1modnameN classnameNjJ$jM$)}jP$]jC1c.xe_rtp_processasbuh1hhjw1ubj5)}(h h]h }(hj1hhhNhNubah}(h]h ]jAah"]h$]h&]uh1j4hjw1ubjg$)}(hjj$h]h*}(hj1hhhNhNubah}(h]h ]js$ah"]h$]h&]uh1jf$hjw1ubjL)}(hentriesh]hentries}(hj1hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jKhjw1ubeh}(h]h ]h"]h$]h&]noemphhhuh1j#hj1ubeh}(h]h ]h"]h$]h&]hhuh1j#hj0hhhj0hMFubeh}(h]h ]h"]h$]h&]hhjiuh1jjjjkhj0hhhj0hMFubah}(h]j0ah ](jojpeh"]h$]h&]jtju)jvhuh1jhj0hMFhj0hhubjx)}(hhh]h)}(h7Process all rtp **entries**, without running any actionh](hProcess all rtp }(hj2hhhNhNubj)}(h **entries**h]hentries}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubh, without running any action}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMFhj2hhubah}(h]h ]h"]h$]h&]uh1jwhj0hhhj0hMFubeh}(h]h ](jfunctioneh"]h$]h&]jjjjA2jjA2jjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe ``const struct xe_rtp_entry *entries`` Table with RTP definitions **Description** Walk the table pointed by **entries** (with an empty sentinel), executing the rules. One difference from xe_rtp_process_to_sr(): there is no action associated with each entry since this uses struct xe_rtp_entry. Its main use is for marking active workarounds via xe_rtp_process_ctx_enable_active_tracking().h](h)}(h**Parameters**h]j)}(hjK2h]h Parameters}(hjM2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjI2ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMJhjE2ubj)}(hhh](j)}(hg``struct xe_rtp_process_ctx *ctx`` The context for processing the table, with one of device, gt or hwe h](j)}(h"``struct xe_rtp_process_ctx *ctx``h]j)}(hjj2h]hstruct xe_rtp_process_ctx *ctx}(hjl2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjh2ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMGhjd2ubj)}(hhh]h)}(hCThe context for processing the table, with one of device, gt or hweh]hCThe context for processing the table, with one of device, gt or hwe}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMGhj2ubah}(h]h ]h"]h$]h&]uh1jhjd2ubeh}(h]h ]h"]h$]h&]uh1jhj2hMGhja2ubj)}(hB``const struct xe_rtp_entry *entries`` Table with RTP definitions h](j)}(h&``const struct xe_rtp_entry *entries``h]j)}(hj2h]h"const struct xe_rtp_entry *entries}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1jhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMHhj2ubj)}(hhh]h)}(hTable with RTP definitionsh]hTable with RTP definitions}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMHhj2ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj2hMHhja2ubeh}(h]h ]h"]h$]h&]uh1jhjE2ubh)}(h**Description**h]j)}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMJhjE2ubh)}(hX3Walk the table pointed by **entries** (with an empty sentinel), executing the rules. One difference from xe_rtp_process_to_sr(): there is no action associated with each entry since this uses struct xe_rtp_entry. Its main use is for marking active workarounds via xe_rtp_process_ctx_enable_active_tracking().h](hWalk the table pointed by }(hj2hhhNhNubj)}(h **entries**h]hentries}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubhX (with an empty sentinel), executing the rules. One difference from xe_rtp_process_to_sr(): there is no action associated with each entry since this uses struct xe_rtp_entry. Its main use is for marking active workarounds via xe_rtp_process_ctx_enable_active_tracking().}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_rtp:19: ./drivers/gpu/drm/xe/xe_rtp.chMIhjE2ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubeh}(h] internal-apiah ]h"] internal apiah$]h&]uh1hhhhhhhhK ubeh}(h]register-table-processingah ]h"]register table processingah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjO3error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehnj _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(j)3j&3j!3j3u nametypes}(j)3j!3uh}(j&3hj3hjjjYj^jejjjjj-j2jjj j j# j( j` je jj jo jjjjjjjyj~jjjAjFjjjjjFjKjjjjjojtjjjjj3 j8 jq!jv!j"j"j#j#j&j&j*j*j,j,j0j0u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.