vsphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget#/translations/zh_CN/gpu/xe/xe_pcodemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/zh_TW/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/it_IT/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ja_JP/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ko_KR/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/sp_SP/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh=/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode.rsthKubhsection)}(hhh](htitle)}(hPcodeh]hPcode}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hX+Xe PCODE is the component responsible for interfacing with the PCODE firmware. It shall provide a very simple ABI to other Xe components, but be the single and consolidated place that will communicate with PCODE. All read and write operations to PCODE will be internal and private to this component.h]hX+Xe PCODE is the component responsible for interfacing with the PCODE firmware. It shall provide a very simple ABI to other Xe components, but be the single and consolidated place that will communicate with PCODE. All read and write operations to PCODE will be internal and private to this component.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:7: ./drivers/gpu/drm/xe/xe_pcode.chKhhhhubh)}(h>What's next: - PCODE hw metrics - PCODE for display operationsh]h@What’s next: - PCODE hw metrics - PCODE for display operations}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:7: ./drivers/gpu/drm/xe/xe_pcode.chKhhhhubh)}(hhh](h)}(h Internal APIh]h Internal API}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singlexe_pcode_request (C function)c.xe_pcode_requesthNtauh1hhhhhhNhNubhdesc)}(hhh](hdesc_signature)}(hrint xe_pcode_request (struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms)h]hdesc_signature_line)}(hqint xe_pcode_request(struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms)h](hdesc_sig_keyword_type)}(hinth]hint}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKubhdesc_sig_space)}(h h]h }(hj0hhhNhNubah}(h]h ]wah"]h$]h&]uh1j.hjhhhj-hKubh desc_name)}(hxe_pcode_requesth]h desc_sig_name)}(hxe_pcode_requesth]hxe_pcode_request}(hjGhhhNhNubah}(h]h ]nah"]h$]h&]uh1jEhjAubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1j?hjhhhj-hKubhdesc_parameterlist)}(h](struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms)h](hdesc_parameter)}(hstruct xe_tile *tileh](hdesc_sig_keyword)}(hstructh]hstruct}(hjlhhhNhNubah}(h]h ]kah"]h$]h&]uh1jjhjfubj/)}(h h]h }(hj{hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjfubh)}(hhh]jF)}(hxe_tileh]hxe_tile}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubah}(h]h ]h"]h$]h&] refdomaincreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}jjIsbc.xe_pcode_requestasbuh1hhjfubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjfubhdesc_sig_punctuation)}(h*h]h*}(hjhhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjfubjF)}(htileh]htile}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjfubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj`ubje)}(hu32 mboxh](h)}(hhh]jF)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubjF)}(hmboxh]hmbox}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj`ubje)}(h u32 requesth](h)}(hhh]jF)}(hu32h]hu32}(hj8hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhj1ubj/)}(h h]h }(hjVhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj1ubjF)}(hrequesth]hrequest}(hjdhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj1ubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj`ubje)}(hu32 reply_maskh](h)}(hhh]jF)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjyubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjyubjF)}(h reply_maskh]h reply_mask}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjyubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj`ubje)}(h u32 replyh](h)}(hhh]jF)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubjF)}(hreplyh]hreply}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj`ubje)}(hint timeout_base_msh](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]j)ah"]h$]h&]uh1jhj ubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj ubjF)}(htimeout_base_msh]htimeout_base_ms}(hj)hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj`ubeh}(h]h ]h"]h$]h&]hhuh1j^hjhhhj-hKubeh}(h]h ]h"]h$]h&]hh add_permalinkuh1jsphinx_line_type declaratorhjhhhj-hKubah}(h]j ah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhj-hKhj hhubh desc_content)}(hhh]h)}(h'send PCODE request until acknowledgmenth]h'send PCODE request until acknowledgment}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjZhhubah}(h]h ]h"]h$]h&]uh1jXhj hhhj-hKubeh}(h]h ](jfunctioneh"]h$]h&]domainjobjtypejudesctypejunoindex noindexentrynocontentsentryuh1j hhhhhNhNubh container)}(hXg**Parameters** ``struct xe_tile *tile`` tile ``u32 mbox`` PCODE mailbox ID the request is targeted for ``u32 request`` request ID ``u32 reply_mask`` mask used to check for request acknowledgment ``u32 reply`` value used to check for request acknowledgment ``int timeout_base_ms`` timeout for polling with preemption enabled **Description** Keep resending the **request** to **mbox** until PCODE acknowledges it, PCODE reports an error or an overall timeout of **timeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply** after applying **reply_mask**. Polling is first attempted with preemption enabled for **timeout_base_ms** and if this times out for another 50 ms with preemption disabled. Returns 0 on success, ``-ETIMEDOUT`` in case of a timeout, <0 in case of some other error as reported by PCODE.h](h)}(h**Parameters**h]hstrong)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubhdefinition_list)}(hhh](hdefinition_list_item)}(h``struct xe_tile *tile`` tile h](hterm)}(h``struct xe_tile *tile``h]hliteral)}(hjh]hstruct xe_tile *tile}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubh definition)}(hhh]h)}(htileh]htile}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h:``u32 mbox`` PCODE mailbox ID the request is targeted for h](j)}(h ``u32 mbox``h]j)}(hjh]hu32 mbox}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h,PCODE mailbox ID the request is targeted forh]h,PCODE mailbox ID the request is targeted for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h``u32 request`` request ID h](j)}(h``u32 request``h]j)}(hj$h]h u32 request}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h request IDh]h request ID}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hKhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj9hKhjubj)}(hA``u32 reply_mask`` mask used to check for request acknowledgment h](j)}(h``u32 reply_mask``h]j)}(hj]h]hu32 reply_mask}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjWubj)}(hhh]h)}(h-mask used to check for request acknowledgmenth]h-mask used to check for request acknowledgment}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhKhjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jhjrhKhjubj)}(h=``u32 reply`` value used to check for request acknowledgment h](j)}(h ``u32 reply``h]j)}(hjh]h u32 reply}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h.value used to check for request acknowledgmenth]h.value used to check for request acknowledgment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hD``int timeout_base_ms`` timeout for polling with preemption enabled h](j)}(h``int timeout_base_ms``h]j)}(hjh]hint timeout_base_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h+timeout for polling with preemption enabledh]h+timeout for polling with preemption enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubh)}(hXKeep resending the **request** to **mbox** until PCODE acknowledges it, PCODE reports an error or an overall timeout of **timeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply** after applying **reply_mask**. Polling is first attempted with preemption enabled for **timeout_base_ms** and if this times out for another 50 ms with preemption disabled.h](hKeep resending the }(hj hhhNhNubj)}(h **request**h]hrequest}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh to }(hj hhhNhNubj)}(h**mbox**h]hmbox}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubhN until PCODE acknowledges it, PCODE reports an error or an overall timeout of }(hj hhhNhNubj)}(hj**timeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply**h]hftimeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh after applying }(hj hhhNhNubj)}(h**reply_mask**h]h reply_mask}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh9. Polling is first attempted with preemption enabled for }(hj hhhNhNubj)}(h**timeout_base_ms**h]htimeout_base_ms}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubhB and if this times out for another 50 ms with preemption disabled.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubh)}(hoReturns 0 on success, ``-ETIMEDOUT`` in case of a timeout, <0 in case of some other error as reported by PCODE.h](hReturns 0 on success, }(hjhhhNhNubj)}(h``-ETIMEDOUT``h]h -ETIMEDOUT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhK in case of a timeout, <0 in case of some other error as reported by PCODE.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_pcode_init_min_freq_table (C function)c.xe_pcode_init_min_freq_tablehNtauh1hhhhhhNhNubj )}(hhh](j)}(hYint xe_pcode_init_min_freq_table (struct xe_tile *tile, u32 min_gt_freq, u32 max_gt_freq)h]j)}(hXint xe_pcode_init_min_freq_table(struct xe_tile *tile, u32 min_gt_freq, u32 max_gt_freq)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]j)ah"]h$]h&]uh1jhjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjhhhjhKubj@)}(hxe_pcode_init_min_freq_tableh]jF)}(hxe_pcode_init_min_freq_tableh]hxe_pcode_init_min_freq_table}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubah}(h]h ](jYjZeh"]h$]h&]hhuh1j?hjhhhjhKubj_)}(h8(struct xe_tile *tile, u32 min_gt_freq, u32 max_gt_freq)h](je)}(hstruct xe_tile *tileh](jk)}(hjnh]hstruct}(hjhhhNhNubah}(h]h ]jwah"]h$]h&]uh1jjhjubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubh)}(hhh]jF)}(hxe_tileh]hxe_tile}(hj%hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]j)}jjsbc.xe_pcode_init_min_freq_tableasbuh1hhjubj/)}(h h]h }(hjEhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubj)}(hjh]h*}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjF)}(htileh]htile}(hj`hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhjubje)}(hu32 min_gt_freqh](h)}(hhh]jF)}(hu32h]hu32}(hj|hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]jAc.xe_pcode_init_min_freq_tableasbuh1hhjuubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjuubjF)}(h min_gt_freqh]h min_gt_freq}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjuubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhjubje)}(hu32 max_gt_freqh](h)}(hhh]jF)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jAc.xe_pcode_init_min_freq_tableasbuh1hhjubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubjF)}(h max_gt_freqh]h max_gt_freq}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhjubeh}(h]h ]h"]h$]h&]hhuh1j^hjhhhjhKubeh}(h]h ]h"]h$]h&]hhjJuh1jjKjLhjhhhjhKubah}(h]jah ](jPjQeh"]h$]h&]jUjV)jWhuh1jhjhKhjhhubjY)}(hhh]h)}(h&Initialize PCODE's QOS frequency tableh]h(Initialize PCODE’s QOS frequency table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjhhubah}(h]h ]h"]h$]h&]uh1jXhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jyjjzj2j{j2j|j}j~uh1j hhhhhNhNubj)}(hX**Parameters** ``struct xe_tile *tile`` tile instance ``u32 min_gt_freq`` Minimal (RPn) GT frequency in units of 50MHz. ``u32 max_gt_freq`` Maximal (RP0) GT frequency in units of 50MHz. **Description** This function initialize PCODE's QOS frequency table for a proper minimal frequency/power steering decision, depending on the current requested GT frequency. For older platforms this was a more complete table including the IA freq. However for the latest platforms this table become a simple 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might not take the right decisions for some memory frequencies and affect latency. It returns 0 on success, and -ERROR number on failure, -EINVAL if max frequency is higher then the minimal, and other errors directly translated from the PCODE Error returns: - -ENXIO: "Illegal Command" - -ETIMEDOUT: "Timed out" - -EINVAL: "Illegal Data" - -ENXIO, "Illegal Subcommand" - -EBUSY: "PCODE Locked" - -EOVERFLOW, "GT ratio out of range" - -EACCES, "PCODE Rejected" - -EPROTO, "Unknown"h](h)}(h**Parameters**h]j)}(hj<h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhj6ubj)}(hhh](j)}(h'``struct xe_tile *tile`` tile instance h](j)}(h``struct xe_tile *tile``h]j)}(hj[h]hstruct xe_tile *tile}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjUubj)}(hhh]h)}(h tile instanceh]h tile instance}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphKhjqubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jhjphKhjRubj)}(hB``u32 min_gt_freq`` Minimal (RPn) GT frequency in units of 50MHz. h](j)}(h``u32 min_gt_freq``h]j)}(hjh]hu32 min_gt_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h-Minimal (RPn) GT frequency in units of 50MHz.h]h-Minimal (RPn) GT frequency in units of 50MHz.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjRubj)}(hB``u32 max_gt_freq`` Maximal (RP0) GT frequency in units of 50MHz. h](j)}(h``u32 max_gt_freq``h]j)}(hjh]hu32 max_gt_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h-Maximal (RP0) GT frequency in units of 50MHz.h]h-Maximal (RP0) GT frequency in units of 50MHz.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjRubeh}(h]h ]h"]h$]h&]uh1jhj6ubh)}(h**Description**h]j)}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhj6ubh)}(hXThis function initialize PCODE's QOS frequency table for a proper minimal frequency/power steering decision, depending on the current requested GT frequency. For older platforms this was a more complete table including the IA freq. However for the latest platforms this table become a simple 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might not take the right decisions for some memory frequencies and affect latency.h]hXThis function initialize PCODE’s QOS frequency table for a proper minimal frequency/power steering decision, depending on the current requested GT frequency. For older platforms this was a more complete table including the IA freq. However for the latest platforms this table become a simple 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might not take the right decisions for some memory frequencies and affect latency.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhj6ubh)}(hXIt returns 0 on success, and -ERROR number on failure, -EINVAL if max frequency is higher then the minimal, and other errors directly translated from the PCODE Error returns: - -ENXIO: "Illegal Command" - -ETIMEDOUT: "Timed out" - -EINVAL: "Illegal Data" - -ENXIO, "Illegal Subcommand" - -EBUSY: "PCODE Locked" - -EOVERFLOW, "GT ratio out of range" - -EACCES, "PCODE Rejected" - -EPROTO, "Unknown"h]hXIt returns 0 on success, and -ERROR number on failure, -EINVAL if max frequency is higher then the minimal, and other errors directly translated from the PCODE Error returns: - -ENXIO: “Illegal Command” - -ETIMEDOUT: “Timed out” - -EINVAL: “Illegal Data” - -ENXIO, “Illegal Subcommand” - -EBUSY: “PCODE Locked” - -EOVERFLOW, “GT ratio out of range” - -EACCES, “PCODE Rejected” - -EPROTO, “Unknown”}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_pcode_ready (C function)c.xe_pcode_readyhNtauh1hhhhhhNhNubj )}(hhh](j)}(h6int xe_pcode_ready (struct xe_device *xe, bool locked)h]j)}(h5int xe_pcode_ready(struct xe_device *xe, bool locked)h](j)}(hinth]hint}(hj\hhhNhNubah}(h]h ]j)ah"]h$]h&]uh1jhjXhhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMubj/)}(h h]h }(hjkhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjXhhhjjhMubj@)}(hxe_pcode_readyh]jF)}(hxe_pcode_readyh]hxe_pcode_ready}(hj}hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjyubah}(h]h ](jYjZeh"]h$]h&]hhuh1j?hjXhhhjjhMubj_)}(h#(struct xe_device *xe, bool locked)h](je)}(hstruct xe_device *xeh](jk)}(hjnh]hstruct}(hjhhhNhNubah}(h]h ]jwah"]h$]h&]uh1jjhjubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubh)}(hhh]jF)}(h xe_deviceh]h xe_device}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.xe_pcode_readyasbuh1hhjubj/)}(h h]h }(hjhhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjF)}(hxeh]hxe}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhjubje)}(h bool lockedh](j)}(hboolh]hbool}(hj hhhNhNubah}(h]h ]j)ah"]h$]h&]uh1jhj ubj/)}(h h]h }(hj hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj ubjF)}(hlockedh]hlocked}(hj' hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhjubeh}(h]h ]h"]h$]h&]hhuh1j^hjXhhhjjhMubeh}(h]h ]h"]h$]h&]hhjJuh1jjKjLhjThhhjjhMubah}(h]jOah ](jPjQeh"]h$]h&]jUjV)jWhuh1jhjjhMhjQhhubjY)}(hhh]h)}(hEnsure PCODE is initializedh]hEnsure PCODE is initialized}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhjN hhubah}(h]h ]h"]h$]h&]uh1jXhjQhhhjjhMubeh}(h]h ](jfunctioneh"]h$]h&]jyjjzji j{ji j|j}j~uh1j hhhhhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` xe instance ``bool locked`` true if lock held, false otherwise **Description** PCODE init mailbox is polled only on root gt of root tile as the root tile provides the initialization is complete only after all the tiles have completed the initialization. Called only on early probe without locks and with locks in resume path. Returns 0 on success, and -error number on failure.h](h)}(h**Parameters**h]j)}(hjs h]h Parameters}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjq ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhjm ubj)}(hhh](j)}(h%``struct xe_device *xe`` xe instance h](j)}(h``struct xe_device *xe``h]j)}(hj h]hstruct xe_device *xe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhj ubj)}(hhh]h)}(h xe instanceh]h xe instance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubj)}(h3``bool locked`` true if lock held, false otherwise h](j)}(h``bool locked``h]j)}(hj h]h bool locked}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhj ubj)}(hhh]h)}(h"true if lock held, false otherwiseh]h"true if lock held, false otherwise}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubeh}(h]h ]h"]h$]h&]uh1jhjm ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhjm ubh)}(hPCODE init mailbox is polled only on root gt of root tile as the root tile provides the initialization is complete only after all the tiles have completed the initialization. Called only on early probe without locks and with locks in resume path.h]hPCODE init mailbox is polled only on root gt of root tile as the root tile provides the initialization is complete only after all the tiles have completed the initialization. Called only on early probe without locks and with locks in resume path.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhjm ubh)}(h3Returns 0 on success, and -error number on failure.h]h3Returns 0 on success, and -error number on failure.}(hj+ hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhjm ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_pcode_init (C function)c.xe_pcode_inithNtauh1hhhhhhNhNubj )}(hhh](j)}(h)void xe_pcode_init (struct xe_tile *tile)h]j)}(h(void xe_pcode_init(struct xe_tile *tile)h](j)}(hvoidh]hvoid}(hjZ hhhNhNubah}(h]h ]j)ah"]h$]h&]uh1jhjV hhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM:ubj/)}(h h]h }(hji hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hjV hhhjh hM:ubj@)}(h xe_pcode_inith]jF)}(h xe_pcode_inith]h xe_pcode_init}(hj{ hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjw ubah}(h]h ](jYjZeh"]h$]h&]hhuh1j?hjV hhhjh hM:ubj_)}(h(struct xe_tile *tile)h]je)}(hstruct xe_tile *tileh](jk)}(hjnh]hstruct}(hj hhhNhNubah}(h]h ]jwah"]h$]h&]uh1jjhj ubj/)}(h h]h }(hj hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj ubh)}(hhh]jF)}(hxe_tileh]hxe_tile}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj} sbc.xe_pcode_initasbuh1hhj ubj/)}(h h]h }(hj hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjF)}(htileh]htile}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj ubah}(h]h ]h"]h$]h&]hhuh1j^hjV hhhjh hM:ubeh}(h]h ]h"]h$]h&]hhjJuh1jjKjLhjR hhhjh hM:ubah}(h]jM ah ](jPjQeh"]h$]h&]jUjV)jWhuh1jhjh hM:hjO hhubjY)}(hhh]h)}(hinitialize components of PCODEh]hinitialize components of PCODE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM:hj hhubah}(h]h ]h"]h$]h&]uh1jXhjO hhhjh hM:ubeh}(h]h ](jfunctioneh"]h$]h&]jyjjzj2 j{j2 j|j}j~uh1j hhhhhNhNubj)}(h**Parameters** ``struct xe_tile *tile`` tile instance **Description** This function initializes the xe_pcode component. To be called once only during probe.h](h)}(h**Parameters**h]j)}(hj< h]h Parameters}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj: ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM>hj6 ubj)}(hhh]j)}(h'``struct xe_tile *tile`` tile instance h](j)}(h``struct xe_tile *tile``h]j)}(hj[ h]hstruct xe_tile *tile}(hj] hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjY ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM;hjU ubj)}(hhh]h)}(h tile instanceh]h tile instance}(hjt hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjp hM;hjq ubah}(h]h ]h"]h$]h&]uh1jhjU ubeh}(h]h ]h"]h$]h&]uh1jhjp hM;hjR ubah}(h]h ]h"]h$]h&]uh1jhj6 ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM=hj6 ubh)}(hVThis function initializes the xe_pcode component. To be called once only during probe.h]hVThis function initializes the xe_pcode component. To be called once only during probe.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM=hj6 ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubh)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_pcode_probe_early (C function)c.xe_pcode_probe_earlyhNtauh1hhhhhhNhNubj )}(hhh](j)}(h/int xe_pcode_probe_early (struct xe_device *xe)h]j)}(h.int xe_pcode_probe_early(struct xe_device *xe)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]j)ah"]h$]h&]uh1jhj hhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMFubj/)}(h h]h }(hj hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj hhhj hMFubj@)}(hxe_pcode_probe_earlyh]jF)}(hxe_pcode_probe_earlyh]hxe_pcode_probe_early}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubah}(h]h ](jYjZeh"]h$]h&]hhuh1j?hj hhhj hMFubj_)}(h(struct xe_device *xe)h]je)}(hstruct xe_device *xeh](jk)}(hjnh]hstruct}(hj hhhNhNubah}(h]h ]jwah"]h$]h&]uh1jjhj ubj/)}(h h]h }(hj% hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj ubh)}(hhh]jF)}(h xe_deviceh]h xe_device}(hj6 hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj3 ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8 modnameN classnameNjj)}j]j)}jj sbc.xe_pcode_probe_earlyasbuh1hhj ubj/)}(h h]h }(hjV hhhNhNubah}(h]h ]j;ah"]h$]h&]uh1j.hj ubj)}(hjh]h*}(hjd hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjF)}(hxeh]hxe}(hjq hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jdhj ubah}(h]h ]h"]h$]h&]hhuh1j^hj hhhj hMFubeh}(h]h ]h"]h$]h&]hhjJuh1jjKjLhj hhhj hMFubah}(h]j ah ](jPjQeh"]h$]h&]jUjV)jWhuh1jhj hMFhj hhubjY)}(hhh]h)}(hinitializes PCODEh]hinitializes PCODE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMFhj hhubah}(h]h ]h"]h$]h&]uh1jXhj hhhj hMFubeh}(h]h ](jfunctioneh"]h$]h&]jyjjzj j{j j|j}j~uh1j hhhhhNhNubj)}(h**Parameters** ``struct xe_device *xe`` xe instance **Description** This function checks the initialization status of PCODE To be called once only during early probe without locks. Returns 0 on success, error code otherwiseh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMJhj ubj)}(hhh]j)}(h%``struct xe_device *xe`` xe instance h](j)}(h``struct xe_device *xe``h]j)}(hj h]hstruct xe_device *xe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMGhj ubj)}(hhh]h)}(h xe instanceh]h xe instance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMGhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMGhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMIhj ubh)}(hpThis function checks the initialization status of PCODE To be called once only during early probe without locks.h]hpThis function checks the initialization status of PCODE To be called once only during early probe without locks.}(hj- hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMIhj ubh)}(h*Returns 0 on success, error code otherwiseh]h*Returns 0 on success, error code otherwise}(hj< hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMLhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubeh}(h] internal-apiah ]h"] internal apiah$]h&]uh1hhhhhhhhK ubeh}(h]pcodeah ]h"]pcodeah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hBoot Survivabilityh]hBoot Survivability}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjb hhhhhKubh)}(hBoot Survivability is a software based workflow for recovering a system in a failed boot state Here system recoverability is concerned with recovering the firmware responsible for boot.h]hBoot Survivability is a software based workflow for recovering a system in a failed boot state Here system recoverability is concerned with recovering the firmware responsible for boot.}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chKhjb hhubh)}(hX&This is implemented by loading the driver with bare minimum (no drm card) to allow the firmware to be flashed through mei and collect telemetry. The driver's probe flow is modified such that it enters survivability mode when pcode initialization is incomplete and boot status denotes a failure.h]hX(This is implemented by loading the driver with bare minimum (no drm card) to allow the firmware to be flashed through mei and collect telemetry. The driver’s probe flow is modified such that it enters survivability mode when pcode initialization is incomplete and boot status denotes a failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chKhjb hhubh)}(hXpSurvivability mode can also be entered manually using the survivability mode attribute available through configfs which is beneficial in several usecases. It can be used to address scenarios where pcode does not detect failure or for validation purposes. It can also be used in In-Field-Repair (IFR) to repair a single card without impacting the other cards in a node.h]hXpSurvivability mode can also be entered manually using the survivability mode attribute available through configfs which is beneficial in several usecases. It can be used to address scenarios where pcode does not detect failure or for validation purposes. It can also be used in In-Field-Repair (IFR) to repair a single card without impacting the other cards in a node.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK hjb hhubh)}(h6Use below command enable survivability mode manually::h]h5Use below command enable survivability mode manually:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK%hjb hhubh literal_block)}(h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_modeh]h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode}hj sbah}(h]h ]h"]h$]h&]hhuh1j hj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK'hjb hhubh)}(h@Refer :ref:`xe_configfs` for more details on how to use configfsh](hRefer }(hj hhhNhNubh)}(h:ref:`xe_configfs`h]hinline)}(hj h]h xe_configfs}(hj hhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_pcode refdomainj reftyperef refexplicitrefwarn reftarget xe_configfsuh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK)hj ubh( for more details on how to use configfs}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK)hjb hhubh)}(htSurvivability mode is indicated by the below admin-only readable sysfs which provides additional debug information::h]hsSurvivability mode is indicated by the below admin-only readable sysfs which provides additional debug information:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK+hjb hhubj )}(h//sys/bus/pci/devices//surivability_modeh]h//sys/bus/pci/devices//surivability_mode}hjsbah}(h]h ]h"]h$]h&]hhuh1j hj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK.hjb hhubj)}(hhh](j)}(h,Capability Information: Provides boot statush](j)}(hCapability Information:h]hCapability Information:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK0hjubj)}(hhh]h)}(hProvides boot statush]hProvides boot status}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:20: ./drivers/gpu/drm/xe/xe_survivability_mode.chK1hj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj+hK0hjubj)}(h