sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget#/translations/zh_CN/gpu/xe/xe_pcodemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/zh_TW/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/it_IT/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ja_JP/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ko_KR/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/pt_BR/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/sp_SP/gpu/xe/xe_pcodemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh=/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode.rsthKubhsection)}(hhh](htitle)}(hPcodeh]hPcode}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hX+Xe PCODE is the component responsible for interfacing with the PCODE firmware. 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All read and write operations to PCODE will be internal and private to this component.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:7: ./drivers/gpu/drm/xe/xe_pcode.chKhhhhubh)}(h>What's next: - PCODE hw metrics - PCODE for display operationsh]h@What’s next: - PCODE hw metrics - PCODE for display operations}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:7: ./drivers/gpu/drm/xe/xe_pcode.chKhhhhubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singlexe_pcode_request (C function)c.xe_pcode_requesthNtauh1jhhhhhNhNubhdesc)}(hhh](hdesc_signature)}(hrint xe_pcode_request (struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms)h]hdesc_signature_line)}(hqint xe_pcode_request(struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms)h](hdesc_sig_keyword_type)}(hinth]hint}(hj2hhhNhNubah}(h]h ]ktah"]h$]h&]uh1j0hj,hhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKubhdesc_sig_space)}(h h]h }(hjDhhhNhNubah}(h]h ]wah"]h$]h&]uh1jBhj,hhhjAhKubh desc_name)}(hxe_pcode_requesth]h desc_sig_name)}(hxe_pcode_requesth]hxe_pcode_request}(hj[hhhNhNubah}(h]h ]nah"]h$]h&]uh1jYhjUubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jShj,hhhjAhKubhdesc_parameterlist)}(h](struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms)h](hdesc_parameter)}(hstruct xe_tile *tileh](hdesc_sig_keyword)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1j~hjzubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjzubh)}(hhh]jZ)}(hxe_tileh]hxe_tile}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomaincreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}jj]sbc.xe_pcode_requestasbuh1hhjzubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjzubhdesc_sig_punctuation)}(h*h]h*}(hjhhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjzubjZ)}(htileh]htile}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjzubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjtubjy)}(hu32 mboxh](h)}(hhh]jZ)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjubjC)}(h h]h }(hj"hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubjZ)}(hmboxh]hmbox}(hj0hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjtubjy)}(h u32 requesth](h)}(hhh]jZ)}(hu32h]hu32}(hjLhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjNmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjEubjC)}(h h]h }(hjjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjEubjZ)}(hrequesth]hrequest}(hjxhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjEubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjtubjy)}(hu32 reply_maskh](h)}(hhh]jZ)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubjZ)}(h reply_maskh]h reply_mask}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjtubjy)}(h u32 replyh](h)}(hhh]jZ)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.xe_pcode_requestasbuh1hhjubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubjZ)}(hreplyh]hreply}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjtubjy)}(hint timeout_base_msh](j1)}(hinth]hint}(hj!hhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hjubjC)}(h h]h }(hj/hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubjZ)}(htimeout_base_msh]htimeout_base_ms}(hj=hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjtubeh}(h]h ]h"]h$]h&]hhuh1jrhj,hhhjAhKubeh}(h]h ]h"]h$]h&]hhƌ add_permalinkuh1j*sphinx_line_type declaratorhj&hhhjAhKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j$hjAhKhj!hhubh desc_content)}(hhh]h)}(h'send PCODE request until acknowledgmenth]h'send PCODE request until acknowledgment}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjnhhubah}(h]h ]h"]h$]h&]uh1jlhj!hhhjAhKubeh}(h]h ](jfunctioneh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhhhNhNubh container)}(hXg**Parameters** ``struct xe_tile *tile`` tile ``u32 mbox`` PCODE mailbox ID the request is targeted for ``u32 request`` request ID ``u32 reply_mask`` mask used to check for request acknowledgment ``u32 reply`` value used to check for request acknowledgment ``int timeout_base_ms`` timeout for polling with preemption enabled **Description** Keep resending the **request** to **mbox** until PCODE acknowledges it, PCODE reports an error or an overall timeout of **timeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply** after applying **reply_mask**. Polling is first attempted with preemption enabled for **timeout_base_ms** and if this times out for another 50 ms with preemption disabled. Returns 0 on success, ``-ETIMEDOUT`` in case of a timeout, <0 in case of some other error as reported by PCODE.h](h)}(h**Parameters**h]hstrong)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubhdefinition_list)}(hhh](hdefinition_list_item)}(h``struct xe_tile *tile`` tile h](hterm)}(h``struct xe_tile *tile``h]hliteral)}(hjh]hstruct xe_tile *tile}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubh definition)}(hhh]h)}(htileh]htile}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h:``u32 mbox`` PCODE mailbox ID the request is targeted for h](j)}(h ``u32 mbox``h]j)}(hjh]hu32 mbox}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h,PCODE mailbox ID the request is targeted forh]h,PCODE mailbox ID the request is targeted for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h``u32 request`` request ID h](j)}(h``u32 request``h]j)}(hj8h]h u32 request}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhj2ubj)}(hhh]h)}(h request IDh]h request ID}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKhjNubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhjMhKhjubj)}(hA``u32 reply_mask`` mask used to check for request acknowledgment h](j)}(h``u32 reply_mask``h]j)}(hjqh]hu32 reply_mask}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjkubj)}(hhh]h)}(h-mask used to check for request acknowledgmenth]h-mask used to check for request acknowledgment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h=``u32 reply`` value used to check for request acknowledgment h](j)}(h ``u32 reply``h]j)}(hjh]h u32 reply}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h.value used to check for request acknowledgmenth]h.value used to check for request acknowledgment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hD``int timeout_base_ms`` timeout for polling with preemption enabled h](j)}(h``int timeout_base_ms``h]j)}(hjh]hint timeout_base_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h+timeout for polling with preemption enabledh]h+timeout for polling with preemption enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubh)}(hXKeep resending the **request** to **mbox** until PCODE acknowledges it, PCODE reports an error or an overall timeout of **timeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply** after applying **reply_mask**. Polling is first attempted with preemption enabled for **timeout_base_ms** and if this times out for another 50 ms with preemption disabled.h](hKeep resending the }(hj4hhhNhNubj)}(h **request**h]hrequest}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubh to }(hj4hhhNhNubj)}(h**mbox**h]hmbox}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubhN until PCODE acknowledges it, PCODE reports an error or an overall timeout of }(hj4hhhNhNubj)}(hj**timeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply**h]hftimeout_base_ms**+50 ms expires. The request is acknowledged once the PCODE reply dword equals **reply}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubh after applying }(hj4hhhNhNubj)}(h**reply_mask**h]h reply_mask}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubh9. Polling is first attempted with preemption enabled for }(hj4hhhNhNubj)}(h**timeout_base_ms**h]htimeout_base_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubhB and if this times out for another 50 ms with preemption disabled.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubh)}(hoReturns 0 on success, ``-ETIMEDOUT`` in case of a timeout, <0 in case of some other error as reported by PCODE.h](hReturns 0 on success, }(hjhhhNhNubj)}(h``-ETIMEDOUT``h]h -ETIMEDOUT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhK in case of a timeout, <0 in case of some other error as reported by PCODE.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_pcode_init_min_freq_table (C function)c.xe_pcode_init_min_freq_tablehNtauh1jhhhhhNhNubj )}(hhh](j%)}(hYint xe_pcode_init_min_freq_table (struct xe_tile *tile, u32 min_gt_freq, u32 max_gt_freq)h]j+)}(hXint xe_pcode_init_min_freq_table(struct xe_tile *tile, u32 min_gt_freq, u32 max_gt_freq)h](j1)}(hinth]hint}(hjhhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjhhhjhKubjT)}(hxe_pcode_init_min_freq_tableh]jZ)}(hxe_pcode_init_min_freq_tableh]hxe_pcode_init_min_freq_table}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ](jmjneh"]h$]h&]hhuh1jShjhhhjhKubjs)}(h8(struct xe_tile *tile, u32 min_gt_freq, u32 max_gt_freq)h](jy)}(hstruct xe_tile *tileh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j~hjubjC)}(h h]h }(hj(hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubh)}(hhh]jZ)}(hxe_tileh]hxe_tile}(hj9hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj;modnameN classnameNjj)}j]j)}jjsbc.xe_pcode_init_min_freq_tableasbuh1hhjubjC)}(h h]h }(hjYhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubj)}(hjh]h*}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjZ)}(htileh]htile}(hjthhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjubjy)}(hu32 min_gt_freqh](h)}(hhh]jZ)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jUc.xe_pcode_init_min_freq_tableasbuh1hhjubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubjZ)}(h min_gt_freqh]h min_gt_freq}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjubjy)}(hu32 max_gt_freqh](h)}(hhh]jZ)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jUc.xe_pcode_init_min_freq_tableasbuh1hhjubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubjZ)}(h max_gt_freqh]h max_gt_freq}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjubeh}(h]h ]h"]h$]h&]hhuh1jrhjhhhjhKubeh}(h]h ]h"]h$]h&]hhj^uh1j*j_j`hjhhhjhKubah}(h]jah ](jdjeeh"]h$]h&]jijj)jkhuh1j$hjhKhjhhubjm)}(hhh]h)}(h&Initialize PCODE's QOS frequency tableh]h(Initialize PCODE’s QOS frequency table}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhj+hhubah}(h]h ]h"]h$]h&]uh1jlhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjFjjFjjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct xe_tile *tile`` tile instance ``u32 min_gt_freq`` Minimal (RPn) GT frequency in units of 50MHz. ``u32 max_gt_freq`` Maximal (RP0) GT frequency in units of 50MHz. **Description** This function initialize PCODE's QOS frequency table for a proper minimal frequency/power steering decision, depending on the current requested GT frequency. For older platforms this was a more complete table including the IA freq. However for the latest platforms this table become a simple 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might not take the right decisions for some memory frequencies and affect latency. It returns 0 on success, and -ERROR number on failure, -EINVAL if max frequency is higher then the minimal, and other errors directly translated from the PCODE Error returns: - -ENXIO: "Illegal Command" - -ETIMEDOUT: "Timed out" - -EINVAL: "Illegal Data" - -ENXIO, "Illegal Subcommand" - -EBUSY: "PCODE Locked" - -EOVERFLOW, "GT ratio out of range" - -EACCES, "PCODE Rejected" - -EPROTO, "Unknown"h](h)}(h**Parameters**h]j)}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjJubj)}(hhh](j)}(h'``struct xe_tile *tile`` tile instance h](j)}(h``struct xe_tile *tile``h]j)}(hjoh]hstruct xe_tile *tile}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjiubj)}(hhh]h)}(h tile instanceh]h tile instance}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jhjhKhjfubj)}(hB``u32 min_gt_freq`` Minimal (RPn) GT frequency in units of 50MHz. h](j)}(h``u32 min_gt_freq``h]j)}(hjh]hu32 min_gt_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h-Minimal (RPn) GT frequency in units of 50MHz.h]h-Minimal (RPn) GT frequency in units of 50MHz.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjfubj)}(hB``u32 max_gt_freq`` Maximal (RP0) GT frequency in units of 50MHz. h](j)}(h``u32 max_gt_freq``h]j)}(hjh]hu32 max_gt_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjubj)}(hhh]h)}(h-Maximal (RP0) GT frequency in units of 50MHz.h]h-Maximal (RP0) GT frequency in units of 50MHz.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjfubeh}(h]h ]h"]h$]h&]uh1jhjJubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjJubh)}(hXThis function initialize PCODE's QOS frequency table for a proper minimal frequency/power steering decision, depending on the current requested GT frequency. For older platforms this was a more complete table including the IA freq. However for the latest platforms this table become a simple 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might not take the right decisions for some memory frequencies and affect latency.h]hXThis function initialize PCODE’s QOS frequency table for a proper minimal frequency/power steering decision, depending on the current requested GT frequency. For older platforms this was a more complete table including the IA freq. However for the latest platforms this table become a simple 1-1 Ring vs GT frequency. Even though, without setting it, PCODE might not take the right decisions for some memory frequencies and affect latency.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjJubh)}(hXIt returns 0 on success, and -ERROR number on failure, -EINVAL if max frequency is higher then the minimal, and other errors directly translated from the PCODE Error returns: - -ENXIO: "Illegal Command" - -ETIMEDOUT: "Timed out" - -EINVAL: "Illegal Data" - -ENXIO, "Illegal Subcommand" - -EBUSY: "PCODE Locked" - -EOVERFLOW, "GT ratio out of range" - -EACCES, "PCODE Rejected" - -EPROTO, "Unknown"h]hXIt returns 0 on success, and -ERROR number on failure, -EINVAL if max frequency is higher then the minimal, and other errors directly translated from the PCODE Error returns: - -ENXIO: “Illegal Command” - -ETIMEDOUT: “Timed out” - -EINVAL: “Illegal Data” - -ENXIO, “Illegal Subcommand” - -EBUSY: “PCODE Locked” - -EOVERFLOW, “GT ratio out of range” - -EACCES, “PCODE Rejected” - -EPROTO, “Unknown”}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chKhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_pcode_ready (C function)c.xe_pcode_readyhNtauh1jhhhhhNhNubj )}(hhh](j%)}(h6int xe_pcode_ready (struct xe_device *xe, bool locked)h]j+)}(h5int xe_pcode_ready(struct xe_device *xe, bool locked)h](j1)}(hinth]hint}(hjphhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hjlhhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjlhhhj~hMubjT)}(hxe_pcode_readyh]jZ)}(hxe_pcode_readyh]hxe_pcode_ready}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ](jmjneh"]h$]h&]hhuh1jShjlhhhj~hMubjs)}(h#(struct xe_device *xe, bool locked)h](jy)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j~hjubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubh)}(hhh]jZ)}(h xe_deviceh]h xe_device}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.xe_pcode_readyasbuh1hhjubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjZ)}(hxeh]hxe}(hj hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjubjy)}(h bool lockedh](j1)}(hboolh]hbool}(hj hhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hj ubjC)}(h h]h }(hj- hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj ubjZ)}(hlockedh]hlocked}(hj; hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjubeh}(h]h ]h"]h$]h&]hhuh1jrhjlhhhj~hMubeh}(h]h ]h"]h$]h&]hhj^uh1j*j_j`hjhhhhj~hMubah}(h]jcah ](jdjeeh"]h$]h&]jijj)jkhuh1j$hj~hMhjehhubjm)}(hhh]h)}(hEnsure PCODE is initializedh]hEnsure PCODE is initialized}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhjb hhubah}(h]h ]h"]h$]h&]uh1jlhjehhhj~hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj} jj} jjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` xe instance ``bool locked`` true if lock held, false otherwise **Description** PCODE init mailbox is polled only on root gt of root tile as the root tile provides the initialization is complete only after all the tiles have completed the initialization. Called only on early probe without locks and with locks in resume path. Returns 0 on success, and -error number on failure.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM"hj ubj)}(hhh](j)}(h%``struct xe_device *xe`` xe instance h](j)}(h``struct xe_device *xe``h]j)}(hj h]hstruct xe_device *xe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhj ubj)}(hhh]h)}(h xe instanceh]h xe instance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubj)}(h3``bool locked`` true if lock held, false otherwise h](j)}(h``bool locked``h]j)}(hj h]h bool locked}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM hj ubj)}(hhh]h)}(h"true if lock held, false otherwiseh]h"true if lock held, false otherwise}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hM hj ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM"hj ubh)}(hPCODE init mailbox is polled only on root gt of root tile as the root tile provides the initialization is complete only after all the tiles have completed the initialization. Called only on early probe without locks and with locks in resume path.h]hPCODE init mailbox is polled only on root gt of root tile as the root tile provides the initialization is complete only after all the tiles have completed the initialization. Called only on early probe without locks and with locks in resume path.}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM!hj ubh)}(h3Returns 0 on success, and -error number on failure.h]h3Returns 0 on success, and -error number on failure.}(hj? hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM'hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j xe_pcode_init_early (C function)c.xe_pcode_init_earlyhNtauh1jhhhhhNhNubj )}(hhh](j%)}(h.int xe_pcode_init_early (struct xe_tile *tile)h]j+)}(h-int xe_pcode_init_early(struct xe_tile *tile)h](j1)}(hinth]hint}(hjn hhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hjj hhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMJubjC)}(h h]h }(hj} hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjj hhhj| hMJubjT)}(hxe_pcode_init_earlyh]jZ)}(hxe_pcode_init_earlyh]hxe_pcode_init_early}(hj hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubah}(h]h ](jmjneh"]h$]h&]hhuh1jShjj hhhj| hMJubjs)}(h(struct xe_tile *tile)h]jy)}(hstruct xe_tile *tileh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j~hj ubjC)}(h h]h }(hj hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj ubh)}(hhh]jZ)}(hxe_tileh]hxe_tile}(hj hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj sbc.xe_pcode_init_earlyasbuh1hhj ubjC)}(h h]h }(hj hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjZ)}(htileh]htile}(hj hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhj ubah}(h]h ]h"]h$]h&]hhuh1jrhjj hhhj| hMJubeh}(h]h ]h"]h$]h&]hhj^uh1j*j_j`hjf hhhj| hMJubah}(h]ja ah ](jdjeeh"]h$]h&]jijj)jkhuh1j$hj| hMJhjc hhubjm)}(hhh]h)}(hInitialize components of PCODEh]hInitialize components of PCODE}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMJhj+ hhubah}(h]h ]h"]h$]h&]uh1jlhjc hhhj| hMJubeh}(h]h ](jfunctioneh"]h$]h&]jjjjF jjF jjjuh1jhhhhhNhNubj)}(h**Parameters** ``struct xe_tile *tile`` tile instance **Description** This function initializes the xe_pcode component. To be called once only during probe. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j)}(hjP h]h Parameters}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjN ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMNhjJ ubj)}(hhh]j)}(h'``struct xe_tile *tile`` tile instance h](j)}(h``struct xe_tile *tile``h]j)}(hjo h]hstruct xe_tile *tile}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjm ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMKhji ubj)}(hhh]h)}(h tile instanceh]h tile instance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMKhj ubah}(h]h ]h"]h$]h&]uh1jhji ubeh}(h]h ]h"]h$]h&]uh1jhj hMKhjf ubah}(h]h ]h"]h$]h&]uh1jhjJ ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMMhjJ ubh)}(hVThis function initializes the xe_pcode component. To be called once only during probe.h]hVThis function initializes the xe_pcode component. To be called once only during probe.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMLhjJ ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMOhjJ ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMPhjJ ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_pcode_probe_early (C function)c.xe_pcode_probe_earlyhNtauh1jhhhhhNhNubj )}(hhh](j%)}(h/int xe_pcode_probe_early (struct xe_device *xe)h]j+)}(h.int xe_pcode_probe_early(struct xe_device *xe)h](j1)}(hinth]hint}(hj hhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hj hhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMXubjC)}(h h]h }(hj% hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj hhhj$ hMXubjT)}(hxe_pcode_probe_earlyh]jZ)}(hxe_pcode_probe_earlyh]hxe_pcode_probe_early}(hj7 hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj3 ubah}(h]h ](jmjneh"]h$]h&]hhuh1jShj hhhj$ hMXubjs)}(h(struct xe_device *xe)h]jy)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hjS hhhNhNubah}(h]h ]jah"]h$]h&]uh1j~hjO ubjC)}(h h]h }(hj` hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjO ubh)}(hhh]jZ)}(h xe_deviceh]h xe_device}(hjq hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjn ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjs modnameN classnameNjj)}j]j)}jj9 sbc.xe_pcode_probe_earlyasbuh1hhjO ubjC)}(h h]h }(hj hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjO ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO ubjZ)}(hxeh]hxe}(hj hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjO ubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhjK ubah}(h]h ]h"]h$]h&]hhuh1jrhj hhhj$ hMXubeh}(h]h ]h"]h$]h&]hhj^uh1j*j_j`hj hhhj$ hMXubah}(h]j ah ](jdjeeh"]h$]h&]jijj)jkhuh1j$hj$ hMXhj hhubjm)}(hhh]h)}(hinitializes PCODEh]hinitializes PCODE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMXhj hhubah}(h]h ]h"]h$]h&]uh1jlhj hhhj$ hMXubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubj)}(h**Parameters** ``struct xe_device *xe`` xe instance **Description** This function checks the initialization status of PCODE To be called once only during early probe without locks. Returns 0 on success, error code otherwiseh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM\hj ubj)}(hhh]j)}(h%``struct xe_device *xe`` xe instance h](j)}(h``struct xe_device *xe``h]j)}(hj h]hstruct xe_device *xe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMYhj ubj)}(hhh]h)}(h xe instanceh]h xe instance}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj, hMYhj- ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj, hMYhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjR h]h Description}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjP ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM[hj ubh)}(hpThis function checks the initialization status of PCODE To be called once only during early probe without locks.h]hpThis function checks the initialization status of PCODE To be called once only during early probe without locks.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMZhj ubh)}(h*Returns 0 on success, error code otherwiseh]h*Returns 0 on success, error code otherwise}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chM]hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_get_pcode_version (C function)c.xe_get_pcode_versionhNtauh1jhhhhhNhNubj )}(hhh](j%)}(hQint xe_get_pcode_version (struct xe_device *xe, struct xe_pcode_version *version)h]j+)}(hPint xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version)h](j1)}(hinth]hint}(hj hhhNhNubah}(h]h ]j=ah"]h$]h&]uh1j0hj hhh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMgubjC)}(h h]h }(hj hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj hhhj hMgubjT)}(hxe_get_pcode_versionh]jZ)}(hxe_get_pcode_versionh]hxe_get_pcode_version}(hj hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubah}(h]h ](jmjneh"]h$]h&]hhuh1jShj hhhj hMgubjs)}(h8(struct xe_device *xe, struct xe_pcode_version *version)h](jy)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j~hj ubjC)}(h h]h }(hj hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj ubh)}(hhh]jZ)}(h xe_deviceh]h xe_device}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj sbc.xe_get_pcode_versionasbuh1hhj ubjC)}(h h]h }(hj!hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj ubj)}(hjh]h*}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjZ)}(hxeh]hxe}(hj<hhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhj ubjy)}(h struct xe_pcode_version *versionh](j)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1j~hjQubjC)}(h h]h }(hjbhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjQubh)}(hhh]jZ)}(hxe_pcode_versionh]hxe_pcode_version}(hjshhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]jc.xe_get_pcode_versionasbuh1hhjQubjC)}(h h]h }(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjQubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubjZ)}(hversionh]hversion}(hjhhhNhNubah}(h]h ]jfah"]h$]h&]uh1jYhjQubeh}(h]h ]h"]h$]h&]noemphhhuh1jxhj ubeh}(h]h ]h"]h$]h&]hhuh1jrhj hhhj hMgubeh}(h]h ]h"]h$]h&]hhj^uh1j*j_j`hj hhhj hMgubah}(h]j ah ](jdjeeh"]h$]h&]jijj)jkhuh1j$hj hMghj hhubjm)}(hhh]h)}(h$Read pcode version via PMT telemetryh]h$Read pcode version via PMT telemetry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMghjhhubah}(h]h ]h"]h$]h&]uh1jlhj hhhj hMgubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubj)}(hX=**Parameters** ``struct xe_device *xe`` xe instance ``struct xe_pcode_version *version`` pointer to struct xe_pcode_version to store version info **Description** Reads the pcode version from PMT telemetry and fills the provided **version** structure. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMkhjubj)}(hhh](j)}(h%``struct xe_device *xe`` xe instance h](j)}(h``struct xe_device *xe``h]j)}(hjh]hstruct xe_device *xe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMhhjubj)}(hhh]h)}(h xe instanceh]h xe instance}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhhj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj,hMhhjubj)}(h^``struct xe_pcode_version *version`` pointer to struct xe_pcode_version to store version info h](j)}(h$``struct xe_pcode_version *version``h]j)}(hjPh]h struct xe_pcode_version *version}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjNubah}(h]h ]h"]h$]h&]uh1jh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMihjJubj)}(hhh]h)}(h8pointer to struct xe_pcode_version to store version infoh]h8pointer to struct xe_pcode_version to store version info}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMihjfubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jhjehMihjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMkhjubh)}(hXReads the pcode version from PMT telemetry and fills the provided **version** structure.h](hBReads the pcode version from PMT telemetry and fills the provided }(hjhhhNhNubj)}(h **version**h]hversion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh structure.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMjhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMmhjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:13: ./drivers/gpu/drm/xe/xe_pcode.chMnhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubhtarget)}(h.. _xe-survivability-mode:h]h}(h]h ]h"]h$]h&]refidxe-survivability-modeuh1jhKhhhhhhubeh}(h] internal-apiah ]h"] internal apiah$]h&]uh1hhhhhhhhK ubeh}(h]pcodeah ]h"]pcodeah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hSurvivability Modeh]hSurvivability Mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hSurvivability Mode is a software based workflow for recovering a system in a failed boot state Here system recoverability is concerned with recovering the firmware responsible for boot.h]hSurvivability Mode is a software based workflow for recovering a system in a failed boot state Here system recoverability is concerned with recovering the firmware responsible for boot.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKhjhhubh)}(hhh](h)}(hBoot Survivabilityh]hBoot Survivability}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hNhNubh)}(hX;Boot Survivability is implemented by loading the driver with bare minimum (no drm card) to allow the firmware to be flashed through mei driver and collect telemetry. The driver's probe flow is modified such that it enters survivability mode when pcode initialization is incomplete and boot status denotes a failure.h]hX=Boot Survivability is implemented by loading the driver with bare minimum (no drm card) to allow the firmware to be flashed through mei driver and collect telemetry. The driver’s probe flow is modified such that it enters survivability mode when pcode initialization is incomplete and boot status denotes a failure.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKhj.ubh)}(hXpSurvivability mode can also be entered manually using the survivability mode attribute available through configfs which is beneficial in several usecases. It can be used to address scenarios where pcode does not detect failure or for validation purposes. It can also be used in In-Field-Repair (IFR) to repair a single card without impacting the other cards in a node.h]hXpSurvivability mode can also be entered manually using the survivability mode attribute available through configfs which is beneficial in several usecases. It can be used to address scenarios where pcode does not detect failure or for validation purposes. It can also be used in In-Field-Repair (IFR) to repair a single card without impacting the other cards in a node.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK"hj.ubh)}(h6Use below command enable survivability mode manually::h]h5Use below command enable survivability mode manually:}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK'hj.ubh literal_block)}(h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_modeh]h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode}hjnsbah}(h]h ]h"]h$]h&]hhuh1jlhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK)hj.ubh)}(hWIt is the responsibility of the user to clear the mode once firmware flash is complete.h]hWIt is the responsibility of the user to clear the mode once firmware flash is complete.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK+hj.ubh)}(h@Refer :ref:`xe_configfs` for more details on how to use configfsh](hRefer }(hjhhhNhNubh)}(h:ref:`xe_configfs`h]hinline)}(hjh]h xe_configfs}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_pcode refdomainjreftyperef refexplicitrefwarn reftarget xe_configfsuh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK-hjubh( for more details on how to use configfs}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK-hj.ubh)}(hSurvivability mode is indicated by the below admin-only readable sysfs entry. It provides information about the type of survivability mode (Boot/Runtime).h]hSurvivability mode is indicated by the below admin-only readable sysfs entry. It provides information about the type of survivability mode (Boot/Runtime).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK/hj.ubjm)}(h=# cat /sys/bus/pci/devices//survivability_mode Booth]h=# cat /sys/bus/pci/devices//survivability_mode Boot}hjsbah}(h]h ]h"]h$]h&]hhƌforcelanguageshellhighlight_args}uh1jlhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK2hj.ubh)}(hhAny additional debug information if present will be visible under the directory ``survivability_info``::h](hPAny additional debug information if present will be visible under the directory }(hjhhhNhNubj)}(h``survivability_info``h]hsurvivability_info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK7hj.ubjm)}(h/sys/bus/pci/devices//survivability_info/ ├── aux_info0 ├── aux_info1 ├── aux_info2 ├── aux_info3 ├── aux_info4 ├── capability_info ├── fdo_mode ├── postcode_trace └── postcode_trace_overflowh]h/sys/bus/pci/devices//survivability_info/ ├── aux_info0 ├── aux_info1 ├── aux_info2 ├── aux_info3 ├── aux_info4 ├── capability_info ├── fdo_mode ├── postcode_trace └── postcode_trace_overflow}hjsbah}(h]h ]h"]h$]h&]hhuh1jlhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK:hj.ubh)}(h+This directory has the following attributesh]h+This directory has the following attributes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKEhj.ubh bullet_list)}(hhh](h list_item)}(hS``capability_info`` : Indicates Boot status and support for additional information h]h)}(hR``capability_info`` : Indicates Boot status and support for additional informationh](j)}(h``capability_info``h]hcapability_info}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubh? : Indicates Boot status and support for additional information}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKGhj-ubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(h``postcode_trace``, ``postcode_trace_overflow`` : Each postcode is a 8bit value and represents a boot failure event. When a new failure event is logged by PCODE the existing postcodes are shifted left. These entries provide a history of 8 postcodes. h]h)}(h``postcode_trace``, ``postcode_trace_overflow`` : Each postcode is a 8bit value and represents a boot failure event. When a new failure event is logged by PCODE the existing postcodes are shifted left. These entries provide a history of 8 postcodes.h](j)}(h``postcode_trace``h]hpostcode_trace}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubh, }(hjXhhhNhNubj)}(h``postcode_trace_overflow``h]hpostcode_trace_overflow}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubh : Each postcode is a 8bit value and represents a boot failure event. When a new failure event is logged by PCODE the existing postcodes are shifted left. These entries provide a history of 8 postcodes.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKIhjTubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(hB``aux_info`` : Some failures have additional debug information h]h)}(hA``aux_info`` : Some failures have additional debug informationh](j)}(h``aux_info``h]h aux_info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh2 : Some failures have additional debug information}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKMhjubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(hXb``fdo_mode`` : To allow recovery in scenarios where MEI itself fails, a new SPI Flash Descriptor Override (FDO) mode is added in v2 survivability breadcrumbs. This mode is enabled by PCODE and provides the ability to directly update the firmware via SPI Driver without any dependency on MEI. Xe KMD initializes the nvm aux driver if FDO mode is enabled. h]h)}(hXa``fdo_mode`` : To allow recovery in scenarios where MEI itself fails, a new SPI Flash Descriptor Override (FDO) mode is added in v2 survivability breadcrumbs. This mode is enabled by PCODE and provides the ability to directly update the firmware via SPI Driver without any dependency on MEI. Xe KMD initializes the nvm aux driver if FDO mode is enabled.h](j)}(h ``fdo_mode``h]hfdo_mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhXU : To allow recovery in scenarios where MEI itself fails, a new SPI Flash Descriptor Override (FDO) mode is added in v2 survivability breadcrumbs. This mode is enabled by PCODE and provides the ability to directly update the firmware via SPI Driver without any dependency on MEI. Xe KMD initializes the nvm aux driver if FDO mode is enabled.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKOhjubah}(h]h ]h"]h$]h&]uh1j+hj(ubeh}(h]h ]h"]h$]h&]bullet-uh1j&hjMhKGhj.ubeh}(h]boot-survivabilityah ]h"]boot survivabilityah$]h&]uh1hhjhhhNhNubh)}(hhh](h)}(hRuntime Survivabilityh]hRuntime Survivability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hXCertain runtime firmware errors can cause the device to enter a wedged state (:ref:`xe-device-wedging`) requiring a firmware flash to restore normal operation. Runtime Survivability Mode indicates that a firmware flash is necessary to recover the device and is indicated by the presence of survivability mode sysfs. Survivability mode sysfs provides information about the type of survivability mode.h](hNCertain runtime firmware errors can cause the device to enter a wedged state (}(hjhhhNhNubh)}(h:ref:`xe-device-wedging`h]j)}(hjh]hxe-device-wedging}(hjhhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftyperef refexplicitrefwarnjxe-device-wedginguh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKWhjubhX)) requiring a firmware flash to restore normal operation. Runtime Survivability Mode indicates that a firmware flash is necessary to recover the device and is indicated by the presence of survivability mode sysfs. Survivability mode sysfs provides information about the type of survivability mode.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj$hKWhjubjm)}(h@# cat /sys/bus/pci/devices//survivability_mode Runtimeh]h@# cat /sys/bus/pci/devices//survivability_mode Runtime}hj/sbah}(h]h ]h"]h$]h&]hhjjshellj}uh1jlhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chK]hjubh)}(hOn some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below sysfs entry.h]hOn some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below sysfs entry.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKbhjubjm)}(hI# cat /sys/bus/pci/devices//survivability_info/fdo_mode enabledh]hI# cat /sys/bus/pci/devices//survivability_info/fdo_mode enabled}hjOsbah}(h]h ]h"]h$]h&]hhjjshellj}uh1jlhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKfhjubh)}(hWhen such errors occur, userspace is notified with the drm device wedged uevent and runtime survivability mode. User can then initiate a firmware flash using userspace tools like fwupd to restore device to normal operation.h]hWhen such errors occur, userspace is notified with the drm device wedged uevent and runtime survivability mode. User can then initiate a firmware flash using userspace tools like fwupd to restore device to normal operation.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_pcode:22: ./drivers/gpu/drm/xe/xe_survivability_mode.chKkhjubeh}(h]runtime-survivabilityah ]h"]runtime survivabilityah$]h&]uh1hhjhhhNhNubeh}(h](survivability-modejeh ]h"](survivability modexe-survivability-modeeh$]h&]uh1hhhhhhhhKexpect_referenced_by_name}j}jsexpect_referenced_by_id}jjsubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehnj _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}j]jasnameids}(j jjjj}jj|jyjjjtjqu nametypes}(j jj}j|jjtuh}(jhjhjj&jjjcjhja jf j j j j jjjyjjj.jqju footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages]hsystem_message)}(hhh]h)}(hhh]h;Hyperlink target "xe-survivability-mode" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypeINFOsourcehnjlineKuh1j uba transformerN include_log] decorationNhhub.