€•è       Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ$/translations/zh_CN/gpu/xe/xe_gt_mcr”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/zh_TW/gpu/xe/xe_gt_mcr”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/it_IT/gpu/xe/xe_gt_mcr”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/ja_JP/gpu/xe/xe_gt_mcr”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/ko_KR/gpu/xe/xe_gt_mcr”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/sp_SP/gpu/xe/xe_gt_mcr”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ*SPDX-License-Identifier: (GPL-2.0+ OR MIT)”h]”hŒ*SPDX-License-Identifier: (GPL-2.0+ OR MIT)”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒ>/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_gt_mcr.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ.GT Multicast/Replicated (MCR) Register Support”h]”hŒ.GT Multicast/Replicated (MCR) Register Support”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hXw  Some GT registers are designed as "multicast" or "replicated" registers:
multiple instances of the same register share a single MMIO offset.  MCR
registers are generally used when the hardware needs to potentially track
independent values of a register per hardware unit (e.g., per-subslice,
per-L3bank, etc.).  The specific types of replication that exist vary
per-platform.”h]”hX  Some GT registers are designed as â€œmulticastâ€ or â€œreplicatedâ€ registers:
multiple instances of the same register share a single MMIO offset.  MCR
registers are generally used when the hardware needs to potentially track
independent values of a register per hardware unit (e.g., per-subslice,
per-L3bank, etc.).  The specific types of replication that exist vary
per-platform.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸŒ^/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_gt_mcr:7: ./drivers/gpu/drm/xe/xe_gt_mcr.c”h Khh¶hžhubhÊ)”}”(hX  MMIO accesses to MCR registers are controlled according to the settings
programmed in the platform's MCR_SELECTOR register(s).  MMIO writes to MCR
registers can be done in either multicast (a single write updates all
instances of the register to the same value) or unicast (a write updates only
one specific instance) form.  Reads of MCR registers always operate in a
unicast manner regardless of how the multicast/unicast bit is set in
MCR_SELECTOR.  Selection of a specific MCR instance for unicast operations is
referred to as "steering."”h]”hX#  MMIO accesses to MCR registers are controlled according to the settings
programmed in the platformâ€™s MCR_SELECTOR register(s).  MMIO writes to MCR
registers can be done in either multicast (a single write updates all
instances of the register to the same value) or unicast (a write updates only
one specific instance) form.  Reads of MCR registers always operate in a
unicast manner regardless of how the multicast/unicast bit is set in
MCR_SELECTOR.  Selection of a specific MCR instance for unicast operations is
referred to as â€œsteering.â€”…””}”(hhÚhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸŒ^/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_gt_mcr:7: ./drivers/gpu/drm/xe/xe_gt_mcr.c”h Khh¶hžhubhÊ)”}”(hX  If MCR register operations are steered toward a hardware unit that is
fused off or currently powered down due to power gating, the MMIO operation
is "terminated" by the hardware.  Terminated read operations will return a
value of zero and terminated unicast write operations will be silently
ignored. During device initialization, the goal of the various
``init_steering_*()`` functions is to apply the platform-specific rules for
each MCR register type to identify a steering target that will select a
non-terminated instance.”h]”(hXg  If MCR register operations are steered toward a hardware unit that is
fused off or currently powered down due to power gating, the MMIO operation
is â€œterminatedâ€ by the hardware.  Terminated read operations will return a
value of zero and terminated unicast write operations will be silently
ignored. During device initialization, the goal of the various
”…””}”(hhéhžhhŸNh NubhŒliteral”“”)”}”(hŒ``init_steering_*()``”h]”hŒinit_steering_*()”…””}”(hhóhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hñhhéubhŒ— functions is to apply the platform-specific rules for
each MCR register type to identify a steering target that will select a
non-terminated instance.”…””}”(hhéhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸŒ^/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_gt_mcr:7: ./drivers/gpu/drm/xe/xe_gt_mcr.c”h K#hh¶hžhubhÊ)”}”(hŒ9MCR registers are not available on Virtual Function (VF).”h]”hŒ9MCR registers are not available on Virtual Function (VF).”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸŒ^/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_gt_mcr:7: ./drivers/gpu/drm/xe/xe_gt_mcr.c”h K,hh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒInternal API”h]”hŒInternal API”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h KubhÊ)”}”(hŒTODO”h]”hŒTODO”…””}”(hj,  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj  hžhubeh}”(h]”Œinternal-api”ah ]”h"]”Œinternal api”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubeh}”(h]”Œ,gt-multicast-replicated-mcr-register-support”ah ]”h"]”Œ.gt multicast/replicated (mcr) register support”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
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