sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget(/translations/zh_CN/gpu/xe/xe_exec_queuemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/zh_TW/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/it_IT/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ja_JP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ko_KR/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/pt_BR/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/sp_SP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhB/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue.rsthKubhsection)}(hhh](htitle)}(hExecution Queueh]hExecution Queue}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.h]hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK"hhhhubh)}(hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.h]hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK&hhhhubh)}(hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.h]hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK)hhhhubh)}(hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.h]hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK-hhhhubh)}(hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.h]hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK1hhhhubh)}(hhh](h)}(hMulti Queue Grouph]hMulti Queue Group}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hhhhhK ubh)}(hXMulti Queue Group is another mode of execution supported by the compute and blitter copy command streamers (CCS and BCS, respectively). It is an enhancement of the existing hardware architecture and leverages the same submission model. It enables support for efficient, parallel execution of multiple queues within a single shared context. The multi queue group functionality is only supported with GuC submission backend. All the queues of a group must use the same address space (VM).h]hXMulti Queue Group is another mode of execution supported by the compute and blitter copy command streamers (CCS and BCS, respectively). It is an enhancement of the existing hardware architecture and leverages the same submission model. It enables support for efficient, parallel execution of multiple queues within a single shared context. The multi queue group functionality is only supported with GuC submission backend. All the queues of a group must use the same address space (VM).}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chK9hj*hhubh)}(hThe DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE execution queue property supports creating a multi queue group and adding queues to a queue group.h]hThe DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE execution queue property supports creating a multi queue group and adding queues to a queue group.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKAhj*hhubh)}(hXThe XE_EXEC_QUEUE_CREATE ioctl call with above property with value field set to DRM_XE_MULTI_GROUP_CREATE, will create a new multi queue group with the queue being created as the primary queue (aka q0) of the group. To add secondary queues to the group, they need to be created with the above property with id of the primary queue as the value. The properties of the primary queue (like priority, time slice) applies to the whole group. So, these properties can't be set for secondary queues of a group.h]hXThe XE_EXEC_QUEUE_CREATE ioctl call with above property with value field set to DRM_XE_MULTI_GROUP_CREATE, will create a new multi queue group with the queue being created as the primary queue (aka q0) of the group. To add secondary queues to the group, they need to be created with the above property with id of the primary queue as the value. The properties of the primary queue (like priority, time slice) applies to the whole group. So, these properties can’t be set for secondary queues of a group.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKDhj*hhubh)}(hXaThe hardware does not support removing a queue from a multi-queue group. However, queues can be dynamically added to the group. A group can have up to 64 queues. To support this, XeKMD holds references to LRCs of the queues even after the queues are destroyed by the user until the whole group is destroyed. The secondary queues hold a reference to the primary queue thus preventing the group from being destroyed when user destroys the primary queue. Once the primary queue is destroyed, secondary queues can't be added to the queue group and new job submissions on existing secondary queues are not allowed.h]hXcThe hardware does not support removing a queue from a multi-queue group. However, queues can be dynamically added to the group. A group can have up to 64 queues. To support this, XeKMD holds references to LRCs of the queues even after the queues are destroyed by the user until the whole group is destroyed. The secondary queues hold a reference to the primary queue thus preventing the group from being destroyed when user destroys the primary queue. Once the primary queue is destroyed, secondary queues can’t be added to the queue group and new job submissions on existing secondary queues are not allowed.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKLhj*hhubh)}(hXThe queues of a multi queue group can set their priority within the group through the DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY property. This multi queue priority can also be set dynamically through the XE_EXEC_QUEUE_SET_PROPERTY ioctl. This is the only other property supported by the secondary queues of a multi queue group, other than DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE.h]hXThe queues of a multi queue group can set their priority within the group through the DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY property. This multi queue priority can also be set dynamically through the XE_EXEC_QUEUE_SET_PROPERTY ioctl. This is the only other property supported by the secondary queues of a multi queue group, other than DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKVhj*hhubh)}(hWhen GuC reports an error on any of the queues of a multi queue group, the queue cleanup mechanism is invoked for all the queues of the group as hardware cannot make progress on the multi queue context.h]hWhen GuC reports an error on any of the queues of a multi queue group, the queue cleanup mechanism is invoked for all the queues of the group as hardware cannot make progress on the multi queue context.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chK]hj*hhubh)}(hQRefer :ref:`multi-queue-group-guc-interface` for multi queue group GuC interface.h](hRefer }(hjhhhNhNubh)}(h&:ref:`multi-queue-group-guc-interface`h]hinline)}(hjh]hmulti-queue-group-guc-interface}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_exec_queue refdomainjreftyperef refexplicitrefwarn reftargetmulti-queue-group-guc-interfaceuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKahjubh% for multi queue group GuC interface.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKahj*hhubhtarget)}(h$.. _multi-queue-group-guc-interface:h]h}(h]h ]h"]h$]h&]refidmulti-queue-group-guc-interfaceuh1jhKhj*hhhhubeh}(h]multi-queue-groupah ]h"]multi queue groupah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(hMulti Queue Group GuC interfaceh]hMulti Queue Group GuC interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe multi queue group coordination between KMD and GuC is through a software construct called Context Group Page (CGP). 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]h"]h$]h&]uh1jAhj>ubjB)}(hhh](jG)}(hhh]h)}(h 160..1024h]h 160..1024}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjKubah}(h]h ]h"]h$]h&]uh1jFhjHubjG)}(hhh]h)}(hRESERVEDh]hRESERVED}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhjcubah}(h]h ]h"]h$]h&]uh1jFhjHubjG)}(hhh]h)}(hMBZh]hMBZ}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhjzubah}(h]h ]h"]h$]h&]uh1jFhjHubeh}(h]h ]h"]h$]h&]uh1jAhj>ubeh}(h]h ]h"]h$]h&]uh1j<hjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chNubh)}(hXWhile registering Q0 with GuC, CGP is updated with Q0 entry and GuC is notified through XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_QUEUE H2G message which specifies the CGP address. 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GuC responds to these H2G messages with a XE_GUC_ACTION_NOTIFY_MULTIQ_CONTEXT_CGP_SYNC_DONE G2H message. GuC also sends a XE_GUC_ACTION_NOTIFY_MULTI_QUEUE_CGP_CONTEXT_ERROR notification for any error in the CGP. Only one of these CGP update messages can be outstanding (waiting for GuC response) at any time. The bits in KMD_QUEUE_UPDATE_MASK_DW* fields indicate which queue entry is being updated in the CGP.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubh)}(hThe primary queue (Q0) represents the multi queue group context in GuC and submission on any queue of the group must be through Q0 GuC interface only.h]hThe primary queue (Q0) represents the multi queue group context in GuC and submission on any queue of the group must be through Q0 GuC interface only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubh)}(hAs it is not required to register secondary queues with GuC, the secondary queue context ids in the CGP are populated with Q0 context id.h]hAs it is not required to register secondary queues with GuC, the secondary queue context ids in the CGP are populated with Q0 context id.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chM hjhhubeh}(h](jid1eh ]h"](multi queue group guc interfacemulti-queue-group-guc-interfaceeh$]h&]uh1hhhhhhhhKexpect_referenced_by_name}jjsexpect_referenced_by_id}jjsubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single xe_multi_queue_priority (C enum)c.xe_multi_queue_priorityhNtauh1jhjhhhNhNubhdesc)}(hhh](hdesc_signature)}(hxe_multi_queue_priorityh]hdesc_signature_line)}(henum xe_multi_queue_priorityh](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKubhdesc_sig_space)}(h h]h }(hj,hhhNhNubah}(h]h ]wah"]h$]h&]uh1j*hjhhhj)hKubh desc_name)}(hxe_multi_queue_priorityh]h desc_sig_name)}(hjh]hxe_multi_queue_priority}(hjChhhNhNubah}(h]h ]nah"]h$]h&]uh1jAhj=ubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1j;hjhhhj)hKubeh}(h]h ]h"]h$]h&]hhƌ add_permalinkuh1jsphinx_line_type declaratorhjhhhj)hKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j hj)hKhj hhubh desc_content)}(hhh]h)}(hMulti Queue priority valuesh]hMulti Queue priority values}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK$hjohhubah}(h]h ]h"]h$]h&]uh1jmhj hhhj)hKubeh}(h]h ](cenumeh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhjhNhNubh container)}(h**Constants** ``XE_MULTI_QUEUE_PRIORITY_LOW`` Priority low ``XE_MULTI_QUEUE_PRIORITY_NORMAL`` Priority normal ``XE_MULTI_QUEUE_PRIORITY_HIGH`` Priority highh](h)}(h **Constants**h]hstrong)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK(hjubhdefinition_list)}(hhh](hdefinition_list_item)}(h-``XE_MULTI_QUEUE_PRIORITY_LOW`` Priority low h](hterm)}(h``XE_MULTI_QUEUE_PRIORITY_LOW``h]hliteral)}(hjh]hXE_MULTI_QUEUE_PRIORITY_LOW}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK+hjubh definition)}(hhh]h)}(h Priority lowh]h Priority low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK+hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK+hjubj)}(h3``XE_MULTI_QUEUE_PRIORITY_NORMAL`` Priority normal h](j)}(h"``XE_MULTI_QUEUE_PRIORITY_NORMAL``h]j)}(hjh]hXE_MULTI_QUEUE_PRIORITY_NORMAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK.hjubj)}(hhh]h)}(hPriority normalh]hPriority normal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK.hjubah}(h]h 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priority values of the queues within the multi queue group.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK%hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_group (C struct)c.xe_exec_queue_grouphNtauh1jhjhhhNhNubj)}(hhh](j )}(hxe_exec_queue_grouph]j)}(hstruct xe_exec_queue_grouph](j)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK*ubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjhhhjhK*ubj<)}(hxe_exec_queue_grouph]jB)}(hjh]hxe_exec_queue_group}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjhhhjhK*ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjhhhjhK*ubah}(h]jah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhK*hjhhubjn)}(hhh]h)}(hExecution multi queue grouph]hExecution multi queue group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK2hjhhubah}(h]h ]h"]h$]h&]uh1jmhjhhhjhK*ubeh}(h]h ](jstructeh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(hXw**Definition**:: struct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; bool sync_pending; bool banned; bool stopped; }; **Members** ``primary`` Primary queue of this group ``cgp_bo`` BO for the Context Group Page ``xa`` xarray to store LRCs ``list`` List of all secondary queues in the group ``list_lock`` Secondary queue list lock ``sync_pending`` CGP_SYNC_DONE g2h response pending ``banned`` Group banned ``stopped`` Group is stopped, protected by list_lockh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK6hj ubh literal_block)}(hstruct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; bool sync_pending; bool banned; bool stopped; };h]hstruct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; bool sync_pending; bool banned; bool stopped; };}hj= sbah}(h]h ]h"]h$]h&]hhuh1j; hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hj ubh)}(h **Members**h]j)}(hjN h]hMembers}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjL ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKChj ubj)}(hhh](j)}(h(``primary`` Primary queue of this group h](j)}(h ``primary``h]j)}(hjm h]hprimary}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjk ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hjg ubj)}(hhh]h)}(hPrimary queue of this grouph]hPrimary queue of this group}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK8hj ubah}(h]h ]h"]h$]h&]uh1jhjg ubeh}(h]h ]h"]h$]h&]uh1jhj hK8hjd ubj)}(h)``cgp_bo`` BO for the Context Group Page h](j)}(h ``cgp_bo``h]j)}(hj h]hcgp_bo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK:hj ubj)}(hhh]h)}(hBO for the Context Group Pageh]hBO for the Context Group Page}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK:hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK:hjd ubj)}(h``xa`` xarray to store LRCs h](j)}(h``xa``h]j)}(hj h]hxa}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj)}(hhh]h)}(h)List of all secondary queues in the grouph]h)List of all secondary queues in the group}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj- hK>hj. ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj- hK>hjd ubj)}(h(``list_lock`` Secondary queue list lock h](j)}(h ``list_lock``h]j)}(hjQ h]h list_lock}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjO ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK@hjK ubj)}(hhh]h)}(hSecondary queue list lockh]hSecondary queue list lock}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf hK@hjg ubah}(h]h ]h"]h$]h&]uh1jhjK ubeh}(h]h ]h"]h$]h&]uh1jhjf hK@hjd ubj)}(h4``sync_pending`` CGP_SYNC_DONE g2h response pending h](j)}(h``sync_pending``h]j)}(hj h]h sync_pending}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKBhj ubj)}(hhh]h)}(h"CGP_SYNC_DONE g2h response pendingh]h"CGP_SYNC_DONE g2h response pending}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKBhjd ubj)}(h``banned`` Group banned h](j)}(h ``banned``h]j)}(hj h]hbanned}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKDhj ubj)}(hhh]h)}(h Group bannedh]h Group banned}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKDhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKDhjd ubj)}(h4``stopped`` Group is stopped, protected by list_lockh](j)}(h ``stopped``h]j)}(hj h]hstopped}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKEhj ubj)}(hhh]h)}(h(Group is stopped, protected by list_lockh]h(Group is stopped, protected by list_lock}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKFhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKEhjd ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hj? h]h Description}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj= ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKIhjhhubh)}(h'Contains multi queue group information.h]h'Contains multi queue group information.}(hjU hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK3hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue (C struct)c.xe_exec_queuehNtauh1jhjhhhNhNubj)}(hhh](j )}(h xe_exec_queueh]j)}(hstruct xe_exec_queueh](j)}(hjh]hstruct}(hj} hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjy hhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8ubj+)}(h h]h }(hj hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjy hhhj hK8ubj<)}(h xe_exec_queueh]jB)}(hjw h]h xe_exec_queue}(hj hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjy hhhj hK8ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahju hhhj hK8ubah}(h]jp ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj hK8hjr hhubjn)}(hhh]h)}(hExecution queueh]hExecution queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKJhj hhubah}(h]h ]h"]h$]h&]uh1jmhjr hhhj hK8ubeh}(h]h ](jstructeh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(hX**Definition**:: struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); #define EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX BIT(7); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; spinlock_t lock; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct list_head vm_exec_queue_link; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; spinlock_t lrc_lookup_lock; struct xe_lrc *lrc[]; }; **Members** ``xef`` Back pointer to xe file if this is user created exec queue ``gt`` GT structure this exec queue can submit to ``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. ``refcount`` ref count of this exec queue ``vm`` VM (address space) for this exec queue ``user_vm`` User VM (address space) for this exec queue (bind queues only) ``class`` class of this exec queue ``logical_mask`` logical mask of where job submitted to exec queue can run ``name`` name of this exec queue ``width`` width (number BB submitted per exec) of this exec queue ``msix_vec`` MSI-X vector (for platforms that support it) ``fence_irq`` fence IRQ used to signal job completion ``last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode ``flags`` flags for this exec queue, should statically setup aside from ban bit ``{unnamed_union}`` anonymous ``multi_gt_list`` list head for VM bind engines if multi-GT ``multi_gt_link`` link for VM bind engines if multi-GT ``{unnamed_union}`` anonymous ``execlist`` execlist backend specific state for exec queue ``guc`` GuC backend specific state for exec queue ``multi_queue`` Multi queue information ``multi_queue.group`` Queue group information ``multi_queue.link`` Link into group's secondary queues list ``multi_queue.priority`` Queue priority within the multi-queue group. It is protected by **multi_queue.lock**. ``multi_queue.lock`` Lock for protecting certain members ``multi_queue.pos`` Position of queue within the multi-queue group ``multi_queue.valid`` Queue belongs to a multi queue group ``multi_queue.is_primary`` Is primary queue (Q0) of the group ``sched_props`` scheduling properties ``sched_props.timeslice_us`` timeslice period in micro-seconds ``sched_props.preempt_timeout_us`` preemption timeout in micro-seconds ``sched_props.job_timeout_ms`` job timeout in milliseconds ``sched_props.priority`` priority of this exec queue ``lr`` long-running exec queue state ``lr.pfence`` preemption fence ``lr.context`` preemption fence context ``lr.seqno`` preemption fence seqno ``lr.link`` link into VM's list of exec queues ``tlb_inval`` TLB invalidations exec queue state ``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler ``vm_exec_queue_link`` Link to track exec queue within a VM's list of exec queues. ``pxp`` PXP info tracking ``pxp.type`` PXP session type used by this queue ``pxp.link`` link into the list of PXP exec queues ``ufence_syncobj`` User fence syncobj ``ufence_timeline_value`` User fence timeline value ``replay_state`` GPU hang replay state ``ops`` submission backend exec queue operations ``ring_ops`` ring operations for this exec queue ``entity`` DRM sched entity for this exec queue (1 to 1 relationship) ``job_cnt`` number of drm jobs in this exec queue ``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. ``hw_engine_group_link`` link into exec queues in the same hw engine group ``lrc_lookup_lock`` Lock for protecting lrc array access. Only used when running in parallel to queue creation is possible. ``lrc`` logical ring context for this exec queueh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKNhj ubj< )}(hX struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); #define EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX BIT(7); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; spinlock_t lock; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct list_head vm_exec_queue_link; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; spinlock_t lrc_lookup_lock; struct xe_lrc *lrc[]; };h]hX struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); #define EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX BIT(7); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; spinlock_t lock; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct list_head vm_exec_queue_link; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; spinlock_t lrc_lookup_lock; struct xe_lrc *lrc[]; };}hj sbah}(h]h ]h"]h$]h&]hhuh1j; hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKPhj ubh)}(h **Members**h]j)}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj)}(hhh](j)}(hC``xef`` Back pointer to xe file if this is user created exec queue h](j)}(h``xef``h]j)}(hj, h]hxef}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj* ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKQhj& ubj)}(hhh]h)}(h:Back pointer to xe file if this is user created exec queueh]h:Back pointer to xe file if this is user created exec queue}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjA hKQhjB ubah}(h]h ]h"]h$]h&]uh1jhj& ubeh}(h]h ]h"]h$]h&]uh1jhjA hKQhj# ubj)}(h2``gt`` GT structure this exec queue can submit to h](j)}(h``gt``h]j)}(hje h]hgt}(hjg hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjc ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKThj_ ubj)}(hhh]h)}(h*GT structure this exec queue can submit toh]h*GT structure this exec queue can submit to}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz hKThj{ ubah}(h]h ]h"]h$]h&]uh1jhj_ ubeh}(h]h ]h"]h$]h&]uh1jhjz hKThj# ubj)}(h``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. h](j)}(h``hwe``h]j)}(hj h]hhwe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKYhj ubj)}(hhh]h)}(hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.h]hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKWhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKYhj# ubj)}(h*``refcount`` ref count of this exec queue h](j)}(h ``refcount``h]j)}(hj h]hrefcount}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK\hj ubj)}(hhh]h)}(href count of this exec queueh]href count of this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK\hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK\hj# ubj)}(h.``vm`` VM (address space) for this exec queue h](j)}(h``vm``h]j)}(hj h]hvm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK^hj ubj)}(hhh]h)}(h&VM (address space) for this exec queueh]h&VM (address space) for this exec queue}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj& hK^hj' ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj& hK^hj# ubj)}(hK``user_vm`` User VM (address space) for this exec queue (bind queues only) h](j)}(h ``user_vm``h]j)}(hjJ h]huser_vm}(hjL hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjH ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKbhjD ubj)}(hhh]h)}(h>User VM (address space) for this exec queue (bind queues only)h]h>User VM (address space) for this exec queue (bind queues only)}(hjc hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKahj` ubah}(h]h ]h"]h$]h&]uh1jhjD ubeh}(h]h ]h"]h$]h&]uh1jhj_ hKbhj# ubj)}(h#``class`` class of this exec queue h](j)}(h ``class``h]j)}(hj h]hclass}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKfhj~ ubj)}(hhh]h)}(hclass of this exec queueh]hclass of this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKfhj ubah}(h]h ]h"]h$]h&]uh1jhj~ ubeh}(h]h ]h"]h$]h&]uh1jhj hKfhj# ubj)}(hK``logical_mask`` logical mask of where job submitted to exec queue can run h](j)}(h``logical_mask``h]j)}(hj h]h logical_mask}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKihj ubj)}(hhh]h)}(h9logical mask of where job submitted to exec queue can runh]h9logical mask of where job submitted to exec queue can run}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKihj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKihj# ubj)}(h!``name`` name of this exec queue h](j)}(h``name``h]j)}(hj h]hname}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKlhj ubj)}(hhh]h)}(hname of this exec queueh]hname of this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKlhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKlhj# ubj)}(hB``width`` width (number BB submitted per exec) of this exec queue h](j)}(h ``width``h]j)}(hj/h]hwidth}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKnhj)ubj)}(hhh]h)}(h7width (number BB submitted per exec) of this exec queueh]h7width (number BB submitted per exec) of this exec queue}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhKnhjEubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhjDhKnhj# ubj)}(h:``msix_vec`` MSI-X vector (for platforms that support it) h](j)}(h ``msix_vec``h]j)}(hjhh]hmsix_vec}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjfubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKphjbubj)}(hhh]h)}(h,MSI-X vector (for platforms that support it)h]h,MSI-X vector (for platforms that support it)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hKphj~ubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jhj}hKphj# ubj)}(h6``fence_irq`` fence IRQ used to signal job completion h](j)}(h ``fence_irq``h]j)}(hjh]h fence_irq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKrhjubj)}(hhh]h)}(h'fence IRQ used to signal job completionh]h'fence IRQ used to signal job completion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKrhj# ubj)}(hT``last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode h](j)}(h``last_fence``h]j)}(hjh]h last_fence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hDlast fence for tlb invalidation, protected by vm->lock in write modeh]hDlast fence for tlb invalidation, protected by vm->lock in write mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(hP``flags`` flags for this exec queue, should statically setup aside from ban bit h](j)}(h ``flags``h]j)}(hjh]hflags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hEflags for this exec queue, should statically setup aside from ban bith]hEflags for this exec queue, should statically setup aside from ban bit}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj*ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj)hKhj# ubj)}(h``{unnamed_union}`` anonymous h](j)}(h``{unnamed_union}``h]j)}(hjNh]h{unnamed_union}}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjHubj)}(hhh]h)}(h anonymoush]h anonymous}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchKhjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jhjchKhj# ubj)}(h<``multi_gt_list`` list head for VM bind engines if multi-GT h](j)}(h``multi_gt_list``h]j)}(hjh]h multi_gt_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h)list head for VM bind engines if multi-GTh]h)list head for VM bind engines if multi-GT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h7``multi_gt_link`` link for VM bind engines if multi-GT h](j)}(h``multi_gt_link``h]j)}(hjh]h multi_gt_link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h$link for VM bind engines if multi-GTh]h$link for VM bind engines if multi-GT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h``{unnamed_union}`` anonymous h](j)}(h``{unnamed_union}``h]j)}(hjh]h{unnamed_union}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h anonymoush]h anonymous}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h<``execlist`` execlist backend specific state for exec queue h](j)}(h ``execlist``h]j)}(hj2h]hexeclist}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj,ubj)}(hhh]h)}(h.execlist backend specific state for exec queueh]h.execlist backend specific state for exec queue}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKhjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhjGhKhj# ubj)}(h2``guc`` GuC backend specific state for exec queue h](j)}(h``guc``h]j)}(hjkh]hguc}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjiubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjeubj)}(hhh]h)}(h)GuC backend specific state for exec queueh]h)GuC backend specific state for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h(``multi_queue`` Multi queue information h](j)}(h``multi_queue``h]j)}(hjh]h multi_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hMulti queue informationh]hMulti queue information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h.``multi_queue.group`` Queue group information h](j)}(h``multi_queue.group``h]j)}(hjh]hmulti_queue.group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hQueue group informationh]hQueue group information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h=``multi_queue.link`` Link into group's secondary queues list h](j)}(h``multi_queue.link``h]j)}(hjh]hmulti_queue.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h'Link into group's secondary queues listh]h)Link into group’s secondary queues list}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj+hKhj# ubj)}(ho``multi_queue.priority`` Queue priority within the multi-queue group. It is protected by **multi_queue.lock**. h](j)}(h``multi_queue.priority``h]j)}(hjOh]hmulti_queue.priority}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjIubj)}(hhh]h)}(hUQueue priority within the multi-queue group. It is protected by **multi_queue.lock**.h](h@Queue priority within the multi-queue group. It is protected by }(hjhhhhNhNubj)}(h**multi_queue.lock**h]hmulti_queue.lock}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhubh.}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jhjdhKhj# ubj)}(h9``multi_queue.lock`` Lock for protecting certain members h](j)}(h``multi_queue.lock``h]j)}(hjh]hmulti_queue.lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#Lock for protecting certain membersh]h#Lock for protecting certain members}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(hC``multi_queue.pos`` Position of queue within the multi-queue group h](j)}(h``multi_queue.pos``h]j)}(hjh]hmulti_queue.pos}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h.Position of queue within the multi-queue grouph]h.Position of queue within the multi-queue group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h;``multi_queue.valid`` Queue belongs to a multi queue group h](j)}(h``multi_queue.valid``h]j)}(hj h]hmulti_queue.valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h$Queue belongs to a multi queue grouph]h$Queue belongs to a multi queue group}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKhj#ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj"hKhj# ubj)}(h>``multi_queue.is_primary`` Is primary queue (Q0) of the group h](j)}(h``multi_queue.is_primary``h]j)}(hjFh]hmulti_queue.is_primary}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj@ubj)}(hhh]h)}(h"Is primary queue (Q0) of the grouph]h"Is primary queue (Q0) of the group}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hKhj\ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jhj[hKhj# ubj)}(h&``sched_props`` scheduling properties h](j)}(h``sched_props``h]j)}(hjh]h sched_props}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjyubj)}(hhh]h)}(hscheduling propertiesh]hscheduling properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h?``sched_props.timeslice_us`` timeslice period in micro-seconds h](j)}(h``sched_props.timeslice_us``h]j)}(hjh]hsched_props.timeslice_us}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h!timeslice period in micro-secondsh]h!timeslice period in micro-seconds}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(hG``sched_props.preempt_timeout_us`` preemption timeout in micro-seconds h](j)}(h"``sched_props.preempt_timeout_us``h]j)}(hjh]hsched_props.preempt_timeout_us}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#preemption timeout in micro-secondsh]h#preemption timeout in micro-seconds}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h;``sched_props.job_timeout_ms`` job timeout in milliseconds h](j)}(h``sched_props.job_timeout_ms``h]j)}(hj*h]hsched_props.job_timeout_ms}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj$ubj)}(hhh]h)}(hjob timeout in millisecondsh]hjob timeout in milliseconds}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj@ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jhj?hKhj# ubj)}(h5``sched_props.priority`` priority of this exec queue h](j)}(h``sched_props.priority``h]j)}(hjch]hsched_props.priority}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj]ubj)}(hhh]h)}(hpriority of this exec queueh]hpriority of this exec queue}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhKhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jhjxhKhj# ubj)}(h%``lr`` long-running exec queue state h](j)}(h``lr``h]j)}(hjh]hlr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hlong-running exec queue stateh]hlong-running exec queue state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h``lr.pfence`` preemption fence h](j)}(h ``lr.pfence``h]j)}(hjh]h lr.pfence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpreemption fenceh]hpreemption fence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h(``lr.context`` preemption fence context h](j)}(h``lr.context``h]j)}(hjh]h lr.context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpreemption fence contexth]hpreemption fence context}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKhj$ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj#hKhj# ubj)}(h$``lr.seqno`` preemption fence seqno h](j)}(h ``lr.seqno``h]j)}(hjGh]hlr.seqno}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjAubj)}(hhh]h)}(hpreemption fence seqnoh]hpreemption fence seqno}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hKhj]ubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jhj\hKhj# ubj)}(h/``lr.link`` link into VM's list of exec queues h](j)}(h ``lr.link``h]j)}(hjh]hlr.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjzubj)}(hhh]h)}(h"link into VM's list of exec queuesh]h$link into VM’s list of exec queues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h1``tlb_inval`` TLB invalidations exec queue state h](j)}(h ``tlb_inval``h]j)}(hjh]h tlb_inval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h"TLB invalidations exec queue stateh]h"TLB invalidations exec queue state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(hF``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler h](j)}(h``tlb_inval.dep_scheduler``h]j)}(hjh]htlb_inval.dep_scheduler}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h)The TLB invalidation dependency schedulerh]h)The TLB invalidation dependency scheduler}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(hS``vm_exec_queue_link`` Link to track exec queue within a VM's list of exec queues. h](j)}(h``vm_exec_queue_link``h]j)}(hj,h]hvm_exec_queue_link}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj&ubj)}(hhh]h)}(h;Link to track exec queue within a VM's list of exec queues.h]h=Link to track exec queue within a VM’s list of exec queues.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKhjBubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jhjAhKhj# ubj)}(h``pxp`` PXP info tracking h](j)}(h``pxp``h]j)}(hjeh]hpxp}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj_ubj)}(hhh]h)}(hPXP info trackingh]hPXP info tracking}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhKhj{ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jhjzhKhj# ubj)}(h1``pxp.type`` PXP session type used by this queue h](j)}(h ``pxp.type``h]j)}(hjh]hpxp.type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#PXP session type used by this queueh]h#PXP session type used by this queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h3``pxp.link`` link into the list of PXP exec queues h](j)}(h ``pxp.link``h]j)}(hjh]hpxp.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h%link into the list of PXP exec queuesh]h%link into the list of PXP exec queues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h&``ufence_syncobj`` User fence syncobj h](j)}(h``ufence_syncobj``h]j)}(hjh]hufence_syncobj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj)}(hhh]h)}(hUser fence syncobjh]hUser fence syncobj}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hKhj&ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj%hKhj# ubj)}(h4``ufence_timeline_value`` User fence timeline value h](j)}(h``ufence_timeline_value``h]j)}(hjIh]hufence_timeline_value}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjCubj)}(hhh]h)}(hUser fence timeline valueh]hUser fence timeline value}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jhj^hKhj# ubj)}(h'``replay_state`` GPU hang replay state h](j)}(h``replay_state``h]j)}(hjh]h replay_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj|ubj)}(hhh]h)}(hGPU hang replay stateh]hGPU hang replay state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h1``ops`` submission backend exec queue operations h](j)}(h``ops``h]j)}(hjh]hops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h(submission backend exec queue operationsh]h(submission backend exec queue operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj# ubj)}(h1``ring_ops`` ring operations for this exec queue h](j)}(h ``ring_ops``h]j)}(hjh]hring_ops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#ring operations for this exec queueh]h#ring operations for this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hKhj# ubj)}(hF``entity`` DRM sched entity for this exec queue (1 to 1 relationship) h](j)}(h ``entity``h]j)}(hj-h]hentity}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj'ubj)}(hhh]h)}(h:DRM sched entity for this exec queue (1 to 1 relationship)h]h:DRM sched entity for this exec queue (1 to 1 relationship)}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhKhjCubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhjBhKhj# ubj)}(h2``job_cnt`` number of drm jobs in this exec queue h](j)}(h ``job_cnt``h]j)}(hjfh]hjob_cnt}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj`ubj)}(hhh]h)}(h%number of drm jobs in this exec queueh]h%number of drm jobs in this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hKhj|ubah}(h]h ]h"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]uh1jhj{hKhj# ubj)}(h{``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. h](j)}(h``tlb_flush_seqno``h]j)}(hjh]htlb_flush_seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(hfThe seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL.h](h>The seqno of the last rebind tlb flush performed Protected by }(hjhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh’s resv. Unused if }(hjhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh == NULL.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhj# ubj)}(hK``hw_engine_group_link`` link into exec queues in the same hw engine group h](j)}(h``hw_engine_group_link``h]j)}(hjh]hhw_engine_group_link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h1link into exec queues in the same hw engine grouph]h1link into exec queues in the same hw engine group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhj# ubj)}(h|``lrc_lookup_lock`` Lock for protecting lrc array access. Only used when running in parallel to queue creation is possible. h](j)}(h``lrc_lookup_lock``h]j)}(hj6h]hlrc_lookup_lock}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hj0ubj)}(hhh]h)}(hgLock for protecting lrc array access. Only used when running in parallel to queue creation is possible.h]hgLock for protecting lrc array access. Only used when running in parallel to queue creation is possible.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjLubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jhjKhM hj# ubj)}(h0``lrc`` logical ring context for this exec queueh](j)}(h``lrc``h]j)}(hjph]hlrc}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hjjubj)}(hhh]h)}(h(logical ring context for this exec queueh]h(logical ring context for this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jhjhM hj# ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjhhubh)}(h]Contains all state necessary for submissions. Can either be a user object or a kernel object.h]h]Contains all state necessary for submissions. Can either be a user object or a kernel object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKKhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_ops (C struct)c.xe_exec_queue_opshNtauh1jhjhhhNhNubj)}(hhh](j )}(hxe_exec_queue_opsh]j)}(hstruct xe_exec_queue_opsh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKQubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjhhhjhKQubj<)}(hxe_exec_queue_opsh]jB)}(hjh]hxe_exec_queue_ops}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjhhhjhKQubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjhhhjhKQubah}(h]jah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhKQhjhhubjn)}(hhh]h)}(h(Submission backend exec queue operationsh]h(Submission backend exec queue operations}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhj0hhubah}(h]h ]h"]h$]h&]uh1jmhjhhhjhKQubeh}(h]h ](jstructeh"]h$]h&]jjjjKjjKjjjuh1jhhhjhNhNubj)}(hX **Definition**:: struct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); bool (*active)(struct xe_exec_queue *q); }; **Members** ``init`` Initialize exec queue for submission backend ``kill`` Kill inflight submissions for backend ``fini`` Undoes the init() for submission backend ``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. ``set_priority`` Set priority for exec queue ``set_timeslice`` Set timeslice for exec queue ``set_preempt_timeout`` Set preemption timeout for exec queue ``set_multi_queue_priority`` Set multi queue priority ``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. ``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism. ``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. ``reset_status`` check exec queue reset status ``active`` check exec queue is activeh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjSubh:}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjOubj< )}(hX struct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); bool (*active)(struct xe_exec_queue *q); };h]hX struct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); bool (*active)(struct xe_exec_queue *q); };}hjpsbah}(h]h ]h"]h$]h&]hhuh1j; hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjOubh)}(h **Members**h]j)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM&hjOubj)}(hhh](j)}(h6``init`` Initialize exec queue for submission backend h](j)}(h``init``h]j)}(hjh]hinit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h,Initialize exec queue for submission backendh]h,Initialize exec queue for submission backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h/``kill`` Kill inflight submissions for backend h](j)}(h``kill``h]j)}(hjh]hkill}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h%Kill inflight submissions for backendh]h%Kill inflight submissions for backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h2``fini`` Undoes the init() for submission backend h](j)}(h``fini``h]j)}(hjh]hfini}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhj ubj)}(hhh]h)}(h(Undoes the init() for submission backendh]h(Undoes the init() for submission backend}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj(ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj'hMhjubj)}(h``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. h](j)}(h ``destroy``h]j)}(hjKh]hdestroy}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjEubj)}(hhh]h)}(hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.h]hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jhj`hMhjubj)}(h-``set_priority`` Set priority for exec queue h](j)}(h``set_priority``h]j)}(hjh]h set_priority}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hjubj)}(hhh]h)}(hSet priority for exec queueh]hSet priority for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjubj)}(h/``set_timeslice`` Set timeslice for exec queue h](j)}(h``set_timeslice``h]j)}(hjh]h set_timeslice}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM#hjubj)}(hhh]h)}(hSet timeslice for exec queueh]hSet timeslice for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM#hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM#hjubj)}(h>``set_preempt_timeout`` Set preemption timeout for exec queue h](j)}(h``set_preempt_timeout``h]j)}(hjh]hset_preempt_timeout}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM%hjubj)}(hhh]h)}(h%Set preemption timeout for exec queueh]h%Set preemption timeout for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM%hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hM%hjubj)}(h6``set_multi_queue_priority`` Set multi queue priority h](j)}(h``set_multi_queue_priority``h]j)}(hj0h]hset_multi_queue_priority}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM'hj*ubj)}(hhh]h)}(hSet multi queue priorityh]hSet multi queue priority}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM'hjFubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhjEhM'hjubj)}(h``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. h](j)}(h ``suspend``h]j)}(hjih]hsuspend}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM-hjcubj)}(hhh]h)}(hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.h]hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM+hjubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jhj~hM-hjubj)}(hX``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism. h](j)}(h``suspend_wait``h]j)}(hjh]h suspend_wait}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM7hjubj)}(hhh]h)}(hXWait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism.h]hXWait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM7hjubj)}(h``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. h](j)}(h ``resume``h]j)}(hjh]hresume}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM=hjubj)}(hhh]h)}(hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.h]hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM;hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM=hjubj)}(h/``reset_status`` check exec queue reset status h](j)}(h``reset_status``h]j)}(hjh]h reset_status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM@hjubj)}(hhh]h)}(hcheck exec queue reset statush]hcheck exec queue reset status}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM@hj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj,hM@hjubj)}(h%``active`` check exec queue is activeh](j)}(h ``active``h]j)}(hjPh]hactive}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjNubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMAhjJubj)}(hhh]h)}(hcheck exec queue is activeh]hcheck exec queue is active}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMBhjfubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jhjehMAhjubeh}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_is_multi_queue (C function)c.xe_exec_queue_is_multi_queuehNtauh1jhjhhhNhNubj)}(hhh](j )}(h;bool xe_exec_queue_is_multi_queue (struct xe_exec_queue *q)h]j)}(h:bool xe_exec_queue_is_multi_queue(struct xe_exec_queue *q)h](hdesc_sig_keyword_type)}(hboolh]hbool}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKGubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjhhhjhKGubj<)}(hxe_exec_queue_is_multi_queueh]jB)}(hxe_exec_queue_is_multi_queueh]hxe_exec_queue_is_multi_queue}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjhhhjhKGubhdesc_parameterlist)}(h(struct xe_exec_queue *q)h]hdesc_parameter)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubah}(h]h ]h"]h$]h&] refdomainjreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j' ASTIdentifier)}j"jsbc.xe_exec_queue_is_multi_queueasbuh1hhjubj+)}(h h]h }(hj4hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjubhdesc_sig_punctuation)}(h*h]h*}(hjDhhhNhNubah}(h]h ]pah"]h$]h&]uh1jBhjubjB)}(hqh]hq}(hjShhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h 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]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKHhjubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKJhjubh)}(hATrue if the exec_queue is part of a queue group, false otherwise.h]hATrue if the exec_queue is part of a queue group, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKJhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j1xe_exec_queue_is_multi_queue_primary (C function)&c.xe_exec_queue_is_multi_queue_primaryhNtauh1jhjhhhNhNubj)}(hhh](j )}(hCbool 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}(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjvubjC)}(hjFh]h*}(hjhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjvubjB)}(hjUh]hq}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjvubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjrubah}(h]h ]h"]h$]h&]hhuh1jhj:hhhjKhKRubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj6hhhjKhKRubah}(h]j1ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjKhKRhj3hhubjn)}(hhh]h)}(h>Whether an exec_queue is primary queue of a multi queue group.h]h>Whether an exec_queue is primary queue of a multi queue group.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKRhjhhubah}(h]h ]h"]h$]h&]uh1jmhj3hhhjKhKRubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if **q** is primary queue of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj=h]hstruct xe_exec_queue *q}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKThj7ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhKThjSubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jhjRhKThj4ubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjxh]hReturn}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubh)}(hATrue if **q** is primary queue of a queue group, false otherwise.h](hTrue if }(hjhhhNhNubj)}(h**q**h]hq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh4 is primary queue of a queue group, false otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_is_multi_queue_secondary (C function)(c.xe_exec_queue_is_multi_queue_secondaryhNtauh1jhjhhhNhNubj)}(hhh](j )}(hEbool xe_exec_queue_is_multi_queue_secondary (struct xe_exec_queue *q)h]j)}(hDbool xe_exec_queue_is_multi_queue_secondary(struct xe_exec_queue *q)h](j)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK^ubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjhhhjhK^ubj<)}(h&xe_exec_queue_is_multi_queue_secondaryh]jB)}(h&xe_exec_queue_is_multi_queue_secondaryh]h&xe_exec_queue_is_multi_queue_secondary}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjhhhjhK^ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj ubj+)}(h h]h }(hj hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj) hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj& ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj+ modnameN classnameNj&j))}j,]j/)}j"jsb(c.xe_exec_queue_is_multi_queue_secondaryasbuh1hhj ubj+)}(h h]h }(hjI hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj ubjC)}(hjFh]h*}(hjW hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj ubjB)}(hjUh]hq}(hjd hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhK^ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjhhhjhK^ubah}(h]jah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhK^hjhhubjn)}(hhh]h)}(h@Whether an exec_queue is secondary queue of a multi queue group.h]h@Whether an exec_queue is secondary queue of a multi queue group.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK^hj hhubah}(h]h ]h"]h$]h&]uh1jmhjhhhjhK^ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if **q** is secondary queue of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhj ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj h]hstruct xe_exec_queue *q}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK`hj ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK`hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK`hj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hj !h]hReturn}(hj !hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhj ubh)}(hCTrue if **q** is secondary queue of a queue group, false otherwise.h](hTrue if }(hj!hhhNhNubj)}(h**q**h]hq}(hj'!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubh6 is secondary queue of a queue group, false otherwise.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j.xe_exec_queue_multi_queue_primary (C function)#c.xe_exec_queue_multi_queue_primaryhNtauh1jhjhhhNhNubj)}(hhh](j )}(hRstruct xe_exec_queue * xe_exec_queue_multi_queue_primary (struct xe_exec_queue *q)h]j)}(hPstruct xe_exec_queue *xe_exec_queue_multi_queue_primary(struct xe_exec_queue *q)h](j)}(hjh]hstruct}(hj`!hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj\!hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKjubj+)}(h h]h }(hjn!hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj\!hhhjm!hKjubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj!hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj|!ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj!modnameN classnameNj&j))}j,]j/)}j"!xe_exec_queue_multi_queue_primarysb#c.xe_exec_queue_multi_queue_primaryasbuh1hhj\!hhhjm!hKjubj+)}(h h]h }(hj!hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj\!hhhjm!hKjubjC)}(hjFh]h*}(hj!hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj\!hhhjm!hKjubj<)}(h!xe_exec_queue_multi_queue_primaryh]jB)}(hj!h]h!xe_exec_queue_multi_queue_primary}(hj!hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj!ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj\!hhhjm!hKjubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj!ubj+)}(h h]h }(hj!hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj!ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj!hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj!modnameN classnameNj&j))}j,]j!#c.xe_exec_queue_multi_queue_primaryasbuh1hhj!ubj+)}(h h]h }(hj"hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj!ubjC)}(hjFh]h*}(hj$"hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj!ubjB)}(hjUh]hq}(hj1"hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj!ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj!ubah}(h]h ]h"]h$]h&]hhuh1jhj\!hhhjm!hKjubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjX!hhhjm!hKjubah}(h]jS!ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjm!hKjhjU!hhubjn)}(hhh]h)}(h%Get multi queue group's primary queueh]h'Get multi queue group’s primary queue}(hjZ"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKjhjW"hhubah}(h]h ]h"]h$]h&]uh1jmhjU!hhhjm!hKjubeh}(h]h ](jfunctioneh"]h$]h&]jjjjr"jjr"jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Description** If **q** belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, **q** will be returned.h](h)}(h**Parameters**h]j)}(hj|"h]h Parameters}(hj~"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjz"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKnhjv"ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj"h]hstruct xe_exec_queue *q}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKkhj"ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKkhj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jhj"hKkhj"ubah}(h]h ]h"]h$]h&]uh1jhjv"ubh)}(h**Description**h]j)}(hj"h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKmhjv"ubh)}(hIf **q** belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, **q** will be returned.h](hIf }(hj"hhhNhNubj)}(h**q**h]hq}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubhb belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, }(hj"hhhNhNubj)}(h**q**h]hq}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubh will be returned.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKlhjv"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j,xe_exec_queue_idle_skip_suspend (C function)!c.xe_exec_queue_idle_skip_suspendhNtauh1jhjhhhNhNubj)}(hhh](j )}(h>bool xe_exec_queue_idle_skip_suspend (struct xe_exec_queue *q)h]j)}(h=bool xe_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)h](j)}(hjh]hbool}(hj?#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;#hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKubj+)}(h h]h }(hjM#hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj;#hhhjL#hKubj<)}(hxe_exec_queue_idle_skip_suspendh]jB)}(hxe_exec_queue_idle_skip_suspendh]hxe_exec_queue_idle_skip_suspend}(hj_#hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj[#ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj;#hhhjL#hKubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj{#hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjw#ubj+)}(h h]h }(hj#hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjw#ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj#hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj#ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj#modnameN classnameNj&j))}j,]j/)}j"ja#sb!c.xe_exec_queue_idle_skip_suspendasbuh1hhjw#ubj+)}(h h]h }(hj#hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjw#ubjC)}(hjFh]h*}(hj#hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjw#ubjB)}(hjUh]hq}(hj#hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjw#ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjs#ubah}(h]h ]h"]h$]h&]hhuh1jhj;#hhhjL#hKubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj7#hhhjL#hKubah}(h]j2#ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjL#hKhj4#hhubjn)}(hhh]h)}(hCan exec queue skip suspendh]hCan exec queue skip suspend}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj#hhubah}(h]h ]h"]h$]h&]uh1jmhj4#hhhjL#hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj$jj$jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Description** If an exec queue is not parallel and is idle, the suspend steps can be skipped in the submission backend immediatley signaling the suspend fence. Parallel queues cannot skip this step due to limitations in the submission backend. **Return** True if exec queue is idle and can skip suspend steps, False otherwiseh](h)}(h**Parameters**h]j)}(hj$h]h Parameters}(hj!$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj$ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj>$h]hstruct xe_exec_queue *q}(hj@$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<$ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj8$ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjW$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjS$hKhjT$ubah}(h]h ]h"]h$]h&]uh1jhj8$ubeh}(h]h ]h"]h$]h&]uh1jhjS$hKhj5$ubah}(h]h ]h"]h$]h&]uh1jhj$ubh)}(h**Description**h]j)}(hjy$h]h Description}(hj{$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjw$ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj$ubh)}(hIf an exec queue is not parallel and is idle, the suspend steps can be skipped in the submission backend immediatley signaling the suspend fence. Parallel queues cannot skip this step due to limitations in the submission backend.h]hIf an exec queue is not parallel and is idle, the suspend steps can be skipped in the submission backend immediatley signaling the suspend fence. Parallel queues cannot skip this step due to limitations in the submission backend.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj$ubh)}(h **Return**h]j)}(hj$h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj$ubh)}(hFTrue if exec queue is idle and can skip suspend steps, False otherwiseh]hFTrue if exec queue is idle and can skip suspend steps, False otherwise}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"xe_exec_queue_get_lrc (C function)c.xe_exec_queue_get_lrchNtauh1jhjhhhNhNubj)}(hhh](j )}(hHstruct xe_lrc * xe_exec_queue_get_lrc (struct xe_exec_queue *q, u16 idx)h]j)}(hFstruct xe_lrc *xe_exec_queue_get_lrc(struct xe_exec_queue *q, u16 idx)h](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj$hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj$hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$hhhj$hMubh)}(hhh]jB)}(hxe_lrch]hxe_lrc}(hj%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj%modnameN classnameNj&j))}j,]j/)}j"xe_exec_queue_get_lrcsbc.xe_exec_queue_get_lrcasbuh1hhj$hhhj$hMubj+)}(h h]h }(hj%%hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$hhhj$hMubjC)}(hjFh]h*}(hj3%hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj$hhhj$hMubj<)}(hxe_exec_queue_get_lrch]jB)}(hj"%h]hxe_exec_queue_get_lrc}(hjD%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj@%ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj$hhhj$hMubj)}(h"(struct xe_exec_queue *q, u16 idx)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj_%hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj[%ubj+)}(h h]h }(hjl%hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj[%ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj}%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjz%ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj%modnameN classnameNj&j))}j,]j %c.xe_exec_queue_get_lrcasbuh1hhj[%ubj+)}(h h]h }(hj%hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj[%ubjC)}(hjFh]h*}(hj%hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj[%ubjB)}(hjUh]hq}(hj%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj[%ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjW%ubj)}(hu16 idxh](h)}(hhh]jB)}(hu16h]hu16}(hj%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj%modnameN classnameNj&j))}j,]j %c.xe_exec_queue_get_lrcasbuh1hhj%ubj+)}(h h]h }(hj%hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj%ubjB)}(hidxh]hidx}(hj%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj%ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjW%ubeh}(h]h ]h"]h$]h&]hhuh1jhj$hhhj$hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj$hhhj$hMubah}(h]j$ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj$hMhj$hhubjn)}(hhh]h)}(hGet the LRC from exec queue.h]hGet the LRC from exec queue.}(hj'&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj$&hhubah}(h]h ]h"]h$]h&]uh1jmhj$hhhj$hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj?&jj?&jjjuh1jhhhjhNhNubj)}(hX'**Parameters** ``struct xe_exec_queue *q`` The exec queue instance. ``u16 idx`` Index within multi-LRC array. **Description** Retrieves LRC of given index for the exec queue under lock and takes reference. **Return** Pointer to LRC on success, error on failure, NULL on lookup failure.h](h)}(h**Parameters**h]j)}(hjI&h]h Parameters}(hjK&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjG&ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjC&ubj)}(hhh](j)}(h5``struct xe_exec_queue *q`` The exec queue instance. h](j)}(h``struct xe_exec_queue *q``h]j)}(hjh&h]hstruct xe_exec_queue *q}(hjj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjf&ubah}(h]h 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function)c.xe_exec_queue_lrchNtauh1jhjhhhNhNubj)}(hhh](j )}(h;struct xe_lrc * xe_exec_queue_lrc (struct xe_exec_queue *q)h]j)}(h9struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q)h](j)}(hjh]hstruct}(hjH'hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjD'hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM5ubj+)}(h h]h }(hjV'hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjD'hhhjU'hM5ubh)}(hhh]jB)}(hxe_lrch]hxe_lrc}(hjg'hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjd'ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetji'modnameN classnameNj&j))}j,]j/)}j"xe_exec_queue_lrcsbc.xe_exec_queue_lrcasbuh1hhjD'hhhjU'hM5ubj+)}(h h]h }(hj'hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjD'hhhjU'hM5ubjC)}(hjFh]h*}(hj'hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjD'hhhjU'hM5ubj<)}(hxe_exec_queue_lrch]jB)}(hj'h]hxe_exec_queue_lrc}(hj'hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj'ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjD'hhhjU'hM5ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj'ubj+)}(h h]h }(hj'hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj'ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj'hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj'modnameN classnameNj&j))}j,]j'c.xe_exec_queue_lrcasbuh1hhj'ubj+)}(h h]h }(hj'hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj'ubjC)}(hjFh]h*}(hj (hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj'ubjB)}(hjUh]hq}(hj(hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj'ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj'ubah}(h]h ]h"]h$]h&]hhuh1jhjD'hhhjU'hM5ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj@'hhhjU'hM5ubah}(h]j;'ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjU'hM5hj='hhubjn)}(hhh]h)}(hGet the LRC from exec queue.h]hGet the LRC from exec queue.}(hjB(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM5hj?(hhubah}(h]h ]h"]h$]h&]uh1jmhj='hhhjU'hM5ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjZ(jjZ(jjjuh1jhhhjhNhNubj)}(hX**Parameters** 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This function does not increment reference count, so the reference can be just forgotten after use.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM7hj^(ubh)}(h **Return**h]j)}(hj(h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM<hj^(ubh)}(h+Pointer to LRC on success, error on failureh]h+Pointer to LRC on success, error on failure}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM=hj^(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_exec_queue_create (C function)c.xe_exec_queue_createhNtauh1jhjhhhNhNubj)}(hhh](j )}(hstruct xe_exec_queue * xe_exec_queue_create (struct xe_device *xe, struct xe_vm *vm, u32 logical_mask, u16 width, struct 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}(hjP*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj*ubjC)}(hjFh]h*}(hj^*hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj*ubjB)}(hvmh]hvm}(hjk*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj)ubj)}(hu32 logical_maskh](h)}(hhh]jB)}(hu32h]hu32}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj*modnameN classnameNj&j))}j,]je)c.xe_exec_queue_createasbuh1hhj*ubj+)}(h h]h }(hj*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj*ubjB)}(h logical_maskh]h logical_mask}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj)ubj)}(h u16 widthh](h)}(hhh]jB)}(hu16h]hu16}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj*modnameN classnameNj&j))}j,]je)c.xe_exec_queue_createasbuh1hhj*ubj+)}(h h]h }(hj*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj*ubjB)}(hwidthh]hwidth}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj)ubj)}(hstruct xe_hw_engine *hweh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj+ubj+)}(h h]h }(hj!+hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj+ubh)}(hhh]jB)}(h xe_hw_engineh]h xe_hw_engine}(hj2+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj/+ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj4+modnameN classnameNj&j))}j,]je)c.xe_exec_queue_createasbuh1hhj+ubj+)}(h h]h }(hjP+hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj+ubjC)}(hjFh]h*}(hj^+hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj+ubjB)}(hhweh]hhwe}(hjk+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj+ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj)ubj)}(h u32 flagsh](h)}(hhh]jB)}(hu32h]hu32}(hj+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj+modnameN classnameNj&j))}j,]je)c.xe_exec_queue_createasbuh1hhj+ubj+)}(h h]h }(hj+hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj+ubjB)}(hflagsh]hflags}(hj+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj+ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj)ubj)}(hu64 extensionsh](h)}(hhh]jB)}(hu64h]hu64}(hj+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj+modnameN classnameNj&j))}j,]je)c.xe_exec_queue_createasbuh1hhj+ubj+)}(h h]h }(hj+hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj+ubjB)}(h extensionsh]h extensions}(hj+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj+ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj)ubeh}(h]h ]h"]h$]h&]hhuh1jhj&)hhhj7)hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj")hhhj7)hMubah}(h]j)ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj7)hMhj)hhubjn)}(hhh]h)}(hCreate an exec queueh]hCreate an exec queue}(hj%,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj",hhubah}(h]h ]h"]h$]h&]uh1jmhj)hhhj7)hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj=,jj=,jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` Xe device ``struct xe_vm *vm`` VM for the exec queue ``u32 logical_mask`` Logical mask of HW engines ``u16 width`` Width of the exec queue (number of LRCs) ``struct xe_hw_engine *hwe`` Hardware engine ``u32 flags`` Exec queue creation flags ``u64 extensions`` Extensions for exec queue creation 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]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj,ubj)}(hhh]h)}(hVM for the exec queueh]hVM for the exec queue}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hMhj],ubj)}(h0``u32 logical_mask`` Logical mask of HW engines h](j)}(h``u32 logical_mask``h]j)}(hj,h]hu32 logical_mask}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj,ubj)}(hhh]h)}(hLogical mask of HW enginesh]hLogical mask of HW engines}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hMhj],ubj)}(h7``u16 width`` Width of the exec queue (number of LRCs) h](j)}(h ``u16 width``h]j)}(hj-h]h u16 width}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: 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creation flagsh]hExec queue creation flags}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj}-ubeh}(h]h ]h"]h$]h&]uh1jhj-hMhj],ubj)}(h6``u64 extensions`` Extensions for exec queue creation h](j)}(h``u64 extensions``h]j)}(hj-h]hu64 extensions}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj-ubj)}(hhh]h)}(h"Extensions for exec queue creationh]h"Extensions for exec queue creation}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hMhj],ubeh}(h]h ]h"]h$]h&]uh1jhjA,ubh)}(h**Description**h]j)}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjA,ubh)}(hLCreate an exec queue (allocate and initialize) with the specified parametersh]hLCreate an exec queue (allocate and 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*xe, struct xe_gt *gt, struct xe_vm *vm, enum xe_engine_class class, u32 flags, u64 extensions)h](j)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj.ubj+)}(h h]h }(hj.hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj.ubh)}(hhh]jB)}(h xe_deviceh]h xe_device}(hj.hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj.modnameN classnameNj&j))}j,]j.c.xe_exec_queue_create_classasbuh1hhj.ubj+)}(h h]h }(hj/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj.ubjC)}(hjFh]h*}(hj'/hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj.ubjB)}(hxeh]hxe}(hj4/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj.ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(hstruct xe_gt *gth](j)}(hjh]hstruct}(hjM/hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjI/ubj+)}(h h]h }(hjZ/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjI/ubh)}(hhh]jB)}(hxe_gth]hxe_gt}(hjk/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjh/ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjm/modnameN classnameNj&j))}j,]j.c.xe_exec_queue_create_classasbuh1hhjI/ubj+)}(h h]h }(hj/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjI/ubjC)}(hjFh]h*}(hj/hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjI/ubjB)}(hgth]hgt}(hj/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjI/ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj/ubj+)}(h h]h }(hj/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj/ubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hj/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj/modnameN classnameNj&j))}j,]j.c.xe_exec_queue_create_classasbuh1hhj/ubj+)}(h h]h }(hj/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj/ubjC)}(hjFh]h*}(hj0hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj/ubjB)}(hvmh]hvm}(hj0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj/ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(henum xe_engine_class classh](j)}(hjh]henum}(hj-0hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj)0ubj+)}(h h]h }(hj:0hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj)0ubh)}(hhh]jB)}(hxe_engine_classh]hxe_engine_class}(hjK0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjH0ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjM0modnameN classnameNj&j))}j,]j.c.xe_exec_queue_create_classasbuh1hhj)0ubj+)}(h h]h }(hji0hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj)0ubjB)}(hclassh]hclass}(hjw0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj)0ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(h u32 flagsh](h)}(hhh]jB)}(hu32h]hu32}(hj0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj0modnameN classnameNj&j))}j,]j.c.xe_exec_queue_create_classasbuh1hhj0ubj+)}(h h]h }(hj0hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj0ubjB)}(hflagsh]hflags}(hj0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj0ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(hu64 extensionsh](h)}(hhh]jB)}(hu64h]hu64}(hj0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj0modnameN classnameNj&j))}j,]j.c.xe_exec_queue_create_classasbuh1hhj0ubj+)}(h h]h }(hj0hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj0ubjB)}(h extensionsh]h extensions}(hj1hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj0ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubeh}(h]h ]h"]h$]h&]hhuh1jhj_.hhhjp.hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj[.hhhjp.hMubah}(h]jV.ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjp.hMhjX.hhubjn)}(hhh]h)}(h0Create an exec queue for a specific engine classh]h0Create an exec queue for a specific engine class}(hj11hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj.1hhubah}(h]h ]h"]h$]h&]uh1jmhjX.hhhjp.hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjI1jjI1jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` Xe device ``struct xe_gt *gt`` GT for the exec queue ``struct xe_vm *vm`` VM for the exec queue ``enum xe_engine_class class`` Engine class ``u32 flags`` Exec queue creation flags ``u64 extensions`` Extensions for exec queue creation **Description** Create an exec queue for the specified engine class. **Return** Pointer to the created exec queue on success, ERR_PTR on failureh](h)}(h**Parameters**h]j)}(hjS1h]h Parameters}(hjU1hhhNhNubah}(h]h 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This function should not be called directly; use xe_exec_queue_put() instead.h](h)}(h**Parameters**h]j)}(hj78h]h Parameters}(hj98hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj58ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM;hj18ubj)}(hhh]j)}(h7``struct kref *ref`` Reference count of the exec queue h](j)}(h``struct kref *ref``h]j)}(hjV8h]hstruct kref *ref}(hjX8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjT8ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM8hjP8ubj)}(hhh]h)}(h!Reference count of the exec queueh]h!Reference count of the exec queue}(hjo8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjk8hM8hjl8ubah}(h]h ]h"]h$]h&]uh1jhjP8ubeh}(h]h ]h"]h$]h&]uh1jhjk8hM8hjM8ubah}(h]h ]h"]h$]h&]uh1jhj18ubh)}(h**Description**h]j)}(hj8h]h Description}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM:hj18ubh)}(hCalled when the last reference to the exec queue is dropped. Cleans up all resources associated with the exec queue. This function should not be called directly; use xe_exec_queue_put() instead.h]hCalled when the last reference to the exec queue is dropped. Cleans up all resources associated with the exec queue. This function should not be called directly; use xe_exec_queue_put() instead.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM9hj18ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_fini (C function)c.xe_exec_queue_finihNtauh1jhjhhhNhNubj)}(hhh](j )}(h1void xe_exec_queue_fini (struct xe_exec_queue *q)h]j)}(h0void xe_exec_queue_fini(struct xe_exec_queue *q)h](j)}(hvoidh]hvoid}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM_ubj+)}(h h]h }(hj8hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj8hhhj8hM_ubj<)}(hxe_exec_queue_finih]jB)}(hxe_exec_queue_finih]hxe_exec_queue_fini}(hj8hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj8ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj8hhhj8hM_ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj9ubj+)}(h h]h }(hj 9hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj9ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj19hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj.9ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj39modnameN classnameNj&j))}j,]j/)}j"j8sbc.xe_exec_queue_finiasbuh1hhj9ubj+)}(h h]h }(hjQ9hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj9ubjC)}(hjFh]h*}(hj_9hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj9ubjB)}(hjUh]hq}(hjl9hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj9ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj 9ubah}(h]h ]h"]h$]h&]hhuh1jhj8hhhj8hM_ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj8hhhj8hM_ubah}(h]j8ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj8hM_hj8hhubjn)}(hhh]h)}(hFinalize an exec queueh]hFinalize an exec queue}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM_hj9hhubah}(h]h ]h"]h$]h&]uh1jmhj8hhhj8hM_ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj9jj9jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** Finalizes the exec queue by updating run ticks, releasing LRC references, and freeing the queue structure. This is called after the queue has been destroyed and all references have been dropped.h](h)}(h**Parameters**h]j)}(hj9h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMchj9ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj9h]hstruct xe_exec_queue *q}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM`hj9ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hM`hj9ubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhj9hM`hj9ubah}(h]h ]h"]h$]h&]uh1jhj9ubh)}(h**Description**h]j)}(hj:h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMbhj9ubh)}(hFinalizes the exec queue by updating run ticks, releasing LRC references, and freeing the queue structure. This is called after the queue has been destroyed and all references have been dropped.h]hFinalizes the exec queue by updating run ticks, releasing LRC references, and freeing the queue structure. This is called after the queue has been destroyed and all references have been dropped.}(hj':hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMahj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j&xe_exec_queue_assign_name (C function)c.xe_exec_queue_assign_namehNtauh1jhjhhhNhNubj)}(hhh](j )}(hFvoid xe_exec_queue_assign_name (struct xe_exec_queue *q, u32 instance)h]j)}(hEvoid xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance)h](j)}(hvoidh]hvoid}(hjV:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR:hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMuubj+)}(h h]h }(hje:hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjR:hhhjd:hMuubj<)}(hxe_exec_queue_assign_nameh]jB)}(hxe_exec_queue_assign_nameh]hxe_exec_queue_assign_name}(hjw:hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjs:ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjR:hhhjd:hMuubj)}(h'(struct xe_exec_queue *q, u32 instance)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj:ubj+)}(h h]h }(hj:hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj:ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj:hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj:modnameN classnameNj&j))}j,]j/)}j"jy:sbc.xe_exec_queue_assign_nameasbuh1hhj:ubj+)}(h h]h }(hj:hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj:ubjC)}(hjFh]h*}(hj:hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj:ubjB)}(hjUh]hq}(hj:hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj:ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj:ubj)}(h u32 instanceh](h)}(hhh]jB)}(hu32h]hu32}(hj;hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj;ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj ;modnameN classnameNj&j))}j,]j:c.xe_exec_queue_assign_nameasbuh1hhj;ubj+)}(h h]h }(hj%;hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj;ubjB)}(hinstanceh]hinstance}(hj3;hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj;ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj:ubeh}(h]h ]h"]h$]h&]hhuh1jhjR:hhhjd:hMuubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjN:hhhjd:hMuubah}(h]jI:ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjd:hMuhjK:hhubjn)}(hhh]h)}(hAssign a name to an exec queueh]hAssign a name to an exec queue}(hj];hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMuhjZ;hhubah}(h]h ]h"]h$]h&]uh1jmhjK:hhhjd:hMuubeh}(h]h ](jfunctioneh"]h$]h&]jjjju;jju;jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``u32 instance`` Instance number for the engine **Description** Assigns a human-readable name to the exec queue based on its engine class and instance number (e.g., "rcs0", "vcs1", "bcs2").h](h)}(h**Parameters**h]j)}(hj;h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj};ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMyhjy;ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue 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]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMyhjy;ubh)}(h}Assigns a human-readable name to the exec queue based on its engine class and instance number (e.g., "rcs0", "vcs1", "bcs2").h]hAssigns a human-readable name to the exec queue based on its engine class and instance number (e.g., “rcs0”, “vcs1”, “bcs2”).}(hj(<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMxhjy;ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_exec_queue_lookup (C function)c.xe_exec_queue_lookuphNtauh1jhjhhhNhNubj)}(hhh](j )}(hIstruct xe_exec_queue * xe_exec_queue_lookup (struct xe_file *xef, u32 id)h]j)}(hGstruct xe_exec_queue *xe_exec_queue_lookup(struct xe_file *xef, u32 id)h](j)}(hjh]hstruct}(hjW<hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjS<hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: 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}(hj =hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj<ubjC)}(hjFh]h*}(hj=hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj<ubjB)}(hxefh]hxef}(hj(=hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj<ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj<ubj)}(hu32 idh](h)}(hhh]jB)}(hu32h]hu32}(hjD=hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjA=ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjF=modnameN classnameNj&j))}j,]j<c.xe_exec_queue_lookupasbuh1hhj==ubj+)}(h h]h }(hjb=hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj==ubjB)}(hidh]hid}(hjp=hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj==ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj<ubeh}(h]h ]h"]h$]h&]hhuh1jhjS<hhhjd<hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjO<hhhjd<hMubah}(h]jJ<ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjd<hMhjL<hhubjn)}(hhh]h)}(hLook up an exec queue by IDh]hLook up an exec queue by ID}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=hhubah}(h]h ]h"]h$]h&]uh1jmhjL<hhhjd<hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj=jj=jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_file *xef`` Xe file private data ``u32 id`` Exec queue ID **Description** Looks up an exec queue by its ID and increments its reference count. **Return** Pointer to the exec queue if found, NULL otherwiseh](h)}(h**Parameters**h]j)}(hj=h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubj)}(hhh](j)}(h-``struct xe_file *xef`` Xe file private data h](j)}(h``struct xe_file *xef``h]j)}(hj=h]hstruct xe_file *xef}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubj)}(hhh]h)}(hXe file private datah]hXe file private data}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jhj=hMhj=ubj)}(h``u32 id`` Exec queue ID h](j)}(h ``u32 id``h]j)}(hj>h]hu32 id}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj>ubj)}(hhh]h)}(h Exec queue IDh]h Exec queue ID}(hj->hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)>hMhj*>ubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhj)>hMhj=ubeh}(h]h ]h"]h$]h&]uh1jhj=ubh)}(h**Description**h]j)}(hjO>h]h Description}(hjQ>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjM>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubh)}(hDLooks up an exec queue by its ID and increments its reference count.h]hDLooks up an exec queue by its ID and increments its reference count.}(hje>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubh)}(h **Return**h]j)}(hjv>h]hReturn}(hjx>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjt>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubh)}(h2Pointer to the exec queue if found, NULL otherwiseh]h2Pointer to the exec queue if found, NULL otherwise}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j2xe_exec_queue_device_get_max_priority (C function)'c.xe_exec_queue_device_get_max_priorityhNtauh1jhjhhhNhNubj)}(hhh](j )}(hXenum xe_exec_queue_priority xe_exec_queue_device_get_max_priority (struct xe_device *xe)h]j)}(hWenum xe_exec_queue_priority xe_exec_queue_device_get_max_priority(struct xe_device *xe)h](j)}(hjh]henum}(hj>hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj>hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj>hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj>hhhj>hMubh)}(hhh]jB)}(hxe_exec_queue_priorityh]hxe_exec_queue_priority}(hj>hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj>modnameN classnameNj&j))}j,]j/)}j"%xe_exec_queue_device_get_max_prioritysb'c.xe_exec_queue_device_get_max_priorityasbuh1hhj>hhhj>hMubj+)}(h h]h }(hj>hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj>hhhj>hMubj<)}(h%xe_exec_queue_device_get_max_priorityh]jB)}(hj>h]h%xe_exec_queue_device_get_max_priority}(hj ?hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ?ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj>hhhj>hMubj)}(h(struct xe_device *xe)h]j)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hj(?hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj$?ubj+)}(h h]h }(hj5?hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$?ubh)}(hhh]jB)}(h xe_deviceh]h xe_device}(hjF?hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjC?ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjH?modnameN classnameNj&j))}j,]j>'c.xe_exec_queue_device_get_max_priorityasbuh1hhj$?ubj+)}(h h]h }(hjd?hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$?ubjC)}(hjFh]h*}(hjr?hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj$?ubjB)}(hxeh]hxe}(hj?hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj$?ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ?ubah}(h]h ]h"]h$]h&]hhuh1jhj>hhhj>hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj>hhhj>hMubah}(h]j>ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj>hMhj>hhubjn)}(hhh]h)}(h'Get maximum priority for an exec queuesh]h'Get maximum priority for an exec queues}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj?hhubah}(h]h ]h"]h$]h&]uh1jmhj>hhhj>hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj?jj?jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_device *xe`` Xe device **Description** Returns the maximum priority level that can be assigned to an exec queues. **Return** Maximum priority level (HIGH if CAP_SYS_NICE, NORMAL otherwise)h](h)}(h**Parameters**h]j)}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubah}(h]h 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]jOah"]h$]h&]uh1jBhj@ubjB)}(hdevh]hdev}(hj'AhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj@ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj@ubj)}(h void *datah](j)}(hvoidh]hvoid}(hj@AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj]BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYBhMhjZBubah}(h]h ]h"]h$]h&]uh1jhj>Bubeh}(h]h ]h"]h$]h&]uh1jhjYBhMhj;Bubj)}(h``void *data`` IOCTL data h](j)}(h``void *data``h]j)}(hj}Bh]h void *data}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{Bubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjwBubj)}(hhh]h)}(h IOCTL datah]h IOCTL data}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1jhjwBubeh}(h]h ]h"]h$]h&]uh1jhjBhMhj;Bubj)}(h#``struct drm_file *file`` DRM file h](j)}(h``struct drm_file *file``h]j)}(hjBh]hstruct drm_file *file}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjBubj)}(hhh]h)}(hDRM fileh]hDRM file}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jhjBhMhj;Bubeh}(h]h ]h"]h$]h&]uh1jhjBubh)}(h**Description**h]j)}(hjBh]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjBubh)}(hjAllows setting properties on an existing exec queue. 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Supports creating VM bind queues, regular exec queues, multi-lrc exec queues and multi-queue groups. **Return** 0 on success with exec_queue_id filled in, negative error code on failureh](h)}(h**Parameters**h]j)}(hjDh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubj)}(hhh](j)}(h&``struct drm_device *dev`` DRM device h](j)}(h``struct drm_device *dev``h]j)}(hjEh]hstruct drm_device *dev}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj Eubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj)EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%EhMhj&Eubah}(h]h ]h"]h$]h&]uh1jhj Eubeh}(h]h ]h"]h$]h&]uh1jhj%EhMhjEubj)}(h``void *data`` IOCTL data h](j)}(h``void *data``h]j)}(hjIEh]h void *data}(hjKEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGEubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjCEubj)}(hhh]h)}(h IOCTL datah]h IOCTL data}(hjbEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^EhMhj_Eubah}(h]h ]h"]h$]h&]uh1jhjCEubeh}(h]h ]h"]h$]h&]uh1jhj^EhMhjEubj)}(h#``struct drm_file *file`` DRM file h](j)}(h``struct drm_file *file``h]j)}(hjEh]hstruct drm_file *file}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj|Eubj)}(hhh]h)}(hDRM fileh]hDRM file}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMhjEubah}(h]h ]h"]h$]h&]uh1jhj|Eubeh}(h]h ]h"]h$]h&]uh1jhjEhMhjEubeh}(h]h ]h"]h$]h&]uh1jhjDubh)}(h**Description**h]j)}(hjEh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubh)}(hCreates a new exec queue based on user-provided parameters. Supports creating VM bind queues, regular exec queues, multi-lrc exec queues and multi-queue groups.h]hCreates a new exec queue based on user-provided parameters. Supports creating VM bind queues, regular exec queues, multi-lrc exec queues and multi-queue groups.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubh)}(h **Return**h]j)}(hjEh]hReturn}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubh)}(hI0 on success with exec_queue_id filled in, negative error code on failureh]hI0 on success with exec_queue_id filled in, negative error code on failure}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j-xe_exec_queue_get_property_ioctl (C function)"c.xe_exec_queue_get_property_ioctlhNtauh1jhjhhhNhNubj)}(hhh](j )}(h`int xe_exec_queue_get_property_ioctl (struct drm_device *dev, void *data, struct drm_file *file)h]j)}(h_int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data, struct drm_file *file)h](j)}(hinth]hint}(hj)FhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%Fhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj8FhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj%Fhhhj7FhMubj<)}(h xe_exec_queue_get_property_ioctlh]jB)}(h xe_exec_queue_get_property_ioctlh]h xe_exec_queue_get_property_ioctl}(hjJFhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjFFubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj%Fhhhj7FhMubj)}(h;(struct drm_device *dev, void *data, struct drm_file *file)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjfFhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjbFubj+)}(h h]h }(hjsFhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjbFubh)}(hhh]jB)}(h drm_deviceh]h drm_device}(hjFhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjFmodnameN classnameNj&j))}j,]j/)}j"jLFsb"c.xe_exec_queue_get_property_ioctlasbuh1hhjbFubj+)}(h h]h }(hjFhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjbFubjC)}(hjFh]h*}(hjFhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjbFubjB)}(hdevh]hdev}(hjFhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjbFubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj^Fubj)}(h void *datah](j)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj+)}(h h]h }(hjFhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjFubjC)}(hjFh]h*}(hjFhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjFubjB)}(hdatah]hdata}(hjGhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjFubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj^Fubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hjGhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjGubj+)}(h h]h }(hj'GhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjGubh)}(hhh]jB)}(hdrm_fileh]hdrm_file}(hj8GhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj5Gubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj:GmodnameN classnameNj&j))}j,]jF"c.xe_exec_queue_get_property_ioctlasbuh1hhjGubj+)}(h h]h }(hjVGhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjGubjC)}(hjFh]h*}(hjdGhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjGubjB)}(hfileh]hfile}(hjqGhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjGubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj^Fubeh}(h]h ]h"]h$]h&]hhuh1jhj%Fhhhj7FhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj!Fhhhj7FhMubah}(h]jFah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj7FhMhjFhhubjn)}(hhh]h)}(h!Get a property from an exec queueh]h!Get a property from an exec queue}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGhhubah}(h]h ]h"]h$]h&]uh1jmhjFhhhj7FhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjGjjGjjjuh1jhhhjhNhNubj)}(hXC**Parameters** ``struct drm_device *dev`` DRM device ``void *data`` IOCTL data ``struct drm_file *file`` DRM file **Description** Retrieves property values from an existing exec queue. Currently supports getting the ban/reset status. **Return** 0 on success with value filled in, negative error code on failureh](h)}(h**Parameters**h]j)}(hjGh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubj)}(hhh](j)}(h&``struct drm_device *dev`` DRM device h](j)}(h``struct drm_device *dev``h]j)}(hjGh]hstruct drm_device *dev}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jhjGhMhjGubj)}(h``void *data`` IOCTL data h](j)}(h``void *data``h]j)}(hjHh]h void *data}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjHubj)}(hhh]h)}(h IOCTL datah]h IOCTL data}(hj.HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*HhMhj+Hubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jhj*HhMhjGubj)}(h#``struct drm_file *file`` DRM file h](j)}(h``struct drm_file *file``h]j)}(hjNHh]hstruct drm_file *file}(hjPHhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjLHubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjHHubj)}(hhh]h)}(hDRM fileh]hDRM file}(hjgHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjcHhMhjdHubah}(h]h ]h"]h$]h&]uh1jhjHHubeh}(h]h ]h"]h$]h&]uh1jhjcHhMhjGubeh}(h]h ]h"]h$]h&]uh1jhjGubh)}(h**Description**h]j)}(hjHh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubh)}(hgRetrieves property values from an existing exec queue. Currently supports getting the ban/reset status.h]hgRetrieves property values from an existing exec queue. Currently supports getting the ban/reset status.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubh)}(h **Return**h]j)}(hjHh]hReturn}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubh)}(hA0 on success with value filled in, negative error code on failureh]hA0 on success with value filled in, negative error code on failure}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j xe_exec_queue_is_lr (C function)c.xe_exec_queue_is_lrhNtauh1jhjhhhNhNubj)}(hhh](j )}(h2bool xe_exec_queue_is_lr (struct xe_exec_queue *q)h]j)}(h1bool xe_exec_queue_is_lr(struct xe_exec_queue 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]jOah"]h$]h&]uh1jBhjJubjB)}(hjUh]hq}(hj KhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjJubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjJubah}(h]h ]h"]h$]h&]hhuh1jhjpJhhhjJhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjlJhhhjJhMubah}(h]jgJah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjJhMhjiJhhubjn)}(hhh]h)}(hWhether an exec_queue is idle.h]hWhether an exec_queue is idle.}(hj2KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj/Khhubah}(h]h ]h"]h$]h&]uh1jmhjiJhhhjJhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjJKjjJKjjjuh1jhhhjhNhNubj)}(hX$**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Description** FIXME: Need to determine what to use as the short-lived timeline lock for the exec_queues, so that the return value of this function becomes more than just an advisory snapshot in time. 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*q)h]j)}(hRubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjCRmodnameN classnameNj&j))}j,]j/)}j"j Rsbc.xe_exec_queue_last_fence_putasbuh1hhjRubj+)}(h h]h }(hjaRhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjRubjC)}(hjFh]h*}(hjoRhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjRubjB)}(hjUh]hq}(hj|RhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjRubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjRubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjRhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjRubj+)}(h h]h }(hjRhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjRubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjRhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjRubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjRmodnameN classnameNj&j))}j,]j]Rc.xe_exec_queue_last_fence_putasbuh1hhjRubj+)}(h h]h }(hjRhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjRubjC)}(hjFh]h*}(hjRhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjRubjB)}(hvmh]hvm}(hjRhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjRubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjRubeh}(h]h ]h"]h$]h&]hhuh1jhjQhhhjQhMjubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjQhhhjQhMjubah}(h]jQah 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reftargetjFTmodnameN classnameNj&j))}j,]j/)}j"j Tsb'c.xe_exec_queue_last_fence_put_unlockedasbuh1hhj"Tubj+)}(h h]h }(hjdThhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj"TubjC)}(hjFh]h*}(hjrThhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj"TubjB)}(hjUh]hq}(hjThhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj"Tubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjTubah}(h]h ]h"]h$]h&]hhuh1jhjShhhjShMvubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjShhhjShMvubah}(h]jSah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjShMvhjShhubjn)}(hhh]h)}(hDrop ref to last fence unlockedh]hDrop ref to last fence unlocked}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMvhjThhubah}(h]h ]h"]h$]h&]uh1jmhjShhhjShMvubeh}(h]h ](jfunctioneh"]h$]h&]jjjjTjjTjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** Only safe to be called from xe_exec_queue_destroy().h](h)}(h**Parameters**h]j)}(hjTh]h Parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjTubah}(h]h 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./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j4xe_exec_queue_last_fence_get_for_resume (C function))c.xe_exec_queue_last_fence_get_for_resumehNtauh1jhjhhhNhNubj)}(hhh](j )}(hfstruct dma_fence * xe_exec_queue_last_fence_get_for_resume (struct xe_exec_queue *q, struct xe_vm *vm)h]j)}(hdstruct dma_fence *xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjWhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hjXhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjWhhhjXhMubh)}(hhh]jB)}(h dma_fenceh]h dma_fence}(hjXhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjXmodnameN classnameNj&j))}j,]j/)}j"'xe_exec_queue_last_fence_get_for_resumesb)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjWhhhjXhMubj+)}(h h]h }(hj4XhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjWhhhjXhMubjC)}(hjFh]h*}(hjBXhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjWhhhjXhMubj<)}(h'xe_exec_queue_last_fence_get_for_resumeh]jB)}(hj1Xh]h'xe_exec_queue_last_fence_get_for_resume}(hjSXhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjOXubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjWhhhjXhMubj)}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjnXhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjjXubj+)}(h h]h }(hj{XhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjjXubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjXhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjXmodnameN classnameNj&j))}j,]j/X)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjjXubj+)}(h h]h }(hjXhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjjXubjC)}(hjFh]h*}(hjXhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjjXubjB)}(hjUh]hq}(hjXhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjjXubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjfXubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjXhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjXubj+)}(h h]h }(hjXhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjXubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjXhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjXmodnameN classnameNj&j))}j,]j/X)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjXubj+)}(h h]h }(hjYhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjXubjC)}(hjFh]h*}(hj'YhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjXubjB)}(hvmh]hvm}(hj4YhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjXubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjfXubeh}(h]h ]h"]h$]h&]hhuh1jhjWhhhjXhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjWhhhjXhMubah}(h]jWah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjXhMhjWhhubjn)}(hhh]h)}(hGet last fenceh]hGet last fence}(hj^YhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj[Yhhubah}(h]h ]h"]h$]h&]uh1jmhjWhhhjXhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjvYjjvYjjjuh1jhhhjhNhNubj)}(hXt**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held. **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hjYh]h Parameters}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~Yubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjzYubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjYh]hstruct xe_exec_queue *q}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjYubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjYubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jhjYhMhjYubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hjYh]hstruct xe_vm *vm}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjYubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjYubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jhjYhMhjYubeh}(h]h ]h"]h$]h&]uh1jhjzYubh)}(h**Description**h]j)}(hjZh]h Description}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjzYubh)}(hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held.h]hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group’s long-running exec queue, when the group semaphore is held.}(hj)ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjzYubh)}(h **Return**h]j)}(hj:Zh]hReturn}(hj\ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:\ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj_\h]hstruct xe_exec_queue *q}(hja\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj]\ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjY\ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjx\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjt\hMhju\ubah}(h]h ]h"]h$]h&]uh1jhjY\ubeh}(h]h ]h"]h$]h&]uh1jhjt\hMhjV\ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hj\h]hstruct xe_vm *vm}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj\ubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jhj\hMhjV\ubj)}(h&``struct dma_fence *fence`` The fence h](j)}(h``struct dma_fence *fence``h]j)}(hj\h]hstruct dma_fence *fence}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj\ubj)}(hhh]h)}(h The fenceh]h The fence}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jhj\hMhjV\ubeh}(h]h ]h"]h$]h&]uh1jhj:\ubh)}(h**Description**h]j)}(hj ]h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:\ubh)}(hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h]hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.}(hj"]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_tlb_inval_last_fence_put (C function)(c.xe_exec_queue_tlb_inval_last_fence_puthNtauh1jhjhhhNhNubj)}(hhh](j )}(hjvoid xe_exec_queue_tlb_inval_last_fence_put (struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h]j)}(hivoid xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hvoidh]hvoid}(hjQ]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjM]hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj`]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjM]hhhj_]hMubj<)}(h&xe_exec_queue_tlb_inval_last_fence_puth]jB)}(h&xe_exec_queue_tlb_inval_last_fence_puth]h&xe_exec_queue_tlb_inval_last_fence_put}(hjr]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjn]ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjM]hhhj_]hMubj)}(h>(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj]hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj]ubj+)}(h h]h }(hj]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj]ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj]modnameN classnameNj&j))}j,]j/)}j"jt]sb(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhj]ubj+)}(h h]h }(hj]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj]ubjC)}(hjFh]h*}(hj]hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj]ubjB)}(hjUh]hq}(hj]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj]ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj]ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj]hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj]ubj+)}(h h]h }(hj ^hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj]ubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hj^hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj^modnameN classnameNj&j))}j,]j](c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhj]ubj+)}(h h]h }(hj;^hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj]ubjC)}(hjFh]h*}(hjI^hhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj]ubjB)}(hvmh]hvm}(hjV^hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj]ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj]ubj)}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hjo^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk^ubj+)}(h h]h }(hj}^hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjk^ubj)}(hinth]hint}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk^ubj+)}(h h]h }(hj^hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjk^ubjB)}(htypeh]htype}(hj^hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjk^ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj]ubeh}(h]h ]h"]h$]h&]hhuh1jhjM]hhhj_]hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjI]hhhj_]hMubah}(h]jD]ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj_]hMhjF]hhubjn)}(hhh]h)}(h'Drop ref to last TLB invalidation fenceh]h'Drop ref to last TLB invalidation fence}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj^hhubah}(h]h ]h"]h$]h&]uh1jmhjF]hhhj_]hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj^jj^jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GTh](h)}(h**Parameters**h]j)}(hj^h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj^ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj_h]hstruct xe_exec_queue *q}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj _ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj+_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'_hMhj(_ubah}(h]h ]h"]h$]h&]uh1jhj _ubeh}(h]h ]h"]h$]h&]uh1jhj'_hMhj _ubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hjK_h]hstruct xe_vm *vm}(hjM_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjI_ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjE_ubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hjd_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`_hMhja_ubah}(h]h ]h"]h$]h&]uh1jhjE_ubeh}(h]h ]h"]h$]h&]uh1jhj`_hMhj _ubj)}(h0``unsigned int type`` Either primary or media GTh](j)}(h``unsigned int type``h]j)}(hj_h]hunsigned int type}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj~_ubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj_ubah}(h]h ]h"]h$]h&]uh1jhj~_ubeh}(h]h ]h"]h$]h&]uh1jhj_hMhj _ubeh}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjbbhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj^bubj+)}(h h]h }(hjobhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj^bubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjbhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj}bubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjbmodnameN classnameNj&j))}j,]j#b(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhj^bubj+)}(h h]h }(hjbhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj^bubjC)}(hjFh]h*}(hjbhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj^bubjB)}(hjUh]hq}(hjbhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj^bubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjZbubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjbhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjbubj+)}(h h]h }(hjbhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjbubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjbhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjbubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjbmodnameN classnameNj&j))}j,]j#b(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhjbubj+)}(h h]h }(hj chhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjbubjC)}(hjFh]h*}(hjchhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjbubjB)}(hvmh]hvm}(hj(chhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjbubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjZbubj)}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hjAchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=cubj+)}(h h]h }(hjOchhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=cubj)}(hinth]hint}(hj]chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=cubj+)}(h h]h }(hjkchhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=cubjB)}(htypeh]htype}(hjychhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj=cubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjZbubeh}(h]h ]h"]h$]h&]hhuh1jhjahhhjahMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjahhhjahMubah}(h]jaah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjahMhjahhubjn)}(hhh]h)}(h#Get last fence for TLB invalidationh]h#Get last fence for TLB invalidation}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjchhubah}(h]h ]h"]h$]h&]uh1jmhjahhhjahMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjcjjcjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GT **Description** Get last fence, takes a ref **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hjch]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjcubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjch]hstruct xe_exec_queue *q}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjcubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jhjchMhjcubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hjdh]hstruct xe_vm *vm}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjdubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hj6dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2dhMhj3dubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jhj2dhMhjcubj)}(h1``unsigned int type`` Either primary or media GT h](j)}(h``unsigned int type``h]j)}(hjVdh]hunsigned int type}(hjXdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjTdubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjPdubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hjodhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkdhMhjldubah}(h]h ]h"]h$]h&]uh1jhjPdubeh}(h]h ]h"]h$]h&]uh1jhjkdhMhjcubeh}(h]h ]h"]h$]h&]uh1jhjcubh)}(h**Description**h]j)}(hjdh]h Description}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjcubh)}(hGet last fence, takes a refh]hGet last fence, takes a ref}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjcubh)}(h **Return**h]j)}(hjdh]hReturn}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjcubh)}(h6last fence if not signaled, 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ehMubj<)}(h&xe_exec_queue_tlb_inval_last_fence_seth]jB)}(h&xe_exec_queue_tlb_inval_last_fence_seth]h&xe_exec_queue_tlb_inval_last_fence_set}(hjehhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjeubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjdhhhj ehMubj)}(hW(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj:ehhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj6eubj+)}(h h]h }(hjGehhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj6eubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjXehhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjUeubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjZemodnameN classnameNj&j))}j,]j/)}j"j esb(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhj6eubj+)}(h h]h }(hjxehhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj6eubjC)}(hjFh]h*}(hjehhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhj6eubjB)}(hjUh]hq}(hjehhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj6eubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj2eubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjehhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjeubj+)}(h h]h }(hjehhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjeubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjehhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetjemodnameN classnameNj&j))}j,]jte(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhjeubj+)}(h h]h }(hjehhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjeubjC)}(hjFh]h*}(hjehhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjeubjB)}(hvmh]hvm}(hjfhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjeubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj2eubj)}(hstruct dma_fence *fenceh](j)}(hjh]hstruct}(hjfhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjfubj+)}(h h]h }(hj(fhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjfubh)}(hhh]jB)}(h dma_fenceh]h dma_fence}(hj9fhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj6fubah}(h]h ]h"]h$]h&] refdomainjreftypej" reftargetj;fmodnameN classnameNj&j))}j,]jte(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhjfubj+)}(h h]h }(hjWfhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjfubjC)}(hjFh]h*}(hjefhhhNhNubah}(h]h ]jOah"]h$]h&]uh1jBhjfubjB)}(hfenceh]hfence}(hjrfhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjfubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj2eubj)}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj+)}(h h]h }(hjfhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjfubj)}(hinth]hint}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj+)}(h h]h }(hjfhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjfubjB)}(htypeh]htype}(hjfhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjfubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj2eubeh}(h]h ]h"]h$]h&]hhuh1jhjdhhhj ehMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjdhhhj ehMubah}(h]jdah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj ehMhjdhhubjn)}(hhh]h)}(h#Set last fence for TLB invalidationh]h#Set last fence for TLB invalidation}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjfhhubah}(h]h ]h"]h$]h&]uh1jmhjdhhhj ehMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjgjjgjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec 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Increases reference count for fence, when closing queue xe_exec_queue_tlb_inval_last_fence_put should be called.h]hSet the last fence for the tlb invalidation type on the queue. Increases reference count for fence, when closing queue xe_exec_queue_tlb_inval_last_fence_put should be called.}(hj*hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj gubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_exec_queue_contexts_hwsp_rebase (C function)$c.xe_exec_queue_contexts_hwsp_rebasehNtauh1jhjhhhNhNubj)}(hhh](j )}(hOint xe_exec_queue_contexts_hwsp_rebase (struct xe_exec_queue *q, void *scratch)h]j)}(hNint xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)h](j)}(hinth]hint}(hjYhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM)ubj+)}(h h]h }(hjhhhhhNhNubah}(h]h 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