sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget(/translations/zh_CN/gpu/xe/xe_exec_queuemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/zh_TW/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/it_IT/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ja_JP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ko_KR/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/pt_BR/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/sp_SP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhB/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue.rsthKubhsection)}(hhh](htitle)}(hExecution Queueh]hExecution Queue}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.h]hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK"hhhhubh)}(hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.h]hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK&hhhhubh)}(hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.h]hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK)hhhhubh)}(hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.h]hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK-hhhhubh)}(hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.h]hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK1hhhhubh)}(hhh](h)}(hMulti Queue Grouph]hMulti Queue Group}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hhhhhK ubh)}(hXMulti Queue Group is another mode of execution supported by the compute and blitter copy command streamers (CCS and BCS, respectively). It is an enhancement of the existing hardware architecture and leverages the same submission model. It enables support for efficient, parallel execution of multiple queues within a single shared context. The multi queue group functionality is only supported with GuC submission backend. All the queues of a group must use the same address space (VM).h]hXMulti Queue Group is another mode of execution supported by the compute and blitter copy command streamers (CCS and BCS, respectively). It is an enhancement of the existing hardware architecture and leverages the same submission model. It enables support for efficient, parallel execution of multiple queues within a single shared context. The multi queue group functionality is only supported with GuC submission backend. All the queues of a group must use the same address space (VM).}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chK9hj*hhubh)}(hThe DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE execution queue property supports creating a multi queue group and adding queues to a queue group.h]hThe DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE execution queue property supports creating a multi queue group and adding queues to a queue group.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKAhj*hhubh)}(hXThe XE_EXEC_QUEUE_CREATE ioctl call with above property with value field set to DRM_XE_MULTI_GROUP_CREATE, will create a new multi queue group with the queue being created as the primary queue (aka q0) of the group. To add secondary queues to the group, they need to be created with the above property with id of the primary queue as the value. The properties of the primary queue (like priority, time slice) applies to the whole group. So, these properties can't be set for secondary queues of a group.h]hXThe XE_EXEC_QUEUE_CREATE ioctl call with above property with value field set to DRM_XE_MULTI_GROUP_CREATE, will create a new multi queue group with the queue being created as the primary queue (aka q0) of the group. To add secondary queues to the group, they need to be created with the above property with id of the primary queue as the value. The properties of the primary queue (like priority, time slice) applies to the whole group. So, these properties can’t be set for secondary queues of a group.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKDhj*hhubh)}(hXaThe hardware does not support removing a queue from a multi-queue group. However, queues can be dynamically added to the group. A group can have up to 64 queues. To support this, XeKMD holds references to LRCs of the queues even after the queues are destroyed by the user until the whole group is destroyed. The secondary queues hold a reference to the primary queue thus preventing the group from being destroyed when user destroys the primary queue. Once the primary queue is destroyed, secondary queues can't be added to the queue group and new job submissions on existing secondary queues are not allowed.h]hXcThe hardware does not support removing a queue from a multi-queue group. However, queues can be dynamically added to the group. A group can have up to 64 queues. To support this, XeKMD holds references to LRCs of the queues even after the queues are destroyed by the user until the whole group is destroyed. The secondary queues hold a reference to the primary queue thus preventing the group from being destroyed when user destroys the primary queue. Once the primary queue is destroyed, secondary queues can’t be added to the queue group and new job submissions on existing secondary queues are not allowed.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKLhj*hhubh)}(hXThe queues of a multi queue group can set their priority within the group through the DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY property. This multi queue priority can also be set dynamically through the XE_EXEC_QUEUE_SET_PROPERTY ioctl. This is the only other property supported by the secondary queues of a multi queue group, other than DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE.h]hXThe queues of a multi queue group can set their priority within the group through the DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY property. This multi queue priority can also be set dynamically through the XE_EXEC_QUEUE_SET_PROPERTY ioctl. This is the only other property supported by the secondary queues of a multi queue group, other than DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKVhj*hhubh)}(hWhen GuC reports an error on any of the queues of a multi queue group, the queue cleanup mechanism is invoked for all the queues of the group as hardware cannot make progress on the multi queue context.h]hWhen GuC reports an error on any of the queues of a multi queue group, the queue cleanup mechanism is invoked for all the queues of the group as hardware cannot make progress on the multi queue context.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chK]hj*hhubh)}(hQRefer :ref:`multi-queue-group-guc-interface` for multi queue group GuC interface.h](hRefer }(hjhhhNhNubh)}(h&:ref:`multi-queue-group-guc-interface`h]hinline)}(hjh]hmulti-queue-group-guc-interface}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_exec_queue refdomainjreftyperef refexplicitrefwarn reftargetmulti-queue-group-guc-interfaceuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKahjubh% for multi queue group GuC interface.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKahj*hhubhtarget)}(h$.. _multi-queue-group-guc-interface:h]h}(h]h ]h"]h$]h&]refidmulti-queue-group-guc-interfaceuh1jhKhj*hhhhubeh}(h]multi-queue-groupah ]h"]multi queue groupah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(hMulti Queue Group GuC interfaceh]hMulti Queue Group GuC interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe multi queue group coordination between KMD and GuC is through a software construct called Context Group Page (CGP). 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]h"]h$]h&]uh1jAhj>ubjB)}(hhh](jG)}(hhh]h)}(h 160..1024h]h 160..1024}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjKubah}(h]h ]h"]h$]h&]uh1jFhjHubjG)}(hhh]h)}(hRESERVEDh]hRESERVED}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhjcubah}(h]h ]h"]h$]h&]uh1jFhjHubjG)}(hhh]h)}(hMBZh]hMBZ}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhjzubah}(h]h ]h"]h$]h&]uh1jFhjHubeh}(h]h ]h"]h$]h&]uh1jAhj>ubeh}(h]h ]h"]h$]h&]uh1j<hjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chNubh)}(hXWhile registering Q0 with GuC, CGP is updated with Q0 entry and GuC is notified through XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_QUEUE H2G message which specifies the CGP address. When the secondary queues are added to the group, the CGP is updated with entry for that queue and GuC is notified through the H2G interface XE_GUC_ACTION_MULTI_QUEUE_CONTEXT_CGP_SYNC. GuC responds to these H2G messages with a XE_GUC_ACTION_NOTIFY_MULTIQ_CONTEXT_CGP_SYNC_DONE G2H message. GuC also sends a XE_GUC_ACTION_NOTIFY_MULTI_QUEUE_CGP_CONTEXT_ERROR notification for any error in the CGP. Only one of these CGP update messages can be outstanding (waiting for GuC response) at any time. The bits in KMD_QUEUE_UPDATE_MASK_DW* fields indicate which queue entry is being updated in the CGP.h]hXWhile registering Q0 with GuC, CGP is updated with Q0 entry and GuC is notified through XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_QUEUE H2G message which specifies the CGP address. When the secondary queues are added to the group, the CGP is updated with entry for that queue and GuC is notified through the H2G interface XE_GUC_ACTION_MULTI_QUEUE_CONTEXT_CGP_SYNC. GuC responds to these H2G messages with a XE_GUC_ACTION_NOTIFY_MULTIQ_CONTEXT_CGP_SYNC_DONE G2H message. GuC also sends a XE_GUC_ACTION_NOTIFY_MULTI_QUEUE_CGP_CONTEXT_ERROR notification for any error in the CGP. Only one of these CGP update messages can be outstanding (waiting for GuC response) at any time. The bits in KMD_QUEUE_UPDATE_MASK_DW* fields indicate which queue entry is being updated in the CGP.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubh)}(hThe primary queue (Q0) represents the multi queue group context in GuC and submission on any queue of the group must be through Q0 GuC interface only.h]hThe primary queue (Q0) represents the multi queue group context in GuC and submission on any queue of the group must be through Q0 GuC interface only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubh)}(hAs it is not required to register secondary queues with GuC, the secondary queue context ids in the CGP are populated with Q0 context id.h]hAs it is not required to register secondary queues with GuC, the secondary queue context ids in the CGP are populated with Q0 context id.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubeh}(h](jid1eh ]h"](multi queue group guc interfacemulti-queue-group-guc-interfaceeh$]h&]uh1hhhhhhhhKexpect_referenced_by_name}jjsexpect_referenced_by_id}jjsubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single xe_multi_queue_priority (C enum)c.xe_multi_queue_priorityhNtauh1jhjhhhNhNubhdesc)}(hhh](hdesc_signature)}(hxe_multi_queue_priorityh]hdesc_signature_line)}(henum xe_multi_queue_priorityh](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKubhdesc_sig_space)}(h h]h }(hj,hhhNhNubah}(h]h ]wah"]h$]h&]uh1j*hjhhhj)hKubh desc_name)}(hxe_multi_queue_priorityh]h desc_sig_name)}(hjh]hxe_multi_queue_priority}(hjChhhNhNubah}(h]h ]nah"]h$]h&]uh1jAhj=ubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1j;hjhhhj)hKubeh}(h]h ]h"]h$]h&]hhƌ add_permalinkuh1jsphinx_line_type declaratorhjhhhj)hKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j hj)hKhj hhubh desc_content)}(hhh]h)}(hMulti Queue priority valuesh]hMulti Queue priority values}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK$hjohhubah}(h]h ]h"]h$]h&]uh1jmhj hhhj)hKubeh}(h]h ](cenumeh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhjhNhNubh container)}(h**Constants** ``XE_MULTI_QUEUE_PRIORITY_LOW`` Priority low ``XE_MULTI_QUEUE_PRIORITY_NORMAL`` Priority normal ``XE_MULTI_QUEUE_PRIORITY_HIGH`` Priority highh](h)}(h **Constants**h]hstrong)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK(hjubhdefinition_list)}(hhh](hdefinition_list_item)}(h-``XE_MULTI_QUEUE_PRIORITY_LOW`` Priority low h](hterm)}(h``XE_MULTI_QUEUE_PRIORITY_LOW``h]hliteral)}(hjh]hXE_MULTI_QUEUE_PRIORITY_LOW}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK+hjubh definition)}(hhh]h)}(h Priority lowh]h Priority low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK+hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK+hjubj)}(h3``XE_MULTI_QUEUE_PRIORITY_NORMAL`` Priority normal h](j)}(h"``XE_MULTI_QUEUE_PRIORITY_NORMAL``h]j)}(hjh]hXE_MULTI_QUEUE_PRIORITY_NORMAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK.hjubj)}(hhh]h)}(hPriority normalh]hPriority normal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK.hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK.hjubj)}(h.``XE_MULTI_QUEUE_PRIORITY_HIGH`` Priority highh](j)}(h ``XE_MULTI_QUEUE_PRIORITY_HIGH``h]j)}(hj:h]hXE_MULTI_QUEUE_PRIORITY_HIGH}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK0hj4ubj)}(hhh]h)}(h Priority highh]h Priority high}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK1hjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhjOhK0hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hj}h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK3hjhhubh)}(h?The priority values of the queues within the multi queue group.h]h?The priority values of the queues within the multi queue group.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK%hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_group (C struct)c.xe_exec_queue_grouphNtauh1jhjhhhNhNubj)}(hhh](j )}(hxe_exec_queue_grouph]j)}(hstruct xe_exec_queue_grouph](j)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK*ubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjhhhjhK*ubj<)}(hxe_exec_queue_grouph]jB)}(hjh]hxe_exec_queue_group}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjhhhjhK*ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjhhhjhK*ubah}(h]jah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhK*hjhhubjn)}(hhh]h)}(hExecution multi queue grouph]hExecution multi queue group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK2hjhhubah}(h]h ]h"]h$]h&]uh1jmhjhhhjhK*ubeh}(h]h ](jstructeh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(hXN**Definition**:: struct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; spinlock_t suspend_lock; bool sync_pending; bool banned; bool stopped; }; **Members** ``primary`` Primary queue of this group ``cgp_bo`` BO for the Context Group Page ``xa`` xarray to store LRCs ``list`` List of all secondary queues in the group ``list_lock`` Secondary queue list lock ``suspend_lock`` Makes a secondary's suspend/resume and its forwarding to the primary atomic. Nested outside of the queue's message lock (**xe_guc_exec_queue.sched.msg_lock**). ``sync_pending`` CGP_SYNC_DONE g2h response pending ``banned`` Group banned ``stopped`` Group is stopped, protected by list_lockh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK6hj ubh literal_block)}(hXstruct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; spinlock_t suspend_lock; bool sync_pending; bool banned; bool stopped; };h]hXstruct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; spinlock_t suspend_lock; bool sync_pending; bool banned; bool stopped; };}hj= sbah}(h]h ]h"]h$]h&]hhuh1j; hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hj ubh)}(h **Members**h]j)}(hjN h]hMembers}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjL ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKDhj ubj)}(hhh](j)}(h(``primary`` Primary queue of this group h](j)}(h ``primary``h]j)}(hjm h]hprimary}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjk ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hjg ubj)}(hhh]h)}(hPrimary queue of this grouph]hPrimary queue of this group}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK8hj ubah}(h]h ]h"]h$]h&]uh1jhjg ubeh}(h]h ]h"]h$]h&]uh1jhj hK8hjd ubj)}(h)``cgp_bo`` BO for the Context Group Page h](j)}(h ``cgp_bo``h]j)}(hj h]hcgp_bo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK:hj ubj)}(hhh]h)}(hBO for the Context Group Pageh]hBO for the Context Group Page}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK:hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK:hjd ubj)}(h``xa`` xarray to store LRCs h](j)}(h``xa``h]j)}(hj h]hxa}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj)}(hhh]h)}(h)List of all secondary queues in the grouph]h)List of all secondary queues in the group}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj- hK>hj. ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj- hK>hjd ubj)}(h(``list_lock`` Secondary queue list lock h](j)}(h ``list_lock``h]j)}(hjQ h]h list_lock}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjO ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK@hjK ubj)}(hhh]h)}(hSecondary queue list lockh]hSecondary queue list lock}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf hK@hjg ubah}(h]h ]h"]h$]h&]uh1jhjK ubeh}(h]h ]h"]h$]h&]uh1jhjf hK@hjd ubj)}(h``suspend_lock`` Makes a secondary's suspend/resume and its forwarding to the primary atomic. Nested outside of the queue's message lock (**xe_guc_exec_queue.sched.msg_lock**). h](j)}(h``suspend_lock``h]j)}(hj h]h suspend_lock}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKEhj ubj)}(hhh]h)}(hMakes a secondary's suspend/resume and its forwarding to the primary atomic. Nested outside of the queue's message lock (**xe_guc_exec_queue.sched.msg_lock**).h](h}Makes a secondary’s suspend/resume and its forwarding to the primary atomic. Nested outside of the queue’s message lock (}(hj hhhNhNubj)}(h$**xe_guc_exec_queue.sched.msg_lock**h]h xe_guc_exec_queue.sched.msg_lock}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh).}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKChj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKEhjd ubj)}(h4``sync_pending`` CGP_SYNC_DONE g2h response pending h](j)}(h``sync_pending``h]j)}(hj h]h sync_pending}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKHhj ubj)}(hhh]h)}(h"CGP_SYNC_DONE g2h response pendingh]h"CGP_SYNC_DONE g2h response pending}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKHhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKHhjd ubj)}(h``banned`` Group banned h](j)}(h ``banned``h]j)}(hj h]hbanned}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKJhj ubj)}(hhh]h)}(h Group bannedh]h Group banned}(hj( hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$ hKJhj% ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj$ hKJhjd ubj)}(h4``stopped`` Group is stopped, protected by list_lockh](j)}(h ``stopped``h]j)}(hjH h]hstopped}(hjJ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjF ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKKhjB ubj)}(hhh]h)}(h(Group is stopped, protected by list_lockh]h(Group is stopped, protected by list_lock}(hja hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKLhj^ ubah}(h]h ]h"]h$]h&]uh1jhjB ubeh}(h]h ]h"]h$]h&]uh1jhj] hKKhjd ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKOhjhhubh)}(h'Contains multi queue group information.h]h'Contains multi queue group information.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK3hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue (C struct)c.xe_exec_queuehNtauh1jhjhhhNhNubj)}(hhh](j )}(h xe_exec_queueh]j)}(hstruct xe_exec_queueh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8ubj+)}(h h]h }(hj hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj hhhj hK8ubj<)}(h xe_exec_queueh]jB)}(hj h]h xe_exec_queue}(hj hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj hhhj hK8ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj hhhj hK8ubah}(h]j ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj hK8hj hhubjn)}(hhh]h)}(hExecution queueh]hExecution queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKPhj hhubah}(h]h ]h"]h$]h&]uh1jmhj hhhj hK8ubeh}(h]h ](jstructeh"]h$]h&]jjjj# jj# jjjuh1jhhhjhNhNubj)}(hXu**Definition**:: struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); #define EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX BIT(7); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; spinlock_t lock; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; bool suspended; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct list_head vm_exec_queue_link; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; spinlock_t lrc_lookup_lock; struct xe_lrc *lrc[]; }; **Members** ``xef`` Back pointer to xe file if this is user created exec queue ``gt`` GT structure this exec queue can submit to ``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. ``refcount`` ref count of this exec queue ``vm`` VM (address space) for this exec queue ``user_vm`` User VM (address space) for this exec queue (bind queues only) ``class`` class of this exec queue ``logical_mask`` logical mask of where job submitted to exec queue can run ``name`` name of this exec queue ``width`` width (number BB submitted per exec) of this exec queue ``msix_vec`` MSI-X vector (for platforms that support it) ``fence_irq`` fence IRQ used to signal job completion ``last_fence`` last fence on exec queue, protected by vm->lock in write mode if bind exec queue, protected by dma resv lock if non-bind exec queue ``flags`` flags for this exec queue, should statically setup aside from ban bit ``{unnamed_union}`` anonymous ``multi_gt_list`` list head for VM bind engines if multi-GT ``multi_gt_link`` link for VM bind engines if multi-GT ``{unnamed_union}`` anonymous ``execlist`` execlist backend specific state for exec queue ``guc`` GuC backend specific state for exec queue ``multi_queue`` Multi queue information ``multi_queue.group`` Queue group information ``multi_queue.link`` Link into group's secondary queues list ``multi_queue.priority`` Queue priority within the multi-queue group. It is protected by **multi_queue.lock**. ``multi_queue.lock`` Lock for protecting certain members ``multi_queue.pos`` Position of queue within the multi-queue group ``multi_queue.valid`` Queue belongs to a multi queue group ``multi_queue.is_primary`` Is primary queue (Q0) of the group ``sched_props`` scheduling properties ``sched_props.timeslice_us`` timeslice period in micro-seconds ``sched_props.preempt_timeout_us`` preemption timeout in micro-seconds ``sched_props.job_timeout_ms`` job timeout in milliseconds ``sched_props.priority`` priority of this exec queue ``lr`` long-running exec queue state ``lr.pfence`` preemption fence ``lr.context`` preemption fence context ``lr.seqno`` preemption fence seqno ``lr.link`` link into VM's list of exec queues ``lr.suspended`` Tracks whether the consumer-issued suspend() succeeded and a matching resume() is still owed. suspend() can fail (e.g. killed/banned/wedged), leaving the queue un-suspended, so consumers must only resume() queues that were actually suspended. Set by the suspend caller on success and cleared by the resume caller. A queue is only ever suspended by a single consumer at a time (preempt-fence mode and hw engine group fault mode are mutually exclusive), so a single flag is sufficient. ``tlb_inval`` TLB invalidations exec queue state ``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler ``tlb_inval.last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode ``vm_exec_queue_link`` Link to track exec queue within a VM's list of exec queues. ``pxp`` PXP info tracking ``pxp.type`` PXP session type used by this queue ``pxp.link`` link into the list of PXP exec queues ``ufence_syncobj`` User fence syncobj ``ufence_timeline_value`` User fence timeline value ``replay_state`` GPU hang replay state ``ops`` submission backend exec queue operations ``ring_ops`` ring operations for this exec queue ``entity`` DRM sched entity for this exec queue (1 to 1 relationship) ``job_cnt`` number of drm jobs in this exec queue ``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. ``hw_engine_group_link`` link into exec queues in the same hw engine group ``lrc_lookup_lock`` Lock for protecting lrc array access. Only used when running in parallel to queue creation is possible. ``lrc`` logical ring context for this exec queueh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj/ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ ubh:}(hj+ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKThj' ubj< )}(hX struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); #define EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX BIT(7); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; spinlock_t lock; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; bool suspended; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct list_head vm_exec_queue_link; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; spinlock_t lrc_lookup_lock; struct xe_lrc *lrc[]; };h]hX struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); #define EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX BIT(7); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; spinlock_t lock; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; bool suspended; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct list_head vm_exec_queue_link; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; spinlock_t lrc_lookup_lock; struct xe_lrc *lrc[]; };}hjH sbah}(h]h ]h"]h$]h&]hhuh1j; hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKVhj' ubh)}(h **Members**h]j)}(hjY h]hMembers}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjW ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj' ubj)}(hhh](j)}(hC``xef`` Back pointer to xe file if this is user created exec queue h](j)}(h``xef``h]j)}(hjx h]hxef}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjv ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKWhjr ubj)}(hhh]h)}(h:Back pointer to xe file if this is user created exec queueh]h:Back pointer to xe file if this is user created exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKWhj ubah}(h]h ]h"]h$]h&]uh1jhjr ubeh}(h]h ]h"]h$]h&]uh1jhj hKWhjo ubj)}(h2``gt`` GT structure this exec queue can submit to h](j)}(h``gt``h]j)}(hj h]hgt}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKZhj ubj)}(hhh]h)}(h*GT structure this exec queue can submit toh]h*GT structure this exec queue can submit to}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKZhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKZhjo ubj)}(h``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. h](j)}(h``hwe``h]j)}(hj h]hhwe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK_hj ubj)}(hhh]h)}(hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.h]hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK]hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK_hjo ubj)}(h*``refcount`` ref count of this exec queue h](j)}(h ``refcount``h]j)}(hj$ h]hrefcount}(hj& hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj" ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKbhj ubj)}(hhh]h)}(href count of this exec queueh]href count of this exec queue}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9 hKbhj: ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj9 hKbhjo ubj)}(h.``vm`` VM (address space) for this exec queue h](j)}(h``vm``h]j)}(hj] h]hvm}(hj_ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKdhjW ubj)}(hhh]h)}(h&VM (address space) for this exec queueh]h&VM (address space) for this exec queue}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr hKdhjs ubah}(h]h ]h"]h$]h&]uh1jhjW ubeh}(h]h ]h"]h$]h&]uh1jhjr hKdhjo ubj)}(hK``user_vm`` User VM (address space) for this exec queue (bind queues only) h](j)}(h ``user_vm``h]j)}(hj h]huser_vm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhhj ubj)}(hhh]h)}(h>User VM (address space) for this exec queue (bind queues only)h]h>User VM (address space) for this exec queue (bind queues only)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKghj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhhjo ubj)}(h#``class`` class of this exec queue h](j)}(h ``class``h]j)}(hj h]hclass}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKlhj ubj)}(hhh]h)}(hclass of this exec queueh]hclass of this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKlhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKlhjo ubj)}(hK``logical_mask`` logical mask of where job submitted to exec queue can run h](j)}(h``logical_mask``h]j)}(hj h]h logical_mask}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKohjubj)}(hhh]h)}(h9logical mask of where job submitted to exec queue can runh]h9logical mask of where job submitted to exec queue can run}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKohjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKohjo ubj)}(h!``name`` name of this exec queue h](j)}(h``name``h]j)}(hjBh]hname}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKrhj<ubj)}(hhh]h)}(hname of this exec queueh]hname of this exec queue}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhKrhjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jhjWhKrhjo ubj)}(hB``width`` width (number BB submitted per exec) of this exec queue h](j)}(h ``width``h]j)}(hj{h]hwidth}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKthjuubj)}(hhh]h)}(h7width (number BB submitted per exec) of this exec queueh]h7width (number BB submitted per exec) of this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKthjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jhjhKthjo ubj)}(h:``msix_vec`` MSI-X vector (for platforms that support it) h](j)}(h ``msix_vec``h]j)}(hjh]hmsix_vec}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKvhjubj)}(hhh]h)}(h,MSI-X vector (for platforms that support it)h]h,MSI-X vector (for platforms that support it)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKvhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKvhjo ubj)}(h6``fence_irq`` fence IRQ used to signal job completion h](j)}(h ``fence_irq``h]j)}(hjh]h fence_irq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKxhjubj)}(hhh]h)}(h'fence IRQ used to signal job completionh]h'fence IRQ used to signal job completion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKxhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKxhjo ubj)}(h``last_fence`` last fence on exec queue, protected by vm->lock in write mode if bind exec queue, protected by dma resv lock if non-bind exec queue Bh](j)}(h``last_fence``h]j)}(hj&h]h last_fence}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK~hj ubj)}(hhh]h)}(hlast fence on exec queue, protected by vm->lock in write mode if bind exec queue, protected by dma resv lock if non-bind exec queueh]hlast fence on exec queue, protected by vm->lock in write mode if bind exec queue, protected by dma resv lock if non-bind exec queue}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK|hj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj;hK~hjo ubj)}(hP``flags`` flags for this exec queue, should statically setup aside from ban bit h](j)}(h ``flags``h]j)}(hj`h]hflags}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjZubj)}(hhh]h)}(hEflags for this exec queue, should statically setup aside from ban bith]hEflags for this exec queue, should statically setup aside from ban bit}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jhjuhKhjo ubj)}(h``{unnamed_union}`` anonymous h](j)}(h``{unnamed_union}``h]j)}(hjh]h{unnamed_union}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h anonymoush]h anonymous}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h<``multi_gt_list`` list head for VM bind engines if multi-GT h](j)}(h``multi_gt_list``h]j)}(hjh]h multi_gt_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h)list head for VM bind engines if multi-GTh]h)list head for VM bind engines if multi-GT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h7``multi_gt_link`` link for VM bind engines if multi-GT h](j)}(h``multi_gt_link``h]j)}(hj h]h multi_gt_link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h$link for VM bind engines if multi-GTh]h$link for VM bind engines if multi-GT}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj!hKhjo ubj)}(h``{unnamed_union}`` anonymous h](j)}(h``{unnamed_union}``h]j)}(hjEh]h{unnamed_union}}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj?ubj)}(hhh]h)}(h anonymoush]h anonymous}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhKhj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jhjZhKhjo ubj)}(h<``execlist`` execlist backend specific state for exec queue h](j)}(h ``execlist``h]j)}(hj~h]hexeclist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjxubj)}(hhh]h)}(h.execlist backend specific state for exec queueh]h.execlist backend specific state for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h2``guc`` GuC backend specific state for exec queue h](j)}(h``guc``h]j)}(hjh]hguc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h)GuC backend specific state for exec queueh]h)GuC backend specific state for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h(``multi_queue`` Multi queue information h](j)}(h``multi_queue``h]j)}(hjh]h multi_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hMulti queue informationh]hMulti queue information}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h.``multi_queue.group`` Queue group information h](j)}(h``multi_queue.group``h]j)}(hj)h]hmulti_queue.group}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj#ubj)}(hhh]h)}(hQueue group informationh]hQueue group information}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jhj>hKhjo ubj)}(h=``multi_queue.link`` Link into group's secondary queues list h](j)}(h``multi_queue.link``h]j)}(hjbh]hmulti_queue.link}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj\ubj)}(hhh]h)}(h'Link into group's secondary queues listh]h)Link into group’s secondary queues list}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhKhjxubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jhjwhKhjo ubj)}(ho``multi_queue.priority`` Queue priority within the multi-queue group. It is protected by **multi_queue.lock**. h](j)}(h``multi_queue.priority``h]j)}(hjh]hmulti_queue.priority}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hUQueue priority within the multi-queue group. It is protected by **multi_queue.lock**.h](h@Queue priority within the multi-queue group. It is protected by }(hjhhhNhNubj)}(h**multi_queue.lock**h]hmulti_queue.lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h9``multi_queue.lock`` Lock for protecting certain members h](j)}(h``multi_queue.lock``h]j)}(hjh]hmulti_queue.lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#Lock for protecting certain membersh]h#Lock for protecting certain members}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(hC``multi_queue.pos`` Position of queue within the multi-queue group h](j)}(h``multi_queue.pos``h]j)}(hj h]hmulti_queue.pos}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h.Position of queue within the multi-queue grouph]h.Position of queue within the multi-queue group}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hKhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj5hKhjo ubj)}(h;``multi_queue.valid`` Queue belongs to a multi queue group h](j)}(h``multi_queue.valid``h]j)}(hjYh]hmulti_queue.valid}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjSubj)}(hhh]h)}(h$Queue belongs to a multi queue grouph]h$Queue belongs to a multi queue group}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhKhjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jhjnhKhjo ubj)}(h>``multi_queue.is_primary`` Is primary queue (Q0) of the group h](j)}(h``multi_queue.is_primary``h]j)}(hjh]hmulti_queue.is_primary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h"Is primary queue (Q0) of the grouph]h"Is primary queue (Q0) of the group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h&``sched_props`` scheduling properties h](j)}(h``sched_props``h]j)}(hjh]h sched_props}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hscheduling propertiesh]hscheduling properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h?``sched_props.timeslice_us`` timeslice period in micro-seconds h](j)}(h``sched_props.timeslice_us``h]j)}(hjh]hsched_props.timeslice_us}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h!timeslice period in micro-secondsh]h!timeslice period in micro-seconds}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(hG``sched_props.preempt_timeout_us`` preemption timeout in micro-seconds h](j)}(h"``sched_props.preempt_timeout_us``h]j)}(hj=h]hsched_props.preempt_timeout_us}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj7ubj)}(hhh]h)}(h#preemption timeout in micro-secondsh]h#preemption timeout in micro-seconds}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhKhjSubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jhjRhKhjo ubj)}(h;``sched_props.job_timeout_ms`` job timeout in milliseconds h](j)}(h``sched_props.job_timeout_ms``h]j)}(hjvh]hsched_props.job_timeout_ms}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjtubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjpubj)}(hhh]h)}(hjob timeout in millisecondsh]hjob timeout in milliseconds}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h5``sched_props.priority`` priority of this exec queue h](j)}(h``sched_props.priority``h]j)}(hjh]hsched_props.priority}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpriority of this exec queueh]hpriority of this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h%``lr`` long-running exec queue state h](j)}(h``lr``h]j)}(hjh]hlr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hlong-running exec queue stateh]hlong-running exec queue state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h``lr.pfence`` preemption fence h](j)}(h ``lr.pfence``h]j)}(hj!h]h lr.pfence}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpreemption fenceh]hpreemption fence}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hKhj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj6hKhjo ubj)}(h(``lr.context`` preemption fence context h](j)}(h``lr.context``h]j)}(hjZh]h lr.context}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjTubj)}(hhh]h)}(hpreemption fence contexth]hpreemption fence context}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohKhjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jhjohKhjo ubj)}(h$``lr.seqno`` preemption fence seqno h](j)}(h ``lr.seqno``h]j)}(hjh]hlr.seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpreemption fence seqnoh]hpreemption fence seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h/``lr.link`` link into VM's list of exec queues h](j)}(h ``lr.link``h]j)}(hjh]hlr.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h"link into VM's list of exec queuesh]h$link into VM’s list of exec queues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(hX``lr.suspended`` Tracks whether the consumer-issued suspend() succeeded and a matching resume() is still owed. suspend() can fail (e.g. killed/banned/wedged), leaving the queue un-suspended, so consumers must only resume() queues that were actually suspended. Set by the suspend caller on success and cleared by the resume caller. A queue is only ever suspended by a single consumer at a time (preempt-fence mode and hw engine group fault mode are mutually exclusive), so a single flag is sufficient. h](j)}(h``lr.suspended``h]j)}(hjh]h lr.suspended}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hXTracks whether the consumer-issued suspend() succeeded and a matching resume() is still owed. suspend() can fail (e.g. killed/banned/wedged), leaving the queue un-suspended, so consumers must only resume() queues that were actually suspended. Set by the suspend caller on success and cleared by the resume caller. A queue is only ever suspended by a single consumer at a time (preempt-fence mode and hw engine group fault mode are mutually exclusive), so a single flag is sufficient.h]hXTracks whether the consumer-issued suspend() succeeded and a matching resume() is still owed. suspend() can fail (e.g. killed/banned/wedged), leaving the queue un-suspended, so consumers must only resume() queues that were actually suspended. Set by the suspend caller on success and cleared by the resume caller. A queue is only ever suspended by a single consumer at a time (preempt-fence mode and hw engine group fault mode are mutually exclusive), so a single flag is sufficient.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h1``tlb_inval`` TLB invalidations exec queue state h](j)}(h ``tlb_inval``h]j)}(hj?h]h tlb_inval}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj9ubj)}(hhh]h)}(h"TLB invalidations exec queue stateh]h"TLB invalidations exec queue state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKhjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhjThKhjo ubj)}(hF``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler h](j)}(h``tlb_inval.dep_scheduler``h]j)}(hjxh]htlb_inval.dep_scheduler}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjrubj)}(hhh]h)}(h)The TLB invalidation dependency schedulerh]h)The TLB invalidation dependency scheduler}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h^``tlb_inval.last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode h](j)}(h``tlb_inval.last_fence``h]j)}(hjh]htlb_inval.last_fence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hDlast fence for tlb invalidation, protected by vm->lock in write modeh]hDlast fence for tlb invalidation, protected by vm->lock in write mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(hS``vm_exec_queue_link`` Link to track exec queue within a VM's list of exec queues. h](j)}(h``vm_exec_queue_link``h]j)}(hjh]hvm_exec_queue_link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h;Link to track exec queue within a VM's list of exec queues.h]h=Link to track exec queue within a VM’s list of exec queues.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h``pxp`` PXP info tracking h](j)}(h``pxp``h]j)}(hj%h]hpxp}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hPXP info trackingh]hPXP info tracking}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hKhj;ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj:hKhjo ubj)}(h1``pxp.type`` PXP session type used by this queue h](j)}(h ``pxp.type``h]j)}(hj^h]hpxp.type}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjXubj)}(hhh]h)}(h#PXP session type used by this queueh]h#PXP session type used by this queue}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshKhjtubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jhjshKhjo ubj)}(h3``pxp.link`` link into the list of PXP exec queues h](j)}(h ``pxp.link``h]j)}(hjh]hpxp.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h%link into the list of PXP exec queuesh]h%link into the list of PXP exec queues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h&``ufence_syncobj`` User fence syncobj h](j)}(h``ufence_syncobj``h]j)}(hjh]hufence_syncobj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hUser fence syncobjh]hUser fence syncobj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjo ubj)}(h4``ufence_timeline_value`` User fence timeline value h](j)}(h``ufence_timeline_value``h]j)}(hj h]hufence_timeline_value}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(hUser fence timeline valueh]hUser fence timeline value}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjo ubj)}(h'``replay_state`` GPU hang replay state h](j)}(h``replay_state``h]j)}(hjBh]h replay_state}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhj<ubj)}(hhh]h)}(hGPU hang replay stateh]hGPU hang replay state}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMhjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jhjWhMhjo ubj)}(h1``ops`` submission backend exec queue operations h](j)}(h``ops``h]j)}(hj{h]hops}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjuubj)}(hhh]h)}(h(submission backend exec queue operationsh]h(submission backend exec queue operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jhjhMhjo ubj)}(h1``ring_ops`` ring operations for this exec queue h](j)}(h ``ring_ops``h]j)}(hjh]hring_ops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hjubj)}(hhh]h)}(h#ring operations for this exec queueh]h#ring operations for this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjo ubj)}(hF``entity`` DRM sched entity for this exec queue (1 to 1 relationship) h](j)}(h ``entity``h]j)}(hjh]hentity}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hjubj)}(hhh]h)}(h:DRM sched entity for this exec queue (1 to 1 relationship)h]h:DRM sched entity for this exec queue (1 to 1 relationship)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjo ubj)}(h2``job_cnt`` number of drm jobs in this exec queue h](j)}(h ``job_cnt``h]j)}(hj&h]hjob_cnt}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhj ubj)}(hhh]h)}(h%number of drm jobs in this exec queueh]h%number of drm jobs in this exec queue}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj;hMhjo ubj)}(h{``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. h](j)}(h``tlb_flush_seqno``h]j)}(hj_h]htlb_flush_seqno}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjYubj)}(hhh]h)}(hfThe seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL.h](h>The seqno of the last rebind tlb flush performed Protected by }(hjxhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjxubh’s resv. Unused if }(hjxhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjxubh == NULL.}(hjxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjuubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jhjthMhjo ubj)}(hK``hw_engine_group_link`` link into exec queues in the same hw engine group h](j)}(h``hw_engine_group_link``h]j)}(hjh]hhw_engine_group_link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h1link into exec queues in the same hw engine grouph]h1link into exec queues in the same hw engine group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjo ubj)}(h|``lrc_lookup_lock`` Lock for protecting lrc array access. Only used when running in parallel to queue creation is possible. h](j)}(h``lrc_lookup_lock``h]j)}(hjh]hlrc_lookup_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(hgLock for protecting lrc array access. Only used when running in parallel to queue creation is possible.h]hgLock for protecting lrc array access. Only used when running in parallel to queue creation is possible.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hMhjo ubj)}(h0``lrc`` logical ring context for this exec queueh](j)}(h``lrc``h]j)}(hj0h]hlrc}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhj*ubj)}(hhh]h)}(h(logical ring context for this exec queueh]h(logical ring context for this exec queue}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjFubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhjEhMhjo ubeh}(h]h ]h"]h$]h&]uh1jhj' ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hjsh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM!hjhhubh)}(h]Contains all state necessary for submissions. Can either be a user object or a kernel object.h]h]Contains all state necessary for submissions. Can either be a user object or a kernel object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKQhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_ops (C struct)c.xe_exec_queue_opshNtauh1jhjhhhNhNubj)}(hhh](j )}(hxe_exec_queue_opsh]j)}(hstruct xe_exec_queue_opsh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKWubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjhhhjhKWubj<)}(hxe_exec_queue_opsh]jB)}(hjh]hxe_exec_queue_ops}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjhhhjhKWubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjhhhjhKWubah}(h]jah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhKWhjhhubjn)}(hhh]h)}(h(Submission backend exec queue operationsh]h(Submission backend exec queue operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM"hjhhubah}(h]h ]h"]h$]h&]uh1jmhjhhhjhKWubeh}(h]h ](jstructeh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(hX **Definition**:: struct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); int (*suspend_wait_blocking)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); }; **Members** ``init`` Initialize exec queue for submission backend ``kill`` Kill inflight submissions for backend ``fini`` Undoes the init() for submission backend ``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. ``set_priority`` Set priority for exec queue ``set_timeslice`` Set timeslice for exec queue ``set_preempt_timeout`` Set preemption timeout for exec queue ``set_multi_queue_priority`` Set multi queue priority ``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. ``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism. ``suspend_wait_blocking`` Like **suspend_wait**, but waits uninterruptibly (does not abort on the calling task's signals). For cleanup/undo paths that must complete a suspend on behalf of a queue that may belong to a different process than the caller: a signal to the caller must not abandon the wait, which would leave the other process's queue suspended forever (cross-process DoS). A timeout bans like suspend_wait. ``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. ``reset_status`` check exec queue reset statush](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM&hjubj< )}(hXstruct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); int (*suspend_wait_blocking)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); };h]hXstruct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); int (*suspend_wait_blocking)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); };}hj0sbah}(h]h ]h"]h$]h&]hhuh1j; hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM(hjubh)}(h **Members**h]j)}(hjAh]hMembers}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM8hjubj)}(hhh](j)}(h6``init`` Initialize exec queue for submission backend h](j)}(h``init``h]j)}(hj`h]hinit}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM&hjZubj)}(hhh]h)}(h,Initialize exec queue for submission backendh]h,Initialize exec queue for submission backend}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhM&hjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jhjuhM&hjWubj)}(h/``kill`` Kill inflight submissions for backend h](j)}(h``kill``h]j)}(hjh]hkill}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM(hjubj)}(hhh]h)}(h%Kill inflight submissions for backendh]h%Kill inflight submissions for backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM(hjWubj)}(h2``fini`` Undoes the init() for submission backend h](j)}(h``fini``h]j)}(hjh]hfini}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM*hjubj)}(hhh]h)}(h(Undoes the init() for submission backendh]h(Undoes the init() for submission backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM*hjWubj)}(h``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. h](j)}(h ``destroy``h]j)}(hj h]hdestroy}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM/hjubj)}(hhh]h)}(hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.h]hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM-hj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hM/hjWubj)}(h-``set_priority`` Set priority for exec queue h](j)}(h``set_priority``h]j)}(hjEh]h set_priority}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM2hj?ubj)}(hhh]h)}(hSet priority for exec queueh]hSet priority for exec queue}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM2hj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jhjZhM2hjWubj)}(h/``set_timeslice`` Set timeslice for exec queue h](j)}(h``set_timeslice``h]j)}(hj~h]h set_timeslice}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM5hjxubj)}(hhh]h)}(hSet timeslice for exec queueh]hSet timeslice for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5hjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jhjhM5hjWubj)}(h>``set_preempt_timeout`` Set preemption timeout for exec queue h](j)}(h``set_preempt_timeout``h]j)}(hjh]hset_preempt_timeout}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM7hjubj)}(hhh]h)}(h%Set preemption timeout for exec queueh]h%Set preemption timeout for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM7hjWubj)}(h6``set_multi_queue_priority`` Set multi queue priority h](j)}(h``set_multi_queue_priority``h]j)}(hjh]hset_multi_queue_priority}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM9hjubj)}(hhh]h)}(hSet multi queue priorityh]hSet multi queue priority}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM9hjWubj)}(h``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. h](j)}(h ``suspend``h]j)}(hj)h]hsuspend}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM?hj#ubj)}(hhh]h)}(hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.h]hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM=hj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jhj>hM?hjWubj)}(hX``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. 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A timeout bans like suspend_wait. h](j)}(h``suspend_wait_blocking``h]j)}(hjh]hsuspend_wait_blocking}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMRhjubj)}(hhh]h)}(hXLike **suspend_wait**, but waits uninterruptibly (does not abort on the calling task's signals). For cleanup/undo paths that must complete a suspend on behalf of a queue that may belong to a different process than the caller: a signal to the caller must not abandon the wait, which would leave the other process's queue suspended forever (cross-process DoS). A timeout bans like suspend_wait.h](hLike }(hjhhhNhNubj)}(h**suspend_wait**h]h suspend_wait}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhXw, but waits uninterruptibly (does not abort on the calling task’s signals). For cleanup/undo paths that must complete a suspend on behalf of a queue that may belong to a different process than the caller: a signal to the caller must not abandon the wait, which would leave the other process’s queue suspended forever (cross-process DoS). A timeout bans like suspend_wait.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMRhjWubj)}(h``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. h](j)}(h ``resume``h]j)}(hjh]hresume}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMXhjubj)}(hhh]h)}(hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.h]hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMVhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMXhjWubj)}(h.``reset_status`` check exec queue reset statush](j)}(h``reset_status``h]j)}(hj#h]h reset_status}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMZhjubj)}(hhh]h)}(hcheck exec queue reset statush]hcheck exec queue reset status}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM[hj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj8hMZhjWubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_is_multi_queue (C function)c.xe_exec_queue_is_multi_queuehNtauh1jhjhhhNhNubj)}(hhh](j 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ASTIdentifier)}jjsbc.xe_exec_queue_is_multi_queueasbuh1hhjubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjubhdesc_sig_punctuation)}(h*h]h*}(hjhhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjubjB)}(hqh]hq}(hj&hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjyhhhjhKGubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjuhhhjhKGubah}(h]jpah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhKGhjrhhubjn)}(hhh]h)}(h/Whether an exec_queue is part of a queue group.h]h/Whether an exec_queue is part of a queue group.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKGhjMhhubah}(h]h ]h"]h$]h&]uh1jmhjrhhhjhKGubeh}(h]h ](jfunctioneh"]h$]h&]jjjjhjjhjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if the exec_queue is part of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hjrh]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKKhjlubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjh]hstruct xe_exec_queue *q}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKHhjubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKHhjubah}(h]h ]h"]h$]h&]uh1jhjlubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKJhjlubh)}(hATrue if the exec_queue is part of a queue group, false otherwise.h]hATrue if the exec_queue is part of a queue group, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKJhjlubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j1xe_exec_queue_is_multi_queue_primary (C function)&c.xe_exec_queue_is_multi_queue_primaryhNtauh1jhjhhhNhNubj)}(hhh](j )}(hCbool xe_exec_queue_is_multi_queue_primary (struct xe_exec_queue *q)h]j)}(hBbool xe_exec_queue_is_multi_queue_primary(struct xe_exec_queue *q)h](j~)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKRubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj hhhjhKRubj<)}(h$xe_exec_queue_is_multi_queue_primaryh]jB)}(h$xe_exec_queue_is_multi_queue_primaryh]h$xe_exec_queue_is_multi_queue_primary}(hj1hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj-ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj hhhjhKRubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjMhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjIubj+)}(h h]h }(hjZhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjIubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjkhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjhubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmmodnameN classnameNjj)}j]j)}jj3sb&c.xe_exec_queue_is_multi_queue_primaryasbuh1hhjIubj+)}(h h]h }(hjhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjIubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIubjB)}(hj(h]hq}(hjhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjIubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjEubah}(h]h ]h"]h$]h&]hhuh1jhj hhhjhKRubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj hhhjhKRubah}(h]jah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjhKRhjhhubjn)}(hhh]h)}(h>Whether an exec_queue is primary queue of a multi queue group.h]h>Whether an exec_queue is primary queue of a multi queue group.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKRhjhhubah}(h]h ]h"]h$]h&]uh1jmhjhhhjhKRubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if **q** is primary queue of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj h]hstruct xe_exec_queue *q}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKThj ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj% hKThj& ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj% hKThj ubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjK h]hReturn}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjI ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubh)}(hATrue if **q** is primary queue of a queue group, false otherwise.h](hTrue if }(hja hhhNhNubj)}(h**q**h]hq}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1jhja ubh4 is primary queue of a queue group, false otherwise.}(hja hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_is_multi_queue_secondary (C function)(c.xe_exec_queue_is_multi_queue_secondaryhNtauh1jhjhhhNhNubj)}(hhh](j )}(hEbool xe_exec_queue_is_multi_queue_secondary (struct xe_exec_queue *q)h]j)}(hDbool xe_exec_queue_is_multi_queue_secondary(struct xe_exec_queue *q)h](j~)}(hjh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK^ubj+)}(h h]h }(hj hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj hhhj hK^ubj<)}(h&xe_exec_queue_is_multi_queue_secondaryh]jB)}(h&xe_exec_queue_is_multi_queue_secondaryh]h&xe_exec_queue_is_multi_queue_secondary}(hj hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj hhhj hK^ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj ubj+)}(h h]h }(hj hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj sb(c.xe_exec_queue_is_multi_queue_secondaryasbuh1hhj ubj+)}(h h]h }(hj!hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj ubj)}(hjh]h*}(hj*!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubjB)}(hj(h]hq}(hj7!hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj hK^ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj hhhj hK^ubah}(h]j ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj hK^hj hhubjn)}(hhh]h)}(h@Whether an exec_queue is secondary queue of a multi queue group.h]h@Whether an exec_queue is secondary queue of a multi queue group.}(hj`!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK^hj]!hhubah}(h]h ]h"]h$]h&]uh1jmhj hhhj hK^ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjx!jjx!jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if **q** is secondary queue of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hj!h]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhj|!ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj!h]hstruct xe_exec_queue *q}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK`hj!ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hK`hj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jhj!hK`hj!ubah}(h]h ]h"]h$]h&]uh1jhj|!ubh)}(h **Return**h]j)}(hj!h]hReturn}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhj|!ubh)}(hCTrue if **q** is secondary queue of a queue group, false otherwise.h](hTrue if }(hj!hhhNhNubj)}(h**q**h]hq}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubh6 is secondary queue of a queue group, false otherwise.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhj|!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j.xe_exec_queue_multi_queue_primary (C function)#c.xe_exec_queue_multi_queue_primaryhNtauh1jhjhhhNhNubj)}(hhh](j )}(hRstruct xe_exec_queue * xe_exec_queue_multi_queue_primary (struct xe_exec_queue *q)h]j)}(hPstruct xe_exec_queue *xe_exec_queue_multi_queue_primary(struct xe_exec_queue *q)h](j)}(hjh]hstruct}(hj3"hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj/"hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKjubj+)}(h h]h }(hjA"hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj/"hhhj@"hKjubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjR"hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjO"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjT"modnameN classnameNjj)}j]j)}j!xe_exec_queue_multi_queue_primarysb#c.xe_exec_queue_multi_queue_primaryasbuh1hhj/"hhhj@"hKjubj+)}(h h]h }(hjs"hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj/"hhhj@"hKjubj)}(hjh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/"hhhj@"hKjubj<)}(h!xe_exec_queue_multi_queue_primaryh]jB)}(hjp"h]h!xe_exec_queue_multi_queue_primary}(hj"hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj"ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj/"hhhj@"hKjubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj"hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj"ubj+)}(h h]h }(hj"hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj"ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj"hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]jn"#c.xe_exec_queue_multi_queue_primaryasbuh1hhj"ubj+)}(h h]h }(hj"hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj"ubj)}(hjh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubjB)}(hj(h]hq}(hj#hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj"ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj"ubah}(h]h ]h"]h$]h&]hhuh1jhj/"hhhj@"hKjubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj+"hhhj@"hKjubah}(h]j&"ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj@"hKjhj("hhubjn)}(hhh]h)}(h%Get multi queue group's primary queueh]h'Get multi queue group’s primary queue}(hj-#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKjhj*#hhubah}(h]h ]h"]h$]h&]uh1jmhj("hhhj@"hKjubeh}(h]h ](jfunctioneh"]h$]h&]jjjjE#jjE#jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Description** If **q** belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, **q** will be returned.h](h)}(h**Parameters**h]j)}(hjO#h]h Parameters}(hjQ#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjM#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKnhjI#ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjn#h]hstruct xe_exec_queue *q}(hjp#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjl#ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKkhjh#ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKkhj#ubah}(h]h ]h"]h$]h&]uh1jhjh#ubeh}(h]h ]h"]h$]h&]uh1jhj#hKkhje#ubah}(h]h ]h"]h$]h&]uh1jhjI#ubh)}(h**Description**h]j)}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKmhjI#ubh)}(hIf **q** belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, **q** will be returned.h](hIf }(hj#hhhNhNubj)}(h**q**h]hq}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubhb belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, }(hj#hhhNhNubj)}(h**q**h]hq}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubh will be returned.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKlhjI#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"xe_exec_queue_get_lrc (C function)c.xe_exec_queue_get_lrchNtauh1jhjhhhNhNubj)}(hhh](j )}(hHstruct xe_lrc * xe_exec_queue_get_lrc (struct xe_exec_queue *q, u16 idx)h]j)}(hFstruct xe_lrc *xe_exec_queue_get_lrc(struct xe_exec_queue *q, u16 idx)h](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj$hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj $hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$hhhj$hMubh)}(hhh]jB)}(hxe_lrch]hxe_lrc}(hj1$hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj.$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj3$modnameN classnameNjj)}j]j)}jxe_exec_queue_get_lrcsbc.xe_exec_queue_get_lrcasbuh1hhj$hhhj$hMubj+)}(h h]h }(hjR$hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$hhhj$hMubj)}(hjh]h*}(hj`$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$hhhj$hMubj<)}(hxe_exec_queue_get_lrch]jB)}(hjO$h]hxe_exec_queue_get_lrc}(hjq$hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjm$ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj$hhhj$hMubj)}(h"(struct xe_exec_queue *q, u16 idx)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj$ubj+)}(h h]h }(hj$hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj$hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj$modnameN classnameNjj)}j]jM$c.xe_exec_queue_get_lrcasbuh1hhj$ubj+)}(h h]h }(hj$hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$ubj)}(hjh]h*}(hj$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubjB)}(hj(h]hq}(hj$hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj$ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj$ubj)}(hu16 idxh](h)}(hhh]jB)}(hu16h]hu16}(hj$hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj%modnameN classnameNjj)}j]jM$c.xe_exec_queue_get_lrcasbuh1hhj$ubj+)}(h h]h }(hj%hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj$ubjB)}(hidxh]hidx}(hj*%hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj$ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj$ubeh}(h]h ]h"]h$]h&]hhuh1jhj$hhhj$hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj $hhhj$hMubah}(h]j$ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj$hMhj$hhubjn)}(hhh]h)}(hGet the LRC from exec queue.h]hGet the LRC from exec queue.}(hjT%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjQ%hhubah}(h]h ]h"]h$]h&]uh1jmhj$hhhj$hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjl%jjl%jjjuh1jhhhjhNhNubj)}(hX'**Parameters** ``struct xe_exec_queue *q`` The exec queue instance. ``u16 idx`` Index within multi-LRC array. **Description** Retrieves LRC of given index for the exec queue under lock and takes reference. **Return** Pointer to LRC on success, error on failure, NULL on lookup failure.h](h)}(h**Parameters**h]j)}(hjv%h]h Parameters}(hjx%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjt%ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM#hjp%ubj)}(hhh](j)}(h5``struct xe_exec_queue *q`` The exec queue instance. h](j)}(h``struct xe_exec_queue *q``h]j)}(hj%h]hstruct xe_exec_queue *q}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM hj%ubj)}(hhh]h)}(hThe exec queue instance.h]hThe exec queue instance.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hM hj%ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj%hM hj%ubj)}(h*``u16 idx`` Index within multi-LRC array. h](j)}(h ``u16 idx``h]j)}(hj%h]hu16 idx}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM!hj%ubj)}(hhh]h)}(hIndex within multi-LRC array.h]hIndex within multi-LRC array.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hM!hj%ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj%hM!hj%ubeh}(h]h ]h"]h$]h&]uh1jhjp%ubh)}(h**Description**h]j)}(hj &h]h Description}(hj &hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM#hjp%ubh)}(hORetrieves LRC of given index for the exec queue under lock and takes reference.h]hORetrieves LRC of given index for the exec queue under lock and takes reference.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM"hjp%ubh)}(h **Return**h]j)}(hj0&h]hReturn}(hj2&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.&ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM%hjp%ubh)}(hDPointer to LRC on success, error on failure, NULL on lookup failure.h]hDPointer to LRC on success, error on failure, NULL on lookup failure.}(hjF&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM&hjp%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_lrc (C function)c.xe_exec_queue_lrchNtauh1jhjhhhNhNubj)}(hhh](j )}(h;struct xe_lrc * xe_exec_queue_lrc (struct xe_exec_queue *q)h]j)}(h9struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q)h](j)}(hjh]hstruct}(hju&hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjq&hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM9ubj+)}(h h]h }(hj&hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjq&hhhj&hM9ubh)}(hhh]jB)}(hxe_lrch]hxe_lrc}(hj&hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj&ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]j)}jxe_exec_queue_lrcsbc.xe_exec_queue_lrcasbuh1hhjq&hhhj&hM9ubj+)}(h h]h }(hj&hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjq&hhhj&hM9ubj)}(hjh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjq&hhhj&hM9ubj<)}(hxe_exec_queue_lrch]jB)}(hj&h]hxe_exec_queue_lrc}(hj&hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj&ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjq&hhhj&hM9ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj&hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj&ubj+)}(h h]h }(hj&hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj&ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj 'hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj 'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]j&c.xe_exec_queue_lrcasbuh1hhj&ubj+)}(h h]h }(hj+'hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj&ubj)}(hjh]h*}(hj9'hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&ubjB)}(hj(h]hq}(hjF'hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj&ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj&ubah}(h]h ]h"]h$]h&]hhuh1jhjq&hhhj&hM9ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjm&hhhj&hM9ubah}(h]jh&ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj&hM9hjj&hhubjn)}(hhh]h)}(hGet the LRC from exec queue.h]hGet the LRC from exec queue.}(hjo'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM9hjl'hhubah}(h]h ]h"]h$]h&]uh1jmhjj&hhhj&hM9ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj'jj'jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue instance. **Description** Retrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured. This function does not increment reference count, so the reference can be just forgotten after use. **Return** Pointer to LRC on success, error on failureh](h)}(h**Parameters**h]j)}(hj'h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM=hj'ubj)}(hhh]j)}(h5``struct xe_exec_queue *q`` The exec queue instance. h](j)}(h``struct xe_exec_queue *q``h]j)}(hj'h]hstruct xe_exec_queue *q}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM:hj'ubj)}(hhh]h)}(hThe exec queue instance.h]hThe exec queue instance.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM:hj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhj'hM:hj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubh)}(h**Description**h]j)}(hj'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM<hj'ubh)}(hRetrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured. This function does not increment reference count, so the reference can be just forgotten after use.h]hRetrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured. This function does not increment reference count, so the reference can be just forgotten after use.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM;hj'ubh)}(h **Return**h]j)}(hj(h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM@hj'ubh)}(h+Pointer to LRC on success, error on failureh]h+Pointer to LRC on success, error on failure}(hj((hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMAhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_exec_queue_create (C function)c.xe_exec_queue_createhNtauh1jhjhhhNhNubj)}(hhh](j )}(hstruct xe_exec_queue * xe_exec_queue_create (struct xe_device *xe, struct xe_vm *vm, u32 logical_mask, u16 width, struct xe_hw_engine *hwe, u32 flags, u64 extensions)h]j)}(hstruct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm, u32 logical_mask, u16 width, struct xe_hw_engine *hwe, u32 flags, u64 extensions)h](j)}(hjh]hstruct}(hjW(hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjS(hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hje(hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjS(hhhjd(hMubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjv(hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjs(ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjx(modnameN classnameNjj)}j]j)}jxe_exec_queue_createsbc.xe_exec_queue_createasbuh1hhjS(hhhjd(hMubj+)}(h h]h }(hj(hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjS(hhhjd(hMubj)}(hjh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjS(hhhjd(hMubj<)}(hxe_exec_queue_createh]jB)}(hj(h]hxe_exec_queue_create}(hj(hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj(ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjS(hhhjd(hMubj)}(hz(struct xe_device *xe, struct xe_vm *vm, u32 logical_mask, u16 width, struct xe_hw_engine *hwe, u32 flags, u64 extensions)h](j)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hj(hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj(ubj+)}(h h]h }(hj(hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj(ubh)}(hhh]jB)}(h xe_deviceh]h xe_device}(hj(hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj(ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj(modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj(ubj+)}(h h]h }(hj )hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj(ubj)}(hjh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubjB)}(hxeh]hxe}(hj()hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj(ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjA)hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj=)ubj+)}(h h]h }(hjN)hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=)ubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hj_)hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj\)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetja)modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj=)ubj+)}(h h]h }(hj})hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=)ubj)}(hjh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=)ubjB)}(hvmh]hvm}(hj)hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj=)ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubj)}(hu32 logical_maskh](h)}(hhh]jB)}(hu32h]hu32}(hj)hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj)ubj+)}(h h]h }(hj)hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj)ubjB)}(h logical_maskh]h logical_mask}(hj)hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj)ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubj)}(h u16 widthh](h)}(hhh]jB)}(hu16h]hu16}(hj)hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj)ubj+)}(h h]h }(hj*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj)ubjB)}(hwidthh]hwidth}(hj(*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj)ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubj)}(hstruct xe_hw_engine *hweh](j)}(hjh]hstruct}(hjA*hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj=*ubj+)}(h h]h }(hjN*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=*ubh)}(hhh]jB)}(h xe_hw_engineh]h xe_hw_engine}(hj_*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj\*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetja*modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj=*ubj+)}(h h]h }(hj}*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=*ubj)}(hjh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=*ubjB)}(hhweh]hhwe}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj=*ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubj)}(h u32 flagsh](h)}(hhh]jB)}(hu32h]hu32}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj*ubj+)}(h h]h }(hj*hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj*ubjB)}(hflagsh]hflags}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubj)}(hu64 extensionsh](h)}(hhh]jB)}(hu64h]hu64}(hj*hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j(c.xe_exec_queue_createasbuh1hhj*ubj+)}(h h]h }(hj+hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj*ubjB)}(h extensionsh]h extensions}(hj(+hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj*ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj(ubeh}(h]h ]h"]h$]h&]hhuh1jhjS(hhhjd(hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjO(hhhjd(hMubah}(h]jJ(ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjd(hMhjL(hhubjn)}(hhh]h)}(hCreate an exec queueh]hCreate an exec queue}(hjR+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjO+hhubah}(h]h ]h"]h$]h&]uh1jmhjL(hhhjd(hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjj+jjj+jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` Xe device ``struct xe_vm *vm`` VM for the exec queue ``u32 logical_mask`` Logical mask of HW engines ``u16 width`` Width of the exec queue (number of LRCs) ``struct xe_hw_engine *hwe`` Hardware engine ``u32 flags`` Exec queue creation flags ``u64 extensions`` Extensions for exec queue creation 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classnameNjj)}j]j-c.xe_exec_queue_create_classasbuh1hhjV/ubj+)}(h h]h }(hj/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjV/ubjB)}(hclassh]hclass}(hj/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjV/ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(h u32 flagsh](h)}(hhh]jB)}(hu32h]hu32}(hj/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]j-c.xe_exec_queue_create_classasbuh1hhj/ubj+)}(h h]h }(hj/hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj/ubjB)}(hflagsh]hflags}(hj/hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj/ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubj)}(hu64 extensionsh](h)}(hhh]jB)}(hu64h]hu64}(hj0hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj 0modnameN classnameNjj)}j]j-c.xe_exec_queue_create_classasbuh1hhj0ubj+)}(h h]h }(hj&0hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj0ubjB)}(h extensionsh]h extensions}(hj40hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj0ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj.ubeh}(h]h ]h"]h$]h&]hhuh1jhj-hhhj-hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj-hhhj-hMubah}(h]j-ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj-hMhj-hhubjn)}(hhh]h)}(h0Create an exec queue for a specific engine classh]h0Create an exec queue for a specific engine class}(hj^0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj[0hhubah}(h]h ]h"]h$]h&]uh1jmhj-hhhj-hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjv0jjv0jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` Xe device ``struct xe_gt *gt`` GT for the exec queue ``struct xe_vm *vm`` VM for the exec queue ``enum xe_engine_class class`` Engine class ``u32 flags`` Exec queue creation flags ``u64 extensions`` Extensions for exec queue creation **Description** Create an exec queue for the specified engine class. **Return** Pointer to the created exec queue on success, ERR_PTR on failureh](h)}(h**Parameters**h]j)}(hj0h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~0ubah}(h]h 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Cleans up all resources associated with the exec queue. This function should not be called directly; use xe_exec_queue_put() instead.h]hCalled when the last reference to the exec queue is dropped. Cleans up all resources associated with the exec queue. This function should not be called directly; use xe_exec_queue_put() instead.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM:hj^7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_fini (C function)c.xe_exec_queue_finihNtauh1jhjhhhNhNubj)}(hhh](j )}(h1void xe_exec_queue_fini (struct xe_exec_queue *q)h]j)}(h0void xe_exec_queue_fini(struct xe_exec_queue *q)h](j~)}(hvoidh]hvoid}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hj7hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM`ubj+)}(h h]h }(hj8hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj7hhhj8hM`ubj<)}(hxe_exec_queue_finih]jB)}(hxe_exec_queue_finih]hxe_exec_queue_fini}(hj$8hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj 8ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj7hhhj8hM`ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj@8hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj<8ubj+)}(h h]h }(hjM8hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj<8ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj^8hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj[8ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj`8modnameN classnameNjj)}j]j)}jj&8sbc.xe_exec_queue_finiasbuh1hhj<8ubj+)}(h h]h }(hj~8hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj<8ubj)}(hjh]h*}(hj8hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj<8ubjB)}(hj(h]hq}(hj8hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj<8ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj88ubah}(h]h ]h"]h$]h&]hhuh1jhj7hhhj8hM`ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj7hhhj8hM`ubah}(h]j7ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj8hM`hj7hhubjn)}(hhh]h)}(hFinalize an exec queueh]hFinalize an exec queue}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM`hj8hhubah}(h]h ]h"]h$]h&]uh1jmhj7hhhj8hM`ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj8jj8jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** Finalizes the exec queue by updating run ticks, releasing LRC references, and freeing the queue structure. This is called after the queue has been destroyed and all references have been dropped.h](h)}(h**Parameters**h]j)}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMdhj8ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj9h]hstruct xe_exec_queue *q}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMahj8ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMahj9ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jhj9hMahj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubh)}(h**Description**h]j)}(hj>9h]h Description}(hj@9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<9ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMchj8ubh)}(hFinalizes the exec queue by updating run ticks, releasing LRC references, and freeing the queue structure. This is called after the queue has been destroyed and all references have been dropped.h]hFinalizes the exec queue by updating run ticks, releasing LRC references, and freeing the queue structure. This is called after the queue has been destroyed and all references have been dropped.}(hjT9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMbhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j&xe_exec_queue_assign_name (C function)c.xe_exec_queue_assign_namehNtauh1jhjhhhNhNubj)}(hhh](j )}(hFvoid xe_exec_queue_assign_name (struct xe_exec_queue *q, u32 instance)h]j)}(hEvoid xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance)h](j~)}(hvoidh]hvoid}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hj9hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMvubj+)}(h h]h }(hj9hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj9hhhj9hMvubj<)}(hxe_exec_queue_assign_nameh]jB)}(hxe_exec_queue_assign_nameh]hxe_exec_queue_assign_name}(hj9hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj9ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj9hhhj9hMvubj)}(h'(struct xe_exec_queue *q, u32 instance)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj9ubj+)}(h h]h }(hj9hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj9ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj9hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]j)}jj9sbc.xe_exec_queue_assign_nameasbuh1hhj9ubj+)}(h h]h }(hj9hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj9ubj)}(hjh]h*}(hj :hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj9ubjB)}(hj(h]hq}(hj:hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj9ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj9ubj)}(h u32 instanceh](h)}(hhh]jB)}(hu32h]hu32}(hj4:hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj1:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj6:modnameN classnameNjj)}j]j9c.xe_exec_queue_assign_nameasbuh1hhj-:ubj+)}(h h]h }(hjR:hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj-:ubjB)}(hinstanceh]hinstance}(hj`:hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj-:ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj9ubeh}(h]h ]h"]h$]h&]hhuh1jhj9hhhj9hMvubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj{9hhhj9hMvubah}(h]jv9ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj9hMvhjx9hhubjn)}(hhh]h)}(hAssign a name to an exec queueh]hAssign a name to an exec queue}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMvhj:hhubah}(h]h ]h"]h$]h&]uh1jmhjx9hhhj9hMvubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``u32 instance`` Instance number for the engine **Description** Assigns a human-readable name to the exec queue based on its engine class and instance number (e.g., "rcs0", "vcs1", "bcs2").h](h)}(h**Parameters**h]j)}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMzhj:ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj:h]hstruct xe_exec_queue *q}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMwhj:ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMwhj:ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jhj:hMwhj:ubj)}(h0``u32 instance`` Instance number for the engine h](j)}(h``u32 instance``h]j)}(hj;h]h u32 instance}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMxhj:ubj)}(hhh]h)}(hInstance number for the engineh]hInstance number for the engine}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMxhj;ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jhj;hMxhj:ubeh}(h]h ]h"]h$]h&]uh1jhj:ubh)}(h**Description**h]j)}(hj?;h]h Description}(hjA;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=;ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMzhj:ubh)}(h}Assigns a human-readable name to the exec queue based on its engine class and instance number (e.g., "rcs0", "vcs1", "bcs2").h]hAssigns a human-readable name to the exec queue based on its engine class and instance number (e.g., “rcs0”, “vcs1”, “bcs2”).}(hjU;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMyhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!xe_exec_queue_lookup (C function)c.xe_exec_queue_lookuphNtauh1jhjhhhNhNubj)}(hhh](j )}(hIstruct xe_exec_queue * xe_exec_queue_lookup (struct xe_file *xef, u32 id)h]j)}(hGstruct xe_exec_queue *xe_exec_queue_lookup(struct xe_file *xef, u32 id)h](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj;hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj;hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj;hhhj;hMubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj;hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj;ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj;modnameN classnameNjj)}j]j)}jxe_exec_queue_lookupsbc.xe_exec_queue_lookupasbuh1hhj;hhhj;hMubj+)}(h h]h }(hj;hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj;hhhj;hMubj)}(hjh]h*}(hj;hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;hhhj;hMubj<)}(hxe_exec_queue_lookuph]jB)}(hj;h]hxe_exec_queue_lookup}(hj;hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj;ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj;hhhj;hMubj)}(h(struct xe_file *xef, u32 id)h](j)}(hstruct xe_file *xefh](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj;ubj+)}(h h]h }(hj <hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj;ubh)}(hhh]jB)}(hxe_fileh]hxe_file}(hj<hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j;c.xe_exec_queue_lookupasbuh1hhj;ubj+)}(h h]h }(hj:<hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj;ubj)}(hjh]h*}(hjH<hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubjB)}(hxefh]hxef}(hjU<hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj;ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj;ubj)}(hu32 idh](h)}(hhh]jB)}(hu32h]hu32}(hjq<hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjn<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjs<modnameN classnameNjj)}j]j;c.xe_exec_queue_lookupasbuh1hhjj<ubj+)}(h h]h }(hj<hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjj<ubjB)}(hidh]hid}(hj<hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjj<ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj;ubeh}(h]h ]h"]h$]h&]hhuh1jhj;hhhj;hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj|;hhhj;hMubah}(h]jw;ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj;hMhjy;hhubjn)}(hhh]h)}(hLook up an exec queue by IDh]hLook up an exec queue by ID}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<hhubah}(h]h ]h"]h$]h&]uh1jmhjy;hhhj;hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj<jj<jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_file *xef`` Xe file private data ``u32 id`` Exec queue ID **Description** Looks up an exec queue by its ID and increments its reference count. **Return** Pointer to the exec queue if found, NULL otherwiseh](h)}(h**Parameters**h]j)}(hj<h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubj)}(hhh](j)}(h-``struct xe_file *xef`` Xe file private data h](j)}(h``struct xe_file *xef``h]j)}(hj=h]hstruct xe_file *xef}(hj =hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj=ubj)}(hhh]h)}(hXe file private datah]hXe file private data}(hj!=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jhj=hMhj<ubj)}(h``u32 id`` Exec queue ID h](j)}(h ``u32 id``h]j)}(hjA=h]hu32 id}(hjC=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?=ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj;=ubj)}(hhh]h)}(h Exec queue IDh]h Exec queue ID}(hjZ=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjV=hMhjW=ubah}(h]h ]h"]h$]h&]uh1jhj;=ubeh}(h]h ]h"]h$]h&]uh1jhjV=hMhj<ubeh}(h]h ]h"]h$]h&]uh1jhj<ubh)}(h**Description**h]j)}(hj|=h]h Description}(hj~=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjz=ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubh)}(hDLooks up an exec queue by its ID and increments its reference count.h]hDLooks up an exec queue by its ID and increments its reference count.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubh)}(h **Return**h]j)}(hj=h]hReturn}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubh)}(h2Pointer to the exec queue if found, NULL otherwiseh]h2Pointer to the exec queue if found, NULL otherwise}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j2xe_exec_queue_device_get_max_priority (C function)'c.xe_exec_queue_device_get_max_priorityhNtauh1jhjhhhNhNubj)}(hhh](j )}(hXenum xe_exec_queue_priority xe_exec_queue_device_get_max_priority (struct xe_device *xe)h]j)}(hWenum xe_exec_queue_priority xe_exec_queue_device_get_max_priority(struct xe_device *xe)h](j)}(hjh]henum}(hj=hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj=hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj=hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=hhhj=hMubh)}(hhh]jB)}(hxe_exec_queue_priorityh]hxe_exec_queue_priority}(hj>hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj >modnameN classnameNjj)}j]j)}j%xe_exec_queue_device_get_max_prioritysb'c.xe_exec_queue_device_get_max_priorityasbuh1hhj=hhhj=hMubj+)}(h h]h }(hj(>hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj=hhhj=hMubj<)}(h%xe_exec_queue_device_get_max_priorityh]jB)}(hj%>h]h%xe_exec_queue_device_get_max_priority}(hj:>hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj6>ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hj=hhhj=hMubj)}(h(struct xe_device *xe)h]j)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hjU>hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjQ>ubj+)}(h h]h }(hjb>hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjQ>ubh)}(hhh]jB)}(h xe_deviceh]h xe_device}(hjs>hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjp>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetju>modnameN classnameNjj)}j]j#>'c.xe_exec_queue_device_get_max_priorityasbuh1hhjQ>ubj+)}(h h]h }(hj>hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjQ>ubj)}(hjh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjQ>ubjB)}(hxeh]hxe}(hj>hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjQ>ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjM>ubah}(h]h ]h"]h$]h&]hhuh1jhj=hhhj=hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj=hhhj=hMubah}(h]j=ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj=hMhj=hhubjn)}(hhh]h)}(h'Get maximum priority for an exec queuesh]h'Get maximum priority for an exec queues}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj>hhubah}(h]h ]h"]h$]h&]uh1jmhj=hhhj=hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj>jj>jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_device *xe`` Xe device **Description** Returns the maximum priority level that can be assigned to an exec queues. **Return** Maximum priority level (HIGH if CAP_SYS_NICE, NORMAL otherwise)h](h)}(h**Parameters**h]j)}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj>ubj)}(hhh]j)}(h#``struct xe_device *xe`` Xe device h](j)}(h``struct xe_device *xe``h]j)}(hj?h]hstruct xe_device *xe}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj?ubj)}(hhh]h)}(h Xe deviceh]h Xe device}(hj0?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,?hMhj-?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jhj,?hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj>ubh)}(h**Description**h]j)}(hjR?h]h Description}(hjT?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjP?ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj>ubh)}(hJReturns the maximum priority level that can be assigned to an exec queues.h]hJReturns the maximum priority level that can be assigned to an exec queues.}(hjh?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj>ubh)}(h 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Supports creating VM bind queues, regular exec queues, multi-lrc exec queues and multi-queue groups. **Return** 0 on success with exec_queue_id filled in, negative error code on failureh](h)}(h**Parameters**h]j)}(hjDh]h Parameters}(hj DhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubj)}(hhh](j)}(h&``struct drm_device *dev`` DRM device h](j)}(h``struct drm_device *dev``h]j)}(hj=Dh]hstruct drm_device *dev}(hj?DhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj;Dubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj7Dubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjVDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRDhMhjSDubah}(h]h ]h"]h$]h&]uh1jhj7Dubeh}(h]h ]h"]h$]h&]uh1jhjRDhMhj4Dubj)}(h``void *data`` IOCTL data h](j)}(h``void *data``h]j)}(hjvDh]h void *data}(hjxDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjtDubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjpDubj)}(hhh]h)}(h IOCTL datah]h IOCTL data}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjDubah}(h]h ]h"]h$]h&]uh1jhjpDubeh}(h]h ]h"]h$]h&]uh1jhjDhMhj4Dubj)}(h#``struct drm_file *file`` DRM file h](j)}(h``struct drm_file *file``h]j)}(hjDh]hstruct drm_file *file}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubj)}(hhh]h)}(hDRM fileh]hDRM file}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjDubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jhjDhMhj4Dubeh}(h]h ]h"]h$]h&]uh1jhjDubh)}(h**Description**h]j)}(hjDh]h Description}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubh)}(hCreates a new exec queue based on user-provided parameters. Supports creating VM bind queues, regular exec queues, multi-lrc exec queues and multi-queue groups.h]hCreates a new exec queue based on user-provided parameters. Supports creating VM bind queues, regular exec queues, multi-lrc exec queues and multi-queue groups.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubh)}(h **Return**h]j)}(hjEh]hReturn}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubh)}(hI0 on success with exec_queue_id filled in, negative error code on failureh]hI0 on success with exec_queue_id filled in, negative error code on failure}(hj'EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j-xe_exec_queue_get_property_ioctl (C function)"c.xe_exec_queue_get_property_ioctlhNtauh1jhjhhhNhNubj)}(hhh](j )}(h`int xe_exec_queue_get_property_ioctl (struct drm_device *dev, void *data, struct drm_file *file)h]j)}(h_int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data, struct drm_file *file)h](j~)}(hinth]hint}(hjVEhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjREhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hjeEhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjREhhhjdEhMubj<)}(h xe_exec_queue_get_property_ioctlh]jB)}(h xe_exec_queue_get_property_ioctlh]h xe_exec_queue_get_property_ioctl}(hjwEhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjsEubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjREhhhjdEhMubj)}(h;(struct drm_device *dev, void *data, struct drm_file *file)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjEubj+)}(h h]h }(hjEhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjEubh)}(hhh]jB)}(h drm_deviceh]h drm_device}(hjEhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjEmodnameN classnameNjj)}j]j)}jjyEsb"c.xe_exec_queue_get_property_ioctlasbuh1hhjEubj+)}(h h]h }(hjEhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjEubj)}(hjh]h*}(hjEhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjEubjB)}(hdevh]hdev}(hjEhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjEubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjEubj)}(h void *datah](j~)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjFubj+)}(h h]h }(hjFhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjFubj)}(hjh]h*}(hj!FhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjFubjB)}(hdatah]hdata}(hj.FhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjFubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjEubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hjGFhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjCFubj+)}(h h]h }(hjTFhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjCFubh)}(hhh]jB)}(hdrm_fileh]hdrm_file}(hjeFhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjbFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjgFmodnameN classnameNjj)}j]jE"c.xe_exec_queue_get_property_ioctlasbuh1hhjCFubj+)}(h h]h }(hjFhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjCFubj)}(hjh]h*}(hjFhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjCFubjB)}(hfileh]hfile}(hjFhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjCFubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjEubeh}(h]h ]h"]h$]h&]hhuh1jhjREhhhjdEhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjNEhhhjdEhMubah}(h]jIEah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjdEhMhjKEhhubjn)}(hhh]h)}(h!Get a property from an exec queueh]h!Get a property from an exec queue}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjFhhubah}(h]h ]h"]h$]h&]uh1jmhjKEhhhjdEhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjFjjFjjjuh1jhhhjhNhNubj)}(hXC**Parameters** ``struct drm_device *dev`` DRM device ``void *data`` IOCTL data ``struct drm_file *file`` DRM file **Description** Retrieves property values from an existing exec queue. Currently supports getting the ban/reset status. **Return** 0 on success with value filled in, negative error code on failureh](h)}(h**Parameters**h]j)}(hjFh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjFubj)}(hhh](j)}(h&``struct drm_device *dev`` DRM device h](j)}(h``struct drm_device *dev``h]j)}(hj Gh]hstruct drm_device *dev}(hj GhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjGubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj"GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jhjGhMhjGubj)}(h``void *data`` IOCTL data h](j)}(h``void *data``h]j)}(hjBGh]h void *data}(hjDGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj@Gubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjHubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjHhhhj/HhMubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj^HhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjZHubj+)}(h h]h }(hjkHhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjZHubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj|HhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjyHubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~HmodnameN classnameNjj)}j]j)}jjDHsbc.xe_exec_queue_is_lrasbuh1hhjZHubj+)}(h h]h }(hjHhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjZHubj)}(hjh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZHubjB)}(hj(h]hq}(hjHhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjZHubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjVHubah}(h]h ]h"]h$]h&]hhuh1jhjHhhhj/HhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjHhhhj/HhMubah}(h]jHah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj/HhMhjHhhubjn)}(hhh]h)}(h%Whether an exec_queue is long-runningh]h%Whether an exec_queue is long-running}(hjHhhhNhNubah}(h]h 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If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.h]hXThis function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM*hjMubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(xe_exec_queue_destroy_ioctl (C function)c.xe_exec_queue_destroy_ioctlhNtauh1jhjhhhNhNubj)}(hhh](j )}(h[int xe_exec_queue_destroy_ioctl (struct drm_device *dev, void *data, struct drm_file *file)h]j)}(hZint xe_exec_queue_destroy_ioctl(struct drm_device *dev, void *data, struct drm_file *file)h](j~)}(hinth]hint}(hjGNhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjCNhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM?ubj+)}(h h]h }(hjVNhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjCNhhhjUNhM?ubj<)}(hxe_exec_queue_destroy_ioctlh]jB)}(hxe_exec_queue_destroy_ioctlh]hxe_exec_queue_destroy_ioctl}(hjhNhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjdNubah}(h]h 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*fileh](j)}(hjh]hstruct}(hj8OhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj4Oubj+)}(h h]h }(hjEOhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj4Oubh)}(hhh]jB)}(hdrm_fileh]hdrm_file}(hjVOhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjSOubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjXOmodnameN classnameNjj)}j]jNc.xe_exec_queue_destroy_ioctlasbuh1hhj4Oubj+)}(h h]h }(hjtOhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj4Oubj)}(hjh]h*}(hjOhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4OubjB)}(hfileh]hfile}(hjOhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj4Oubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj|Nubeh}(h]h ]h"]h$]h&]hhuh1jhjCNhhhjUNhM?ubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj?NhhhjUNhM?ubah}(h]j:Nah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjUNhM?hj``struct xe_vm *vm`` The VM the engine does a bind or exec forh](j)}(h``struct xe_vm *vm``h]j)}(hjRh]hstruct xe_vm *vm}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMyhjRubj)}(hhh]h)}(h)The VM the engine does a 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Shhubjn)}(hhh]h)}(hDrop ref to last fence unlockedh]hDrop ref to last fence unlocked}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjShhubah}(h]h ]h"]h$]h&]uh1jmhj Shhhj$ShMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjSjjSjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** Only safe to be called from xe_exec_queue_destroy().h](h)}(h**Parameters**h]j)}(hjSh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jhjSubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjSubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjTh]hstruct xe_exec_queue *q}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjTubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjTubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj/ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+ThMhj,Tubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jhj+ThMhj Tubah}(h]h ]h"]h$]h&]uh1jhjSubh)}(h**Description**h]j)}(hjQTh]h Description}(hjSThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjOTubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjSubh)}(h4Only safe to be called from xe_exec_queue_destroy().h]h4Only safe to be called from xe_exec_queue_destroy().}(hjgThhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjSubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_last_fence_get (C function)c.xe_exec_queue_last_fence_gethNtauh1jhjhhhNhNubj)}(hhh](j )}(h[struct dma_fence * xe_exec_queue_last_fence_get (struct xe_exec_queue *q, struct xe_vm *vm)h]j)}(hYstruct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hjh]hstruct}(hjThhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjThhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hjThhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjThhhjThMubh)}(hhh]jB)}(h dma_fenceh]h dma_fence}(hjThhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjTubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjTmodnameN classnameNjj)}j]j)}jxe_exec_queue_last_fence_getsbc.xe_exec_queue_last_fence_getasbuh1hhjThhhjThMubj+)}(h h]h }(hjThhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjThhhjThMubj)}(hjh]h*}(hjThhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjThhhjThMubj<)}(hxe_exec_queue_last_fence_geth]jB)}(hjTh]hxe_exec_queue_last_fence_get}(hjThhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjTubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjThhhjThMubj)}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj Uubj+)}(h h]h }(hjUhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj Uubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj.UhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj+Uubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0UmodnameN classnameNjj)}j]jTc.xe_exec_queue_last_fence_getasbuh1hhj Uubj+)}(h h]h }(hjLUhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj Uubj)}(hjh]h*}(hjZUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj UubjB)}(hj(h]hq}(hjgUhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj Uubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjUubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj{Uubj+)}(h h]h }(hjUhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj{Uubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjUhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjUmodnameN classnameNjj)}j]jTc.xe_exec_queue_last_fence_getasbuh1hhj{Uubj+)}(h h]h }(hjUhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj{Uubj)}(hjh]h*}(hjUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj{UubjB)}(hvmh]hvm}(hjUhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj{Uubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjUubeh}(h]h ]h"]h$]h&]hhuh1jhjThhhjThMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjThhhjThMubah}(h]jTah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjThMhjThhubjn)}(hhh]h)}(hGet last fenceh]hGet last fence}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjUhhubah}(h]h ]h"]h$]h&]uh1jmhjThhhjThMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjVjjVjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hj"Vh]h Parameters}(hj$VhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj Vubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjAVh]hstruct xe_exec_queue *q}(hjCVhhhNhNubah}(h]h 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]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubh)}(hGet last fence, takes a refh]hGet last fence, takes a ref}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubh)}(h **Return**h]j)}(hjVh]hReturn}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjVubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjVubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j4xe_exec_queue_last_fence_get_for_resume (C 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]j7ah"]h$]h&]uh1j*hjXubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hj(XhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj%Xubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*XmodnameN classnameNjj)}j]j\W)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjXubj+)}(h h]h }(hjFXhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjXubj)}(hjh]h*}(hjTXhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjXubjB)}(hvmh]hvm}(hjaXhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjXubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjWubeh}(h]h ]h"]h$]h&]hhuh1jhjWhhhj.WhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjWhhhj.WhMubah}(h]jWah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj.WhMhjWhhubjn)}(hhh]h)}(hGet last fenceh]hGet last fence}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXhhubah}(h]h ]h"]h$]h&]uh1jmhjWhhhj.WhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjXjjXjjjuh1jhhhjhNhNubj)}(hXt**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held. **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hjXh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjXh]hstruct xe_exec_queue *q}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjXubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jhjXhMhjXubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hjYh]hstruct xe_vm *vm}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjYubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jhjYhMhjXubeh}(h]h ]h"]h$]h&]uh1jhjXubh)}(h**Description**h]j)}(hj@Yh]h Description}(hjBYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>Yubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubh)}(hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held.h]hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group’s long-running exec queue, when the group semaphore is held.}(hjVYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubh)}(h **Return**h]j)}(hjgYh]hReturn}(hjiYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjeYubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hj}YhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjXubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_last_fence_set (C function)c.xe_exec_queue_last_fence_sethNtauh1jhjhhhNhNubj)}(hhh](j )}(hfvoid xe_exec_queue_last_fence_set (struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h]j)}(hevoid xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h](j~)}(hvoidh]hvoid}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjYhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hjYhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjYhhhjYhMubj<)}(hxe_exec_queue_last_fence_seth]jB)}(hxe_exec_queue_last_fence_seth]hxe_exec_queue_last_fence_set}(hjYhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjYubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjYhhhjYhMubj)}(hD(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjYhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjYubj+)}(h h]h }(hjYhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjYubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjZhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj ZmodnameN classnameNjj)}j]j)}jjYsbc.xe_exec_queue_last_fence_setasbuh1hhjYubj+)}(h h]h }(hj'ZhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjYubj)}(hjh]h*}(hj5ZhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYubjB)}(hj(h]hq}(hjBZhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjYubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjYubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjZZhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjVZubj+)}(h h]h }(hjgZhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjVZubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjxZhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjuZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzZmodnameN classnameNjj)}j]j#Zc.xe_exec_queue_last_fence_setasbuh1hhjVZubj+)}(h h]h }(hjZhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjVZubj)}(hjh]h*}(hjZhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjVZubjB)}(hvmh]hvm}(hjZhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjVZubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjYubj)}(hstruct dma_fence *fenceh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjZubj+)}(h h]h }(hjZhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjZubh)}(hhh]jB)}(h dma_fenceh]h dma_fence}(hjZhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]j#Zc.xe_exec_queue_last_fence_setasbuh1hhjZubj+)}(h h]h }(hj[hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjZubj)}(hjh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubjB)}(hfenceh]hfence}(hj![hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjZubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjYubeh}(h]h ]h"]h$]h&]hhuh1jhjYhhhjYhMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjYhhhjYhMubah}(h]jYah ](jejfeh"]h$]h&]jjjk)jlhuh1j hjYhMhjYhhubjn)}(hhh]h)}(hSet last fenceh]hSet last fence}(hjK[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjH[hhubah}(h]h ]h"]h$]h&]uh1jmhjYhhhjYhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjc[jjc[jjjuh1jhhhjhNhNubj)}(hXD**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for ``struct dma_fence *fence`` The fence **Description** Set the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h](h)}(h**Parameters**h]j)}(hjm[h]h Parameters}(hjo[hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjk[ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjg[ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj[h]hstruct xe_exec_queue *q}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj[ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jhj[hMhj[ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hj[h]hstruct xe_vm *vm}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj[ubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jhj[hMhj[ubj)}(h&``struct dma_fence *fence`` The fence h](j)}(h``struct dma_fence *fence``h]j)}(hj[h]hstruct dma_fence *fence}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj[ubj)}(hhh]h)}(h The fenceh]h The fence}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jhj\hMhj[ubeh}(h]h ]h"]h$]h&]uh1jhjg[ubh)}(h**Description**h]j)}(hj9\h]h Description}(hj;\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj7\ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjg[ubh)}(hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h]hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.}(hjO\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjg[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_tlb_inval_last_fence_put (C function)(c.xe_exec_queue_tlb_inval_last_fence_puthNtauh1jhjhhhNhNubj)}(hhh](j )}(hjvoid xe_exec_queue_tlb_inval_last_fence_put (struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h]j)}(hivoid xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j~)}(hvoidh]hvoid}(hj~\hhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjz\hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj+)}(h h]h }(hj\hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjz\hhhj\hMubj<)}(h&xe_exec_queue_tlb_inval_last_fence_puth]jB)}(h&xe_exec_queue_tlb_inval_last_fence_puth]h&xe_exec_queue_tlb_inval_last_fence_put}(hj\hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj\ubah}(h]h ](jTjUeh"]h$]h&]hhuh1j;hjz\hhhj\hMubj)}(h>(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj\hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj\ubj+)}(h h]h }(hj\hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj\ubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hj\hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\modnameN classnameNjj)}j]j)}jj\sb(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhj\ubj+)}(h h]h }(hj\hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj\ubj)}(hjh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj\ubjB)}(hj(h]hq}(hj]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj\ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj\ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj,]hhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhj(]ubj+)}(h h]h }(hj9]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj(]ubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjJ]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjG]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjL]modnameN classnameNjj)}j]j\(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhj(]ubj+)}(h h]h }(hjh]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj(]ubj)}(hjh]h*}(hjv]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(]ubjB)}(hvmh]hvm}(hj]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj(]ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj\ubj)}(hunsigned int typeh](j~)}(hunsignedh]hunsigned}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hj]ubj+)}(h h]h }(hj]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj]ubj~)}(hinth]hint}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hj]ubj+)}(h h]h }(hj]hhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hj]ubjB)}(htypeh]htype}(hj]hhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhj]ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj\ubeh}(h]h ]h"]h$]h&]hhuh1jhjz\hhhj\hMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahjv\hhhj\hMubah}(h]jq\ah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj\hMhjs\hhubjn)}(hhh]h)}(h'Drop ref to last TLB invalidation fenceh]h'Drop ref to last TLB invalidation fence}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj]hhubah}(h]h ]h"]h$]h&]uh1jmhjs\hhhj\hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj^jj^jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GTh](h)}(h**Parameters**h]j)}(hj ^h]h Parameters}(hj"^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj^ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj?^h]hstruct xe_exec_queue *q}(hjA^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=^ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj9^ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjX^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT^hMhjU^ubah}(h]h ]h"]h$]h&]uh1jhj9^ubeh}(h]h ]h"]h$]h&]uh1jhjT^hMhj6^ubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hjx^h]hstruct xe_vm *vm}(hjz^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjv^ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjr^ubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj^ubah}(h]h ]h"]h$]h&]uh1jhjr^ubeh}(h]h ]h"]h$]h&]uh1jhj^hMhj6^ubj)}(h0``unsigned int type`` Either primary or media GTh](j)}(h``unsigned int type``h]j)}(hj^h]hunsigned int type}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj^ubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj^ubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jhj^hMhj6^ubeh}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjahhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjaubj+)}(h h]h }(hjahhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjaubh)}(hhh]jB)}(h xe_exec_queueh]h xe_exec_queue}(hjahhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjaubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]jPa(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhjaubj+)}(h h]h }(hjahhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjaubj)}(hjh]h*}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjaubjB)}(hj(h]hq}(hjahhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjaubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjaubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjahhhNhNubah}(h]h ]j%ah"]h$]h&]uh1jhjaubj+)}(h h]h }(hj bhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjaubh)}(hhh]jB)}(hxe_vmh]hxe_vm}(hjbhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjbubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjbmodnameN classnameNjj)}j]jPa(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhjaubj+)}(h h]h }(hj:bhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjaubj)}(hjh]h*}(hjHbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjaubjB)}(hvmh]hvm}(hjUbhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjaubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjaubj)}(hunsigned int typeh](j~)}(hunsignedh]hunsigned}(hjnbhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjjbubj+)}(h h]h }(hj|bhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjjbubj~)}(hinth]hint}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1j}hjjbubj+)}(h h]h }(hjbhhhNhNubah}(h]h ]j7ah"]h$]h&]uh1j*hjjbubjB)}(htypeh]htype}(hjbhhhNhNubah}(h]h ]jMah"]h$]h&]uh1jAhjjbubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjaubeh}(h]h ]h"]h$]h&]hhuh1jhjahhhj"ahMubeh}(h]h ]h"]h$]h&]hhj_uh1jj`jahj ahhhj"ahMubah}(h]jaah ](jejfeh"]h$]h&]jjjk)jlhuh1j hj"ahMhj ahhubjn)}(hhh]h)}(h#Get last fence for TLB invalidationh]h#Get last fence for TLB invalidation}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjbhhubah}(h]h ]h"]h$]h&]uh1jmhj ahhhj"ahMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjbjjbjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GT **Description** Get last fence, takes a ref **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hjbh]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjbubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjch]hstruct xe_exec_queue *q}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj cubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj*chhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&chMhj'cubah}(h]h ]h"]h$]h&]uh1jhj cubeh}(h]h ]h"]h$]h&]uh1jhj&chMhjcubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hjJch]hstruct xe_vm *vm}(hjLchhhNhNubah}(h]h ]h"]h$]h&]uh1jhjHcubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDcubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hjcchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_chMhj`cubah}(h]h ]h"]h$]h&]uh1jhjDcubeh}(h]h ]h"]h$]h&]uh1jhj_chMhjcubj)}(h1``unsigned int type`` Either primary or media GT h](j)}(h``unsigned int type``h]j)}(hjch]hunsigned int type}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubah}(h]h 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