"sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget(/translations/zh_CN/gpu/xe/xe_exec_queuemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/zh_TW/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/it_IT/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ja_JP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ko_KR/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/sp_SP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhB/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue.rsthKubhsection)}(hhh](htitle)}(hExecution Queueh]hExecution Queue}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.h]hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK"hhhhubh)}(hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.h]hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK&hhhhubh)}(hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.h]hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK)hhhhubh)}(hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.h]hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK-hhhhubh)}(hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.h]hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK1hhhhubh)}(hhh](h)}(hMulti Queue Grouph]hMulti Queue Group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK ubh)}(hXMulti Queue Group is another mode of execution supported by the compute and blitter copy command streamers (CCS and BCS, respectively). It is an enhancement of the existing hardware architecture and leverages the same submission model. It enables support for efficient, parallel execution of multiple queues within a single shared context. The multi queue group functionality is only supported with GuC submission backend. All the queues of a group must use the same address space (VM).h]hXMulti Queue Group is another mode of execution supported by the compute and blitter copy command streamers (CCS and BCS, respectively). It is an enhancement of the existing hardware architecture and leverages the same submission model. It enables support for efficient, parallel execution of multiple queues within a single shared context. The multi queue group functionality is only supported with GuC submission backend. All the queues of a group must use the same address space (VM).}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chK9hjhhubh)}(hThe DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE execution queue property supports creating a multi queue group and adding queues to a queue group.h]hThe DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE execution queue property supports creating a multi queue group and adding queues to a queue group.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKAhjhhubh)}(hXThe XE_EXEC_QUEUE_CREATE ioctl call with above property with value field set to DRM_XE_MULTI_GROUP_CREATE, will create a new multi queue group with the queue being created as the primary queue (aka q0) of the group. To add secondary queues to the group, they need to be created with the above property with id of the primary queue as the value. The properties of the primary queue (like priority, time slice) applies to the whole group. So, these properties can't be set for secondary queues of a group.h]hXThe XE_EXEC_QUEUE_CREATE ioctl call with above property with value field set to DRM_XE_MULTI_GROUP_CREATE, will create a new multi queue group with the queue being created as the primary queue (aka q0) of the group. To add secondary queues to the group, they need to be created with the above property with id of the primary queue as the value. The properties of the primary queue (like priority, time slice) applies to the whole group. So, these properties can’t be set for secondary queues of a group.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKDhjhhubh)}(hXaThe hardware does not support removing a queue from a multi-queue group. However, queues can be dynamically added to the group. A group can have up to 64 queues. To support this, XeKMD holds references to LRCs of the queues even after the queues are destroyed by the user until the whole group is destroyed. The secondary queues hold a reference to the primary queue thus preventing the group from being destroyed when user destroys the primary queue. Once the primary queue is destroyed, secondary queues can't be added to the queue group and new job submissions on existing secondary queues are not allowed.h]hXcThe hardware does not support removing a queue from a multi-queue group. However, queues can be dynamically added to the group. A group can have up to 64 queues. To support this, XeKMD holds references to LRCs of the queues even after the queues are destroyed by the user until the whole group is destroyed. The secondary queues hold a reference to the primary queue thus preventing the group from being destroyed when user destroys the primary queue. Once the primary queue is destroyed, secondary queues can’t be added to the queue group and new job submissions on existing secondary queues are not allowed.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKLhjhhubh)}(hXThe queues of a multi queue group can set their priority within the group through the DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY property. This multi queue priority can also be set dynamically through the XE_EXEC_QUEUE_SET_PROPERTY ioctl. This is the only other property supported by the secondary queues of a multi queue group, other than DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE.h]hXThe queues of a multi queue group can set their priority within the group through the DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY property. This multi queue priority can also be set dynamically through the XE_EXEC_QUEUE_SET_PROPERTY ioctl. This is the only other property supported by the secondary queues of a multi queue group, other than DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKVhjhhubh)}(hWhen GuC reports an error on any of the queues of a multi queue group, the queue cleanup mechanism is invoked for all the queues of the group as hardware cannot make progress on the multi queue context.h]hWhen GuC reports an error on any of the queues of a multi queue group, the queue cleanup mechanism is invoked for all the queues of the group as hardware cannot make progress on the multi queue context.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chK]hjhhubh)}(hQRefer :ref:`multi-queue-group-guc-interface` for multi queue group GuC interface.h](hRefer }(hjhhhNhNubh)}(h&:ref:`multi-queue-group-guc-interface`h]hinline)}(hjh]hmulti-queue-group-guc-interface}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_exec_queue refdomainjreftyperef refexplicitrefwarn reftargetmulti-queue-group-guc-interfaceuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue.chKahjubh% for multi queue group GuC interface.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKahjhhubhtarget)}(h$.. _multi-queue-group-guc-interface:h]h}(h]h ]h"]h$]h&]refidmulti-queue-group-guc-interfaceuh1jhKhjhhhhubeh}(h]multi-queue-groupah ]h"]multi queue groupah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(hMulti Queue Group GuC interfaceh]hMulti Queue Group GuC interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe multi queue group coordination between KMD and GuC is through a software construct called Context Group Page (CGP). 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160..1024}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhj7ubah}(h]h ]h"]h$]h&]uh1j2hj4ubj3)}(hhh]h)}(hRESERVEDh]hRESERVED}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjOubah}(h]h ]h"]h$]h&]uh1j2hj4ubj3)}(hhh]h)}(hMBZh]hMBZ}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjfubah}(h]h ]h"]h$]h&]uh1j2hj4ubeh}(h]h ]h"]h$]h&]uh1j-hj*ubeh}(h]h ]h"]h$]h&]uh1j(hjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chNubh)}(hXWhile registering Q0 with GuC, CGP is updated with Q0 entry and GuC is notified through XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_QUEUE H2G message which specifies the CGP address. When the secondary queues are added to the group, the CGP is updated with entry for that queue and GuC is notified through the H2G interface XE_GUC_ACTION_MULTI_QUEUE_CONTEXT_CGP_SYNC. GuC responds to these H2G messages with a XE_GUC_ACTION_NOTIFY_MULTIQ_CONTEXT_CGP_SYNC_DONE G2H message. GuC also sends a XE_GUC_ACTION_NOTIFY_MULTI_QUEUE_CGP_CONTEXT_ERROR notification for any error in the CGP. Only one of these CGP update messages can be outstanding (waiting for GuC response) at any time. The bits in KMD_QUEUE_UPDATE_MASK_DW* fields indicate which queue entry is being updated in the CGP.h]hXWhile registering Q0 with GuC, CGP is updated with Q0 entry and GuC is notified through XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_QUEUE H2G message which specifies the CGP address. When the secondary queues are added to the group, the CGP is updated with entry for that queue and GuC is notified through the H2G interface XE_GUC_ACTION_MULTI_QUEUE_CONTEXT_CGP_SYNC. GuC responds to these H2G messages with a XE_GUC_ACTION_NOTIFY_MULTIQ_CONTEXT_CGP_SYNC_DONE G2H message. GuC also sends a XE_GUC_ACTION_NOTIFY_MULTI_QUEUE_CGP_CONTEXT_ERROR notification for any error in the CGP. Only one of these CGP update messages can be outstanding (waiting for GuC response) at any time. The bits in KMD_QUEUE_UPDATE_MASK_DW* fields indicate which queue entry is being updated in the CGP.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubh)}(hThe primary queue (Q0) represents the multi queue group context in GuC and submission on any queue of the group must be through Q0 GuC interface only.h]hThe primary queue (Q0) represents the multi queue group context in GuC and submission on any queue of the group must be through Q0 GuC interface only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubh)}(hAs it is not required to register secondary queues with GuC, the secondary queue context ids in the CGP are populated with Q0 context id.h]hAs it is not required to register secondary queues with GuC, the secondary queue context ids in the CGP are populated with Q0 context id.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:21: ./drivers/gpu/drm/xe/xe_guc_submit.chMhjhhubeh}(h](jid1eh ]h"](multi queue group guc interfacemulti-queue-group-guc-interfaceeh$]h&]uh1hhhhhhhhKexpect_referenced_by_name}jjsexpect_referenced_by_id}jjsubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single xe_multi_queue_priority (C enum)c.xe_multi_queue_priorityhNtauh1jhjhhhNhNubhdesc)}(hhh](hdesc_signature)}(hxe_multi_queue_priorityh]hdesc_signature_line)}(henum xe_multi_queue_priorityh](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubh desc_name)}(hxe_multi_queue_priorityh]h desc_sig_name)}(hjh]hxe_multi_queue_priority}(hj/hhhNhNubah}(h]h ]nah"]h$]h&]uh1j-hj)ubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1j'hjhhhjhKubeh}(h]h ]h"]h$]h&]hh add_permalinkuh1jsphinx_line_type declaratorhjhhhjhKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhjhKhjhhubh desc_content)}(hhh]h)}(hMulti Queue priority valuesh]hMulti Queue priority values}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK$hj[hhubah}(h]h ]h"]h$]h&]uh1jYhjhhhjhKubeh}(h]h ](cenumeh"]h$]h&]domainjvobjtypejwdesctypejwnoindex noindexentrynocontentsentryuh1jhhhjhNhNubh container)}(h**Constants** ``XE_MULTI_QUEUE_PRIORITY_LOW`` Priority low ``XE_MULTI_QUEUE_PRIORITY_NORMAL`` Priority normal ``XE_MULTI_QUEUE_PRIORITY_HIGH`` Priority highh](h)}(h **Constants**h]hstrong)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK(hjubhdefinition_list)}(hhh](hdefinition_list_item)}(h-``XE_MULTI_QUEUE_PRIORITY_LOW`` Priority low h](hterm)}(h``XE_MULTI_QUEUE_PRIORITY_LOW``h]hliteral)}(hjh]hXE_MULTI_QUEUE_PRIORITY_LOW}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK+hjubh definition)}(hhh]h)}(h Priority lowh]h Priority low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK+hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK+hjubj)}(h3``XE_MULTI_QUEUE_PRIORITY_NORMAL`` Priority normal h](j)}(h"``XE_MULTI_QUEUE_PRIORITY_NORMAL``h]j)}(hjh]hXE_MULTI_QUEUE_PRIORITY_NORMAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK.hjubj)}(hhh]h)}(hPriority normalh]hPriority normal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK.hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK.hjubj)}(h.``XE_MULTI_QUEUE_PRIORITY_HIGH`` Priority highh](j)}(h ``XE_MULTI_QUEUE_PRIORITY_HIGH``h]j)}(hj&h]hXE_MULTI_QUEUE_PRIORITY_HIGH}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK0hj ubj)}(hhh]h)}(h Priority highh]h Priority high}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK1hj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj;hK0hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hjih]h Description}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK3hjhhubh)}(h?The priority values of the queues within the multi queue group.h]h?The priority values of the queues within the multi queue group.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK%hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_group (C struct)c.xe_exec_queue_grouphNtauh1jhjhhhNhNubj)}(hhh](j)}(hxe_exec_queue_grouph]j)}(hstruct xe_exec_queue_grouph](j)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK*ubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjhhhjhK*ubj()}(hxe_exec_queue_grouph]j.)}(hjh]hxe_exec_queue_group}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjhhhjhK*ubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjhhhjhK*ubah}(h]jah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjhK*hjhhubjZ)}(hhh]h)}(hExecution multi queue grouph]hExecution multi queue group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK2hjhhubah}(h]h ]h"]h$]h&]uh1jYhjhhhjhK*ubeh}(h]h ](jvstructeh"]h$]h&]j{jvj|j j}j j~jjuh1jhhhjhNhNubj)}(hX+**Definition**:: struct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; bool sync_pending; bool banned; }; **Members** ``primary`` Primary queue of this group ``cgp_bo`` BO for the Context Group Page ``xa`` xarray to store LRCs ``list`` List of all secondary queues in the group ``list_lock`` Secondary queue list lock ``sync_pending`` CGP_SYNC_DONE g2h response pending ``banned`` Group bannedh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK6hj ubh literal_block)}(hstruct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; bool sync_pending; bool banned; };h]hstruct xe_exec_queue_group { struct xe_exec_queue *primary; struct xe_bo *cgp_bo; struct xarray xa; struct list_head list; struct mutex list_lock; bool sync_pending; bool banned; };}hj) sbah}(h]h ]h"]h$]h&]hhuh1j' hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hj ubh)}(h **Members**h]j)}(hj: h]hMembers}(hj< hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8 ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKBhj ubj)}(hhh](j)}(h(``primary`` Primary queue of this group h](j)}(h ``primary``h]j)}(hjY h]hprimary}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjW ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hjS ubj)}(hhh]h)}(hPrimary queue of this grouph]hPrimary queue of this group}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjn hK8hjo ubah}(h]h ]h"]h$]h&]uh1jhjS ubeh}(h]h ]h"]h$]h&]uh1jhjn hK8hjP ubj)}(h)``cgp_bo`` BO for the Context Group Page h](j)}(h ``cgp_bo``h]j)}(hj h]hcgp_bo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK:hj ubj)}(hhh]h)}(hBO for the Context Group Pageh]hBO for the Context Group Page}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK:hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK:hjP ubj)}(h``xa`` xarray to store LRCs h](j)}(h``xa``h]j)}(hj h]hxa}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj)}(hhh]h)}(h)List of all secondary queues in the grouph]h)List of all secondary queues in the group}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK>hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK>hjP ubj)}(h(``list_lock`` Secondary queue list lock h](j)}(h ``list_lock``h]j)}(hj= h]h list_lock}(hj? hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj; ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK@hj7 ubj)}(hhh]h)}(hSecondary queue list lockh]hSecondary queue list lock}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjR hK@hjS ubah}(h]h ]h"]h$]h&]uh1jhj7 ubeh}(h]h ]h"]h$]h&]uh1jhjR hK@hjP ubj)}(h4``sync_pending`` CGP_SYNC_DONE g2h response pending h](j)}(h``sync_pending``h]j)}(hjv h]h sync_pending}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjt ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKBhjp ubj)}(hhh]h)}(h"CGP_SYNC_DONE g2h response pendingh]h"CGP_SYNC_DONE g2h response pending}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKBhj ubah}(h]h ]h"]h$]h&]uh1jhjp ubeh}(h]h ]h"]h$]h&]uh1jhj hKBhjP ubj)}(h``banned`` Group bannedh](j)}(h ``banned``h]j)}(hj h]hbanned}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKChj ubj)}(hhh]h)}(h Group bannedh]h Group banned}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKDhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKChjP ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKGhjhhubh)}(h'Contains multi queue group information.h]h'Contains multi queue group information.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK3hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue (C struct)c.xe_exec_queuehNtauh1jhjhhhNhNubj)}(hhh](j)}(h xe_exec_queueh]j)}(hstruct xe_exec_queueh](j)}(hjh]hstruct}(hj0 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj, hhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8ubj)}(h h]h }(hj> hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj, hhhj= hK8ubj()}(h xe_exec_queueh]j.)}(hj* h]h xe_exec_queue}(hjP hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjL ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj, hhhj= hK8ubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj( hhhj= hK8ubah}(h]j# ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj= hK8hj% hhubjZ)}(hhh]h)}(hExecution queueh]hExecution queue}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKHhjo hhubah}(h]h ]h"]h$]h&]uh1jYhj% hhhj= hK8ubeh}(h]h ](jvstructeh"]h$]h&]j{jvj|j j}j j~jjuh1jhhhjhNhNubj)}(hX**Definition**:: struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; struct xe_lrc *lrc[] ; }; **Members** ``xef`` Back pointer to xe file if this is user created exec queue ``gt`` GT structure this exec queue can submit to ``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. ``refcount`` ref count of this exec queue ``vm`` VM (address space) for this exec queue ``user_vm`` User VM (address space) for this exec queue (bind queues only) ``class`` class of this exec queue ``logical_mask`` logical mask of where job submitted to exec queue can run ``name`` name of this exec queue ``width`` width (number BB submitted per exec) of this exec queue ``msix_vec`` MSI-X vector (for platforms that support it) ``fence_irq`` fence IRQ used to signal job completion ``last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode ``flags`` flags for this exec queue, should statically setup aside from ban bit ``{unnamed_union}`` anonymous ``multi_gt_list`` list head for VM bind engines if multi-GT ``multi_gt_link`` link for VM bind engines if multi-GT ``{unnamed_union}`` anonymous ``execlist`` execlist backend specific state for exec queue ``guc`` GuC backend specific state for exec queue ``multi_queue`` Multi queue information ``multi_queue.group`` Queue group information ``multi_queue.link`` Link into group's secondary queues list ``multi_queue.priority`` Queue priority within the multi-queue group ``multi_queue.pos`` Position of queue within the multi-queue group ``multi_queue.valid`` Queue belongs to a multi queue group ``multi_queue.is_primary`` Is primary queue (Q0) of the group ``sched_props`` scheduling properties ``sched_props.timeslice_us`` timeslice period in micro-seconds ``sched_props.preempt_timeout_us`` preemption timeout in micro-seconds ``sched_props.job_timeout_ms`` job timeout in milliseconds ``sched_props.priority`` priority of this exec queue ``lr`` long-running exec queue state ``lr.pfence`` preemption fence ``lr.context`` preemption fence context ``lr.seqno`` preemption fence seqno ``lr.link`` link into VM's list of exec queues ``tlb_inval`` TLB invalidations exec queue state ``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler ``pxp`` PXP info tracking ``pxp.type`` PXP session type used by this queue ``pxp.link`` link into the list of PXP exec queues ``ufence_syncobj`` User fence syncobj ``ufence_timeline_value`` User fence timeline value ``replay_state`` GPU hang replay state ``ops`` submission backend exec queue operations ``ring_ops`` ring operations for this exec queue ``entity`` DRM sched entity for this exec queue (1 to 1 relationship) ``job_cnt`` number of drm jobs in this exec queue ``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. ``hw_engine_group_link`` link into exec queues in the same hw engine group ``lrc`` logical ring context for this exec queueh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKLhj ubj( )}(hXstruct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; struct xe_lrc *lrc[] ; };h]hXstruct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; struct xe_vm *user_vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { struct xe_exec_queue_group *group; struct list_head link; enum xe_multi_queue_priority priority; u8 pos; u8 valid:1; u8 is_primary:1; } multi_queue; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; void *replay_state; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; struct xe_lrc *lrc[] ; };}hj sbah}(h]h ]h"]h$]h&]hhuh1j' hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKNhj ubh)}(h **Members**h]j)}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj)}(hhh](j)}(hC``xef`` Back pointer to xe file if this is user created exec queue h](j)}(h``xef``h]j)}(hj h]hxef}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKOhj ubj)}(hhh]h)}(h:Back pointer to xe file if this is user created exec queueh]h:Back pointer to xe file if this is user created exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKOhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKOhj ubj)}(h2``gt`` GT structure this exec queue can submit to h](j)}(h``gt``h]j)}(hj h]hgt}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKRhj ubj)}(hhh]h)}(h*GT structure this exec queue can submit toh]h*GT structure this exec queue can submit to}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj- hKRhj. ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj- hKRhj ubj)}(h``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. h](j)}(h``hwe``h]j)}(hjQ h]hhwe}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjO ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKWhjK ubj)}(hhh]h)}(hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.h]hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKUhjg ubah}(h]h ]h"]h$]h&]uh1jhjK ubeh}(h]h ]h"]h$]h&]uh1jhjf hKWhj ubj)}(h*``refcount`` ref count of this exec queue h](j)}(h ``refcount``h]j)}(hj h]hrefcount}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKZhj ubj)}(hhh]h)}(href count of this exec queueh]href count of this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKZhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKZhj ubj)}(h.``vm`` VM (address space) for this exec queue h](j)}(h``vm``h]j)}(hj h]hvm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK\hj ubj)}(hhh]h)}(h&VM (address space) for this exec queueh]h&VM (address space) for this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK\hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK\hj ubj)}(hK``user_vm`` User VM (address space) for this exec queue (bind queues only) h](j)}(h ``user_vm``h]j)}(hj h]huser_vm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK`hj ubj)}(hhh]h)}(h>User VM (address space) for this exec queue (bind queues only)h]h>User VM (address space) for this exec queue (bind queues only)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK_hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK`hj ubj)}(h#``class`` class of this exec queue h](j)}(h ``class``h]j)}(hj7 h]hclass}(hj9 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5 ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKdhj1 ubj)}(hhh]h)}(hclass of this exec queueh]hclass of this exec queue}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjL hKdhjM ubah}(h]h ]h"]h$]h&]uh1jhj1 ubeh}(h]h ]h"]h$]h&]uh1jhjL hKdhj ubj)}(hK``logical_mask`` logical mask of where job submitted to exec queue can run h](j)}(h``logical_mask``h]j)}(hjp h]h logical_mask}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjn ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKghjj ubj)}(hhh]h)}(h9logical mask of where job submitted to exec queue can runh]h9logical mask of where job submitted to exec queue can run}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKghj ubah}(h]h ]h"]h$]h&]uh1jhjj ubeh}(h]h ]h"]h$]h&]uh1jhj hKghj ubj)}(h!``name`` name of this exec queue h](j)}(h``name``h]j)}(hj h]hname}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKjhj ubj)}(hhh]h)}(hname of this exec queueh]hname of this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKjhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKjhj ubj)}(hB``width`` width (number BB submitted per exec) of this exec queue h](j)}(h ``width``h]j)}(hj h]hwidth}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKlhj ubj)}(hhh]h)}(h7width (number BB submitted per exec) of this exec queueh]h7width (number BB submitted per exec) of this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKlhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hKlhj ubj)}(h:``msix_vec`` MSI-X vector (for platforms that support it) h](j)}(h ``msix_vec``h]j)}(hjh]hmsix_vec}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKnhjubj)}(hhh]h)}(h,MSI-X vector (for platforms that support it)h]h,MSI-X vector (for platforms that support it)}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKnhj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj0hKnhj ubj)}(h6``fence_irq`` fence IRQ used to signal job completion h](j)}(h ``fence_irq``h]j)}(hjTh]h fence_irq}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKphjNubj)}(hhh]h)}(h'fence IRQ used to signal job completionh]h'fence IRQ used to signal job completion}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKphjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jhjihKphj ubj)}(hT``last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode h](j)}(h``last_fence``h]j)}(hjh]h last_fence}(hjhhhNhNubah}(h]h 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ubj)}(h<``execlist`` execlist backend specific state for exec queue Ih](j)}(h ``execlist``h]j)}(hjh]hexeclist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h.execlist backend specific state for exec queueh]h.execlist backend specific state for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h2``guc`` GuC backend specific state for exec queue h](j)}(h``guc``h]j)}(hjh]hguc}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h)GuC backend specific state for exec queueh]h)GuC backend specific state for exec queue}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hKhj4ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj3hKhj ubj)}(h(``multi_queue`` Multi queue information h](j)}(h``multi_queue``h]j)}(hjWh]h multi_queue}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjQubj)}(hhh]h)}(hMulti queue informationh]hMulti queue information}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhKhjmubah}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jhjlhKhj ubj)}(h.``multi_queue.group`` Queue group information h](j)}(h``multi_queue.group``h]j)}(hjh]hmulti_queue.group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hQueue group informationh]hQueue group information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h=``multi_queue.link`` Link into group's secondary queues list h](j)}(h``multi_queue.link``h]j)}(hjh]hmulti_queue.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h'Link into group's secondary queues listh]h)Link into group’s secondary queues list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(hE``multi_queue.priority`` Queue priority within the multi-queue group h](j)}(h``multi_queue.priority``h]j)}(hjh]hmulti_queue.priority}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h+Queue priority within the multi-queue grouph]h+Queue priority within the multi-queue group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(hC``multi_queue.pos`` Position of queue within the multi-queue group h](j)}(h``multi_queue.pos``h]j)}(hj;h]hmulti_queue.pos}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj5ubj)}(hhh]h)}(h.Position of queue within the multi-queue grouph]h.Position of queue within the multi-queue group}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhKhjQubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jhjPhKhj ubj)}(h;``multi_queue.valid`` Queue belongs to a multi queue group h](j)}(h``multi_queue.valid``h]j)}(hjth]hmulti_queue.valid}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjnubj)}(hhh]h)}(h$Queue belongs to a multi queue grouph]h$Queue belongs to a multi queue group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h>``multi_queue.is_primary`` Is primary queue (Q0) of the group h](j)}(h``multi_queue.is_primary``h]j)}(hjh]hmulti_queue.is_primary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h"Is primary queue (Q0) of the grouph]h"Is primary queue (Q0) of the group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h&``sched_props`` scheduling properties h](j)}(h``sched_props``h]j)}(hjh]h sched_props}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hscheduling propertiesh]hscheduling properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h?``sched_props.timeslice_us`` timeslice period in micro-seconds h](j)}(h``sched_props.timeslice_us``h]j)}(hjh]hsched_props.timeslice_us}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h!timeslice period in micro-secondsh]h!timeslice period in micro-seconds}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hKhj5ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj4hKhj ubj)}(hG``sched_props.preempt_timeout_us`` preemption timeout in micro-seconds h](j)}(h"``sched_props.preempt_timeout_us``h]j)}(hjXh]hsched_props.preempt_timeout_us}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjVubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjRubj)}(hhh]h)}(h#preemption timeout in micro-secondsh]h#preemption timeout in micro-seconds}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhKhjnubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jhjmhKhj ubj)}(h;``sched_props.job_timeout_ms`` job timeout in milliseconds h](j)}(h``sched_props.job_timeout_ms``h]j)}(hjh]hsched_props.job_timeout_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hjob timeout in millisecondsh]hjob timeout in milliseconds}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h5``sched_props.priority`` priority of this exec queue h](j)}(h``sched_props.priority``h]j)}(hjh]hsched_props.priority}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpriority of this exec queueh]hpriority of this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h%``lr`` long-running exec queue state h](j)}(h``lr``h]j)}(hjh]hlr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hlong-running exec queue stateh]hlong-running exec queue state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h``lr.pfence`` preemption fence h](j)}(h ``lr.pfence``h]j)}(hj<h]h lr.pfence}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj6ubj)}(hhh]h)}(hpreemption fenceh]hpreemption fence}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKhjRubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jhjQhKhj ubj)}(h(``lr.context`` preemption fence context h](j)}(h``lr.context``h]j)}(hjuh]h lr.context}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjoubj)}(hhh]h)}(hpreemption fence contexth]hpreemption fence context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h$``lr.seqno`` preemption fence seqno h](j)}(h ``lr.seqno``h]j)}(hjh]hlr.seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hpreemption fence seqnoh]hpreemption fence seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h/``lr.link`` link into VM's list of exec queues h](j)}(h ``lr.link``h]j)}(hjh]hlr.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h"link into VM's list of exec queuesh]h$link into VM’s list of exec queues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h1``tlb_inval`` TLB invalidations exec queue state h](j)}(h ``tlb_inval``h]j)}(hj h]h tlb_inval}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h"TLB invalidations exec queue stateh]h"TLB invalidations exec queue state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hKhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj5hKhj ubj)}(hF``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler h](j)}(h``tlb_inval.dep_scheduler``h]j)}(hjYh]htlb_inval.dep_scheduler}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjSubj)}(hhh]h)}(h)The TLB invalidation dependency schedulerh]h)The TLB invalidation dependency scheduler}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jhjnhKhj ubj)}(h``pxp`` PXP info tracking h](j)}(h``pxp``h]j)}(hjh]hpxp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hPXP info trackingh]hPXP info tracking}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h1``pxp.type`` PXP session type used by this queue h](j)}(h ``pxp.type``h]j)}(hjh]hpxp.type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#PXP session type used by this queueh]h#PXP session type used by this queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h3``pxp.link`` link into the list of PXP exec queues h](j)}(h ``pxp.link``h]j)}(hjh]hpxp.link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h%link into the list of PXP exec queuesh]h%link into the list of PXP exec queues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h&``ufence_syncobj`` User fence syncobj h](j)}(h``ufence_syncobj``h]j)}(hj>h]hufence_syncobj}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj8ubj)}(hhh]h)}(hUser fence syncobjh]hUser fence syncobj}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShKhjTubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jhjShKhj ubj)}(h4``ufence_timeline_value`` User fence timeline value h](j)}(h``ufence_timeline_value``h]j)}(hjwh]hufence_timeline_value}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjqubj)}(hhh]h)}(hUser fence timeline valueh]hUser fence timeline value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h'``replay_state`` GPU hang replay state h](j)}(h``replay_state``h]j)}(hjh]h replay_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hGPU hang replay stateh]hGPU hang replay state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h1``ops`` submission backend exec queue operations h](j)}(h``ops``h]j)}(hjh]hops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h(submission backend exec queue operationsh]h(submission backend exec queue operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h1``ring_ops`` ring operations for this exec queue h](j)}(h ``ring_ops``h]j)}(hj"h]hring_ops}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h#ring operations for this exec queueh]h#ring operations for this exec queue}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hKhj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj7hKhj ubj)}(hF``entity`` DRM sched entity for this exec queue (1 to 1 relationship) h](j)}(h ``entity``h]j)}(hj[h]hentity}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjUubj)}(hhh]h)}(h:DRM sched entity for this exec queue (1 to 1 relationship)h]h:DRM sched entity for this exec queue (1 to 1 relationship)}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphKhjqubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jhjphKhj ubj)}(h2``job_cnt`` number of drm jobs in this exec queue h](j)}(h ``job_cnt``h]j)}(hjh]hjob_cnt}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(h%number of drm jobs in this exec queueh]h%number of drm jobs in this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(h{``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. h](j)}(h``tlb_flush_seqno``h]j)}(hjh]htlb_flush_seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj)}(hhh]h)}(hfThe seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL.h](h>The seqno of the last rebind tlb flush performed Protected by }(hjhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh’s resv. Unused if }(hjhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh == NULL.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj ubj)}(hK``hw_engine_group_link`` link into exec queues in the same hw engine group h](j)}(h``hw_engine_group_link``h]j)}(hj+h]hhw_engine_group_link}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj%ubj)}(hhh]h)}(h1link into exec queues in the same hw engine grouph]h1link into exec queues in the same hw engine group}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj@hKhj ubj)}(h0``lrc`` logical ring context for this exec queueh](j)}(h``lrc``h]j)}(hjdh]hlrc}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj^ubj)}(hhh]h)}(h(logical ring context for this exec queueh]h(logical ring context for this exec queue}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjzubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jhjyhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjhhubh)}(h]Contains all state necessary for submissions. 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Can either be a user object or a kernel object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKIhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_ops (C struct)c.xe_exec_queue_opshNtauh1jhjhhhNhNubj)}(hhh](j)}(hxe_exec_queue_opsh]j)}(hstruct xe_exec_queue_opsh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKOubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjhhhjhKOubj()}(hxe_exec_queue_opsh]j.)}(hjh]hxe_exec_queue_ops}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjhhhjhKOubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjhhhjhKOubah}(h]jah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjhKOhjhhubjZ)}(hhh]h)}(h(Submission backend exec queue operationsh]h(Submission backend exec queue operations}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj$hhubah}(h]h ]h"]h$]h&]uh1jYhjhhhjhKOubeh}(h]h ](jvstructeh"]h$]h&]j{jvj|j?j}j?j~jjuh1jhhhjhNhNubj)}(hX**Definition**:: struct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); }; **Members** ``init`` Initialize exec queue for submission backend ``kill`` Kill inflight submissions for backend ``fini`` Undoes the init() for submission backend ``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. ``set_priority`` Set priority for exec queue ``set_timeslice`` Set timeslice for exec queue ``set_preempt_timeout`` Set preemption timeout for exec queue ``set_multi_queue_priority`` Set multi queue priority ``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. ``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism. ``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. ``reset_status`` check exec queue reset statush](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubh:}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjCubj( )}(hXstruct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); };h]hXstruct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*set_multi_queue_priority)(struct xe_exec_queue *q, enum xe_multi_queue_priority priority); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); };}hjdsbah}(h]h ]h"]h$]h&]hhuh1j' hm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjCubh)}(h **Members**h]j)}(hjuh]hMembers}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjCubj)}(hhh](j)}(h6``init`` Initialize exec queue for submission backend h](j)}(h``init``h]j)}(hjh]hinit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h,Initialize exec queue for submission backendh]h,Initialize exec queue for submission backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h/``kill`` Kill inflight submissions for backend h](j)}(h``kill``h]j)}(hjh]hkill}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h%Kill inflight submissions for backendh]h%Kill inflight submissions for backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h2``fini`` Undoes the init() for submission backend h](j)}(h``fini``h]j)}(hjh]hfini}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h(Undoes the init() for submission backendh]h(Undoes the init() for submission backend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. h](j)}(h ``destroy``h]j)}(hj?h]hdestroy}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hj9ubj)}(hhh]h)}(hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.h]hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM hjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhjThM hjubj)}(h-``set_priority`` Set priority for exec queue h](j)}(h``set_priority``h]j)}(hjyh]h set_priority}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjsubj)}(hhh]h)}(hSet priority for exec queueh]hSet priority for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h/``set_timeslice`` Set timeslice for exec queue h](j)}(h``set_timeslice``h]j)}(hjh]h set_timeslice}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(hSet timeslice for exec queueh]hSet timeslice for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h>``set_preempt_timeout`` Set preemption timeout for exec queue h](j)}(h``set_preempt_timeout``h]j)}(hjh]hset_preempt_timeout}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(h%Set preemption timeout for exec queueh]h%Set preemption timeout for exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h6``set_multi_queue_priority`` Set multi queue priority h](j)}(h``set_multi_queue_priority``h]j)}(hj$h]hset_multi_queue_priority}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjubj)}(hhh]h)}(hSet multi queue priorityh]hSet multi queue priority}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj9hMhjubj)}(h``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. h](j)}(h ``suspend``h]j)}(hj]h]hsuspend}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjWubj)}(hhh]h)}(hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.h]hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhMhjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jhjrhMhjubj)}(hX``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. 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in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.h]hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM*hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM,hjubj)}(h.``reset_status`` check exec queue reset statush](j)}(h``reset_status``h]j)}(hj h]h reset_status}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM.hjubj)}(hhh]h)}(hcheck exec queue reset statush]hcheck exec queue reset status}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:27: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhM/hj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hM.hjubeh}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_is_multi_queue (C function)c.xe_exec_queue_is_multi_queuehNtauh1jhjhhhNhNubj)}(hhh](j)}(h;bool xe_exec_queue_is_multi_queue (struct xe_exec_queue *q)h]j)}(h:bool xe_exec_queue_is_multi_queue(struct xe_exec_queue *q)h](hdesc_sig_keyword_type)}(hboolh]hbool}(hjghhhNhNubah}(h]h ]ktah"]h$]h&]uh1jehjahhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKGubj)}(h h]h }(hjwhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjahhhjvhKGubj()}(hxe_exec_queue_is_multi_queueh]j.)}(hxe_exec_queue_is_multi_queueh]hxe_exec_queue_is_multi_queue}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjahhhjvhKGubhdesc_parameterlist)}(h(struct xe_exec_queue *q)h]hdesc_parameter)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ]h"]h$]h&] refdomainjvreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}jjsbc.xe_exec_queue_is_multi_queueasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjubhdesc_sig_punctuation)}(h*h]h*}(hjhhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjubj.)}(hqh]hq}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjahhhjvhKGubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj]hhhjvhKGubah}(h]jXah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjvhKGhjZhhubjZ)}(hhh]h)}(h/Whether an exec_queue is part of a queue group.h]h/Whether an exec_queue is part of a queue group.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKGhj5hhubah}(h]h ]h"]h$]h&]uh1jYhjZhhhjvhKGubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|jPj}jPj~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if the exec_queue is part of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKKhjTubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjyh]hstruct xe_exec_queue *q}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKHhjsubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKHhjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jhjhKHhjpubah}(h]h ]h"]h$]h&]uh1jhjTubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKJhjTubh)}(hATrue if the exec_queue is part of a queue group, false otherwise.h]hATrue if the exec_queue is part of a queue group, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKJhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j1xe_exec_queue_is_multi_queue_primary (C function)&c.xe_exec_queue_is_multi_queue_primaryhNtauh1jhjhhhNhNubj)}(hhh](j)}(hCbool xe_exec_queue_is_multi_queue_primary (struct xe_exec_queue *q)h]j)}(hBbool xe_exec_queue_is_multi_queue_primary(struct xe_exec_queue *q)h](jf)}(hjih]hbool}(hjhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKRubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjhhhjhKRubj()}(h$xe_exec_queue_is_multi_queue_primaryh]j.)}(h$xe_exec_queue_is_multi_queue_primaryh]h$xe_exec_queue_is_multi_queue_primary}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjhhhjhKRubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj)}(h h]h }(hjBhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj1ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hjShhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjPubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjUmodnameN classnameNjj)}j]j)}jjsb&c.xe_exec_queue_is_multi_queue_primaryasbuh1hhj1ubj)}(h h]h }(hjshhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj1ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj1ubj.)}(hjh]hq}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj1ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj-ubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhKRubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjhhhjhKRubah}(h]jah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjhKRhjhhubjZ)}(hhh]h)}(h>Whether an exec_queue is primary queue of a multi queue group.h]h>Whether an exec_queue is primary queue of a multi queue group.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKRhjhhubah}(h]h ]h"]h$]h&]uh1jYhjhhhjhKRubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|jj}jj~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if **q** is primary queue of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjh]hstruct xe_exec_queue *q}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKThjubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKThjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hKThjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hj3h]hReturn}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubh)}(hATrue if **q** is primary queue of a queue group, false otherwise.h](hTrue if }(hjIhhhNhNubj)}(h**q**h]hq}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjIubh4 is primary queue of a queue group, false otherwise.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKVhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_is_multi_queue_secondary (C function)(c.xe_exec_queue_is_multi_queue_secondaryhNtauh1jhjhhhNhNubj)}(hhh](j)}(hEbool xe_exec_queue_is_multi_queue_secondary (struct xe_exec_queue *q)h]j)}(hDbool xe_exec_queue_is_multi_queue_secondary(struct xe_exec_queue *q)h](jf)}(hjih]hbool}(hjhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK^ubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjhhhjhK^ubj()}(h&xe_exec_queue_is_multi_queue_secondaryh]j.)}(h&xe_exec_queue_is_multi_queue_secondaryh]h&xe_exec_queue_is_multi_queue_secondary}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjhhhjhK^ubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb(c.xe_exec_queue_is_multi_queue_secondaryasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjubj.)}(hjh]hq}(hjhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhK^ubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjhhhjhK^ubah}(h]j}ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjhK^hjhhubjZ)}(hhh]h)}(h@Whether an exec_queue is secondary queue of a multi queue group.h]h@Whether an exec_queue is secondary queue of a multi queue group.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK^hjEhhubah}(h]h ]h"]h$]h&]uh1jYhjhhhjhK^ubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j`j}j`j~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if **q** is secondary queue of a queue group, false otherwise.h](h)}(h**Parameters**h]j)}(hjjh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhjdubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjh]hstruct xe_exec_queue *q}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhK`hjubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK`hjubah}(h]h ]h"]h$]h&]uh1jhjdubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhjdubh)}(hCTrue if **q** is secondary queue of a queue group, false otherwise.h](hTrue if }(hjhhhNhNubj)}(h**q**h]hq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh6 is secondary queue of a queue group, false otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKbhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j.xe_exec_queue_multi_queue_primary (C function)#c.xe_exec_queue_multi_queue_primaryhNtauh1jhjhhhNhNubj)}(hhh](j)}(hRstruct xe_exec_queue * xe_exec_queue_multi_queue_primary (struct xe_exec_queue *q)h]j)}(hPstruct xe_exec_queue *xe_exec_queue_multi_queue_primary(struct xe_exec_queue *q)h](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKjubj)}(h h]h }(hj) hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj hhhj( hKjubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj: hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj7 ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj< modnameN classnameNjj)}j]j)}j!xe_exec_queue_multi_queue_primarysb#c.xe_exec_queue_multi_queue_primaryasbuh1hhj hhhj( hKjubj)}(h h]h }(hj[ hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj hhhj( hKjubj)}(hjh]h*}(hji hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj hhhj( hKjubj()}(h!xe_exec_queue_multi_queue_primaryh]j.)}(hjX h]h!xe_exec_queue_multi_queue_primary}(hjz hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjv ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj hhhj( hKjubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj modnameN classnameNjj)}j]jV #c.xe_exec_queue_multi_queue_primaryasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj ubj.)}(hjh]hq}(hj hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj( hKjubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj hhhj( hKjubah}(h]j ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj( hKjhj hhubjZ)}(hhh]h)}(h%Get multi queue group's primary queueh]h'Get multi queue group’s primary queue}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKjhj!hhubah}(h]h ]h"]h$]h&]uh1jYhj hhhj( hKjubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j-!j}j-!j~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Description** If **q** belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, **q** will be returned.h](h)}(h**Parameters**h]j)}(hj7!h]h Parameters}(hj9!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKnhj1!ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjV!h]hstruct xe_exec_queue *q}(hjX!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjT!ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKkhjP!ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjo!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjk!hKkhjl!ubah}(h]h ]h"]h$]h&]uh1jhjP!ubeh}(h]h ]h"]h$]h&]uh1jhjk!hKkhjM!ubah}(h]h ]h"]h$]h&]uh1jhj1!ubh)}(h**Description**h]j)}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKmhj1!ubh)}(hIf **q** belongs to a multi queue group, then the primary queue of the group will be returned. Otherwise, **q** will be returned.h](hIf }(hj!hhhNhNubj)}(h**q**h]hq}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubhb belongs to a multi queue group, then the primary queue of the group will be returned. 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Parallel queues cannot skip this step due to limitations in the submission backend.h]hIf an exec queue is not parallel and is idle, the suspend steps can be skipped in the submission backend immediatley signaling the suspend fence. Parallel queues cannot skip this step due to limitations in the submission backend.}(hjJ#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj"ubh)}(h **Return**h]j)}(hj[#h]hReturn}(hj]#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjY#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj"ubh)}(hFTrue if exec queue is idle and can skip suspend steps, False otherwiseh]hFTrue if exec queue is idle and can skip suspend steps, False otherwise}(hjq#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:30: ./drivers/gpu/drm/xe/xe_exec_queue.hhKhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j&xe_exec_queue_create_bind (C function)c.xe_exec_queue_create_bindhNtauh1jhjhhhNhNubj)}(hhh](j)}(hstruct xe_exec_queue * xe_exec_queue_create_bind (struct xe_device *xe, struct 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xe_tile *tile, struct xe_vm *user_vm, u32 flags, u64 extensions)h](j)}(hstruct xe_device *xeh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj'$hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj$ubh)}(hhh]j.)}(h xe_deviceh]h xe_device}(hj8$hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj5$ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj:$modnameN classnameNjj)}j]j#c.xe_exec_queue_create_bindasbuh1hhj$ubj)}(h h]h }(hjV$hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj$ubj)}(hjh]h*}(hjd$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj$ubj.)}(hxeh]hxe}(hjq$hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj$ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj$ubj)}(hstruct xe_tile *tileh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj$ubh)}(hhh]j.)}(hxe_tileh]hxe_tile}(hj$hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj$ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj$modnameN classnameNjj)}j]j#c.xe_exec_queue_create_bindasbuh1hhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h 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]j#ah"]h$]h&]uh1jhjf%ubj.)}(hflagsh]hflags}(hj%hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjf%ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj$ubj)}(hu64 extensionsh](h)}(hhh]j.)}(hu64h]hu64}(hj%hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj%ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj%modnameN classnameNjj)}j]j#c.xe_exec_queue_create_bindasbuh1hhj%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj%ubj.)}(h extensionsh]h extensions}(hj%hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj%ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj$ubeh}(h]h ]h"]h$]h&]hhuh1jhj#hhhj#hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj#hhhj#hMubah}(h]j#ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj#hMhj#hhubjZ)}(hhh]h)}(hCreate bind exec queue.h]hCreate bind exec queue.}(hj &hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj&hhubah}(h]h ]h"]h$]h&]uh1jYhj#hhhj#hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j#&j}j#&j~jjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` Xe device. ``struct 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Bind exec queue is tied to migration VM for access to physical memory required for page table programming. On a faulting devices the reserved copy engine instance must be used to avoid deadlocking (user binds cannot get stuck behind faults as kernel binds which resolve faults depend on user binds). On non-faulting devices any copy engine can be used.h]hXNormalize bind exec queue creation. Bind exec queue is tied to migration VM for access to physical memory required for page table programming. On a faulting devices the reserved copy engine instance must be used to avoid deadlocking (user binds cannot get stuck behind faults as kernel binds which resolve faults depend on user binds). On non-faulting devices any copy engine can be used.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj'&ubh)}(h1Returns exec queue on success, ERR_PTR on failureh]h1Returns exec queue on success, ERR_PTR on failure}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj'&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jxe_exec_queue_lrc (C function)c.xe_exec_queue_lrchNtauh1jhjhhhNhNubj)}(hhh](j)}(h;struct xe_lrc * xe_exec_queue_lrc (struct xe_exec_queue *q)h]j)}(h9struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q)h](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hj'hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj'hhhj'hMubh)}(hhh]j.)}(hxe_lrch]hxe_lrc}(hj'hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj'ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj'modnameN classnameNjj)}j]j)}jxe_exec_queue_lrcsbc.xe_exec_queue_lrcasbuh1hhj'hhhj'hMubj)}(h h]h }(hj'hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj'hhhj'hMubj)}(hjh]h*}(hj (hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj'hhhj'hMubj()}(hxe_exec_queue_lrch]j.)}(hj'h]hxe_exec_queue_lrc}(hj(hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj(ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj'hhhj'hMubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj9(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5(ubj)}(h h]h }(hjF(hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj5(ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hjW(hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjT(ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjY(modnameN classnameNjj)}j]j'c.xe_exec_queue_lrcasbuh1hhj5(ubj)}(h h]h }(hju(hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj5(ubj)}(hjh]h*}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj5(ubj.)}(hjh]hq}(hj(hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj5(ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj1(ubah}(h]h ]h"]h$]h&]hhuh1jhj'hhhj'hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj'hhhj'hMubah}(h]j'ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj'hMhj'hhubjZ)}(hhh]h)}(hGet the LRC from exec queue.h]hGet the LRC from exec queue.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj(hhubah}(h]h ]h"]h$]h&]uh1jYhj'hhhj'hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j(j}j(j~jjuh1jhhhjhNhNubj)}(hX$**Parameters** ``struct xe_exec_queue *q`` The exec_queue. **Description** Retrieves the primary LRC for the exec queue. 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Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured.h]hRetrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured.}(hjK)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj(ubh)}(h **Return**h]j)}(hj\)h]hReturn}(hj^)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZ)ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM hj(ubh)}(h+Pointer to LRC on success, error on failureh]h+Pointer to LRC on success, error on failure}(hjr)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM hj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j xe_exec_queue_is_lr (C function)c.xe_exec_queue_is_lrhNtauh1jhjhhhNhNubj)}(hhh](j)}(h2bool xe_exec_queue_is_lr (struct xe_exec_queue *q)h]j)}(h1bool xe_exec_queue_is_lr(struct xe_exec_queue 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]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj{*ubh)}(h **Return**h]j)}(hj*h]hReturn}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj{*ubh)}(h8True if the exec_queue is long-running, false otherwise.h]h8True if the exec_queue is long-running, false otherwise.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj{*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"xe_exec_queue_is_idle (C function)c.xe_exec_queue_is_idlehNtauh1jhjhhhNhNubj)}(hhh](j)}(h4bool xe_exec_queue_is_idle (struct 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Typically vm->resv, but user-created timeline locks use the migrate vm and never grabs the migrate vm->resv so we have a race there. **Return** True if the exec_queue is idle, false otherwise.h](h)}(h**Parameters**h]j)}(hj,h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM%hj+ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj,h]hstruct xe_exec_queue *q}(hj!,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM"hj,ubj)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj8,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4,hM"hj5,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj4,hM"hj,ubah}(h]h ]h"]h$]h&]uh1jhj+ubh)}(h**Description**h]j)}(hjZ,h]h Description}(hj\,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjX,ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM$hj+ubh)}(hXFIXME: Need to determine what to use as the short-lived timeline lock for the exec_queues, so that the return value of this function becomes more than just an advisory snapshot in time. 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Typically vm->resv, but user-created timeline locks use the migrate vm and never grabs the migrate vm->resv so we have a race there.}(hjp,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM#hj+ubh)}(h **Return**h]j)}(hj,h]hReturn}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM+hj+ubh)}(h0True if the exec_queue is idle, false otherwise.h]h0True if the exec_queue is idle, false otherwise.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM,hj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j+xe_exec_queue_update_run_ticks (C function) c.xe_exec_queue_update_run_tickshNtauh1jhjhhhNhNubj)}(hhh](j)}(h=void xe_exec_queue_update_run_ticks (struct xe_exec_queue *q)h]j)}(h.hhhjT.hMiubah}(h]j9.ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjT.hMihj;.hhubjZ)}(hhh]h)}(h1permanently stop all execution from an exec queueh]h1permanently stop all execution from an exec queue}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMihj/hhubah}(h]h ]h"]h$]h&]uh1jYhj;.hhhjT.hMiubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j/j}j/j~jjuh1jhhhjhNhNubj)}(hXS**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** This function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.h](h)}(h**Parameters**h]j)}(hj'/h]h Parameters}(hj)/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%/ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMmhj!/ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjF/h]hstruct xe_exec_queue *q}(hjH/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjD/ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMjhj@/ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj_/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[/hMjhj\/ubah}(h]h ]h"]h$]h&]uh1jhj@/ubeh}(h]h ]h"]h$]h&]uh1jhj[/hMjhj=/ubah}(h]h ]h"]h$]h&]uh1jhj!/ubh)}(h**Description**h]j)}(hj/h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMlhj!/ubh)}(hXThis function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.h]hXThis function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMkhj!/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_last_fence_put (C function)c.xe_exec_queue_last_fence_puthNtauh1jhjhhhNhNubj)}(hhh](j)}(hMvoid xe_exec_queue_last_fence_put (struct xe_exec_queue *q, struct xe_vm *vm)h]j)}(hLvoid xe_exec_queue_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm)h](jf)}(hvoidh]hvoid}(hj/hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehj/hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hj/hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj/hhhj/hMubj()}(hxe_exec_queue_last_fence_puth]j.)}(hxe_exec_queue_last_fence_puth]hxe_exec_queue_last_fence_put}(hj/hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj/ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj/hhhj/hMubj)}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj/ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj!0hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj0ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj#0modnameN classnameNjj)}j]j)}jj/sbc.xe_exec_queue_last_fence_putasbuh1hhj/ubj)}(h h]h }(hjA0hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj/ubj)}(hjh]h*}(hjO0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj/ubj.)}(hjh]hq}(hj\0hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj/ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj/ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjt0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjp0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjp0ubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hj0hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj0ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj0modnameN classnameNjj)}j]j=0c.xe_exec_queue_last_fence_putasbuh1hhjp0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjp0ubj)}(hjh]h*}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjp0ubj.)}(hvmh]hvm}(hj0hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjp0ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj/ubeh}(h]h ]h"]h$]h&]hhuh1jhj/hhhj/hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj/hhhj/hMubah}(h]j/ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj/hMhj/hhubjZ)}(hhh]h)}(hDrop ref to last fenceh]hDrop ref to last fence}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj0hhubah}(h]h ]h"]h$]h&]uh1jYhj/hhhj/hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j 1j}j 1j~jjuh1jhhhjhNhNubj)}(h~**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec forh](h)}(h**Parameters**h]j)}(hj1h]h Parameters}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj1ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj61h]hstruct xe_exec_queue *q}(hj81hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj41ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj01ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjO1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjK1hMhjL1ubah}(h]h ]h"]h$]h&]uh1jhj01ubeh}(h]h ]h"]h$]h&]uh1jhjK1hMhj-1ubj)}(h>``struct xe_vm *vm`` The VM the engine does a bind or exec forh](j)}(h``struct xe_vm *vm``h]j)}(hjo1h]hstruct xe_vm *vm}(hjq1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjm1ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhji1ubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj1ubah}(h]h ]h"]h$]h&]uh1jhji1ubeh}(h]h ]h"]h$]h&]uh1jhj1hMhj-1ubeh}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j2xe_exec_queue_last_fence_put_unlocked (C function)'c.xe_exec_queue_last_fence_put_unlockedhNtauh1jhjhhhNhNubj)}(hhh](j)}(hDvoid xe_exec_queue_last_fence_put_unlocked (struct xe_exec_queue *q)h]j)}(hCvoid xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue *q)h](jf)}(hvoidh]hvoid}(hj1hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehj1hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hj1hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj1hhhj1hMubj()}(h%xe_exec_queue_last_fence_put_unlockedh]j.)}(h%xe_exec_queue_last_fence_put_unlockedh]h%xe_exec_queue_last_fence_put_unlocked}(hj1hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj1ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj1hhhj1hMubj)}(h(struct xe_exec_queue *q)h]j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj2ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj$2hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj!2ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj&2modnameN classnameNjj)}j]j)}jj1sb'c.xe_exec_queue_last_fence_put_unlockedasbuh1hhj2ubj)}(h h]h }(hjD2hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj2ubj)}(hjh]h*}(hjR2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj2ubj.)}(hjh]hq}(hj_2hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj2ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj1ubah}(h]h ]h"]h$]h&]hhuh1jhj1hhhj1hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj1hhhj1hMubah}(h]j1ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj1hMhj1hhubjZ)}(hhh]h)}(hDrop ref to last fence unlockedh]hDrop ref to last fence unlocked}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj2hhubah}(h]h ]h"]h$]h&]uh1jYhj1hhhj1hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j2j}j2j~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** Only safe to be called from xe_exec_queue_destroy().h](h)}(h**Parameters**h]j)}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj2ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj2h]hstruct xe_exec_queue *q}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj2ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj2ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj2hMhj2ubah}(h]h ]h"]h$]h&]uh1jhj2ubh)}(h**Description**h]j)}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj2ubh)}(h4Only safe to be called from xe_exec_queue_destroy().h]h4Only safe to be called from xe_exec_queue_destroy().}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_last_fence_get (C function)c.xe_exec_queue_last_fence_gethNtauh1jhjhhhNhNubj)}(hhh](j)}(h[struct dma_fence * xe_exec_queue_last_fence_get (struct xe_exec_queue *q, struct xe_vm *vm)h]j)}(hYstruct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hjh]hstruct}(hjI3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE3hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hjW3hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjE3hhhjV3hMubh)}(hhh]j.)}(h dma_fenceh]h dma_fence}(hjh3hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hje3ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjj3modnameN classnameNjj)}j]j)}jxe_exec_queue_last_fence_getsbc.xe_exec_queue_last_fence_getasbuh1hhjE3hhhjV3hMubj)}(h h]h }(hj3hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjE3hhhjV3hMubj)}(hjh]h*}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjE3hhhjV3hMubj()}(hxe_exec_queue_last_fence_geth]j.)}(hj3h]hxe_exec_queue_last_fence_get}(hj3hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj3ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjE3hhhjV3hMubj)}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj3ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj3hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj3ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj3modnameN classnameNjj)}j]j3c.xe_exec_queue_last_fence_getasbuh1hhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj3ubj)}(hjh]h*}(hj 4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj3ubj.)}(hjh]hq}(hj4hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj3ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj3ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj24hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.4ubj)}(h h]h }(hj?4hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj.4ubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hjP4hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjM4ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjR4modnameN classnameNjj)}j]j3c.xe_exec_queue_last_fence_getasbuh1hhj.4ubj)}(h h]h }(hjn4hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj.4ubj)}(hjh]h*}(hj|4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj.4ubj.)}(hvmh]hvm}(hj4hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj.4ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj3ubeh}(h]h ]h"]h$]h&]hhuh1jhjE3hhhjV3hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjA3hhhjV3hMubah}(h]j<3ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjV3hMhj>3hhubjZ)}(hhh]h)}(hGet last fenceh]hGet last fence}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4hhubah}(h]h ]h"]h$]h&]uh1jYhj>3hhhjV3hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j4j}j4j~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj4h]hstruct xe_exec_queue *q}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj 5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 5hMhj 5ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhj 5hMhj4ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hj-5h]hstruct xe_vm *vm}(hj/5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+5ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj'5ubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hjF5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjB5hMhjC5ubah}(h]h ]h"]h$]h&]uh1jhj'5ubeh}(h]h ]h"]h$]h&]uh1jhjB5hMhj4ubeh}(h]h ]h"]h$]h&]uh1jhj4ubh)}(h**Description**h]j)}(hjh5h]h Description}(hjj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjf5ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4ubh)}(hGet last fence, takes a refh]hGet last fence, takes a ref}(hj~5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4ubh)}(h **Return**h]j)}(hj5h]hReturn}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4ubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j4xe_exec_queue_last_fence_get_for_resume (C function))c.xe_exec_queue_last_fence_get_for_resumehNtauh1jhjhhhNhNubj)}(hhh](j)}(hfstruct dma_fence * xe_exec_queue_last_fence_get_for_resume (struct xe_exec_queue *q, struct xe_vm *vm)h]j)}(hdstruct dma_fence *xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hj5hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj5hhhj5hMubh)}(hhh]j.)}(h dma_fenceh]h dma_fence}(hj5hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj5ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj5modnameN classnameNjj)}j]j)}j'xe_exec_queue_last_fence_get_for_resumesb)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhj5hhhj5hMubj)}(h h]h }(hj6hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj5hhhj5hMubj)}(hjh]h*}(hj"6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj5hhhj5hMubj()}(h'xe_exec_queue_last_fence_get_for_resumeh]j.)}(hj6h]h'xe_exec_queue_last_fence_get_for_resume}(hj36hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj/6ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj5hhhj5hMubj)}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjN6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ6ubj)}(h h]h }(hj[6hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjJ6ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hjl6hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hji6ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjn6modnameN classnameNjj)}j]j6)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjJ6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjJ6ubj)}(hjh]h*}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjJ6ubj.)}(hjh]hq}(hj6hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjJ6ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjF6ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj6ubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hj6hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj6ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj6modnameN classnameNjj)}j]j6)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj6ubj)}(hjh]h*}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj6ubj.)}(hvmh]hvm}(hj7hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj6ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjF6ubeh}(h]h ]h"]h$]h&]hhuh1jhj5hhhj5hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj5hhhj5hMubah}(h]j5ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj5hMhj5hhubjZ)}(hhh]h)}(hGet last fenceh]hGet last fence}(hj>7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj;7hhubah}(h]h ]h"]h$]h&]uh1jYhj5hhhj5hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|jV7j}jV7j~jjuh1jhhhjhNhNubj)}(hXt**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held. **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hj`7h]h Parameters}(hjb7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj^7ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjZ7ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj7h]hstruct xe_exec_queue *q}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj}7ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjy7ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1jhjy7ubeh}(h]h ]h"]h$]h&]uh1jhj7hMhjv7ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hj7h]hstruct xe_vm *vm}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj7ubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jhj7hMhjv7ubeh}(h]h ]h"]h$]h&]uh1jhjZ7ubh)}(h**Description**h]j)}(hj7h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjZ7ubh)}(hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held.h]hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group’s long-running exec queue, when the group semaphore is held.}(hj 8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjZ7ubh)}(h **Return**h]j)}(hj8h]hReturn}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjZ7ubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hj08hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjZ7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_exec_queue_last_fence_set (C function)c.xe_exec_queue_last_fence_sethNtauh1jhjhhhNhNubj)}(hhh](j)}(hfvoid xe_exec_queue_last_fence_set (struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h]j)}(hevoid xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h](jf)}(hvoidh]hvoid}(hj_8hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehj[8hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hjn8hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj[8hhhjm8hMubj()}(hxe_exec_queue_last_fence_seth]j.)}(hxe_exec_queue_last_fence_seth]hxe_exec_queue_last_fence_set}(hj8hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj|8ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj[8hhhjm8hMubj)}(hD(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj8ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj8hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj8ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj8modnameN classnameNjj)}j]j)}jj8sbc.xe_exec_queue_last_fence_setasbuh1hhj8ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj8ubj)}(hjh]h*}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj8ubj.)}(hjh]hq}(hj8hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj8ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj8ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj 9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj 9ubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hj+9hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj(9ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj-9modnameN classnameNjj)}j]j8c.xe_exec_queue_last_fence_setasbuh1hhj 9ubj)}(h h]h }(hjI9hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj 9ubj)}(hjh]h*}(hjW9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj 9ubj.)}(hvmh]hvm}(hjd9hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj 9ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj8ubj)}(hstruct dma_fence *fenceh](j)}(hjh]hstruct}(hj}9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjy9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjy9ubh)}(hhh]j.)}(h dma_fenceh]h dma_fence}(hj9hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj9ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj9modnameN classnameNjj)}j]j8c.xe_exec_queue_last_fence_setasbuh1hhjy9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjy9ubj)}(hjh]h*}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjy9ubj.)}(hfenceh]hfence}(hj9hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjy9ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj8ubeh}(h]h ]h"]h$]h&]hhuh1jhj[8hhhjm8hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjW8hhhjm8hMubah}(h]jR8ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjm8hMhjT8hhubjZ)}(hhh]h)}(hSet last fenceh]hSet last fence}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj9hhubah}(h]h ]h"]h$]h&]uh1jYhjT8hhhjm8hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j:j}j:j~jjuh1jhhhjhNhNubj)}(hXD**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for ``struct dma_fence *fence`` The fence **Description** Set the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h](h)}(h**Parameters**h]j)}(hj :h]h Parameters}(hj":hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj?:h]hstruct xe_exec_queue *q}(hjA:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=:ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj9:ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjX:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT:hMhjU:ubah}(h]h ]h"]h$]h&]uh1jhj9:ubeh}(h]h ]h"]h$]h&]uh1jhjT:hMhj6:ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j)}(h``struct xe_vm *vm``h]j)}(hjx:h]hstruct xe_vm *vm}(hjz:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjv:ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjr:ubj)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1jhjr:ubeh}(h]h ]h"]h$]h&]uh1jhj:hMhj6:ubj)}(h&``struct dma_fence *fence`` The fence h](j)}(h``struct dma_fence *fence``h]j)}(hj:h]hstruct dma_fence *fence}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:ubj)}(hhh]h)}(h The fenceh]h The fence}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jhj:hMhj6:ubeh}(h]h ]h"]h$]h&]uh1jhj:ubh)}(h**Description**h]j)}(hj:h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:ubh)}(hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h]hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_tlb_inval_last_fence_put (C function)(c.xe_exec_queue_tlb_inval_last_fence_puthNtauh1jhjhhhNhNubj)}(hhh](j)}(hjvoid xe_exec_queue_tlb_inval_last_fence_put (struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h]j)}(hivoid xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](jf)}(hvoidh]hvoid}(hj1;hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehj-;hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj)}(h h]h }(hj@;hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj-;hhhj?;hMubj()}(h&xe_exec_queue_tlb_inval_last_fence_puth]j.)}(h&xe_exec_queue_tlb_inval_last_fence_puth]h&xe_exec_queue_tlb_inval_last_fence_put}(hjR;hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjN;ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj-;hhhj?;hMubj)}(h>(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjn;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj;ubj)}(h h]h }(hj{;hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjj;ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj;hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj;ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj;modnameN classnameNjj)}j]j)}jjT;sb(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhjj;ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjj;ubj)}(hjh]h*}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjj;ubj.)}(hjh]hq}(hj;hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjj;ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjf;ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj;ubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hj;hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj;ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj;modnameN classnameNjj)}j]j;(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhj;ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj;ubj)}(hjh]h*}(hj)<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj;ubj.)}(hvmh]hvm}(hj6<hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj;ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjf;ubj)}(hunsigned int typeh](jf)}(hunsignedh]hunsigned}(hjO<hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjK<ubj)}(h h]h }(hj]<hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjK<ubjf)}(hinth]hint}(hjk<hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjK<ubj)}(h h]h }(hjy<hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjK<ubj.)}(htypeh]htype}(hj<hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjK<ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjf;ubeh}(h]h ]h"]h$]h&]hhuh1jhj-;hhhj?;hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj);hhhj?;hMubah}(h]j$;ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj?;hMhj&;hhubjZ)}(hhh]h)}(h'Drop ref to last TLB invalidation fenceh]h'Drop ref to last TLB invalidation fence}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<hhubah}(h]h ]h"]h$]h&]uh1jYhj&;hhhj?;hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j<j}j<j~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GTh](h)}(h**Parameters**h]j)}(hj<h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj<h]hstruct xe_exec_queue *q}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj<ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj =hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jhj=hMhj<ubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hj+=h]hstruct xe_vm *vm}(hj-=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)=ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj%=ubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hjD=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@=hMhjA=ubah}(h]h ]h"]h$]h&]uh1jhj%=ubeh}(h]h ]h"]h$]h&]uh1jhj@=hMhj<ubj)}(h0``unsigned int type`` Either primary or media GTh](j)}(h``unsigned int type``h]j)}(hjd=h]hunsigned int type}(hjf=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjb=ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj^=ubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hj}=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjz=ubah}(h]h ]h"]h$]h&]uh1jhj^=ubeh}(h]h ]h"]h$]h&]uh1jhjy=hMhj<ubeh}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj=ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj>hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj>ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj>modnameN classnameNjj)}j]j)}jj=sb1c.xe_exec_queue_tlb_inval_last_fence_put_unlockedasbuh1hhj=ubj)}(h h]h }(hj9>hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj=ubj)}(hjh]h*}(hjG>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj=ubj.)}(hjh]hq}(hjT>hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj=ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj=ubj)}(hunsigned int typeh](jf)}(hunsignedh]hunsigned}(hjl>hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjh>ubj)}(h h]h }(hjz>hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjh>ubjf)}(hinth]hint}(hj>hhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjh>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjh>ubj.)}(htypeh]htype}(hj>hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjh>ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj=ubeh}(h]h ]h"]h$]h&]hhuh1jhj=hhhj=hMubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj=hhhj=hMubah}(h]j=ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj=hMhj=hhubjZ)}(hhh]h)}(h0Drop ref to last TLB invalidation fence unlockedh]h0Drop ref to last TLB invalidation fence unlocked}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj>hhubah}(h]h ]h"]h$]h&]uh1jYhj=hhhj=hMubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|j>j}j>j~jjuh1jhhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``unsigned int type`` Either primary or media GT **Description** Only safe to be called from xe_exec_queue_destroy().h](h)}(h**Parameters**h]j)}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM#hj>ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hj?h]hstruct xe_exec_queue *q}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ?ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM!hj ?ubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj(?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$?hM!hj%?ubah}(h]h ]h"]h$]h&]uh1jhj ?ubeh}(h]h ]h"]h$]h&]uh1jhj$?hM!hj?ubj)}(h1``unsigned int type`` Either primary or media GT h](j)}(h``unsigned int type``h]j)}(hjH?h]hunsigned int type}(hjJ?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjF?ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM"hjB?ubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hja?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]?hM"hj^?ubah}(h]h ]h"]h$]h&]uh1jhjB?ubeh}(h]h ]h"]h$]h&]uh1jhj]?hM"hj?ubeh}(h]h ]h"]h$]h&]uh1jhj>ubh)}(h**Description**h]j)}(hj?h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM$hj>ubh)}(h4Only safe to be called from xe_exec_queue_destroy().h]h4Only safe to be called from xe_exec_queue_destroy().}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM#hj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_tlb_inval_last_fence_get (C function)(c.xe_exec_queue_tlb_inval_last_fence_gethNtauh1jhjhhhNhNubj)}(hhh](j)}(hxstruct dma_fence * xe_exec_queue_tlb_inval_last_fence_get (struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h]j)}(hvstruct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hjh]hstruct}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM1ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj?hhhj?hM1ubh)}(hhh]j.)}(h dma_fenceh]h dma_fence}(hj?hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj?ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj?modnameN classnameNjj)}j]j)}j&xe_exec_queue_tlb_inval_last_fence_getsb(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhj?hhhj?hM1ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj?hhhj?hM1ubj)}(hjh]h*}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj?hhhj?hM1ubj()}(h&xe_exec_queue_tlb_inval_last_fence_geth]j.)}(hj@h]h&xe_exec_queue_tlb_inval_last_fence_get}(hj'@hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj#@ubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hj?hhhj?hM1ubj)}(h>(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjB@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>@ubj)}(h h]h }(hjO@hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj>@ubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj`@hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj]@ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjb@modnameN classnameNjj)}j]j@(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhj>@ubj)}(h h]h }(hj~@hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj>@ubj)}(hjh]h*}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj>@ubj.)}(hjh]hq}(hj@hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj>@ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj:@ubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj@ubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hj@hhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj@ubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj@modnameN classnameNjj)}j]j@(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhj@ubj)}(hjh]h*}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj@ubj.)}(hvmh]hvm}(hjAhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj@ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj:@ubj)}(hunsigned int typeh](jf)}(hunsignedh]hunsigned}(hj!AhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjAubj)}(h h]h }(hj/AhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjAubjf)}(hinth]hint}(hj=AhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjAubj)}(h h]h }(hjKAhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjAubj.)}(htypeh]htype}(hjYAhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjAubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj:@ubeh}(h]h ]h"]h$]h&]hhuh1jhj?hhhj?hM1ubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhj?hhhj?hM1ubah}(h]j?ah ](jQjReh"]h$]h&]jVjW)jXhuh1jhj?hM1hj?hhubjZ)}(hhh]h)}(h#Get last fence for TLB invalidationh]h#Get last fence for TLB invalidation}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM1hjAhhubah}(h]h ]h"]h$]h&]uh1jYhj?hhhj?hM1ubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|jAj}jAj~jjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GT **Description** Get last fence, takes a ref **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hjAh]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM5hjAubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjAh]hstruct xe_exec_queue *q}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM2hjAubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM2hjAubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jhjAhM2hjAubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hjAh]hstruct xe_vm *vm}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM3hjAubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM3hjBubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jhjBhM3hjAubj)}(h1``unsigned int type`` Either primary or media GT h](j)}(h``unsigned int type``h]j)}(hj6Bh]hunsigned int type}(hj8BhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4Bubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM4hj0Bubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hjOBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKBhM4hjLBubah}(h]h ]h"]h$]h&]uh1jhj0Bubeh}(h]h ]h"]h$]h&]uh1jhjKBhM4hjAubeh}(h]h ]h"]h$]h&]uh1jhjAubh)}(h**Description**h]j)}(hjqBh]h Description}(hjsBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjoBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM6hjAubh)}(hGet last fence, takes a refh]hGet last fence, takes a ref}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM5hjAubh)}(h **Return**h]j)}(hjBh]hReturn}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM7hjAubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chM8hjAubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j3xe_exec_queue_tlb_inval_last_fence_set (C function)(c.xe_exec_queue_tlb_inval_last_fence_sethNtauh1jhjhhhNhNubj)}(hhh](j)}(hvoid xe_exec_queue_tlb_inval_last_fence_set (struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h]j)}(hvoid xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h](jf)}(hvoidh]hvoid}(hjBhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjBhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMQubj)}(h h]h }(hjBhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjBhhhjBhMQubj()}(h&xe_exec_queue_tlb_inval_last_fence_seth]j.)}(h&xe_exec_queue_tlb_inval_last_fence_seth]h&xe_exec_queue_tlb_inval_last_fence_set}(hjBhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjBubah}(h]h ](j@jAeh"]h$]h&]hhuh1j'hjBhhhjBhMQubj)}(hW(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h](j)}(hstruct xe_exec_queue *qh](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hj'ChhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjCubh)}(hhh]j.)}(h xe_exec_queueh]h xe_exec_queue}(hj8ChhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hj5Cubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetj:CmodnameN classnameNjj)}j]j)}jjCsb(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhjCubj)}(h h]h }(hjXChhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjCubj)}(hjh]h*}(hjfChhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjCubj.)}(hjh]hq}(hjsChhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjCubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjCubj)}(hstruct xe_vm *vmh](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hjChhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjCubh)}(hhh]j.)}(hxe_vmh]hxe_vm}(hjChhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjCubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjCmodnameN classnameNjj)}j]jTC(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhjCubj)}(h h]h }(hjChhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjCubj)}(hjh]h*}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjCubj.)}(hvmh]hvm}(hjChhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjCubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjCubj)}(hstruct dma_fence *fenceh](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hjDhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjCubh)}(hhh]j.)}(h dma_fenceh]h dma_fence}(hjDhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjDubah}(h]h ]h"]h$]h&] refdomainjvreftypej reftargetjDmodnameN classnameNjj)}j]jTC(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhjCubj)}(h h]h }(hj7DhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjCubj)}(hjh]h*}(hjEDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjCubj.)}(hfenceh]hfence}(hjRDhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjCubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjCubj)}(hunsigned int typeh](jf)}(hunsignedh]hunsigned}(hjkDhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjgDubj)}(h h]h }(hjyDhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjgDubjf)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jrah"]h$]h&]uh1jehjgDubj)}(h h]h }(hjDhhhNhNubah}(h]h ]j#ah"]h$]h&]uh1jhjgDubj.)}(htypeh]htype}(hjDhhhNhNubah}(h]h ]j9ah"]h$]h&]uh1j-hjgDubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjCubeh}(h]h ]h"]h$]h&]hhuh1jhjBhhhjBhMQubeh}(h]h ]h"]h$]h&]hhjKuh1jjLjMhjBhhhjBhMQubah}(h]jBah ](jQjReh"]h$]h&]jVjW)jXhuh1jhjBhMQhjBhhubjZ)}(hhh]h)}(h#Set last fence for TLB invalidationh]h#Set last fence for TLB invalidation}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMQhjDhhubah}(h]h ]h"]h$]h&]uh1jYhjBhhhjBhMQubeh}(h]h ](jvfunctioneh"]h$]h&]j{jvj|jDj}jDj~jjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``struct dma_fence *fence`` The fence ``unsigned int type`` Either primary or media GT **Description** Set the last fence for the tlb invalidation type on the queue. Increases reference count for fence, when closing queue xe_exec_queue_tlb_inval_last_fence_put should be called.h](h)}(h**Parameters**h]j)}(hjDh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMUhjDubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j)}(h``struct xe_exec_queue *q``h]j)}(hjEh]hstruct xe_exec_queue *q}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj Eubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMRhjEubj)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj'EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#EhMRhj$Eubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jhj#EhMRhjEubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j)}(h``struct xe_vm *vm``h]j)}(hjGEh]hstruct xe_vm *vm}(hjIEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEEubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMShjAEubj)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hj`EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\EhMShj]Eubah}(h]h ]h"]h$]h&]uh1jhjAEubeh}(h]h ]h"]h$]h&]uh1jhj\EhMShjEubj)}(h&``struct dma_fence *fence`` The fence h](j)}(h``struct dma_fence *fence``h]j)}(hjEh]hstruct dma_fence *fence}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~Eubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMThjzEubj)}(hhh]h)}(h The fenceh]h The fence}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMThjEubah}(h]h ]h"]h$]h&]uh1jhjzEubeh}(h]h ]h"]h$]h&]uh1jhjEhMThjEubj)}(h1``unsigned int type`` Either primary or media GT h](j)}(h``unsigned int type``h]j)}(hjEh]hunsigned int type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMUhjEubj)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMUhjEubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jhjEhMUhjEubeh}(h]h ]h"]h$]h&]uh1jhjDubh)}(h**Description**h]j)}(hjEh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:33: ./drivers/gpu/drm/xe/xe_exec_queue.chMWhjDubh)}(hSet the last fence for the tlb invalidation type on the queue. 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