sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget(/translations/zh_CN/gpu/xe/xe_exec_queuemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/zh_TW/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/it_IT/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ja_JP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ko_KR/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/sp_SP/gpu/xe/xe_exec_queuemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)h]h*SPDX-License-Identifier: (GPL-2.0+ OR MIT)}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhB/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue.rsthKubhsection)}(hhh](htitle)}(hExecution Queueh]hExecution Queue}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.h]hAn Execution queue is an interface for the HW context of execution. The user creates an execution queue, submits the GPU jobs through those queues and in the end destroys them.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK"hhhhubh)}(hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.h]hnExecution queues can also be created by XeKMD itself for driver internal operations like object migration etc.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK&hhhhubh)}(hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.h]hAn execution queue is associated with a specified HW engine or a group of engines (belonging to the same tile and engine class) and any GPU job submitted on the queue will be run on one of these engines.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK)hhhhubh)}(hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.h]hAn execution queue is tied to an address space (VM). It holds a reference of the associated VM and the underlying Logical Ring Context/s (LRC/s) until the queue is destroyed.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK-hhhhubh)}(hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.h]hThe execution queue sits on top of the submission backend. It opaquely handles the GuC and Execlist backends whichever the platform uses, and the ring operations the different engine classes support.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:7: ./drivers/gpu/drm/xe/xe_exec_queue.chK1hhhhubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singlexe_exec_queue (C struct)c.xe_exec_queuehNtauh1j'hjhhhNhNubhdesc)}(hhh](hdesc_signature)}(h xe_exec_queueh]hdesc_signature_line)}(hstruct xe_exec_queueh](hdesc_sig_keyword)}(hstructh]hstruct}(hjKhhhNhNubah}(h]h ]kah"]h$]h&]uh1jIhjEhhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKubhdesc_sig_space)}(h h]h }(hj]hhhNhNubah}(h]h ]wah"]h$]h&]uh1j[hjEhhhjZhKubh desc_name)}(h xe_exec_queueh]h desc_sig_name)}(hjAh]h xe_exec_queue}(hjthhhNhNubah}(h]h ]nah"]h$]h&]uh1jrhjnubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jlhjEhhhjZhKubeh}(h]h ]h"]h$]h&]hh add_permalinkuh1jCsphinx_line_type declaratorhj?hhhjZhKubah}(h]j6ah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j=hjZhKhj:hhubh desc_content)}(hhh]h)}(hExecution queueh]hExecution queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK$hjhhubah}(h]h ]h"]h$]h&]uh1jhj:hhhjZhKubeh}(h]h ](cstructeh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1j8hhhjhNhNubh container)}(hXu**Definition**:: struct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; struct xe_lrc *lrc[] ; }; **Members** ``xef`` Back pointer to xe file if this is user created exec queue ``gt`` GT structure this exec queue can submit to ``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. ``refcount`` ref count of this exec queue ``vm`` VM (address space) for this exec queue ``class`` class of this exec queue ``logical_mask`` logical mask of where job submitted to exec queue can run ``name`` name of this exec queue ``width`` width (number BB submitted per exec) of this exec queue ``msix_vec`` MSI-X vector (for platforms that support it) ``fence_irq`` fence IRQ used to signal job completion ``last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode ``flags`` flags for this exec queue, should statically setup aside from ban bit ``{unnamed_union}`` anonymous ``multi_gt_list`` list head for VM bind engines if multi-GT ``multi_gt_link`` link for VM bind engines if multi-GT ``{unnamed_union}`` anonymous ``execlist`` execlist backend specific state for exec queue ``guc`` GuC backend specific state for exec queue ``sched_props`` scheduling properties ``lr`` long-running exec queue state ``tlb_inval`` TLB invalidations exec queue state ``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler ``pxp`` PXP info tracking ``ufence_syncobj`` User fence syncobj ``ufence_timeline_value`` User fence timeline value ``ops`` submission backend exec queue operations ``ring_ops`` ring operations for this exec queue ``entity`` DRM sched entity for this exec queue (1 to 1 relationship) ``job_cnt`` number of drm jobs in this exec queue ``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. ``hw_engine_group_link`` link into exec queues in the same hw engine group ``lrc`` logical ring context for this exec queueh](h)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK(hjubh literal_block)}(hXstruct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; struct xe_lrc *lrc[] ; };h]hXstruct xe_exec_queue { struct xe_file *xef; struct xe_gt *gt; struct xe_hw_engine *hwe; struct kref refcount; struct xe_vm *vm; enum xe_engine_class class; u32 logical_mask; char name[MAX_FENCE_NAME_LEN]; u16 width; u16 msix_vec; struct xe_hw_fence_irq *fence_irq; struct dma_fence *last_fence; #define EXEC_QUEUE_FLAG_KERNEL BIT(0); #define EXEC_QUEUE_FLAG_PERMANENT BIT(1); #define EXEC_QUEUE_FLAG_VM BIT(2); #define EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD BIT(3); #define EXEC_QUEUE_FLAG_HIGH_PRIORITY BIT(4); #define EXEC_QUEUE_FLAG_LOW_LATENCY BIT(5); #define EXEC_QUEUE_FLAG_MIGRATE BIT(6); unsigned long flags; union { struct list_head multi_gt_list; struct list_head multi_gt_link; }; union { struct xe_execlist_exec_queue *execlist; struct xe_guc_exec_queue *guc; }; struct { u32 timeslice_us; u32 preempt_timeout_us; u32 job_timeout_ms; enum xe_exec_queue_priority priority; } sched_props; struct { struct dma_fence *pfence; u64 context; u32 seqno; struct list_head link; } lr; #define XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT 0; #define XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT 1; #define XE_EXEC_QUEUE_TLB_INVAL_COUNT (XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT + 1); struct { struct xe_dep_scheduler *dep_scheduler; struct dma_fence *last_fence; } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT]; struct { u8 type; struct list_head link; } pxp; struct drm_syncobj *ufence_syncobj; u64 ufence_timeline_value; const struct xe_exec_queue_ops *ops; const struct xe_ring_ops *ring_ops; struct drm_sched_entity *entity; #define XE_MAX_JOB_COUNT_PER_EXEC_QUEUE 1000; atomic_t job_cnt; u64 tlb_flush_seqno; struct list_head hw_engine_group_link; struct xe_lrc *lrc[] ; };}hjsbah}(h]h ]h"]h$]h&]hhuh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK*hjubh)}(h **Members**h]j)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKjhjubhdefinition_list)}(hhh](hdefinition_list_item)}(hC``xef`` Back pointer to xe file if this is user created exec queue h](hterm)}(h``xef``h]hliteral)}(hj#h]hxef}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj!ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK+hjubh definition)}(hhh]h)}(h:Back pointer to xe file if this is user created exec queueh]h:Back pointer to xe file if this is user created exec queue}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hK+hj=ubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhj:hK+hjubj)}(h2``gt`` GT structure this exec queue can submit to h](j )}(h``gt``h]j&)}(hj`h]hgt}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj^ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK.hjZubj<)}(hhh]h)}(h*GT structure this exec queue can submit toh]h*GT structure this exec queue can submit to}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhK.hjvubah}(h]h ]h"]h$]h&]uh1j;hjZubeh}(h]h ]h"]h$]h&]uh1jhjuhK.hjubj)}(h``hwe`` A hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions. h](j )}(h``hwe``h]j&)}(hjh]hhwe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK3hjubj<)}(hhh]h)}(hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.h]hA hardware of the same class. May (physical engine) or may not (virtual engine) be where jobs actual engine up running. Should never really be used for submissions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK1hjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhK3hjubj)}(h*``refcount`` ref count of this exec queue h](j )}(h ``refcount``h]j&)}(hjh]hrefcount}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK6hjubj<)}(hhh]h)}(href count of this exec queueh]href count of this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK6hjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhK6hjubj)}(h.``vm`` VM (address space) for this exec queue h](j )}(h``vm``h]j&)}(hj h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK8hjubj<)}(hhh]h)}(h&VM (address space) for this exec queueh]h&VM (address space) for this exec queue}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hK8hj"ubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhj!hK8hjubj)}(h#``class`` class of this exec queue h](j )}(h ``class``h]j&)}(hjEh]hclass}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjCubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK:hj?ubj<)}(hhh]h)}(hclass of this exec queueh]hclass of this exec queue}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhK:hj[ubah}(h]h ]h"]h$]h&]uh1j;hj?ubeh}(h]h ]h"]h$]h&]uh1jhjZhK:hjubj)}(hK``logical_mask`` logical mask of where job submitted to exec queue can run h](j )}(h``logical_mask``h]j&)}(hj~h]h logical_mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj|ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK=hjxubj<)}(hhh]h)}(h9logical mask of where job submitted to exec queue can runh]h9logical mask of where job submitted to exec queue can run}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK=hjubah}(h]h ]h"]h$]h&]uh1j;hjxubeh}(h]h ]h"]h$]h&]uh1jhjhK=hjubj)}(h!``name`` name of this exec queue h](j )}(h``name``h]j&)}(hjh]hname}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK@hjubj<)}(hhh]h)}(hname of this exec queueh]hname of this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK@hjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhK@hjubj)}(hB``width`` width (number BB submitted per exec) of this exec queue h](j )}(h ``width``h]j&)}(hjh]hwidth}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKBhjubj<)}(hhh]h)}(h7width (number BB submitted per exec) of this exec queueh]h7width (number BB submitted per exec) of this exec queue}(hj hhhNhNubah}(h]h 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]h"]h$]h&]uh1hhjwhKFhjxubah}(h]h ]h"]h$]h&]uh1j;hj\ubeh}(h]h ]h"]h$]h&]uh1jhjwhKFhjubj)}(hT``last_fence`` last fence for tlb invalidation, protected by vm->lock in write mode h](j )}(h``last_fence``h]j&)}(hjh]h last_fence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj<)}(hhh]h)}(hDlast fence for tlb invalidation, protected by vm->lock in write modeh]hDlast fence for tlb invalidation, protected by vm->lock in write mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hP``flags`` flags for this exec queue, should statically setup aside from ban bit h](j )}(h ``flags``h]j&)}(hjh]hflags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h 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]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj<)}(hhh]h)}(hlong-running exec queue stateh]hlong-running exec queue state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h1``tlb_inval`` TLB invalidations exec queue state h](j )}(h ``tlb_inval``h]j&)}(hjh]h tlb_inval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj<)}(hhh]h)}(h"TLB invalidations exec queue stateh]h"TLB invalidations exec queue state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hF``tlb_inval.dep_scheduler`` The TLB invalidation dependency scheduler h](j )}(h``tlb_inval.dep_scheduler``h]j&)}(hjh]htlb_inval.dep_scheduler}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h 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]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj}ubj<)}(hhh]h)}(hUser fence syncobjh]hUser fence syncobj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j;hj}ubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h4``ufence_timeline_value`` User fence timeline value h](j )}(h``ufence_timeline_value``h]j&)}(hjh]hufence_timeline_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj<)}(hhh]h)}(hUser fence timeline valueh]hUser fence timeline value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h1``ops`` submission backend exec queue operations h](j )}(h``ops``h]j&)}(hjh]hops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: 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./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjaubj<)}(hhh]h)}(h:DRM sched entity for this exec queue (1 to 1 relationship)h]h:DRM sched entity for this exec queue (1 to 1 relationship)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hKhj}ubah}(h]h ]h"]h$]h&]uh1j;hjaubeh}(h]h ]h"]h$]h&]uh1jhj|hKhjubj)}(h2``job_cnt`` number of drm jobs in this exec queue h](j )}(h ``job_cnt``h]j&)}(hjh]hjob_cnt}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj<)}(hhh]h)}(h%number of drm jobs in this exec queueh]h%number of drm jobs in this exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(h{``tlb_flush_seqno`` The seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL. h](j )}(h``tlb_flush_seqno``h]j&)}(hjh]htlb_flush_seqno}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubj<)}(hhh]h)}(hfThe seqno of the last rebind tlb flush performed Protected by **vm**'s resv. Unused if **vm** == NULL.h](h>The seqno of the last rebind tlb flush performed Protected by }(hjhhhNhNubj)}(h**vm**h]hvm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh’s resv. Unused if }(hjhhhNhNubj)}(h**vm**h]hvm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh == NULL.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hK``hw_engine_group_link`` link into exec queues in the same hw engine group h](j )}(h``hw_engine_group_link``h]j&)}(hj7 h]hhw_engine_group_link}(hj9 hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj5 ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj1 ubj<)}(hhh]h)}(h1link into exec queues in the same hw engine grouph]h1link into exec queues in the same hw engine group}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjL hKhjM ubah}(h]h ]h"]h$]h&]uh1j;hj1 ubeh}(h]h ]h"]h$]h&]uh1jhjL hKhjubj)}(h0``lrc`` logical ring context for this exec queueh](j )}(h``lrc``h]j&)}(hjp h]hlrc}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjn ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjj ubj<)}(hhh]h)}(h(logical ring context for this exec queueh]h(logical ring context for this exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubah}(h]h ]h"]h$]h&]uh1j;hjj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjhhubh)}(h]Contains all state necessary for submissions. Can either be a user object or a kernel object.h]h]Contains all state necessary for submissions. Can either be a user object or a kernel object.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK%hjhhubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4xe_exec_queue_ops (C struct)c.xe_exec_queue_opshNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hxe_exec_queue_opsh]jD)}(hstruct xe_exec_queue_opsh](jJ)}(hjMh]hstruct}(hj hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhK+ubj\)}(h h]h }(hj hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj hhhj hK+ubjm)}(hxe_exec_queue_opsh]js)}(hj h]hxe_exec_queue_ops}(hj hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj hhhj hK+ubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj hhhj hK+ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1j=hj hK+hj hhubj)}(hhh]h)}(h(Submission backend exec queue operationsh]h(Submission backend exec queue operations}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj0 hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hK+ubeh}(h]h ](jstructeh"]h$]h&]jjjjK jjK jjjuh1j8hhhjhNhNubj)}(hX&**Definition**:: struct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); }; **Members** ``init`` Initialize exec queue for submission backend ``kill`` Kill inflight submissions for backend ``fini`` Undoes the init() for submission backend ``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. ``set_priority`` Set priority for exec queue ``set_timeslice`` Set timeslice for exec queue ``set_preempt_timeout`` Set preemption timeout for exec queue ``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. ``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism. ``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. ``reset_status`` check exec queue reset statush](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjS ubh:}(hjS hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjO ubj)}(hXxstruct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); };h]hXxstruct xe_exec_queue_ops { int (*init)(struct xe_exec_queue *q); void (*kill)(struct xe_exec_queue *q); void (*fini)(struct xe_exec_queue *q); void (*destroy)(struct xe_exec_queue *q); int (*set_priority)(struct xe_exec_queue *q, enum xe_exec_queue_priority priority); int (*set_timeslice)(struct xe_exec_queue *q, u32 timeslice_us); int (*set_preempt_timeout)(struct xe_exec_queue *q, u32 preempt_timeout_us); int (*suspend)(struct xe_exec_queue *q); int (*suspend_wait)(struct xe_exec_queue *q); void (*resume)(struct xe_exec_queue *q); bool (*reset_status)(struct xe_exec_queue *q); };}hjp sbah}(h]h ]h"]h$]h&]hhuh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjO ubh)}(h **Members**h]j)}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjO ubj)}(hhh](j)}(h6``init`` Initialize exec queue for submission backend h](j )}(h``init``h]j&)}(hj h]hinit}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(h,Initialize exec queue for submission backendh]h,Initialize exec queue for submission backend}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h/``kill`` Kill inflight submissions for backend h](j )}(h``kill``h]j&)}(hj h]hkill}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(h%Kill inflight submissions for backendh]h%Kill inflight submissions for backend}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h2``fini`` Undoes the init() for submission backend h](j )}(h``fini``h]j&)}(hj h]hfini}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(h(Undoes the init() for submission backendh]h(Undoes the init() for submission backend}(hj+ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj' hKhj( ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj' hKhj ubj)}(h``destroy`` Destroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up. h](j )}(h ``destroy``h]j&)}(hjK h]hdestroy}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjI ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjE ubj<)}(hhh]h)}(hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.h]hDestroy exec queue for submission backend. The backend function must call xe_exec_queue_fini() (which will in turn call the fini() backend function) to ensure the queue is properly cleaned up.}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhja ubah}(h]h ]h"]h$]h&]uh1j;hjE ubeh}(h]h ]h"]h$]h&]uh1jhj` hKhj ubj)}(h-``set_priority`` Set priority for exec queue h](j )}(h``set_priority``h]j&)}(hj h]h set_priority}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(hSet priority for exec queueh]hSet priority for exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h/``set_timeslice`` Set timeslice for exec queue h](j )}(h``set_timeslice``h]j&)}(hj h]h set_timeslice}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(hSet timeslice for exec queueh]hSet timeslice for exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h>``set_preempt_timeout`` Set preemption timeout for exec queue h](j )}(h``set_preempt_timeout``h]j&)}(hj h]hset_preempt_timeout}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(h%Set preemption timeout for exec queueh]h%Set preemption timeout for exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h``suspend`` Suspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again. h](j )}(h ``suspend``h]j&)}(hj0 h]hsuspend}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj. ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj* ubj<)}(hhh]h)}(hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.h]hSuspend exec queue from executing, allowed to be called multiple times in a row before resume with the caveat that suspend_wait returns before calling suspend again.}(hjI hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjF ubah}(h]h ]h"]h$]h&]uh1j;hj* ubeh}(h]h ]h"]h$]h&]uh1jhjE hKhj ubj)}(hX``suspend_wait`` Wait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism. h](j )}(h``suspend_wait``h]j&)}(hjj h]h suspend_wait}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjh ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhjd ubj<)}(hhh]h)}(hXWait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism.h]hXWait for an exec queue to suspend executing, should be call after suspend. In dma-fencing path thus must return within a reasonable amount of time. -ETIME return shall indicate an error waiting for suspend resulting in associated VM getting killed. -EAGAIN return indicates the wait should be tried again, if the wait is within a work item, the work item should be requeued as deadlock avoidance mechanism.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubah}(h]h ]h"]h$]h&]uh1j;hjd ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h``resume`` Resume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called. h](j )}(h ``resume``h]j&)}(hj h]hresume}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.h]hResume exec queue execution, exec queue must be in a suspended state and dma fence returned from most recent suspend call must be signalled when this function is called.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubj)}(h.``reset_status`` check exec queue reset statush](j )}(h``reset_status``h]j&)}(hj h]h reset_status}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubj<)}(hhh]h)}(hcheck exec queue reset statush]hcheck exec queue reset status}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:13: ./drivers/gpu/drm/xe/xe_exec_queue_types.hhKhj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hKhj ubeh}(h]h ]h"]h$]h&]uh1jhjO ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4&xe_exec_queue_create_bind (C function)c.xe_exec_queue_create_bindhNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hxstruct xe_exec_queue * xe_exec_queue_create_bind (struct xe_device *xe, struct xe_tile *tile, u32 flags, u64 extensions)h]jD)}(hvstruct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe, struct xe_tile *tile, u32 flags, u64 extensions)h](jJ)}(hjMh]hstruct}(hj8 hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj4 hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMGubj\)}(h h]h }(hjF hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj4 hhhjE hMGubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjW hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjT ubah}(h]h ]h"]h$]h&] refdomainjreftype identifier reftargetjY modnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]jr ASTIdentifier)}jm xe_exec_queue_create_bindsbc.xe_exec_queue_create_bindasbuh1hhj4 hhhjE hMGubj\)}(h h]h }(hj hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj4 hhhjE hMGubhdesc_sig_punctuation)}(h*h]h*}(hj hhhNhNubah}(h]h ]pah"]h$]h&]uh1j hj4 hhhjE hMGubjm)}(hxe_exec_queue_create_bindh]js)}(hj} h]hxe_exec_queue_create_bind}(hj hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj4 hhhjE hMGubhdesc_parameterlist)}(hG(struct xe_device *xe, struct xe_tile *tile, u32 flags, u64 extensions)h](hdesc_parameter)}(hstruct xe_device *xeh](jJ)}(hjMh]hstruct}(hj hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj ubj\)}(h h]h }(hj hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj ubh)}(hhh]js)}(h xe_deviceh]h xe_device}(hj hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj modnameN classnameNjq jt )}jw ]j{ c.xe_exec_queue_create_bindasbuh1hhj ubj\)}(h h]h }(hj hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj ubj )}(hj h]h*}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubjs)}(hxeh]hxe}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(hstruct xe_tile *tileh](jJ)}(hjMh]hstruct}(hj2hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj.ubj\)}(h h]h }(hj?hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj.ubh)}(hhh]js)}(hxe_tileh]hxe_tile}(hjPhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjMubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjRmodnameN classnameNjq jt )}jw ]j{ c.xe_exec_queue_create_bindasbuh1hhj.ubj\)}(h h]h }(hjnhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj.ubj )}(hj h]h*}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubjs)}(htileh]htile}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj.ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(h u32 flagsh](h)}(hhh]js)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]j{ c.xe_exec_queue_create_bindasbuh1hhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubjs)}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj ubj )}(hu64 extensionsh](h)}(hhh]js)}(hu64h]hu64}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]j{ c.xe_exec_queue_create_bindasbuh1hhjubj\)}(h h]h }(hj hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubjs)}(h extensionsh]h extensions}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj ubeh}(h]h ]h"]h$]h&]hhuh1j hj4 hhhjE hMGubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj0 hhhjE hMGubah}(h]j+ ah ](jjeh"]h$]h&]jj)jhuh1j=hjE hMGhj- hhubj)}(hhh]h)}(hCreate bind exec queue.h]hCreate bind exec queue.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMGhj@hhubah}(h]h ]h"]h$]h&]uh1jhj- hhhjE hMGubeh}(h]h ](jfunctioneh"]h$]h&]jjjj[jj[jjjuh1j8hhhjhNhNubj)}(hX**Parameters** ``struct xe_device *xe`` Xe device. ``struct xe_tile *tile`` tile which bind exec queue belongs to. ``u32 flags`` exec queue creation flags ``u64 extensions`` exec queue creation extensions **Description** Normalize bind exec queue creation. Bind exec queue is tied to migration VM for access to physical memory required for page table programming. On a faulting devices the reserved copy engine instance must be used to avoid deadlocking (user binds cannot get stuck behind faults as kernel binds which resolve faults depend on user binds). On non-faulting devices any copy engine can be used. Returns exec queue on success, ERR_PTR on failureh](h)}(h**Parameters**h]j)}(hjeh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMKhj_ubj)}(hhh](j)}(h$``struct xe_device *xe`` Xe device. h](j )}(h``struct xe_device *xe``h]j&)}(hjh]hstruct xe_device *xe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMHhj~ubj<)}(hhh]h)}(h Xe device.h]h Xe device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1j;hj~ubeh}(h]h ]h"]h$]h&]uh1jhjhMHhj{ubj)}(h@``struct xe_tile *tile`` tile which bind exec queue belongs to. h](j )}(h``struct xe_tile *tile``h]j&)}(hjh]hstruct xe_tile *tile}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMIhjubj<)}(hhh]h)}(h&tile which bind exec queue belongs to.h]h&tile which bind exec queue belongs to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMIhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhMIhj{ubj)}(h(``u32 flags`` exec queue creation flags h](j )}(h ``u32 flags``h]j&)}(hjh]h u32 flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMJhjubj<)}(hhh]h)}(hexec queue creation flagsh]hexec queue creation flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMJhj ubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhj hMJhj{ubj)}(h2``u64 extensions`` exec queue creation extensions h](j )}(h``u64 extensions``h]j&)}(hj/h]hu64 extensions}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj-ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMKhj)ubj<)}(hhh]h)}(hexec queue creation extensionsh]hexec queue creation extensions}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMKhjEubah}(h]h ]h"]h$]h&]uh1j;hj)ubeh}(h]h ]h"]h$]h&]uh1jhjDhMKhj{ubeh}(h]h ]h"]h$]h&]uh1jhj_ubh)}(h**Description**h]j)}(hjjh]h Description}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMMhj_ubh)}(hXNormalize bind exec queue creation. Bind exec queue is tied to migration VM for access to physical memory required for page table programming. On a faulting devices the reserved copy engine instance must be used to avoid deadlocking (user binds cannot get stuck behind faults as kernel binds which resolve faults depend on user binds). On non-faulting devices any copy engine can be used.6h]hXNormalize bind exec queue creation. Bind exec queue is tied to migration VM for access to physical memory required for page table programming. On a faulting devices the reserved copy engine instance must be used to avoid deadlocking (user binds cannot get stuck behind faults as kernel binds which resolve faults depend on user binds). On non-faulting devices any copy engine can be used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMLhj_ubh)}(h1Returns exec queue on success, ERR_PTR on failureh]h1Returns exec queue on success, ERR_PTR on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMShj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4xe_exec_queue_lrc (C function)c.xe_exec_queue_lrchNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(h;struct xe_lrc * xe_exec_queue_lrc (struct xe_exec_queue *q)h]jD)}(h9struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q)h](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMaubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhMaubh)}(hhh]js)}(hxe_lrch]hxe_lrc}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]jz )}jm xe_exec_queue_lrcsbc.xe_exec_queue_lrcasbuh1hhjhhhjhMaubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhMaubj )}(hj h]h*}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMaubjm)}(hxe_exec_queue_lrch]js)}(hjh]hxe_exec_queue_lrc}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjhhhjhMaubj )}(h(struct xe_exec_queue *q)h]j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hj8hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj4ubj\)}(h h]h }(hjEhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj4ubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjVhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjSubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjXmodnameN classnameNjq jt )}jw ]jc.xe_exec_queue_lrcasbuh1hhj4ubj\)}(h h]h }(hjthhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj4ubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubjs)}(hqh]hq}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj4ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj0ubah}(h]h ]h"]h$]h&]hhuh1j hjhhhjhMaubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjhhhjhMaubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j=hjhMahjhhubj)}(hhh]h)}(hGet the LRC from exec queue.h]hGet the LRC from exec queue.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMahjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMaubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1j8hhhjhNhNubj)}(hX$**Parameters** ``struct xe_exec_queue *q`` The exec_queue. **Description** Retrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured. **Return** Pointer to LRC on success, error on failureh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMehjubj)}(hhh]j)}(h,``struct xe_exec_queue *q`` The exec_queue. h](j )}(h``struct xe_exec_queue *q``h]j&)}(hjh]hstruct xe_exec_queue *q}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMbhjubj<)}(hhh]h)}(hThe exec_queue.h]hThe exec_queue.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMbhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhMbhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj5h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMdhjubh)}(hRetrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured.h]hRetrieves the primary LRC for the exec queue. Note that this function returns only the first LRC instance, even when multiple parallel LRCs are configured.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMchjubh)}(h **Return**h]j)}(hj\h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMghjubh)}(h+Pointer to LRC on success, error on failureh]h+Pointer to LRC on success, error on failure}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4 xe_exec_queue_is_lr (C function)c.xe_exec_queue_is_lrhNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(h2bool xe_exec_queue_is_lr (struct xe_exec_queue *q)h]jD)}(h1bool xe_exec_queue_is_lr(struct xe_exec_queue *q)h](hdesc_sig_keyword_type)}(hboolh]hbool}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMpubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhMpubjm)}(hxe_exec_queue_is_lrh]js)}(hxe_exec_queue_is_lrh]hxe_exec_queue_is_lr}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjhhhjhMpubj )}(h(struct xe_exec_queue *q)h]j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]jz )}jm jsbc.xe_exec_queue_is_lrasbuh1hhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubj )}(hj h]h*}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubjs)}(hjh]hq}(hj:hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubah}(h]h ]h"]h$]h&]hhuh1j hjhhhjhMpubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjhhhjhMpubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j=hjhMphjhhubj)}(hhh]h)}(h%Whether an exec_queue is long-runningh]h%Whether an exec_queue is long-running}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMphj`hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMpubeh}(h]h ](jfunctioneh"]h$]h&]jjjj{jj{jjjuh1j8hhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Return** True if the exec_queue is long-running, false otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMthjubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hjh]hstruct xe_exec_queue *q}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMqhjubj<)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMqhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhMqhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMshjubh)}(h8True if the exec_queue is long-running, false otherwise.h]h8True if the exec_queue is long-running, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMshjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4"xe_exec_queue_is_idle (C function)c.xe_exec_queue_is_idlehNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(h4bool xe_exec_queue_is_idle (struct xe_exec_queue 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]j~ah"]h$]h&]uh1jrhj\ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjXubah}(h]h ]h"]h$]h&]hhuh1j hj hhhj1hM|ubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjhhhj1hM|ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j=hj1hM|hjhhubj)}(hhh]h)}(hWhether an exec_queue is idle.h]hWhether an exec_queue is idle.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM|hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj1hM|ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1j8hhhjhNhNubj)}(hX$**Parameters** ``struct xe_exec_queue *q`` The exec_queue **Description** FIXME: Need to determine what to use as the short-lived timeline lock for the exec_queues, so that the return value of this function becomes more than just an advisory snapshot in time. The timeline lock must protect the seqno from racing submissions on the same exec_queue. Typically vm->resv, but user-created timeline locks use the migrate vm and never grabs the migrate vm->resv so we have a race there. **Return** True if the exec_queue is idle, false otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec_queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hj#h]hstruct xe_exec_queue *q}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj!ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM}hjubj<)}(hhh]h)}(hThe exec_queueh]hThe exec_queue}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM}hj9ubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhj8hM}hjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj^h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubh)}(hXFIXME: Need to determine what to use as the short-lived timeline lock for the exec_queues, so that the return value of this function becomes more than just an advisory snapshot in time. The timeline lock must protect the seqno from racing submissions on the same exec_queue. Typically vm->resv, but user-created timeline locks use the migrate vm and never grabs the migrate vm->resv so we have a race there.h]hXFIXME: Need to determine what to use as the short-lived timeline lock for the exec_queues, so that the return value of this function becomes more than just an advisory snapshot in time. The timeline lock must protect the seqno from racing submissions on the same exec_queue. Typically vm->resv, but user-created timeline locks use the migrate vm and never grabs the migrate vm->resv so we have a race there.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM~hjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubh)}(h0True if the exec_queue is idle, false otherwise.h]h0True if the exec_queue is idle, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4+xe_exec_queue_update_run_ticks (C function) c.xe_exec_queue_update_run_tickshNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(h=void xe_exec_queue_update_run_ticks (struct xe_exec_queue *q)h]jD)}(h)}(h1void xe_exec_queue_kill (struct xe_exec_queue *q)h]jD)}(h0void xe_exec_queue_kill(struct xe_exec_queue *q)h](j)}(hvoidh]hvoid}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj\)}(h h]h }(hjYhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjFhhhjXhMubjm)}(hxe_exec_queue_killh]js)}(hxe_exec_queue_killh]hxe_exec_queue_kill}(hjkhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjgubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjFhhhjXhMubj )}(h(struct xe_exec_queue *q)h]j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]jz )}jm jmsbc.xe_exec_queue_killasbuh1hhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubjs)}(hjh]hq}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubah}(h]h ]h"]h$]h&]hhuh1j hjFhhhjXhMubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjBhhhjXhMubah}(h]j=ah ](jjeh"]h$]h&]jj)jhuh1j=hjXhMhj?hhubj)}(hhh]h)}(h1permanently stop all execution from an exec queueh]h1permanently stop all execution from an exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj?hhhjXhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj!jj!jjjuh1j8hhhjhNhNubj)}(hXS**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** This function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.h](h)}(h**Parameters**h]j)}(hj+h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj%ubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hjJh]hstruct xe_exec_queue *q}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjHubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjDubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj`ubah}(h]h ]h"]h$]h&]uh1j;hjDubeh}(h]h ]h"]h$]h&]uh1jhj_hMhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj%ubh)}(hXThis function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.h]hXThis function permanently stops all activity on an exec queue. If the queue is actively executing on the HW, it will be kicked off the engine; any pending jobs are discarded and all future submissions are rejected. This function is safe to call multiple times.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4)xe_exec_queue_last_fence_put (C function)c.xe_exec_queue_last_fence_puthNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hMvoid xe_exec_queue_last_fence_put (struct xe_exec_queue *q, struct xe_vm *vm)h]jD)}(hLvoid xe_exec_queue_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhMubjm)}(hxe_exec_queue_last_fence_puth]js)}(hxe_exec_queue_last_fence_puth]hxe_exec_queue_last_fence_put}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjhhhjhMubj )}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hj%hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj'modnameN classnameNjq jt )}jw ]jz )}jm jsbc.xe_exec_queue_last_fence_putasbuh1hhjubj\)}(h h]h }(hjEhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubj )}(hj h]h*}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubjs)}(hjh]hq}(hj`hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hjxhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjtubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjtubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]jAc.xe_exec_queue_last_fence_putasbuh1hhjtubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjtubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubjs)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjtubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubeh}(h]h ]h"]h$]h&]hhuh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j=hjhMhjhhubj)}(hhh]h)}(hDrop ref to last fenceh]hDrop ref to last fence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1j8hhhjhNhNubj)}(h~**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec forh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM hjubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hj:h]hstruct xe_exec_queue *q}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj8ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM hj4ubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM hjPubah}(h]h ]h"]h$]h&]uh1j;hj4ubeh}(h]h ]h"]h$]h&]uh1jhjOhM hj1ubj)}(h>``struct xe_vm *vm`` The VM the engine does a bind or exec forh](j )}(h``struct xe_vm *vm``h]j&)}(hjsh]hstruct xe_vm *vm}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjqubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM hjmubj<)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM hjubah}(h]h ]h"]h$]h&]uh1j;hjmubeh}(h]h ]h"]h$]h&]uh1jhjhM hj1ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j42xe_exec_queue_last_fence_put_unlocked (C function)'c.xe_exec_queue_last_fence_put_unlockedhNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hDvoid xe_exec_queue_last_fence_put_unlocked (struct xe_exec_queue *q)h]jD)}(hCvoid xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue *q)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhMubjm)}(h%xe_exec_queue_last_fence_put_unlockedh]js)}(h%xe_exec_queue_last_fence_put_unlockedh]h%xe_exec_queue_last_fence_put_unlocked}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjhhhjhMubj )}(h(struct xe_exec_queue *q)h]j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hj hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hj(hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj*modnameN classnameNjq jt )}jw ]jz )}jm jsb'c.xe_exec_queue_last_fence_put_unlockedasbuh1hhjubj\)}(h h]h }(hjHhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubj )}(hj h]h*}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubjs)}(hjh]hq}(hjchhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubah}(h]h ]h"]h$]h&]hhuh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j=hjhMhjhhubj)}(hhh]h)}(hDrop ref to last fence unlockedh]hDrop ref to last fence unlocked}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1j8hhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue **Description** Only safe to be called from xe_exec_queue_destroy().h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubj)}(hhh]j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hjh]hstruct xe_exec_queue *q}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j;hjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubh)}(h4Only safe to be called from xe_exec_queue_destroy().h]h4Only safe to be called from xe_exec_queue_destroy().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4)xe_exec_queue_last_fence_get (C function)c.xe_exec_queue_last_fence_gethNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(h[struct dma_fence * xe_exec_queue_last_fence_get (struct xe_exec_queue *q, struct xe_vm *vm)h]jD)}(hYstruct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q, struct xe_vm *vm)h](jJ)}(hjMh]hstruct}(hjMhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjIhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM"ubj\)}(h h]h }(hj[hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjIhhhjZhM"ubh)}(hhh]js)}(h dma_fenceh]h dma_fence}(hjlhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjiubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjnmodnameN classnameNjq jt )}jw ]jz )}jm xe_exec_queue_last_fence_getsbc.xe_exec_queue_last_fence_getasbuh1hhjIhhhjZhM"ubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjIhhhjZhM"ubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjZhM"ubjm)}(hxe_exec_queue_last_fence_geth]js)}(hjh]hxe_exec_queue_last_fence_get}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjIhhhjZhM"ubj )}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]jc.xe_exec_queue_last_fence_getasbuh1hhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubjs)}(hjh]hq}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hj6hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj2ubj\)}(h h]h }(hjChhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj2ubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hjThhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjQubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjVmodnameN classnameNjq jt )}jw ]jc.xe_exec_queue_last_fence_getasbuh1hhj2ubj\)}(h h]h }(hjrhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj2ubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubjs)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj2ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjubeh}(h]h ]h"]h$]h&]hhuh1j hjIhhhjZhM"ubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjEhhhjZhM"ubah}(h]j@ah ](jjeh"]h$]h&]jj)jhuh1j=hjZhM"hjBhhubj)}(hhh]h)}(hGet last fenceh]hGet last fence}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM"hjhhubah}(h]h ]h"]h$]h&]uh1jhjBhhhjZhM"ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1j8hhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref 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./drivers/gpu/drm/xe/xe_exec_queue.chM$hj+ubj<)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhM$hjGubah}(h]h ]h"]h$]h&]uh1j;hj+ubeh}(h]h ]h"]h$]h&]uh1jhjFhM$hjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjlh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM&hjubh)}(hGet last fence, takes a refh]hGet last fence, takes a ref}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM%hjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM'hjubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM(hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j44xe_exec_queue_last_fence_get_for_resume (C function))c.xe_exec_queue_last_fence_get_for_resumehNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hfstruct dma_fence * xe_exec_queue_last_fence_get_for_resume (struct xe_exec_queue *q, struct xe_vm *vm)h]jD)}(hdstruct dma_fence *xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue *q, struct xe_vm *vm)h](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM;ubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhM;ubh)}(hhh]js)}(h dma_fenceh]h dma_fence}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]jz )}jm 'xe_exec_queue_last_fence_get_for_resumesb)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjhhhjhM;ubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjhhhjhM;ubj )}(hj h]h*}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM;ubjm)}(h'xe_exec_queue_last_fence_get_for_resumeh]js)}(hjh]h'xe_exec_queue_last_fence_get_for_resume}(hj7hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj3ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhjhhhjhM;ubj )}(h+(struct xe_exec_queue *q, struct xe_vm *vm)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjRhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjNubj\)}(h h]h }(hj_hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjNubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjphhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjmubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjrmodnameN classnameNjq jt )}jw ]j)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjNubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjNubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubjs)}(hjh]hq}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjNubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjJubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hjhhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hjhhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjmodnameN classnameNjq jt )}jw ]j)c.xe_exec_queue_last_fence_get_for_resumeasbuh1hhjubj\)}(h h]h }(hjhhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjubj )}(hj h]h*}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubjs)}(hvmh]hvm}(hj hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjJubeh}(h]h ]h"]h$]h&]hhuh1j hjhhhjhM;ubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhjhhhjhM;ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j=hjhM;hjhhubj)}(hhh]h)}(hGet last fenceh]hGet last fence}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM;hj? hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM;ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjZ jjZ jjjuh1j8hhhjhNhNubj)}(hXt**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for **Description** Get last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held. **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hjd h]h Parameters}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjb ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM?hj^ ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hj h]hstruct xe_exec_queue *q}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM<hj} ubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM<hj ubah}(h]h ]h"]h$]h&]uh1j;hj} ubeh}(h]h ]h"]h$]h&]uh1jhj hM<hjz ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j )}(h``struct xe_vm *vm``h]j&)}(hj h]hstruct xe_vm *vm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM=hj ubj<)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM=hj ubah}(h]h ]h"]h$]h&]uh1j;hj ubeh}(h]h ]h"]h$]h&]uh1jhj hM=hjz ubeh}(h]h ]h"]h$]h&]uh1jhj^ ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM?hj^ ubh)}(hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group's long-running exec queue, when the group semaphore is held.h]hGet last fence, takes a ref. Only safe to be called in the context of resuming the hw engine group’s long-running exec queue, when the group semaphore is held.}(hj !hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM>hj^ ubh)}(h **Return**h]j)}(hj!h]hReturn}(hj !hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMBhj^ ubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hj4!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMChj^ ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4)xe_exec_queue_last_fence_set (C function)c.xe_exec_queue_last_fence_sethNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hfvoid xe_exec_queue_last_fence_set (struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h]jD)}(hevoid xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h](j)}(hvoidh]hvoid}(hjc!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_!hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMVubj\)}(h h]h }(hjr!hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj_!hhhjq!hMVubjm)}(hxe_exec_queue_last_fence_seth]js)}(hxe_exec_queue_last_fence_seth]hxe_exec_queue_last_fence_set}(hj!hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj!ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj_!hhhjq!hMVubj )}(hD(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hj!hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj!ubj\)}(h h]h }(hj!hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj!ubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hj!hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj!modnameN classnameNjq jt )}jw ]jz )}jm j!sbc.xe_exec_queue_last_fence_setasbuh1hhj!ubj\)}(h h]h }(hj!hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj!ubj )}(hj h]h*}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubjs)}(hjh]hq}(hj!hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj!ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj!ubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hj"hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj "ubj\)}(h h]h }(hj"hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj "ubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hj/"hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj,"ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj1"modnameN classnameNjq jt )}jw ]j!c.xe_exec_queue_last_fence_setasbuh1hhj "ubj\)}(h h]h }(hjM"hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj "ubj )}(hj h]h*}(hj["hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj "ubjs)}(hvmh]hvm}(hjh"hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj "ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj!ubj )}(hstruct dma_fence *fenceh](jJ)}(hjMh]hstruct}(hj"hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj}"ubj\)}(h h]h }(hj"hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj}"ubh)}(hhh]js)}(h dma_fenceh]h dma_fence}(hj"hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj"modnameN classnameNjq jt )}jw ]j!c.xe_exec_queue_last_fence_setasbuh1hhj}"ubj\)}(h h]h }(hj"hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj}"ubj )}(hj h]h*}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}"ubjs)}(hfenceh]hfence}(hj"hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj}"ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj!ubeh}(h]h ]h"]h$]h&]hhuh1j hj_!hhhjq!hMVubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj[!hhhjq!hMVubah}(h]jV!ah ](jjeh"]h$]h&]jj)jhuh1j=hjq!hMVhjX!hhubj)}(hhh]h)}(hSet last fenceh]hSet last fence}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMVhj"hhubah}(h]h ]h"]h$]h&]uh1jhjX!hhhjq!hMVubeh}(h]h ](jfunctioneh"]h$]h&]jjjj#jj#jjjuh1j8hhhjhNhNubj)}(hXD**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind or exec for ``struct dma_fence *fence`` The fence **Description** Set the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h](h)}(h**Parameters**h]j)}(hj$#h]h Parameters}(hj&#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMZhj#ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hjC#h]hstruct xe_exec_queue *q}(hjE#hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjA#ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMWhj=#ubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj\#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjX#hMWhjY#ubah}(h]h ]h"]h$]h&]uh1j;hj=#ubeh}(h]h ]h"]h$]h&]uh1jhjX#hMWhj:#ubj)}(h?``struct xe_vm *vm`` The VM the engine does a bind or exec for h](j )}(h``struct xe_vm *vm``h]j&)}(hj|#h]hstruct xe_vm *vm}(hj~#hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjz#ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMXhjv#ubj<)}(hhh]h)}(h)The VM the engine does a bind or exec forh]h)The VM the engine does a bind or exec for}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMXhj#ubah}(h]h ]h"]h$]h&]uh1j;hjv#ubeh}(h]h ]h"]h$]h&]uh1jhj#hMXhj:#ubj)}(h&``struct dma_fence *fence`` The fence h](j )}(h``struct dma_fence *fence``h]j&)}(hj#h]hstruct dma_fence *fence}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj#ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMYhj#ubj<)}(hhh]h)}(h The fenceh]h The fence}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMYhj#ubah}(h]h ]h"]h$]h&]uh1j;hj#ubeh}(h]h ]h"]h$]h&]uh1jhj#hMYhj:#ubeh}(h]h ]h"]h$]h&]uh1jhj#ubh)}(h**Description**h]j)}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM[hj#ubh)}(hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.h]hSet the last fence for the engine. Increases reference count for fence, when closing engine xe_exec_queue_last_fence_put should be called.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMZhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j43xe_exec_queue_tlb_inval_last_fence_put (C function)(c.xe_exec_queue_tlb_inval_last_fence_puthNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hjvoid xe_exec_queue_tlb_inval_last_fence_put (struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h]jD)}(hivoid xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j)}(hvoidh]hvoid}(hj5$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1$hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMiubj\)}(h h]h }(hjD$hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj1$hhhjC$hMiubjm)}(h&xe_exec_queue_tlb_inval_last_fence_puth]js)}(h&xe_exec_queue_tlb_inval_last_fence_puth]h&xe_exec_queue_tlb_inval_last_fence_put}(hjV$hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjR$ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj1$hhhjC$hMiubj )}(h>(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjr$hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjn$ubj\)}(h h]h }(hj$hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjn$ubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hj$hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj$modnameN classnameNjq jt )}jw ]jz )}jm jX$sb(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhjn$ubj\)}(h h]h }(hj$hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjn$ubj )}(hj h]h*}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn$ubjs)}(hjh]hq}(hj$hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjn$ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjj$ubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hj$hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj$ubj\)}(h h]h }(hj$hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj$ubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hj%hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj%modnameN classnameNjq jt )}jw ]j$(c.xe_exec_queue_tlb_inval_last_fence_putasbuh1hhj$ubj\)}(h h]h }(hj%hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj$ubj )}(hj h]h*}(hj-%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubjs)}(hvmh]hvm}(hj:%hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj$ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjj$ubj )}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hjS%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO%ubj\)}(h h]h }(hja%hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjO%ubj)}(hinth]hint}(hjo%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO%ubj\)}(h h]h }(hj}%hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjO%ubjs)}(htypeh]htype}(hj%hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjO%ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hjj$ubeh}(h]h ]h"]h$]h&]hhuh1j hj1$hhhjC$hMiubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj-$hhhjC$hMiubah}(h]j($ah ](jjeh"]h$]h&]jj)jhuh1j=hjC$hMihj*$hhubj)}(hhh]h)}(h'Drop ref to last TLB invalidation fenceh]h'Drop ref to last TLB invalidation fence}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMihj%hhubah}(h]h ]h"]h$]h&]uh1jhj*$hhhjC$hMiubeh}(h]h ](jfunctioneh"]h$]h&]jjjj%jj%jjjuh1j8hhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GTh](h)}(h**Parameters**h]j)}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMmhj%ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hj%h]hstruct xe_exec_queue *q}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj%ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMjhj%ubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj &hMjhj &ubah}(h]h ]h"]h$]h&]uh1j;hj%ubeh}(h]h ]h"]h$]h&]uh1jhj &hMjhj%ubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j )}(h``struct xe_vm *vm``h]j&)}(hj/&h]hstruct xe_vm *vm}(hj1&hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj-&ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMkhj)&ubj<)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hjH&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjD&hMkhjE&ubah}(h]h ]h"]h$]h&]uh1j;hj)&ubeh}(h]h ]h"]h$]h&]uh1jhjD&hMkhj%ubj)}(h0``unsigned int type`` Either primary or media GTh](j )}(h``unsigned int type``h]j&)}(hjh&h]hunsigned int type}(hjj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjf&ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMmhjb&ubj<)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMlhj~&ubah}(h]h ]h"]h$]h&]uh1j;hjb&ubeh}(h]h ]h"]h$]h&]uh1jhj}&hMmhj%ubeh}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j4)}(havoid xe_exec_queue_tlb_inval_last_fence_put_unlocked (struct xe_exec_queue *q, unsigned int type)h]jD)}(h`void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct xe_exec_queue *q, unsigned int type)h](j)}(hvoidh]hvoid}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMzubj\)}(h h]h }(hj&hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj&hhhj&hMzubjm)}(h/xe_exec_queue_tlb_inval_last_fence_put_unlockedh]js)}(h/xe_exec_queue_tlb_inval_last_fence_put_unlockedh]h/xe_exec_queue_tlb_inval_last_fence_put_unlocked}(hj&hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj&ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj&hhhj&hMzubj )}(h,(struct xe_exec_queue *q, unsigned int type)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hj&hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj&ubj\)}(h h]h }(hj 'hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj&ubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hj'hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj'modnameN classnameNjq jt )}jw ]jz )}jm j&sb1c.xe_exec_queue_tlb_inval_last_fence_put_unlockedasbuh1hhj&ubj\)}(h h]h }(hj='hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj&ubj )}(hj h]h*}(hjK'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubjs)}(hjh]hq}(hjX'hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj&ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj&ubj )}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hjp'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl'ubj\)}(h h]h }(hj~'hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjl'ubj)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl'ubj\)}(h h]h }(hj'hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjl'ubjs)}(htypeh]htype}(hj'hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjl'ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj&ubeh}(h]h ]h"]h$]h&]hhuh1j hj&hhhj&hMzubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj&hhhj&hMzubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1j=hj&hMzhj&hhubj)}(hhh]h)}(h0Drop ref to last TLB invalidation fence unlockedh]h0Drop ref to last TLB invalidation fence unlocked}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMzhj'hhubah}(h]h ]h"]h$]h&]uh1jhj&hhhj&hMzubeh}(h]h ](jfunctioneh"]h$]h&]jjjj'jj'jjjuh1j8hhhjhNhNubj)}(h**Parameters** ``struct xe_exec_queue *q`` The exec queue ``unsigned int type`` Either primary or media GT **Description** Only safe to be called from xe_exec_queue_destroy().h](h)}(h**Parameters**h]j)}(hj'h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM~hj'ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hj(h]hstruct xe_exec_queue *q}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj(ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM|hj (ubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj,(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj((hM|hj)(ubah}(h]h ]h"]h$]h&]uh1j;hj (ubeh}(h]h ]h"]h$]h&]uh1jhj((hM|hj (ubj)}(h1``unsigned int type`` Either primary or media GT h](j )}(h``unsigned int type``h]j&)}(hjL(h]hunsigned int type}(hjN(hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hjJ(ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM}hjF(ubj<)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hje(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhja(hM}hjb(ubah}(h]h ]h"]h$]h&]uh1j;hjF(ubeh}(h]h ]h"]h$]h&]uh1jhja(hM}hj (ubeh}(h]h ]h"]h$]h&]uh1jhj'ubh)}(h**Description**h]j)}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj'ubh)}(h4Only safe to be called from xe_exec_queue_destroy().h]h4Only safe to be called from xe_exec_queue_destroy().}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chM~hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j43xe_exec_queue_tlb_inval_last_fence_get (C function)(c.xe_exec_queue_tlb_inval_last_fence_gethNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hxstruct dma_fence * xe_exec_queue_tlb_inval_last_fence_get (struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h]jD)}(hvstruct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](jJ)}(hjMh]hstruct}(hj(hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj(hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj\)}(h h]h }(hj(hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj(hhhj(hMubh)}(hhh]js)}(h dma_fenceh]h dma_fence}(hj(hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj(ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj(modnameN classnameNjq jt )}jw ]jz )}jm &xe_exec_queue_tlb_inval_last_fence_getsb(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhj(hhhj(hMubj\)}(h h]h }(hj )hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj(hhhj(hMubj )}(hj h]h*}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj(hMubjm)}(h&xe_exec_queue_tlb_inval_last_fence_geth]js)}(hj )h]h&xe_exec_queue_tlb_inval_last_fence_get}(hj+)hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj')ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj(hhhj(hMubj )}(h>(struct xe_exec_queue *q, struct xe_vm *vm, unsigned int type)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hjF)hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhjB)ubj\)}(h h]h }(hjS)hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjB)ubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hjd)hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhja)ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetjf)modnameN classnameNjq jt )}jw ]j)(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhjB)ubj\)}(h h]h }(hj)hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjB)ubj )}(hj h]h*}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB)ubjs)}(hjh]hq}(hj)hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjB)ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj>)ubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hj)hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj)ubj\)}(h h]h }(hj)hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj)ubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hj)hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj)modnameN classnameNjq jt )}jw ]j)(c.xe_exec_queue_tlb_inval_last_fence_getasbuh1hhj)ubj\)}(h h]h }(hj)hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj)ubj )}(hj h]h*}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubjs)}(hvmh]hvm}(hj *hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj)ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj>)ubj )}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hj%*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!*ubj\)}(h h]h }(hj3*hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj!*ubj)}(hinth]hint}(hjA*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!*ubj\)}(h h]h }(hjO*hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj!*ubjs)}(htypeh]htype}(hj]*hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj!*ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj>)ubeh}(h]h ]h"]h$]h&]hhuh1j hj(hhhj(hMubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj(hhhj(hMubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1j=hj(hMhj(hhubj)}(hhh]h)}(h#Get last fence for TLB invalidationh]h#Get last fence for TLB invalidation}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*hhubah}(h]h ]h"]h$]h&]uh1jhj(hhhj(hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj*jj*jjjuh1j8hhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``unsigned int type`` Either primary or media GT **Description** Get last fence, takes a ref **Return** last fence if not signaled, dma fence stub if signaledh](h)}(h**Parameters**h]j)}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubj)}(hhh](j)}(h+``struct xe_exec_queue *q`` The exec queue h](j )}(h``struct xe_exec_queue *q``h]j&)}(hj*h]hstruct xe_exec_queue *q}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj*ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubj<)}(hhh]h)}(hThe exec queueh]hThe exec queue}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1j;hj*ubeh}(h]h ]h"]h$]h&]uh1jhj*hMhj*ubj)}(h7``struct xe_vm *vm`` The VM the engine does a bind for h](j )}(h``struct xe_vm *vm``h]j&)}(hj+h]hstruct xe_vm *vm}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj*ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubj<)}(hhh]h)}(h!The VM the engine does a bind forh]h!The VM the engine does a bind for}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1j;hj*ubeh}(h]h ]h"]h$]h&]uh1jhj+hMhj*ubj)}(h1``unsigned int type`` Either primary or media GT h](j )}(h``unsigned int type``h]j&)}(hj:+h]hunsigned int type}(hj<+hhhNhNubah}(h]h ]h"]h$]h&]uh1j%hj8+ubah}(h]h ]h"]h$]h&]uh1jhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj4+ubj<)}(hhh]h)}(hEither primary or media GTh]hEither primary or media GT}(hjS+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjO+hMhjP+ubah}(h]h ]h"]h$]h&]uh1j;hj4+ubeh}(h]h ]h"]h$]h&]uh1jhjO+hMhj*ubeh}(h]h ]h"]h$]h&]uh1jhj*ubh)}(h**Description**h]j)}(hju+h]h Description}(hjw+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjs+ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubh)}(hGet last fence, takes a refh]hGet last fence, takes a ref}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubh)}(h **Return**h]j)}(hj+h]hReturn}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubh)}(h6last fence if not signaled, dma fence stub if signaledh]h6last fence if not signaled, dma fence stub if signaled}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj()}(hhh]h}(h]h ]h"]h$]h&]entries](j43xe_exec_queue_tlb_inval_last_fence_set (C function)(c.xe_exec_queue_tlb_inval_last_fence_sethNtauh1j'hjhhhNhNubj9)}(hhh](j>)}(hvoid xe_exec_queue_tlb_inval_last_fence_set (struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h]jD)}(hvoid xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h](j)}(hvoidh]hvoid}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMubj\)}(h h]h }(hj+hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj+hhhj+hMubjm)}(h&xe_exec_queue_tlb_inval_last_fence_seth]js)}(h&xe_exec_queue_tlb_inval_last_fence_seth]h&xe_exec_queue_tlb_inval_last_fence_set}(hj,hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj+ubah}(h]h ](jjeh"]h$]h&]hhuh1jlhj+hhhj+hMubj )}(hW(struct xe_exec_queue *q, struct xe_vm *vm, struct dma_fence *fence, unsigned int type)h](j )}(hstruct xe_exec_queue *qh](jJ)}(hjMh]hstruct}(hj,hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj,ubj\)}(h h]h }(hj+,hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj,ubh)}(hhh]js)}(h xe_exec_queueh]h xe_exec_queue}(hj<,hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj9,ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj>,modnameN classnameNjq jt )}jw ]jz )}jm j,sb(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhj,ubj\)}(h h]h }(hj\,hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj,ubj )}(hj h]h*}(hjj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubjs)}(hjh]hq}(hjw,hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj,ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj,ubj )}(hstruct xe_vm *vmh](jJ)}(hjMh]hstruct}(hj,hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj,ubj\)}(h h]h }(hj,hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj,ubh)}(hhh]js)}(hxe_vmh]hxe_vm}(hj,hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj,ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj,modnameN classnameNjq jt )}jw ]jX,(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhj,ubj\)}(h h]h }(hj,hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj,ubj )}(hj h]h*}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubjs)}(hvmh]hvm}(hj,hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj,ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj,ubj )}(hstruct dma_fence *fenceh](jJ)}(hjMh]hstruct}(hj,hhhNhNubah}(h]h ]jVah"]h$]h&]uh1jIhj,ubj\)}(h h]h }(hj -hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj,ubh)}(hhh]js)}(h dma_fenceh]h dma_fence}(hj-hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj-ubah}(h]h ]h"]h$]h&] refdomainjreftypejm reftargetj-modnameN classnameNjq jt )}jw ]jX,(c.xe_exec_queue_tlb_inval_last_fence_setasbuh1hhj,ubj\)}(h h]h }(hj;-hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hj,ubj )}(hj h]h*}(hjI-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubjs)}(hfenceh]hfence}(hjV-hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhj,ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj,ubj )}(hunsigned int typeh](j)}(hunsignedh]hunsigned}(hjo-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk-ubj\)}(h h]h }(hj}-hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjk-ubj)}(hinth]hint}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk-ubj\)}(h h]h }(hj-hhhNhNubah}(h]h ]jhah"]h$]h&]uh1j[hjk-ubjs)}(htypeh]htype}(hj-hhhNhNubah}(h]h ]j~ah"]h$]h&]uh1jrhjk-ubeh}(h]h ]h"]h$]h&]noemphhhuh1j hj,ubeh}(h]h ]h"]h$]h&]hhuh1j hj+hhhj+hMubeh}(h]h ]h"]h$]h&]hhjuh1jCjjhj+hhhj+hMubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1j=hj+hMhj+hhubj)}(hhh]h)}(h#Set last fence for TLB invalidationh]h#Set last fence for TLB invalidation}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_exec_queue:19: ./drivers/gpu/drm/xe/xe_exec_queue.chMhj-hhubah}(h]h ]h"]h$]h&]uh1jhj+hhhj+hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj-jj-jjjuh1j8hhhjhNhNubj)}(hX**Parameters** ``struct xe_exec_queue *q`` The exec queue ``struct xe_vm *vm`` The VM the engine does a bind for ``struct dma_fence *fence`` The fence ``unsigned int type`` Either primary or media GT **Description** Set the last fence for the tlb invalidation type on the queue. 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