Asphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget&/translations/zh_CN/gpu/xe/xe_configfsmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/zh_TW/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/it_IT/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ja_JP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ko_KR/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/sp_SP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h!SPDX-License-Identifier: GPL-2.0+h]h!SPDX-License-Identifier: GPL-2.0+}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh@/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs.rsthKubhtarget)}(h.. _xe_configfs:h]h}(h]h ]h"]h$]h&]refid xe-configfsuh1hhKhhhhhhubhsection)}(hhh](htitle)}(h Xe Configfsh]h Xe Configfs}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhNhNubh paragraph)}(hXUConfigfs is a filesystem-based manager of kernel objects. XE KMD registers a configfs subsystem called ``xe`` that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.h](hgConfigfs is a filesystem-based manager of kernel objects. XE KMD registers a configfs subsystem called }(hhhhhNhNubhliteral)}(h``xe``h]hxe}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhhubeh}(h]overviewah ]h"]overviewah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hCreate devicesh]hCreate devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hTo create a device, the ``xe`` module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe::h](hTo create a device, the }(hj&hhhNhNubh)}(h``xe``h]hxe}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&ubh module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe:}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK#hjubh literal_block)}(h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xeh]h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xe}hjIsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK'hjubh)}(hOIn order to create a device, the user has to create a directory inside ``xe``::h](hGIn order to create a device, the user has to create a directory inside }(hjXhhhNhNubh)}(h``xe``h]hxe}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXubh:}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK*hjubjH)}(h+# mkdir /sys/kernel/config/xe/0000:03:00.0/h]h+# mkdir /sys/kernel/config/xe/0000:03:00.0/}hjysbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK,hjubh)}(h_Every device created is populated by the driver with entries that can be used to configure it::h]h^Every device created is populated by the driver with entries that can be used to configure it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK.hjubjH)}(h/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── engines_allowed └── enable_psmih]h/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── engines_allowed └── enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK1hjubh)}(hUAfter configuring the attributes as per next section, the device can be probed with::h]hTAfter configuring the attributes as per next section, the device can be probed with:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probeh]hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probe}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK?hjubeh}(h]create-devicesah ]h"]create devicesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hConfigure Attributesh]hConfigure Attributes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hhh](h)}(hSurvivability mode:h]hSurvivability mode:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(h|Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it::h]h{Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKIhjubjH)}(h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_modeh]h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKLhjubh)}(h /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjRsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKYhj#ubh)}(h2Allow only compute engines and first copy engine::h]h1Allow only compute engines and first copy engine:}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK[hj#ubjH)}(hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjpsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK]hj#ubh)}(hNote that the engine names are the per-GT hardware names. On multi-tile platforms, writing ``rcs0,bcs0`` to this file would allow the first render and copy engines on each tile.h](h[Note that the engine names are the per-GT hardware names. On multi-tile platforms, writing }(hjhhhNhNubh)}(h ``rcs0,bcs0``h]h rcs0,bcs0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubhI to this file would allow the first render and copy engines on each tile.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK_hj#ubh)}(hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it's disabled. This is intended for debugging purposes only.h]hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it’s disabled. This is intended for debugging purposes only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKchj#ubh)}(h /sys/kernel/config/xe/0000:03:00.0/enable_psmih]h9# echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKrhjubh)}(h cmd [[dword0] [dword1] [...]] h](h)}(hGeneric instruction::h]hGeneric instruction:}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjBubjH)}(h4 cmd [[dword0] [dword1] [...]]h]h4 cmd [[dword0] [dword1] [...]]}hjUsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjBubeh}(h]h ]h"]h$]h&]uh1j@hj=ubjA)}(hBSimple register setting:: reg
h](h)}(hSimple register setting::h]hSimple register setting:}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjjubjH)}(h$ reg
h]h$ reg
}hj}sbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjjubeh}(h]h ]h"]h$]h&]uh1j@hj=ubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j;hj ubh)}(hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.h]hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj ubj<)}(hhh](jA)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb h](h)}(h_Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore::h]h^Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bbh]hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1j@hjubjA)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh](h)}(hfExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore::h]heExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh]hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1j@hjubjA)}(hXtLoad certain values in a couple of registers (it can be used as a simpler alternative to the `cmd`) action:: # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <``struct pci_dev *pdev`` the :c:type:`pci_dev` device to test h](hterm)}(h``struct pci_dev *pdev``h]h)}(hj4h]hstruct pci_dev *pdev}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2ubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMZhj,ubh definition)}(hhh]h)}(h$the :c:type:`pci_dev` device to testh](hthe }(hjOhhhNhNubh)}(h:c:type:`pci_dev`h]h)}(hjYh]hpci_dev}(hj[hhhNhNubah}(h]h ](xrefj|c-typeeh"]h$]h&]uh1hhjWubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_configfs refdomainj|reftypetype refexplicitrefwarnjj)}j]sb reftargetpci_devuh1hhjIhMZhjOubh device to test}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMZhjLubah}(h]h ]h"]h$]h&]uh1jJhj,ubeh}(h]h ]h"]h$]h&]uh1j*hjIhMZhj'ubah}(h]h ]h"]h$]h&]uh1j%hjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM\hjubh)}(hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.h]hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_configfs_get_survivability_mode (C function)$c.xe_configfs_get_survivability_modehNtauh1jhjhhhNhNubj)}(hhh](j)}(h>bool xe_configfs_get_survivability_mode (struct pci_dev *pdev)h]j)}(h=bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)h](j)}(hboolh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMpubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjhhhjhMpubj)}(h"xe_configfs_get_survivability_modeh]j!)}(h"xe_configfs_get_survivability_modeh]h"xe_configfs_get_survivability_mode}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubah}(h]h ](j4j5eh"]h$]h&]hhuh1jhjhhhjhMpubj:)}(h(struct pci_dev *pdev)h]j@)}(hstruct pci_dev *pdevh](jF)}(hjIh]hstruct}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j!)}(hpci_devh]hpci_dev}(hj:hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetj<modnameN classnameNjj)}j]j)}j~jsb$c.xe_configfs_get_survivability_modeasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj!)}(hpdevh]hpdev}(hjuhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hjubah}(h]h ]h"]h$]h&]hhuh1j9hjhhhjhMpubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhMpubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMphjhhubj)}(hhh]h)}(h)get configfs survivability mode attributeh]h)get configfs survivability mode attribute}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMphjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMpubeh}(h]h ](j|functioneh"]h$]h&]jj|jjjjjjjuh1jhhhjhNhNubj)}(hk**Parameters** ``struct pci_dev *pdev`` pci device **Return** survivability_mode attribute in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMthjubj&)}(hhh]j+)}(h$``struct pci_dev *pdev`` pci device h](j1)}(h``struct pci_dev *pdev``h]h)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMqhjubjK)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMqhjubah}(h]h ]h"]h$]h&]uh1jJhjubeh}(h]h ]h"]h$]h&]uh1j*hjhMqhjubah}(h]h ]h"]h$]h&]uh1j%hjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMshjubh)}(h(survivability_mode attribute in configfsh]h(survivability_mode attribute in configfs}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMshjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j,xe_configfs_get_engines_allowed (C function)!c.xe_configfs_get_engines_allowedhNtauh1jhjhhhNhNubj)}(hhh](j)}(h:u64 xe_configfs_get_engines_allowed (struct pci_dev *pdev)h]j)}(h9u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)h](h)}(hhh]j!)}(hu64h]hu64}(hjchhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjemodnameN classnameNjj)}j]j)}j~xe_configfs_get_engines_allowedsb!c.xe_configfs_get_engines_allowedasbuh1hhj\hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\hhhjhMubj)}(hxe_configfs_get_engines_allowedh]j!)}(hjh]hxe_configfs_get_engines_allowed}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubah}(h]h ](j4j5eh"]h$]h&]hhuh1jhj\hhhjhMubj:)}(h(struct pci_dev *pdev)h]j@)}(hstruct pci_dev *pdevh](jF)}(hjIh]hstruct}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j!)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjmodnameN classnameNjj)}j]j!c.xe_configfs_get_engines_allowedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj!)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hjubah}(h]h ]h"]h$]h&]hhuh1j9hj\hhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjXhhhjhMubah}(h]jSah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjUhhubj)}(hhh]h)}(h%get engine allowed mask from configfsh]h%get engine allowed mask from configfs}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj0 hhubah}(h]h ]h"]h$]h&]uh1jhjUhhhjhMubeh}(h]h ](j|functioneh"]h$]h&]jj|jjK jjK jjjuh1jhhhjhNhNubj)}(hs**Parameters** ``struct pci_dev *pdev`` pci device **Return** engine mask with allowed engines set in configfsh](h)}(h**Parameters**h]j)}(hjU h]h Parameters}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjS ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjO ubj&)}(hhh]j+)}(h$``struct pci_dev *pdev`` pci device h](j1)}(h``struct pci_dev *pdev``h]h)}(hjt h]hstruct pci_dev *pdev}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr ubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjn ubjK)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jJhjn ubeh}(h]h ]h"]h$]h&]uh1j*hj hMhjk ubah}(h]h ]h"]h$]h&]uh1j%hjO ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjO ubh)}(h0engine mask with allowed engines set in configfsh]h0engine mask with allowed engines set in configfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjO ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_configfs_get_psmi_enabled (C function)c.xe_configfs_get_psmi_enabledhNtauh1jhjhhhNhNubj)}(hhh](j)}(h8bool xe_configfs_get_psmi_enabled (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)h](j)}(hjh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj hhhj hMubj)}(hxe_configfs_get_psmi_enabledh]j!)}(hxe_configfs_get_psmi_enabledh]hxe_configfs_get_psmi_enabled}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj ubah}(h]h ](j4j5eh"]h$]h&]hhuh1jhj hhhj hMubj:)}(h(struct pci_dev *pdev)h]j@)}(hstruct pci_dev *pdevh](jF)}(hjIh]hstruct}(hj0 hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj, ubj )}(h h]h }(hj= hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj, ubh)}(hhh]j!)}(hpci_devh]hpci_dev}(hjN hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjK ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjP modnameN classnameNjj)}j]j)}j~j sbc.xe_configfs_get_psmi_enabledasbuh1hhj, ubj )}(h h]h }(hjn hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj, ubj)}(hjh]h*}(hj| hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj, ubj!)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj, ubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hj( ubah}(h]h ]h"]h$]h&]hhuh1j9hj hhhj hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhj hhhj hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h get configfs enable_psmi settingh]h get configfs enable_psmi setting}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](j|functioneh"]h$]h&]jj|jj jj jjjuh1jhhhjhNhNubj)}(hb**Parameters** ``struct pci_dev *pdev`` pci device **Return** enable_psmi setting in configfsh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj&)}(hhh]j+)}(h$``struct pci_dev *pdev`` pci device h](j1)}(h``struct pci_dev *pdev``h]h)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubjK)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jJhj ubeh}(h]h ]h"]h$]h&]uh1j*hj hMhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubh)}(h **Return**h]j)}(hj/ h]hReturn}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj- ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubh)}(henable_psmi setting in configfsh]henable_psmi setting in configfs}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_configfs_get_ctx_restore_mid_bb (C function)$c.xe_configfs_get_ctx_restore_mid_bbhNtauh1jhjhhhNhNubj)}(hhh](j)}(hiu32 xe_configfs_get_ctx_restore_mid_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hhu32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j!)}(hu32h]hu32}(hjw hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjt ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjy modnameN classnameNjj)}j]j)}j~"xe_configfs_get_ctx_restore_mid_bbsb$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjp hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjp hhhj hMubj)}(h"xe_configfs_get_ctx_restore_mid_bbh]j!)}(hj h]h"xe_configfs_get_ctx_restore_mid_bb}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj ubah}(h]h ](j4j5eh"]h$]h&]hhuh1jhjp hhhj hMubj:)}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j@)}(hstruct pci_dev *pdevh](jF)}(hjIh]hstruct}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubh)}(hhh]j!)}(hpci_devh]hpci_dev}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetj modnameN classnameNjj)}j]j $c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj!)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hj ubj@)}(henum xe_engine_class classh](jF)}(henumh]henum}(hj6 hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj2 ubj )}(h h]h }(hjD hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj2 ubh)}(hhh]j!)}(hxe_engine_classh]hxe_engine_class}(hjU hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjR ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjW modnameN classnameNjj)}j]j $c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhj2 ubj )}(h h]h }(hjs hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj2 ubj!)}(hclassh]hclass}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj2 ubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hj ubj@)}(hconst u32 **csh](jF)}(hconsth]hconst}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubh)}(hhh]j!)}(hu32h]hu32}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetj modnameN classnameNjj)}j]j $c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj!)}(hcsh]hcs}(hj hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hj ubeh}(h]h ]h"]h$]h&]hhuh1j9hjp hhhj hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjl hhhj hMubah}(h]jg ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhji hhubj)}(hhh]h)}(h'get configfs ctx_restore_mid_bb settingh]h'get configfs ctx_restore_mid_bb setting}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj& hhubah}(h]h ]h"]h$]h&]uh1jhji hhhj hMubeh}(h]h ](j|functioneh"]h$]h&]jj|jjA jjA jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the mid_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjK h]h Parameters}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjI ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjE ubj&)}(hhh](j+)}(h$``struct pci_dev *pdev`` pci device h](j1)}(h``struct pci_dev *pdev``h]h)}(hjj h]hstruct pci_dev *pdev}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjh ubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjd ubjK)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jJhjd ubeh}(h]h ]h"]h$]h&]uh1j*hj hMhja ubj+)}(h/``enum xe_engine_class class`` hw engine class h](j1)}(h``enum xe_engine_class class``h]h)}(hj h]henum xe_engine_class class}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubjK)}(hhh]h)}(hhw engine classh]hhw engine class}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jJhj ubeh}(h]h ]h"]h$]h&]uh1j*hj hMhja ubj+)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j1)}(h``const u32 **cs``h]h)}(hj h]hconst u32 **cs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubjK)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jJhj ubeh}(h]h ]h"]h$]h&]uh1j*hj hMhja ubeh}(h]h ]h"]h$]h&]uh1j%hjE ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjE ubh)}(h@Number of dwords used in the mid_ctx_restore setting in configfsh]h@Number of dwords used in the mid_ctx_restore setting in configfs}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjE ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j0xe_configfs_get_ctx_restore_post_bb (C function)%c.xe_configfs_get_ctx_restore_post_bbhNtauh1jhjhhhNhNubj)}(hhh](j)}(hju32 xe_configfs_get_ctx_restore_post_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hiu32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j!)}(hu32h]hu32}(hj_hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjamodnameN classnameNjj)}j]j)}j~#xe_configfs_get_ctx_restore_post_bbsb%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjXhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjXhhhjhMubj)}(h#xe_configfs_get_ctx_restore_post_bbh]j!)}(hj}h]h#xe_configfs_get_ctx_restore_post_bb}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubah}(h]h ](j4j5eh"]h$]h&]hhuh1jhjXhhhjhMubj:)}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j@)}(hstruct pci_dev *pdevh](jF)}(hjIh]hstruct}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j!)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjmodnameN classnameNjj)}j]j{%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj!)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hjubj@)}(henum xe_engine_class classh](jF)}(hj8 h]henum}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j!)}(hxe_engine_classh]hxe_engine_class}(hj<hhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetj>modnameN classnameNjj)}j]j{%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj!)}(hclassh]hclass}(hjhhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hjubj@)}(hconst u32 **csh](jF)}(hj h]hconst}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj}ubh)}(hhh]j!)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj|reftypej~ reftargetjmodnameN classnameNjj)}j]j{%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj}ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj!)}(hcsh]hcs}(hjhhhNhNubah}(h]h ]j-ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphhhuh1j?hjubeh}(h]h ]h"]h$]h&]hhuh1j9hjXhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjThhhjhMubah}(h]jOah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjQhhubj)}(hhh]h)}(h(get configfs ctx_restore_post_bb settingh]h(get configfs ctx_restore_post_bb setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhjQhhhjhMubeh}(h]h ](j|functioneh"]h$]h&]jj|jj'jj'jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the post_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hj1h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj+ubj&)}(hhh](j+)}(h$``struct pci_dev *pdev`` pci device h](j1)}(h``struct pci_dev *pdev``h]h)}(hjPh]hstruct pci_dev *pdev}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjJubjK)}(hhh]h)}(h pci deviceh]h pci device}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjfubah}(h]h ]h"]h$]h&]uh1jJhjJubeh}(h]h ]h"]h$]h&]uh1j*hjehMhjGubj+)}(h/``enum xe_engine_class class`` hw engine class h](j1)}(h``enum xe_engine_class class``h]h)}(hjh]henum xe_engine_class class}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubjK)}(hhh]h)}(hhw engine classh]hhw engine class}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jJhjubeh}(h]h ]h"]h$]h&]uh1j*hjhMhjGubj+)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j1)}(h``const u32 **cs``h]h)}(hjh]hconst u32 **cs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1j0hc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubjK)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jJhjubeh}(h]h ]h"]h$]h&]uh1j*hjhMhjGubeh}(h]h ]h"]h$]h&]uh1j%hj+ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h 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