sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget&/translations/zh_CN/gpu/xe/xe_configfsmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/zh_TW/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/it_IT/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ja_JP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ko_KR/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/pt_BR/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/sp_SP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h!SPDX-License-Identifier: GPL-2.0+h]h!SPDX-License-Identifier: GPL-2.0+}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh@/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs.rsthKubhtarget)}(h.. _xe_configfs:h]h}(h]h ]h"]h$]h&]refid xe-configfsuh1hhKhhhhhhubhsection)}(hhh](htitle)}(h Xe Configfsh]h Xe Configfs}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhNhNubh paragraph)}(hXUConfigfs is a filesystem-based manager of kernel objects. Xe KMD registers a configfs subsystem called ``xe`` that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.h](hgConfigfs is a filesystem-based manager of kernel objects. Xe KMD registers a configfs subsystem called }(hhhhhNhNubhliteral)}(h``xe``h]hxe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhubh that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhhubeh}(h]overviewah ]h"]overviewah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hCreate devicesh]hCreate devices}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hNhNubh)}(hTo create a device, the ``xe`` module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe::h](hTo create a device, the }(hj:hhhNhNubj)}(h``xe``h]hxe}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubh module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe:}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK&hj)ubh literal_block)}(h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xeh]h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xe}hj]sbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK*hj)ubh)}(hOIn order to create a device, the user has to create a directory inside ``xe``::h](hGIn order to create a device, the user has to create a directory inside }(hjlhhhNhNubj)}(h``xe``h]hxe}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jhjlubh:}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK-hj)ubj\)}(h+# mkdir /sys/kernel/config/xe/0000:03:00.0/h]h+# mkdir /sys/kernel/config/xe/0000:03:00.0/}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK/hj)ubh)}(h_Every device created is populated by the driver with entries that can be used to configure it::h]h^Every device created is populated by the driver with entries that can be used to configure it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK1hj)ubj\)}(hX/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── gt_types_allowed ├── engines_allowed └── enable_psmih]hX/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── gt_types_allowed ├── engines_allowed └── enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK4hj)ubh)}(hUAfter configuring the attributes as per next section, the device can be probed with::h]hTAfter configuring the attributes as per next section, the device can be probed with:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK@hj)ubj\)}(hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probeh]hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probe}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKChj)ubeh}(h]create-devicesah ]h"]create devicesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hConfigure Attributesh]hConfigure Attributes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hhh](h)}(hSurvivability mode:h]hSurvivability mode:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(h|Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it::h]h{Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKMhjubj\)}(h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_modeh]h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKPhjubh)}(h /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hL# echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKfhj7ubh)}(hAllow only the primary GT of each tile to be initialized and used, effectively disabling the media GT if it exists on the platform::h]hAllow only the primary GT of each tile to be initialized and used, effectively disabling the media GT if it exists on the platform:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhhj7ubj\)}(hF# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hF# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKkhj7ubh)}(hAllow only the media GT of each tile to be initialized and used, effectively disabling the primary GT. **This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**::h](hhAllow only the media GT of each tile to be initialized and used, effectively disabling the primary GT. }(hjhhhNhNubhstrong)}(h**This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**h]hThis configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKmhj7ubj\)}(hD# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hD# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKrhj7ubh)}(hDisable all GTs. Only other GPU IP (such as display) is potentially usable. **This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**::h](hMDisable all GTs. Only other GPU IP (such as display) is potentially usable. }(hjhhhNhNubj)}(h**This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**h]hThis configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKthj7ubj\)}(h?# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]h?# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKxhj7ubeh}(h]allowed-gt-typesah ]h"]allowed gt types:ah$]h&]uh1hhjubh)}(hhh](h)}(hAllowed engines:h]hAllowed engines:}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hNhNubh)}(hAllow only a set of engine(s) to be available, disabling the other engines even if they are available in hardware. This is applied after HW fuses are considered on each tile. Examples:h]hAllow only a set of engine(s) to be available, disabling the other engines even if they are available in hardware. This is applied after HW fuses are considered on each tile. Examples:}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK}hj*ubh)}(h:Allow only one render and one copy engines, nothing else::h]h9Allow only one render and one copy engines, nothing else:}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubj\)}(hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjYsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(h2Allow only compute engines and first copy engine::h]h1Allow only compute engines and first copy engine:}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubj\)}(hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjwsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(hNote that the engine names are the per-GT hardware names. On multi-tile platforms, writing ``rcs0,bcs0`` to this file would allow the first render and copy engines on each tile.h](h[Note that the engine names are the per-GT hardware names. On multi-tile platforms, writing }(hjhhhNhNubj)}(h ``rcs0,bcs0``h]h rcs0,bcs0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhI to this file would allow the first render and copy engines on each tile.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it's disabled. This is intended for debugging purposes only.h]hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it’s disabled. This is intended for debugging purposes only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(h /sys/kernel/config/xe/0000:03:00.0/enable_psmih]h9# echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(h cmd [[dword0] [dword1] [...]] h](h)}(hGeneric instruction::h]hGeneric instruction:}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjIubj\)}(h4 cmd [[dword0] [dword1] [...]]h]h4 cmd [[dword0] [dword1] [...]]}hj\sbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjIubeh}(h]h ]h"]h$]h&]uh1jGhjDubjH)}(hBSimple register setting:: reg
h](h)}(hSimple register setting::h]hSimple register setting:}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjqubj\)}(h$ reg
h]h$ reg
}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjqubeh}(h]h ]h"]h$]h&]uh1jGhjDubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jBhjubh)}(hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.h]hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjC)}(hhh](jH)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb h](h)}(h_Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore::h]h^Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubj\)}(hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bbh]hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1jGhjubjH)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh](h)}(hfExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore::h]heExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubj\)}(hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh]hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1jGhjubjH)}(hXtLoad certain values in a couple of registers (it can be used as a simpler alternative to the `cmd`) action:: # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <ubah}(h]h ]h"]h$]h&]uh1j<hjubeh}(h]h ]h"]h$]h&]uh1jGhjubeh}(h]h ]h"]h$]h&]jjjhjjuh1jBhjubh)}(hCurrently this is implemented only for post and mid context restore and these attributes can only be set before binding to the device.h]hCurrently this is implemented only for post and mid context restore and these attributes can only be set before binding to the device.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]context-restore-bbah ]h"]context restore bbah$]h&]uh1hhjubh)}(hhh](h)}(hMax SR-IOV Virtual Functionsh]hMax SR-IOV Virtual Functions}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhNhNubh)}(hThis config allows to limit number of the Virtual Functions (VFs) that can be managed by the Physical Function (PF) driver, where value 0 disables the PF mode (no VFs).h]hThis config allows to limit number of the Virtual Functions (VFs) that can be managed by the Physical Function (PF) driver, where value 0 disables the PF mode (no VFs).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(hDThe default max_vfs config value is taken from the max_vfs modparam.h]hDThe default max_vfs config value is taken from the max_vfs modparam.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(hMHow to enable PF with support with unlimited (up to HW limit) number of VFs::h]hLHow to enable PF with support with unlimited (up to HW limit) number of VFs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubj\)}(hv# echo unlimited > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hv# echo unlimited > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(h+How to enable PF with support up to 3 VFs::h]h*How to enable PF with support up to 3 VFs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubj\)}(hn# echo 3 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hn# echo 3 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(h1How to disable PF mode and always run as native::h]h0How to disable PF mode and always run as native:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubj\)}(hn# echo 0 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hn# echo 0 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(h7This setting only takes effect when probing the device.h]h7This setting only takes effect when probing the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubeh}(h]max-sr-iov-virtual-functionsah ]h"]max sr-iov virtual functionsah$]h&]uh1hhjubh)}(hhh](h)}(hEnable multi-queueh]hEnable multi-queue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hMulti-queue support on the device is enabled by default where the hardware supports it. Writing 0 force-disables multi-queue support: multi-queue exec-queue group creation via ioctl is refused, and the GuC feature is disabled::h]hMulti-queue support on the device is enabled by default where the hardware supports it. Writing 0 force-disables multi-queue support: multi-queue exec-queue group creation via ioctl is refused, and the GuC feature is disabled:}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubj\)}(h@# echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queueh]h@# echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queue}hj:sbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(h``struct pci_dev *pdev`` the :c:type:`pci_dev` device to test h](hterm)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh definition)}(hhh]h)}(h$the :c:type:`pci_dev` device to testh](hthe }(hj:hhhNhNubh)}(h:c:type:`pci_dev`h]j)}(hjDh]hpci_dev}(hjFhhhNhNubah}(h]h ](xrefjic-typeeh"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_configfs refdomainjireftypetype refexplicitrefwarnjojr)}ju]sb reftargetpci_devuh1hhj4hMhj:ubh device to test}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMhj7ubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhj4hMhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.h]hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_configfs_get_survivability_mode (C function)$c.xe_configfs_get_survivability_modehNtauh1jhjhhhNhNubj)}(hhh](j)}(h>bool xe_configfs_get_survivability_mode (struct pci_dev *pdev)h]j)}(h=bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)h](j)}(hboolh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"xe_configfs_get_survivability_modeh]j)}(h"xe_configfs_get_survivability_modeh]h"xe_configfs_get_survivability_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjhhhjhMubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hj hhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj% hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj" ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj' modnameN classnameNjojr)}ju]jx)}jkjsb$c.xe_configfs_get_survivability_modeasbuh1hhj ubj)}(h h]h }(hjE hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hjS hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hpdevh]hpdev}(hj` hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubah}(h]h ]h"]h$]h&]hhuh1j&hjhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h)get configfs survivability mode attributeh]h)get configfs survivability mode attribute}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jifunctioneh"]h$]h&]jjijj jj jjjuh1jhhhjhNhNubj)}(hk**Parameters** ``struct pci_dev *pdev`` pci device **Return** survivability_mode attribute in configfsh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj6)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j5hj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubh)}(h(survivability_mode attribute in configfsh]h(survivability_mode attribute in configfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j+xe_configfs_primary_gt_allowed (C function) c.xe_configfs_primary_gt_allowedhNtauh1jhjhhhNhNubj)}(hhh](j)}(h:bool xe_configfs_primary_gt_allowed (struct pci_dev *pdev)h]j)}(h9bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)h](j)}(hjh]hbool}(hjK hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjY hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG hhhjX hMubj)}(hxe_configfs_primary_gt_allowedh]j)}(hxe_configfs_primary_gt_allowedh]hxe_configfs_primary_gt_allowed}(hjk hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjg ubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjG hhhjX hMubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hj hhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj modnameN classnameNjojr)}ju]jx)}jkjm sb c.xe_configfs_primary_gt_allowedasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hj ubah}(h]h ]h"]h$]h&]hhuh1j&hjG hhhjX hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjC hhhjX hMubah}(h]j> ah ](jjeh"]h$]h&]jj)jhuh1jhjX hMhj@ hhubj)}(hhh]h)}(h+determine whether primary GTs are supportedh]h+determine whether primary GTs are supported}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj@ hhhjX hMubeh}(h]h ](jifunctioneh"]h$]h&]jjijj" jj" jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** True if primary GTs are enabled, false if they have been disabled via configfs.h](h)}(h**Parameters**h]j)}(hj, h]h Parameters}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj* ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj& ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjK h]hstruct pci_dev *pdev}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjI ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjE ubj6)}(hhh]h)}(h pci deviceh]h pci device}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj` hMhja ubah}(h]h ]h"]h$]h&]uh1j5hjE ubeh}(h]h ]h"]h$]h&]uh1jhj` hMhjB ubah}(h]h ]h"]h$]h&]uh1jhj& ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj& ubh)}(hOTrue if primary GTs are enabled, false if they have been disabled via configfs.h]hOTrue if primary GTs are enabled, false if they have been disabled via configfs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj& ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_configfs_media_gt_allowed (C function)c.xe_configfs_media_gt_allowedhNtauh1jhjhhhNhNubj)}(hhh](j)}(h8bool xe_configfs_media_gt_allowed (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)h](j)}(hjh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hxe_configfs_media_gt_allowedh]j)}(hxe_configfs_media_gt_allowedh]hxe_configfs_media_gt_allowed}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhj hhhj hMubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hj hhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj% hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj" ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj' modnameN classnameNjojr)}ju]jx)}jkj sbc.xe_configfs_media_gt_allowedasbuh1hhj ubj)}(h h]h }(hjE hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hjS hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hpdevh]hpdev}(hj` hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hj ubah}(h]h ]h"]h$]h&]hhuh1j&hj hhhj hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhj hhhj hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h)determine whether media GTs are supportedh]h)determine whether media GTs are supported}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](jifunctioneh"]h$]h&]jjijj jj jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** True if the media GTs are enabled, false if they have been disabled via configfs.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj6)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j5hj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubh)}(hQTrue if the media GTs are enabled, false if they have been disabled via configfs.h]hQTrue if the media GTs are enabled, false if they have been disabled via configfs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j,xe_configfs_get_engines_allowed (C function)!c.xe_configfs_get_engines_allowedhNtauh1jhjhhhNhNubj)}(hhh](j)}(h:u64 xe_configfs_get_engines_allowed (struct pci_dev *pdev)h]j)}(h9u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)h](h)}(hhh]j)}(hu64h]hu64}(hjN hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjK ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjP modnameN classnameNjojr)}ju]jx)}jkxe_configfs_get_engines_allowedsb!c.xe_configfs_get_engines_allowedasbuh1hhjG hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjp hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG hhhjo hMubj)}(hxe_configfs_get_engines_allowedh]j)}(hjl h]hxe_configfs_get_engines_allowed}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj~ ubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjG hhhjo hMubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hj hhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj modnameN classnameNjojr)}ju]jj !c.xe_configfs_get_engines_allowedasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hj ubah}(h]h ]h"]h$]h&]hhuh1j&hjG hhhjo hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjC hhhjo hMubah}(h]j> ah ](jjeh"]h$]h&]jj)jhuh1jhjo hMhj@ hhubj)}(hhh]h)}(h%get engine allowed mask from configfsh]h%get engine allowed mask from configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj@ hhhjo hMubeh}(h]h ](jifunctioneh"]h$]h&]jjijj6jj6jjjuh1jhhhjhNhNubj)}(hs**Parameters** ``struct pci_dev *pdev`` pci device **Return** engine mask with allowed engines set in configfsh](h)}(h**Parameters**h]j)}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj:ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj_h]hstruct pci_dev *pdev}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjYubj6)}(hhh]h)}(h pci deviceh]h pci device}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j5hjYubeh}(h]h ]h"]h$]h&]uh1jhjthMhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj:ubh)}(h0engine mask with allowed engines set in configfsh]h0engine mask with allowed engines set in configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_configfs_get_psmi_enabled (C function)c.xe_configfs_get_psmi_enabledhNtauh1jhjhhhNhNubj)}(hhh](j)}(h8bool xe_configfs_get_psmi_enabled (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)h](j)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hxe_configfs_get_psmi_enabledh]j)}(hxe_configfs_get_psmi_enabledh]hxe_configfs_get_psmi_enabled}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjhhhjhMubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj;modnameN classnameNjojr)}ju]jx)}jkjsbc.xe_configfs_get_psmi_enabledasbuh1hhjubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpdevh]hpdev}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubah}(h]h ]h"]h$]h&]hhuh1j&hjhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h get configfs enable_psmi settingh]h get configfs enable_psmi setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jifunctioneh"]h$]h&]jjijjjjjjjuh1jhhhjhNhNubj)}(hb**Parameters** ``struct pci_dev *pdev`` pci device **Return** enable_psmi setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj6)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(henable_psmi setting in configfsh]henable_psmi setting in configfs}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_configfs_get_enable_multi_queue (C function)$c.xe_configfs_get_enable_multi_queuehNtauh1jhjhhhNhNubj)}(hhh](j)}(h>bool xe_configfs_get_enable_multi_queue (struct pci_dev *pdev)h]j)}(h=bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)h](j)}(hjh]hbool}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhjlhMubj)}(h"xe_configfs_get_enable_multi_queueh]j)}(h"xe_configfs_get_enable_multi_queueh]h"xe_configfs_get_enable_multi_queue}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj{ubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhj[hhhjlhMubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjmodnameN classnameNjojr)}ju]jx)}jkjsb$c.xe_configfs_get_enable_multi_queueasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubah}(h]h ]h"]h$]h&]hhuh1j&hj[hhhjlhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjWhhhjlhMubah}(h]jRah ](jjeh"]h$]h&]jj)jhuh1jhjlhMhjThhubj)}(hhh]h)}(h'get configfs enable_multi_queue settingh]h'get configfs enable_multi_queue setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjThhhjlhMubeh}(h]h ](jifunctioneh"]h$]h&]jjijj6jj6jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** true if multi-queue is enabled for this device (the default), false if it has been force-disabled via configfs.h](h)}(h**Parameters**h]j)}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h Y]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj:ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj_h]hstruct pci_dev *pdev}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjYubj6)}(hhh]h)}(h pci deviceh]h pci device}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j5hjYubeh}(h]h ]h"]h$]h&]uh1jhjthMhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj:ubh)}(hotrue if multi-queue is enabled for this device (the default), false if it has been force-disabled via configfs.h]hotrue if multi-queue is enabled for this device (the default), false if it has been force-disabled via configfs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_configfs_get_ctx_restore_mid_bb (C function)$c.xe_configfs_get_ctx_restore_mid_bbhNtauh1jhjhhhNhNubj)}(hhh](j)}(hiu32 xe_configfs_get_ctx_restore_mid_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hhu32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjmodnameN classnameNjojr)}ju]jx)}jk"xe_configfs_get_ctx_restore_mid_bbsb$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"xe_configfs_get_ctx_restore_mid_bbh]j)}(hjh]h"xe_configfs_get_ctx_restore_mid_bb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjhhhjhMubj')}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hj1hhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hj-ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjQmodnameN classnameNjojr)}ju]j$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhj-ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(hjh]h*}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hj)ubj-)}(henum xe_engine_class classh](j3)}(henumh]henum}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hxe_engine_classh]hxe_engine_class}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjmodnameN classnameNjojr)}ju]j$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hclassh]hclass}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hj)ubj-)}(hconst u32 **csh](j3)}(hconsth]hconst}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu32h]hu32}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj&modnameN classnameNjojr)}ju]j$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcsh]hcs}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hj)ubeh}(h]h ]h"]h$]h&]hhuh1j&hjhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h'get configfs ctx_restore_mid_bb settingh]h'get configfs ctx_restore_mid_bb setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jifunctioneh"]h$]h&]jjijjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the mid_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh](j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj6)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h/``enum xe_engine_class class`` hw engine class h](j)}(h``enum xe_engine_class class``h]j)}(hjh]henum xe_engine_class class}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj6)}(hhh]h)}(hhw engine classh]hhw engine class}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj$ubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhj#hMhjubj)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j)}(h``const u32 **cs``h]j)}(hjGh]hconst u32 **cs}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjAubj6)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj]ubah}(h]h ]h"]h$]h&]uh1j5hjAubeh}(h]h ]h"]h$]h&]uh1jhj\hMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(h@Number of dwords used in the mid_ctx_restore setting in configfsh]h@Number of dwords used in the mid_ctx_restore setting in configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j0xe_configfs_get_ctx_restore_post_bb (C function)%c.xe_configfs_get_ctx_restore_post_bbhNtauh1jhjhhhNhNubj)}(hhh](j)}(hju32 xe_configfs_get_ctx_restore_post_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hiu32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjmodnameN classnameNjojr)}ju]jx)}jk#xe_configfs_get_ctx_restore_post_bbsb%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM)ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM)ubj)}(h#xe_configfs_get_ctx_restore_post_bbh]j)}(hjh]h#xe_configfs_get_ctx_restore_post_bb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjhhhjhM)ubj')}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj9modnameN classnameNjojr)}ju]j%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpdevh]hpdev}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubj-)}(henum xe_engine_class classh](j3)}(hjh]henum}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hxe_engine_classh]hxe_engine_class}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjmodnameN classnameNjojr)}ju]j%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hclassh]hclass}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubj-)}(hconst u32 **csh](j3)}(hjh]hconst}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu32h]hu32}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj modnameN classnameNjojr)}ju]j%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcsh]hcs}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubeh}(h]h ]h"]h$]h&]hhuh1j&hjhhhjhM)ubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhM)ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM)hjhhubj)}(hhh]h)}(h(get configfs ctx_restore_post_bb settingh]h(get configfs ctx_restore_post_bb setting}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM)hjwhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM)ubeh}(h]h ](jifunctioneh"]h$]h&]jjijjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the post_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM-hjubj)}(hhh](j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM*hjubj6)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hjubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhjhM*hjubj)}(h/``enum xe_engine_class class`` hw engine class h](j)}(h``enum xe_engine_class class``h]j)}(hjh]henum xe_engine_class class}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM+hjubj6)}(hhh]h)}(hhw engine classh]hhw engine class}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM+hj ubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhj hM+hjubj)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j)}(h``const u32 **cs``h]j)}(hj-h]hconst u32 **cs}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM,hj'ubj6)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM,hjCubah}(h]h ]h"]h$]h&]uh1j5hj'ubeh}(h]h ]h"]h$]h&]uh1jhjBhM,hjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjhh]hReturn}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjfubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM.hjubh)}(hANumber of dwords used in the post_ctx_restore setting in configfsh]hANumber of dwords used in the post_ctx_restore setting in configfs}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM.hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j&xe_configfs_admin_only_pf (C function)c.xe_configfs_admin_only_pfhNtauh1jhjhhhNhNubj)}(hhh](j)}(h5bool xe_configfs_admin_only_pf (struct pci_dev *pdev)h]j)}(h4bool xe_configfs_admin_only_pf(struct pci_dev *pdev)h](j)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMCubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMCubj)}(hxe_configfs_admin_only_pfh]j)}(hxe_configfs_admin_only_pfh]hxe_configfs_admin_only_pf}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjhhhjhMCubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetj modnameN classnameNjojr)}ju]jx)}jkjsbc.xe_configfs_admin_only_pfasbuh1hhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpdevh]hpdev}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubah}(h]h ]h"]h$]h&]hhuh1j&hjhhhjhMCubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhMCubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMChjhhubj)}(hhh]h)}(hGet PF's operational mode.h]hGet PF’s operational mode.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMChjihhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMCubeh}(h]h ](jifunctioneh"]h$]h&]jjijjjjjjjuh1jhhhjhNhNubj)}(hXm**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device **Description** Find the configfs group that belongs to the PCI device and return a flag whether the PF driver should be dedicated for VFs management only. If configfs group is not present, use driver's default value. **Return** true if PF driver is dedicated for VFs administration only.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMGhjubj)}(hhh]j)}(h6``struct pci_dev *pdev`` the :c:type:`pci_dev` device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMDhjubj6)}(hhh]h)}(hthe :c:type:`pci_dev` deviceh](hthe }(hjhhhNhNubh)}(h:c:type:`pci_dev`h]j)}(hjh]hpci_dev}(hjhhhNhNubah}(h]h ](jPjic-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj\ refdomainjireftypetype refexplicitrefwarnjojbjepci_devuh1hhjhMDhjubh device}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMDhjubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhjhMDhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMFhjubh)}(hFind the configfs group that belongs to the PCI device and return a flag whether the PF driver should be dedicated for VFs management only.h]hFind the configfs group that belongs to the PCI device and return a flag whether the PF driver should be dedicated for VFs management only.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMEhjubh)}(h=If configfs group is not present, use driver's default value.h]h?If configfs group is not present, use driver’s default value.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMHhjubh)}(h **Return**h]j)}(hjAh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMJhjubh)}(h;true if PF driver is dedicated for VFs administration only.h]h;true if PF driver is dedicated for VFs administration only.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$xe_configfs_get_max_vfs (C function)c.xe_configfs_get_max_vfshNtauh1jhjhhhNhNubj)}(hhh](j)}(h;unsigned int xe_configfs_get_max_vfs (struct pci_dev *pdev)h]j)}(h:unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)h](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM]ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM]ubj)}(hxe_configfs_get_max_vfsh]j)}(hxe_configfs_get_max_vfsh]hxe_configfs_get_max_vfs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ](j!j"eh"]h$]h&]hhuh1jhjhhhjhM]ubj')}(h(struct pci_dev *pdev)h]j-)}(hstruct pci_dev *pdevh](j3)}(hj6h]hstruct}(hjhhhNhNubah}(h]h ]j?ah"]h$]h&]uh1j2hjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainjireftypejk reftargetjmodnameN classnameNjojr)}ju]jx)}jkjsbc.xe_configfs_get_max_vfsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpdevh]hpdev}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j,hjubah}(h]h ]h"]h$]h&]hhuh1j&hjhhhjhM]ubeh}(h]h ]h"]h$]h&]hhjuh1jjjhj~hhhjhM]ubah}(h]jyah ](jjeh"]h$]h&]jj)jhuh1jhjhM]hj{hhubj)}(hhh]h)}(h'Get number of VFs that could be managedh]h'Get number of VFs that could be managed}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM]hj_hhubah}(h]h ]h"]h$]h&]uh1jhj{hhhjhM]ubeh}(h]h ](jifunctioneh"]h$]h&]jjijjzjjzjjjuh1jhhhjhNhNubj)}(hXn**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device **Description** Find the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. If configfs group is not present, use value of max_vfs module parameter. **Return** maximum number of VFs that could be managed.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMahj~ubj)}(hhh]j)}(h6``struct pci_dev *pdev`` the :c:type:`pci_dev` device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM^hjubj6)}(hhh]h)}(hthe :c:type:`pci_dev` deviceh](hthe }(hjhhhNhNubh)}(h:c:type:`pci_dev`h]j)}(hjh]hpci_dev}(hjhhhNhNubah}(h]h ](jPjic-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj\ refdomainjireftypetype refexplicitrefwarnjojbjepci_devuh1hhjhM^hjubh device}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1j5hjubeh}(h]h ]h"]h$]h&]uh1jhjhM^hjubah}(h]h ]h"]h$]h&]uh1jhj~ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM`hj~ubh)}(hFind the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. If configfs group is not present, use value of max_vfs module parameter.h]hFind the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. If configfs group is not present, use value of max_vfs module parameter.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM_hj~ubh)}(h **Return**h]j)}(hj(h]hReturn}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMchj~ubh)}(h,maximum number of VFs that could be managed.h]h,maximum number of VFs that could be managed.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMdhj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h] internal-apiah ]h"] internal apiah$]h&]uh1hhhhhhhhK ubeh}(h](hՌid1eh ]h"]( xe configfs xe_configfseh$]h&]uh1hhhhhhhhKexpect_referenced_by_name}jbhsexpect_referenced_by_id}hhsubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehnj _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}h]hasnameids}(jbhjaj^j&j#jjjejbj4j1j'j$jjjj jwjtjjj]jZjjjYjVu nametypes}(jbjaj&jjej4j'jjjwjj]jjYuh}(hhj^hj#hjj)jbjj1jj$j7jj*j jjtjjjzjZjjjhjVjjjjjj> jC j j j> jC jjjRjWjjjjjjjyj~u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}jKsRparse_messages]transform_messages]hsystem_message)}(hhh]h)}(hhh]h1Hyperlink target "xe-configfs" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypeINFOsourcehnjlineKuh1juba transformerN include_log] decorationNhhub.