$sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget&/translations/zh_CN/gpu/xe/xe_configfsmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/zh_TW/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/it_IT/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ja_JP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ko_KR/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/pt_BR/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/sp_SP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h!SPDX-License-Identifier: GPL-2.0+h]h!SPDX-License-Identifier: GPL-2.0+}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh@/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs.rsthKubhtarget)}(h.. _xe_configfs:h]h}(h]h ]h"]h$]h&]refid xe-configfsuh1hhKhhhhhhubhsection)}(hhh](htitle)}(h Xe Configfsh]h Xe Configfs}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhNhNubh paragraph)}(hXUConfigfs is a filesystem-based manager of kernel objects. Xe KMD registers a configfs subsystem called ``xe`` that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.h](hgConfigfs is a filesystem-based manager of kernel objects. Xe KMD registers a configfs subsystem called }(hhhhhNhNubhliteral)}(h``xe``h]hxe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhubh that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhhubeh}(h]overviewah ]h"]overviewah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hCreate devicesh]hCreate devices}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hNhNubh)}(hTo create a device, the ``xe`` module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe::h](hTo create a device, the }(hj:hhhNhNubj)}(h``xe``h]hxe}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubh module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe:}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK&hj)ubh literal_block)}(h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xeh]h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xe}hj]sbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK*hj)ubh)}(hOIn order to create a device, the user has to create a directory inside ``xe``::h](hGIn order to create a device, the user has to create a directory inside }(hjlhhhNhNubj)}(h``xe``h]hxe}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jhjlubh:}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK-hj)ubj\)}(h+# mkdir /sys/kernel/config/xe/0000:03:00.0/h]h+# mkdir /sys/kernel/config/xe/0000:03:00.0/}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK/hj)ubh)}(h_Every device created is populated by the driver with entries that can be used to configure it::h]h^Every device created is populated by the driver with entries that can be used to configure it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK1hj)ubj\)}(hX/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── gt_types_allowed ├── engines_allowed └── enable_psmih]hX/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── gt_types_allowed ├── engines_allowed └── enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK4hj)ubh)}(hUAfter configuring the attributes as per next section, the device can be probed with::h]hTAfter configuring the attributes as per next section, the device can be probed with:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK@hj)ubj\)}(hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probeh]hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probe}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKChj)ubeh}(h]create-devicesah ]h"]create devicesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hConfigure Attributesh]hConfigure Attributes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hhh](h)}(hSurvivability mode:h]hSurvivability mode:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(h|Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it::h]h{Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKMhjubj\)}(h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_modeh]h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKPhjubh)}(h /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hL# echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKfhj7ubh)}(hAllow only the primary GT of each tile to be initialized and used, effectively disabling the media GT if it exists on the platform::h]hAllow only the primary GT of each tile to be initialized and used, effectively disabling the media GT if it exists on the platform:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhhj7ubj\)}(hF# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hF# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKkhj7ubh)}(hAllow only the media GT of each tile to be initialized and used, effectively disabling the primary GT. **This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**::h](hhAllow only the media GT of each tile to be initialized and used, effectively disabling the primary GT. }(hjhhhNhNubhstrong)}(h**This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**h]hThis configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKmhj7ubj\)}(hD# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hD# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKrhj7ubh)}(hDisable all GTs. Only other GPU IP (such as display) is potentially usable. **This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**::h](hMDisable all GTs. Only other GPU IP (such as display) is potentially usable. }(hjhhhNhNubj)}(h**This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**h]hThis configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKthj7ubj\)}(h?# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]h?# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKxhj7ubeh}(h]allowed-gt-typesah ]h"]allowed gt types:ah$]h&]uh1hhjubh)}(hhh](h)}(hAllowed engines:h]hAllowed engines:}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hNhNubh)}(hAllow only a set of engine(s) to be available, disabling the other engines even if they are available in hardware. This is applied after HW fuses are considered on each tile. Examples:h]hAllow only a set of engine(s) to be available, disabling the other engines even if they are available in hardware. This is applied after HW fuses are considered on each tile. Examples:}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK}hj*ubh)}(h:Allow only one render and one copy engines, nothing else::h]h9Allow only one render and one copy engines, nothing else:}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubj\)}(hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjYsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(h2Allow only compute engines and first copy engine::h]h1Allow only compute engines and first copy engine:}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubj\)}(hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjwsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(hNote that the engine names are the per-GT hardware names. On multi-tile platforms, writing ``rcs0,bcs0`` to this file would allow the first render and copy engines on each tile.h](h[Note that the engine names are the per-GT hardware names. On multi-tile platforms, writing }(hjhhhNhNubj)}(h ``rcs0,bcs0``h]h rcs0,bcs0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhI to this file would allow the first render and copy engines on each tile.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it's disabled. This is intended for debugging purposes only.h]hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it’s disabled. This is intended for debugging purposes only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj*ubh)}(h /sys/kernel/config/xe/0000:03:00.0/enable_psmih]h9# echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(h cmd [[dword0] [dword1] [...]] h](h)}(hGeneric instruction::h]hGeneric instruction:}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjIubj\)}(h4 cmd [[dword0] [dword1] [...]]h]h4 cmd [[dword0] [dword1] [...]]}hj\sbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjIubeh}(h]h ]h"]h$]h&]uh1jGhjDubjH)}(hBSimple register setting:: reg
h](h)}(hSimple register setting::h]hSimple register setting:}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjqubj\)}(h$ reg
h]h$ reg
}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjqubeh}(h]h ]h"]h$]h&]uh1jGhjDubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jBhjubh)}(hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.h]hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjC)}(hhh](jH)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb h](h)}(h_Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore::h]h^Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubj\)}(hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bbh]hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1jGhjubjH)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh](h)}(hfExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore::h]heExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubj\)}(hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh]hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1jGhjubjH)}(hXtLoad certain values in a couple of registers (it can be used as a simpler alternative to the `cmd`) action:: # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <ubah}(h]h ]h"]h$]h&]uh1j<hjubeh}(h]h ]h"]h$]h&]uh1jGhjubeh}(h]h ]h"]h$]h&]jjjhjjuh1jBhjubh)}(hCurrently this is implemented only for post and mid context restore and these attributes can only be set before binding to the device.h]hCurrently this is implemented only for post and mid context restore and these attributes can only be set before binding to the device.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]context-restore-bbah ]h"]context restore bbah$]h&]uh1hhjubh)}(hhh](h)}(hMax SR-IOV Virtual Functionsh]hMax SR-IOV Virtual Functions}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhNhNubh)}(hThis config allows to limit number of the Virtual Functions (VFs) that can be managed by the Physical Function (PF) driver, where value 0 disables the PF mode (no VFs).h]hThis config allows to limit number of the Virtual Functions (VFs) that can be managed by the Physical Function (PF) driver, where value 0 disables the PF mode (no VFs).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(hDThe default max_vfs config value is taken from the max_vfs modparam.h]hDThe default max_vfs config value is taken from the max_vfs modparam.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(hMHow to enable PF with support with unlimited (up to HW limit) number of VFs::h]hLHow to enable PF with support with unlimited (up to HW limit) number of VFs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubj\)}(hv# echo unlimited > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hv# echo unlimited > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(h+How to enable PF with support up to 3 VFs::h]h*How to enable PF with support up to 3 VFs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubj\)}(hn# echo 3 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hn# echo 3 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(h1How to disable PF mode and always run as native::h]h0How to disable PF mode and always run as native:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubj\)}(hn# echo 0 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hn# echo 0 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubh)}(h7This setting only takes effect when probing the device.h]h7This setting only takes effect when probing the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjzubeh}(h]max-sr-iov-virtual-functionsah ]h"]max sr-iov virtual functionsah$]h&]uh1hhjubeh}(h]configure-attributesah ]h"]configure attributesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hRemove devicesh]hRemove devices}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hNhNubh)}(h?The created device directories can be removed using ``rmdir``::h](h4The created device directories can be removed using }(hj3hhhNhNubj)}(h ``rmdir``h]hrmdir}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh:}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj"ubj\)}(h+# rmdir /sys/kernel/config/xe/0000:03:00.0/h]h+# rmdir /sys/kernel/config/xe/0000:03:00.0/}hjTsbah}(h]h ]h"]h$]h&]hhuh1j[hb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj"ubeh}(h]remove-devicesah ]h"]remove devicesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhhhhhK ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single%xe_configfs_check_device (C function)c.xe_configfs_check_devicehNtauh1j|hjkhhhNhNubhdesc)}(hhh](hdesc_signature)}(h4void xe_configfs_check_device (struct pci_dev *pdev)h]hdesc_signature_line)}(h3void xe_configfs_check_device(struct pci_dev *pdev)h](hdesc_sig_keyword_type)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMTubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhMTubh desc_name)}(hxe_configfs_check_deviceh]h desc_sig_name)}(hxe_configfs_check_deviceh]hxe_configfs_check_device}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jhjhhhjhMTubhdesc_parameterlist)}(h(struct pci_dev *pdev)h]hdesc_parameter)}(hstruct pci_dev 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]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMThjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMTubeh}(h]h ](j#functioneh"]h$]h&]domainj#objtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhjkhNhNubh container)}(h**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device to test **Description** Try to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMXhjubhdefinition_list)}(hhh]hdefinition_list_item)}(h>``struct pci_dev *pdev`` the :c:type:`pci_dev` device to test h](hterm)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMUhjubh definition)}(hhh]h)}(h$the :c:type:`pci_dev` device to testh](hthe }(hjhhhNhNubh)}(h:c:type:`pci_dev`h]j)}(hjh]hpci_dev}(hjhhhNhNubah}(h]h ](xrefj#c-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_configfs refdomainj#reftypetype refexplicitrefwarnj)j,)}j/]sb reftargetpci_devuh1hhjhMUhjubh device to test}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMUhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMUhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj?h]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMWhjubh)}(hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.h]hTry to find the configfs group that belongs to the specified pci device and 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*pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j2)}j%jsb$c.xe_configfs_get_survivability_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjF)}(hjIh]h*}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMkubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhj|hhhjhMkubah}(h]jwah ](j}j~eh"]h$]h&]jj)jhuh1jhjhMkhjyhhubj)}(hhh]h)}(h)get configfs survivability mode attributeh]h)get configfs survivability mode attribute}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMkhjA hhubah}(h]h ]h"]h$]h&]uh1jhjyhhhjhMkubeh}(h]h ](j#functioneh"]h$]h&]jj#jj\ jj\ jjjuh1jhhhjkhNhNubj)}(hk**Parameters** ``struct pci_dev *pdev`` pci device **Return** survivability_mode attribute in configfsh](h)}(h**Parameters**h]j)}(hjf h]h Parameters}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjd ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMohj` ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMlhj ubj)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMlhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMlhj| ubah}(h]h ]h"]h$]h&]uh1jhj` ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMnhj` ubh)}(h(survivability_mode attribute in configfsh]h(survivability_mode attribute in configfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMnhj` ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j+xe_configfs_primary_gt_allowed (C function) c.xe_configfs_primary_gt_allowedhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(h:bool xe_configfs_primary_gt_allowed (struct pci_dev *pdev)h]j)}(h9bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)h](j)}(hjh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hxe_configfs_primary_gt_allowedh]j)}(hxe_configfs_primary_gt_allowedh]hxe_configfs_primary_gt_allowed}(hj% hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj! ubah}(h]h ](jjeh"]h$]h&]hhuh1jhj hhhj hMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjA hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj= ubj)}(h h]h }(hjN hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj= ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj_ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetja modnameN classnameNj)j,)}j/]j2)}j%j' sb c.xe_configfs_primary_gt_allowedasbuh1hhj= ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj= ubjF)}(hjIh]h*}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj= ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj= ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj9 ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhj hhhj hMubah}(h]j ah ](j}j~eh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h+determine whether primary GTs are supportedh]h+determine whether primary GTs are supported}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](j#functioneh"]h$]h&]jj#jj jj jjjuh1jhhhjkhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** True if primary GTs are enabled, false if they have been disabled via configfs.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hj@ h]hReturn}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj> ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubh)}(hOTrue if primary GTs are enabled, false if they have been disabled via configfs.h]hOTrue if primary GTs are enabled, false if they have been disabled via configfs.}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_configfs_media_gt_allowed (C function)c.xe_configfs_media_gt_allowedhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(h8bool xe_configfs_media_gt_allowed (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)h](j)}(hjh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hxe_configfs_media_gt_allowedh]j)}(hxe_configfs_media_gt_allowedh]hxe_configfs_media_gt_allowed}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jhj hhhj hMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetj modnameN classnameNj)j,)}j/]j2)}j%j sbc.xe_configfs_media_gt_allowedasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjF)}(hjIh]h*}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhj} hhhj hMubah}(h]jx ah ](j}j~eh"]h$]h&]jj)jhuh1jhj hMhjz hhubj)}(hhh]h)}(h)determine whether media GTs are supportedh]h)determine whether media GTs are supported}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjA hhubah}(h]h ]h"]h$]h&]uh1jhjz hhhj hMubeh}(h]h ](j#functioneh"]h$]h&]jj#jj\ jj\ jjjuh1jhhhjkhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** True if the media GTs are enabled, false if they have been disabled via configfs.h](h)}(h**Parameters**h]j)}(hjf h]h Parameters}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjd ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj` ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj| ubah}(h]h ]h"]h$]h&]uh1jhj` ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj` ubh)}(hQTrue if the media GTs are enabled, false if they have been disabled via configfs.h]hQTrue if the media GTs are enabled, false if they have been disabled via configfs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj` ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j,xe_configfs_get_engines_allowed (C function)!c.xe_configfs_get_engines_allowedhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(h:u64 xe_configfs_get_engines_allowed (struct pci_dev *pdev)h]j)}(h9u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)h](h)}(hhh]j)}(hu64h]hu64}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetj modnameN classnameNj)j,)}j/]j2)}j%xe_configfs_get_engines_allowedsb!c.xe_configfs_get_engines_allowedasbuh1hhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj* hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj) hMubj)}(hxe_configfs_get_engines_allowedh]j)}(hj& h]hxe_configfs_get_engines_allowed}(hj< hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8 ubah}(h]h ](jjeh"]h$]h&]hhuh1jhj hhhj) hMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjW hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS ubj)}(h h]h }(hjd hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hju hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjw modnameN classnameNj)j,)}j/]j$ !c.xe_configfs_get_engines_allowedasbuh1hhjS ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS ubjF)}(hjIh]h*}(hj hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjS ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjO ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj) hMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhj hhhj) hMubah}(h]j ah ](j}j~eh"]h$]h&]jj)jhuh1jhj) hMhj hhubj)}(hhh]h)}(h%get engine allowed mask from configfsh]h%get engine allowed mask from configfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj) hMubeh}(h]h ](j#functioneh"]h$]h&]jj#jj jj jjjuh1jhhhjkhNhNubj)}(hs**Parameters** ``struct pci_dev *pdev`` pci device **Return** engine mask with allowed engines set in configfsh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(h pci deviceh]h pci device}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj/ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj.hMhjubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hjTh]hReturn}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubh)}(h0engine mask with allowed engines set in configfsh]h0engine mask with allowed engines set in configfs}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j)xe_configfs_get_psmi_enabled (C function)c.xe_configfs_get_psmi_enabledhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(h8bool xe_configfs_get_psmi_enabled (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)h](j)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hxe_configfs_get_psmi_enabledh]j)}(hxe_configfs_get_psmi_enabledh]hxe_configfs_get_psmi_enabled}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j2)}j%jsbc.xe_configfs_get_psmi_enabledasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjF)}(hjIh]h*}(hj!hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj)}(hpdevh]hpdev}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhjhhhjhMubah}(h]jah ](j}j~eh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h get configfs enable_psmi settingh]h get configfs enable_psmi setting}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjUhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](j#functioneh"]h$]h&]jj#jjpjjpjjjuh1jhhhjkhNhNubj)}(hb**Parameters** ``struct pci_dev *pdev`` pci device **Return** enable_psmi setting in configfsh](h)}(h**Parameters**h]j)}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjtubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjtubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjtubh)}(henable_psmi setting in configfsh]henable_psmi setting in configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjtubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j/xe_configfs_get_ctx_restore_mid_bb (C function)$c.xe_configfs_get_ctx_restore_mid_bbhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(hiu32 xe_configfs_get_ctx_restore_mid_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hhu32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j2)}j%"xe_configfs_get_ctx_restore_mid_bbsb$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj=hMubj)}(h"xe_configfs_get_ctx_restore_mid_bbh]j)}(hj:h]h"xe_configfs_get_ctx_restore_mid_bb}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhj=hMubj)}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j8$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjgubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubjF)}(hjIh]h*}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjgubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjcubj)}(henum xe_engine_class classh](j)}(henumh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hxe_engine_classh]hxe_engine_class}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j8$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hclassh]hclass}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjcubj)}(hconst u32 **csh](j)}(hconsth]hconst}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hu32h]hu32}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetj`modnameN classnameNj)j,)}j/]j8$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhj;ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubjF)}(hjIh]h*}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj;ubjF)}(hjIh]h*}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj;ubj)}(hcsh]hcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjcubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhj=hMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhjhhhj=hMubah}(h]j ah ](j}j~eh"]h$]h&]jj)jhuh1jhj=hMhjhhubj)}(hhh]h)}(h'get configfs ctx_restore_mid_bb settingh]h'get configfs ctx_restore_mid_bb settingi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj=hMubeh}(h]h ](j#functioneh"]h$]h&]jj#jjjjjjjuh1jhhhjkhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the mid_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh](j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]h)}(h pci deviceh]h pci device}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj$hMhjubj)}(h/``enum xe_engine_class class`` hw engine class h](j)}(h``enum xe_engine_class class``h]j)}(hjHh]henum xe_engine_class class}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjBubj)}(hhh]h)}(hhw engine classh]hhw engine class}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj^ubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jhj]hMhjubj)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j)}(h``const u32 **cs``h]j)}(hjh]hconst u32 **cs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj{ubj)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(h@Number of dwords used in the mid_ctx_restore setting in configfsh]h@Number of dwords used in the mid_ctx_restore setting in configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j0xe_configfs_get_ctx_restore_post_bb (C function)%c.xe_configfs_get_ctx_restore_post_bbhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(hju32 xe_configfs_get_ctx_restore_post_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hiu32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j2)}j%#xe_configfs_get_ctx_restore_post_bbsb%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj%hMubj)}(h#xe_configfs_get_ctx_restore_post_bbh]j)}(hj"h]h#xe_configfs_get_ctx_restore_post_bb}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhj%hMubj)}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjsmodnameN classnameNj)j,)}j/]j %c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjOubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubjF)}(hjIh]h*}(hjhhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjOubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjKubj)}(henum xe_engine_class classh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hxe_engine_classh]hxe_engine_class}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjmodnameN classnameNj)j,)}j/]j %c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hclassh]hclass}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjKubj)}(hconst u32 **csh](j)}(hjAh]hconst}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubh)}(hhh]j)}(hu32h]hu32}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjFmodnameN classnameNj)j,)}j/]j %c.xe_configfs_get_ctx_restore_post_bbasbuh1hhj"ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubjF)}(hjIh]h*}(hjphhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj"ubjF)}(hjIh]h*}(hj}hhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhj"ubj)}(hcsh]hcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjKubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhj%hMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhjhhhj%hMubah}(h]jah ](j}j~eh"]h$]h&]jj)jhuh1jhj%hMhjhhubj)}(hhh]h)}(h(get configfs ctx_restore_post_bb settingh]h(get configfs ctx_restore_post_bb setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj%hMubeh}(h]h ](j#functioneh"]h$]h&]jj#jjjjjjjuh1jhhhjkhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the post_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh](j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hMhjubj)}(h/``enum xe_engine_class class`` hw engine class h](j)}(h``enum xe_engine_class class``h]j)}(hj.h]henum xe_engine_class class}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj(ubj)}(hhh]h)}(hhw engine classh]hhw engine class}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjDubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhjChMhjubj)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j)}(h``const u32 **cs``h]j)}(hjgh]hconst u32 **cs}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjaubj)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj}ubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jhj|hMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(hANumber of dwords used in the post_ctx_restore setting in configfsh]hANumber of dwords used in the post_ctx_restore setting in configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j&xe_configfs_admin_only_pf (C function)c.xe_configfs_admin_only_pfhNtauh1j|hjkhhhNhNubj)}(hhh](j)}(h5bool xe_configfs_admin_only_pf (struct pci_dev *pdev)h]j)}(h4bool xe_configfs_admin_only_pf(struct pci_dev *pdev)h](j)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hxe_configfs_admin_only_pfh]j)}(hxe_configfs_admin_only_pfh]hxe_configfs_admin_only_pf}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetjCmodnameN classnameNj)j,)}j/]j2)}j%j sbc.xe_configfs_admin_only_pfasbuh1hhjubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjF)}(hjIh]h*}(hjohhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj)}(hpdevh]hpdev}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhjhhhjhMubah}(h]jah ](j}j~eh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hGet PF's operational mode.h]hGet PF’s operational mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](j#functioneh"]h$]h&]jj#jjjjjjjuh1jhhhjkhNhNubj)}(hXm**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device **Description** Find the configfs group that belongs to the PCI device and return a flag whether the PF driver should be dedicated for VFs management only. If configfs group is not present, use driver's default value. **Return** true if PF driver is dedicated for VFs administration only.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]j)}(h6``struct pci_dev *pdev`` the :c:type:`pci_dev` device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(hthe :c:type:`pci_dev` deviceh](hthe }(hjhhhNhNubh)}(h:c:type:`pci_dev`h]j)}(hj h]hpci_dev}(hj hhhNhNubah}(h]h ](j j#c-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainj#reftypetype refexplicitrefwarnj)jjpci_devuh1hhjhMhjubh device}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjEh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(hFind the configfs group that belongs to the PCI device and return a flag whether the PF driver should be dedicated for VFs management only.h]hFind the configfs group that belongs to the PCI device and return a flag whether the PF driver should be dedicated for VFs management only.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(h=If configfs group is not present, use driver's default value.h]h?If configfs group is not present, use driver’s default value.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(h **Return**h]j)}(hj{h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM hjubh)}(h;true if PF driver is dedicated for VFs administration only.h]h;true if PF driver is dedicated for VFs administration only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjkhhhNhNubj})}(hhh]h}(h]h ]h"]h$]h&]entries](j$xe_configfs_get_max_vfs (C function)c.xe_configfs_get_max_vfshNtauh1j|hjkhhhNhNubj)}(hhh](j)}(h;unsigned int xe_configfs_get_max_vfs (struct pci_dev *pdev)h]j)}(h:unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)h](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hxe_configfs_get_max_vfsh]j)}(hxe_configfs_get_max_vfsh]hxe_configfs_get_max_vfs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&] refdomainj#reftypej% reftargetj9modnameN classnameNj)j,)}j/]j2)}j%jsbc.xe_configfs_get_max_vfsasbuh1hhjubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjF)}(hjIh]h*}(hjehhhNhNubah}(h]h ]jRah"]h$]h&]uh1jEhjubj)}(hpdevh]hpdev}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjwuh1jjxjyhjhhhjhMubah}(h]jah ](j}j~eh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h'Get number of VFs that could be managedh]h'Get number of VFs that could be managed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](j#functioneh"]h$]h&]jj#jjjjjjjuh1jhhhjkhNhNubj)}(hXn**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device **Description** Find the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. If configfs group is not present, use value of max_vfs module parameter. **Return** maximum number of VFs that could be managed.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM hjubj)}(hhh]j)}(h6``struct pci_dev *pdev`` the :c:type:`pci_dev` device h](j)}(h``struct pci_dev *pdev``h]j)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(hthe :c:type:`pci_dev` deviceh](hthe }(hjhhhNhNubh)}(h:c:type:`pci_dev`h]j)}(hjh]hpci_dev}(hjhhhNhNubah}(h]h ](j j#c-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainj#reftypetype refexplicitrefwarnj)jjpci_devuh1hhjhMhjubh device}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj;h]h Description}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubh)}(hFind the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. If configfs group is not present, use value of max_vfs module parameter.h]hFind the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. 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