sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget&/translations/zh_CN/gpu/xe/xe_configfsmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/zh_TW/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/it_IT/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ja_JP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ko_KR/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/sp_SP/gpu/xe/xe_configfsmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h!SPDX-License-Identifier: GPL-2.0+h]h!SPDX-License-Identifier: GPL-2.0+}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh@/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs.rsthKubhtarget)}(h.. _xe_configfs:h]h}(h]h ]h"]h$]h&]refid xe-configfsuh1hhKhhhhhhubhsection)}(hhh](htitle)}(h Xe Configfsh]h Xe Configfs}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhNhNubh paragraph)}(hXUConfigfs is a filesystem-based manager of kernel objects. Xe KMD registers a configfs subsystem called ``xe`` that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.h](hgConfigfs is a filesystem-based manager of kernel objects. Xe KMD registers a configfs subsystem called }(hhhhhNhNubhliteral)}(h``xe``h]hxe}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh that creates a directory in the mounted configfs directory. The user can create devices under this directory and configure them as necessary. See Documentation/filesystems/configfs.rst for more information about how configfs works.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhhubeh}(h]overviewah ]h"]overviewah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hCreate devicesh]hCreate devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hTo create a device, the ``xe`` module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe::h](hTo create a device, the }(hj&hhhNhNubh)}(h``xe``h]hxe}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&ubh module should already be loaded, but some attributes can only be set before binding the device. It can be accomplished by blocking the driver autoprobe:}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK%hjubh literal_block)}(h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xeh]h7# echo 0 > /sys/bus/pci/drivers_autoprobe # modprobe xe}hjIsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK)hjubh)}(hOIn order to create a device, the user has to create a directory inside ``xe``::h](hGIn order to create a device, the user has to create a directory inside }(hjXhhhNhNubh)}(h``xe``h]hxe}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXubh:}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK,hjubjH)}(h+# mkdir /sys/kernel/config/xe/0000:03:00.0/h]h+# mkdir /sys/kernel/config/xe/0000:03:00.0/}hjysbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK.hjubh)}(h_Every device created is populated by the driver with entries that can be used to configure it::h]h^Every device created is populated by the driver with entries that can be used to configure it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK0hjubjH)}(hX/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── gt_types_allowed ├── engines_allowed └── enable_psmih]hX/sys/kernel/config/xe/ ├── 0000:00:02.0 │   └── ... ├── 0000:00:02.1 │   └── ... : └── 0000:03:00.0 ├── survivability_mode ├── gt_types_allowed ├── engines_allowed └── enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK3hjubh)}(hUAfter configuring the attributes as per next section, the device can be probed with::h]hTAfter configuring the attributes as per next section, the device can be probed with:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK?hjubjH)}(hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probeh]hj# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind # # or # echo 0000:03:00.0 > /sys/bus/pci/drivers_probe}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKBhjubeh}(h]create-devicesah ]h"]create devicesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hConfigure Attributesh]hConfigure Attributes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hhh](h)}(hSurvivability mode:h]hSurvivability mode:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(h|Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it::h]h{Enable survivability mode on supported cards. This setting only takes effect when probing the device. Example to enable it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKLhjubjH)}(h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_modeh]h@# echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKOhjubh)}(h /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hL# echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKehj#ubh)}(hAllow only the primary GT of each tile to be initialized and used, effectively disabling the media GT if it exists on the platform::h]hAllow only the primary GT of each tile to be initialized and used, effectively disabling the media GT if it exists on the platform:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKghj#ubjH)}(hF# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hF# echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKjhj#ubh)}(hAllow only the media GT of each tile to be initialized and used, effectively disabling the primary GT. **This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**::h](hhAllow only the media GT of each tile to be initialized and used, effectively disabling the primary GT. }(hjhhhNhNubhstrong)}(h**This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**h]hThis configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKlhj#ubjH)}(hD# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]hD# echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKqhj#ubh)}(hDisable all GTs. Only other GPU IP (such as display) is potentially usable. **This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**::h](hMDisable all GTs. Only other GPU IP (such as display) is potentially usable. }(hjhhhNhNubj)}(h**This configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future**h]hThis configuration will cause device probe failure on all current platforms, but may be allowed on igpu platforms in the future}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKshj#ubjH)}(h?# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowedh]h?# echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKwhj#ubeh}(h]allowed-gt-typesah ]h"]allowed gt types:ah$]h&]uh1hhjubh)}(hhh](h)}(hAllowed engines:h]hAllowed engines:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(hAllow only a set of engine(s) to be available, disabling the other engines even if they are available in hardware. This is applied after HW fuses are considered on each tile. Examples:h]hAllow only a set of engine(s) to be available, disabling the other engines even if they are available in hardware. This is applied after HW fuses are considered on each tile. Examples:}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chK|hjubh)}(h:Allow only one render and one copy engines, nothing else::h]h9Allow only one render and one copy engines, nothing else:}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjEsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(h2Allow only compute engines and first copy engine::h]h1Allow only compute engines and first copy engine:}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowedh]hG# echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed}hjcsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(hNote that the engine names are the per-GT hardware names. On multi-tile platforms, writing ``rcs0,bcs0`` to this file would allow the first render and copy engines on each tile.h](h[Note that the engine names are the per-GT hardware names. On multi-tile platforms, writing }(hjrhhhNhNubh)}(h ``rcs0,bcs0``h]h rcs0,bcs0}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrubhI to this file would allow the first render and copy engines on each tile.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it's disabled. This is intended for debugging purposes only.h]hThe requested configuration may not be supported by the platform and driver may fail to probe. For example: if at least one copy engine is expected to be available for migrations, but it’s disabled. This is intended for debugging purposes only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(h /sys/kernel/config/xe/0000:03:00.0/enable_psmih]h9# echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubh)}(h cmd [[dword0] [dword1] [...]] h](h)}(hGeneric instruction::h]hGeneric instruction:}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj5ubjH)}(h4 cmd [[dword0] [dword1] [...]]h]h4 cmd [[dword0] [dword1] [...]]}hjHsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj5ubeh}(h]h ]h"]h$]h&]uh1j3hj0ubj4)}(hBSimple register setting:: reg
h](h)}(hSimple register setting::h]hSimple register setting:}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj]ubjH)}(h$ reg
h]h$ reg
}hjpsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhj]ubeh}(h]h ]h"]h$]h&]uh1j3hj0ubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j.hjubh)}(hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.h]hCommands are saved per engine class: all instances of that class will execute those commands during context switch. The instruction, dword arguments, addresses and values are in hex format like in the examples below.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubj/)}(hhh](j4)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb h](h)}(h_Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore::h]h^Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the normal context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bbh]hk# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1j3hjubj4)}(hExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:: # echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh](h)}(hfExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore::h]heExecute a LRI command to write 0xDEADBEEF to register 0x4f10 at the beginning of the context restore:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bbh]hj# echo 'rcs cmd 11000001 4F100 DEADBEEF' \ > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]h ]h"]h$]h&]uh1j3hjubj4)}(hXtLoad certain values in a couple of registers (it can be used as a simpler alternative to the `cmd`) action:: # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb < /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hv# echo unlimited > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjfubh)}(h+How to enable PF with support up to 3 VFs::h]h*How to enable PF with support up to 3 VFs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjfubjH)}(hn# echo 3 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hn# echo 3 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjfubh)}(h1How to disable PF mode and always run as native::h]h0How to disable PF mode and always run as native:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjfubjH)}(hn# echo 0 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bindh]hn# echo 0 > /sys/kernel/config/xe/0000:00:02.0/sriov/max_vfs # echo 0000:00:02.0 > /sys/bus/pci/drivers/xe/bind}hjsbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjfubh)}(h7This setting only takes effect when probing the device.h]h7This setting only takes effect when probing the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjfubeh}(h]max-sr-iov-virtual-functionsah ]h"]max sr-iov virtual functionsah$]h&]uh1hhjubeh}(h]configure-attributesah ]h"]configure attributesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(hRemove devicesh]hRemove devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhNhNubh)}(h?The created device directories can be removed using ``rmdir``::h](h4The created device directories can be removed using }(hjhhhNhNubh)}(h ``rmdir``h]hrmdir}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubjH)}(h+# rmdir /sys/kernel/config/xe/0000:03:00.0/h]h+# rmdir /sys/kernel/config/xe/0000:03:00.0/}hj@sbah}(h]h ]h"]h$]h&]hhuh1jGhb/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:9: ./drivers/gpu/drm/xe/xe_configfs.chKhjubeh}(h]remove-devicesah ]h"]remove devicesah$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(h Internal APIh]h Internal API}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhhhhhK ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single%xe_configfs_check_device (C function)c.xe_configfs_check_devicehNtauh1jhhjWhhhNhNubhdesc)}(hhh](hdesc_signature)}(h4void xe_configfs_check_device (struct pci_dev *pdev)h]hdesc_signature_line)}(h3void xe_configfs_check_device(struct pci_dev *pdev)h](hdesc_sig_keyword_type)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM0ubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhM0ubh desc_name)}(hxe_configfs_check_deviceh]h desc_sig_name)}(hxe_configfs_check_deviceh]hxe_configfs_check_device}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jhjhhhjhM0ubhdesc_parameterlist)}(h(struct pci_dev *pdev)h]hdesc_parameter)}(hstruct pci_dev *pdevh](hdesc_sig_keyword)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomaincreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}jjsbc.xe_configfs_check_deviceasbuh1hhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubhdesc_sig_punctuation)}(h*h]h*}(hj3hhhNhNubah}(h]h ]pah"]h$]h&]uh1j1hjubj)}(hpdevh]hpdev}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhM0ubeh}(h]h ]h"]h$]h&]hh add_permalinkuh1jsphinx_line_type declaratorhjhhhjhM0ubah}(h]jwah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j~hjhM0hj{hhubh desc_content)}(hhh]h)}(h)Test if device was configured by configfsh]h)Test if device was configured by configfs}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM0hjshhubah}(h]h ]h"]h$]h&]uh1jqhj{hhhjhM0ubeh}(h]h ](jfunctioneh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jyhhhjWhNhNubh container)}(h**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device to test **Description** Try to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM4hjubhdefinition_list)}(hhh]hdefinition_list_item)}(h>``struct pci_dev *pdev`` the :c:type:`pci_dev` device to test h](hterm)}(h``struct pci_dev *pdev``h]h)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM1hjubh definition)}(hhh]h)}(h$the :c:type:`pci_dev` device to testh](hthe }(hjhhhNhNubh)}(h:c:type:`pci_dev`h]h)}(hjh]hpci_dev}(hjhhhNhNubah}(h]h ](xrefjc-typeeh"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]refdocgpu/xe/xe_configfs refdomainjreftypetype refexplicitrefwarnjj)}j]sb reftargetpci_devuh1hhjhM1hjubh device to test}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj+h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM3hjubh)}(hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.h]hTry to find the configfs group that belongs to the specified pci device and print a diagnostic message if different than the default value.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chM2hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju/xe_configfs_get_survivability_mode (C function)$c.xe_configfs_get_survivability_modehNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(h>bool xe_configfs_get_survivability_mode (struct pci_dev *pdev)h]j)}(h=bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)h](j)}(hboolh]hbool}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMGubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhj~hMGubj)}(h"xe_configfs_get_survivability_modeh]j)}(h"xe_configfs_get_survivability_modeh]h"xe_configfs_get_survivability_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhjlhhhj~hMGubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb$c.xe_configfs_get_survivability_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj2)}(hj5h]h*}(hjhhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hjubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjlhhhj~hMGubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehjhhhhj~hMGubah}(h]jcah ](jijjeh"]h$]h&]jnjo)jphuh1j~hj~hMGhjehhubjr)}(hhh]h)}(h)get configfs survivability mode attributeh]h)get configfs survivability mode attribute}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMGhj- hhubah}(h]h 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]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMJhjL ubh)}(h(survivability_mode attribute in configfsh]h(survivability_mode attribute in configfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMJhjL ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju+xe_configfs_primary_gt_allowed (C function) c.xe_configfs_primary_gt_allowedhNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(h:bool xe_configfs_primary_gt_allowed (struct pci_dev *pdev)h]j)}(h9bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)h](j)}(hjrh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMiubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMiubj)}(hxe_configfs_primary_gt_allowedh]j)}(hxe_configfs_primary_gt_allowedh]hxe_configfs_primary_gt_allowed}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jhj hhhj hMiubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hj- hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubj)}(h h]h }(hj: hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjK hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjH ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjM modnameN classnameNjj)}j]j)}jj sb c.xe_configfs_primary_gt_allowedasbuh1hhj) ubj)}(h h]h }(hjk hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubj2)}(hj5h]h*}(hjy hhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj) ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj% ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj hMiubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehj hhhj hMiubah}(h]j ah ](jijjeh"]h$]h&]jnjo)jphuh1j~hj hMihj hhubjr)}(hhh]h)}(h+determine whether primary GTs are supportedh]h+determine whether primary GTs are supported}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMihj hhubah}(h]h ]h"]h$]h&]uh1jqhj hhhj hMiubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jyhhhjWhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** True if primary GTs are enabled, false if they have been disabled via configfs.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMmhj ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]h)}(hj h]hstruct pci_dev *pdev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMjhj ubj)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMjhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMjhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hj, h]hReturn}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj* ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMlhj ubh)}(hOTrue if primary GTs are enabled, false if they have been disabled via configfs.h]hOTrue if primary GTs are enabled, false if they have been disabled via configfs.}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMlhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju)xe_configfs_media_gt_allowed (C function)c.xe_configfs_media_gt_allowedhNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(h8bool xe_configfs_media_gt_allowed (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)h](j)}(hjrh]hbool}(hjq hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMuubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm hhhj~ hMuubj)}(hxe_configfs_media_gt_allowedh]j)}(hxe_configfs_media_gt_allowedh]hxe_configfs_media_gt_allowed}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jhjm hhhj~ hMuubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj sbc.xe_configfs_media_gt_allowedasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj2)}(hj5h]h*}(hj hhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ubah}(h]h ]h"]h$]h&]hhuh1jhjm hhhj~ hMuubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehji hhhj~ hMuubah}(h]jd ah ](jijjeh"]h$]h&]jnjo)jphuh1j~hj~ hMuhjf hhubjr)}(hhh]h)}(h)determine whether media GTs are supportedh]h)determine whether media GTs are supported}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMuhj- hhubah}(h]h ]h"]h$]h&]uh1jqhjf hhhj~ hMuubeh}(h]h ](jfunctioneh"]h$]h&]jjjjH jjH jjjuh1jyhhhjWhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device **Return** True if the media GTs are enabled, false if they have been disabled via configfs.h](h)}(h**Parameters**h]j)}(hjR h]h Parameters}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjP ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMyhjL ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]h)}(hjq h]hstruct pci_dev *pdev}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjo ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMvhjk ubj)}(hhh]h)}(h pci deviceh]h pci device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMvhj ubah}(h]h ]h"]h$]h&]uh1jhjk ubeh}(h]h ]h"]h$]h&]uh1jhj hMvhjh ubah}(h]h ]h"]h$]h&]uh1jhjL ubh)}(h **Return**h]j)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMxhjL ubh)}(hQTrue if the media GTs are enabled, false if they have been disabled via configfs.h]hQTrue if the media GTs are enabled, false if they have been disabled via configfs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMxhjL ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju,xe_configfs_get_engines_allowed (C function)!c.xe_configfs_get_engines_allowedhNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(h:u64 xe_configfs_get_engines_allowed (struct pci_dev *pdev)h]j)}(h9u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)h](h)}(hhh]j)}(hu64h]hu64}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jxe_configfs_get_engines_allowedsb!c.xe_configfs_get_engines_allowedasbuh1hhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hxe_configfs_get_engines_allowedh]j)}(hj h]hxe_configfs_get_engines_allowed}(hj( hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ ubah}(h]h ](jjeh"]h$]h&]hhuh1jhj hhhj hMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjC hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj? ubj)}(h h]h }(hjP hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj? ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hja hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjc modnameN classnameNjj)}j]j !c.xe_configfs_get_engines_allowedasbuh1hhj? ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj? ubj2)}(hj5h]h*}(hj hhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj? ubj)}(hpdevh]hpdev}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj? ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj; ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehj hhhj hMubah}(h]j ah ](jijjeh"]h$]h&]jnjo)jphuh1j~hj hMhj hhubjr)}(hhh]h)}(h%get engine allowed mask from configfsh]h%get engine allowed mask from configfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj hhubah}(h]h ]h"]h$]h&]uh1jqhj hhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jyhhhjWhNhNubj)}(hs**Parameters** ``struct pci_dev *pdev`` pci device **Return** engine mask with allowed engines set in configfsh](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]h)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubj)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h **Return**h]j)}(hj@h]hReturn}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubh)}(h0engine mask with allowed engines set in configfsh]h0engine mask with allowed engines set in configfs}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju)xe_configfs_get_psmi_enabled (C function)c.xe_configfs_get_psmi_enabledhNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(h8bool xe_configfs_get_psmi_enabled (struct pci_dev *pdev)h]j)}(h7bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)h](j)}(hjrh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hxe_configfs_get_psmi_enabledh]j)}(hxe_configfs_get_psmi_enabledh]hxe_configfs_get_psmi_enabled}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.xe_configfs_get_psmi_enabledasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj2)}(hj5h]h*}(hj hhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hjubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehj}hhhjhMubah}(h]jxah ](jijjeh"]h$]h&]jnjo)jphuh1j~hjhMhjzhhubjr)}(hhh]h)}(h get configfs enable_psmi settingh]h get configfs enable_psmi setting}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjAhhubah}(h]h ]h"]h$]h&]uh1jqhjzhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj\jj\jjjuh1jyhhhjWhNhNubj)}(hb**Parameters** ``struct pci_dev *pdev`` pci device **Return** enable_psmi setting in configfsh](h)}(h**Parameters**h]j)}(hjfh]h Parameters}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj`ubj)}(hhh]j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]h)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhj|ubah}(h]h ]h"]h$]h&]uh1jhj`ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj`ubh)}(henable_psmi setting in configfsh]henable_psmi setting in configfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj`ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju/xe_configfs_get_ctx_restore_mid_bb (C function)$c.xe_configfs_get_ctx_restore_mid_bbhNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(hiu32 xe_configfs_get_ctx_restore_mid_bb (struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h]j)}(hhu32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}j"xe_configfs_get_ctx_restore_mid_bbsb$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj)hMubj)}(h"xe_configfs_get_ctx_restore_mid_bbh]j)}(hj&h]h"xe_configfs_get_ctx_restore_mid_bb}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhj)hMubj)}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]j$$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj2)}(hj5h]h*}(hjhhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hjSubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjOubj)}(henum xe_engine_class classh](j)}(henumh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hxe_engine_classh]hxe_engine_class}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j$$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hclassh]hclass}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjOubj)}(hconst u32 **csh](j)}(hconsth]hconst}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubh)}(hhh]j)}(hu32h]hu32}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjLmodnameN classnameNjj)}j]j$$c.xe_configfs_get_ctx_restore_mid_bbasbuh1hhj'ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj2)}(hj5h]h*}(hjvhhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj'ubj2)}(hj5h]h*}(hjhhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj'ubj)}(hcsh]hcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjOubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhj)hMubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehjhhhj)hMubah}(h]jah ](jijjeh"]h$]h&]jnjo)jphuh1j~hj)hMhjhhubjr)}(hhh]h)}(h'get configfs ctx_restore_mid_bb settingh]h'get configfs ctx_restore_mid_bb setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jqhjhhhj)hMubeh}(h]h P](jfunctioneh"]h$]h&]jjjjjjjjjuh1jyhhhjWhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the mid_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh](j)}(h$``struct pci_dev *pdev`` pci device h](j)}(h``struct pci_dev *pdev``h]h)}(hjh]hstruct pci_dev *pdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubj)}(hhh]h)}(h pci deviceh]h pci device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(h/``enum xe_engine_class class`` hw engine class h](j)}(h``enum xe_engine_class class``h]h)}(hj4h]henum xe_engine_class class}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2ubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhj.ubj)}(hhh]h)}(hhw engine classh]hhw engine class}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhjIhMhjubj)}(hF``const u32 **cs`` pointer to the bb to use - only valid during probe h](j)}(h``const u32 **cs``h]h)}(hjmh]hconst u32 **cs}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkubah}(h]h ]h"]h$]h&]uh1jhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjgubj)}(hhh]h)}(h2pointer to the bb to use - only valid during probeh]h2pointer to the bb to use - only valid during probe}(hjhhhNhNubah}(h]h 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u32 **cs)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j#xe_configfs_get_ctx_restore_post_bbsb%c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h#xe_configfs_get_ctx_restore_post_bbh]j)}(hjh]h#xe_configfs_get_ctx_restore_post_bb}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(hB(struct pci_dev *pdev, enum xe_engine_class class, const u32 **cs)h](j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_modnameN classnameNjj)}j]j %c.xe_configfs_get_ctx_restore_post_bbasbuh1hhj;ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj2)}(hj5h]h*}(hjhhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj;ubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj7ubj)}(henum xe_engine_class classh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hxe_engine_classh]hxe_engine_class}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j %c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hclassh]hclass}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj7ubj)}(hconst u32 **csh](j)}(hj-h]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu32h]hu32}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj2modnameN classnameNjj)}j]j %c.xe_configfs_get_ctx_restore_post_bbasbuh1hhjubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj2)}(hj5h]h*}(hj\hhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hjubj2)}(hj5h]h*}(hjihhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hjubj)}(hcsh]hcs}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj7ubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehjhhhjhMubah}(h]jah ](jijjeh"]h$]h&]jnjo)jphuh1j~hjhMhjhhubjr)}(hhh]h)}(h(get configfs ctx_restore_post_bb settingh]h(get configfs ctx_restore_post_bb setting}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jqhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jyhhhjWhNhNubj)}(h**Parameters** ``struct pci_dev *pdev`` pci device ``enum xe_engine_class class`` hw engine class ``const u32 **cs`` pointer to the bb to use - only valid during probe **Return** Number of dwords used in the post_ctx_restore setting in configfsh](h)}(h**Parameters**h]j)}(hjh]h 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]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjWhhhNhNubji)}(hhh]h}(h]h ]h"]h$]h&]entries](ju$xe_configfs_get_max_vfs (C function)c.xe_configfs_get_max_vfshNtauh1jhhjWhhhNhNubjz)}(hhh](j)}(h;unsigned int xe_configfs_get_max_vfs (struct pci_dev *pdev)h]j)}(h:unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)h](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hxe_configfs_get_max_vfsh]j)}(hxe_configfs_get_max_vfsh]hxe_configfs_get_max_vfs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h(struct pci_dev *pdev)h]j)}(hstruct pci_dev *pdevh](j)}(hjh]hstruct}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubh)}(hhh]j)}(hpci_devh]hpci_dev}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjLmodnameN classnameNjj)}j]j)}jjsbc.xe_configfs_get_max_vfsasbuh1hhj(ubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj2)}(hj5h]h*}(hjxhhhNhNubah}(h]h ]j>ah"]h$]h&]uh1j1hj(ubj)}(hpdevh]hpdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj$ubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjcuh1jjdjehjhhhjhMubah}(h]jah ](jijjeh"]h$]h&]jnjo)jphuh1j~hjhMhjhhubjr)}(hhh]h)}(h'Get number of VFs that could be managedh]h'Get number of VFs that could be managed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/xe/xe_configfs:15: ./drivers/gpu/drm/xe/xe_configfs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jqhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jyhhhjWhNhNubj)}(hXn**Parameters** ``struct pci_dev *pdev`` the :c:type:`pci_dev` device **Description** Find the configfs group that belongs to the PCI device and return maximum number of Virtual Functions (VFs) that could be managed by this device. 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