€•Ã.Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ/translations/zh_CN/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/zh_TW/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/it_IT/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/ja_JP/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/ko_KR/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/pt_BR/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/sp_SP/gpu/v3d”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ$drm/v3d Broadcom V3D Graphics Driver”h]”hŒ$drm/v3d Broadcom V3D Graphics Driver”…””}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³Œ5/var/lib/git/docbuild/linux/Documentation/gpu/v3d.rst”h´KubhŒ paragraph”“”)”}”(hŒjThis driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs. For V3D 2.x support, see the VC4 driver.”h]”hŒjThis driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs. For V3D 2.x support, see the VC4 driver.”…””}”(hhÍh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³ŒT/var/lib/git/docbuild/linux/Documentation/gpu/v3d:5: ./drivers/gpu/drm/v3d/v3d_drv.c”h´Khh·h²hubhÌ)”}”(hŒ—The V3D GPU includes a tiled render (composed of a bin and render pipelines), the TFU (texture formatting unit), and the CSD (compute shader dispatch).”h]”hŒ—The V3D GPU includes a tiled render (composed of a bin and render pipelines), the TFU (texture formatting unit), and the CSD (compute shader dispatch).”…””}”(hhÜh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³ŒT/var/lib/git/docbuild/linux/Documentation/gpu/v3d:5: ./drivers/gpu/drm/v3d/v3d_drv.c”h´Khh·h²hubh¶)”}”(hhh]”(h»)”}”(hŒ!GPU buffer object (BO) management”h]”hŒ!GPU buffer object (BO) management”…””}”(hhîh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhhëh²hh³hÊh´K ubhÌ)”}”(hŒ’Compared to VC4 (V3D 2.x), V3D 3.3 introduces an MMU between the GPU and the bus, allowing us to use shmem objects for our storage instead of CMA.”h]”hŒ’Compared to VC4 (V3D 2.x), V3D 3.3 introduces an MMU between the GPU and the bus, allowing us to use shmem objects for our storage instead of CMA.”…””}”(hhüh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³ŒT/var/lib/git/docbuild/linux/Documentation/gpu/v3d:11: ./drivers/gpu/drm/v3d/v3d_bo.c”h´Khhëh²hubhÌ)”}”(hX>Physically contiguous objects may still be imported to V3D, but the driver doesn't allocate physically contiguous objects on its own. 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It has a single level of page tables for the V3D's 4GB address space to map to AXI bus addresses, thus it could need up to 4MB of physically contiguous memory to store the PTEs.”h]”hŒïThe V3D 3.x hardware (compared to VC4) now includes an MMU. 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This is not yet implemented.”h]”hŒªTo protect clients from each other, we should use the GMP to quickly mask out (at 128kb granularity) what pages are available to each client. This is not yet implemented.”…””}”(hjIh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³ŒU/var/lib/git/docbuild/linux/Documentation/gpu/v3d:16: ./drivers/gpu/drm/v3d/v3d_mmu.c”h´Khjh²hubeh}”(h]”Œaddress-space-management”ah ]”h"]”Œaddress space management”ah$]”h&]”uh1hµhhëh²hh³hÊh´Kubh¶)”}”(hhh]”(h»)”}”(hŒGPU Scheduling”h]”hŒGPU Scheduling”…””}”(hjch²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj`h²hh³hÊh´KubhÌ)”}”(hX The shared DRM GPU scheduler is used to coordinate submitting jobs to the hardware. Each DRM fd (roughly a client process) gets its own scheduler entity, which will process jobs in order. The GPU scheduler will schedule the clients with a FIFO scheduling algorithm.”h]”hX The shared DRM GPU scheduler is used to coordinate submitting jobs to the hardware. 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