sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget/translations/zh_CN/gpu/tegramodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/zh_TW/gpu/tegramodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/it_IT/gpu/tegramodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ja_JP/gpu/tegramodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ko_KR/gpu/tegramodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/pt_BR/gpu/tegramodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/sp_SP/gpu/tegramodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h-drm/tegra NVIDIA Tegra GPU and display driverh]h-drm/tegra NVIDIA Tegra GPU and display driver}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh7/var/lib/git/docbuild/linux/Documentation/gpu/tegra.rsthKubh paragraph)}(hX+NVIDIA Tegra SoCs support a set of display, graphics and video functions via the host1x controller. host1x supplies command streams, gathered from a push buffer provided directly by the CPU, to its clients via channels. Software, or blocks amongst themselves, can use syncpoints for synchronization.h]hX+NVIDIA Tegra SoCs support a set of display, graphics and video functions via the host1x controller. host1x supplies command streams, gathered from a push buffer provided directly by the CPU, to its clients via channels. Software, or blocks amongst themselves, can use syncpoints for synchronization.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXUp until, but not including, Tegra124 (aka Tegra K1) the drm/tegra driver supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting with Tegra124 the GPU is based on the NVIDIA desktop GPU architecture and supported by the drm/nouveau driver.h]hXUp until, but not including, Tegra124 (aka Tegra K1) the drm/tegra driver supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting with Tegra124 the GPU is based on the NVIDIA desktop GPU architecture and supported by the drm/nouveau driver.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h]The drm/tegra driver supports NVIDIA Tegra SoC generations since Tegra20. It has three parts:h]h]The drm/tegra driver supports NVIDIA Tegra SoC generations since Tegra20. It has three parts:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(hXD- A host1x driver that provides infrastructure and access to the host1x services. - A KMS driver that supports the display controllers as well as a number of outputs, such as RGB, HDMI, DSI, and DisplayPort. - A set of custom userspace IOCTLs that can be used to submit jobs to the GPU and video engines via host1x. h]h bullet_list)}(hhh](h list_item)}(hPA host1x driver that provides infrastructure and access to the host1x services. h]h)}(hOA host1x driver that provides infrastructure and access to the host1x services.h]hOA host1x driver that provides infrastructure and access to the host1x services.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhhubj)}(h|A KMS driver that supports the display controllers as well as a number of outputs, such as RGB, HDMI, DSI, and DisplayPort. h]h)}(h{A KMS driver that supports the display controllers as well as a number of outputs, such as RGB, HDMI, DSI, and DisplayPort.h]h{A KMS driver that supports the display controllers as well as a number of outputs, such as RGB, HDMI, DSI, and DisplayPort.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhhubj)}(hjA set of custom userspace IOCTLs that can be used to submit jobs to the GPU and video engines via host1x. h]h)}(hiA set of custom userspace IOCTLs that can be used to submit jobs to the GPU and video engines via host1x.h]hiA set of custom userspace IOCTLs that can be used to submit jobs to the GPU and video engines via host1x.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj4ubah}(h]h ]h"]h$]h&]uh1jhhubeh}(h]h ]h"]h$]h&]bullet-uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hDriver Infrastructureh]hDriver Infrastructure}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhhhhhKubh)}(hXDThe various host1x clients need to be bound together into a logical device in order to expose their functionality to users. The infrastructure that supports this is implemented in the host1x driver. When a driver is registered with the infrastructure it provides a list of compatible strings specifying the devices that it needs. The infrastructure creates a logical device and scan the device tree for matching device nodes, adding the required clients to a list. Drivers for individual clients register with the infrastructure as well and are added to the logical host1x device.h]hXDThe various host1x clients need to be bound together into a logical device in order to expose their functionality to users. The infrastructure that supports this is implemented in the host1x driver. When a driver is registered with the infrastructure it provides a list of compatible strings specifying the devices that it needs. The infrastructure creates a logical device and scan the device tree for matching device nodes, adding the required clients to a list. Drivers for individual clients register with the infrastructure as well and are added to the logical host1x device.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjZhhubh)}(hOnce all clients are available, the infrastructure will initialize the logical device using a driver-provided function which will set up the bits specific to the subsystem and in turn initialize each of its clients.h]hOnce all clients are available, the infrastructure will initialize the logical device using a driver-provided function which will set up the bits specific to the subsystem and in turn initialize each of its clients.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjZhhubh)}(hSimilarly, when one of the clients is unregistered, the infrastructure will destroy the logical device by calling back into the driver, which ensures that the subsystem specific bits are torn down and the clients destroyed in turn.h]hSimilarly, when one of the clients is unregistered, the infrastructure will destroy the logical device by calling back into the driver, which ensures that the subsystem specific bits are torn down and the clients destroyed in turn.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hjZhhubh)}(hhh](h)}(hHost1x Infrastructure Referenceh]hHost1x Infrastructure Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK0ubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singlehost1x_bo_cache (C struct)c.host1x_bo_cachehNtauh1jhjhhhNhNubhdesc)}(hhh](hdesc_signature)}(hhost1x_bo_cacheh]hdesc_signature_line)}(hstruct host1x_bo_cacheh](hdesc_sig_keyword)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubh desc_name)}(hhost1x_bo_cacheh]h desc_sig_name)}(hjh]hhost1x_bo_cache}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j  add_permalinkuh1jsphinx_line_type declaratorhjhhhjhKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhjhKhjhhubh desc_content)}(hhh]h)}(hhost1x buffer object cacheh]hhost1x buffer object cache}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK%hj!hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](cstructeh"]h$]h&]domainj<objtypej=desctypej=noindex noindexentrynocontentsentryuh1jhhhjhNhNubh container)}(h**Definition**:: struct host1x_bo_cache { struct list_head mappings; struct mutex lock; }; **Members** ``mappings`` list of mappings ``lock`` synchronizes accesses to the list of mappingsh](h)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjMubh:}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK)hjIubh literal_block)}(hQstruct host1x_bo_cache { struct list_head mappings; struct mutex lock; };h]hQstruct host1x_bo_cache { struct list_head mappings; struct mutex lock; };}hjnsbah}(h]h ]h"]h$]h&]j j uh1jlhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK+hjIubh)}(h **Members**h]jR)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj}ubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK0hjIubhdefinition_list)}(hhh](hdefinition_list_item)}(h``mappings`` list of mappings h](hterm)}(h ``mappings``h]hliteral)}(hjh]hmappings}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK'hjubh definition)}(hhh]h)}(hlist of mappingsh]hlist of mappings}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK'hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK'hjubj)}(h6``lock`` synchronizes accesses to the list of mappingsh](j)}(h``lock``h]j)}(hjh]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK'hjubj)}(hhh]h)}(h-synchronizes accesses to the list of mappingsh]h-synchronizes accesses to the list of mappings}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK(hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK'hjubeh}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubh)}(h**Description**h]jR)}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj"ubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK+hjhhubh)}(hXNote that entries are not periodically evicted from this cache and instead need to be explicitly released. This is used primarily for DRM/KMS where the cache's reference is released when the last reference to a buffer object represented by a mapping in this cache is dropped.h]hXNote that entries are not periodically evicted from this cache and instead need to be explicitly released. This is used primarily for DRM/KMS where the cache’s reference is released when the last reference to a buffer object represented by a mapping in this cache is dropped.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK(hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_client_ops (C struct)c.host1x_client_opshNtauh1jhjhhhNhNubj)}(hhh](j)}(hhost1x_client_opsh]j)}(hstruct host1x_client_opsh](j)}(hjh]hstruct}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK0ubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhjohK0ubj)}(hhost1x_client_opsh]j)}(hj\h]hhost1x_client_ops}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj^hhhjohK0ubeh}(h]h ]h"]h$]h&]j j juh1jjjhjZhhhjohK0ubah}(h]jUah ](jjeh"]h$]h&]jj)jhuh1jhjohK0hjWhhubj )}(hhh]h)}(hhost1x client operationsh]hhost1x client operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK@hjhhubah}(h]h ]h"]h$]h&]uh1jhjWhhhjohK0ubeh}(h]h ](j<structeh"]h$]h&]jAj<jBjjCjjDjEjFuh1jhhhjhNhNubjH)}(hX**Definition**:: struct host1x_client_ops { int (*early_init)(struct host1x_client *client); int (*init)(struct host1x_client *client); int (*exit)(struct host1x_client *client); int (*late_exit)(struct host1x_client *client); int (*suspend)(struct host1x_client *client); int (*resume)(struct host1x_client *client); }; **Members** ``early_init`` host1x client early initialization code ``init`` host1x client initialization code ``exit`` host1x client tear down code ``late_exit`` host1x client late tear down code ``suspend`` host1x client suspend code ``resume`` host1x client resume codeh](h)}(h**Definition**::h](jR)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKDhjubjm)}(hXGstruct host1x_client_ops { int (*early_init)(struct host1x_client *client); int (*init)(struct host1x_client *client); int (*exit)(struct host1x_client *client); int (*late_exit)(struct host1x_client *client); int (*suspend)(struct host1x_client *client); int (*resume)(struct host1x_client *client); };h]hXGstruct host1x_client_ops { int (*early_init)(struct host1x_client *client); int (*init)(struct host1x_client *client); int (*exit)(struct host1x_client *client); int (*late_exit)(struct host1x_client *client); int (*suspend)(struct host1x_client *client); int (*resume)(struct host1x_client *client); };}hjsbah}(h]h ]h"]h$]h&]j j uh1jlhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKFhjubh)}(h **Members**h]jR)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKOhjubj)}(hhh](j)}(h7``early_init`` host1x client early initialization code h](j)}(h``early_init``h]j)}(hjh]h early_init}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKBhj ubj)}(hhh]h)}(h'host1x client early initialization codeh]h'host1x client early initialization code}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKBhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj&hKBhjubj)}(h+``init`` host1x client initialization code h](j)}(h``init``h]j)}(hjJh]hinit}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKChjDubj)}(hhh]h)}(h!host1x client initialization codeh]h!host1x client initialization code}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hKChj`ubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jhj_hKChjubj)}(h&``exit`` host1x client tear down code h](j)}(h``exit``h]j)}(hjh]hexit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKDhj}ubj)}(hhh]h)}(hhost1x client tear down codeh]hhost1x client tear down code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKDhjubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jhjhKDhjubj)}(h0``late_exit`` host1x client late tear down code h](j)}(h ``late_exit``h]j)}(hjh]h late_exit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKEhjubj)}(hhh]h)}(h!host1x client late tear down codeh]h!host1x client late tear down code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKEhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKEhjubj)}(h'``suspend`` host1x client suspend code h](j)}(h ``suspend``h]j)}(hjh]hsuspend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKFhjubj)}(hhh]h)}(hhost1x client suspend codeh]hhost1x client suspend code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKFhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hKFhjubj)}(h$``resume`` host1x client resume codeh](j)}(h ``resume``h]j)}(hj.h]hresume}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKFhj(ubj)}(hhh]h)}(hhost1x client resume codeh]hhost1x client resume code}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKGhjDubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhjChKFhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_client (C struct)c.host1x_clienthNtauh1jhjhhhNhNubj)}(hhh](j)}(h host1x_clienth]j)}(hstruct host1x_clienth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKMubj)}(h host1x_clienth]j)}(hjh]h host1x_client}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]j j uh1jhjhhhjhKMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjhhhjhKMubah}(h]j{ah ](jjeh"]h$]h&]jj)jhuh1jhjhKMhj}hhubj )}(hhh]h)}(hhost1x client structureh]hhost1x client structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKRhjhhubah}(h]h ]h"]h$]h&]uh1jhj}hhhjhKMubeh}(h]h ](j<structeh"]h$]h&]jAj<jBjjCjjDjEjFuh1jhhhjhNhNubjH)}(hX**Definition**:: struct host1x_client { struct list_head list; struct device *host; struct device *dev; struct iommu_group *group; const struct host1x_client_ops *ops; enum host1x_class class; struct host1x_channel *channel; struct host1x_syncpt **syncpts; unsigned int num_syncpts; struct host1x_client *parent; unsigned int usecount; struct mutex lock; struct host1x_bo_cache cache; }; **Members** ``list`` list node for the host1x client ``host`` pointer to struct device representing the host1x controller ``dev`` pointer to struct device backing this host1x client ``group`` IOMMU group that this client is a member of ``ops`` host1x client operations ``class`` host1x class represented by this client ``channel`` host1x channel associated with this client ``syncpts`` array of syncpoints requested for this client ``num_syncpts`` number of syncpoints requested for this client ``parent`` pointer to parent structure ``usecount`` reference count for this structure ``lock`` mutex for mutually exclusive concurrency ``cache`` host1x buffer object cacheh](h)}(h**Definition**::h](jR)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKVhjubjm)}(hXstruct host1x_client { struct list_head list; struct device *host; struct device *dev; struct iommu_group *group; const struct host1x_client_ops *ops; enum host1x_class class; struct host1x_channel *channel; struct host1x_syncpt **syncpts; unsigned int num_syncpts; struct host1x_client *parent; unsigned int usecount; struct mutex lock; struct host1x_bo_cache cache; };h]hXstruct host1x_client { struct list_head list; struct device *host; struct device *dev; struct iommu_group *group; const struct host1x_client_ops *ops; enum host1x_class class; struct host1x_channel *channel; struct host1x_syncpt **syncpts; unsigned int num_syncpts; struct host1x_client *parent; unsigned int usecount; struct mutex lock; struct host1x_bo_cache cache; };}hjsbah}(h]h ]h"]h$]h&]j j uh1jlhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKXhjubh)}(h **Members**h]jR)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKhhjubj)}(hhh](j)}(h)``list`` list node for the host1x client h](j)}(h``list``h]j)}(hj7h]hlist}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKThj1ubj)}(hhh]h)}(hlist node for the host1x clienth]hlist node for the host1x client}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhKThjMubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jhjLhKThj.ubj)}(hE``host`` pointer to struct device representing the host1x controller h](j)}(h``host``h]j)}(hjph]hhost}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKUhjjubj)}(hhh]h)}(h;pointer to struct device representing the host1x controllerh]h;pointer to struct device representing the host1x controller}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKUhjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jhjhKUhj.ubj)}(h<``dev`` pointer to struct device backing this host1x client h](j)}(h``dev``h]j)}(hjh]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKVhjubj)}(hhh]h)}(h3pointer to struct device backing this host1x clienth]h3pointer to struct device backing this host1x client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKVhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKVhj.ubj)}(h6``group`` IOMMU group that this client is a member of h](j)}(h ``group``h]j)}(hjh]hgroup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKWhjubj)}(hhh]h)}(h+IOMMU group that this client is a member ofh]h+IOMMU group that this client is a member of}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKWhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKWhj.ubj)}(h!``ops`` host1x client operations h](j)}(h``ops``h]j)}(hjh]hops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKXhjubj)}(hhh]h)}(hhost1x client operationsh]hhost1x client operations}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKXhj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj0hKXhj.ubj)}(h2``class`` host1x class represented by this client h](j)}(h ``class``h]j)}(hjTh]hclass}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKYhjNubj)}(hhh]h)}(h'host1x class represented by this clienth]h'host1x class represented by this client}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKYhjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jhjihKYhj.ubj)}(h7``channel`` host1x channel associated with this client h](j)}(h ``channel``h]j)}(hjh]hchannel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKZhjubj)}(hhh]h)}(h*host1x channel associated with this clienth]h*host1x channel associated with this client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKZhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKZhj.ubj)}(h:``syncpts`` array of syncpoints requested for this client h](j)}(h ``syncpts``h]j)}(hjh]hsyncpts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK[hjubj)}(hhh]h)}(h-array of syncpoints requested for this clienth]h-array of syncpoints requested for this client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK[hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK[hj.ubj)}(h?``num_syncpts`` number of syncpoints requested for this client h](j)}(h``num_syncpts``h]j)}(hjh]h num_syncpts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK\hjubj)}(hhh]h)}(h.number of syncpoints requested for this clienth]h.number of syncpoints requested for this client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK\hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK\hj.ubj)}(h'``parent`` pointer to parent structure h](j)}(h ``parent``h]j)}(hj8h]hparent}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK]hj2ubj)}(hhh]h)}(hpointer to parent structureh]hpointer to parent structure}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhK]hjNubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhjMhK]hj.ubj)}(h0``usecount`` reference count for this structure h](j)}(h ``usecount``h]j)}(hjqh]husecount}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK^hjkubj)}(hhh]h)}(h"reference count for this structureh]h"reference count for this structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK^hjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jhjhK^hj.ubj)}(h2``lock`` mutex for mutually exclusive concurrency h](j)}(h``lock``h]j)}(hjh]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK_hjubj)}(hhh]h)}(h(mutex for mutually exclusive concurrencyh]h(mutex for mutually exclusive concurrency}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK_hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK_hj.ubj)}(h$``cache`` host1x buffer object cacheh](j)}(h ``cache``h]j)}(hjh]hcache}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK_hjubj)}(hhh]h)}(hhost1x buffer object cacheh]hhost1x buffer object cache}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK_hj.ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_driver (C struct)c.host1x_driverhNtauh1jhjhhhNhNubj)}(hhh](j)}(h host1x_driverh]j)}(hstruct host1x_driverh](j)}(hjh]hstruct}(hj= hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 hhhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhKfubj)}(h h]h }(hjK hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 hhhjJ hKfubj)}(h host1x_driverh]j)}(hj7 h]h host1x_driver}(hj] hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjY ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj9 hhhjJ hKfubeh}(h]h ]h"]h$]h&]j j juh1jjjhj5 hhhjJ hKfubah}(h]j0 ah ](jjeh"]h$]h&]jj)jhuh1jhjJ hKfhj2 hhubj )}(hhh]h)}(hhost1x logical device driverh]hhost1x logical device driver}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMphj| hhubah}(h]h ]h"]h$]h&]uh1jhj2 hhhjJ hKfubeh}(h]h ](j<structeh"]h$]h&]jAj<jBj jCj jDjEjFuh1jhhhjhNhNubjH)}(hX**Definition**:: struct host1x_driver { struct device_driver driver; const struct of_device_id *subdevs; struct list_head list; int (*probe)(struct host1x_device *device); void (*remove)(struct host1x_device *device); void (*shutdown)(struct host1x_device *device); }; **Members** ``driver`` core driver ``subdevs`` table of OF device IDs matching subdevices for this driver ``list`` list node for the driver ``probe`` called when the host1x logical device is probed ``remove`` called when the host1x logical device is removed ``shutdown`` called when the host1x logical device is shut downh](h)}(h**Definition**::h](jR)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMthj ubjm)}(hXstruct host1x_driver { struct device_driver driver; const struct of_device_id *subdevs; struct list_head list; int (*probe)(struct host1x_device *device); void (*remove)(struct host1x_device *device); void (*shutdown)(struct host1x_device *device); };h]hXstruct host1x_driver { struct device_driver driver; const struct of_device_id *subdevs; struct list_head list; int (*probe)(struct host1x_device *device); void (*remove)(struct host1x_device *device); void (*shutdown)(struct host1x_device *device); };}hj sbah}(h]h ]h"]h$]h&]j j uh1jlhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMvhj ubh)}(h **Members**h]jR)}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj ubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMhj ubj)}(hhh](j)}(h``driver`` core driver h](j)}(h ``driver``h]j)}(hj h]hdriver}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMrhj ubj)}(hhh]h)}(h core driverh]h core driver}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMrhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMrhj ubj)}(hG``subdevs`` table of OF device IDs matching subdevices for this driver h](j)}(h ``subdevs``h]j)}(hj% h]hsubdevs}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj# ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMshj ubj)}(hhh]h)}(h:table of OF device IDs matching subdevices for this driverh]h:table of OF device IDs matching subdevices for this driver}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj: hMshj; ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj: hMshj ubj)}(h"``list`` list node for the driver h](j)}(h``list``h]j)}(hj^ h]hlist}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMthjX ubj)}(hhh]h)}(hlist node for the driverh]hlist node for the driver}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjs hMthjt ubah}(h]h ]h"]h$]h&]uh1jhjX ubeh}(h]h ]h"]h$]h&]uh1jhjs hMthj ubj)}(h:``probe`` called when the host1x logical device is probed h](j)}(h ``probe``h]j)}(hj h]hprobe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMuhj ubj)}(hhh]h)}(h/called when the host1x logical device is probedh]h/called when the host1x logical device is probed}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMuhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMuhj ubj)}(h<``remove`` called when the host1x logical device is removed h](j)}(h ``remove``h]j)}(hj h]hremove}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMvhj ubj)}(hhh]h)}(h0called when the host1x logical device is removedh]h0called when the host1x logical device is removed}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMvhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMvhj ubj)}(h?``shutdown`` called when the host1x logical device is shut downh](j)}(h ``shutdown``h]j)}(hj h]hshutdown}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMvhj ubj)}(hhh]h)}(h2called when the host1x logical device is shut downh]h2called when the host1x logical device is shut down}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1hhP/var/lib/git/docbuild/linux/Documentation/gpu/tegra:50: ./include/linux/host1x.hhMwhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMvhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_device_init (C function)c.host1x_device_inithNtauh1jhjhhhNhNubj)}(hhh](j)}(h5int host1x_device_init (struct host1x_device *device)h]j)}(h4int host1x_device_init(struct host1x_device *device)h](hdesc_sig_keyword_type)}(hinth]hint}(hje hhhNhNubah}(h]h ]ktah"]h$]h&]uh1jc hj_ hhhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKubj)}(h h]h }(hju hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ hhhjt hKubj)}(hhost1x_device_inith]j)}(hhost1x_device_inith]hhost1x_device_init}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj_ hhhjt hKubhdesc_parameterlist)}(h(struct host1x_device *device)h]hdesc_parameter)}(hstruct host1x_device *deviceh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h host1x_deviceh]h host1x_device}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj<reftype identifier reftargetj modnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}j j sbc.host1x_device_initasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubhdesc_sig_punctuation)}(h*h]h*}(hj hhhNhNubah}(h]h ]pah"]h$]h&]uh1j hj ubj)}(hdeviceh]hdevice}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj ubah}(h]h ]h"]h$]h&]j j uh1j hj_ hhhjt hKubeh}(h]h ]h"]h$]h&]j j juh1jjjhj[ hhhjt hKubah}(h]jV ah ](jjeh"]h$]h&]jj)jhuh1jhjt hKhjX hhubj )}(hhh]h)}(h"initialize a host1x logical deviceh]h"initialize a host1x logical device}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhj3 hhubah}(h]h ]h"]h$]h&]uh1jhjX hhhjt hKubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjN jCjN jDjEjFuh1jhhhjhNhNubjH)}(hX**Parameters** ``struct host1x_device *device`` host1x logical device **Description** The driver for the host1x logical device can call this during execution of its :c:type:`host1x_driver.probe ` implementation to initialize each of its clients. The client drivers access the subsystem specific driver data using the :c:type:`host1x_client.parent ` field and driver data associated with it (usually by calling dev_get_drvdata()).h](h)}(h**Parameters**h]jR)}(hjX h]h Parameters}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjV ubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjR ubj)}(hhh]j)}(h7``struct host1x_device *device`` host1x logical device h](j)}(h ``struct host1x_device *device``h]j)}(hjw h]hstruct host1x_device *device}(hjy hhhNhNubah}(h]h ]h"]h$]h&]uh1jhju ubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjq ubj)}(hhh]h)}(hhost1x logical deviceh]hhost1x logical device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjq ubeh}(h]h ]h"]h$]h&]uh1jhj hKhjn ubah}(h]h ]h"]h$]h&]uh1jhjR ubh)}(h**Description**h]jR)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj ubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjR ubh)}(hXuThe driver for the host1x logical device can call this during execution of its :c:type:`host1x_driver.probe ` implementation to initialize each of its clients. The client drivers access the subsystem specific driver data using the :c:type:`host1x_client.parent ` field and driver data associated with it (usually by calling dev_get_drvdata()).h](hOThe driver for the host1x logical device can call this during execution of its }(hj hhhNhNubh)}(h-:c:type:`host1x_driver.probe `h]j)}(hj h]hhost1x_driver.probe}(hj hhhNhNubah}(h]h ](xrefj<c-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdoc gpu/tegra refdomainj<reftypetype refexplicitrefwarnj j )}j ]sb reftarget host1x_driveruh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhj ubhz implementation to initialize each of its clients. The client drivers access the subsystem specific driver data using the }(hj hhhNhNubh)}(h.:c:type:`host1x_client.parent `h]j)}(hj h]hhost1x_client.parent}(hj hhhNhNubah}(h]h ](j j<c-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainj<reftypetype refexplicitrefwarnj j j host1x_clientuh1hhj hKhj ubhQ field and driver data associated with it (usually by calling dev_get_drvdata()).}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhjR ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_device_exit (C function)c.host1x_device_exithNtauh1jhjhhhNhNubj)}(hhh](j)}(h5int host1x_device_exit (struct host1x_device *device)h]j)}(h4int host1x_device_exit(struct host1x_device *device)h](jd )}(hinth]hint}(hjC hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj? hhhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKubj)}(h h]h }(hjR hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj? hhhjQ hKubj)}(hhost1x_device_exith]j)}(hhost1x_device_exith]hhost1x_device_exit}(hjd hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj` ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj? hhhjQ hKubj )}(h(struct host1x_device *device)h]j )}(hstruct host1x_device *deviceh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj| ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj| ubh)}(hhh]j)}(h host1x_deviceh]h host1x_device}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj modnameN classnameNj j )}j ]j )}j jf sbc.host1x_device_exitasbuh1hhj| ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj| ubj )}(hj h]h*}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj| ubj)}(hdeviceh]hdevice}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj| ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjx ubah}(h]h ]h"]h$]h&]j j uh1j hj? hhhjQ hKubeh}(h]h ]h"]h$]h&]j j juh1jjjhj; hhhjQ hKubah}(h]j6 ah ](jjeh"]h$]h&]jj)jhuh1jhjQ hKhj8 hhubj )}(hhh]h)}(h"uninitialize host1x logical deviceh]h"uninitialize host1x logical device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhj8 hhhjQ hKubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjjCjjDjEjFuh1jhhhjhNhNubjH)}(hXH**Parameters** ``struct host1x_device *device`` host1x logical device **Description** When the driver for a host1x logical device is unloaded, it can call this function to tear down each of its clients. Typically this is done after a subsystem-specific data structure is removed and the functionality can no longer be used.h](h)}(h**Parameters**h]jR)}(hj%h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj#ubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjubj)}(hhh]j)}(h7``struct host1x_device *device`` host1x logical device h](j)}(h ``struct host1x_device *device``h]j)}(hjDh]hstruct host1x_device *device}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhj>ubj)}(hhh]h)}(hhost1x logical deviceh]hhost1x logical device}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhKhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhjYhKhj;ubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]jR)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj}ubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjubh)}(hWhen the driver for a host1x logical device is unloaded, it can call this function to tear down each of its clients. Typically this is done after a subsystem-specific data structure is removed and the functionality can no longer be used.h]hWhen the driver for a host1x logical device is unloaded, it can call this function to tear down each of its clients. Typically this is done after a subsystem-specific data structure is removed and the functionality can no longer be used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(host1x_driver_register_full (C function)c.host1x_driver_register_fullhNtauh1jhjhhhNhNubj)}(hhh](j)}(hTint host1x_driver_register_full (struct host1x_driver *driver, struct module *owner)h]j)}(hSint host1x_driver_register_full(struct host1x_driver *driver, struct module *owner)h](jd )}(hinth]hint}(hjhhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hjhhhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hhost1x_driver_register_fullh]j)}(hhost1x_driver_register_fullh]hhost1x_driver_register_full}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]j j uh1jhjhhhjhMubj )}(h4(struct host1x_driver *driver, struct module *owner)h](j )}(hstruct host1x_driver *driverh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h host1x_driverh]h host1x_driver}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj!modnameN classnameNj j )}j ]j )}j jsbc.host1x_driver_register_fullasbuh1hhjubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(hj h]h*}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hdriverh]hdriver}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjubj )}(hstruct module *ownerh](j)}(hjh]hstruct}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubh)}(hhh]j)}(hmoduleh]hmodule}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjmodnameN classnameNj j )}j ]j;c.host1x_driver_register_fullasbuh1hhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hownerh]howner}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjubeh}(h]h ]h"]h$]h&]j j uh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj )}(hhh]h)}(hregister a host1x driverh]hregister a host1x driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj jCj jDjEjFuh1jhhhjhNhNubjH)}(hX**Parameters** ``struct host1x_driver *driver`` host1x driver ``struct module *owner`` owner module **Description** Drivers for host1x logical devices call this function to register a driver with the infrastructure. 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A logical device will be created for each host1x instance.h](h)}(h**Parameters**h]jR)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubj)}(hhh](j)}(h/``struct host1x_driver *driver`` host1x driver h](j)}(h ``struct host1x_driver *driver``h]j)}(hj5h]hstruct host1x_driver *driver}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhj/ubj)}(hhh]h)}(h host1x driverh]h host1x driver}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhjJhMhj,ubj)}(h&``struct module *owner`` owner module h](j)}(h``struct module *owner``h]j)}(hjnh]hstruct module *owner}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jhjlubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjhubj)}(hhh]h)}(h owner moduleh]h owner module}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jhjhMhj,ubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]jR)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubh)}(hXDrivers for host1x logical devices call this function to register a driver with the infrastructure. Note that since these drive logical devices, the registration of the driver actually triggers tho logical device creation. A logical device will be created for each host1x instance.h]hXDrivers for host1x logical devices call this function to register a driver with the infrastructure. Note that since these drive logical devices, the registration of the driver actually triggers tho logical device creation. A logical device will be created for each host1x instance.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j%host1x_driver_unregister (C function)c.host1x_driver_unregisterhNtauh1jhjhhhNhNubj)}(hhh](j)}(hmodnameN classnameNj j )}j ]jc.__host1x_client_initasbuh1hhjubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(hj h]h*}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hkeyh]hkey}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjubeh}(h]h ]h"]h$]h&]j j uh1j hjkhhhj}hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjghhhj}hMubah}(h]jbah ](jjeh"]h$]h&]jj)jhuh1jhj}hMhjdhhubj )}(hhh]h)}(hinitialize a host1x clienth]hinitialize a host1x client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjdhhhj}hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjjCjjDjEjFuh1jhhhjhNhNubjH)}(h**Parameters** ``struct host1x_client *client`` host1x client ``struct lock_class_key *key`` lock class key for the client-specific mutexh](h)}(h**Parameters**h]jR)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubj)}(hhh](j)}(h/``struct host1x_client *client`` host1x client h](j)}(h ``struct host1x_client *client``h]j)}(hjh]hstruct host1x_client *client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubj)}(hhh]h)}(h host1x clienth]h host1x client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubj)}(hK``struct lock_class_key *key`` lock class key for the client-specific mutexh](j)}(h``struct lock_class_key *key``h]j)}(hjh]hstruct lock_class_key *key}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubj)}(hhh]h)}(h,lock class key for the client-specific mutexh]h,lock class key for the client-specific mutex}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhj/ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj.hMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_client_exit (C function)c.host1x_client_exithNtauh1jhjhhhNhNubj)}(hhh](j)}(h6void host1x_client_exit (struct host1x_client *client)h]j)}(h5void host1x_client_exit(struct host1x_client *client)h](jd )}(hvoidh]hvoid}(hjshhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hjohhhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjhMubj)}(hhost1x_client_exith]j)}(hhost1x_client_exith]hhost1x_client_exit}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]j j uh1jhjohhhjhMubj )}(h(struct host1x_client *client)h]j )}(hstruct host1x_client *clienth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h host1x_clienth]h host1x_client}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjmodnameN classnameNj j )}j ]j )}j jsbc.host1x_client_exitasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(hj h]h*}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hclienth]hclient}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjubah}(h]h ]h"]h$]h&]j j uh1j hjohhhjhMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjkhhhjhMubah}(h]jfah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhhubj )}(hhh]h)}(huninitialize a host1x clienth]huninitialize a host1x client}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhj0hhubah}(h]h ]h"]h$]h&]uh1jhjhhhhjhMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjKjCjKjDjEjFuh1jhhhjhNhNubjH)}(h@**Parameters** ``struct host1x_client *client`` host1x clienth](h)}(h**Parameters**h]jR)}(hjUh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjSubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjOubj)}(hhh]j)}(h.``struct host1x_client *client`` host1x clienth](j)}(h ``struct host1x_client *client``h]j)}(hjth]hstruct host1x_client *client}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&]uh1jhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjnubj)}(hhh]h)}(h host1x clienth]h host1x client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jhjhMhjkubah}(h]h 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refdomainj<reftypej reftargetj+modnameN classnameNj j )}j ]j )}j jsbc.__host1x_client_registerasbuh1hhjubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(hj h]h*}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hclienth]hclient}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjubah}(h]h ]h"]h$]h&]j j uh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj )}(hhh]h)}(hregister a host1x clienth]hregister a host1x client}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhR/var/lib/git/docbuild/linux/Documentation/gpu/tegra:52: ./drivers/gpu/host1x/bus.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjjCjjDjEjFuh1jhhhjhNhNubjH)}(hX**Parameters** ``struct host1x_client *client`` host1x client **Description** Registers a host1x client with each host1x controller instance. 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value}(hj4#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0#hKhj1#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jhj0#hKhj"ubj)}(h6``u32 *value`` return location for the syncpoint valueh](j)}(h``u32 *value``h]j)}(hjT#h]h u32 *value}(hjV#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjR#ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chKhjN#ubj)}(hhh]h)}(h'return location for the syncpoint valueh]h'return location for the syncpoint value}(hjm#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chKhjj#ubah}(h]h ]h"]h$]h&]uh1jhjN#ubeh}(h]h ]h"]h$]h&]uh1jhji#hKhj"ubeh}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"host1x_syncpt_request (C function)c.host1x_syncpt_requesthNtauh1jhjhhhNhNubj)}(hhh](j)}(h`struct host1x_syncpt * host1x_syncpt_request (struct host1x_client *client, unsigned long flags)h]j)}(h^struct host1x_syncpt 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]jah"]h$]h&]uh1jhj$$ubh)}(hhh]j)}(h host1x_clienth]h host1x_client}(hjF$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC$ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjH$modnameN classnameNj j )}j ]j#c.host1x_syncpt_requestasbuh1hhj$$ubj)}(h h]h }(hjd$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$$ubj )}(hj h]h*}(hjr$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$$ubj)}(hclienth]hclient}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$$ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj $ubj )}(hunsigned long flagsh](jd )}(hunsignedh]hunsigned}(hj$hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubjd )}(hlongh]hlong}(hj$hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(hflagsh]hflags}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj $ubeh}(h]h ]h"]h$]h&]j j uh1j hj#hhhj#hMBubeh}(h]h ]h"]h$]h&]j j juh1jjjhj#hhhj#hMBubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jhj#hMBhj#hhubj )}(hhh]h)}(hrequest a syncpointh]hrequest a syncpoint}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMBhj$hhubah}(h]h ]h"]h$]h&]uh1jhj#hhhj#hMBubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj%jCj%jDjEjFuh1jhhhjhNhNubjH)}(hX**Parameters** ``struct host1x_client *client`` client requesting the syncpoint ``unsigned long flags`` flags **Description** host1x client drivers can use this function to allocate a syncpoint for subsequent use. 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When no longer using a syncpoint, a host1x client driver needs to release it using host1x_syncpt_put().h](h)}(h**Parameters**h]jR)}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj%ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMFhj%ubj)}(hhh](j)}(hA``struct host1x_client *client`` client requesting the syncpoint h](j)}(h ``struct host1x_client *client``h]j)}(hj;%h]hstruct host1x_client *client}(hj=%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMChj5%ubj)}(hhh]h)}(hclient requesting the syncpointh]hclient requesting the syncpoint}(hjT%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjP%hMChjQ%ubah}(h]h ]h"]h$]h&]uh1jhj5%ubeh}(h]h ]h"]h$]h&]uh1jhjP%hMChj2%ubj)}(h``unsigned long flags`` flags h](j)}(h``unsigned long flags``h]j)}(hjt%h]hunsigned long flags}(hjv%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjr%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMDhjn%ubj)}(hhh]h)}(hflagsh]hflags}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMDhj%ubah}(h]h ]h"]h$]h&]uh1jhjn%ubeh}(h]h ]h"]h$]h&]uh1jhj%hMDhj2%ubeh}(h]h ]h"]h$]h&]uh1jhj%ubh)}(h**Description**h]jR)}(hj%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj%ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMFhj%ubh)}(hXhost1x client drivers can use this function to allocate a syncpoint for subsequent use. A syncpoint returned by this function will be reserved for use by the client exclusively. When no longer using a syncpoint, a host1x client driver needs to release it using host1x_syncpt_put().h]hXhost1x client drivers can use this function to allocate a syncpoint for subsequent use. A syncpoint returned by this function will be reserved for use by the client exclusively. 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A host1x client driver should call this when the syncpoint is no longer in use.h](h)}(h**Parameters**h]jR)}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj&ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMjhj&ubj)}(hhh]j)}(h.``struct host1x_syncpt *sp`` host1x syncpoint h](j)}(h``struct host1x_syncpt *sp``h]j)}(hj&h]hstruct host1x_syncpt *sp}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMghj&ubj)}(hhh]h)}(hhost1x syncpointh]hhost1x syncpoint}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 'hMghj 'ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jhj 'hMghj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubh)}(h**Description**h]jR)}(hj0'h]h Description}(hj2'hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj.'ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMihj&ubh)}(hRelease a syncpoint previously allocated using host1x_syncpt_request(). A host1x client driver should call this when the syncpoint is no longer in use.h]hRelease a syncpoint previously allocated using host1x_syncpt_request(). A host1x client driver should call this when the syncpoint is no longer in use.}(hjF'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#host1x_syncpt_read_max (C function)c.host1x_syncpt_read_maxhNtauh1jhjhhhNhNubj)}(hhh](j)}(h5u32 host1x_syncpt_read_max (struct host1x_syncpt *sp)h]j)}(h4u32 host1x_syncpt_read_max(struct host1x_syncpt *sp)h](h)}(hhh]j)}(hu32h]hu32}(hjx'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju'ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjz'modnameN classnameNj j )}j ]j )}j host1x_syncpt_read_maxsbc.host1x_syncpt_read_maxasbuh1hhjq'hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq'hhhj'hMubj)}(hhost1x_syncpt_read_maxh]j)}(hj'h]hhost1x_syncpt_read_max}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ](jjeh"]h$]h&]j j uh1jhjq'hhhj'hMubj )}(h(struct host1x_syncpt *sp)h]j )}(hstruct host1x_syncpt *sph](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj'modnameN classnameNj j )}j ]j'c.host1x_syncpt_read_maxasbuh1hhj'ubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj )}(hj h]h*}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj)}(hsph]hsp}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj'ubah}(h]h ]h"]h$]h&]j j uh1j hjq'hhhj'hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjm'hhhj'hMubah}(h]jh'ah ](jjeh"]h$]h&]jj)jhuh1jhj'hMhjj'hhubj )}(hhh]h)}(hread maximum syncpoint valueh]hread maximum syncpoint value}(hjH(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjE(hhubah}(h]h ]h"]h$]h&]uh1jhjj'hhhj'hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj`(jCj`(jDjEjFuh1jhhhjhNhNubjH)}(h**Parameters** ``struct host1x_syncpt *sp`` host1x syncpoint **Description** The maximum syncpoint value indicates how many operations there are in queue, either in channel or in a software thread.h](h)}(h**Parameters**h]jR)}(hjj(h]h Parameters}(hjl(hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjh(ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjd(ubj)}(hhh]j)}(h.``struct host1x_syncpt *sp`` host1x syncpoint h](j)}(h``struct host1x_syncpt *sp``h]j)}(hj(h]hstruct host1x_syncpt *sp}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj(ubj)}(hhh]h)}(hhost1x syncpointh]hhost1x syncpoint}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhj(hMhj(ubah}(h]h ]h"]h$]h&]uh1jhjd(ubh)}(h**Description**h]jR)}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj(ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjd(ubh)}(hxThe maximum syncpoint value indicates how many operations there are in queue, either in channel or in a software thread.h]hxThe maximum syncpoint value indicates how many operations there are in queue, either in channel or in a software thread.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjd(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#host1x_syncpt_read_min (C function)c.host1x_syncpt_read_minhNtauh1jhjhhhNhNubj)}(hhh](j)}(h5u32 host1x_syncpt_read_min (struct host1x_syncpt *sp)h]j)}(h4u32 host1x_syncpt_read_min(struct host1x_syncpt *sp)h](h)}(hhh]j)}(hu32h]hu32}(hj )hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj )ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj)modnameN classnameNj j )}j ]j )}j host1x_syncpt_read_minsbc.host1x_syncpt_read_minasbuh1hhj)hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj.)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhj-)hMubj)}(hhost1x_syncpt_read_minh]j)}(hj*)h]hhost1x_syncpt_read_min}(hj@)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<)ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj)hhhj-)hMubj )}(h(struct host1x_syncpt *sp)h]j )}(hstruct host1x_syncpt *sph](j)}(hjh]hstruct}(hj[)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW)ubj)}(h h]h }(hjh)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW)ubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hjy)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv)ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj{)modnameN classnameNj j )}j ]j()c.host1x_syncpt_read_minasbuh1hhjW)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW)ubj )}(hj h]h*}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW)ubj)}(hsph]hsp}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW)ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjS)ubah}(h]h ]h"]h$]h&]j j uh1j hj)hhhj-)hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhj)hhhj-)hMubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1jhj-)hMhj(hhubj )}(hhh]h)}(hread minimum syncpoint valueh]hread minimum syncpoint value}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj)hhubah}(h]h ]h"]h$]h&]uh1jhj(hhhj-)hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj)jCj)jDjEjFuh1jhhhjhNhNubjH)}(h**Parameters** ``struct host1x_syncpt *sp`` host1x syncpoint **Description** The minimum syncpoint value is a shadow of the current sync point value in hardware.h](h)}(h**Parameters**h]jR)}(hj)h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj)ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj)ubj)}(hhh]j)}(h.``struct host1x_syncpt *sp`` host1x syncpoint h](j)}(h``struct host1x_syncpt *sp``h]j)}(hj*h]hstruct host1x_syncpt *sp}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj*ubj)}(hhh]h)}(hhost1x syncpointh]hhost1x syncpoint}(hj6*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2*hMhj3*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhj2*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj)ubh)}(h**Description**h]jR)}(hjX*h]h Description}(hjZ*hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjV*ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj)ubh)}(hTThe minimum syncpoint value is a shadow of the current sync point value in hardware.h]hTThe minimum syncpoint value is a shadow of the current sync point value in hardware.}(hjn*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_syncpt_read (C function)c.host1x_syncpt_readhNtauh1jhjhhhNhNubj)}(hhh](j)}(h1u32 host1x_syncpt_read (struct host1x_syncpt *sp)h]j)}(h0u32 host1x_syncpt_read(struct host1x_syncpt *sp)h](h)}(hhh]j)}(hu32h]hu32}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj*modnameN classnameNj j )}j ]j )}j host1x_syncpt_readsbc.host1x_syncpt_readasbuh1hhj*hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhj*hMubj)}(hhost1x_syncpt_readh]j)}(hj*h]hhost1x_syncpt_read}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj*hhhj*hMubj )}(h(struct host1x_syncpt *sp)h]j )}(hstruct host1x_syncpt *sph](j)}(hjh]hstruct}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hj +hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj +ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj+modnameN classnameNj j )}j ]j*c.host1x_syncpt_readasbuh1hhj*ubj)}(h h]h }(hj++hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(hj h]h*}(hj9+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hsph]hsp}(hjF+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj*ubah}(h]h ]h"]h$]h&]j j uh1j hj*hhhj*hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhj*hhhj*hMubah}(h]j*ah ](jjeh"]h$]h&]jj)jhuh1jhj*hMhj*hhubj )}(hhh]h)}(h read the current syncpoint valueh]h read the current syncpoint value}(hjp+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjm+hhubah}(h]h ]h"]h$]h&]uh1jhj*hhhj*hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj+jCj+jDjEjFuh1jhhhjhNhNubjH)}(h?**Parameters** ``struct host1x_syncpt *sp`` host1x syncpointh](h)}(h**Parameters**h]jR)}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj+ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj+ubj)}(hhh]j)}(h-``struct host1x_syncpt *sp`` host1x syncpointh](j)}(h``struct host1x_syncpt *sp``h]j)}(hj+h]hstruct host1x_syncpt *sp}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj+ubj)}(hhh]h)}(hhost1x syncpointh]hhost1x syncpoint}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$host1x_syncpt_get_by_id (C function)c.host1x_syncpt_get_by_idhNtauh1jhjhhhNhNubj)}(hhh](j)}(hUstruct host1x_syncpt * host1x_syncpt_get_by_id (struct host1x *host, unsigned int id)h]j)}(hSstruct host1x_syncpt *host1x_syncpt_get_by_id(struct host1x *host, unsigned int id)h](j)}(hjh]hstruct}(hj ,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hMubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hj*,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj',ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj,,modnameN classnameNj j )}j ]j )}j host1x_syncpt_get_by_idsbc.host1x_syncpt_get_by_idasbuh1hhj,hhhj,hMubj)}(h h]h }(hjK,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hMubj )}(hj h]h*}(hjY,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj,hMubj)}(hhost1x_syncpt_get_by_idh]j)}(hjH,h]hhost1x_syncpt_get_by_id}(hjj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf,ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj,hhhj,hMubj )}(h&(struct host1x *host, unsigned int id)h](j )}(hstruct host1x *hosth](j)}(hjh]hstruct}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(hhost1xh]hhost1x}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj,modnameN classnameNj j )}j ]jF,c.host1x_syncpt_get_by_idasbuh1hhj,ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj )}(hj h]h*}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj)}(hhosth]hhost}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj},ubj )}(hunsigned int idh](jd )}(hunsignedh]hunsigned}(hj,hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj,ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubjd )}(hinth]hint}(hj-hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj,ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hidh]hid}(hj--hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj},ubeh}(h]h ]h"]h$]h&]j j uh1j hj,hhhj,hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhj,hhhj,hMubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhj,hMhj,hhubj )}(hhh]h)}(hobtain a syncpoint by IDh]hobtain a syncpoint by ID}(hjW-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjT-hhubah}(h]h ]h"]h$]h&]uh1jhj,hhhj,hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjo-jCjo-jDjEjFuh1jhhhjhNhNubjH)}(h_**Parameters** ``struct host1x *host`` host1x controller ``unsigned int id`` syncpoint IDh](h)}(h**Parameters**h]jR)}(hjy-h]h Parameters}(hj{-hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjw-ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjs-ubj)}(hhh](j)}(h*``struct host1x *host`` host1x controller h](j)}(h``struct host1x *host``h]j)}(hj-h]hstruct host1x *host}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj-ubj)}(hhh]h)}(hhost1x controllerh]hhost1x controller}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hMhj-ubj)}(h ``unsigned int id`` syncpoint IDh](j)}(h``unsigned int id``h]j)}(hj-h]hunsigned int id}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj-ubj)}(hhh]h)}(h syncpoint IDh]h syncpoint ID}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hMhj-ubeh}(h]h ]h"]h$]h&]uh1jhjs-ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j*host1x_syncpt_get_by_id_noref (C function)c.host1x_syncpt_get_by_id_norefhNtauh1jhjhhhNhNubj)}(hhh](j)}(h[struct host1x_syncpt * host1x_syncpt_get_by_id_noref (struct host1x *host, unsigned int id)h]j)}(hYstruct host1x_syncpt *host1x_syncpt_get_by_id_noref(struct host1x *host, unsigned int id)h](j)}(hjh]hstruct}(hj+.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'.hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj9.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'.hhhj8.hMubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hjJ.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG.ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjL.modnameN classnameNj j )}j ]j )}j host1x_syncpt_get_by_id_norefsbc.host1x_syncpt_get_by_id_norefasbuh1hhj'.hhhj8.hMubj)}(h h]h }(hjk.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'.hhhj8.hMubj )}(hj h]h*}(hjy.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'.hhhj8.hMubj)}(hhost1x_syncpt_get_by_id_norefh]j)}(hjh.h]hhost1x_syncpt_get_by_id_noref}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj'.hhhj8.hMubj )}(h&(struct host1x *host, unsigned int id)h](j )}(hstruct host1x *hosth](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hhost1xh]hhost1x}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj.modnameN classnameNj j )}j ]jf.c.host1x_syncpt_get_by_id_norefasbuh1hhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj )}(hj h]h*}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj)}(hhosth]hhost}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj.ubj )}(hunsigned int idh](jd )}(hunsignedh]hunsigned}(hj/hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj/ubj)}(h h]h }(hj#/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubjd )}(hinth]hint}(hj1/hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj/ubj)}(h h]h }(hj?/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(hidh]hid}(hjM/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj.ubeh}(h]h ]h"]h$]h&]j j uh1j hj'.hhhj8.hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhj#.hhhj8.hMubah}(h]j.ah ](jjeh"]h$]h&]jj)jhuh1jhj8.hMhj .hhubj )}(hhh]h)}(h9obtain a syncpoint by ID but don't increase the refcount.h]h;obtain a syncpoint by ID but don’t increase the refcount.}(hjw/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjt/hhubah}(h]h ]h"]h$]h&]uh1jhj .hhhj8.hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj/jCj/jDjEjFuh1jhhhjhNhNubjH)}(h_**Parameters** ``struct host1x *host`` host1x controller ``unsigned int id`` syncpoint IDh](h)}(h**Parameters**h]jR)}(hj/h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj/ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj/ubj)}(hhh](j)}(h*``struct host1x *host`` host1x controller h](j)}(h``struct host1x *host``h]j)}(hj/h]hstruct host1x *host}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj/ubj)}(hhh]h)}(hhost1x controllerh]hhost1x controller}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhj/hMhj/ubj)}(h ``unsigned int id`` syncpoint IDh](j)}(h``unsigned int id``h]j)}(hj/h]hunsigned int id}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj/ubj)}(hhh]h)}(h syncpoint IDh]h syncpoint ID}(hj 0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj0ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhj0hMhj/ubeh}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jhost1x_syncpt_get (C function)c.host1x_syncpt_gethNtauh1jhjhhhNhNubj)}(hhh](j)}(hCstruct host1x_syncpt * host1x_syncpt_get (struct host1x_syncpt *sp)h]j)}(hAstruct host1x_syncpt *host1x_syncpt_get(struct host1x_syncpt *sp)h](j)}(hjh]hstruct}(hjK0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG0hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hjY0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG0hhhjX0hMubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hjj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjg0ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjl0modnameN classnameNj j )}j ]j )}j host1x_syncpt_getsbc.host1x_syncpt_getasbuh1hhjG0hhhjX0hMubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG0hhhjX0hMubj )}(hj h]h*}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG0hhhjX0hMubj)}(hhost1x_syncpt_geth]j)}(hj0h]hhost1x_syncpt_get}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ](jjeh"]h$]h&]j j uh1jhjG0hhhjX0hMubj )}(h(struct host1x_syncpt *sp)h]j )}(hstruct host1x_syncpt *sph](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj0modnameN classnameNj j )}j ]j0c.host1x_syncpt_getasbuh1hhj0ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj )}(hj h]h*}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hsph]hsp}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj0ubah}(h]h ]h"]h$]h&]j j uh1j hjG0hhhjX0hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjC0hhhjX0hMubah}(h]j>0ah ](jjeh"]h$]h&]jj)jhuh1jhjX0hMhj@0hhubj )}(hhh]h)}(hincrement syncpoint refcounth]hincrement syncpoint refcount}(hjF1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjC1hhubah}(h]h ]h"]h$]h&]uh1jhj@0hhhjX0hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj^1jCj^1jDjEjFuh1jhhhjhNhNubjH)}(h8**Parameters** ``struct host1x_syncpt *sp`` syncpointh](h)}(h**Parameters**h]jR)}(hjh1h]h Parameters}(hjj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjf1ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjb1ubj)}(hhh]j)}(h&``struct host1x_syncpt *sp`` syncpointh](j)}(h``struct host1x_syncpt *sp``h]j)}(hj1h]hstruct host1x_syncpt *sp}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj1ubj)}(hhh]h)}(h syncpointh]h syncpoint}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jhj1hMhj~1ubah}(h]h ]h"]h$]h&]uh1jhjb1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#host1x_syncpt_get_base (C function)c.host1x_syncpt_get_basehNtauh1jhjhhhNhNubj)}(hhh](j)}(hMstruct host1x_syncpt_base * host1x_syncpt_get_base (struct host1x_syncpt *sp)h]j)}(hKstruct host1x_syncpt_base *host1x_syncpt_get_base(struct host1x_syncpt *sp)h](j)}(hjh]hstruct}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhj1hMubh)}(hhh]j)}(hhost1x_syncpt_baseh]hhost1x_syncpt_base}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj2modnameN classnameNj j )}j ]j )}j host1x_syncpt_get_basesbc.host1x_syncpt_get_baseasbuh1hhj1hhhj1hMubj)}(h h]h }(hj!2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhj1hMubj )}(hj h]h*}(hj/2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1hhhj1hMubj)}(hhost1x_syncpt_get_baseh]j)}(hj2h]hhost1x_syncpt_get_base}(hj@2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<2ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj1hhhj1hMubj )}(h(struct host1x_syncpt *sp)h]j )}(hstruct host1x_syncpt *sph](j)}(hjh]hstruct}(hj[2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW2ubj)}(h h]h }(hjh2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW2ubh)}(hhh]j)}(h host1x_syncpth]h host1x_syncpt}(hjy2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv2ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj{2modnameN classnameNj j )}j ]j2c.host1x_syncpt_get_baseasbuh1hhjW2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW2ubj )}(hj h]h*}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW2ubj)}(hsph]hsp}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW2ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hjS2ubah}(h]h ]h"]h$]h&]j j uh1j hj1hhhj1hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhj1hhhj1hMubah}(h]j1ah ](jjeh"]h$]h&]jj)jhuh1jhj1hMhj1hhubj )}(hhh]h)}(h0obtain the wait base associated with a syncpointh]h0obtain the wait base associated with a syncpoint}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj2hhubah}(h]h ]h"]h$]h&]uh1jhj1hhhj1hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj2jCj2jDjEjFuh1jhhhjhNhNubjH)}(h?**Parameters** ``struct host1x_syncpt *sp`` host1x syncpointh](h)}(h**Parameters**h]jR)}(hj2h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj2ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj2ubj)}(hhh]j)}(h-``struct host1x_syncpt *sp`` host1x syncpointh](j)}(h``struct host1x_syncpt *sp``h]j)}(hj3h]hstruct host1x_syncpt *sp}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj3ubj)}(hhh]h)}(hhost1x syncpointh]hhost1x syncpoint}(hj63hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj33ubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jhj23hMhj3ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"host1x_syncpt_base_id (C function)c.host1x_syncpt_base_idhNtauh1jhjhhhNhNubj)}(hhh](j)}(h;u32 host1x_syncpt_base_id (struct host1x_syncpt_base *base)h]j)}(h:u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base)h](h)}(hhh]j)}(hu32h]hu32}(hjz3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw3ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj|3modnameN classnameNj j )}j ]j )}j host1x_syncpt_base_idsbc.host1x_syncpt_base_idasbuh1hhjs3hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjs3hhhj3hMubj)}(hhost1x_syncpt_base_idh]j)}(hj3h]hhost1x_syncpt_base_id}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]j j uh1jhjs3hhhj3hMubj )}(h!(struct host1x_syncpt_base *base)h]j )}(hstruct host1x_syncpt_base *baseh](j)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(hhost1x_syncpt_baseh]hhost1x_syncpt_base}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj3modnameN classnameNj j )}j ]j3c.host1x_syncpt_base_idasbuh1hhj3ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj )}(hj h]h*}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hbaseh]hbase}(hj 4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj3ubah}(h]h ]h"]h$]h&]j j uh1j hjs3hhhj3hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhjo3hhhj3hMubah}(h]jj3ah ](jjeh"]h$]h&]jj)jhuh1jhj3hMhjl3hhubj )}(hhh]h)}(h(retrieve the ID of a syncpoint wait baseh]h(retrieve the ID of a syncpoint wait base}(hjJ4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjG4hhubah}(h]h ]h"]h$]h&]uh1jhjl3hhhj3hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBjb4jCjb4jDjEjFuh1jhhhjhNhNubjH)}(hP**Parameters** ``struct host1x_syncpt_base *base`` host1x syncpoint wait baseh](h)}(h**Parameters**h]jR)}(hjl4h]h Parameters}(hjn4hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhjj4ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhjf4ubj)}(hhh]j)}(h>``struct host1x_syncpt_base *base`` host1x syncpoint wait baseh](j)}(h#``struct host1x_syncpt_base *base``h]j)}(hj4h]hstruct host1x_syncpt_base *base}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj4ubj)}(hhh]h)}(hhost1x syncpoint wait baseh]hhost1x syncpoint wait base}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj4ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1jhjf4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j5host1x_syncpt_release_vblank_reservation (C function)*c.host1x_syncpt_release_vblank_reservationhNtauh1jhjhhhNhNubj)}(hhh](j)}(h[void host1x_syncpt_release_vblank_reservation (struct host1x_client *client, u32 syncpt_id)h]j)}(hZvoid host1x_syncpt_release_vblank_reservation(struct host1x_client *client, u32 syncpt_id)h](jd )}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jp ah"]h$]h&]uh1jc hj4hhhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhj4hMubj)}(h(host1x_syncpt_release_vblank_reservationh]j)}(h(host1x_syncpt_release_vblank_reservationh]h(host1x_syncpt_release_vblank_reservation}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]j j uh1jhj4hhhj4hMubj )}(h-(struct host1x_client *client, u32 syncpt_id)h](j )}(hstruct host1x_client *clienth](j)}(hjh]hstruct}(hj"5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hj/5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubh)}(hhh]j)}(h host1x_clienth]h host1x_client}(hj@5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=5ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetjB5modnameN classnameNj j )}j ]j )}j j5sb*c.host1x_syncpt_release_vblank_reservationasbuh1hhj5ubj)}(h h]h }(hj`5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj )}(hj h]h*}(hjn5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj)}(hclienth]hclient}(hj{5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj5ubj )}(h u32 syncpt_idh](h)}(hhh]j)}(hu32h]hu32}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainj<reftypej reftargetj5modnameN classnameNj j )}j ]j\5*c.host1x_syncpt_release_vblank_reservationasbuh1hhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h syncpt_idh]h syncpt_id}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1j hj5ubeh}(h]h ]h"]h$]h&]j j uh1j hj4hhhj4hMubeh}(h]h ]h"]h$]h&]j j juh1jjjhj4hhhj4hMubah}(h]j4ah ](jjeh"]h$]h&]jj)jhuh1jhj4hMhj4hhubj )}(hhh]h)}(h.Make VBLANK syncpoint available for allocationh]h.Make VBLANK syncpoint available for allocation}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj5hhubah}(h]h ]h"]h$]h&]uh1jhj4hhhj4hMubeh}(h]h ](j<functioneh"]h$]h&]jAj<jBj6jCj6jDjEjFuh1jhhhjhNhNubjH)}(hX**Parameters** ``struct host1x_client *client`` host1x bus client ``u32 syncpt_id`` syncpoint ID to make available **Description** Makes VBLANK syncpoint available for allocatation if it was reserved at initialization time. This should be called by the display driver after it has ensured that any VBLANK increment programming configured by the boot chain has been disabled.h](h)}(h**Parameters**h]jR)}(hj6h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj 6ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj 6ubj)}(hhh](j)}(h3``struct host1x_client *client`` host1x bus client h](j)}(h ``struct host1x_client *client``h]j)}(hj.6h]hstruct host1x_client *client}(hj06hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,6ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj(6ubj)}(hhh]h)}(hhost1x bus clienth]hhost1x bus client}(hjG6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC6hMhjD6ubah}(h]h ]h"]h$]h&]uh1jhj(6ubeh}(h]h ]h"]h$]h&]uh1jhjC6hMhj%6ubj)}(h1``u32 syncpt_id`` syncpoint ID to make available h](j)}(h``u32 syncpt_id``h]j)}(hjg6h]h u32 syncpt_id}(hji6hhhNhNubah}(h]h ]h"]h$]h&]uh1jhje6ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhja6ubj)}(hhh]h)}(hsyncpoint ID to make availableh]hsyncpoint ID to make available}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|6hMhj}6ubah}(h]h ]h"]h$]h&]uh1jhja6ubeh}(h]h ]h"]h$]h&]uh1jhj|6hMhj%6ubeh}(h]h ]h"]h$]h&]uh1jhj 6ubh)}(h**Description**h]jR)}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jQhj6ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj 6ubh)}(hMakes VBLANK syncpoint available for allocatation if it was reserved at initialization time. This should be called by the display driver after it has ensured that any VBLANK increment programming configured by the boot chain has been disabled.h]hMakes VBLANK syncpoint available for allocatation if it was reserved at initialization time. This should be called by the display driver after it has ensured that any VBLANK increment programming configured by the boot chain has been disabled.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/gpu/tegra:58: ./drivers/gpu/host1x/syncpt.chMhj 6ubeh}(h]h ] kernelindentah"]h$]h&]uh1jGhjhhhNhNubeh}(h]host1x-syncpoint-referenceah ]h"]host1x syncpoint referenceah$]h&]uh1hhjZhhhhhK8ubeh}(h]driver-infrastructureah ]h"]driver infrastructureah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h KMS driverh]h KMS driver}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hhhhhK>ubh)}(hThe display hardware has remained mostly backwards compatible over the various Tegra SoC generations, up until Tegra186 which introduces several changes that make it difficult to support with a parameterized driver.h]hThe display hardware has remained mostly backwards compatible over the various Tegra SoC generations, up until Tegra186 which introduces several changes that make it difficult to support with a parameterized driver.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hj6hhubh)}(hhh](h)}(hDisplay Controllersh]hDisplay Controllers}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hhhhhKEubh)}(hXTegra SoCs have two display controllers, each of which can be associated with zero or more outputs. Outputs can also share a single display controller, but only if they run with compatible display timings. Two display controllers can also share a single framebuffer, allowing cloned configurations even if modes on two outputs don't match. A display controller is modelled as a CRTC in KMS terms.h]hXTegra SoCs have two display controllers, each of which can be associated with zero or more outputs. Outputs can also share a single display controller, but only if they run with compatible display timings. Two display controllers can also share a single framebuffer, allowing cloned configurations even if modes on two outputs don’t match. A display controller is modelled as a CRTC in KMS terms.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhj6hhubh)}(hOn Tegra186, the number of display controllers has been increased to three. A display controller can no longer drive all of the outputs. While two of these controllers can drive both DSI outputs and both SOR outputs, the third cannot drive any DSI.h]hOn Tegra186, the number of display controllers has been increased to three. A display controller can no longer drive all of the outputs. While two of these controllers can drive both DSI outputs and both SOR outputs, the third cannot drive any DSI.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj6hhubh)}(hhh](h)}(hWindowsh]hWindows}(hj-7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*7hhhhhKTubh)}(hXA display controller controls a set of windows that can be used to composite multiple buffers onto the screen. While it is possible to assign arbitrary Z ordering to individual windows (by programming the corresponding blending registers), this is currently not supported by the driver. Instead, it will assume a fixed Z ordering of the windows (window A is the root window, that is, the lowest, while windows B and C are overlaid on top of window A). The overlay windows support multiple pixel formats and can automatically convert from YUV to RGB at scanout time. This makes them useful for displaying video content. In KMS, each window is modelled as a plane. Each display controller has a hardware cursor that is exposed as a cursor plane.h]hXA display controller controls a set of windows that can be used to composite multiple buffers onto the screen. While it is possible to assign arbitrary Z ordering to individual windows (by programming the corresponding blending registers), this is currently not supported by the driver. Instead, it will assume a fixed Z ordering of the windows (window A is the root window, that is, the lowest, while windows B and C are overlaid on top of window A). The overlay windows support multiple pixel formats and can automatically convert from YUV to RGB at scanout time. This makes them useful for displaying video content. In KMS, each window is modelled as a plane. Each display controller has a hardware cursor that is exposed as a cursor plane.}(hj;7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKVhj*7hhubeh}(h]windowsah ]h"]windowsah$]h&]uh1hhj6hhhhhKTubeh}(h]display-controllersah ]h"]display controllersah$]h&]uh1hhj6hhhhhKEubh)}(hhh](h)}(hOutputsh]hOutputs}(hj\7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY7hhhhhKbubh)}(hX6The type and number of supported outputs varies between Tegra SoC generations. All generations support at least HDMI. While earlier generations supported the very simple RGB interfaces (one per display controller), recent generations no longer do and instead provide standard interfaces such as DSI and eDP/DP.h]hX6The type and number of supported outputs varies between Tegra SoC generations. All generations support at least HDMI. While earlier generations supported the very simple RGB interfaces (one per display controller), recent generations no longer do and instead provide standard interfaces such as DSI and eDP/DP.}(hjj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhjY7hhubh)}(h;Outputs are modelled as a composite encoder/connector pair.h]h;Outputs are modelled as a composite encoder/connector pair.}(hjx7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihjY7hhubh)}(hhh](h)}(hRGB/LVDSh]hRGB/LVDS}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hhhhhKlubh)}(hwThis interface is no longer available since Tegra124. It has been replaced by the more standard DSI and eDP interfaces.h]hwThis interface is no longer available since Tegra124. It has been replaced by the more standard DSI and eDP interfaces.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhj7hhubeh}(h]rgb-lvdsah ]h"]rgb/lvdsah$]h&]uh1hhjY7hhhhhKlubh)}(hhh](h)}(hHDMIh]hHDMI}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hhhhhKrubh)}(hHDMI is supported on all Tegra SoCs. Starting with Tegra210, HDMI is provided by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able to support HDMI 2.0, though support for this is currently not merged.h]hHDMI is supported on all Tegra SoCs. Starting with Tegra210, HDMI is provided by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able to support HDMI 2.0, though support for this is currently not merged.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthj7hhubeh}(h]hdmiah ]h"]hdmiah$]h&]uh1hhjY7hhhhhKrubh)}(hhh](h)}(hDSIh]hDSI}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hhhhhKyubh)}(hXAlthough Tegra has supported DSI since Tegra30, the controller has changed in several ways in Tegra114. Since none of the publicly available development boards prior to Dalmore (Tegra114) have made use of DSI, only Tegra114 and later are supported by the drm/tegra driver.h]hXAlthough Tegra has supported DSI since Tegra30, the controller has changed in several ways in Tegra114. Since none of the publicly available development boards prior to Dalmore (Tegra114) have made use of DSI, only Tegra114 and later are supported by the drm/tegra driver.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK{hj7hhubeh}(h]dsiah ]h"]dsiah$]h&]uh1hhjY7hhhhhKyubh)}(hhh](h)}(heDP/DPh]heDP/DP}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hhhhhKubh)}(heDP was first introduced in Tegra124 where it was used to drive the display panel for notebook form factors. Tegra210 added support for full DisplayPort support, though this is currently not implemented in the drm/tegra driver.h]heDP was first introduced in Tegra124 where it was used to drive the display panel for notebook form factors. Tegra210 added support for full DisplayPort support, though this is currently not implemented in the drm/tegra driver.}(hj 8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj7hhubeh}(h]edp-dpah ]h"]edp/dpah$]h&]uh1hhjY7hhhhhKubeh}(h]outputsah ]h"]outputsah$]h&]uh1hhj6hhhhhKbubeh}(h] kms-driverah ]h"] kms driverah$]h&]uh1hhhhhhhhK>ubh)}(hhh](h)}(hUserspace Interfaceh]hUserspace Interface}(hj58hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj28hhhhhKubh)}(hThe userspace interface provided by drm/tegra allows applications to create GEM buffers, access and control syncpoints as well as submit command streams to host1x.h]hThe userspace interface provided by drm/tegra allows applications to create GEM buffers, access and control syncpoints as well as submit command streams to host1x.}(hjC8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj28hhubh)}(hhh](h)}(h GEM Buffersh]h GEM Buffers}(hjT8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQ8hhhhhKubh)}(hThe ``DRM_IOCTL_TEGRA_GEM_CREATE`` IOCTL is used to create a GEM buffer object with Tegra-specific flags. This is useful for buffers that should be tiled, or that are to be scanned out upside down (useful for 3D content).h](hThe }(hjb8hhhNhNubj)}(h``DRM_IOCTL_TEGRA_GEM_CREATE``h]hDRM_IOCTL_TEGRA_GEM_CREATE}(hjj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjb8ubh IOCTL is used to create a GEM buffer object with Tegra-specific flags. This is useful for buffers that should be tiled, or that are to be scanned out upside down (useful for 3D content).}(hjb8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjQ8hhubh)}(hAfter a GEM buffer object has been created, its memory can be mapped by an application using the mmap offset returned by the ``DRM_IOCTL_TEGRA_GEM_MMAP`` IOCTL.h](h}After a GEM buffer object has been created, its memory can be mapped by an application using the mmap offset returned by the }(hj8hhhNhNubj)}(h``DRM_IOCTL_TEGRA_GEM_MMAP``h]hDRM_IOCTL_TEGRA_GEM_MMAP}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubh IOCTL.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjQ8hhubeh}(h] gem-buffersah ]h"] gem buffersah$]h&]uh1hhj28hhhhhKubh)}(hhh](h)}(h Syncpointsh]h Syncpoints}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hhhhhKubh)}(hThe current value of a syncpoint can be obtained by executing the ``DRM_IOCTL_TEGRA_SYNCPT_READ`` IOCTL. Incrementing the syncpoint is achieved using the ``DRM_IOCTL_TEGRA_SYNCPT_INCR`` IOCTL.h](hBThe current value of a syncpoint can be obtained by executing the }(hj8hhhNhNubj)}(h``DRM_IOCTL_TEGRA_SYNCPT_READ``h]hDRM_IOCTL_TEGRA_SYNCPT_READ}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubh9 IOCTL. Incrementing the syncpoint is achieved using the }(hj8hhhNhNubj)}(h``DRM_IOCTL_TEGRA_SYNCPT_INCR``h]hDRM_IOCTL_TEGRA_SYNCPT_INCR}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubh IOCTL.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj8hhubh)}(hXUserspace can also request blocking on a syncpoint. To do so, it needs to execute the ``DRM_IOCTL_TEGRA_SYNCPT_WAIT`` IOCTL, specifying the value of the syncpoint to wait for. The kernel will release the application when the syncpoint reaches that value or after a specified timeout.h](hVUserspace can also request blocking on a syncpoint. To do so, it needs to execute the }(hj8hhhNhNubj)}(h``DRM_IOCTL_TEGRA_SYNCPT_WAIT``h]hDRM_IOCTL_TEGRA_SYNCPT_WAIT}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubh IOCTL, specifying the value of the syncpoint to wait for. The kernel will release the application when the syncpoint reaches that value or after a specified timeout.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj8hhubeh}(h] syncpointsah ]h"] syncpointsah$]h&]uh1hhj28hhhhhKubh)}(hhh](h)}(hCommand Stream Submissionh]hCommand Stream Submission}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hhhhhKubh)}(hXBefore an application can submit command streams to host1x it needs to open a channel to an engine using the ``DRM_IOCTL_TEGRA_OPEN_CHANNEL`` IOCTL. Client IDs are used to identify the target of the channel. When a channel is no longer needed, it can be closed using the ``DRM_IOCTL_TEGRA_CLOSE_CHANNEL`` IOCTL. To retrieve the syncpoint associated with a channel, an application can use the ``DRM_IOCTL_TEGRA_GET_SYNCPT``.h](hmBefore an application can submit command streams to host1x it needs to open a channel to an engine using the }(hj&9hhhNhNubj)}(h ``DRM_IOCTL_TEGRA_OPEN_CHANNEL``h]hDRM_IOCTL_TEGRA_OPEN_CHANNEL}(hj.9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&9ubh IOCTL. Client IDs are used to identify the target of the channel. When a channel is no longer needed, it can be closed using the }(hj&9hhhNhNubj)}(h!``DRM_IOCTL_TEGRA_CLOSE_CHANNEL``h]hDRM_IOCTL_TEGRA_CLOSE_CHANNEL}(hj@9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&9ubhX IOCTL. To retrieve the syncpoint associated with a channel, an application can use the }(hj&9hhhNhNubj)}(h``DRM_IOCTL_TEGRA_GET_SYNCPT``h]hDRM_IOCTL_TEGRA_GET_SYNCPT}(hjR9hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&9ubh.}(hj&9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj9hhubh)}(hX(After opening a channel, submitting command streams is easy. The application writes commands into the memory backing a GEM buffer object and passes these to the ``DRM_IOCTL_TEGRA_SUBMIT`` IOCTL along with various other parameters, such as the syncpoints or relocations used in the job submission.h](hAfter opening a channel, submitting command streams is easy. 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