€•     Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ"/translations/zh_CN/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/zh_TW/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/it_IT/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/ja_JP/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/ko_KR/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/pt_BR/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/sp_SP/gpu/rfc/gpusvm”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ*SPDX-License-Identifier: (GPL-2.0+ OR MIT)”h]”hŒ*SPDX-License-Identifier: (GPL-2.0+ OR MIT)”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1hµhhh²hh³Œ</var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒGPU SVM Section”h]”hŒGPU SVM Section”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒAgreed upon design principles”h]”hŒAgreed upon design principles”…””}”(hhàh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÝh²hh³hÇh´KubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hXD  migrate_to_ram path
      * Rely only on core MM concepts (migration PTEs, page references, and
        page locking).
      * No driver specific locks other than locks for hardware interaction in
        this path. These are not required and generally a bad idea to
        invent driver defined locks to seal core MM races.
      * An example of a driver-specific lock causing issues occurred before
        fixing do_swap_page to lock the faulting page. A driver-exclusive lock
        in migrate_to_ram produced a stable livelock if enough threads read
        the faulting page.
      * Partial migration is supported (i.e., a subset of pages attempting to
        migrate can actually migrate, with only the faulting page guaranteed
        to migrate).
      * Driver handles mixed migrations via retry loops rather than locking.”h]”hŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hXö  migrate_to_ram path
* Rely only on core MM concepts (migration PTEs, page references, and
  page locking).
* No driver specific locks other than locks for hardware interaction in
  this path. These are not required and generally a bad idea to
  invent driver defined locks to seal core MM races.
* An example of a driver-specific lock causing issues occurred before
  fixing do_swap_page to lock the faulting page. A driver-exclusive lock
  in migrate_to_ram produced a stable livelock if enough threads read
  the faulting page.
* Partial migration is supported (i.e., a subset of pages attempting to
  migrate can actually migrate, with only the faulting page guaranteed
  to migrate).
* Driver handles mixed migrations via retry loops rather than locking.”h]”(hŒterm”“”)”}”(hŒmigrate_to_ram path”h]”hŒmigrate_to_ram path”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´Khj   ubhŒ
definition”“”)”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hŒRRely only on core MM concepts (migration PTEs, page references, and
page locking).”h]”hŒ	paragraph”“”)”}”(hŒRRely only on core MM concepts (migration PTEs, page references, and
page locking).”h]”hŒRRely only on core MM concepts (migration PTEs, page references, and
page locking).”…””}”(hj"  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒ¶No driver specific locks other than locks for hardware interaction in
this path. These are not required and generally a bad idea to
invent driver defined locks to seal core MM races.”h]”j!  )”}”(hŒ¶No driver specific locks other than locks for hardware interaction in
this path. These are not required and generally a bad idea to
invent driver defined locks to seal core MM races.”h]”hŒ¶No driver specific locks other than locks for hardware interaction in
this path. These are not required and generally a bad idea to
invent driver defined locks to seal core MM races.”…””}”(hj:  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khj6  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒáAn example of a driver-specific lock causing issues occurred before
fixing do_swap_page to lock the faulting page. A driver-exclusive lock
in migrate_to_ram produced a stable livelock if enough threads read
the faulting page.”h]”j!  )”}”(hŒáAn example of a driver-specific lock causing issues occurred before
fixing do_swap_page to lock the faulting page. A driver-exclusive lock
in migrate_to_ram produced a stable livelock if enough threads read
the faulting page.”h]”hŒáAn example of a driver-specific lock causing issues occurred before
fixing do_swap_page to lock the faulting page. A driver-exclusive lock
in migrate_to_ram produced a stable livelock if enough threads read
the faulting page.”…””}”(hjR  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´KhjN  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒ—Partial migration is supported (i.e., a subset of pages attempting to
migrate can actually migrate, with only the faulting page guaranteed
to migrate).”h]”j!  )”}”(hŒ—Partial migration is supported (i.e., a subset of pages attempting to
migrate can actually migrate, with only the faulting page guaranteed
to migrate).”h]”hŒ—Partial migration is supported (i.e., a subset of pages attempting to
migrate can actually migrate, with only the faulting page guaranteed
to migrate).”…””}”(hjj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khjf  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒDDriver handles mixed migrations via retry loops rather than locking.”h]”j!  )”}”(hj€  h]”hŒDDriver handles mixed migrations via retry loops rather than locking.”…””}”(hj‚  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khj~  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hîh³hÇh´Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj   ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´Khhûubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhhõubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhhðh²hh³Nh´Nubhô)”}”(hX’  Eviction
      * Eviction is defined as migrating data from the GPU back to the
        CPU without a virtual address to free up GPU memory.
      * Only looking at physical memory data structures and locks as opposed to
        looking at virtual memory data structures and locks.
      * No looking at mm/vma structs or relying on those being locked.
      * The rationale for the above two points is that CPU virtual addresses
        can change at any moment, while the physical pages remain stable.
      * GPU page table invalidation, which requires a GPU virtual address, is
        handled via the notifier that has access to the GPU virtual address.”h]”hú)”}”(hhh]”hÿ)”}”(hX\  Eviction
* Eviction is defined as migrating data from the GPU back to the
  CPU without a virtual address to free up GPU memory.
* Only looking at physical memory data structures and locks as opposed to
  looking at virtual memory data structures and locks.
* No looking at mm/vma structs or relying on those being locked.
* The rationale for the above two points is that CPU virtual addresses
  can change at any moment, while the physical pages remain stable.
* GPU page table invalidation, which requires a GPU virtual address, is
  handled via the notifier that has access to the GPU virtual address.”h]”(j  )”}”(hŒEviction”h]”hŒEviction”…””}”(hjÀ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´K hj¼  ubj  )”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hŒsEviction is defined as migrating data from the GPU back to the
CPU without a virtual address to free up GPU memory.”h]”j!  )”}”(hŒsEviction is defined as migrating data from the GPU back to the
CPU without a virtual address to free up GPU memory.”h]”hŒsEviction is defined as migrating data from the GPU back to the
CPU without a virtual address to free up GPU memory.”…””}”(hjØ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´KhjÔ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjÑ  ubhô)”}”(hŒ|Only looking at physical memory data structures and locks as opposed to
looking at virtual memory data structures and locks.”h]”j!  )”}”(hŒ|Only looking at physical memory data structures and locks as opposed to
looking at virtual memory data structures and locks.”h]”hŒ|Only looking at physical memory data structures and locks as opposed to
looking at virtual memory data structures and locks.”…””}”(hjð  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khjì  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjÑ  ubhô)”}”(hŒ>No looking at mm/vma structs or relying on those being locked.”h]”j!  )”}”(hj  h]”hŒ>No looking at mm/vma structs or relying on those being locked.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjÑ  ubhô)”}”(hŒ†The rationale for the above two points is that CPU virtual addresses
can change at any moment, while the physical pages remain stable.”h]”j!  )”}”(hŒ†The rationale for the above two points is that CPU virtual addresses
can change at any moment, while the physical pages remain stable.”h]”hŒ†The rationale for the above two points is that CPU virtual addresses
can change at any moment, while the physical pages remain stable.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjÑ  ubhô)”}”(hŒŠGPU page table invalidation, which requires a GPU virtual address, is
handled via the notifier that has access to the GPU virtual address.”h]”j!  )”}”(hŒŠGPU page table invalidation, which requires a GPU virtual address, is
handled via the notifier that has access to the GPU virtual address.”h]”hŒŠGPU page table invalidation, which requires a GPU virtual address, is
handled via the notifier that has access to the GPU virtual address.”…””}”(hj7  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K hj3  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjÑ  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´KhjÎ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj¼  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´K hj¹  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjµ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhhðh²hh³Nh´Nubhô)”}”(hX•  GPU fault side
      * mmap_read only used around core MM functions which require this lock
        and should strive to take mmap_read lock only in GPU SVM layer.
      * Big retry loop to handle all races with the mmu notifier under the gpu
        pagetable locks/mmu notifier range lock/whatever we end up calling
        those.
      * Races (especially against concurrent eviction or migrate_to_ram)
        should not be handled on the fault side by trying to hold locks;
        rather, they should be handled using retry loops. One possible
        exception is holding a BO's dma-resv lock during the initial migration
        to VRAM, as this is a well-defined lock that can be taken underneath
        the mmap_read lock.
      * One possible issue with the above approach is if a driver has a strict
        migration policy requiring GPU access to occur in GPU memory.
        Concurrent CPU access could cause a livelock due to endless retries.
        While no current user (Xe) of GPU SVM has such a policy, it is likely
        to be added in the future. Ideally, this should be resolved on the
        core-MM side rather than through a driver-side lock.”h]”hú)”}”(hhh]”hÿ)”}”(hX/  GPU fault side
* mmap_read only used around core MM functions which require this lock
  and should strive to take mmap_read lock only in GPU SVM layer.
* Big retry loop to handle all races with the mmu notifier under the gpu
  pagetable locks/mmu notifier range lock/whatever we end up calling
  those.
* Races (especially against concurrent eviction or migrate_to_ram)
  should not be handled on the fault side by trying to hold locks;
  rather, they should be handled using retry loops. One possible
  exception is holding a BO's dma-resv lock during the initial migration
  to VRAM, as this is a well-defined lock that can be taken underneath
  the mmap_read lock.
* One possible issue with the above approach is if a driver has a strict
  migration policy requiring GPU access to occur in GPU memory.
  Concurrent CPU access could cause a livelock due to endless retries.
  While no current user (Xe) of GPU SVM has such a policy, it is likely
  to be added in the future. Ideally, this should be resolved on the
  core-MM side rather than through a driver-side lock.”h]”(j  )”}”(hŒGPU fault side”h]”hŒGPU fault side”…””}”(hjt  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´K2hjp  ubj  )”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hŒ„mmap_read only used around core MM functions which require this lock
and should strive to take mmap_read lock only in GPU SVM layer.”h]”j!  )”}”(hŒ„mmap_read only used around core MM functions which require this lock
and should strive to take mmap_read lock only in GPU SVM layer.”h]”hŒ„mmap_read only used around core MM functions which require this lock
and should strive to take mmap_read lock only in GPU SVM layer.”…””}”(hjŒ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K#hjˆ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj…  ubhô)”}”(hŒBig retry loop to handle all races with the mmu notifier under the gpu
pagetable locks/mmu notifier range lock/whatever we end up calling
those.”h]”j!  )”}”(hŒBig retry loop to handle all races with the mmu notifier under the gpu
pagetable locks/mmu notifier range lock/whatever we end up calling
those.”h]”hŒBig retry loop to handle all races with the mmu notifier under the gpu
pagetable locks/mmu notifier range lock/whatever we end up calling
those.”…””}”(hj¤  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K%hj   ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj…  ubhô)”}”(hX`  Races (especially against concurrent eviction or migrate_to_ram)
should not be handled on the fault side by trying to hold locks;
rather, they should be handled using retry loops. One possible
exception is holding a BO's dma-resv lock during the initial migration
to VRAM, as this is a well-defined lock that can be taken underneath
the mmap_read lock.”h]”j!  )”}”(hX`  Races (especially against concurrent eviction or migrate_to_ram)
should not be handled on the fault side by trying to hold locks;
rather, they should be handled using retry loops. One possible
exception is holding a BO's dma-resv lock during the initial migration
to VRAM, as this is a well-defined lock that can be taken underneath
the mmap_read lock.”h]”hXb  Races (especially against concurrent eviction or migrate_to_ram)
should not be handled on the fault side by trying to hold locks;
rather, they should be handled using retry loops. One possible
exception is holding a BOâ€™s dma-resv lock during the initial migration
to VRAM, as this is a well-defined lock that can be taken underneath
the mmap_read lock.”…””}”(hj¼  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K(hj¸  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj…  ubhô)”}”(hX‡  One possible issue with the above approach is if a driver has a strict
migration policy requiring GPU access to occur in GPU memory.
Concurrent CPU access could cause a livelock due to endless retries.
While no current user (Xe) of GPU SVM has such a policy, it is likely
to be added in the future. Ideally, this should be resolved on the
core-MM side rather than through a driver-side lock.”h]”j!  )”}”(hX‡  One possible issue with the above approach is if a driver has a strict
migration policy requiring GPU access to occur in GPU memory.
Concurrent CPU access could cause a livelock due to endless retries.
While no current user (Xe) of GPU SVM has such a policy, it is likely
to be added in the future. Ideally, this should be resolved on the
core-MM side rather than through a driver-side lock.”h]”hX‡  One possible issue with the above approach is if a driver has a strict
migration policy requiring GPU access to occur in GPU memory.
Concurrent CPU access could cause a livelock due to endless retries.
While no current user (Xe) of GPU SVM has such a policy, it is likely
to be added in the future. Ideally, this should be resolved on the
core-MM side rather than through a driver-side lock.”…””}”(hjÔ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K.hjÐ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj…  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´K#hj‚  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjp  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´K2hjm  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhji  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhhðh²hh³Nh´Nubhô)”}”(hX0  Physical memory to virtual backpointer
      * This does not work, as no pointers from physical memory to virtual
        memory should exist. mremap() is an example of the core MM updating
        the virtual address without notifying the driver of address
        change rather the driver only receiving the invalidation notifier.
      * The physical memory backpointer (page->zone_device_data) should remain
        stable from allocation to page free. Safely updating this against a
        concurrent user would be very difficult unless the page is free.”h]”hú)”}”(hhh]”hÿ)”}”(hX  Physical memory to virtual backpointer
* This does not work, as no pointers from physical memory to virtual
  memory should exist. mremap() is an example of the core MM updating
  the virtual address without notifying the driver of address
  change rather the driver only receiving the invalidation notifier.
* The physical memory backpointer (page->zone_device_data) should remain
  stable from allocation to page free. Safely updating this against a
  concurrent user would be very difficult unless the page is free.”h]”(j  )”}”(hŒ&Physical memory to virtual backpointer”h]”hŒ&Physical memory to virtual backpointer”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´K:hj  ubj  )”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hX  This does not work, as no pointers from physical memory to virtual
memory should exist. mremap() is an example of the core MM updating
the virtual address without notifying the driver of address
change rather the driver only receiving the invalidation notifier.”h]”j!  )”}”(hX  This does not work, as no pointers from physical memory to virtual
memory should exist. mremap() is an example of the core MM updating
the virtual address without notifying the driver of address
change rather the driver only receiving the invalidation notifier.”h]”hX  This does not work, as no pointers from physical memory to virtual
memory should exist. mremap() is an example of the core MM updating
the virtual address without notifying the driver of address
change rather the driver only receiving the invalidation notifier.”…””}”(hj)  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K5hj%  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj"  ubhô)”}”(hŒËThe physical memory backpointer (page->zone_device_data) should remain
stable from allocation to page free. Safely updating this against a
concurrent user would be very difficult unless the page is free.”h]”j!  )”}”(hŒËThe physical memory backpointer (page->zone_device_data) should remain
stable from allocation to page free. Safely updating this against a
concurrent user would be very difficult unless the page is free.”h]”hŒËThe physical memory backpointer (page->zone_device_data) should remain
stable from allocation to page free. Safely updating this against a
concurrent user would be very difficult unless the page is free.”…””}”(hjA  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K9hj=  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj"  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´K5hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´K:hj
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhhðh²hh³Nh´Nubhô)”}”(hXK  GPU pagetable locking
      * Notifier lock only protects range tree, pages valid state for a range
        (rather than seqno due to wider notifiers), pagetable entries, and
        mmu notifier seqno tracking, it is not a global lock to protect
        against races.
      * All races handled with big retry as mentioned above.
”h]”hú)”}”(hhh]”hÿ)”}”(hX-  GPU pagetable locking
* Notifier lock only protects range tree, pages valid state for a range
  (rather than seqno due to wider notifiers), pagetable entries, and
  mmu notifier seqno tracking, it is not a global lock to protect
  against races.
* All races handled with big retry as mentioned above.
”h]”(j  )”}”(hŒGPU pagetable locking”h]”hŒGPU pagetable locking”…””}”(hj~  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´KAhjz  ubj  )”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hŒ×Notifier lock only protects range tree, pages valid state for a range
(rather than seqno due to wider notifiers), pagetable entries, and
mmu notifier seqno tracking, it is not a global lock to protect
against races.”h]”j!  )”}”(hŒ×Notifier lock only protects range tree, pages valid state for a range
(rather than seqno due to wider notifiers), pagetable entries, and
mmu notifier seqno tracking, it is not a global lock to protect
against races.”h]”hŒ×Notifier lock only protects range tree, pages valid state for a range
(rather than seqno due to wider notifiers), pagetable entries, and
mmu notifier seqno tracking, it is not a global lock to protect
against races.”…””}”(hj–  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K=hj’  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒ5All races handled with big retry as mentioned above.
”h]”j!  )”}”(hŒ4All races handled with big retry as mentioned above.”h]”hŒ4All races handled with big retry as mentioned above.”…””}”(hj®  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´KAhjª  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´K=hjŒ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjz  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´KAhjw  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjs  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhhðh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´K
hhÝh²hubeh}”(h]”Œagreed-upon-design-principles”ah ]”h"]”Œagreed upon design principles”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒOverview of baseline design”h]”hŒOverview of baseline design”…””}”(hjñ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjî  h²hh³hÇh´KDubj!  )”}”(hXl  GPU Shared Virtual Memory (GPU SVM) layer for the Direct Rendering Manager (DRM)
is a component of the DRM framework designed to manage shared virtual memory
between the CPU and GPU. It enables efficient data exchange and processing
for GPU-accelerated applications by allowing memory sharing and
synchronization between the CPU's and GPU's virtual address spaces.”h]”hXp  GPU Shared Virtual Memory (GPU SVM) layer for the Direct Rendering Manager (DRM)
is a component of the DRM framework designed to manage shared virtual memory
between the CPU and GPU. It enables efficient data exchange and processing
for GPU-accelerated applications by allowing memory sharing and
synchronization between the CPUâ€™s and GPUâ€™s virtual address spaces.”…””}”(hjÿ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Khjî  h²hubj!  )”}”(hŒKey GPU SVM Components:”h]”hŒKey GPU SVM Components:”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Khjî  h²hubhï)”}”(hhh]”(hô)”}”(hXÊ  Notifiers:
   Used for tracking memory intervals and notifying the GPU of changes,
   notifiers are sized based on a GPU SVM initialization parameter, with a
   recommendation of 512M or larger. They maintain a Red-BlacK tree and a
   list of ranges that fall within the notifier interval.  Notifiers are
   tracked within a GPU SVM Red-BlacK tree and list and are dynamically
   inserted or removed as ranges within the interval are created or
   destroyed.”h]”hú)”}”(hhh]”hÿ)”}”(hXµ  Notifiers:
Used for tracking memory intervals and notifying the GPU of changes,
notifiers are sized based on a GPU SVM initialization parameter, with a
recommendation of 512M or larger. They maintain a Red-BlacK tree and a
list of ranges that fall within the notifier interval.  Notifiers are
tracked within a GPU SVM Red-BlacK tree and list and are dynamically
inserted or removed as ranges within the interval are created or
destroyed.”h]”(j  )”}”(hŒ
Notifiers:”h]”hŒ
Notifiers:”…””}”(hj+  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K%hj'  ubj  )”}”(hhh]”j!  )”}”(hXª  Used for tracking memory intervals and notifying the GPU of changes,
notifiers are sized based on a GPU SVM initialization parameter, with a
recommendation of 512M or larger. They maintain a Red-BlacK tree and a
list of ranges that fall within the notifier interval.  Notifiers are
tracked within a GPU SVM Red-BlacK tree and list and are dynamically
inserted or removed as ranges within the interval are created or
destroyed.”h]”hXª  Used for tracking memory intervals and notifying the GPU of changes,
notifiers are sized based on a GPU SVM initialization parameter, with a
recommendation of 512M or larger. They maintain a Red-BlacK tree and a
list of ranges that fall within the notifier interval.  Notifiers are
tracked within a GPU SVM Red-BlacK tree and list and are dynamically
inserted or removed as ranges within the interval are created or
destroyed.”…””}”(hj=  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K hj:  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj'  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³j9  h´K%hj$  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj   ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hX	  Ranges:
   Represent memory ranges mapped in a DRM device and managed by GPU SVM.
   They are sized based on an array of chunk sizes, which is a GPU SVM
   initialization parameter, and the CPU address space.  Upon GPU fault,
   the largest aligned chunk that fits within the faulting CPU address
   space is chosen for the range size. Ranges are expected to be
   dynamically allocated on GPU fault and removed on an MMU notifier UNMAP
   event. As mentioned above, ranges are tracked in a notifier's Red-Black
   tree.
”h]”hú)”}”(hhh]”hÿ)”}”(hXñ  Ranges:
Represent memory ranges mapped in a DRM device and managed by GPU SVM.
They are sized based on an array of chunk sizes, which is a GPU SVM
initialization parameter, and the CPU address space.  Upon GPU fault,
the largest aligned chunk that fits within the faulting CPU address
space is chosen for the range size. Ranges are expected to be
dynamically allocated on GPU fault and removed on an MMU notifier UNMAP
event. As mentioned above, ranges are tracked in a notifier's Red-Black
tree.
”h]”(j  )”}”(hŒRanges:”h]”hŒRanges:”…””}”(hjo  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K/hjk  ubj  )”}”(hhh]”j!  )”}”(hXè  Represent memory ranges mapped in a DRM device and managed by GPU SVM.
They are sized based on an array of chunk sizes, which is a GPU SVM
initialization parameter, and the CPU address space.  Upon GPU fault,
the largest aligned chunk that fits within the faulting CPU address
space is chosen for the range size. Ranges are expected to be
dynamically allocated on GPU fault and removed on an MMU notifier UNMAP
event. As mentioned above, ranges are tracked in a notifier's Red-Black
tree.”h]”hXê  Represent memory ranges mapped in a DRM device and managed by GPU SVM.
They are sized based on an array of chunk sizes, which is a GPU SVM
initialization parameter, and the CPU address space.  Upon GPU fault,
the largest aligned chunk that fits within the faulting CPU address
space is chosen for the range size. Ranges are expected to be
dynamically allocated on GPU fault and removed on an MMU notifier UNMAP
event. As mentioned above, ranges are tracked in a notifierâ€™s Red-Black
tree.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K(hj~  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjk  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³j}  h´K/hjh  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjd  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hX8  Pages:
   struct drm_gpusvm_pages holds the DMA mapping state for a range of
   CPU virtual addresses: the DMA mapped device addresses,
   the device private pagemap, the IOVA state, the per mapping
   notifier sequence number, and the drm_device that owns the DMA
   mappings.
   A driver embeds one or more struct drm_gpusvm_pages alongside its
   struct drm_gpusvm_range, choosing one of two layouts:

   1:1 - one drm_gpusvm_pages per range (one drm_device). Simplest
   layout; to mirror a VA range on several devices a driver uses a
   separate range (and notifier) per device, so the HMM fault is taken
   once per device.

   N:1 - one drm_gpusvm_pages per drm_device, all sharing one range and
   notifier; only the per-device DMA mapping differs. The instances must
   sit in contiguous memory so a single drm_gpusvm_range_set_unmapped()
   can mark them all. A driver can keep one instance inline for the single
   device case and switch to a heap array only when more devices join,
   e.g.:

   .. code-block:: c

           struct driver_range {
                   struct drm_gpusvm_range base;
                   unsigned int num_pages; // 1: inline_pages, >1: pages[]
                   union {
                           struct drm_gpusvm_pages inline_pages;
                           struct drm_gpusvm_pages *pages;
                   };
           };

   In the N:1 case the driver allocates the pages array with a zeroing
   allocator (e.g. kcalloc(num_pages, ...)), initialises each entry with
   drm_gpusvm_init_pages(), and frees each entry with
   drm_gpusvm_free_pages() plus the array itself, from its range free
   callback. Each drm_gpusvm_pages is mapped independently by their own
   drm_device.
   Each drm_gpusvm_pages must be zero-initialised and initialised with
   drm_gpusvm_init_pages(), called once per entry.
”h]”hú)”}”(hhh]”hÿ)”}”(hXÒ  Pages:
struct drm_gpusvm_pages holds the DMA mapping state for a range of
CPU virtual addresses: the DMA mapped device addresses,
the device private pagemap, the IOVA state, the per mapping
notifier sequence number, and the drm_device that owns the DMA
mappings.
A driver embeds one or more struct drm_gpusvm_pages alongside its
struct drm_gpusvm_range, choosing one of two layouts:

1:1 - one drm_gpusvm_pages per range (one drm_device). Simplest
layout; to mirror a VA range on several devices a driver uses a
separate range (and notifier) per device, so the HMM fault is taken
once per device.

N:1 - one drm_gpusvm_pages per drm_device, all sharing one range and
notifier; only the per-device DMA mapping differs. The instances must
sit in contiguous memory so a single drm_gpusvm_range_set_unmapped()
can mark them all. A driver can keep one instance inline for the single
device case and switch to a heap array only when more devices join,
e.g.:

.. code-block:: c

        struct driver_range {
                struct drm_gpusvm_range base;
                unsigned int num_pages; // 1: inline_pages, >1: pages[]
                union {
                        struct drm_gpusvm_pages inline_pages;
                        struct drm_gpusvm_pages *pages;
                };
        };

In the N:1 case the driver allocates the pages array with a zeroing
allocator (e.g. kcalloc(num_pages, ...)), initialises each entry with
drm_gpusvm_init_pages(), and frees each entry with
drm_gpusvm_free_pages() plus the array itself, from its range free
callback. Each drm_gpusvm_pages is mapped independently by their own
drm_device.
Each drm_gpusvm_pages must be zero-initialised and initialised with
drm_gpusvm_init_pages(), called once per entry.
”h]”(j  )”}”(hŒPages:”h]”hŒPages:”…””}”(hj³  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´KXhj¯  ubj  )”}”(hhh]”(j!  )”}”(hXw  struct drm_gpusvm_pages holds the DMA mapping state for a range of
CPU virtual addresses: the DMA mapped device addresses,
the device private pagemap, the IOVA state, the per mapping
notifier sequence number, and the drm_device that owns the DMA
mappings.
A driver embeds one or more struct drm_gpusvm_pages alongside its
struct drm_gpusvm_range, choosing one of two layouts:”h]”hXw  struct drm_gpusvm_pages holds the DMA mapping state for a range of
CPU virtual addresses: the DMA mapped device addresses,
the device private pagemap, the IOVA state, the per mapping
notifier sequence number, and the drm_device that owns the DMA
mappings.
A driver embeds one or more struct drm_gpusvm_pages alongside its
struct drm_gpusvm_range, choosing one of two layouts:”…””}”(hjÅ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K2hjÂ  ubj!  )”}”(hŒÔ1:1 - one drm_gpusvm_pages per range (one drm_device). Simplest
layout; to mirror a VA range on several devices a driver uses a
separate range (and notifier) per device, so the HMM fault is taken
once per device.”h]”hŒÔ1:1 - one drm_gpusvm_pages per range (one drm_device). Simplest
layout; to mirror a VA range on several devices a driver uses a
separate range (and notifier) per device, so the HMM fault is taken
once per device.”…””}”(hjÔ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K:hjÂ  ubj!  )”}”(hXa  N:1 - one drm_gpusvm_pages per drm_device, all sharing one range and
notifier; only the per-device DMA mapping differs. The instances must
sit in contiguous memory so a single drm_gpusvm_range_set_unmapped()
can mark them all. A driver can keep one instance inline for the single
device case and switch to a heap array only when more devices join,
e.g.:”h]”hXa  N:1 - one drm_gpusvm_pages per drm_device, all sharing one range and
notifier; only the per-device DMA mapping differs. The instances must
sit in contiguous memory so a single drm_gpusvm_range_set_unmapped()
can mark them all. A driver can keep one instance inline for the single
device case and switch to a heap array only when more devices join,
e.g.:”…””}”(hjã  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K?hjÂ  ubhŒliteral_block”“”)”}”(hŒÿstruct driver_range {
        struct drm_gpusvm_range base;
        unsigned int num_pages; // 1: inline_pages, >1: pages[]
        union {
                struct drm_gpusvm_pages inline_pages;
                struct drm_gpusvm_pages *pages;
        };
};”h]”hŒÿstruct driver_range {
        struct drm_gpusvm_range base;
        unsigned int num_pages; // 1: inline_pages, >1: pages[]
        union {
                struct drm_gpusvm_pages inline_pages;
                struct drm_gpusvm_pages *pages;
        };
};”…””}”hjô  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆŒforce”‰Œlanguage”Œc”Œhighlight_args”}”uh1jò  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´KFhjÂ  ubj!  )”}”(hXÄ  In the N:1 case the driver allocates the pages array with a zeroing
allocator (e.g. kcalloc(num_pages, ...)), initialises each entry with
drm_gpusvm_init_pages(), and frees each entry with
drm_gpusvm_free_pages() plus the array itself, from its range free
callback. Each drm_gpusvm_pages is mapped independently by their own
drm_device.
Each drm_gpusvm_pages must be zero-initialised and initialised with
drm_gpusvm_init_pages(), called once per entry.”h]”hXÄ  In the N:1 case the driver allocates the pages array with a zeroing
allocator (e.g. kcalloc(num_pages, ...)), initialises each entry with
drm_gpusvm_init_pages(), and frees each entry with
drm_gpusvm_free_pages() plus the array itself, from its range free
callback. Each drm_gpusvm_pages is mapped independently by their own
drm_device.
Each drm_gpusvm_pages must be zero-initialised and initialised with
drm_gpusvm_init_pages(), called once per entry.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´KQhjÂ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj¯  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³jÁ  h´KXhj¬  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj¨  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒOperations:
   Define the interface for driver-specific GPU SVM operations such as
   range allocation, notifier allocation, and invalidations.
”h]”hú)”}”(hhh]”hÿ)”}”(hŒŠOperations:
Define the interface for driver-specific GPU SVM operations such as
range allocation, notifier allocation, and invalidations.
”h]”(j  )”}”(hŒOperations:”h]”hŒOperations:”…””}”(hj:  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K\hj6  ubj  )”}”(hhh]”j!  )”}”(hŒ}Define the interface for driver-specific GPU SVM operations such as
range allocation, notifier allocation, and invalidations.”h]”hŒ}Define the interface for driver-specific GPU SVM operations such as
range allocation, notifier allocation, and invalidations.”…””}”(hjL  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K[hjI  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj6  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³jH  h´K\hj3  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj/  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒ‚Device Memory Allocations:
   Embedded structure containing enough information for GPU SVM to migrate
   to / from device memory.
”h]”hú)”}”(hhh]”hÿ)”}”(hŒ|Device Memory Allocations:
Embedded structure containing enough information for GPU SVM to migrate
to / from device memory.
”h]”(j  )”}”(hŒDevice Memory Allocations:”h]”hŒDevice Memory Allocations:”…””}”(hj~  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K`hjz  ubj  )”}”(hhh]”j!  )”}”(hŒ`Embedded structure containing enough information for GPU SVM to migrate
to / from device memory.”h]”hŒ`Embedded structure containing enough information for GPU SVM to migrate
to / from device memory.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´K_hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjz  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³jŒ  h´K`hjw  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjs  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubhô)”}”(hŒ£Device Memory Operations:
   Define the interface for driver-specific device memory operations
   release memory, populate pfns, and copy to / from device memory.
”h]”hú)”}”(hhh]”hÿ)”}”(hŒDevice Memory Operations:
Define the interface for driver-specific device memory operations
release memory, populate pfns, and copy to / from device memory.
”h]”(j  )”}”(hŒDevice Memory Operations:”h]”hŒDevice Memory Operations:”…””}”(hjÂ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kdhj¾  ubj  )”}”(hhh]”j!  )”}”(hŒ‚Define the interface for driver-specific device memory operations
release memory, populate pfns, and copy to / from device memory.”h]”hŒ‚Define the interface for driver-specific device memory operations
release memory, populate pfns, and copy to / from device memory.”…””}”(hjÔ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´KchjÑ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj¾  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³jÐ  h´Kdhj»  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj·  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  Œ-”uh1hîh³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Khjî  h²hubj!  )”}”(hX|  This layer provides interfaces for allocating, mapping, migrating, and
releasing memory ranges between the CPU and GPU. It handles all core memory
management interactions (DMA mapping, HMM, and migration) and provides
driver-specific virtual functions (vfuncs). This infrastructure is sufficient
to build the expected driver components for an SVM implementation as detailed
below.”h]”hX|  This layer provides interfaces for allocating, mapping, migrating, and
releasing memory ranges between the CPU and GPU. It handles all core memory
management interactions (DMA mapping, HMM, and migration) and provides
driver-specific virtual functions (vfuncs). This infrastructure is sufficient
to build the expected driver components for an SVM implementation as detailed
below.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kfhjî  h²hubj!  )”}”(hŒExpected Driver Components:”h]”hŒExpected Driver Components:”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kmhjî  h²hubhï)”}”(hhh]”(hô)”}”(hŒ¦GPU page fault handler:
   Used to create ranges and notifiers based on the fault address,
   optionally migrate the range to device memory, and create GPU bindings.
”h]”hú)”}”(hhh]”hÿ)”}”(hŒ GPU page fault handler:
Used to create ranges and notifiers based on the fault address,
optionally migrate the range to device memory, and create GPU bindings.
”h]”(j  )”}”(hŒGPU page fault handler:”h]”hŒGPU page fault handler:”…””}”(hj/  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kqhj+  ubj  )”}”(hhh]”j!  )”}”(hŒ‡Used to create ranges and notifiers based on the fault address,
optionally migrate the range to device memory, and create GPU bindings.”h]”hŒ‡Used to create ranges and notifiers based on the fault address,
optionally migrate the range to device memory, and create GPU bindings.”…””}”(hjA  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kphj>  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj+  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³j=  h´Kqhj(  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj$  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!  ubhô)”}”(hŒ½Garbage collector:
   Used to unmap and destroy GPU bindings for ranges.  Ranges are expected
   to be added to the garbage collector upon a MMU_NOTIFY_UNMAP event in
   notifier callback.
”h]”hú)”}”(hhh]”hÿ)”}”(hŒ´Garbage collector:
Used to unmap and destroy GPU bindings for ranges.  Ranges are expected
to be added to the garbage collector upon a MMU_NOTIFY_UNMAP event in
notifier callback.
”h]”(j  )”}”(hŒGarbage collector:”h]”hŒGarbage collector:”…””}”(hjs  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kvhjo  ubj  )”}”(hhh]”j!  )”}”(hŒ Used to unmap and destroy GPU bindings for ranges.  Ranges are expected
to be added to the garbage collector upon a MMU_NOTIFY_UNMAP event in
notifier callback.”h]”hŒ Used to unmap and destroy GPU bindings for ranges.  Ranges are expected
to be added to the garbage collector upon a MMU_NOTIFY_UNMAP event in
notifier callback.”…””}”(hj…  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kthj‚  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjo  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³j  h´Kvhjl  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjh  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!  ubhô)”}”(hŒQNotifier callback:
   Used to invalidate and DMA unmap GPU bindings for ranges.

”h]”hú)”}”(hhh]”hÿ)”}”(hŒNNotifier callback:
Used to invalidate and DMA unmap GPU bindings for ranges.

”h]”(j  )”}”(hŒNotifier callback:”h]”hŒNotifier callback:”…””}”(hj·  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kzhj³  ubj  )”}”(hhh]”j!  )”}”(hŒ9Used to invalidate and DMA unmap GPU bindings for ranges.”h]”hŒ9Used to invalidate and DMA unmap GPU bindings for ranges.”…””}”(hjÉ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´KyhjÆ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj³  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³jÅ  h´Kzhj°  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj¬  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  j  uh1hîh³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:70: ./drivers/gpu/drm/drm_gpusvm.c”h´Kohjî  h²hubj!  )”}”(hŒaGPU SVM handles locking for core MM interactions, i.e., it locks/unlocks the
mmap lock as needed.”h]”hŒaGPU SVM handles locking for core MM interactions, i.e., it locks/unlocks the
mmap lock as needed.”…””}”(hj÷  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:73: ./drivers/gpu/drm/drm_gpusvm.c”h´Khjî  h²hubj!  )”}”(hX-  GPU SVM introduces a global notifier lock, which safeguards the notifier's
range RB tree and list, as well as the range's DMA mappings and sequence
number. GPU SVM manages all necessary locking and unlocking operations,
except for the recheck range's pages being valid
(drm_gpusvm_pages_valid) when the driver is committing GPU bindings.
This lock corresponds to the ``driver->update`` lock mentioned in
Documentation/mm/hmm.rst. Future revisions may transition from a GPU SVM
global lock to a per-notifier lock if finer-grained locking is deemed
necessary.”h]”(hXu  GPU SVM introduces a global notifier lock, which safeguards the notifierâ€™s
range RB tree and list, as well as the rangeâ€™s DMA mappings and sequence
number. GPU SVM manages all necessary locking and unlocking operations,
except for the recheck rangeâ€™s pages being valid
(drm_gpusvm_pages_valid) when the driver is committing GPU bindings.
This lock corresponds to the ”…””}”(hj  h²hh³Nh´NubhŒliteral”“”)”}”(hŒ``driver->update``”h]”hŒdriver->update”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubhŒ¬ lock mentioned in
Documentation/mm/hmm.rst. Future revisions may transition from a GPU SVM
global lock to a per-notifier lock if finer-grained locking is deemed
necessary.”…””}”(hj  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:73: ./drivers/gpu/drm/drm_gpusvm.c”h´K‚hjî  h²hubj!  )”}”(hXÝ  In addition to the locking mentioned above, the driver should implement a
lock to safeguard core GPU SVM function calls that modify state, such as
drm_gpusvm_range_find_or_insert and drm_gpusvm_range_remove. This lock is
denoted as 'driver_svm_lock' in code examples. Finer grained driver side
locking should also be possible for concurrent GPU fault processing within a
single GPU SVM. The 'driver_svm_lock' can be via drm_gpusvm_driver_set_lock
to add annotations to GPU SVM.”h]”hXå  In addition to the locking mentioned above, the driver should implement a
lock to safeguard core GPU SVM function calls that modify state, such as
drm_gpusvm_range_find_or_insert and drm_gpusvm_range_remove. This lock is
denoted as â€˜driver_svm_lockâ€™ in code examples. Finer grained driver side
locking should also be possible for concurrent GPU fault processing within a
single GPU SVM. The â€˜driver_svm_lockâ€™ can be via drm_gpusvm_driver_set_lock
to add annotations to GPU SVM.”…””}”(hj)  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:73: ./drivers/gpu/drm/drm_gpusvm.c”h´KŒhjî  h²hubj!  )”}”(hXK  Partial unmapping of ranges (e.g., 1M out of 2M is unmapped by CPU resulting
in MMU_NOTIFY_UNMAP event) presents several challenges, with the main one
being that a subset of the range still has CPU and GPU mappings. If the
backing store for the range is in device memory, a subset of the backing
store has references. One option would be to split the range and device
memory backing store, but the implementation for this would be quite
complicated. Given that partial unmappings are rare and driver-defined range
sizes are relatively small, GPU SVM does not support splitting of ranges.”h]”hXK  Partial unmapping of ranges (e.g., 1M out of 2M is unmapped by CPU resulting
in MMU_NOTIFY_UNMAP event) presents several challenges, with the main one
being that a subset of the range still has CPU and GPU mappings. If the
backing store for the range is in device memory, a subset of the backing
store has references. One option would be to split the range and device
memory backing store, but the implementation for this would be quite
complicated. Given that partial unmappings are rare and driver-defined range
sizes are relatively small, GPU SVM does not support splitting of ranges.”…””}”(hj8  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:76: ./drivers/gpu/drm/drm_gpusvm.c”h´K˜hjî  h²hubj!  )”}”(hX  With no support for range splitting, upon partial unmapping of a range, the
driver is expected to invalidate and destroy the entire range. If the range
has device memory as its backing, the driver is also expected to migrate any
remaining pages back to RAM.”h]”hX  With no support for range splitting, upon partial unmapping of a range, the
driver is expected to invalidate and destroy the entire range. If the range
has device memory as its backing, the driver is also expected to migrate any
remaining pages back to RAM.”…””}”(hjG  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:76: ./drivers/gpu/drm/drm_gpusvm.c”h´K¡hjî  h²hubj!  )”}”(hŒ¢This section provides three examples of how to build the expected driver
components: the GPU page fault handler, the garbage collector, and the
notifier callback.”h]”hŒ¢This section provides three examples of how to build the expected driver
components: the GPU page fault handler, the garbage collector, and the
notifier callback.”…””}”(hjV  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´Kªhjî  h²hubj!  )”}”(hŒÌThe generic code provided does not include logic for complex migration
policies, optimized invalidations, fined grained driver locking, or other
potentially required driver locking (e.g., DMA-resv locks).”h]”hŒÌThe generic code provided does not include logic for complex migration
policies, optimized invalidations, fined grained driver locking, or other
potentially required driver locking (e.g., DMA-resv locks).”…””}”(hje  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´K®hjî  h²hubhŒenumerated_list”“”)”}”(hhh]”hô)”}”(hŒGPU page fault handler
”h]”j!  )”}”(hŒGPU page fault handler”h]”hŒGPU page fault handler”…””}”(hj}  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´K²hjy  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjv  ubah}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ)”uh1jt  hjî  h²hh³Nh´Nubjó  )”}”(hX¬	  struct driver_range {
        struct drm_gpusvm_range base;
        struct drm_gpusvm_pages pages;
};

int driver_bind_range(struct drm_gpusvm *gpusvm, struct driver_range *drange)
{
        int err = 0;

        driver_alloc_and_setup_memory_for_bind(gpusvm, drange);

        drm_gpusvm_notifier_lock(gpusvm);
        if (drm_gpusvm_pages_valid(gpusvm, &drange->pages))
                driver_commit_bind(gpusvm, drange);
        else
                err = -EAGAIN;
        drm_gpusvm_notifier_unlock(gpusvm);

        return err;
}

int driver_gpu_fault(struct drm_gpusvm *gpusvm, unsigned long fault_addr,
                     unsigned long gpuva_start, unsigned long gpuva_end)
{
        struct drm_gpusvm_ctx ctx = {};
        struct driver_range *drange;
        struct drm_gpusvm_range *range;
        int err;

        driver_svm_lock();
retry:
        // Always process UNMAPs first so view of GPU SVM ranges is current
        driver_garbage_collector(gpusvm);

        range = drm_gpusvm_range_find_or_insert(gpusvm, fault_addr,
                                                gpuva_start, gpuva_end,
                                                &ctx);
        if (IS_ERR(range)) {
                err = PTR_ERR(range);
                goto unlock;
        }
        drange = container_of(range, struct driver_range, base);

        if (driver_migration_policy(range)) {
                err = drm_pagemap_populate_mm(driver_choose_drm_pagemap(),
                                              gpuva_start, gpuva_end, gpusvm->mm,
                                              ctx->timeslice_ms);
                if (err)        // CPU mappings may have changed
                        goto retry;
        }

        err = drm_gpusvm_get_pages(gpusvm, &drange->pages,
                                   gpusvm->mm, &range->notifier->notifier,
                                   drm_gpusvm_range_start(range),
                                   drm_gpusvm_range_end(range), &ctx);
        if (err == -EOPNOTSUPP || err == -EFAULT || err == -EPERM) {    // CPU mappings changed
                if (err == -EOPNOTSUPP)
                        drm_gpusvm_range_evict(gpusvm, range);
                goto retry;
        } else if (err) {
                goto unlock;
        }

        err = driver_bind_range(gpusvm, drange);
        if (err == -EAGAIN)     // CPU mappings changed
                goto retry

unlock:
        driver_svm_unlock();
        return err;
}”h]”hX¬	  struct driver_range {
        struct drm_gpusvm_range base;
        struct drm_gpusvm_pages pages;
};

int driver_bind_range(struct drm_gpusvm *gpusvm, struct driver_range *drange)
{
        int err = 0;

        driver_alloc_and_setup_memory_for_bind(gpusvm, drange);

        drm_gpusvm_notifier_lock(gpusvm);
        if (drm_gpusvm_pages_valid(gpusvm, &drange->pages))
                driver_commit_bind(gpusvm, drange);
        else
                err = -EAGAIN;
        drm_gpusvm_notifier_unlock(gpusvm);

        return err;
}

int driver_gpu_fault(struct drm_gpusvm *gpusvm, unsigned long fault_addr,
                     unsigned long gpuva_start, unsigned long gpuva_end)
{
        struct drm_gpusvm_ctx ctx = {};
        struct driver_range *drange;
        struct drm_gpusvm_range *range;
        int err;

        driver_svm_lock();
retry:
        // Always process UNMAPs first so view of GPU SVM ranges is current
        driver_garbage_collector(gpusvm);

        range = drm_gpusvm_range_find_or_insert(gpusvm, fault_addr,
                                                gpuva_start, gpuva_end,
                                                &ctx);
        if (IS_ERR(range)) {
                err = PTR_ERR(range);
                goto unlock;
        }
        drange = container_of(range, struct driver_range, base);

        if (driver_migration_policy(range)) {
                err = drm_pagemap_populate_mm(driver_choose_drm_pagemap(),
                                              gpuva_start, gpuva_end, gpusvm->mm,
                                              ctx->timeslice_ms);
                if (err)        // CPU mappings may have changed
                        goto retry;
        }

        err = drm_gpusvm_get_pages(gpusvm, &drange->pages,
                                   gpusvm->mm, &range->notifier->notifier,
                                   drm_gpusvm_range_start(range),
                                   drm_gpusvm_range_end(range), &ctx);
        if (err == -EOPNOTSUPP || err == -EFAULT || err == -EPERM) {    // CPU mappings changed
                if (err == -EOPNOTSUPP)
                        drm_gpusvm_range_evict(gpusvm, range);
                goto retry;
        } else if (err) {
                goto unlock;
        }

        err = driver_bind_range(gpusvm, drange);
        if (err == -EAGAIN)     // CPU mappings changed
                goto retry

unlock:
        driver_svm_unlock();
        return err;
}”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ‰j  j  j  }”uh1jò  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´K´hjî  h²hubju  )”}”(hhh]”hô)”}”(hŒGarbage Collector
”h]”j!  )”}”(hŒGarbage Collector”h]”hŒGarbage Collector”…””}”(hj´  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´Kþhj°  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj­  ubah}”(h]”h ]”h"]”h$]”h&]”j˜  j™  jš  hj›  jœ  Œstart”Kuh1jt  hjî  h²hh³Nh´Nubjó  )”}”(hXU  // The driver owns the drm_gpusvm_pages lifecycle. ops->range_free is
// the final fallback: drm_gpusvm_free_pages() unmaps any
// lingering DMA mapping and a no-op if already unmapped and frees the
// dma_addr array. The normal flow is to DMA unmap before
// drm_gpusvm_range_remove() (before the range leaves the tree).
void driver_range_free(struct drm_gpusvm_range *range)
{
        struct driver_range *drange =
                container_of(range, struct driver_range, base);

        drm_gpusvm_free_pages(range->gpusvm, &drange->pages,
                              drm_gpusvm_range_size(range) >> PAGE_SHIFT);
        kfree(drange);
}

void __driver_garbage_collector(struct drm_gpusvm *gpusvm,
                                struct drm_gpusvm_range *range)
{
        assert_driver_svm_locked(gpusvm);

        // Partial unmap, migrate any remaining device memory pages back to RAM
        if (range->flags.partial_unmap)
                drm_gpusvm_range_evict(gpusvm, range);

        driver_unbind_range(range);
        // The pages must be DMA unmapped before drm_gpusvm_range_remove()
        // , so a range is never off the MMU interval tree while still DMA
        // mapped as the original drmsvm design flow. Otherwise a concurrent CPU
        // munmap's notifier could miss this range and free pages still mapped
        // for device DMA. This is the normal unmap point.
        drm_gpusvm_unmap_pages(gpusvm, &drange->pages,
                               drm_gpusvm_range_size(range) >> PAGE_SHIFT,
                               &(struct drm_gpusvm_ctx){ .in_notifier = false });
        drm_gpusvm_range_remove(gpusvm, range);
}

void driver_garbage_collector(struct drm_gpusvm *gpusvm)
{
        assert_driver_svm_locked(gpusvm);

        for_each_range_in_garbage_collector(gpusvm, range)
                __driver_garbage_collector(gpusvm, range);
}”h]”hXU  // The driver owns the drm_gpusvm_pages lifecycle. ops->range_free is
// the final fallback: drm_gpusvm_free_pages() unmaps any
// lingering DMA mapping and a no-op if already unmapped and frees the
// dma_addr array. The normal flow is to DMA unmap before
// drm_gpusvm_range_remove() (before the range leaves the tree).
void driver_range_free(struct drm_gpusvm_range *range)
{
        struct driver_range *drange =
                container_of(range, struct driver_range, base);

        drm_gpusvm_free_pages(range->gpusvm, &drange->pages,
                              drm_gpusvm_range_size(range) >> PAGE_SHIFT);
        kfree(drange);
}

void __driver_garbage_collector(struct drm_gpusvm *gpusvm,
                                struct drm_gpusvm_range *range)
{
        assert_driver_svm_locked(gpusvm);

        // Partial unmap, migrate any remaining device memory pages back to RAM
        if (range->flags.partial_unmap)
                drm_gpusvm_range_evict(gpusvm, range);

        driver_unbind_range(range);
        // The pages must be DMA unmapped before drm_gpusvm_range_remove()
        // , so a range is never off the MMU interval tree while still DMA
        // mapped as the original drmsvm design flow. Otherwise a concurrent CPU
        // munmap's notifier could miss this range and free pages still mapped
        // for device DMA. This is the normal unmap point.
        drm_gpusvm_unmap_pages(gpusvm, &drange->pages,
                               drm_gpusvm_range_size(range) >> PAGE_SHIFT,
                               &(struct drm_gpusvm_ctx){ .in_notifier = false });
        drm_gpusvm_range_remove(gpusvm, range);
}

void driver_garbage_collector(struct drm_gpusvm *gpusvm)
{
        assert_driver_svm_locked(gpusvm);

        for_each_range_in_garbage_collector(gpusvm, range)
                __driver_garbage_collector(gpusvm, range);
}”…””}”hjÐ  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ‰j  j  j  }”uh1jò  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´M hjî  h²hubju  )”}”(hhh]”hô)”}”(hŒNotifier callback
”h]”j!  )”}”(hŒNotifier callback”h]”hŒNotifier callback”…””}”(hjç  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´M.hjã  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjà  ubah}”(h]”h ]”h"]”h$]”h&]”j˜  j™  jš  hj›  jœ  jÏ  Kuh1jt  hjî  h²hh³Nh´Nubjó  )”}”(hX  void driver_invalidation(struct drm_gpusvm *gpusvm,
                         struct drm_gpusvm_notifier *notifier,
                         const struct mmu_notifier_range *mmu_range)
{
        struct drm_gpusvm_ctx ctx = { .in_notifier = true, };
        struct drm_gpusvm_range *range = NULL;
        struct driver_range *drange;

        driver_invalidate_device_pages(gpusvm, mmu_range->start, mmu_range->end);

        drm_gpusvm_for_each_range(range, notifier, mmu_range->start,
                                  mmu_range->end) {
                drange = container_of(range, struct driver_range, base);

                drm_gpusvm_unmap_pages(gpusvm, &drange->pages,
                                       drm_gpusvm_range_size(range) >> PAGE_SHIFT,
                                       &ctx);

                if (mmu_range->event != MMU_NOTIFY_UNMAP)
                        continue;

                drm_gpusvm_range_set_unmapped(range, &drange->pages, 1, mmu_range);
                driver_garbage_collector_add(gpusvm, range);
        }
}”h]”hX  void driver_invalidation(struct drm_gpusvm *gpusvm,
                         struct drm_gpusvm_notifier *notifier,
                         const struct mmu_notifier_range *mmu_range)
{
        struct drm_gpusvm_ctx ctx = { .in_notifier = true, };
        struct drm_gpusvm_range *range = NULL;
        struct driver_range *drange;

        driver_invalidate_device_pages(gpusvm, mmu_range->start, mmu_range->end);

        drm_gpusvm_for_each_range(range, notifier, mmu_range->start,
                                  mmu_range->end) {
                drange = container_of(range, struct driver_range, base);

                drm_gpusvm_unmap_pages(gpusvm, &drange->pages,
                                       drm_gpusvm_range_size(range) >> PAGE_SHIFT,
                                       &ctx);

                if (mmu_range->event != MMU_NOTIFY_UNMAP)
                        continue;

                drm_gpusvm_range_set_unmapped(range, &drange->pages, 1, mmu_range);
                driver_garbage_collector_add(gpusvm, range);
        }
}”…””•oP      }”hj  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ‰j  j  j  }”uh1jò  h³Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”h´M0hjî  h²hubeh}”(h]”Œoverview-of-baseline-design”ah ]”h"]”Œoverview of baseline design”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KDubhÉ)”}”(hhh]”(hÎ)”}”(hŒOverview of drm_pagemap design”h]”hŒOverview of drm_pagemap design”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj  h²hh³hÇh´KSubj!  )”}”(hXÇ  The DRM pagemap layer is intended to augment the dev_pagemap functionality by
providing a way to populate a struct mm_struct virtual range with device
private pages and to provide helpers to abstract device memory allocations,
to migrate memory back and forth between device memory and system RAM and
to handle access (and in the future migration) between devices implementing
a fast interconnect that is not necessarily visible to the rest of the
system.”h]”hXÇ  The DRM pagemap layer is intended to augment the dev_pagemap functionality by
providing a way to populate a struct mm_struct virtual range with device
private pages and to provide helpers to abstract device memory allocations,
to migrate memory back and forth between device memory and system RAM and
to handle access (and in the future migration) between devices implementing
a fast interconnect that is not necessarily visible to the rest of the
system.”…””}”(hj+  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:85: ./drivers/gpu/drm/drm_pagemap.c”h´Khj  h²hubj!  )”}”(hXt  Typically the DRM pagemap receives requests from one or more DRM GPU SVM
instances to populate struct mm_struct virtual ranges with memory, and the
migration is best effort only and may thus fail. The implementation should
also handle device unbinding by blocking (return an -ENODEV) error for new
population requests and after that migrate all device pages to system ram.”h]”hXt  Typically the DRM pagemap receives requests from one or more DRM GPU SVM
instances to populate struct mm_struct virtual ranges with memory, and the
migration is best effort only and may thus fail. The implementation should
also handle device unbinding by blocking (return an -ENODEV) error for new
population requests and after that migrate all device pages to system ram.”…””}”(hj:  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:85: ./drivers/gpu/drm/drm_pagemap.c”h´Khj  h²hubj!  )”}”(hXz  Migration granularity typically follows the GPU SVM range requests, but
if there are clashes, due to races or due to the fact that multiple GPU
SVM instances have different views of the ranges used, and because of that
parts of a requested range is already present in the requested device memory,
the implementation has a variety of options. It can fail and it can choose
to populate only the part of the range that isn't already in device memory,
and it can evict the range to system before trying to migrate. Ideally an
implementation would just try to migrate the missing part of the range and
allocate just enough memory to do so.”h]”hX|  Migration granularity typically follows the GPU SVM range requests, but
if there are clashes, due to races or due to the fact that multiple GPU
SVM instances have different views of the ranges used, and because of that
parts of a requested range is already present in the requested device memory,
the implementation has a variety of options. It can fail and it can choose
to populate only the part of the range that isnâ€™t already in device memory,
and it can evict the range to system before trying to migrate. Ideally an
implementation would just try to migrate the missing part of the range and
allocate just enough memory to do so.”…””}”(hjI  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K"hj  h²hubj!  )”}”(hXT  When migrating to system memory as a response to a cpu fault or a device
memory eviction request, currently a full device memory allocation is
migrated back to system. Moving forward this might need improvement for
situations where a single page needs bouncing between system memory and
device memory due to, for example, atomic operations.”h]”hXT  When migrating to system memory as a response to a cpu fault or a device
memory eviction request, currently a full device memory allocation is
migrated back to system. Moving forward this might need improvement for
situations where a single page needs bouncing between system memory and
device memory due to, for example, atomic operations.”…””}”(hjX  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K,hj  h²hubj!  )”}”(hŒKey DRM pagemap components:”h]”hŒKey DRM pagemap components:”…””}”(hjg  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K2hj  h²hubhï)”}”(hhh]”(hô)”}”(hŒŠDevice Memory Allocations:
   Embedded structure containing enough information for the drm_pagemap to
   migrate to / from device memory.
”h]”hú)”}”(hhh]”hÿ)”}”(hŒ„Device Memory Allocations:
Embedded structure containing enough information for the drm_pagemap to
migrate to / from device memory.
”h]”(j  )”}”(hŒDevice Memory Allocations:”h]”hŒDevice Memory Allocations:”…””}”(hj„  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K6hj€  ubj  )”}”(hhh]”j!  )”}”(hŒhEmbedded structure containing enough information for the drm_pagemap to
migrate to / from device memory.”h]”hŒhEmbedded structure containing enough information for the drm_pagemap to
migrate to / from device memory.”…””}”(hj–  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K5hj“  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj€  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³j’  h´K6hj}  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjy  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjv  ubhô)”}”(hŒ¤Device Memory Operations:
   Define the interface for driver-specific device memory operations
   release memory, populate pfns, and copy to / from device memory.

”h]”hú)”}”(hhh]”hÿ)”}”(hŒžDevice Memory Operations:
Define the interface for driver-specific device memory operations
release memory, populate pfns, and copy to / from device memory.

”h]”(j  )”}”(hŒDevice Memory Operations:”h]”hŒDevice Memory Operations:”…””}”(hjÈ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K;hjÄ  ubj  )”}”(hhh]”j!  )”}”(hŒ‚Define the interface for driver-specific device memory operations
release memory, populate pfns, and copy to / from device memory.”h]”hŒ‚Define the interface for driver-specific device memory operations
release memory, populate pfns, and copy to / from device memory.”…””}”(hjÚ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K9hj×  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÄ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³jÖ  h´K;hjÁ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj½  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjv  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  j  uh1hîh³Œ\/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:88: ./drivers/gpu/drm/drm_pagemap.c”h´K4hj  h²hubeh}”(h]”Œoverview-of-drm-pagemap-design”ah ]”h"]”Œoverview of drm_pagemap design”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KSubhÉ)”}”(hhh]”(hÎ)”}”(hŒPossible future design features”h]”hŒPossible future design features”…””}”(hj	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj	  h²hh³hÇh´K\ubhï)”}”(hhh]”(hô)”}”(hŒúConcurrent GPU faults
      * CPU faults are concurrent so makes sense to have concurrent GPU
        faults.
      * Should be possible with fined grained locking in the driver GPU
        fault handler.
      * No expected GPU SVM changes required.”h]”hú)”}”(hhh]”hÿ)”}”(hŒÜConcurrent GPU faults
* CPU faults are concurrent so makes sense to have concurrent GPU
  faults.
* Should be possible with fined grained locking in the driver GPU
  fault handler.
* No expected GPU SVM changes required.”h]”(j  )”}”(hŒConcurrent GPU faults”h]”hŒConcurrent GPU faults”…””}”(hj/	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´Kbhj+	  ubj  )”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hŒGCPU faults are concurrent so makes sense to have concurrent GPU
faults.”h]”j!  )”}”(hŒGCPU faults are concurrent so makes sense to have concurrent GPU
faults.”h]”hŒGCPU faults are concurrent so makes sense to have concurrent GPU
faults.”…””}”(hjG	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´K_hjC	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj@	  ubhô)”}”(hŒNShould be possible with fined grained locking in the driver GPU
fault handler.”h]”j!  )”}”(hŒNShould be possible with fined grained locking in the driver GPU
fault handler.”h]”hŒNShould be possible with fined grained locking in the driver GPU
fault handler.”…””}”(hj_	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kahj[	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj@	  ubhô)”}”(hŒ%No expected GPU SVM changes required.”h]”j!  )”}”(hju	  h]”hŒ%No expected GPU SVM changes required.”…””}”(hjw	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kchjs	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj@	  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´K_hj=	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj+	  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´Kbhj(	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj$	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³Nh´Nubhô)”}”(hŒqRanges with mixed system and device pages
      * Can be added if required to drm_gpusvm_get_pages fairly easily.”h]”hú)”}”(hhh]”hÿ)”}”(hŒkRanges with mixed system and device pages
* Can be added if required to drm_gpusvm_get_pages fairly easily.”h]”(j  )”}”(hŒ)Ranges with mixed system and device pages”h]”hŒ)Ranges with mixed system and device pages”…””}”(hj³	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´Kdhj¯	  ubj  )”}”(hhh]”hï)”}”(hhh]”hô)”}”(hŒ?Can be added if required to drm_gpusvm_get_pages fairly easily.”h]”j!  )”}”(hjÉ	  h]”hŒ?Can be added if required to drm_gpusvm_get_pages fairly easily.”…””}”(hjË	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´KehjÇ	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjÄ	  ubah}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´KehjÁ	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj¯	  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´Kdhj¬	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj¨	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³Nh´Nubhô)”}”(hŒ­Multi-GPU support
      * Work in progress and patches expected after initially landing on GPU
        SVM.
      * Ideally can be done with little to no changes to GPU SVM.”h]”hú)”}”(hhh]”hÿ)”}”(hŒ›Multi-GPU support
* Work in progress and patches expected after initially landing on GPU
  SVM.
* Ideally can be done with little to no changes to GPU SVM.”h]”(j  )”}”(hŒMulti-GPU support”h]”hŒMulti-GPU support”…””}”(hj
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´Khhj
  ubj  )”}”(hhh]”hï)”}”(hhh]”(hô)”}”(hŒIWork in progress and patches expected after initially landing on GPU
SVM.”h]”j!  )”}”(hŒIWork in progress and patches expected after initially landing on GPU
SVM.”h]”hŒIWork in progress and patches expected after initially landing on GPU
SVM.”…””}”(hj
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kghj
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj
  ubhô)”}”(hŒ9Ideally can be done with little to no changes to GPU SVM.”h]”j!  )”}”(hj5
  h]”hŒ9Ideally can be done with little to no changes to GPU SVM.”…””}”(hj7
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kihj3
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj
  ubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´Kghj
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj
  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´Khhj 
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjü	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³Nh´Nubhô)”}”(hŒQDrop ranges in favor of radix tree
      * May be desirable for faster notifiers.”h]”hú)”}”(hhh]”hÿ)”}”(hŒKDrop ranges in favor of radix tree
* May be desirable for faster notifiers.”h]”(j  )”}”(hŒ"Drop ranges in favor of radix tree”h]”hŒ"Drop ranges in favor of radix tree”…””}”(hjs
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´Kjhjo
  ubj  )”}”(hhh]”hï)”}”(hhh]”hô)”}”(hŒ&May be desirable for faster notifiers.”h]”j!  )”}”(hj‰
  h]”hŒ&May be desirable for faster notifiers.”…””}”(hj‹
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kkhj‡
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj„
  ubah}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´Kkhj
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjo
  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´Kjhjl
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhjh
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³Nh´Nubhô)”}”(hX  Compound device pages
      * Nvidia, AMD, and Intel all have agreed expensive core MM functions in
        migrate device layer are a performance bottleneck, having compound
        device pages should help increase performance by reducing the number
        of these expensive calls.”h]”hú)”}”(hhh]”hÿ)”}”(hX  Compound device pages
* Nvidia, AMD, and Intel all have agreed expensive core MM functions in
  migrate device layer are a performance bottleneck, having compound
  device pages should help increase performance by reducing the number
  of these expensive calls.”h]”(j  )”}”(hŒCompound device pages”h]”hŒCompound device pages”…””}”(hjÇ
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´KohjÃ
  ubj  )”}”(hhh]”hï)”}”(hhh]”hô)”}”(hŒçNvidia, AMD, and Intel all have agreed expensive core MM functions in
migrate device layer are a performance bottleneck, having compound
device pages should help increase performance by reducing the number
of these expensive calls.”h]”j!  )”}”(hŒçNvidia, AMD, and Intel all have agreed expensive core MM functions in
migrate device layer are a performance bottleneck, having compound
device pages should help increase performance by reducing the number
of these expensive calls.”h]”hŒçNvidia, AMD, and Intel all have agreed expensive core MM functions in
migrate device layer are a performance bottleneck, having compound
device pages should help increase performance by reducing the number
of these expensive calls.”…””}”(hjß
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´KmhjÛ
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhjØ
  ubah}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´KmhjÕ
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÃ
  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´KohjÀ
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj¼
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³Nh´Nubhô)”}”(hŒ°Higher order dma mapping for migration
      * 4k dma mapping adversely affects migration performance on Intel
        hardware, higher order (2M) dma mapping should help here.”h]”hú)”}”(hhh]”hÿ)”}”(hŒ¤Higher order dma mapping for migration
* 4k dma mapping adversely affects migration performance on Intel
  hardware, higher order (2M) dma mapping should help here.”h]”(j  )”}”(hŒ&Higher order dma mapping for migration”h]”hŒ&Higher order dma mapping for migration”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  h³hÇh´Krhj  ubj  )”}”(hhh]”hï)”}”(hhh]”hô)”}”(hŒy4k dma mapping adversely affects migration performance on Intel
hardware, higher order (2M) dma mapping should help here.”h]”j!  )”}”(hŒy4k dma mapping adversely affects migration performance on Intel
hardware, higher order (2M) dma mapping should help here.”h]”hŒy4k dma mapping adversely affects migration performance on Intel
hardware, higher order (2M) dma mapping should help here.”…””}”(hj4  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Krhj0  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj-  ubah}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´Krhj*  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hþh³hÇh´Krhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hùhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³Nh´Nubhô)”}”(hŒ5Build common userptr implementation on top of GPU SVM”h]”j!  )”}”(hjh  h]”hŒ5Build common userptr implementation on top of GPU SVM”…””}”(hjj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kthjf  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³hÇh´Nubhô)”}”(hŒ9Driver side madvise implementation and migration policies”h]”j!  )”}”(hj  h]”hŒ9Driver side madvise implementation and migration policies”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kuhj}  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³hÇh´Nubhô)”}”(hŒJPull in pending dma-mapping API changes from Leon / Nvidia when these land”h]”j!  )”}”(hj–  h]”hŒJPull in pending dma-mapping API changes from Leon / Nvidia when these land”…””}”(hj˜  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   h³hÇh´Kvhj”  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hóhj!	  h²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j›  jœ  uh1hîh³hÇh´K^hj	  h²hubeh}”(h]”Œpossible-future-design-features”ah ]”h"]”Œpossible future design features”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K\ubeh}”(h]”Œgpu-svm-section”ah ]”h"]”Œgpu svm section”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hÍNŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
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halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jä  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j¾  j»  jë  jè  j  j  j	  j
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	  j  j³  j	  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”(hŒsystem_message”“”)”}”(hhh]”j!  )”}”(hŒ:Enumerated list start value not ordinal-1: "2" (ordinal 2)”h]”hŒ>Enumerated list start value not ordinal-1: â€œ2â€ (ordinal 2)”…””}”(hjK  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   hjH  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”Œ[/var/lib/git/docbuild/linux/Documentation/gpu/rfc/gpusvm:79: ./drivers/gpu/drm/drm_gpusvm.c”Œline”MLuh1jF  hjî  h²hh³Nh´NubjG  )”}”(hhh]”j!  )”}”(hŒ:Enumerated list start value not ordinal-1: "3" (ordinal 3)”h]”hŒ>Enumerated list start value not ordinal-1: â€œ3â€ (ordinal 3)”…””}”(hjh  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j   hje  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ja  Œsource”jc  Œline”MLuh1jF  hjî  h²hh³Nh´NubeŒtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
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