€•A      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ'/translations/zh_CN/gpu/nova/core/vbios”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/zh_TW/gpu/nova/core/vbios”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/it_IT/gpu/nova/core/vbios”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/ja_JP/gpu/nova/core/vbios”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/ko_KR/gpu/nova/core/vbios”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/sp_SP/gpu/nova/core/vbios”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ*SPDX-License-Identifier: (GPL-2.0+ OR MIT)”h]”hŒ*SPDX-License-Identifier: (GPL-2.0+ OR MIT)”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒA/var/lib/git/docbuild/linux/Documentation/gpu/nova/core/vbios.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒVBIOS”h]”hŒVBIOS”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hX­  This document describes the layout of the VBIOS image which is a series of concatenated
images in the ROM of the GPU. The VBIOS is mirrored onto the BAR 0 space and is read
by both Boot ROM firmware (also known as IFR or init-from-rom firmware) on the GPU to
bootstrap various microcontrollers (PMU, SEC, GSP) with critical initialization before
the driver loads, as well as by the nova-core driver in the kernel to boot the GSP.”h]”hX­  This document describes the layout of the VBIOS image which is a series of concatenated
images in the ROM of the GPU. The VBIOS is mirrored onto the BAR 0 space and is read
by both Boot ROM firmware (also known as IFR or init-from-rom firmware) on the GPU to
bootstrap various microcontrollers (PMU, SEC, GSP) with critical initialization before
the driver loads, as well as by the nova-core driver in the kernel to boot the GSP.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒëThe format of the images in the ROM follow the "BIOS Specification" part of the
PCI specification, with Nvidia-specific extensions. The ROM images of type FwSec
are the ones that contain Falcon ucode and what we are mainly looking for.”h]”hŒïThe format of the images in the ROM follow the â€œBIOS Specificationâ€ part of the
PCI specification, with Nvidia-specific extensions. The ROM images of type FwSec
are the ones that contain Falcon ucode and what we are mainly looking for.”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒœAs an example, the following are the different image types that can be found in the
VBIOS of an Ampere GA102 GPU which is supported by the nova-core driver.”h]”hŒœAs an example, the following are the different image types that can be found in the
VBIOS of an Ampere GA102 GPU which is supported by the nova-core driver.”…””}”(hhçhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒzPciAt Image (Type 0x00) - This is the standard PCI BIOS image, whose name
likely comes from the "IBM PC/AT" architecture.
”h]”hÊ)”}”(hŒyPciAt Image (Type 0x00) - This is the standard PCI BIOS image, whose name
likely comes from the "IBM PC/AT" architecture.”h]”hŒ}PciAt Image (Type 0x00) - This is the standard PCI BIOS image, whose name
likely comes from the â€œIBM PC/ATâ€ architecture.”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhüubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubhû)”}”(hŒ‚EFI Image (Type 0x03) - This is the EFI BIOS image. It contains the UEFI GOP
driver that is used to display UEFI graphics output.
”h]”hÊ)”}”(hŒEFI Image (Type 0x03) - This is the EFI BIOS image. It contains the UEFI GOP
driver that is used to display UEFI graphics output.”h]”hŒEFI Image (Type 0x03) - This is the EFI BIOS image. It contains the UEFI GOP
driver that is used to display UEFI graphics output.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubhû)”}”(hŒHFirst FwSec Image (Type 0xE0) - The first FwSec image (Secure Firmware)
”h]”hÊ)”}”(hŒGFirst FwSec Image (Type 0xE0) - The first FwSec image (Secure Firmware)”h]”hŒGFirst FwSec Image (Type 0xE0) - The first FwSec image (Secure Firmware)”…””}”(hj0  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj,  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubhû)”}”(hXo  Second FwSec Image (Type 0xE0) - The second FwSec image (Secure Firmware)
contains various  microcodes (also known as an applications) that do a range
of different functions. The FWSEC ucode is run in heavy-secure mode and
typically runs directly on the GSP (it could be running on a different
designated processor in future generations but as of Ampere, it is the GSP).
This firmware then loads other firmware ucodes onto the PMU and SEC2
microcontrollers for gfw initialization after GPU reset and before the driver
loads (see devinit.rst). The DEVINIT ucode is itself another ucode that is
stored in this ROM partition.
”h]”hÊ)”}”(hXn  Second FwSec Image (Type 0xE0) - The second FwSec image (Secure Firmware)
contains various  microcodes (also known as an applications) that do a range
of different functions. The FWSEC ucode is run in heavy-secure mode and
typically runs directly on the GSP (it could be running on a different
designated processor in future generations but as of Ampere, it is the GSP).
This firmware then loads other firmware ucodes onto the PMU and SEC2
microcontrollers for gfw initialization after GPU reset and before the driver
loads (see devinit.rst). The DEVINIT ucode is itself another ucode that is
stored in this ROM partition.”h]”hXn  Second FwSec Image (Type 0xE0) - The second FwSec image (Secure Firmware)
contains various  microcodes (also known as an applications) that do a range
of different functions. The FWSEC ucode is run in heavy-secure mode and
typically runs directly on the GSP (it could be running on a different
designated processor in future generations but as of Ampere, it is the GSP).
This firmware then loads other firmware ucodes onto the PMU and SEC2
microcontrollers for gfw initialization after GPU reset and before the driver
loads (see devinit.rst). The DEVINIT ucode is itself another ucode that is
stored in this ROM partition.”…””}”(hjH  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjD  ubah}”(h]”h ]”h"]”h$]”h&]”uh1húhh÷hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1hõhŸh³h Khh¶hžhubhÊ)”}”(hX¬  Once located, the Falcon ucodes have "Application Interfaces" in their data
memory (DMEM). For FWSEC, the application interface we use for FWSEC is the
"DMEM mapper" interface which is configured to run the "FRTS" command. This
command carves out the WPR2 (Write-Protected Region) in VRAM. It then places
important power-management data, called 'FRTS', into this region. The WPR2
region is only accessible to heavy-secure ucode.”h]”hX¼  Once located, the Falcon ucodes have â€œApplication Interfacesâ€ in their data
memory (DMEM). For FWSEC, the application interface we use for FWSEC is the
â€œDMEM mapperâ€ interface which is configured to run the â€œFRTSâ€ command. This
command carves out the WPR2 (Write-Protected Region) in VRAM. It then places
important power-management data, called â€˜FRTSâ€™, into this region. The WPR2
region is only accessible to heavy-secure ucode.”…””}”(hjd  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K%hh¶hžhubhŒnote”“”)”}”(hŒµIt is not clear why FwSec has 2 different partitions in the ROM, but they both
are of type 0xE0 and can be identified as such. This could be subject to change
in future generations.”h]”hÊ)”}”(hŒµIt is not clear why FwSec has 2 different partitions in the ROM, but they both
are of type 0xE0 and can be identified as such. This could be subject to change
in future generations.”h]”hŒµIt is not clear why FwSec has 2 different partitions in the ROM, but they both
are of type 0xE0 and can be identified as such. This could be subject to change
in future generations.”…””}”(hjx  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K-hjt  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jr  hh¶hžhhŸh³h Nubhµ)”}”(hhh]”(hº)”}”(hŒVBIOS ROM Layout”h]”hŒVBIOS ROM Layout”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjŒ  hžhhŸh³h K2ubhÊ)”}”(hŒQThe VBIOS layout is roughly a series of concatenated images laid out as follows::”h]”hŒPThe VBIOS layout is roughly a series of concatenated images laid out as follows:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K3hjŒ  hžhubhŒliteral_block”“”)”}”(hXS!  +----------------------------------------------------------------------------+
| VBIOS (Starting at ROM_OFFSET: 0x300000)                                   |
+----------------------------------------------------------------------------+
| +-----------------------------------------------+                          |
| | PciAt Image (Type 0x00)                       |                          |
| +-----------------------------------------------+                          |
| | +-------------------+                         |                          |
| | | ROM Header        |                         |                          |
| | | (Signature 0xAA55)|                         |                          |
| | +-------------------+                         |                          |
| |         | rom header's pci_data_struct_offset |                          |
| |         | points to the PCIR structure        |                          |
| |         V                                     |                          |
| | +-------------------+                         |                          |
| | | PCIR Structure    |                         |                          |
| | | (Signature "PCIR")|                         |                          |
| | | last_image: 0x80  |                         |                          |
| | | image_len: size   |                         |                          |
| | | in 512-byte units |                         |                          |
| | +-------------------+                         |                          |
| |         |                                     |                          |
| |         | NPDE immediately follows PCIR       |                          |
| |         V                                     |                          |
| | +-------------------+                         |                          |
| | | NPDE Structure    |                         |                          |
| | | (Signature "NPDE")|                         |                          |
| | | last_image: 0x00  |                         |                          |
| | +-------------------+                         |                          |
| |                                               |                          |
| | +-------------------+                         |                          |
| | | BIT Header        | (Signature scanning     |                          |
| | | (Signature "BIT") |  provides the location  |                          |
| | +-------------------+  of the BIT table)      |                          |
| |         | header is                           |                          |
| |         | followed by a table of tokens       |                          |
| |         V one of which is for falcon data.    |                          |
| | +-------------------+                         |                          |
| | | BIT Tokens        |                         |                          |
| | |  ______________   |                         |                          |
| | | | Falcon Data |   |                         |                          |
| | | | Token (0x70)|---+------------>------------+--+                       |
| | | +-------------+   |  falcon_data_ptr()      |  |                       |
| | +-------------------+                         |  V                       |
| +-----------------------------------------------+  |                       |
|              (no gap between images)               |                       |
| +-----------------------------------------------+  |                       |
| | EFI Image (Type 0x03)                         |  |                       |
| +-----------------------------------------------+  |                       |
| | Contains the UEFI GOP driver (Graphics Output)|  |                       |
| | +-------------------+                         |  |                       |
| | | ROM Header        |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | PCIR Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | NPDE Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | Image data        |                         |  |                       |
| | +-------------------+                         |  |                       |
| +-----------------------------------------------+  |                       |
|              (no gap between images)               |                       |
| +-----------------------------------------------+  |                       |
| | First FwSec Image (Type 0xE0)                 |  |                       |
| +-----------------------------------------------+  |                       |
| | +-------------------+                         |  |                       |
| | | ROM Header        |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | PCIR Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | NPDE Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | Image data        |                         |  |                       |
| | +-------------------+                         |  |                       |
| +-----------------------------------------------+  |                       |
|              (no gap between images)               |                       |
| +-----------------------------------------------+  |                       |
| | Second FwSec Image (Type 0xE0)                |  |                       |
| +-----------------------------------------------+  |                       |
| | +-------------------+                         |  |                       |
| | | ROM Header        |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | PCIR Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | NPDE Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| |                                               |  |                       |
| | +-------------------+                         |  |                       |
| | | PMU Lookup Table  | <- falcon_data_offset <----+                       |
| | | +-------------+   |    pmu_lookup_table     |                          |
| | | | Entry 0x85  |   |                         |                          |
| | | | FWSEC_PROD  |   |                         |                          |
| | | +-------------+   |                         |                          |
| | +-------------------+                         |                          |
| |         |                                     |                          |
| |         | points to                           |                          |
| |         V                                     |                          |
| | +-------------------+                         |                          |
| | | FalconUCodeDescV3 | <- falcon_ucode_offset  |                          |
| | | (FWSEC Firmware)  |    fwsec_header()       |                          |
| | +-------------------+                         |                          |
| |         |   immediately followed  by...       |                          |
| |         V                                     |                          |
| | +----------------------------+                |                          |
| | | Signatures + FWSEC Ucode   |                |                          |
| | | fwsec_sigs(), fwsec_ucode()|                |                          |
| | +----------------------------+                |                          |
| +-----------------------------------------------+                          |
|                                                                            |
+----------------------------------------------------------------------------+”h]”hXS!  +----------------------------------------------------------------------------+
| VBIOS (Starting at ROM_OFFSET: 0x300000)                                   |
+----------------------------------------------------------------------------+
| +-----------------------------------------------+                          |
| | PciAt Image (Type 0x00)                       |                          |
| +-----------------------------------------------+                          |
| | +-------------------+                         |                          |
| | | ROM Header        |                         |                          |
| | | (Signature 0xAA55)|                         |                          |
| | +-------------------+                         |                          |
| |         | rom header's pci_data_struct_offset |                          |
| |         | points to the PCIR structure        |                          |
| |         V                                     |                          |
| | +-------------------+                         |                          |
| | | PCIR Structure    |                         |                          |
| | | (Signature "PCIR")|                         |                          |
| | | last_image: 0x80  |                         |                          |
| | | image_len: size   |                         |                          |
| | | in 512-byte units |                         |                          |
| | +-------------------+                         |                          |
| |         |                                     |                          |
| |         | NPDE immediately follows PCIR       |                          |
| |         V                                     |                          |
| | +-------------------+                         |                          |
| | | NPDE Structure    |                         |                          |
| | | (Signature "NPDE")|                         |                          |
| | | last_image: 0x00  |                         |                          |
| | +-------------------+                         |                          |
| |                                               |                          |
| | +-------------------+                         |                          |
| | | BIT Header        | (Signature scanning     |                          |
| | | (Signature "BIT") |  provides the location  |                          |
| | +-------------------+  of the BIT table)      |                          |
| |         | header is                           |                          |
| |         | followed by a table of tokens       |                          |
| |         V one of which is for falcon data.    |                          |
| | +-------------------+                         |                          |
| | | BIT Tokens        |                         |                          |
| | |  ______________   |                         |                          |
| | | | Falcon Data |   |                         |                          |
| | | | Token (0x70)|---+------------>------------+--+                       |
| | | +-------------+   |  falcon_data_ptr()      |  |                       |
| | +-------------------+                         |  V                       |
| +-----------------------------------------------+  |                       |
|              (no gap between images)               |                       |
| +-----------------------------------------------+  |                       |
| | EFI Image (Type 0x03)                         |  |                       |
| +-----------------------------------------------+  |                       |
| | Contains the UEFI GOP driver (Graphics Output)|  |                       |
| | +-------------------+                         |  |                       |
| | | ROM Header        |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | PCIR Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | NPDE Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | Image data        |                         |  |                       |
| | +-------------------+                         |  |                       |
| +-----------------------------------------------+  |                       |
|              (no gap between images)               |                       |
| +-----------------------------------------------+  |                       |
| | First FwSec Image (Type 0xE0)                 |  |                       |
| +-----------------------------------------------+  |                       |
| | +-------------------+                         |  |                       |
| | | ROM Header        |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | PCIR Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | NPDE Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | Image data        |                         |  |                       |
| | +-------------------+                         |  |                       |
| +-----------------------------------------------+  |                       |
|              (no gap between images)               |                       |
| +-----------------------------------------------+  |                       |
| | Second FwSec Image (Type 0xE0)                |  |                       |
| +-----------------------------------------------+  |                       |
| | +-------------------+                         |  |                       |
| | | ROM Header        |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | PCIR Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| | | NPDE Structure    |                         |  |                       |
| | +-------------------+                         |  |                       |
| |                                               |  |                       |
| | +-------------------+                         |  |                       |
| | | PMU Lookup Table  | <- falcon_data_offset <----+                       |
| | | +-------------+   |    pmu_lookup_table     |                          |
| | | | Entry 0x85  |   |                         |                          |
| | | | FWSEC_PROD  |   |                         |                          |
| | | +-------------+   |                         |                          |
| | +-------------------+                         |                          |
| |         |                                     |                          |
| |         | points to                           |                          |
| |         V                                     |                          |
| | +-------------------+                         |                          |
| | | FalconUCodeDescV3 | <- falcon_ucode_offset  |                          |
| | | (FWSEC Firmware)  |    fwsec_header()       |                          |
| | +-------------------+                         |                          |
| |         |   immediately followed  by...       |                          |
| |         V                                     |                          |
| | +----------------------------+                |                          |
| | | Signatures + FWSEC Ucode   |                |                          |
| | | fwsec_sigs(), fwsec_ucode()|                |                          |
| | +----------------------------+                |                          |
| +-----------------------------------------------+                          |
|                                                                            |
+----------------------------------------------------------------------------+”…””}”hj­  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j«  hŸh³h K5hjŒ  hžhubjs  )”}”(hŒlThis diagram is created based on an GA-102 Ampere GPU as an example and could
vary for future or other GPUs.”h]”hÊ)”}”(hŒlThis diagram is created based on an GA-102 Ampere GPU as an example and could
vary for future or other GPUs.”h]”hŒlThis diagram is created based on an GA-102 Ampere GPU as an example and could
vary for future or other GPUs.”…””}”(hj¿  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K£hj»  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jr  hjŒ  hžhhŸh³h Nubjs  )”}”(hŒOFor more explanations of acronyms, see the detailed descriptions in `vbios.rs`.”h]”hÊ)”}”(hjÕ  h]”(hŒDFor more explanations of acronyms, see the detailed descriptions in ”…””}”(hj×  hžhhŸNh NubhŒtitle_reference”“”)”}”(hŒ
`vbios.rs`”h]”hŒvbios.rs”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞ  hj×  ubhŒ.”…””}”(hj×  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K§hjÓ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jr  hjŒ  hžhhŸh³h Nubeh}”(h]”Œvbios-rom-layout”ah ]”h"]”Œvbios rom layout”ah$]”h&]”uh1h´hh¶hžhhŸh³h K2ubhµ)”}”(hhh]”(hº)”}”(hŒFalcon data Lookup”h]”hŒFalcon data Lookup”…””}”(hj	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h KªubhÊ)”}”(hŒçA key part of the VBIOS extraction code (vbios.rs) is to find the location of the
Falcon data in the VBIOS which contains the PMU lookup table. This lookup table is
used to find the required Falcon ucode based on an application ID.”h]”hŒçA key part of the VBIOS extraction code (vbios.rs) is to find the location of the
Falcon data in the VBIOS which contains the PMU lookup table. This lookup table is
used to find the required Falcon ucode based on an application ID.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K«hj  hžhubhÊ)”}”(hX—  The location of the PMU lookup table is found by scanning the BIT (`BIOS Information Table`_)
tokens for a token with the id `BIT_TOKEN_ID_FALCON_DATA` (0x70) which indicates the
offset of the same from the start of the VBIOS image. Unfortunately, the offset
does not account for the EFI image located between the PciAt and FwSec images.
The `vbios.rs` code compensates for this with appropriate arithmetic.”h]”(hŒCThe location of the PMU lookup table is found by scanning the BIT (”…””}”(hj%  hžhhŸNh NubhŒ	reference”“”)”}”(hŒ`BIOS Information Table`_”h]”hŒBIOS Information Table”…””}”(hj/  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”ŒBIOS Information Table”Œrefuri”Œ]https://download.nvidia.com/open-gpu-doc/BIOS-Information-Table/1/BIOS-Information-Table.html”uh1j-  hj%  Œresolved”KubhŒ!)
tokens for a token with the id ”…””}”(hj%  hžhhŸNh Nubjß  )”}”(hŒ`BIT_TOKEN_ID_FALCON_DATA`”h]”hŒBIT_TOKEN_ID_FALCON_DATA”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞ  hj%  ubhŒ¿ (0x70) which indicates the
offset of the same from the start of the VBIOS image. Unfortunately, the offset
does not account for the EFI image located between the PciAt and FwSec images.
The ”…””}”(hj%  hžhhŸNh Nubjß  )”}”(hŒ
`vbios.rs`”h]”hŒvbios.rs”…””}”(hjX  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞ  hj%  ubhŒ7 code compensates for this with appropriate arithmetic.”…””}”(hj%  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¯hj  hžhubhŒtarget”“”)”}”(hŒ{.. _`BIOS Information Table`: https://download.nvidia.com/open-gpu-doc/BIOS-Information-Table/1/BIOS-Information-Table.html”h]”h}”(h]”Œbios-information-table”ah ]”h"]”Œbios information table”ah$]”h&]”j?  j@  uh1jp  h Kµhj  hžhhŸh³Œ
referenced”Kubeh}”(h]”Œfalcon-data-lookup”ah ]”h"]”Œfalcon data lookup”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kªubeh}”(h]”Œvbios”ah ]”h"]”Œvbios”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j²  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œbios information table”]”j/  asŒrefids”}”Œnameids”}”(jŒ  j‰  j  j   j„  j  j{  jx  uŒ	nametypes”}”(jŒ  ‰j  ‰j„  ‰j{  ˆuh}”(j‰  h¶j   jŒ  j  j  jx  jr  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.