€•º5Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ)/translations/zh_CN/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/zh_TW/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/it_IT/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/ja_JP/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/ko_KR/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/pt_BR/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/sp_SP/gpu/nova/core/devinit”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hµhhh²hh³ŒC/var/lib/git/docbuild/linux/Documentation/gpu/nova/core/devinit.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒDevice Initialization (devinit)”h]”hŒDevice Initialization (devinit)”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhŒ paragraph”“”)”}”(hXThe devinit process is complex and subject to change. This document provides a high-level overview using the Ampere GPU family as an example. The goal is to provide a conceptual overview of the process to aid in understanding the corresponding kernel code.”h]”hXThe devinit process is complex and subject to change. This document provides a high-level overview using the Ampere GPU family as an example. The goal is to provide a conceptual overview of the process to aid in understanding the corresponding kernel code.”…””}”(hhßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhhÊh²hubhÞ)”}”(hŒØDevice initialization (devinit) is a crucial sequence of register read/write operations that occur after a GPU reset. The devinit sequence is essential for properly configuring the GPU hardware before it can be used.”h]”hŒØDevice initialization (devinit) is a crucial sequence of register read/write operations that occur after a GPU reset. The devinit sequence is essential for properly configuring the GPU hardware before it can be used.”…””}”(hhíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K hhÊh²hubhÞ)”}”(hXIThe devinit engine is an interpreter program that typically runs on the PMU (Power Management Unit) microcontroller of the GPU. This interpreter executes a "script" of initialization commands. The devinit engine itself is part of the VBIOS ROM in the same ROM image as the FWSEC (Firmware Security) image (see fwsec.rst and vbios.rst) and it runs before the nova-core driver is even loaded. On an Ampere GPU, the devinit ucode is separate from the FWSEC ucode. It is launched by FWSEC, which runs on the GSP in 'heavy-secure' mode, while devinit runs on the PMU in 'light-secure' mode.”h]”hXUThe devinit engine is an interpreter program that typically runs on the PMU (Power Management Unit) microcontroller of the GPU. This interpreter executes a “script†of initialization commands. The devinit engine itself is part of the VBIOS ROM in the same ROM image as the FWSEC (Firmware Security) image (see fwsec.rst and vbios.rst) and it runs before the nova-core driver is even loaded. On an Ampere GPU, the devinit ucode is separate from the FWSEC ucode. It is launched by FWSEC, which runs on the GSP in ‘heavy-secure’ mode, while devinit runs on the PMU in ‘light-secure’ mode.”…””}”(hhûh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhhÊh²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒKey Functions of devinit”h]”hŒKey Functions of devinit”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj h²hh³hÇh´KubhÞ)”}”(hŒ(devinit performs several critical tasks:”h]”hŒ(devinit performs several critical tasks:”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khj h²hubhŒenumerated_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒ*Programming VRAM memory controller timings”h]”hÞ)”}”(hj1h]”hŒ*Programming VRAM memory controller timings”…””}”(hj3h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khj/ubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hj*h²hh³hÇh´Nubj.)”}”(hŒPower sequencing”h]”hÞ)”}”(hjHh]”hŒPower sequencing”…””}”(hjJh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhjFubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hj*h²hh³hÇh´Nubj.)”}”(hŒ/Clock and PLL (Phase-Locked Loop) configuration”h]”hÞ)”}”(hj_h]”hŒ/Clock and PLL (Phase-Locked Loop) configuration”…””}”(hjah²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khj]ubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hj*h²hh³hÇh´Nubj.)”}”(hŒThermal management ”h]”hÞ)”}”(hŒThermal management”h]”hŒThermal management”…””}”(hjxh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khjtubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hj*h²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1j(hj h²hh³hÇh´Kubeh}”(h]”Œkey-functions-of-devinit”ah ]”h"]”Œkey functions of devinit”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒ&Low-level Firmware Initialization Flow”h]”hŒ&Low-level Firmware Initialization Flow”…””}”(hj¢h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjŸh²hh³hÇh´K ubhÞ)”}”(hŒéUpon reset, several microcontrollers on the GPU (such as PMU, SEC2, GSP, etc.) run GPU firmware (gfw) code to set up the GPU and its core parameters. Most of the GPU is considered unusable until this initialization process completes.”h]”hŒéUpon reset, several microcontrollers on the GPU (such as PMU, SEC2, GSP, etc.) run GPU firmware (gfw) code to set up the GPU and its core parameters. Most of the GPU is considered unusable until this initialization process completes.”…””}”(hj°h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K!hjŸh²hubhÞ)”}”(hŒ6These low-level GPU firmware components are typically:”h]”hŒ6These low-level GPU firmware components are typically:”…””}”(hj¾h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K%hjŸh²hubj))”}”(hhh]”(j.)”}”(hŒQLocated in the VBIOS ROM in the same ROM partition (see vbios.rst and fwsec.rst).”h]”hÞ)”}”(hjÑh]”hŒQLocated in the VBIOS ROM in the same ROM partition (see vbios.rst and fwsec.rst).”…””}”(hjÓh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K'hjÏubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hjÌh²hh³hÇh´Nubj.)”}”(hŒ4Executed in sequence on different microcontrollers: ”h]”hÞ)”}”(hŒ3Executed in sequence on different microcontrollers:”h]”hŒ3Executed in sequence on different microcontrollers:”…””}”(hjêh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K(hjæubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hjÌh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j’j“j”hj•j–uh1j(hjŸh²hh³hÇh´K'ubhŒ block_quote”“”)”}”(hŒ«- The devinit engine typically but not necessarily runs on the PMU. - On an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Processor) in heavy-secure mode. ”h]”hŒ bullet_list”“”)”}”(hhh]”(j.)”}”(hŒAThe devinit engine typically but not necessarily runs on the PMU.”h]”hÞ)”}”(hjh]”hŒAThe devinit engine typically but not necessarily runs on the PMU.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K*hjubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hj ubj.)”}”(hŒcOn an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Processor) in heavy-secure mode. ”h]”hÞ)”}”(hŒbOn an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Processor) in heavy-secure mode.”h]”hŒbOn an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Processor) in heavy-secure mode.”…””}”(hj*h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K+hj&ubah}”(h]”h ]”h"]”h$]”h&]”uh1j-hj ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j h³hÇh´K*hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jh³hÇh´K*hjŸh²hubhÞ)”}”(hŒçBefore the driver can proceed with further initialization, it must wait for a signal indicating that core initialization is complete (known as GFW_BOOT). This signal is asserted by the FWSEC running on the GSP in heavy-secure mode.”h]”hŒçBefore the driver can proceed with further initialization, it must wait for a signal indicating that core initialization is complete (known as GFW_BOOT). This signal is asserted by the FWSEC running on the GSP in heavy-secure mode.”…””}”(hjLh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K.hjŸh²hubeh}”(h]”Œ&low-level-firmware-initialization-flow”ah ]”h"]”Œ&low-level firmware initialization flow”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K ubhÉ)”}”(hhh]”(hÎ)”}”(hŒRuntime Considerations”h]”hŒRuntime Considerations”…””}”(hjeh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjbh²hh³hÇh´K3ubhÞ)”}”(hŒ´It's important to note that the devinit sequence also needs to run during suspend/resume operations at runtime, not just during initial boot, as it is critical to power management.”h]”hŒ¶It’s important to note that the devinit sequence also needs to run during suspend/resume operations at runtime, not just during initial boot, as it is critical to power management.”…””}”(hjsh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K4hjbh²hubeh}”(h]”Œruntime-considerations”ah ]”h"]”Œruntime considerations”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K3ubhÉ)”}”(hhh]”(hÎ)”}”(hŒSecurity and Access Control”h]”hŒSecurity and Access Control”…””}”(hjŒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj‰h²hh³hÇh´K8ubhÞ)”}”(hXuThe initialization process involves careful privilege management. For example, before accessing certain completion status registers, the driver must check privilege level masks. Some registers are only accessible after secure firmware (FWSEC) lowers the privilege level to allow CPU (LS/low-secure) access. This is the case, for example, when receiving the GFW_BOOT signal.”h]”hXuThe initialization process involves careful privilege management. For example, before accessing certain completion status registers, the driver must check privilege level masks. Some registers are only accessible after secure firmware (FWSEC) lowers the privilege level to allow CPU (LS/low-secure) access. This is the case, for example, when receiving the GFW_BOOT signal.”…””}”(hjšh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K9hj‰h²hubeh}”(h]”Œsecurity-and-access-control”ah ]”h"]”Œsecurity and access control”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K8ubeh}”(h]”Œdevice-initialization-devinit”ah ]”h"]”Œdevice initialization (devinit)”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hÍNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jÛŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jµj²jœj™j_j\j†jƒj­jªuŒ nametypes”}”(jµ‰jœ‰j_‰j†‰j­‰uh}”(j²hÊj™j j\jŸjƒjbjªj‰uŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.