<sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget-/translations/zh_CN/gpu/intel-display/hotplugmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/zh_TW/gpu/intel-display/hotplugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/it_IT/gpu/intel-display/hotplugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ja_JP/gpu/intel-display/hotplugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ko_KR/gpu/intel-display/hotplugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/pt_BR/gpu/intel-display/hotplugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/sp_SP/gpu/intel-display/hotplugmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(hSPDX-License-Identifier: MITh]hSPDX-License-Identifier: MIT}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhG/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug.rsthKubh)}(h#Copyright © 2026 Intel Corporationh]h#Copyright © 2026 Intel Corporation}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubhsection)}(hhh](htitle)}(hHotplugh]hHotplug}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hSimply put, hotplug occurs when a display is connected to or disconnected from the system. However, there may be adapters and docking stations and Display Port short pulses and MST devices involved, complicating matters.h]hSimply put, hotplug occurs when a display is connected to or disconnected from the system. However, there may be adapters and docking stations and Display Port short pulses and MST devices involved, complicating matters.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chK+hhhhubh)}(hCHotplug in i915 is handled in many different levels of abstraction.h]hCHotplug in i915 is handled in many different levels of abstraction.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chK/hhhhubh)}(hXThe platform dependent interrupt handling code in i915_irq.c enables, disables, and does preliminary handling of the interrupts. The interrupt handlers gather the hotplug detect (HPD) information from relevant registers into a platform independent mask of hotplug pins that have fired.h]hXThe platform dependent interrupt handling code in i915_irq.c enables, disables, and does preliminary handling of the interrupts. The interrupt handlers gather the hotplug detect (HPD) information from relevant registers into a platform independent mask of hotplug pins that have fired.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chK1hhhhubh)}(hThe platform independent interrupt handler intel_hpd_irq_handler() in intel_hotplug.c does hotplug irq storm detection and mitigation, and passes further processing to appropriate bottom halves (Display Port specific and regular hotplug).h]hThe platform independent interrupt handler intel_hpd_irq_handler() in intel_hotplug.c does hotplug irq storm detection and mitigation, and passes further processing to appropriate bottom halves (Display Port specific and regular hotplug).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chK6hhhhubh)}(hThe Display Port work function i915_digport_work_func() calls into intel_dp_hpd_pulse() via hooks, which handles DP short pulses and DP MST long pulses, with failures and non-MST long pulses triggering regular hotplug processing on the connector.h]hThe Display Port work function i915_digport_work_func() calls into intel_dp_hpd_pulse() via hooks, which handles DP short pulses and DP MST long pulses, with failures and non-MST long pulses triggering regular hotplug processing on the connector.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chK;hhhhubh)}(hThe regular hotplug work function i915_hotplug_work_func() calls connector detect hooks, and, if connector status changes, triggers sending of hotplug uevent to userspace via drm_kms_helper_hotplug_event().h]hThe regular hotplug work function i915_hotplug_work_func() calls connector detect hooks, and, if connector status changes, triggers sending of hotplug uevent to userspace via drm_kms_helper_hotplug_event().}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chK@hhhhubh)}(hFinally, the userspace is responsible for triggering a modeset upon receiving the hotplug uevent, disabling or enabling the crtc as needed.h]hFinally, the userspace is responsible for triggering a modeset upon receiving the hotplug uevent, disabling or enabling the crtc as needed.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chKDhhhhubh)}(hXThe hotplug interrupt storm detection and mitigation code keeps track of the number of interrupts per hotplug pin per a period of time, and if the number of interrupts exceeds a certain threshold, the interrupt is disabled for a while before being re-enabled. The intention is to mitigate issues raising from broken hardware triggering massive amounts of interrupts and grinding the system to a halt.h]hXThe hotplug interrupt storm detection and mitigation code keeps track of the number of interrupts per hotplug pin per a period of time, and if the number of interrupts exceeds a certain threshold, the interrupt is disabled for a while before being re-enabled. The intention is to mitigate issues raising from broken hardware triggering massive amounts of interrupts and grinding the system to a halt.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chKGhhhhubh)}(hXCurrent implementation expects that hotplug interrupt storm will not be seen when display port sink is connected, hence on platforms whose DP callback is handled by i915_digport_work_func reenabling of hpd is not performed (it was never expected to be disabled in the first place ;) ) this is specific to DP sinks handled by this routine and any other display such as HDMI or DVI enabled on the same port will have proper logic since it will use i915_hotplug_work_func where this logic is handled.h]hXCurrent implementation expects that hotplug interrupt storm will not be seen when display port sink is connected, hence on platforms whose DP callback is handled by i915_digport_work_func reenabling of hpd is not performed (it was never expected to be disabled in the first place ;) ) this is specific to DP sinks handled by this routine and any other display such as HDMI or DVI enabled on the same port will have proper logic since it will use i915_hotplug_work_func where this logic is handled.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhu/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:7: ./drivers/gpu/drm/i915/display/intel_hotplug.chKNhhhhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single"intel_hpd_pin_default (C function)c.intel_hpd_pin_defaulthNtauh1jthhhhhNhNubhdesc)}(hhh](hdesc_signature)}(h3enum hpd_pin intel_hpd_pin_default (enum port port)h]hdesc_signature_line)}(h2enum hpd_pin intel_hpd_pin_default(enum port port)h](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKZubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKZubh)}(hhh]h desc_sig_name)}(hhpd_pinh]hhpd_pin}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomaincreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}jintel_hpd_pin_defaultsbc.intel_hpd_pin_defaultasbuh1hhjhhhjhKZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKZubh desc_name)}(hintel_hpd_pin_defaulth]j)}(hjh]hintel_hpd_pin_default}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jhjhhhjhKZubhdesc_parameterlist)}(h(enum port port)h]hdesc_parameter)}(henum port porth](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hporth]hport}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]jc.intel_hpd_pin_defaultasbuh1hhjubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hporth]hport}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhKZubeh}(h]h ]h"]h$]h&]hhƌ add_permalinkuh1jsphinx_line_type declaratorhjhhhjhKZubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhjhKZhjhhubh desc_content)}(hhh]h)}(h0return default pin associated with certain port.h]h0return default pin associated with certain port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKZhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKZubeh}(h]h ](jfunctioneh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhhhNhNubh container)}(h**Parameters** ``enum port port`` the hpd port to get associated pin **Description** It is only valid and used by digital port encoder. Return pin that is associatade with **port**.h](h)}(h**Parameters**h]hstrong)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK^hjubhdefinition_list)}(hhh]hdefinition_list_item)}(h6``enum port port`` the hpd port to get associated pin h](hterm)}(h``enum port port``h]hliteral)}(hjh]henum port port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK[hjubh definition)}(hhh]h)}(h"the hpd port to get associated pinh]h"the hpd port to get associated pin}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK[hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhK[hjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj,h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK]hjubh)}(h2It is only valid and used by digital port encoder.h]h2It is only valid and used by digital port encoder.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK\hjubh)}(h-Return pin that is associatade with **port**.h](h$Return pin that is associatade with }(hjQhhhNhNubj)}(h**port**h]hport}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjQubh.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK^hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](j'intel_hpd_irq_storm_detect (C function)c.intel_hpd_irq_storm_detecthNtauh1jthhhhhNhNubj)}(hhh](j)}(h`bool intel_hpd_irq_storm_detect (struct intel_display *display, enum hpd_pin pin, bool long_hpd)h]j)}(h_bool intel_hpd_irq_storm_detect(struct intel_display *display, enum hpd_pin pin, bool long_hpd)h](hdesc_sig_keyword_type)}(hboolh]hbool}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhK|ubj)}(hintel_hpd_irq_storm_detecth]j)}(hintel_hpd_irq_storm_detecth]hintel_hpd_irq_storm_detect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j jeh"]h$]h&]hhuh1jhjhhhjhK|ubj)}(h@(struct intel_display *display, enum hpd_pin pin, bool long_hpd)h](j)}(hstruct intel_display *displayh](j)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h intel_displayh]h intel_display}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.intel_hpd_irq_storm_detectasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubhdesc_sig_punctuation)}(h*h]h*}(hj!hhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjubj)}(hdisplayh]hdisplay}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubj)}(henum hpd_pin pinh](j)}(hjh]henum}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubh)}(hhh]j)}(hhpd_pinh]hhpd_pin}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjimodnameN classnameNjj)}j]j c.intel_hpd_irq_storm_detectasbuh1hhjEubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hpinh]hpin}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubj)}(h bool long_hpdh](j)}(hjh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hlong_hpdh]hlong_hpd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhjhK|ubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhK|ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhK|hjhhubj)}(hhh]h)}(h.gather stats and detect HPD IRQ storm on a pinh]h.gather stats and detect HPD IRQ storm on a pin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK|hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhK|ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubj)}(hX~**Parameters** ``struct intel_display *display`` display device ``enum hpd_pin pin`` the pin to gather stats on ``bool long_hpd`` whether the HPD IRQ was long or short **Description** Gather stats about HPD IRQs from the specified **pin**, and detect IRQ storms. Only the pin specific stats and state are changed, the caller is responsible for further action. The number of IRQs that are allowed within **HPD_STORM_DETECT_PERIOD** is stored in **display->hotplug.hpd_storm_threshold** which defaults to **HPD_STORM_DEFAULT_THRESHOLD**. Long IRQs count as +10 to this threshold, and short IRQs count as +1. If this threshold is exceeded, it's considered an IRQ storm and the IRQ state is set to **HPD_MARK_DISABLED**. By default, most systems will only count long IRQs towards :c:type:`display->hotplug `.hpd_storm_threshold. However, some older systems also suffer from short IRQ storms and must also track these. Because short IRQ storms are naturally caused by sideband interactions with DP MST devices, short IRQ detection is only enabled for systems without DP MST support. Systems which are new enough to support DP MST are far less likely to suffer from IRQ storms at all, so this is fine. The HPD threshold can be controlled through i915_hpd_storm_ctl in debugfs, and should only be adjusted for automated hotplug testing. Return true if an IRQ storm was detected on **pin**.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhj ubj)}(hhh](j)}(h1``struct intel_display *display`` display device h](j)}(h!``struct intel_display *display``h]j)}(hj2h]hstruct intel_display *display}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK}hj,ubj)}(hhh]h)}(hdisplay deviceh]hdisplay device}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhK}hjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhjGhK}hj)ubj)}(h0``enum hpd_pin pin`` the pin to gather stats on h](j)}(h``enum hpd_pin pin``h]j)}(hjkh]henum hpd_pin pin}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjiubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chK~hjeubj)}(hhh]h)}(hthe pin to gather stats onh]hthe pin to gather stats on}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK~hjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jhjhK~hj)ubj)}(h8``bool long_hpd`` whether the HPD IRQ was long or short h](j)}(h``bool long_hpd``h]j)}(hjh]h bool long_hpd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhjubj)}(hhh]h)}(h%whether the HPD IRQ was long or shorth]h%whether the HPD IRQ was long or short}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhj)ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhj ubh)}(hGather stats about HPD IRQs from the specified **pin**, and detect IRQ storms. Only the pin specific stats and state are changed, the caller is responsible for further action.h](h/Gather stats about HPD IRQs from the specified }(hjhhhNhNubj)}(h**pin**h]hpin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhy, and detect IRQ storms. Only the pin specific stats and state are changed, the caller is responsible for further action.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhj ubh)}(hXdThe number of IRQs that are allowed within **HPD_STORM_DETECT_PERIOD** is stored in **display->hotplug.hpd_storm_threshold** which defaults to **HPD_STORM_DEFAULT_THRESHOLD**. Long IRQs count as +10 to this threshold, and short IRQs count as +1. If this threshold is exceeded, it's considered an IRQ storm and the IRQ state is set to **HPD_MARK_DISABLED**.h](h+The number of IRQs that are allowed within }(hjhhhNhNubj)}(h**HPD_STORM_DETECT_PERIOD**h]hHPD_STORM_DETECT_PERIOD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh is stored in }(hjhhhNhNubj)}(h(**display->hotplug.hpd_storm_threshold**h]h$display->hotplug.hpd_storm_threshold}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh which defaults to }(hjhhhNhNubj)}(h**HPD_STORM_DEFAULT_THRESHOLD**h]hHPD_STORM_DEFAULT_THRESHOLD}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh. Long IRQs count as +10 to this threshold, and short IRQs count as +1. If this threshold is exceeded, it’s considered an IRQ storm and the IRQ state is set to }(hjhhhNhNubj)}(h**HPD_MARK_DISABLED**h]hHPD_MARK_DISABLED}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhj ubh)}(hXBy default, most systems will only count long IRQs towards :c:type:`display->hotplug `.hpd_storm_threshold. However, some older systems also suffer from short IRQ storms and must also track these. Because short IRQ storms are naturally caused by sideband interactions with DP MST devices, short IRQ detection is only enabled for systems without DP MST support. Systems which are new enough to support DP MST are far less likely to suffer from IRQ storms at all, so this is fine.h](h;By default, most systems will only count long IRQs towards }(hjmhhhNhNubh)}(h$:c:type:`display->hotplug `h]j)}(hjwh]hdisplay->hotplug}(hjyhhhNhNubah}(h]h ](xrefjc-typeeh"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&]refdocgpu/intel-display/hotplug refdomainjreftypetype refexplicitrefwarnjj)}j]sb reftargetdisplayuh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhjmubhX.hpd_storm_threshold. However, some older systems also suffer from short IRQ storms and must also track these. Because short IRQ storms are naturally caused by sideband interactions with DP MST devices, short IRQ detection is only enabled for systems without DP MST support. Systems which are new enough to support DP MST are far less likely to suffer from IRQ storms at all, so this is fine.}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhj ubh)}(hThe HPD threshold can be controlled through i915_hpd_storm_ctl in debugfs, and should only be adjusted for automated hotplug testing.h]hThe HPD threshold can be controlled through i915_hpd_storm_ctl in debugfs, and should only be adjusted for automated hotplug testing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhj ubh)}(h4Return true if an IRQ storm was detected on **pin**.h](h,Return true if an IRQ storm was detected on }(hjhhhNhNubj)}(h**pin**h]hpin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](j"intel_hpd_trigger_irq (C function)c.intel_hpd_trigger_irqhNtauh1jthhhhhNhNubj)}(hhh](j)}(h@void intel_hpd_trigger_irq (struct intel_digital_port *dig_port)h]j)}(h?void intel_hpd_trigger_irq(struct intel_digital_port *dig_port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hintel_hpd_trigger_irqh]j)}(hintel_hpd_trigger_irqh]hintel_hpd_trigger_irq}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j jeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h%(struct intel_digital_port *dig_port)h]j)}(h#struct intel_digital_port *dig_porth](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hintel_digital_porth]hintel_digital_port}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjRmodnameN classnameNjj)}j]j)}jjsbc.intel_hpd_trigger_irqasbuh1hhj.ubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj )}(hj#h]h*}(hj~hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj.ubj)}(hdig_porth]hdig_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj*ubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h#trigger an hpd irq event for a porth]h#trigger an hpd irq event for a port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubj)}(h**Parameters** ``struct intel_digital_port *dig_port`` digital port **Description** Trigger an HPD interrupt event for the given port, emulating a short pulse generated by the sink, and schedule the dig port work to handle it.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubj)}(hhh]j)}(h5``struct intel_digital_port *dig_port`` digital port h](j)}(h'``struct intel_digital_port *dig_port``h]j)}(hjh]h#struct intel_digital_port *dig_port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubj)}(hhh]h)}(h digital porth]h digital port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hMhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj1h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubh)}(hTrigger an HPD interrupt event for the given port, emulating a short pulse generated by the sink, and schedule the dig port work to handle it.h]hTrigger an HPD interrupt event for the given port, emulating a short pulse generated by the sink, and schedule the dig port work to handle it.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](j"intel_hpd_irq_handler (C function)c.intel_hpd_irq_handlerhNtauh1jthhhhhNhNubj)}(hhh](j)}(hWvoid intel_hpd_irq_handler (struct intel_display *display, u32 pin_mask, u32 long_mask)h]j)}(hVvoid intel_hpd_irq_handler(struct intel_display *display, u32 pin_mask, u32 long_mask)h](j)}(hvoidh]hvoid}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrhhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM<ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrhhhjhM<ubj)}(hintel_hpd_irq_handlerh]j)}(hintel_hpd_irq_handlerh]hintel_hpd_irq_handler}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j jeh"]h$]h&]hhuh1jhjrhhhjhM<ubj)}(h<(struct intel_display *display, u32 pin_mask, u32 long_mask)h](j)}(hstruct intel_display *displayh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h intel_displayh]h intel_display}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.intel_hpd_irq_handlerasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(hj#h]h*}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjubj)}(hdisplayh]hdisplay}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubj)}(h u32 pin_maskh](h)}(hhh]j)}(hu32h]hu32}(hj( hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj% ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj* modnameN classnameNjj)}j]jc.intel_hpd_irq_handlerasbuh1hhj! ubj)}(h h]h }(hjF hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj! ubj)}(hpin_maskh]hpin_mask}(hjT hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj! ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubj)}(h u32 long_maskh](h)}(hhh]j)}(hu32h]hu32}(hjp hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjr modnameN classnameNjj)}j]jc.intel_hpd_irq_handlerasbuh1hhji ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji ubj)}(h long_maskh]h long_mask}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubeh}(h]h ]h"]h$]h&]hhuh1jhjrhhhjhM<ubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjnhhhjhM<ubah}(h]jiah ](jjeh"]h$]h&]jj)jhuh1jhjhM<hjkhhubj)}(hhh]h)}(hmain hotplug irq handlerh]hmain hotplug irq handler}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM<hj hhubah}(h]h ]h"]h$]h&]uh1jhjkhhhjhM<ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct intel_display *display`` display device ``u32 pin_mask`` a mask of hpd pins that have triggered the irq ``u32 long_mask`` a mask of hpd pins that may be long hpd pulses **Description** This is the main hotplug irq handler for all platforms. The platform specific irq handlers call the platform specific hotplug irq handlers, which read and decode the appropriate registers into bitmasks about hpd pins that have triggered (**pin_mask**), and which of those pins may be long pulses (**long_mask**). The **long_mask** is ignored if the port corresponding to the pin is not a digital port. Here, we do hotplug irq storm detection and mitigation, and pass further processing to appropriate bottom halves.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM@hj ubj)}(hhh](j)}(h1``struct intel_display *display`` display device h](j)}(h!``struct intel_display *display``h]j)}(hj h]hstruct intel_display *display}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM=hj ubj)}(hhh]h)}(hdisplay deviceh]hdisplay device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM=hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hM=hj ubj)}(h@``u32 pin_mask`` a mask of hpd pins that have triggered the irq h](j)}(h``u32 pin_mask``h]j)}(hj@ h]h u32 pin_mask}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj> ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM>hj: ubj)}(hhh]h)}(h.a mask of hpd pins that have triggered the irqh]h.a mask of hpd pins that have triggered the irq}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU hM>hjV ubah}(h]h ]h"]h$]h&]uh1jhj: ubeh}(h]h ]h"]h$]h&]uh1jhjU hM>hj ubj)}(hA``u32 long_mask`` a mask of hpd pins that may be long hpd pulses h](j)}(h``u32 long_mask``h]j)}(hjy h]h u32 long_mask}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjw ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM?hjs ubj)}(hhh]h)}(h.a mask of hpd pins that may be long hpd pulsesh]h.a mask of hpd pins that may be long hpd pulses}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM?hj ubah}(h]h ]h"]h$]h&]uh1jhjs ubeh}(h]h ]h"]h$]h&]uh1jhj hM?hj ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMAhj ubh)}(hXThis is the main hotplug irq handler for all platforms. The platform specific irq handlers call the platform specific hotplug irq handlers, which read and decode the appropriate registers into bitmasks about hpd pins that have triggered (**pin_mask**), and which of those pins may be long pulses (**long_mask**). The **long_mask** is ignored if the port corresponding to the pin is not a digital port.h](hThis is the main hotplug irq handler for all platforms. The platform specific irq handlers call the platform specific hotplug irq handlers, which read and decode the appropriate registers into bitmasks about hpd pins that have triggered (}(hj hhhNhNubj)}(h **pin_mask**h]hpin_mask}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh/), and which of those pins may be long pulses (}(hj hhhNhNubj)}(h **long_mask**h]h long_mask}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh). The }(hj hhhNhNubj)}(h **long_mask**h]h long_mask}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubhG is ignored if the port corresponding to the pin is not a digital port.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM@hj ubh)}(hqHere, we do hotplug irq storm detection and mitigation, and pass further processing to appropriate bottom halves.h]hqHere, we do hotplug irq storm detection and mitigation, and pass further processing to appropriate bottom halves.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMGhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](jintel_hpd_init (C function)c.intel_hpd_inithNtauh1jthhhhhNhNubj)}(hhh](j)}(h3void intel_hpd_init (struct intel_display *display)h]j)}(h2void intel_hpd_init(struct intel_display *display)h](j)}(hvoidh]hvoid}(hj> hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj: hhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMubj)}(h h]h }(hjM hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj: hhhjL hMubj)}(hintel_hpd_inith]j)}(hintel_hpd_inith]hintel_hpd_init}(hj_ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ ubah}(h]h ](j jeh"]h$]h&]hhuh1jhj: hhhjL hMubj)}(h(struct intel_display *display)h]j)}(hstruct intel_display *displayh](j)}(hjh]hstruct}(hj{ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw ubh)}(hhh]j)}(h intel_displayh]h intel_display}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jja sbc.intel_hpd_initasbuh1hhjw ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw ubj )}(hj#h]h*}(hj hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjw ubj)}(hdisplayh]hdisplay}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjs ubah}(h]h ]h"]h$]h&]hhuh1jhj: hhhjL hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhj6 hhhjL hMubah}(h]j1 ah ](jjeh"]h$]h&]jj)jhuh1jhjL hMhj3 hhubj)}(hhh]h)}(h#initializes and enables hpd supporth]h#initializes and enables hpd support}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj3 hhhjL hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct intel_display *display`` display device instance **Description** This function enables the hotplug support. It requires that interrupts have already been enabled with intel_irq_init_hw(). From this point on hotplug and poll request can run concurrently to other code, so locking rules must be obeyed. This is a separate step from interrupt enabling to simplify the locking rules in the driver load and resume code. Also see: intel_hpd_poll_enable() and intel_hpd_poll_disable().h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj ubj)}(hhh]j)}(h:``struct intel_display *display`` display device instance h](j)}(h!``struct intel_display *display``h]j)}(hj? h]hstruct intel_display *display}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj= ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj9 ubj)}(hhh]h)}(hdisplay device instanceh]hdisplay device instance}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT hMhjU ubah}(h]h ]h"]h$]h&]uh1jhj9 ubeh}(h]h ]h"]h$]h&]uh1jhjT hMhj6 ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjz h]h Description}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjx ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj ubh)}(hThis function enables the hotplug support. It requires that interrupts have already been enabled with intel_irq_init_hw(). From this point on hotplug and poll request can run concurrently to other code, so locking rules must be obeyed.h]hThis function enables the hotplug support. It requires that interrupts have already been enabled with intel_irq_init_hw(). From this point on hotplug and poll request can run concurrently to other code, so locking rules must be obeyed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj ubh)}(hqThis is a separate step from interrupt enabling to simplify the locking rules in the driver load and resume code.h]hqThis is a separate step from interrupt enabling to simplify the locking rules in the driver load and resume code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj ubh)}(h?Also see: intel_hpd_poll_enable() and intel_hpd_poll_disable().h]h?Also see: intel_hpd_poll_enable() and intel_hpd_poll_disable().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](j"intel_hpd_poll_enable (C function)c.intel_hpd_poll_enablehNtauh1jthhhhhNhNubj)}(hhh](j)}(h:void intel_hpd_poll_enable (struct intel_display *display)h]j)}(h9void intel_hpd_poll_enable(struct intel_display *display)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMRubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMRubj)}(hintel_hpd_poll_enableh]j)}(hintel_hpd_poll_enableh]hintel_hpd_poll_enable}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](j jeh"]h$]h&]hhuh1jhj hhhj hMRubj)}(h(struct intel_display *display)h]j)}(hstruct intel_display *displayh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj' hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h intel_displayh]h intel_display}(hj8 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5 ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj: modnameN classnameNjj)}j]j)}jj sbc.intel_hpd_poll_enableasbuh1hhj ubj)}(h h]h }(hjX hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj )}(hj#h]h*}(hjf hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj ubj)}(hdisplayh]hdisplay}(hjs hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj ubah}(h]h ]h"]h$]h&]hhuh1jhj hhhj hMRubeh}(h]h ]h"]h$]h&]hhjuh1jjjhj hhhj hMRubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMRhj hhubj)}(hhh]h)}(h&enable polling for connectors with hpdh]h&enable polling for connectors with hpd}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMRhj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMRubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhhhNhNubj)}(hXK**Parameters** ``struct intel_display *display`` display device instance **Description** This function enables polling for all connectors which support HPD. Under certain conditions HPD may not be functional. On most Intel GPUs, this happens when we enter runtime suspend. On Valleyview and Cherryview systems, this also happens when we shut off all of the powerwells. Since this function can get called in contexts where we're already holding dev->mode_config.mutex, we do the actual hotplug enabling in a separate worker. Also see: intel_hpd_init() and intel_hpd_poll_disable().h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMVhj ubj)}(hhh]j)}(h:``struct intel_display *display`` display device instance h](j)}(h!``struct intel_display *display``h]j)}(hj h]hstruct intel_display *display}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMShj ubj)}(hhh]h)}(hdisplay device instanceh]hdisplay device instance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMShj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMShj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMUhj ubh)}(hXThis function enables polling for all connectors which support HPD. Under certain conditions HPD may not be functional. On most Intel GPUs, this happens when we enter runtime suspend. On Valleyview and Cherryview systems, this also happens when we shut off all of the powerwells.h]hXThis function enables polling for all connectors which support HPD. Under certain conditions HPD may not be functional. On most Intel GPUs, this happens when we enter runtime suspend. On Valleyview and Cherryview systems, this also happens when we shut off all of the powerwells.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMThj ubh)}(hSince this function can get called in contexts where we're already holding dev->mode_config.mutex, we do the actual hotplug enabling in a separate worker.h]hSince this function can get called in contexts where we’re already holding dev->mode_config.mutex, we do the actual hotplug enabling in a separate worker.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMZhj ubh)}(h8Also see: intel_hpd_init() and intel_hpd_poll_disable().h]h8Also see: intel_hpd_init() and intel_hpd_poll_disable().}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM^hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](j#intel_hpd_poll_disable (C function)c.intel_hpd_poll_disablehNtauh1jthhhhhNhNubj)}(hhh](j)}(h;void intel_hpd_poll_disable (struct intel_display *display)h]j)}(h:void intel_hpd_poll_disable(struct intel_display *display)h](j)}(hvoidh]hvoid}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhjhMuubj)}(hintel_hpd_poll_disableh]j)}(hintel_hpd_poll_disableh]hintel_hpd_poll_disable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j jeh"]h$]h&]hhuh1jhjxhhhjhMuubj)}(h(struct intel_display *display)h]j)}(hstruct intel_display *displayh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h intel_displayh]h intel_display}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.intel_hpd_poll_disableasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(hj#h]h*}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjubj)}(hdisplayh]hdisplay}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjxhhhjhMuubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjthhhjhMuubah}(h]joah ](jjeh"]h$]h&]jj)jhuh1jhjhMuhjqhhubj)}(hhh]h)}(h'disable polling for connectors with hpdh]h'disable polling for connectors with hpd}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMuhj9hhubah}(h]h ]h"]h$]h&]uh1jhjqhhhjhMuubeh}(h]h ](jfunctioneh"]h$]h&]jjjjTjjTjjjuh1jhhhhhNhNubj)}(hX**Parameters** ``struct intel_display *display`` display device instance **Description** This function disables polling for all connectors which support HPD. Under certain conditions HPD may not be functional. On most Intel GPUs, this happens when we enter runtime suspend. On Valleyview and Cherryview systems, this also happens when we shut off all of the powerwells. Since this function can get called in contexts where we're already holding dev->mode_config.mutex, we do the actual hotplug enabling in a separate worker. Also used during driver init to initialize connector->polled appropriately for all connectors. Also see: intel_hpd_init() and intel_hpd_poll_enable().h](h)}(h**Parameters**h]j)}(hj^h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMyhjXubj)}(hhh]j)}(h:``struct intel_display *display`` display device instance h](j)}(h!``struct intel_display *display``h]j)}(hj}h]hstruct intel_display *display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMvhjwubj)}(hhh]h)}(hdisplay device instanceh]hdisplay device instance}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMvhjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jhjhMvhjtubah}(h]h ]h"]h$]h&]uh1jhjXubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMxhjXubh)}(hXThis function disables polling for all connectors which support HPD. Under certain conditions HPD may not be functional. On most Intel GPUs, this happens when we enter runtime suspend. On Valleyview and Cherryview systems, this also happens when we shut off all of the powerwells.h]hXThis function disables polling for all connectors which support HPD. Under certain conditions HPD may not be functional. On most Intel GPUs, this happens when we enter runtime suspend. On Valleyview and Cherryview systems, this also happens when we shut off all of the powerwells.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMwhjXubh)}(hSince this function can get called in contexts where we're already holding dev->mode_config.mutex, we do the actual hotplug enabling in a separate worker.h]hSince this function can get called in contexts where we’re already holding dev->mode_config.mutex, we do the actual hotplug enabling in a separate worker.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM}hjXubh)}(h^Also used during driver init to initialize connector->polled appropriately for all connectors.h]h^Also used during driver init to initialize connector->polled appropriately for all connectors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjXubh)}(h7Also see: intel_hpd_init() and intel_hpd_poll_enable().h]h7Also see: intel_hpd_init() and intel_hpd_poll_enable().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjXubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubju)}(hhh]h}(h]h ]h"]h$]h&]entries](jintel_hpd_block (C function)c.intel_hpd_blockhNtauh1jthhhhhNhNubj)}(hhh](j)}(h4void intel_hpd_block (struct intel_encoder *encoder)h]j)}(h3void intel_hpd_block(struct intel_encoder *encoder)h](j)}(hvoidh]hvoid}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhj8hMubj)}(hintel_hpd_blockh]j)}(hintel_hpd_blockh]hintel_hpd_block}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ](j jeh"]h$]h&]hhuh1jhj&hhhj8hMubj)}(h(struct intel_encoder *encoder)h]j)}(hstruct intel_encoder *encoderh](j)}(hjh]hstruct}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubh)}(hhh]j)}(h intel_encoderh]h intel_encoder}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjMsbc.intel_hpd_blockasbuh1hhjcubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj )}(hj#h]h*}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjcubj)}(hencoderh]hencoder}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj_ubah}(h]h ]h"]h$]h&]hhuh1jhj&hhhj8hMubeh}(h]h ]h"]h$]h&]hhjuh1jjjhj"hhhj8hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj8hMhjhhubj)}(hhh]h)}(h(Block handling of HPD IRQs on an HPD pinh]h(Block handling of HPD IRQs on an HPD pin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj8hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhhhNhNubj)}(hXy**Parameters** ``struct intel_encoder *encoder`` Encoder to block the HPD handling for **Description** Blocks the handling of HPD IRQs on the HPD pin of **encoder**. On return: - It's guaranteed that the blocked encoders' HPD pulse handler (via intel_digital_port::hpd_pulse()) is not running. - The hotplug event handling (via intel_encoder::hotplug()) of an HPD IRQ pending at the time this function is called may be still running. - Detection on the encoder's connector (via drm_connector_helper_funcs::detect_ctx(), drm_connector_funcs::detect()) remains allowed, for instance as part of userspace connector probing, or DRM core's connector polling. The call must be followed by calling intel_hpd_unblock(), or intel_hpd_clear_and_unblock(). Note that the handling of HPD IRQs for another encoder using the same HPD pin as that of **encoder** will be also blocked.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubj)}(hhh]j)}(hH``struct intel_encoder *encoder`` Encoder to block the HPD handling for h](j)}(h!``struct intel_encoder *encoder``h]j)}(hj+h]hstruct intel_encoder *encoder}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.cEhMhj%ubj)}(hhh]h)}(h%Encoder to block the HPD handling forh]h%Encoder to block the HPD handling for}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhj@hMhj"ubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubh)}(h>Blocks the handling of HPD IRQs on the HPD pin of **encoder**.h](h2Blocks the handling of HPD IRQs on the HPD pin of }(hj|hhhNhNubj)}(h **encoder**h]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj|ubh.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubh)}(h On return:h]h On return:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMhjubh bullet_list)}(hhh](h list_item)}(hrIt's guaranteed that the blocked encoders' HPD pulse handler (via intel_digital_port::hpd_pulse()) is not running.h]h)}(hrIt's guaranteed that the blocked encoders' HPD pulse handler (via intel_digital_port::hpd_pulse()) is not running.h]hvIt’s guaranteed that the blocked encoders’ HPD pulse handler (via intel_digital_port::hpd_pulse()) is not running.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM!hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hThe hotplug event handling (via intel_encoder::hotplug()) of an HPD IRQ pending at the time this function is called may be still running.h]h)}(hThe hotplug event handling (via intel_encoder::hotplug()) of an HPD IRQ pending at the time this function is called may be still running.h]hThe hotplug event handling (via intel_encoder::hotplug()) of an HPD IRQ pending at the time this function is called may be still running.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM#hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hDetection on the encoder's connector (via drm_connector_helper_funcs::detect_ctx(), drm_connector_funcs::detect()) remains allowed, for instance as part of userspace connector probing, or DRM core's connector polling. h]h)}(hDetection on the encoder's connector (via drm_connector_helper_funcs::detect_ctx(), drm_connector_funcs::detect()) remains allowed, for instance as part of userspace connector probing, or DRM core's connector polling.h]hDetection on the encoder’s connector (via drm_connector_helper_funcs::detect_ctx(), drm_connector_funcs::detect()) remains allowed, for instance as part of userspace connector probing, or DRM core’s connector polling.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chM&hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]bullet-uh1jhjhM!hjubh)}(h[The call must be followed by calling intel_hpd_unblock(), or intel_hpd_clear_and_unblock().h]h[The call must be followed by calling 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]h"]h$]h&]hhuh1jhjRhhhjdhMGubeh}(h]h ]h"]h$]h&]hhjuh1jjjhjNhhhjdhMGubah}(h]jIah ](jjeh"]h$]h&]jj)jhuh1jhjdhMGhjKhhubj)}(hhh]h)}(h*Unblock handling of HPD IRQs on an HPD pinh]h*Unblock handling of HPD IRQs on an HPD pin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMGhjhhubah}(h]h ]h"]h$]h&]uh1jhjKhhhjdhMGubeh}(h]h ](jfunctioneh"]h$]h&]jjjj.jj.jjjuh1jhhhhhNhNubj)}(hXk**Parameters** ``struct intel_encoder *encoder`` Encoder to unblock the HPD handling for **Description** Unblock the handling of HPD IRQs on the HPD pin of **encoder**, which was previously blocked by intel_hpd_block(). Any HPD IRQ raised on the HPD pin while it was blocked will be handled for **encoder** and for any other encoder sharing the same HPD pin.h](h)}(h**Parameters**h]j)}(hj8h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMKhj2ubj)}(hhh]j)}(hJ``struct intel_encoder *encoder`` Encoder to unblock the HPD handling for h](j)}(h!``struct intel_encoder *encoder``h]j)}(hjWh]hstruct intel_encoder *encoder}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&]uh1jhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMHhjQubj)}(hhh]h)}(h'Encoder to unblock the HPD handling forh]h'Encoder to unblock the HPD handling for}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMHhjmubah}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jhjlhMHhjNubah}(h]h ]h"]h$]h&]uh1jhj2ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/hotplug:10: ./drivers/gpu/drm/i915/display/intel_hotplug.chMJhj2ubh)}(hUnblock the handling of HPD IRQs on the HPD pin of **encoder**, which was previously blocked by intel_hpd_block(). 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