ssphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget*/translations/zh_CN/gpu/intel-display/drrsmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/zh_TW/gpu/intel-display/drrsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/it_IT/gpu/intel-display/drrsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/ja_JP/gpu/intel-display/drrsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/ko_KR/gpu/intel-display/drrsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/pt_BR/gpu/intel-display/drrsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/sp_SP/gpu/intel-display/drrsmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(hSPDX-License-Identifier: MITh]hSPDX-License-Identifier: MIT}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhD/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs.rsthKubh)}(h#Copyright © 2026 Intel Corporationh]h#Copyright © 2026 Intel Corporation}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubhsection)}(hhh](htitle)}(h%Display Refresh Rate Switching (DRRS)h]h%Display Refresh Rate Switching (DRRS)}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hDisplay Refresh Rate Switching (DRRS) is a power conservation feature which enables swtching between low and high refresh rates, dynamically, based on the usage scenario. This feature is applicable for internal panels.h]hDisplay Refresh Rate Switching (DRRS) is a power conservation feature which enables swtching between low and high refresh rates, dynamically, based on the usage scenario. This feature is applicable for internal panels.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chKhhhhubh)}(hIndication that the panel supports DRRS is given by the panel EDID, which would list multiple refresh rates for one resolution.h]hIndication that the panel supports DRRS is given by the panel EDID, which would list multiple refresh rates for one resolution.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chKhhhhubh)}(hX\DRRS is of 2 types - static and seamless. Static DRRS involves changing refresh rate (RR) by doing a full modeset (may appear as a blink on screen) and is used in dock-undock scenario. Seamless DRRS involves changing RR without any visual effect to the user and can be used during normal system usage. This is done by programming certain registers.h]hX\DRRS is of 2 types - static and seamless. Static DRRS involves changing refresh rate (RR) by doing a full modeset (may appear as a blink on screen) and is used in dock-undock scenario. Seamless DRRS involves changing RR without any visual effect to the user and can be used during normal system usage. This is done by programming certain registers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chKhhhhubh)}(haSupport for static/seamless DRRS may be indicated in the VBT based on inputs from the panel spec.h]haSupport for static/seamless DRRS may be indicated in the VBT based on inputs from the panel spec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chK"hhhhubh)}(hADRRS saves power by switching to low RR based on usage scenarios.h]hADRRS saves power by switching to low RR based on usage scenarios.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chK%hhhhubh)}(hX4The implementation is based on frontbuffer tracking implementation. When there is a disturbance on the screen triggered by user activity or a periodic system activity, DRRS is disabled (RR is changed to high RR). When there is no movement on screen, after a timeout of 1 second, a switch to low RR is made.h]hX4The implementation is based on frontbuffer tracking implementation. When there is a disturbance on the screen triggered by user activity or a periodic system activity, DRRS is disabled (RR is changed to high RR). When there is no movement on screen, after a timeout of 1 second, a switch to low RR is made.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chK'hhhhubh)}(hjFor integration with frontbuffer tracking code, intel_drrs_invalidate() and intel_drrs_flush() are called.h]hjFor integration with frontbuffer tracking code, intel_drrs_invalidate() and intel_drrs_flush() are called.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chK-hhhhubh)}(hDRRS can be further extended to support other internal panels and also the scenario of video playback wherein RR is set based on the rate requested by userspace.h]hDRRS can be further extended to support other internal panels and also the scenario of video playback wherein RR is set based on the rate requested by userspace.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:7: ./drivers/gpu/drm/i915/display/intel_drrs.chK0hhhhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single intel_drrs_activate (C function)c.intel_drrs_activatehNtauh1jehhhhhNhNubhdesc)}(hhh](hdesc_signature)}(hDvoid intel_drrs_activate (const struct intel_crtc_state *crtc_state)h]hdesc_signature_line)}(hCvoid intel_drrs_activate(const struct intel_crtc_state *crtc_state)h](hdesc_sig_keyword_type)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubh desc_name)}(hintel_drrs_activateh]h desc_sig_name)}(hintel_drrs_activateh]hintel_drrs_activate}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jhjhhhjhKubhdesc_parameterlist)}(h+(const struct intel_crtc_state *crtc_state)h]hdesc_parameter)}(h)const struct intel_crtc_state *crtc_stateh](hdesc_sig_keyword)}(hconsth]hconst}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hintel_crtc_stateh]hintel_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomaincreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j/ ASTIdentifier)}j*jsbc.intel_drrs_activateasbuh1hhjubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubhdesc_sig_punctuation)}(h*h]h*}(hjLhhhNhNubah}(h]h ]pah"]h$]h&]uh1jJhjubj)}(h crtc_stateh]h crtc_state}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]hhƌ add_permalinkuh1jsphinx_line_type declaratorhj}hhhjhKubah}(h]jtah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j{hjhKhjxhhubh desc_content)}(hhh]h)}(h activate DRRSh]h activate DRRS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjxhhhjhKubeh}(h]h ](j(functioneh"]h$]h&]domainj(objtypejdesctypejnoindex noindexentrynocontentsentryuh1jvhhhhhNhNubh container)}(h|**Parameters** ``const struct intel_crtc_state *crtc_state`` the crtc state **Description** Activates DRRS on the crtc.h](h)}(h**Parameters**h]hstrong)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhjubhdefinition_list)}(hhh]hdefinition_list_item)}(h=``const struct intel_crtc_state *crtc_state`` the crtc state h](hterm)}(h-``const struct intel_crtc_state *crtc_state``h]hliteral)}(hjh]h)const struct intel_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhjubh definition)}(hhh]h)}(hthe crtc stateh]hthe crtc state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhjubh)}(hActivates DRRS on the crtc.h]hActivates DRRS on the crtc.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubjf)}(hhh]h}(h]h ]h"]h$]h&]entries](jr"intel_drrs_deactivate (C function)c.intel_drrs_deactivatehNtauh1jehhhhhNhNubjw)}(hhh](j|)}(hJvoid intel_drrs_deactivate (const struct intel_crtc_state *old_crtc_state)h]j)}(hIvoid intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state)h](j)}(hvoidh]hvoid}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhjrhKubj)}(hintel_drrs_deactivateh]j)}(hintel_drrs_deactivateh]hintel_drrs_deactivate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhj`hhhjrhKubj)}(h/(const struct intel_crtc_state *old_crtc_state)h]j)}(h-const struct intel_crtc_state *old_crtc_stateh](j)}(hjh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hintel_crtc_stateh]hintel_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj(reftypej* reftargetjmodnameN classnameNj.j1)}j4]j7)}j*jsbc.intel_drrs_deactivateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjK)}(hjNh]h*}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jJhjubj)}(hold_crtc_stateh]hold_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjubah}(h]h ]h"]h$]h&]hhuh1jhj`hhhjrhKubeh}(h]h ]h"]h$]h&]hhj|uh1jj}j~hj\hhhjrhKubah}(h]jWah ](jjeh"]h$]h&]jj)jhuh1j{hjrhKhjYhhubj)}(hhh]h)}(hdeactivate DRRSh]hdeactivate DRRS}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhj<hhubah}(h]h ]h"]h$]h&]uh1jhjYhhhjrhKubeh}(h]h ](j(functioneh"]h$]h&]jj(jjWjjWjjjuh1jvhhhhhNhNubj)}(h**Parameters** ``const struct intel_crtc_state *old_crtc_state`` the old crtc state **Description** Deactivates DRRS on the crtc.h](h)}(h**Parameters**h]j)}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhj[ubj)}(hhh]j)}(hE``const struct intel_crtc_state *old_crtc_state`` the old crtc state h](j)}(h1``const struct intel_crtc_state *old_crtc_state``h]j)}(hjh]h-const struct intel_crtc_state *old_crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhjzubj)}(hhh]h)}(hthe old crtc stateh]hthe old crtc state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jhjhKhjwubah}(h]h ]h"]h$]h&]uh1jhj[ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhj[ubh)}(hDeactivates DRRS on the crtc.h]hDeactivates DRRS on the crtc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chKhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubjf)}(hhh]h}(h]h ]h"]h$]h&]entries](jr"intel_drrs_invalidate (C function)c.intel_drrs_invalidatehNtauh1jehhhhhNhNubjw)}(hhh](j|)}(hYvoid intel_drrs_invalidate (struct intel_display *display, unsigned int frontbuffer_bits)h]j)}(hXvoid intel_drrs_invalidate(struct intel_display *display, unsigned int frontbuffer_bits)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hintel_drrs_invalidateh]j)}(hintel_drrs_invalidateh]hintel_drrs_invalidate}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhjhMubj)}(h>(struct intel_display *display, unsigned int frontbuffer_bits)h](j)}(hstruct intel_display *displayh](j)}(hjh]hstruct}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(h intel_displayh]h intel_display}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&] refdomainj(reftypej* reftargetj]modnameN classnameNj.j1)}j4]j7)}j*j#sbc.intel_drrs_invalidateasbuh1hhj9ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubjK)}(hjNh]h*}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jJhj9ubj)}(hdisplayh]hdisplay}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj5ubj)}(hunsigned int frontbuffer_bitsh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hfrontbuffer_bitsh]hfrontbuffer_bits}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhj5ubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]hhj|uh1jj}j~hjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1j{hjhMhjhhubj)}(hhh]h)}(hDisable Idleness DRRSh]hDisable Idleness DRRS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](j(functioneh"]h$]h&]jj(jj)jj)jjjuh1jvhhhhhNhNubj)}(hXi**Parameters** ``struct intel_display *display`` display device ``unsigned int frontbuffer_bits`` frontbuffer plane tracking bits **Description** This function gets called everytime rendering on the given planes start. Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR). Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.h](h)}(h**Parameters**h]j)}(hj3h]h Parameters}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM hj-ubj)}(hhh](j)}(h1``struct intel_display *display`` display device h](j)}(h!``struct intel_display *display``h]j)}(hjRh]hstruct intel_display *display}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjPubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjLubj)}(hhh]h)}(hdisplay deviceh]hdisplay device}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMhjhubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jhjghMhjIubj)}(hB``unsigned int frontbuffer_bits`` frontbuffer plane tracking bits h](j)}(h!``unsigned int frontbuffer_bits``h]j)}(hjh]hunsigned int frontbuffer_bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM hjubj)}(hhh]h)}(hfrontbuffer plane tracking bitsh]hfrontbuffer plane tracking bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM hjIubeh}(h]h ]h"]h$]h&]uh1jhj-ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM hj-ubh)}(hThis function gets called everytime rendering on the given planes start. Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR).h]hThis function gets called everytime rendering on the given planes start. Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM hj-ubh)}(hIDirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.h]hIDirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM hj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubjf)}(hhh]h}(h]h ]h"]h$]h&]entries](jrintel_drrs_flush (C function)c.intel_drrs_flushhNtauh1jehhhhhNhNubjw)}(hhh](j|)}(hTvoid intel_drrs_flush (struct intel_display *display, unsigned int frontbuffer_bits)h]j)}(hSvoid intel_drrs_flush(struct intel_display *display, unsigned int frontbuffer_bits)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hMubj)}(hintel_drrs_flushh]j)}(hintel_drrs_flushh]hintel_drrs_flush}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ](jjeh"]h$]h&]hhuh1jhjhhhj(hMubj)}(h>(struct intel_display *display, unsigned int frontbuffer_bits)h](j)}(hstruct intel_display *displayh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(h intel_displayh]h intel_display}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainj(reftypej* reftargetjwmodnameN classnameNj.j1)}j4]j7)}j*j=sbc.intel_drrs_flushasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubjK)}(hjNh]h*}(hjhhhNhNubah}(h]h ]jWah"]h$]h&]uh1jJhjSubj)}(hdisplayh]hdisplay}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjOubj)}(hunsigned int frontbuffer_bitsh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hfrontbuffer_bitsh]hfrontbuffer_bits}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphhhuh1jhjOubeh}(h]h ]h"]h$]h&]hhuh1jhjhhhj(hMubeh}(h]h ]h"]h$]h&]hhj|uh1jj}j~hjhhhj(hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1j{hj(hMhjhhubj)}(hhh]h)}(hRestart Idleness DRRSh]hRestart Idleness DRRS}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhj(hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj(hMubeh}(h]h ](j(functioneh"]h$]h&]jj(jjCjjCjjjuh1jvhhhhhNhNubj)}(hX**Parameters** ``struct intel_display *display`` display device ``unsigned int frontbuffer_bits`` frontbuffer plane tracking bits **Description** This function gets called every time rendering on the given planes has completed or flip on a crtc is completed. So DRRS should be upclocked (LOW_RR -> HIGH_RR). And also Idleness detection should be started again, if no other planes are dirty. Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.h](h)}(h**Parameters**h]j)}(hjMh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjGubj)}(hhh](j)}(h1``struct intel_display *display`` display device h](j)}(h!``struct intel_display *display``h]j)}(hjlh]hstruct intel_display *display}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjfubj)}(hhh]h)}(hdisplay deviceh]hdisplay device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jhjhMhjcubj)}(hB``unsigned int frontbuffer_bits`` frontbuffer plane tracking bits h](j)}(h!``unsigned int frontbuffer_bits``h]j)}(hjh]hunsigned int frontbuffer_bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjubj)}(hhh]h)}(hfrontbuffer plane tracking bitsh]hfrontbuffer plane tracking bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjcubeh}(h]h ]h"]h$]h&]uh1jhjGubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjGubh)}(hThis function gets called every time rendering on the given planes has completed or flip on a crtc is completed. So DRRS should be upclocked (LOW_RR -> HIGH_RR). And also Idleness detection should be started again, if no other planes are dirty.h]hThis function gets called every time rendering on the given planes has completed or flip on a crtc is completed. So DRRS should be upclocked (LOW_RR -> HIGH_RR). And also Idleness detection should be started again, if no other planes are dirty.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjGubh)}(hIDirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.h]hIDirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chMhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubjf)}(hhh]h}(h]h ]h"]h$]h&]entries](jr!intel_drrs_crtc_init (C function)c.intel_drrs_crtc_inithNtauh1jehhhhhNhNubjw)}(hhh](j|)}(h3void intel_drrs_crtc_init (struct intel_crtc *crtc)h]j)}(h2void intel_drrs_crtc_init(struct intel_crtc *crtc)h](j)}(hvoidh]hvoid}(hj4 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0 hhhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM)ubj)}(h h]h }(hjC hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0 hhhjB hM)ubj)}(hintel_drrs_crtc_inith]j)}(hintel_drrs_crtc_inith]hintel_drrs_crtc_init}(hjU hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQ ubah}(h]h ](jjeh"]h$]h&]hhuh1jhj0 hhhjB hM)ubj)}(h(struct intel_crtc *crtc)h]j)}(hstruct intel_crtc *crtch](j)}(hjh]hstruct}(hjq hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm ubj)}(h h]h }(hj~ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm ubh)}(hhh]j)}(h intel_crtch]h intel_crtc}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj(reftypej* reftargetj modnameN classnameNj.j1)}j4]j7)}j*jW sbc.intel_drrs_crtc_initasbuh1hhjm ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm ubjK)}(hjNh]h*}(hj hhhNhNubah}(h]h ]jWah"]h$]h&]uh1jJhjm ubj)}(hcrtch]hcrtc}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm ubeh}(h]h ]h"]h$]h&]noemphhhuh1jhji ubah}(h]h ]h"]h$]h&]hhuh1jhj0 hhhjB hM)ubeh}(h]h ]h"]h$]h&]hhj|uh1jj}j~hj, hhhjB hM)ubah}(h]j' ah ](jjeh"]h$]h&]jj)jhuh1j{hjB hM)hj) hhubj)}(hhh]h)}(hInit DRRS for CRTCh]hInit DRRS for CRTC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM)hj hhubah}(h]h ]h"]h$]h&]uh1jhj) hhhjB hM)ubeh}(h]h ](j(functioneh"]h$]h&]jj(jj jj jjjuh1jvhhhhhNhNubj)}(h**Parameters** ``struct intel_crtc *crtc`` crtc **Description** This function is called only once at driver load to initialize basic DRRS stuff.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM-hj ubj)}(hhh]j)}(h!``struct intel_crtc *crtc`` crtc h](j)}(h``struct intel_crtc *crtc``h]j)}(hj5 h]hstruct intel_crtc *crtc}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3 ubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM*hj/ ubj)}(hhh]h)}(hcrtch]hcrtc}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJ hM*hjK ubah}(h]h ]h"]h$]h&]uh1jhj/ ubeh}(h]h ]h"]h$]h&]uh1jhjJ hM*hj, ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjp h]h Description}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjn ubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM,hj ubh)}(hPThis function is called only once at driver load to initialize basic DRRS stuff.h]hPThis function is called only once at driver load to initialize basic DRRS stuff.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/intel-display/drrs:10: ./drivers/gpu/drm/i915/display/intel_drrs.chM+hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhhhhhNhNubeh}(h]#display-refresh-rate-switching-drrsah ]h"]%display refresh rate switching (drrs)ah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehnj _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}j j s nametypes}j sh}(j hjtj}jWj\jjj jj' j, u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.