sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget0/translations/zh_CN/gpu/amdgpu/module-parametersmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/zh_TW/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/it_IT/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/ja_JP/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/ko_KR/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/pt_BR/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/sp_SP/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hModule Parametersh]hModule Parameters}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhJ/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters.rsthKubh paragraph)}(h;The amdgpu driver supports the following module parameters:h]h;The amdgpu driver supports the following module parameters:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubhtarget)}(h.. _vramlimit (int):h]h}(h]h ]h"]h$]h&]refid vramlimit-intuh1hhKhhhhhNubh)}(h**vramlimit (int)**h]hstrong)}(hhh]hvramlimit (int)}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubah}(h]hah ]h"]vramlimit (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chKhhhhexpect_referenced_by_name}jhsexpect_referenced_by_id}hhsubh)}(hXRestrict the total amount of VRAM in MiB for testing. The default is 0 (Use full VRAM).h]hXRestrict the total amount of VRAM in MiB for testing. The default is 0 (Use full VRAM).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _vis_vramlimit (int):h]h}(h]h ]h"]h$]h&]hvis-vramlimit-intuh1hhKhhhhhNubh)}(h**vis_vramlimit (int)**h]h)}(hj$h]hvis_vramlimit (int)}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"ubah}(h]j!ah ]h"]vis_vramlimit (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}j7jsj}j!jsubh)}(hjRestrict the amount of CPU visible VRAM in MiB for testing. The default is 0 (Use full CPU visible VRAM).h]hjRestrict the amount of CPU visible VRAM in MiB for testing. The default is 0 (Use full CPU visible VRAM).}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _gartsize (uint):h]h}(h]h ]h"]h$]h&]h gartsize-uintuh1hhKhhhhhNubh)}(h**gartsize (uint)**h]h)}(hjYh]hgartsize (uint)}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWubah}(h]jVah ]h"]gartsize (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jljLsj}jVjLsubh)}(h{Restrict the size of GART (for kernel use) in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).h]h{Restrict the size of GART (for kernel use) in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM hhhhubh)}(h.. _gttsize (int):h]h}(h]h ]h"]h$]h&]h gttsize-intuh1hhKhhhhhNubh)}(h**gttsize (int)**h]h)}(hjh]h gttsize (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"] gttsize (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM&hhhhj}jjsj}jjsubh)}(hRestrict the size of GTT domain (for userspace use) in MiB for testing. The default is -1 (Use value specified by TTM). This parameter is deprecated and will be removed in the future.h]hRestrict the size of GTT domain (for userspace use) in MiB for testing. The default is -1 (Use value specified by TTM). This parameter is deprecated and will be removed in the future.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM(hhhhubh)}(h.. _moverate (int):h]h}(h]h ]h"]h$]h&]h moverate-intuh1hhK hhhhhNubh)}(h**moverate (int)**h]h)}(hjh]hmoverate (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]moverate (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM/hhhhj}jjsj}jjsubh)}(hFSet maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).h]hFSet maximum buffer migration rate in MB/s. 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The default is -1 (Enabled), set 0 to disabled it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM8hhhhubh)}(h.. _disp_priority (int):h]h}(h]h ]h"]h$]h&]hdisp-priority-intuh1hhK.hhhhhNubh)}(h**disp_priority (int)**h]h)}(hj-h]hdisp_priority (int)}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+ubah}(h]j*ah ]h"]disp_priority (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM=hhhhj}j@j sj}j*j subh)}(hkSet display Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto).h]hkSet display Priority (1 = normal, 2 = high). Only affects non-DC display handling. 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The maximum is the number of VMIDs assigned to the HWS, which is also the default.h]hMaximum number of processes that HWS can schedule concurrently. The maximum is the number of VMIDs assigned to the HWS, which is also the default.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _cwsr_enable (int):h]h}(h]h ]h"]h$]h&]hcwsr-enable-intuh1hhMhhhhhNubh)}(h**cwsr_enable (int)**h]h)}(hj h]hcwsr_enable (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]cwsr_enable (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}j j sj}j j subh)}(hCWSR(compute wave store and resume) allows the GPU to preempt shader execution in the middle of a compute wave. Default is 1 to enable this feature. Setting 0 disables it.h]hCWSR(compute wave store and resume) allows the GPU to preempt shader execution in the middle of a compute wave. Default is 1 to enable this feature. Setting 0 disables it.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h'.. _max_num_of_queues_per_device (int):h]h}(h]h ]h"]h$]h&]h max-num-of-queues-per-device-intuh1hhMhhhhhNubh)}(h&**max_num_of_queues_per_device (int)**h]h)}(hj- h]h"max_num_of_queues_per_device (int)}(hj/ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+ ubah}(h]j* ah ]h"]"max_num_of_queues_per_device (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}j@ j sj}j* j subh)}(hZMaximum number of queues per device. Valid setting is between 1 and 4096. Default is 4096.h]hZMaximum number of queues per device. Valid setting is between 1 and 4096. Default is 4096.}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _send_sigterm (int):h]h}(h]h ]h"]h$]h&]hsend-sigterm-intuh1hhMhhhhhNubh)}(h**send_sigterm (int)**h]h)}(hjb h]hsend_sigterm (int)}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj` ubah}(h]j_ ah ]h"]send_sigterm (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}ju jU sj}j_ jU subh)}(hSend sigterm to HSA process on unhandled exceptions. Default is not to send sigterm but just print errors on dmesg. Setting 1 enables sending sigterm.h]hSend sigterm to HSA process on unhandled exceptions. Default is not to send sigterm but just print errors on dmesg. Setting 1 enables sending sigterm.}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM hhhhubh)}(h.. _halt_if_hws_hang (int):h]h}(h]h ]h"]h$]h&]hhalt-if-hws-hang-intuh1hhMhhhhhNubh)}(h**halt_if_hws_hang (int)**h]h)}(hj h]hhalt_if_hws_hang (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]halt_if_hws_hang (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}j j sj}j j subh)}(hjHalt if HWS hang is detected. Default value, 0, disables the halt on hang. Setting 1 enables halt on hang.h]hjHalt if HWS hang is detected. Default value, 0, disables the halt on hang. Setting 1 enables halt on hang.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _hws_gws_support(bool):h]h}(h]h ]h"]h$]h&]hhws-gws-support-booluh1hhMhhhhhNubh)}(h**hws_gws_support(bool)**h]h)}(hj h]hhws_gws_support(bool)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]hws_gws_support(bool)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}j j sj}j j subh)}(hAssume that HWS supports GWS barriers regardless of what firmware version check says. Default value: false (rely on MEC2 firmware version check).h]hAssume that HWS supports GWS barriers regardless of what firmware version check says. Default value: false (rely on MEC2 firmware version check).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h&.. _queue_preemption_timeout_ms (int):h]h}(h]h ]h"]h$]h&]hqueue-preemption-timeout-ms-intuh1hhMhhhhhNubh)}(h%**queue_preemption_timeout_ms (int)**h]h)}(hjh]h!queue_preemption_timeout_ms (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]!queue_preemption_timeout_ms (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM"hhhhj}jj sj}j j subh)}(hEnable PCIe P2P (requires large-BAR). Default value: true (on)h]h>Enable PCIe P2P (requires large-BAR). Default value: true (on)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMMhhhhubh)}(h.. _dcfeaturemask (uint):h]h}(h]h ]h"]h$]h&]hdcfeaturemask-uintuh1hhMhhhhhNubh)}(h**dcfeaturemask (uint)**h]h)}(hj0h]hdcfeaturemask (uint)}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.ubah}(h]j-ah ]h"]dcfeaturemask (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMRhhhhj}jCj#sj}j-j#subh)}(hOverride display features enabled. See enum DC_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_shared.h. The default is the current set of stable display features.h]hOverride display features enabled. See enum DC_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_shared.h. The default is the current set of stable display features.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMWhhhhubh)}(h.. _dcdebugmask (uint):h]h}(h]h ]h"]h$]h&]hdcdebugmask-uintuh1hhM$hhhhhNubh)}(h**dcdebugmask (uint)**h]h)}(hjeh]hdcdebugmask (uint)}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjcubah}(h]jbah ]h"]dcdebugmask (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM]hhhhj}jxjXsj}jbjXsubh)}(hZDisplay debug options. See enum DC_DEBUG_MASK in drivers/gpu/drm/amd/include/amd_shared.h.h]hZDisplay debug options. See enum DC_DEBUG_MASK in drivers/gpu/drm/amd/include/amd_shared.h.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM_hhhhubh)}(h.. _abmlevel (uint):h]h}(h]h ]h"]h$]h&]h abmlevel-uintuh1hhM+hhhhhNubh)}(h**abmlevel (uint)**h]h)}(hjh]habmlevel (uint)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]abmlevel (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMdhhhhj}jjsj}jjsubh)}(hXqOverride the default ABM (Adaptive Backlight Management) level used for DC enabled hardware. Requires DMCU to be supported and loaded. Valid levels are 0-4. A value of 0 indicates that ABM should be disabled by default. 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Userspace can only override this level after boot if it’s set to auto.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMphhhhubh)}(h.. _damageclips (int):h]h}(h]h ]h"]h$]h&]hdamageclips-intuh1hhM:hhhhhNubh)}(h**damageclips (int)**h]h)}(hjh]hdamageclips (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]damageclips (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMvhhhhj}jjsj}jjsubh)}(hEnable or disable damage clips support. If damage clips support is disabled, we will force full frame updates, irrespective of what user space sends to us.h]hEnable or disable damage clips support. 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TODO: change to auto till it is completed.h]hGThe default value: 0 (off). TODO: change to auto till it is completed.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _freesync_video (uint):h]h}(h]h ]h"]h$]h&]hfreesync-video-uintuh1hhMOhhhhhNubh)}(h**freesync_video (uint)**h]h)}(hjfh]hfreesync_video (uint)}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdubah}(h]jcah ]h"]freesync_video (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jyjYsj}jcjYsubh)}(hEnable the optimization to adjust front porch timing to achieve seamless mode change experience when setting a freesync supported mode for which full modeset is not needed.h]hEnable the optimization to adjust front porch timing to achieve seamless mode change experience when setting a freesync supported mode for which full modeset is not needed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hXThe Display Core will add a set of modes derived from the base FreeSync video mode into the corresponding connector's mode list based on commonly used refresh rates and VRR range of the connected display, when users enable this feature. From the userspace perspective, they can see a seamless mode change experience when the change between different refresh rates under the same resolution. Additionally, userspace applications such as Video playback can read this modeset list and change the refresh rate based on the video frame rate. Finally, the userspace can also derive an appropriate mode for a particular refresh rate based on the FreeSync Mode and add it to the connector's mode list.h]hXThe Display Core will add a set of modes derived from the base FreeSync video mode into the corresponding connector’s mode list based on commonly used refresh rates and VRR range of the connected display, when users enable this feature. From the userspace perspective, they can see a seamless mode change experience when the change between different refresh rates under the same resolution. Additionally, userspace applications such as Video playback can read this modeset list and change the refresh rate based on the video frame rate. Finally, the userspace can also derive an appropriate mode for a particular refresh rate based on the FreeSync Mode and add it to the connector’s mode list.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h&Note: This is an experimental feature.h]h&Note: This is an experimental feature.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hThe default value: 0 (off).h]hThe default value: 0 (off).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _reset_method (int):h]h}(h]h ]h"]h$]h&]hreset-method-intuh1hhMghhhhhNubh)}(h**reset_method (int)**h]h)}(hjh]hreset_method (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]reset_method (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jjsj}jjsubh)}(h]GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)h]h]GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hA.. _bad_page_threshold (int) Bad page threshold is specifies the:h]h}(h]h ]h"]h$]h&]h:bad-page-threshold-int-bad-page-threshold-is-specifies-theuh1hhMnhhhhhNubh)}(h@**bad_page_threshold (int) Bad page threshold is specifies the**h]h)}(hjh]h 0 use the soft pptable with specicfied id.h]hfUsed to override pptable id. id = 0 use VBIOS pptable. id > 0 use the soft pptable with specicfied id.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _partition_mode (int):h]h}(h]h ]h"]h$]h&]hpartition-mode-intuh1hhMhhhhhNubh)}(h**partition_mode (int)**h]h)}(hj;h]hpartition_mode (int)}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9ubah}(h]j8ah ]h"]partition_mode (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jNj.sj}j8j.subh)}(h&Used to override the default SPX mode.h]h&Used to override the default SPX mode.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _enforce_isolation (int):h]h}(h]h ]h"]h$]h&]henforce-isolation-intuh1hhMhhhhhNubh)}(h**enforce_isolation (int)**h]h)}(hjph]henforce_isolation (int)}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnubah}(h]jmah ]h"]enforce_isolation (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jjcsj}jmjcsubh)}(henforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)h]henforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _modeset (int):h]h}(h]h ]h"]h$]h&]h modeset-intuh1hhMhhhhhNubh)}(h**modeset (int)**h]h)}(hjh]h modeset (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"] modeset (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jjsj}jjsubh)}(hGOverride nomodeset (1 = override, -1 = auto). The default is -1 (auto).h]hGOverride nomodeset (1 = override, -1 = auto). The default is -1 (auto).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _seamless (int):h]h}(h]h ]h"]h$]h&]h seamless-intuh1hhMhhhhhNubh)}(h**seamless (int)**h]h)}(hjh]hseamless (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]seamless (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}jjsj}jjsubh)}(hHSeamless boot will keep the image on the screen during the boot process.h]hHSeamless boot will keep the image on the screen during the boot process.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM hhhhubh)}(h.. _debug_mask (uint):h]h}(h]h ]h"]h$]h&]hdebug-mask-uintuh1hhMhhhhhNubh)}(h**debug_mask (uint)**h]h)}(hjh]hdebug_mask (uint)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]debug_mask (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhj}j"jsj}j jsubh)}(hKDebug options for amdgpu, work as a binary mask with the following options:h]hKDebug options for amdgpu, work as a binary mask with the following options:}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh bullet_list)}(hhh](h list_item)}(h0x1: Debug VM handlingh]h)}(hj@h]h0x1: Debug VM handling}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhj>ubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h0x2: Enable simulating large-bar capability on non-large bar system. This limits the VRAM size reported to ROCm applications to the visible size, usually 256MB.h]h)}(h0x2: Enable simulating large-bar capability on non-large bar system. This limits the VRAM size reported to ROCm applications to the visible size, usually 256MB.h]h0x2: Enable simulating large-bar capability on non-large bar system. This limits the VRAM size reported to ROCm applications to the visible size, usually 256MB.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjVubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h60x4: Disable GPU soft recovery, always do a full reseth]h)}(hjqh]h60x4: Disable GPU soft recovery, always do a full reset}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjoubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h"0x8: Use VRAM for firmware loadingh]h)}(hjh]h"0x8: Use VRAM for firmware loading}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h"0x10: Enable ACA based RAS loggingh]h)}(hjh]h"0x10: Enable ACA based RAS logging}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h 0x20: Enable experimental resetsh]h)}(hjh]h 0x20: Enable experimental resets}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h0x40: Disable ring resetsh]h)}(hjh]h0x40: Disable ring resets}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjubah}(h]h ]h"]h$]h&]uh1j<hj9ubj=)}(h0x80: Use VRAM for SMU pool h]h)}(h0x80: Use VRAM for SMU poolh]h0x80: Use VRAM for SMU pool}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhjubah}(h]h ]h"]h$]h&]uh1j<hj9ubeh}(h]h ]h"]h$]h&]bullet-uh1j7hjOhMhhhhubh)}(h.. _agp (int):h]h}(h]h ]h"]h$]h&]hagp-intuh1hhMhhhhhNubh)}(h **agp (int)**h]h)}(hjh]h agp (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"] agp (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM!hhhhj}j(jsj}jjsubh)}(hEnable the AGP aperture. This provides an aperture in the GPU's internal address space for direct access to system memory. Note that these accesses are non-snooped, so they are only used for access to uncached memory.h]hEnable the AGP aperture. This provides an aperture in the GPU’s internal address space for direct access to system memory. Note that these accesses are non-snooped, so they are only used for access to uncached memory.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM#hhhhubh)}(h.. _wbrf (int):h]h}(h]h ]h"]h$]h&]hwbrf-intuh1hhMhhhhhNubh)}(h**wbrf (int)**h]h)}(hjJh]h wbrf (int)}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHubah}(h]jGah ]h"] wbrf (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM*hhhhj}j]j=sj}jGj=subh)}(hXEnable Wifi RFI interference mitigation feature. Due to electrical and mechanical constraints there may be likely interference of relatively high-powered harmonics of the (G-)DDR memory clocks with local radio module frequency bands used by Wifi 6/6e/7. To mitigate the possible RFI interference, with this feature enabled, PMFW will use either “shadowed P-State” or “P-State” based on active list of frequencies in-use (to be avoided) as part of initial setting or P-state transition. However, there may be potential performance impact with this feature enabled. (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if supported))h]hXEnable Wifi RFI interference mitigation feature. Due to electrical and mechanical constraints there may be likely interference of relatively high-powered harmonics of the (G-)DDR memory clocks with local radio module frequency bands used by Wifi 6/6e/7. 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Disable this to prevent the driver from attempting to resize the BAR if the GPU supports it and there is available MMIO space. Note that this just prevents the driver from resizing the BAR. The BIOS may have already resized the BAR at boot time.h]hX Allow BAR resizing. Disable this to prevent the driver from attempting to resize the BAR if the GPU supports it and there is available MMIO space. Note that this just prevents the driver from resizing the BAR. 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target "msi-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejIlineKCsourcehuh1j/ubj0)}(hhh]h)}(hhh]hBHyperlink target "svm-default-granularity-uint" is not referenced.}hj9sbah}(h]h ]h"]h$]h&]uh1hhj6ubah}(h]h ]h"]h$]h&]levelKtypejIlineKJsourcehuh1j/ubj0)}(hhh]h)}(hhh]h;Hyperlink target "lockup-timeout-string" is not referenced.}hjSsbah}(h]h ]h"]h$]h&]uh1hhjPubah}(h]h ]h"]h$]h&]levelKtypejIlineKQsourcehuh1j/ubj0)}(hhh]h)}(hhh]h-Hyperlink target "dpm-int" is not referenced.}hjmsbah}(h]h ]h"]h$]h&]uh1hhjjubah}(h]h ]h"]h$]h&]levelKtypejIlineK^sourcehuh1j/ubj0)}(hhh]h)}(hhh]h6Hyperlink target "fw-load-type-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejIlineKgsourcehuh1j/ubj0)}(hhh]h)}(hhh]h.Hyperlink target "aspm-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejIlineKqsourcehuh1j/ubj0)}(hhh]h)}(hhh]h/Hyperlink target "runpm-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h 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