&sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget0/translations/zh_CN/gpu/amdgpu/module-parametersmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/zh_TW/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/it_IT/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/ja_JP/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/ko_KR/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/sp_SP/gpu/amdgpu/module-parametersmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hModule Parametersh]hModule Parameters}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhJ/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters.rsthKubh paragraph)}(h;The amdgpu driver supports the following module parameters:h]h;The amdgpu driver supports the following module parameters:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubhtarget)}(h.. _vramlimit (int):h]h}(h]h ]h"]h$]h&]refid vramlimit-intuh1hhKhhhhhNubh)}(h**vramlimit (int)**h]hstrong)}(hhh]hvramlimit (int)}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubah}(h]hah ]h"]vramlimit (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chKhhhhexpect_referenced_by_name}hhsexpect_referenced_by_id}hhsubh)}(hXRestrict the total amount of VRAM in MiB for testing. The default is 0 (Use full VRAM).h]hXRestrict the total amount of VRAM in MiB for testing. The default is 0 (Use full VRAM).}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _vis_vramlimit (int):h]h}(h]h ]h"]h$]h&]hӌvis-vramlimit-intuh1hhKhhhhhNubh)}(h**vis_vramlimit (int)**h]h)}(hjh]hvis_vramlimit (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]j ah ]h"]vis_vramlimit (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j#jsh}j jsubh)}(hjRestrict the amount of CPU visible VRAM in MiB for testing. The default is 0 (Use full CPU visible VRAM).h]hjRestrict the amount of CPU visible VRAM in MiB for testing. The default is 0 (Use full CPU visible VRAM).}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _gartsize (uint):h]h}(h]h ]h"]h$]h&]hӌ gartsize-uintuh1hhKhhhhhNubh)}(h**gartsize (uint)**h]h)}(hjEh]hgartsize (uint)}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjCubah}(h]jBah ]h"]gartsize (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jXj8sh}jBj8subh)}(h{Restrict the size of GART (for kernel use) in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).h]h{Restrict the size of GART (for kernel use) in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _gttsize (int):h]h}(h]h ]h"]h$]h&]hӌ gttsize-intuh1hhKhhhhhNubh)}(h**gttsize (int)**h]h)}(hjzh]h gttsize (int)}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxubah}(h]jwah ]h"] gttsize (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM$hhhhh}jjmsh}jwjmsubh)}(hRestrict the size of GTT domain (for userspace use) in MiB for testing. The default is -1 (Use value specified by TTM). This parameter is deprecated and will be removed in the future.h]hRestrict the size of GTT domain (for userspace use) in MiB for testing. The default is -1 (Use value specified by TTM). This parameter is deprecated and will be removed in the future.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM&hhhhubh)}(h.. _moverate (int):h]h}(h]h ]h"]h$]h&]hӌ moverate-intuh1hhK hhhhhNubh)}(h**moverate (int)**h]h)}(hjh]hmoverate (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]moverate (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM-hhhhh}jjsh}jjsubh)}(hFSet maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).h]hFSet maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM/hhhhubh)}(h.. _audio (int):h]h}(h]h ]h"]h$]h&]hӌ audio-intuh1hhK'hhhhhNubh)}(h**audio (int)**h]h)}(hjh]h audio (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"] audio (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM4hhhhh}jjsh}jjsubh)}(hjSet HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to disabled it.h]hjSet HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to disabled it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM6hhhhubh)}(h.. _disp_priority (int):h]h}(h]h ]h"]h$]h&]hӌdisp-priority-intuh1hhK.hhhhhNubh)}(h**disp_priority (int)**h]h)}(hjh]hdisp_priority (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]disp_priority (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM;hhhhh}j,j sh}jj subh)}(hkSet display Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto).h]hkSet display Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto).}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM=hhhhubh)}(h.. _hw_i2c (int):h]h}(h]h ]h"]h$]h&]hӌ hw-i2c-intuh1hhK5hhhhhNubh)}(h**hw_i2c (int)**h]h)}(hjNh]h hw_i2c (int)}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLubah}(h]jKah ]h"] hw_i2c (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMBhhhhh}jajAsh}jKjAsubh)}(h[To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled).h]h[To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled).}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMDhhhhubh)}(h.. _pcie_gen2 (int):h]h}(h]h ]h"]h$]h&]hӌ pcie-gen2-intuh1hhKhhhhhNubh)}(h**ras_enable (int)**h]h)}(hj h]hras_enable (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j~ ah ]h"]ras_enable (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMQhhhhh}j jt sh}j~ jt subh)}(hMEnable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default))h]hMEnable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default))}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMShhhhubh)}(h.. _ras_mask (uint):h]h}(h]h ]h"]h$]h&]hӌ ras-mask-uintuh1hhMEhhhhhNubh)}(h**ras_mask (uint)**h]h)}(hj h]hras_mask (uint)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]ras_mask (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMXhhhhh}j j sh}j j subh)}(hMask of RAS features to enable (default 0xffffffff), only valid when ras_enable == 1 See the flags in drivers/gpu/drm/amd/amdgpu/amdgpu_ras.hh]hMask of RAS features to enable (default 0xffffffff), only valid when ras_enable == 1 See the flags in drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMZhhhhubh)}(h!.. _timeout_fatal_disable (bool):h]h}(h]h ]h"]h$]h&]hӌtimeout-fatal-disable-booluh1hhMMhhhhhNubh)}(h **timeout_fatal_disable (bool)**h]h)}(hj h]htimeout_fatal_disable (bool)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]timeout_fatal_disable (bool)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM`hhhhh}j j sh}j j subh)}(h*Disable Watchdog timeout fatal error eventh]h*Disable Watchdog timeout fatal error event}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMbhhhhubh)}(h.. _timeout_period (uint):h]h}(h]h ]h"]h$]h&]hӌtimeout-period-uintuh1hhMThhhhhNubh)}(h**timeout_period (uint)**h]h)}(hj h]htimeout_period (uint)}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]timeout_period (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMghhhhh}j3 j sh}j j subh)}(h7Modify the watchdog timeout max_cycles as (1 << period)h]h7Modify the watchdog timeout max_cycles as (1 << period)}(hj9 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMihhhhubh)}(h.. _si_support (int):h]h}(h]h ]h"]h$]h&]hӌsi-support-intuh1hhM[hhhhhNubh)}(h**si_support (int)**h]h)}(hjU h]hsi_support (int)}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjS ubah}(h]jR ah ]h"]si_support (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMnhhhhh}jh jH sh}jR jH subh)}(hXSet SI support driver. This parameter works after set config CONFIG_DRM_AMDGPU_SI. For SI asic, when radeon driver is enabled, set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available, otherwise using amdgpu driver.h]hXSet SI support driver. This parameter works after set config CONFIG_DRM_AMDGPU_SI. For SI asic, when radeon driver is enabled, set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available, otherwise using amdgpu driver.}(hjn hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMphhhhubh)}(h.. _cik_support (int):h]h}(h]h ]h"]h$]h&]hӌcik-support-intuh1hhMdhhhhhNubh)}(h**cik_support (int)**h]h)}(hj h]hcik_support (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]cik_support (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMwhhhhh}j j} sh}j j} subh)}(hX Set CIK support driver. This parameter works after set config CONFIG_DRM_AMDGPU_CIK. For CIK asic, when radeon driver is enabled, set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available, otherwise using amdgpu driver.h]hX Set CIK support driver. This parameter works after set config CONFIG_DRM_AMDGPU_CIK. For CIK asic, when radeon driver is enabled, set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available, otherwise using amdgpu driver.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h .. _smu_memory_pool_size (uint):h]h}(h]h ]h"]h$]h&]hӌsmu-memory-pool-size-uintuh1hhMmhhhhhNubh)}(h**smu_memory_pool_size (uint)**h]h)}(hj h]hsmu_memory_pool_size (uint)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]smu_memory_pool_size (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hIt is used to reserve gtt for smu debug usage, setting value 0 to disable it. The actual size is value * 256MiB. E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).h]hIt is used to reserve gtt for smu debug usage, setting value 0 to disable it. The actual size is value * 256MiB. E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _async_gfx_ring (int):h]h}(h]h ]h"]h$]h&]hӌasync-gfx-ring-intuh1hhMuhhhhhNubh)}(h**async_gfx_ring (int)**h]h)}(hj h]hasync_gfx_ring (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]async_gfx_ring (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hfIt is used to enable gfx rings that could be configured with different prioritites or equal prioritiesh]hfIt is used to enable gfx rings that could be configured with different prioritites or equal priorities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _mcbp (int):h]h}(h]h ]h"]h$]h&]hӌmcbp-intuh1hhM|hhhhhNubh)}(h**mcbp (int)**h]h)}(hj) h]h mcbp (int)}(hj+ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj' ubah}(h]j& ah ]h"] mcbp (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j< j sh}j& j subh)}(hbIt is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default))h]hbIt is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default))}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _discovery (int):h]h}(h]h ]h"]h$]h&]hӌ discovery-intuh1hhMhhhhhNubh)}(h**discovery (int)**h]h)}(hj^ h]hdiscovery (int)}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\ ubah}(h]j[ ah ]h"]discovery (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jq jQ sh}j[ jQ subh)}(hAllow driver to discover hardware IP information from IP Discovery table at the top of VRAM. (-1 = auto (default), 0 = disabled, 1 = enabled, 2 = use ip_discovery table from file)h]hAllow driver to discover hardware IP information from IP Discovery table at the top of VRAM. (-1 = auto (default), 0 = disabled, 1 = enabled, 2 = use ip_discovery table from file)}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _mes (int):h]h}(h]h ]h"]h$]h&]hӌmes-intuh1hhMhhhhhNubh)}(h **mes (int)**h]h)}(hj h]h mes (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"] mes (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hEnable Micro Engine Scheduler. This is a new hw scheduling engine for gfx, sdma, and compute. (0 = disabled (default), 1 = enabled)h]hEnable Micro Engine Scheduler. This is a new hw scheduling engine for gfx, sdma, and compute. (0 = disabled (default), 1 = enabled)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _mes_log_enable (int):h]h}(h]h ]h"]h$]h&]hӌmes-log-enable-intuh1hhMhhhhhNubh)}(h**mes_log_enable (int)**h]h)}(hj h]hmes_log_enable (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]mes_log_enable (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hyEnable Micro Engine Scheduler log. This is used to enable/disable MES internal log. (0 = disabled (default), 1 = enabled)h]hyEnable Micro Engine Scheduler log. This is used to enable/disable MES internal log. (0 = disabled (default), 1 = enabled)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _mes_kiq (int):h]h}(h]h ]h"]h$]h&]hӌ mes-kiq-intuh1hhMhhhhhNubh)}(h**mes_kiq (int)**h]h)}(hj h]h mes_kiq (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"] mes_kiq (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hkEnable Micro Engine Scheduler KIQ. This is a new engine pipe for kiq. (0 = disabled (default), 1 = enabled)h]hkEnable Micro Engine Scheduler KIQ. This is a new engine pipe for kiq. (0 = disabled (default), 1 = enabled)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _uni_mes (int):h]h}(h]h ]h"]h$]h&]hӌ uni-mes-intuh1hhMhhhhhNubh)}(h**uni_mes (int)**h]h)}(hj2 h]h uni_mes (int)}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0 ubah}(h]j/ ah ]h"] uni_mes (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jE j% sh}j/ j% subh)}(h}Enable Unified Micro Engine Scheduler. This is a new engine pipe for unified scheduler. (0 = disabled (default), 1 = enabled)h]h}Enable Unified Micro Engine Scheduler. This is a new engine pipe for unified scheduler. (0 = disabled (default), 1 = enabled)}(hjK hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _noretry (int):h]h}(h]h ]h"]h$]h&]hӌ noretry-intuh1hhMhhhhhNubh)}(h**noretry (int)**h]h)}(hjg h]h noretry (int)}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1hhje ubah}(h]jd ah ]h"] noretry (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jz jZ sh}jd jZ subh)}(hDisable XNACK retry in the SQ by default on GFXv9 hardware. On ASICs that do not support per-process XNACK this also disables retry page faults. (0 = retry enabled, 1 = retry disabled, -1 auto (default))h]hDisable XNACK retry in the SQ by default on GFXv9 hardware. On ASICs that do not support per-process XNACK this also disables retry page faults. (0 = retry enabled, 1 = retry disabled, -1 auto (default))}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _force_asic_type (int):h]h}(h]h ]h"]h$]h&]hӌforce-asic-type-intuh1hhMhhhhhNubh)}(h**force_asic_type (int)**h]h)}(hj h]hforce_asic_type (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]force_asic_type (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hJA non negative value used to specify the asic type for all supported GPUs.h]hJA non negative value used to specify the asic type for all supported GPUs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _use_xgmi_p2p (int):h]h}(h]h ]h"]h$]h&]hӌuse-xgmi-p2p-intuh1hhMhhhhhNubh)}(h**use_xgmi_p2p (int)**h]h)}(hj h]huse_xgmi_p2p (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]use_xgmi_p2p (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(h>Enables/disables XGMI P2P interface (0 = disable, 1 = enable).h]h>Enables/disables XGMI P2P interface (0 = disable, 1 = enable).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _sched_policy (int):h]h}(h]h ]h"]h$]h&]hӌsched-policy-intuh1hhMhhhhhNubh)}(h**sched_policy (int)**h]h)}(hj h]hsched_policy (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]sched_policy (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hSet scheduling policy. Default is HWS(hardware scheduling) with over-subscription. Setting 1 disables over-subscription. Setting 2 disables HWS and statically assigns queues to HQDs.h]hSet scheduling policy. Default is HWS(hardware scheduling) with over-subscription. Setting 1 disables over-subscription. Setting 2 disables HWS and statically assigns queues to HQDs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _hws_max_conc_proc (int):h]h}(h]h ]h"]h$]h&]hӌhws-max-conc-proc-intuh1hhMhhhhhNubh)}(h**hws_max_conc_proc (int)**h]h)}(hj; h]hhws_max_conc_proc (int)}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9 ubah}(h]j8 ah ]h"]hws_max_conc_proc (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jN j. sh}j8 j. subh)}(hMaximum number of processes that HWS can schedule concurrently. The maximum is the number of VMIDs assigned to the HWS, which is also the default.h]hMaximum number of processes that HWS can schedule concurrently. The maximum is the number of VMIDs assigned to the HWS, which is also the default.}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _cwsr_enable (int):h]h}(h]h ]h"]h$]h&]hӌcwsr-enable-intuh1hhMhhhhhNubh)}(h**cwsr_enable (int)**h]h)}(hjp h]hcwsr_enable (int)}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjn ubah}(h]jm ah ]h"]cwsr_enable (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM hhhhh}j jc sh}jm jc subh)}(hCWSR(compute wave store and resume) allows the GPU to preempt shader execution in the middle of a compute wave. Default is 1 to enable this feature. Setting 0 disables it.h]hCWSR(compute wave store and resume) allows the GPU to preempt shader execution in the middle of a compute wave. Default is 1 to enable this feature. Setting 0 disables it.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM hhhhubh)}(h'.. _max_num_of_queues_per_device (int):h]h}(h]h ]h"]h$]h&]hӌ max-num-of-queues-per-device-intuh1hhMhhhhhNubh)}(h&**max_num_of_queues_per_device (int)**h]h)}(hj h]h"max_num_of_queues_per_device (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]"max_num_of_queues_per_device (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hZMaximum number of queues per device. Valid setting is between 1 and 4096. Default is 4096.h]hZMaximum number of queues per device. Valid setting is between 1 and 4096. Default is 4096.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _send_sigterm (int):h]h}(h]h ]h"]h$]h&]hӌsend-sigterm-intuh1hhMhhhhhNubh)}(h**send_sigterm (int)**h]h)}(hj h]hsend_sigterm (int)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]send_sigterm (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j j sh}j j subh)}(hSend sigterm to HSA process on unhandled exceptions. Default is not to send sigterm but just print errors on dmesg. Setting 1 enables sending sigterm.h]hSend sigterm to HSA process on unhandled exceptions. Default is not to send sigterm but just print errors on dmesg. Setting 1 enables sending sigterm.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM!hhhhubh)}(h.. _halt_if_hws_hang (int):h]h}(h]h ]h"]h$]h&]hӌhalt-if-hws-hang-intuh1hhMhhhhhNubh)}(h**halt_if_hws_hang (int)**h]h)}(hjh]hhalt_if_hws_hang (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]j ah ]h"]halt_if_hws_hang (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM'hhhhh}j"jsh}j jsubh)}(hjHalt if HWS hang is detected. Default value, 0, disables the halt on hang. Setting 1 enables halt on hang.h]hjHalt if HWS hang is detected. Default value, 0, disables the halt on hang. Setting 1 enables halt on hang.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM+hhhhubh)}(h.. _hws_gws_support(bool):h]h}(h]h ]h"]h$]h&]hӌhws-gws-support-booluh1hhMhhhhhNubh)}(h**hws_gws_support(bool)**h]h)}(hjDh]hhws_gws_support(bool)}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBubah}(h]jAah ]h"]hws_gws_support(bool)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM1hhhhh}jWj7sh}jAj7subh)}(hAssume that HWS supports GWS barriers regardless of what firmware version check says. Default value: false (rely on MEC2 firmware version check).h]hAssume that HWS supports GWS barriers regardless of what firmware version check says. Default value: false (rely on MEC2 firmware version check).}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM4hhhhubh)}(h&.. _queue_preemption_timeout_ms (int):h]h}(h]h ]h"]h$]h&]hӌqueue-preemption-timeout-ms-intuh1hhMhhhhhNubh)}(h%**queue_preemption_timeout_ms (int)**h]h)}(hjyh]h!queue_preemption_timeout_ms (int)}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwubah}(h]jvah ]h"]!queue_preemption_timeout_ms (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM:hhhhh}jjlsh}jvjlsubh)}(hEnable PCIe P2P (requires large-BAR). Default value: true (on)h]h>Enable PCIe P2P (requires large-BAR). Default value: true (on)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMehhhhubh)}(h.. _dcfeaturemask (uint):h]h}(h]h ]h"]h$]h&]hӌdcfeaturemask-uintuh1hhM&hhhhhNubh)}(h**dcfeaturemask (uint)**h]h)}(hjh]hdcfeaturemask (uint)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]dcfeaturemask (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMjhhhhh}jjsh}jjsubh)}(hOverride display features enabled. See enum DC_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_shared.h. The default is the current set of stable display features.h]hOverride display features enabled. See enum DC_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_shared.h. The default is the current set of stable display features.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMohhhhubh)}(h.. _dcdebugmask (uint):h]h}(h]h ]h"]h$]h&]hӌdcdebugmask-uintuh1hhM.hhhhhNubh)}(h**dcdebugmask (uint)**h]h)}(hjh]hdcdebugmask (uint)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]dcdebugmask (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMuhhhhh}jjsh}jjsubh)}(hfOverride display features enabled. See enum DC_DEBUG_MASK in drivers/gpu/drm/amd/include/amd_shared.h.h]hfOverride display features enabled. See enum DC_DEBUG_MASK in drivers/gpu/drm/amd/include/amd_shared.h.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMwhhhhubh)}(h.. _abmlevel (uint):h]h}(h]h ]h"]h$]h&]hӌ abmlevel-uintuh1hhM5hhhhhNubh)}(h**abmlevel (uint)**h]h)}(hjh]habmlevel (uint)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]abmlevel (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chM|hhhhh}j%jsh}jjsubh)}(hXqOverride the default ABM (Adaptive Backlight Management) level used for DC enabled hardware. Requires DMCU to be supported and loaded. Valid levels are 0-4. A value of 0 indicates that ABM should be disabled by default. Values 1-4 control the maximum allowable brightness reduction via the ABM algorithm, with 1 being the least reduction and 4 being the most reduction.h]hXqOverride the default ABM (Adaptive Backlight Management) level used for DC enabled hardware. Requires DMCU to be supported and loaded. Valid levels are 0-4. A value of 0 indicates that ABM should be disabled by default. Values 1-4 control the maximum allowable brightness reduction via the ABM algorithm, with 1 being the least reduction and 4 being the most reduction.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h_Defaults to -1, or auto. Userspace can only override this level after boot if it's set to auto.h]haDefaults to -1, or auto. Userspace can only override this level after boot if it’s set to auto.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _damageclips (int):h]h}(h]h ]h"]h$]h&]hӌdamageclips-intuh1hhMDhhhhhNubh)}(h**damageclips (int)**h]h)}(hjVh]hdamageclips (int)}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjTubah}(h]jSah ]h"]damageclips (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jijIsh}jSjIsubh)}(hEnable or disable damage clips support. If damage clips support is disabled, we will force full frame updates, irrespective of what user space sends to us.h]hEnable or disable damage clips support. If damage clips support is disabled, we will force full frame updates, irrespective of what user space sends to us.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hIDefaults to -1 (where it is enabled unless a PSR-SU display is detected).h]hIDefaults to -1 (where it is enabled unless a PSR-SU display is detected).}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _tmz (int):h]h}(h]h ]h"]h$]h&]hӌtmz-intuh1hhMOhhhhhNubh)}(h **tmz (int)**h]h)}(hjh]h tmz (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"] tmz (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jjsh}jjsubh)}(h[Trusted Memory Zone (TMZ) is a method to protect data being written to or read from memory.h]h[Trusted Memory Zone (TMZ) is a method to protect data being written to or read from memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hGThe default value: 0 (off). TODO: change to auto till it is completed.h]hGThe default value: 0 (off). TODO: change to auto till it is completed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _freesync_video (uint):h]h}(h]h ]h"]h$]h&]hӌfreesync-video-uintuh1hhMYhhhhhNubh)}(h**freesync_video (uint)**h]h)}(hjh]hfreesync_video (uint)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]freesync_video (uint)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jjsh}jjsubh)}(hEnable the optimization to adjust front porch timing to achieve seamless mode change experience when setting a freesync supported mode for which full modeset is not needed.h]hEnable the optimization to adjust front porch timing to achieve seamless mode change experience when setting a freesync supported mode for which full modeset is not needed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hXThe Display Core will add a set of modes derived from the base FreeSync video mode into the corresponding connector's mode list based on commonly used refresh rates and VRR range of the connected display, when users enable this feature. From the userspace perspective, they can see a seamless mode change experience when the change between different refresh rates under the same resolution. Additionally, userspace applications such as Video playback can read this modeset list and change the refresh rate based on the video frame rate. Finally, the userspace can also derive an appropriate mode for a particular refresh rate based on the FreeSync Mode and add it to the connector's mode list.h]hXThe Display Core will add a set of modes derived from the base FreeSync video mode into the corresponding connector’s mode list based on commonly used refresh rates and VRR range of the connected display, when users enable this feature. From the userspace perspective, they can see a seamless mode change experience when the change between different refresh rates under the same resolution. Additionally, userspace applications such as Video playback can read this modeset list and change the refresh rate based on the video frame rate. Finally, the userspace can also derive an appropriate mode for a particular refresh rate based on the FreeSync Mode and add it to the connector’s mode list.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h&Note: This is an experimental feature.h]h&Note: This is an experimental feature.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hThe default value: 0 (off).h]hThe default value: 0 (off).}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _reset_method (int):h]h}(h]h ]h"]h$]h&]hӌreset-method-intuh1hhMqhhhhhNubh)}(h**reset_method (int)**h]h)}(hj@h]hreset_method (int)}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>ubah}(h]j=ah ]h"]reset_method (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jSj3sh}j=j3subh)}(h]GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)h]h]GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(hA.. _bad_page_threshold (int) Bad page threshold is specifies the:h]h}(h]h ]h"]h$]h&]hӌ:bad-page-threshold-int-bad-page-threshold-is-specifies-theuh1hhMxhhhhhNubh)}(h@**bad_page_threshold (int) Bad page threshold is specifies the**h]h)}(hjuh]h 0 use the soft pptable with specicfied id.h]hfUsed to override pptable id. id = 0 use VBIOS pptable. id > 0 use the soft pptable with specicfied id.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _partition_mode (int):h]h}(h]h ]h"]h$]h&]hӌpartition-mode-intuh1hhMhhhhhNubh)}(h**partition_mode (int)**h]h)}(hjh]hpartition_mode (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]partition_mode (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jjsh}jjsubh)}(h&Used to override the default SPX mode.h]h&Used to override the default SPX mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _enforce_isolation (int):h]h}(h]h ]h"]h$]h&]hӌenforce-isolation-intuh1hhMhhhhhNubh)}(h**enforce_isolation (int)**h]h)}(hjh]henforce_isolation (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"]enforce_isolation (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}jjsh}jjsubh)}(henforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)h]henforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhubh)}(h.. _modeset (int):h]h}(h]h ]h"]h$]h&]hӌ modeset-intuh1hhMhhhhhNubh)}(h**modeset (int)**h]h)}(hjh]h modeset (int)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]jah ]h"] modeset (int)ah$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/module-parameters:7: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.chMhhhhh}j0jsh}jjsubh)}(hGOverride nomodeset (1 = override, -1 = auto). The default is -1 (auto).h]hGOverride nomodeset (1 = override, -1 = auto). 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This limits the VRAM size reported to ROCm applications to the visible size, usually 256MB.h]h)}(h0x2: Enable simulating large-bar capability on non-large bar system. This limits the VRAM size reported to ROCm applications to the visible size, usually 256MB.h]h0x2: Enable simulating large-bar capability on non-large bar system. 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Due to electrical and mechanical constraints there may be likely interference of relatively high-powered harmonics of the (G-)DDR memory clocks with local radio module frequency bands used by Wifi 6/6e/7. To mitigate the possible RFI interference, with this feature enabled, PMFW will use either “shadowed P-State” or “P-State” based on active list of frequencies in-use (to be avoided) as part of initial setting or P-state transition. However, there may be potential performance impact with this feature enabled. (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if supported))h]hXEnable Wifi RFI interference mitigation feature. Due to electrical and mechanical constraints there may be likely interference of relatively high-powered harmonics of the (G-)DDR memory clocks with local radio module frequency bands used by Wifi 6/6e/7. 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"gttsize-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKsourcehuh1jubj)}(hhh]h)}(hhh]h2Hyperlink target "moverate-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineK sourcehuh1jubj)}(hhh]h)}(hhh]h/Hyperlink target "audio-int" is not referenced.}hj+sbah}(h]h ]h"]h$]h&]uh1hhj(ubah}(h]h ]h"]h$]h&]levelKtypejlineK'sourcehuh1jubj)}(hhh]h)}(hhh]h7Hyperlink target "disp-priority-int" is not referenced.}hjEsbah}(h]h ]h"]h$]h&]uh1hhjBubah}(h]h ]h"]h$]h&]levelKtypejlineK.sourcehuh1jubj)}(hhh]h)}(hhh]h0Hyperlink target "hw-i2c-int" is not referenced.}hj_sbah}(h]h ]h"]h$]h&]uh1hhj\ubah}(h]h ]h"]h$]h&]levelKtypejlineK5sourcehuh1jubj)}(hhh]h)}(hhh]h3Hyperlink target "pcie-gen2-int" is not referenced.}hjysbah}(h]h ]h"]h$]h&]uh1hhjvubah}(h]h ]h"]h$]h&]levelKtypejlineK<sourcehuh1jubj)}(hhh]h)}(hhh]h-Hyperlink target "msi-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKCsourcehuh1jubj)}(hhh]h)}(hhh]hBHyperlink target "svm-default-granularity-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKJsourcehuh1jubj)}(hhh]h)}(hhh]h;Hyperlink target "lockup-timeout-string" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKQsourcehuh1jubj)}(hhh]h)}(hhh]h-Hyperlink target "dpm-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKdsourcehuh1jubj)}(hhh]h)}(hhh]h6Hyperlink target "fw-load-type-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKmsourcehuh1jubj)}(hhh]h)}(hhh]h.Hyperlink target "aspm-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKwsourcehuh1jubj)}(hhh]h)}(hhh]h/Hyperlink target "runpm-int" is not referenced.}hj/sbah}(h]h ]h"]h$]h&]uh1hhj,ubah}(h]h ]h"]h$]h&]levelKtypejlineK~sourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "ip-block-mask-uint" is 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]h"]h$]h&]levelKtypejlineKsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "vm-update-mode-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "exp-hw-support-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKŌsourcehuh1jubj)}(hhh]h)}(hhh]h,Hyperlink target "dc-int" is not referenced.}hj3sbah}(h]h ]h"]h$]h&]uh1hhj0ubah}(h]h ]h"]h$]h&]levelKtypejlineǨsourcehuh1jubj)}(hhh]h)}(hhh]h4Hyperlink target "sched-jobs-int" is not referenced.}hjMsbah}(h]h ]h"]h$]h&]uh1hhjJubah}(h]h ]h"]h$]h&]levelKtypejlineKӌsourcehuh1jubj)}(hhh]h)}(hhh]h=Hyperlink target "sched-hw-submission-int" is not referenced.}hjgsbah}(h]h ]h"]h$]h&]uh1hhjdubah}(h]h ]h"]h$]h&]levelKtypejlineKڌsourcehuh1jubj)}(hhh]h)}(hhh]h:Hyperlink target "ppfeaturemask-hexint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhj~ubah}(h]h ]h"]h$]h&]levelKtypejlineKsourcehuh1jubj)}(hhh]h)}(hhh]hsourcehuh1jubj)}(hhh]h)}(hhh]h3Hyperlink target "ras-mask-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMEsourcehuh1jubj)}(hhh]h)}(hhh]h@Hyperlink target "timeout-fatal-disable-bool" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMMsourcehuh1jubj)}(hhh]h)}(hhh]h9Hyperlink target "timeout-period-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMTsourcehuh1jubj)}(hhh]h)}(hhh]h4Hyperlink target "si-support-int" is not referenced.}hj!sbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineM[sourcehuh1jubj)}(hhh]h)}(hhh]h5Hyperlink target "cik-support-int" is not referenced.}hj;sbah}(h]h ]h"]h$]h&]uh1hhj8ubah}(h]h ]h"]h$]h&]levelKtypejlineMdsourcehuh1jubj)}(hhh]h)}(hhh]h?Hyperlink target "smu-memory-pool-size-uint" is not referenced.}hjUsbah}(h]h ]h"]h$]h&]uh1hhjRubah}(h]h ]h"]h$]h&]levelKtypejlineMmsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "async-gfx-ring-int" is not referenced.}hjosbah}(h]h ]h"]h$]h&]uh1hhjlubah}(h]h ]h"]h$]h&]levelKtypejlineMusourcehuh1jubj)}(hhh]h)}(hhh]h.Hyperlink target "mcbp-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineM|sourcehuh1jubj)}(hhh]h)}(hhh]h3Hyperlink target "discovery-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h-Hyperlink target "mes-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "mes-log-enable-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h1Hyperlink target "mes-kiq-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h1Hyperlink target "uni-mes-int" is not referenced.}hj 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]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]hFHyperlink target "max-num-of-queues-per-device-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h6Hyperlink target "send-sigterm-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h:Hyperlink target "halt-if-hws-hang-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h:Hyperlink target "hws-gws-support-bool" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]hEHyperlink target "queue-preemption-timeout-ms-int" is not referenced.}hj)sbah}(h]h ]h"]h$]h&]uh1hhj&ubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h:Hyperlink target "debug-evictions-bool" is not referenced.}hjCsbah}(h]h ]h"]h$]h&]uh1hhj@ubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h>Hyperlink target "no-system-mem-limit-bool" is not referenced.}hj]sbah}(h]h ]h"]h$]h&]uh1hhjZubah}(h]h ]h"]h$]h&]levelKtypejlineM sourcehuh1jubj)}(hhh]h)}(hhh]hGHyperlink target "no-queue-eviction-on-vm-fault-int" is not referenced.}hjwsbah}(h]h ]h"]h$]h&]uh1hhjtubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h5Hyperlink target "mtype-local-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h3Hyperlink target "pcie-p2p-bool" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "dcfeaturemask-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineM&sourcehuh1jubj)}(hhh]h)}(hhh]h6Hyperlink target "dcdebugmask-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineM.sourcehuh1jubj)}(hhh]h)}(hhh]h3Hyperlink target "abmlevel-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineM5sourcehuh1jubj)}(hhh]h)}(hhh]h5Hyperlink target "damageclips-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMDsourcehuh1jubj)}(hhh]h)}(hhh]h-Hyperlink target "tmz-int" is not referenced.}hj-sbah}(h]h ]h"]h$]h&]uh1hhj*ubah}(h]h ]h"]h$]h&]levelKtypejlineMOsourcehuh1jubj)}(hhh]h)}(hhh]h9Hyperlink target "freesync-video-uint" is not referenced.}hjGsbah}(h]h ]h"]h$]h&]uh1hhjDubah}(h]h ]h"]h$]h&]levelKtypejlineMYsourcehuh1jubj)}(hhh]h)}(hhh]h6Hyperlink target "reset-method-int" is not referenced.}hjasbah}(h]h ]h"]h$]h&]uh1hhj^ubah}(h]h ]h"]h$]h&]levelKtypejlineMqsourcehuh1jubj)}(hhh]h)}(hhh]h`Hyperlink target "bad-page-threshold-int-bad-page-threshold-is-specifies-the" is not referenced.}hj{sbah}(h]h ]h"]h$]h&]uh1hhjxubah}(h]h ]h"]h$]h&]levelKtypejlineMxsourcehuh1jubj)}(hhh]h)}(hhh]h3Hyperlink target "vcnfw-log-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h4Hyperlink target "sg-display-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h2Hyperlink target "umsch-mm-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "umsch-mm-fwlog-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "smu-pptable-id-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h8Hyperlink target "partition-mode-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h;Hyperlink target "enforce-isolation-int" is not referenced.}hj1sbah}(h]h ]h"]h$]h&]uh1hhj.ubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h1Hyperlink target "modeset-int" is not referenced.}hjKsbah}(h]h ]h"]h$]h&]uh1hhjHubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h2Hyperlink target "seamless-int" is not referenced.}hjesbah}(h]h ]h"]h$]h&]uh1hhjbubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h5Hyperlink target "debug-mask-uint" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhj|ubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h-Hyperlink target "agp-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h.Hyperlink target "wbrf-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h/Hyperlink target "rebar-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jubj)}(hhh]h)}(hhh]h4Hyperlink target "user-queue-int" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineMsourcehuh1jube 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