€•¦4Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ'/translations/zh_CN/gpu/amdgpu/gc/index”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/zh_TW/gpu/amdgpu/gc/index”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/it_IT/gpu/amdgpu/gc/index”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ja_JP/gpu/amdgpu/gc/index”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ko_KR/gpu/amdgpu/gc/index”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/sp_SP/gpu/amdgpu/gc/index”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒtarget”“”)”}”(hŒ.. _amdgpu-gc:”h]”h}”(h]”h ]”h"]”h$]”h&]”Œrefid”Œ amdgpu-gc”uh1h¡h KhhhžhhŸŒA/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/gc/index.rst”ubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ&drm/amdgpu - Graphics and Compute (GC)”h]”hŒ&drm/amdgpu - Graphics and Compute (GC)”…””}”(hh·hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hµhh²hžhhŸh¯h KubhŒ paragraph”“”)”}”(hXpThe relationship between the CPU and GPU can be described as the producer-consumer problem, where the CPU fills out a buffer with operations (producer) to be executed by the GPU (consumer). The requested operations in the buffer are called **Command Packets**, which can be summarized as a compressed way of transmitting command information to the graphics controller.”h]”(hŒðThe relationship between the CPU and GPU can be described as the producer-consumer problem, where the CPU fills out a buffer with operations (producer) to be executed by the GPU (consumer). The requested operations in the buffer are called ”…””}”(hhÇhžhhŸNh NubhŒstrong”“”)”}”(hŒ**Command Packets**”h]”hŒCommand Packets”…””}”(hhÑhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÏhhÇubhŒm, which can be summarized as a compressed way of transmitting command information to the graphics controller.”…””}”(hhÇhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h Khh²hžhubhÆ)”}”(hXThe component that acts as the front end between the CPU and the GPU is called **Command Processor (CP)**. This component is responsible for providing greater flexibility to the **Graphics and Compute (GC)** since CP makes it possible to program various aspects of the GPU pipeline. CP also coordinates the communication between the CPU and GPU via a mechanism named **Ring Buffers**, where the CPU appends information to the buffer while the GPU removes operations. CP is also responsible for handling **Indirect Buffers (IB)**.”h]”(hŒOThe component that acts as the front end between the CPU and the GPU is called ”…””}”(hhéhžhhŸNh NubhÐ)”}”(hŒ**Command Processor (CP)**”h]”hŒCommand Processor (CP)”…””}”(hhñhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÏhhéubhŒI. This component is responsible for providing greater flexibility to the ”…””}”(hhéhžhhŸNh NubhÐ)”}”(hŒ**Graphics and Compute (GC)**”h]”hŒGraphics and Compute (GC)”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÏhhéubhŒ  since CP makes it possible to program various aspects of the GPU pipeline. CP also coordinates the communication between the CPU and GPU via a mechanism named ”…””}”(hhéhžhhŸNh NubhÐ)”}”(hŒ**Ring Buffers**”h]”hŒ Ring Buffers”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÏhhéubhŒx, where the CPU appends information to the buffer while the GPU removes operations. CP is also responsible for handling ”…””}”(hhéhžhhŸNh NubhÐ)”}”(hŒ**Indirect Buffers (IB)**”h]”hŒIndirect Buffers (IB)”…””}”(hj'hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÏhhéubhŒ.”…””}”(hhéhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h K hh²hžhubhÆ)”}”(hX#For reference, internally the CP consists of several sub-blocks (CPC - CP compute, CPG - CP graphics, and CPF - CP fetcher). Some of these acronyms appear in register names, but this is more of an implementation detail and not something that directly impacts driver programming or debugging.”h]”hX#For reference, internally the CP consists of several sub-blocks (CPC - CP compute, CPG - CP graphics, and CPF - CP fetcher). Some of these acronyms appear in register names, but this is more of an implementation detail and not something that directly impacts driver programming or debugging.”…””}”(hj?hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h Khh²hžhubh±)”}”(hhh]”(h¶)”}”(hŒ+Graphics (GFX) and Compute Microcontrollers”h]”hŒ+Graphics (GFX) and Compute Microcontrollers”…””}”(hjPhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hµhjMhžhhŸh¯h KubhÆ)”}”(hŒdGC is a large block, and as a result, it has multiple firmware associated with it. Some of them are:”h]”hŒdGC is a large block, and as a result, it has multiple firmware associated with it. Some of them are:”…””}”(hj^hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h KhjMhžhubhŒdefinition_list”“”)”}”(hhh]”(hŒdefinition_list_item”“”)”}”(hX>CP (Command Processor) The name for the hardware block that encompasses the front end of the GFX/Compute pipeline. Consists mainly of a bunch of microcontrollers (PFP, ME, CE, MEC). The firmware that runs on these microcontrollers provides the driver interface to interact with the GFX/Compute engine. MEC (MicroEngine Compute) This is the microcontroller that controls the compute queues on the GFX/compute engine. MES (MicroEngine Scheduler) This is the engine for managing queues. For more details check :ref:`MicroEngine Scheduler (MES) `. ”h]”(hŒterm”“”)”}”(hŒCP (Command Processor)”h]”hŒCP (Command Processor)”…””}”(hjyhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jwhŸh¯h K,hjsubhŒ definition”“”)”}”(hhh]”(hÆ)”}”(hXThe name for the hardware block that encompasses the front end of the GFX/Compute pipeline. Consists mainly of a bunch of microcontrollers (PFP, ME, CE, MEC). The firmware that runs on these microcontrollers provides the driver interface to interact with the GFX/Compute engine.”h]”hXThe name for the hardware block that encompasses the front end of the GFX/Compute pipeline. Consists mainly of a bunch of microcontrollers (PFP, ME, CE, MEC). The firmware that runs on these microcontrollers provides the driver interface to interact with the GFX/Compute engine.”…””}”(hjŒhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h K!hj‰ubjm)”}”(hhh]”(jr)”}”(hŒrMEC (MicroEngine Compute) This is the microcontroller that controls the compute queues on the GFX/compute engine. ”h]”(jx)”}”(hŒMEC (MicroEngine Compute)”h]”hŒMEC (MicroEngine Compute)”…””}”(hj¡hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jwhŸh¯h K(hjubjˆ)”}”(hhh]”hÆ)”}”(hŒWThis is the microcontroller that controls the compute queues on the GFX/compute engine.”h]”hŒWThis is the microcontroller that controls the compute queues on the GFX/compute engine.”…””}”(hj²hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h K'hj¯ubah}”(h]”h ]”h"]”h$]”h&]”uh1j‡hjubeh}”(h]”h ]”h"]”h$]”h&]”uh1jqhŸh¯h K(hjšubjr)”}”(hŒŒMES (MicroEngine Scheduler) This is the engine for managing queues. For more details check :ref:`MicroEngine Scheduler (MES) `. ”h]”(jx)”}”(hŒMES (MicroEngine Scheduler)”h]”hŒMES (MicroEngine Scheduler)”…””}”(hjÐhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jwhŸh¯h K,hjÌubjˆ)”}”(hhh]”hÆ)”}”(hŒoThis is the engine for managing queues. For more details check :ref:`MicroEngine Scheduler (MES) `.”h]”(hŒ?This is the engine for managing queues. For more details check ”…””}”(hjáhžhhŸNh Nubh)”}”(hŒ/:ref:`MicroEngine Scheduler (MES) `”h]”hŒinline”“”)”}”(hjëh]”hŒMicroEngine Scheduler (MES)”…””}”(hjïhžhhŸNh Nubah}”(h]”h ]”(Œxref”Œstd”Œstd-ref”eh"]”h$]”h&]”uh1jíhjéubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”Œgpu/amdgpu/gc/index”Œ refdomain”júŒreftype”Œref”Œ refexplicit”ˆŒrefwarn”ˆŒ reftarget”Œ amdgpu-mes”uh1hhŸh¯h K+hjáubhŒ.”…””}”(hjáhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h K+hjÞubah}”(h]”h ]”h"]”h$]”h&]”uh1j‡hjÌubeh}”(h]”h ]”h"]”h$]”h&]”uh1jqhŸh¯h K,hjšubeh}”(h]”h ]”h"]”h$]”h&]”uh1jlhj‰ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j‡hjsubeh}”(h]”h ]”h"]”h$]”h&]”uh1jqhŸh¯h K,hjnubjr)”}”(hX,RLC (RunList Controller) This is another microcontroller in the GFX/Compute engine. It handles power management related functionality within the GFX/Compute engine. The name is a vestige of old hardware where it was originally added and doesn't really have much relation to what the engine does now. ”h]”(jx)”}”(hŒRLC (RunList Controller)”h]”hŒRLC (RunList Controller)”…””}”(hj:hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jwhŸh¯h K2hj6ubjˆ)”}”(hhh]”hÆ)”}”(hXThis is another microcontroller in the GFX/Compute engine. It handles power management related functionality within the GFX/Compute engine. The name is a vestige of old hardware where it was originally added and doesn't really have much relation to what the engine does now.”h]”hXThis is another microcontroller in the GFX/Compute engine. It handles power management related functionality within the GFX/Compute engine. The name is a vestige of old hardware where it was originally added and doesn’t really have much relation to what the engine does now.”…””}”(hjKhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÅhŸh¯h K/hjHubah}”(h]”h ]”h"]”h$]”h&]”uh1j‡hj6ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jqhŸh¯h K2hjnhžhubeh}”(h]”h ]”h"]”h$]”h&]”uh1jlhjMhžhhŸNh NubhŒcompound”“”)”}”(hhh]”hŒtoctree”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”hjŒentries”]”NŒgpu/amdgpu/gc/mes”†”aŒ includefiles”]”j}aŒmaxdepth”JÿÿÿÿŒcaption”NŒglob”‰Œhidden”‰Œ includehidden”‰Œnumbered”KŒ titlesonly”‰Œ rawentries”]”uh1jphŸh¯h K4hjmubah}”(h]”h ]”Œtoctree-wrapper”ah"]”h$]”h&]”uh1jkhjMhžhhŸh¯h K6ubeh}”(h]”Œ)graphics-gfx-and-compute-microcontrollers”ah ]”h"]”Œ+graphics (gfx) and compute microcontrollers”ah$]”h&]”uh1h°hh²hžhhŸh¯h Kubeh}”(h]”(Œ"drm-amdgpu-graphics-and-compute-gc”h®eh ]”h"]”(Œ&drm/amdgpu - graphics and compute (gc)”Œ amdgpu-gc”eh$]”h&]”uh1h°hhhžhhŸh¯h KŒexpect_referenced_by_name”}”jŸh£sŒexpect_referenced_by_id”}”h®h£subeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¯uh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hµNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jÉŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¯Œ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”h®]”h£asŒnameids”}”(jŸh®jžj›j–j“uŒ nametypes”}”(jŸˆjž‰j–‰uh}”(h®h²j›h²j“jMuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”hŒsystem_message”“”)”}”(hhh]”hÆ)”}”(hhh]”hŒ/Hyperlink target "amdgpu-gc" is not referenced.”…””}”hj3sbah}”(h]”h ]”h"]”h$]”h&]”uh1hÅhj0ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”h¯Œline”Kuh1j.ubaŒ transformer”NŒ include_log”]”Œ decoration”Nhžhub.