ksphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget*/translations/zh_CN/gpu/amdgpu/driver-coremodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/zh_TW/gpu/amdgpu/driver-coremodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/it_IT/gpu/amdgpu/driver-coremodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/ja_JP/gpu/amdgpu/driver-coremodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/ko_KR/gpu/amdgpu/driver-coremodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/pt_BR/gpu/amdgpu/driver-coremodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget*/translations/sp_SP/gpu/amdgpu/driver-coremodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hCore Driver Infrastructureh]hCore Driver Infrastructure}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhD/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core.rsthKubh)}(hhh](h)}(hGPU Hardware Structureh]hGPU Hardware Structure}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hXEach ASIC is a collection of hardware blocks. We refer to them as "IPs" (Intellectual Property blocks). Each IP encapsulates certain functionality. IPs are versioned and can also be mixed and matched. E.g., you might have two different ASICs that both have System DMA (SDMA) 5.x IPs. The driver is arranged by IPs. There are driver components to handle the initialization and operation of each IP. There are also a bunch of smaller IPs that don't really need much if any driver interaction. Those end up getting lumped into the common stuff in the soc files. The soc files (e.g., vi.c, soc15.c nv.c) contain code for aspects of the SoC itself rather than specific IPs. E.g., things like GPU resets and register access functions are SoC dependent.h]hXEach ASIC is a collection of hardware blocks. We refer to them as “IPs” (Intellectual Property blocks). Each IP encapsulates certain functionality. IPs are versioned and can also be mixed and matched. E.g., you might have two different ASICs that both have System DMA (SDMA) 5.x IPs. The driver is arranged by IPs. There are driver components to handle the initialization and operation of each IP. There are also a bunch of smaller IPs that don’t really need much if any driver interaction. Those end up getting lumped into the common stuff in the soc files. The soc files (e.g., vi.c, soc15.c nv.c) contain code for aspects of the SoC itself rather than specific IPs. E.g., things like GPU resets and register access functions are SoC dependent.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXAn APU contains more than just CPU and GPU, it also contains all of the platform stuff (audio, usb, gpio, etc.). Also, a lot of components are shared between the CPU, platform, and the GPU (e.g., SMU, PSP, etc.). Specific components (CPU, GPU, etc.) usually have their interface to interact with those common components. For things like S0i3 there is a ton of coordination required across all the components, but that is probably a bit beyond the scope of this section.h]hXAn APU contains more than just CPU and GPU, it also contains all of the platform stuff (audio, usb, gpio, etc.). Also, a lot of components are shared between the CPU, platform, and the GPU (e.g., SMU, PSP, etc.). Specific components (CPU, GPU, etc.) usually have their interface to interact with those common components. For things like S0i3 there is a ton of coordination required across all the components, but that is probably a bit beyond the scope of this section.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h9With respect to the GPU, we have the following major IPs:h]h9With respect to the GPU, we have the following major IPs:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubhdefinition_list)}(hhh](hdefinition_list_item)}(hXGMC (Graphics Memory Controller) This was a dedicated IP on older pre-vega chips, but has since become somewhat decentralized on vega and newer chips. They now have dedicated memory hubs for specific IPs or groups of IPs. We still treat it as a single component in the driver however since the programming model is still pretty similar. This is how the different IPs on the GPU get the memory (VRAM or system memory). It also provides the support for per process GPU virtual address spaces. h](hterm)}(h GMC (Graphics Memory Controller)h]h GMC (Graphics Memory Controller)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK'hjubh definition)}(hhh]h)}(hXThis was a dedicated IP on older pre-vega chips, but has since become somewhat decentralized on vega and newer chips. They now have dedicated memory hubs for specific IPs or groups of IPs. We still treat it as a single component in the driver however since the programming model is still pretty similar. This is how the different IPs on the GPU get the memory (VRAM or system memory). It also provides the support for per process GPU virtual address spaces.h]hXThis was a dedicated IP on older pre-vega chips, but has since become somewhat decentralized on vega and newer chips. They now have dedicated memory hubs for specific IPs or groups of IPs. We still treat it as a single component in the driver however since the programming model is still pretty similar. This is how the different IPs on the GPU get the memory (VRAM or system memory). It also provides the support for per process GPU virtual address spaces.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hj%ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hhhK'hj ubj)}(hIH (Interrupt Handler) This is the interrupt controller on the GPU. All of the IPs feed their interrupts into this IP and it aggregates them into a set of ring buffers that the driver can parse to handle interrupts from different IPs. h](j)}(hIH (Interrupt Handler)h]hIH (Interrupt Handler)}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK-hjBubj$)}(hhh]h)}(hThis is the interrupt controller on the GPU. All of the IPs feed their interrupts into this IP and it aggregates them into a set of ring buffers that the driver can parse to handle interrupts from different IPs.h]hThis is the interrupt controller on the GPU. All of the IPs feed their interrupts into this IP and it aggregates them into a set of ring buffers that the driver can parse to handle interrupts from different IPs.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjTubah}(h]h ]h"]h$]h&]uh1j#hjBubeh}(h]h ]h"]h$]h&]uh1j hhhK-hj hhubj)}(hPSP (Platform Security Processor) This handles security policy for the SoC and executes trusted applications, and validates and loads firmwares for other blocks. h](j)}(h!PSP (Platform Security Processor)h]h!PSP (Platform Security Processor)}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK1hjqubj$)}(hhh]h)}(hThis handles security policy for the SoC and executes trusted applications, and validates and loads firmwares for other blocks.h]hThis handles security policy for the SoC and executes trusted applications, and validates and loads firmwares for other blocks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1j#hjqubeh}(h]h ]h"]h$]h&]uh1j hhhK1hj hhubj)}(hSMU (System Management Unit) This is the power management microcontroller. It manages the entire SoC. The driver interacts with it to control power management features like clocks, voltages, power rails, etc. h](j)}(hSMU (System Management Unit)h]hSMU (System Management Unit)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK6hjubj$)}(hhh]h)}(hThis is the power management microcontroller. It manages the entire SoC. The driver interacts with it to control power management features like clocks, voltages, power rails, etc.h]hThis is the power management microcontroller. It manages the entire SoC. The driver interacts with it to control power management features like clocks, voltages, power rails, etc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hhhK6hj hhubj)}(hDCN (Display Controller Next) This is the display controller. It handles the display hardware. It is described in more details in :ref:`Display Core `. h](j)}(hDCN (Display Controller Next)h]hDCN (Display Controller Next)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK:hjubj$)}(hhh]h)}(hThis is the display controller. It handles the display hardware. It is described in more details in :ref:`Display Core `.h](heThis is the display controller. It handles the display hardware. It is described in more details in }(hjhhhNhNubh)}(h):ref:`Display Core `h]hinline)}(hjh]h Display Core}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/amdgpu/driver-core refdomainjreftyperef refexplicitrefwarn reftargetamdgpu-display-coreuh1hhhhK9hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK9hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hhhK:hj hhubj)}(hSDMA (System DMA) This is a multi-purpose DMA engine. The kernel driver uses it for various things including paging and GPU page table updates. It's also exposed to userspace for use by user mode drivers (OpenGL, Vulkan, etc.) h](j)}(hSDMA (System DMA)h]hSDMA (System DMA)}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK@hj'ubj$)}(hhh]h)}(hThis is a multi-purpose DMA engine. The kernel driver uses it for various things including paging and GPU page table updates. It's also exposed to userspace for use by user mode drivers (OpenGL, Vulkan, etc.)h]hThis is a multi-purpose DMA engine. The kernel driver uses it for various things including paging and GPU page table updates. It’s also exposed to userspace for use by user mode drivers (OpenGL, Vulkan, etc.)}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj9ubah}(h]h ]h"]h$]h&]uh1j#hj'ubeh}(h]h ]h"]h$]h&]uh1j hhhK@hj hhubj)}(hXGC (Graphics and Compute) This is the graphics and compute engine, i.e., the block that encompasses the 3D pipeline and shader blocks. This is by far the largest block on the GPU. The 3D pipeline has tons of sub-blocks. In addition to that, it also contains the CP microcontrollers (ME, PFP, CE, MEC) and the RLC microcontroller. It's exposed to userspace for user mode drivers (OpenGL, Vulkan, OpenCL, etc.). More details in :ref:`Graphics (GFX) and Compute `. h](j)}(hGC (Graphics and Compute)h]hGC (Graphics and Compute)}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKIhjVubj$)}(hhh]h)}(hXThis is the graphics and compute engine, i.e., the block that encompasses the 3D pipeline and shader blocks. This is by far the largest block on the GPU. The 3D pipeline has tons of sub-blocks. In addition to that, it also contains the CP microcontrollers (ME, PFP, CE, MEC) and the RLC microcontroller. It's exposed to userspace for user mode drivers (OpenGL, Vulkan, OpenCL, etc.). More details in :ref:`Graphics (GFX) and Compute `.h](hXThis is the graphics and compute engine, i.e., the block that encompasses the 3D pipeline and shader blocks. This is by far the largest block on the GPU. The 3D pipeline has tons of sub-blocks. In addition to that, it also contains the CP microcontrollers (ME, PFP, CE, MEC) and the RLC microcontroller. It’s exposed to userspace for user mode drivers (OpenGL, Vulkan, OpenCL, etc.). More details in }(hjkhhhNhNubh)}(h-:ref:`Graphics (GFX) and Compute `h]j)}(hjuh]hGraphics (GFX) and Compute}(hjwhhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&]refdocj  refdomainjreftyperef refexplicitrefwarnj amdgpu-gcuh1hhhhKChjkubh.}(hjkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKChjhubah}(h]h ]h"]h$]h&]uh1j#hjVubeh}(h]h ]h"]h$]h&]uh1j hhhKIhj hhubj)}(hVCN (Video Core Next) This is the multi-media engine. It handles video and image encode and decode. It's exposed to userspace for user mode drivers (VA-API, OpenMAX, etc.) h](j)}(hVCN (Video Core Next)h]hVCN (Video Core Next)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKNhjubj$)}(hhh]h)}(hThis is the multi-media engine. It handles video and image encode and decode. It's exposed to userspace for user mode drivers (VA-API, OpenMAX, etc.)h]hThis is the multi-media engine. It handles video and image encode and decode. It’s exposed to userspace for user mode drivers (VA-API, OpenMAX, etc.)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hhhKNhj hhubeh}(h]h ]h"]h$]h&]uh1jhhhhhhhNubh)}(hIt is important to note that these blocks can interact with each other. The picture below illustrates some of the components and their interconnection:h]hIt is important to note that these blocks can interact with each other. The picture below illustrates some of the components and their interconnection:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKPhhhhubkfigure kernel_figure)}(hhh]hfigure)}(hhh]himage)}(h*.. kernel-figure:: amd_overview_block.svg h]h}(h]h ]h"]h$]h&]uri!gpu/amdgpu/amd_overview_block.svg candidates}*jsuh1jhjhhhKubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhhhhhhhKTubh)}(hXJIn the diagram, memory-related blocks are shown in green. Notice that specific IPs have a green square that represents a small hardware block named 'hub', which is responsible for interfacing with memory. All memory hubs are connected in the UMCs, which in turn are connected to memory blocks. As a note, pre-vega devices have a dedicated block for the Graphic Memory Controller (GMC), which was replaced by UMC and hubs in new architectures. In the driver code, you can identify this component by looking for the suffix hub, for example: gfxhub, dchub, mmhub, vmhub, etc. Keep in mind that the component's interaction with the memory block may vary across architectures. For example, on Navi and newer, GC and SDMA are both attached to GCHUB; on pre-Navi, SDMA goes through MMHUB; VCN, JPEG, and VPE go through MMHUB; DCN goes through DCHUB.h]hXPIn the diagram, memory-related blocks are shown in green. Notice that specific IPs have a green square that represents a small hardware block named ‘hub’, which is responsible for interfacing with memory. All memory hubs are connected in the UMCs, which in turn are connected to memory blocks. As a note, pre-vega devices have a dedicated block for the Graphic Memory Controller (GMC), which was replaced by UMC and hubs in new architectures. In the driver code, you can identify this component by looking for the suffix hub, for example: gfxhub, dchub, mmhub, vmhub, etc. Keep in mind that the component’s interaction with the memory block may vary across architectures. For example, on Navi and newer, GC and SDMA are both attached to GCHUB; on pre-Navi, SDMA goes through MMHUB; VCN, JPEG, and VPE go through MMHUB; DCN goes through DCHUB.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhhhhubh)}(hXlThere is some protection for certain memory elements, and the PSP plays an essential role in this area. When a specific firmware is loaded into memory, the PSP takes steps to ensure it has a valid signature. It also stores firmware images in a protected memory area named Trusted Memory Area (TMR), so the OS or driver can't corrupt them at runtime. Another use of PSP is to support Trusted Applications (TA), which are basically small applications that run on the trusted processor and handles a trusted operation (e.g., HDCP). PSP is also used for encrypted memory for content protection via Trusted Memory Zone (TMZ).h]hXnThere is some protection for certain memory elements, and the PSP plays an essential role in this area. When a specific firmware is loaded into memory, the PSP takes steps to ensure it has a valid signature. It also stores firmware images in a protected memory area named Trusted Memory Area (TMR), so the OS or driver can’t corrupt them at runtime. Another use of PSP is to support Trusted Applications (TA), which are basically small applications that run on the trusted processor and handles a trusted operation (e.g., HDCP). PSP is also used for encrypted memory for content protection via Trusted Memory Zone (TMZ).}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhhhhubh)}(hAnother critical IP is the SMU. It handles reset distribution, as well as clock, thermal, and power management for all IPs on the SoC. SMU also helps to balance performance and power consumption.h]hAnother critical IP is the SMU. It handles reset distribution, as well as clock, thermal, and power management for all IPs on the SoC. SMU also helps to balance performance and power consumption.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKkhhhhubhtarget)}(h!.. _pipes-and-queues-description:h]h}(h]h ]h"]h$]h&]refidpipes-and-queues-descriptionuh1j>hKohhhhhhubeh}(h]gpu-hardware-structureah ]h"]gpu hardware structureah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h'GFX, Compute, and SDMA Overall Behaviorh]h'GFX, Compute, and SDMA Overall Behavior}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThhhhhKrubhnote)}(haFor simplicity, whenever the term block is used in this section, it means GFX, Compute, and SDMA.h]h)}(haFor simplicity, whenever the term block is used in this section, it means GFX, Compute, and SDMA.h]haFor simplicity, whenever the term block is used in this section, it means GFX, Compute, and SDMA.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthjgubah}(h]h ]h"]h$]h&]uh1jehjThhhhhNubh)}(hGFX, Compute and SDMA share a similar form of operation that can be abstracted to facilitate understanding of the behavior of these blocks. See the figure below illustrating the common components of these blocks:h]hGFX, Compute and SDMA share a similar form of operation that can be abstracted to facilitate understanding of the behavior of these blocks. See the figure below illustrating the common components of these blocks:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhjThhubj)}(hhh]j)}(hhh]j)}(h2.. kernel-figure:: pipe_and_queue_abstraction.svg h]h}(h]h ]h"]h$]h&]uri)gpu/amdgpu/pipe_and_queue_abstraction.svgj}jjsuh1jhjhhhKubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjThhhhhK|ubh)}(hXIn the central part of this figure, you can see two hardware elements, one called **Pipes** and another called **Queues**; it is important to highlight that Queues must be associated with a Pipe and vice-versa. Every specific hardware IP may have a different number of Pipes and, in turn, a different number of Queues; for example, GFX 11 has two Pipes and two Queues per Pipe for the GFX front end.h](hRIn the central part of this figure, you can see two hardware elements, one called }(hjhhhNhNubhstrong)}(h **Pipes**h]hPipes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh and another called }(hjhhhNhNubj)}(h **Queues**h]hQueues}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhX; it is important to highlight that Queues must be associated with a Pipe and vice-versa. Every specific hardware IP may have a different number of Pipes and, in turn, a different number of Queues; for example, GFX 11 has two Pipes and two Queues per Pipe for the GFX front end.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK}hjThhubh)}(hXOPipe is the hardware that processes the instructions available in the Queues; in other words, it is a thread executing the operations inserted in the Queue. One crucial characteristic of Pipes is that they can only execute one Queue at a time; no matter if the hardware has multiple Queues in the Pipe, it only runs one Queue per Pipe.h]hXOPipe is the hardware that processes the instructions available in the Queues; in other words, it is a thread executing the operations inserted in the Queue. One crucial characteristic of Pipes is that they can only execute one Queue at a time; no matter if the hardware has multiple Queues in the Pipe, it only runs one Queue per Pipe.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjThhubh)}(hPipes have the mechanics of swapping between queues at the hardware level. Nonetheless, they only make use of Queues that are considered mapped. Pipes can switch between queues based on any of the following inputs:h]hPipes have the mechanics of swapping between queues at the hardware level. Nonetheless, they only make use of Queues that are considered mapped. Pipes can switch between queues based on any of the following inputs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjThhubhenumerated_list)}(hhh](h list_item)}(hCommand Stream;h]h)}(hjh]hCommand Stream;}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hPacket by Packet;h]h)}(hjh]hPacket by Packet;}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h0Other hardware requests the change (e.g., MES). h]h)}(h/Other hardware requests the change (e.g., MES).h]h/Other hardware requests the change (e.g., MES).}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj1ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jhjThhhhhKubh)}(hX>Queues within Pipes are defined by the Hardware Queue Descriptors (HQD). Associated with the HQD concept, we have the Memory Queue Descriptor (MQD), which is responsible for storing information about the state of each of the available Queues in the memory. The state of a Queue contains information such as the GPU virtual address of the queue itself, save areas, doorbell, etc. The MQD also stores the HQD registers, which are vital for activating or deactivating a given Queue. The scheduling firmware (e.g., MES) is responsible for loading HQDs from MQDs and vice versa.h]hX>Queues within Pipes are defined by the Hardware Queue Descriptors (HQD). Associated with the HQD concept, we have the Memory Queue Descriptor (MQD), which is responsible for storing information about the state of each of the available Queues in the memory. The state of a Queue contains information such as the GPU virtual address of the queue itself, save areas, doorbell, etc. The MQD also stores the HQD registers, which are vital for activating or deactivating a given Queue. The scheduling firmware (e.g., MES) is responsible for loading HQDs from MQDs and vice versa.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjThhubh)}(hXThe Queue-switching process can also happen with the firmware requesting the preemption or unmapping of a Queue. The firmware waits for the HQD_ACTIVE bit to change to low before saving the state into the MQD. To make a different Queue become active, the firmware copies the MQD state into the HQD registers and loads any additional state. Finally, it sets the HQD_ACTIVE bit to high to indicate that the queue is active. The Pipe will then execute work from active Queues.h]hXThe Queue-switching process can also happen with the firmware requesting the preemption or unmapping of a Queue. The firmware waits for the HQD_ACTIVE bit to change to low before saving the state into the MQD. To make a different Queue become active, the firmware copies the MQD state into the HQD registers and loads any additional state. Finally, it sets the HQD_ACTIVE bit to high to indicate that the queue is active. The Pipe will then execute work from active Queues.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjThhubeh}(h](%gfx-compute-and-sdma-overall-behaviorjKeh ]h"]('gfx, compute, and sdma overall behaviorpipes-and-queues-descriptioneh$]h&]uh1hhhhhhhhKrexpect_referenced_by_name}jvj@sexpect_referenced_by_id}jKj@subh)}(hhh](h)}(hDriver Structureh]hDriver Structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hhhhhKubh)}(hIn general, the driver has a list of all of the IPs on a particular SoC and for things like init/fini/suspend/resume, more or less just walks the list and handles each IP.h]hIn general, the driver has a list of all of the IPs on a particular SoC and for things like init/fini/suspend/resume, more or less just walks the list and handles each IP.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj}hhubh)}(hSome useful constructs:h]hSome useful constructs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj}hhubj )}(hhh](j)}(hKIQ (Kernel Interface Queue) This is a control queue used by the kernel driver to manage other gfx and compute queues on the GFX/compute engine. You can use it to map/unmap additional queues, etc. This is replaced by MES on GFX 11 and newer hardware. h](j)}(hKIQ (Kernel Interface Queue)h]hKIQ (Kernel Interface Queue)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj$)}(hhh]h)}(hThis is a control queue used by the kernel driver to manage other gfx and compute queues on the GFX/compute engine. You can use it to map/unmap additional queues, etc. This is replaced by MES on GFX 11 and newer hardware.h]hThis is a control queue used by the kernel driver to manage other gfx and compute queues on the GFX/compute engine. You can use it to map/unmap additional queues, etc. This is replaced by MES on GFX 11 and newer hardware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hhhKhjubj)}(hXeIB (Indirect Buffer) A command buffer for a particular engine. Rather than writing commands directly to the queue, you can write the commands into a piece of memory and then put a pointer to the memory into the queue. The hardware will then follow the pointer and execute the commands in the memory, then returning to the rest of the commands in the ring. h](j)}(hIB (Indirect Buffer)h]hIB (Indirect Buffer)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj$)}(hhh]h)}(hXOA command buffer for a particular engine. Rather than writing commands directly to the queue, you can write the commands into a piece of memory and then put a pointer to the memory into the queue. The hardware will then follow the pointer and execute the commands in the memory, then returning to the rest of the commands in the ring.h]hXOA command buffer for a particular engine. Rather than writing commands directly to the queue, you can write the commands into a piece of memory and then put a pointer to the memory into the queue. The hardware will then follow the pointer and execute the commands in the memory, then returning to the rest of the commands in the ring.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hhhKhjhhubeh}(h]h ]h"]h$]h&]uh1jhj}hhhhhNubj?)}(h.. _amdgpu_memory_domains:h]h}(h]h ]h"]h$]h&]jJamdgpu-memory-domainsuh1j>hKhj}hhhhubeh}(h]driver-structureah ]h"]driver structureah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hMemory Domainsh]hMemory Domains}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hhhhhKubh)}(h``AMDGPU_GEM_DOMAIN_CPU`` System memory that is not GPU accessible. Memory in this pool could be swapped out to disk if there is pressure.h](hliteral)}(h``AMDGPU_GEM_DOMAIN_CPU``h]hAMDGPU_GEM_DOMAIN_CPU}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj5ubhw System memory that is not GPU accessible. Memory in this pool could be swapped out to disk if there is pressure.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhKVhj$hhubh)}(h``AMDGPU_GEM_DOMAIN_GTT`` GPU accessible system memory, mapped into the GPU's virtual address space via gart. Gart memory linearizes non-contiguous pages of system memory, allows GPU access system memory in a linearized fashion.h](j:)}(h``AMDGPU_GEM_DOMAIN_GTT``h]hAMDGPU_GEM_DOMAIN_GTT}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjTubh GPU accessible system memory, mapped into the GPU’s virtual address space via gart. Gart memory linearizes non-contiguous pages of system memory, allows GPU access system memory in a linearized fashion.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhKYhj$hhubh)}(hb``AMDGPU_GEM_DOMAIN_VRAM`` Local video memory. For APUs, it is memory carved out by the BIOS.h](j:)}(h``AMDGPU_GEM_DOMAIN_VRAM``h]hAMDGPU_GEM_DOMAIN_VRAM}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjqubhH Local video memory. For APUs, it is memory carved out by the BIOS.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhK^hj$hhubh)}(he``AMDGPU_GEM_DOMAIN_GDS`` Global on-chip data storage used to share data across shader threads.h](j:)}(h``AMDGPU_GEM_DOMAIN_GDS``h]hAMDGPU_GEM_DOMAIN_GDS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubhL Global on-chip data storage used to share data across shader threads.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhKahj$hhubh)}(hq``AMDGPU_GEM_DOMAIN_GWS`` Global wave sync, used to synchronize the execution of all the waves on a device.h](j:)}(h``AMDGPU_GEM_DOMAIN_GWS``h]hAMDGPU_GEM_DOMAIN_GWS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubhX Global wave sync, used to synchronize the execution of all the waves on a device.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhKdhj$hhubh)}(ha``AMDGPU_GEM_DOMAIN_OA`` Ordered append, used by 3D or Compute engines for appending data.h](j:)}(h``AMDGPU_GEM_DOMAIN_OA``h]hAMDGPU_GEM_DOMAIN_OA}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubhI Ordered append, used by 3D or Compute engines for appending data.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhKghj$hhubh)}(h_``AMDGPU_GEM_DOMAIN_DOORBELL`` Doorbell. It is an MMIO region for signalling user mode queues.h](j:)}(h``AMDGPU_GEM_DOMAIN_DOORBELL``h]hAMDGPU_GEM_DOMAIN_DOORBELL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubhA Doorbell. It is an MMIO region for signalling user mode queues.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhe/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:189: ./include/uapi/drm/amdgpu_drm.hhKjhj$hhubeh}(h](memory-domainsjeh ]h"](memory domainsamdgpu_memory_domainseh$]h&]uh1hhhhhhhhKjy}jjsj{}jjsubh)}(hhh](h)}(hBuffer Objectsh]hBuffer Objects}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hXThis defines the interfaces to operate on an :c:type:`amdgpu_bo` buffer object which represents memory used by driver (VRAM, system memory, etc.). The driver provides DRM/GEM APIs to userspace. DRM/GEM APIs then use these interfaces to create/destroy/set buffer object which are then managed by the kernel TTM memory manager. The interfaces are also used internally by kernel clients, including gfx, uvd, etc. for kernel managed allocations used by the GPU.h](h-This defines the interfaces to operate on an }(hjhhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hj(h]h amdgpu_bo}(hj*hhhNhNubah}(h]h ](jcc-typeeh"]h$]h&]uh1j9hj&ubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnj amdgpu_bouh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:195: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chK1hjubhX buffer object which represents memory used by driver (VRAM, system memory, etc.). The driver provides DRM/GEM APIs to userspace. DRM/GEM APIs then use these interfaces to create/destroy/set buffer object which are then managed by the kernel TTM memory manager. The interfaces are also used internally by kernel clients, including gfx, uvd, etc. for kernel managed allocations used by the GPU.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhK1hj hhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single#amdgpu_bo_is_amdgpu_bo (C function)c.amdgpu_bo_is_amdgpu_bohNtauh1jQhj hhhNhNubhdesc)}(hhh](hdesc_signature)}(h:bool amdgpu_bo_is_amdgpu_bo (struct ttm_buffer_object *bo)h]hdesc_signature_line)}(h9bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)h](hdesc_sig_keyword_type)}(hboolh]hbool}(hjuhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jshjohhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKUubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjohhhjhKUubh desc_name)}(hamdgpu_bo_is_amdgpu_boh]h desc_sig_name)}(hamdgpu_bo_is_amdgpu_boh]hamdgpu_bo_is_amdgpu_bo}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1jhjohhhjhKUubhdesc_parameterlist)}(h(struct ttm_buffer_object *bo)h]hdesc_parameter)}(hstruct ttm_buffer_object *boh](hdesc_sig_keyword)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(httm_buffer_objecth]httm_buffer_object}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}jjsbc.amdgpu_bo_is_amdgpu_boasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubhdesc_sig_punctuation)}(hjh]h*}(hjhhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjubj)}(hboh]hbo}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjohhhjhKUubeh}(h]h ]h"]h$]h&]jj add_permalinkuh1jmsphinx_line_type declaratorhjihhhjhKUubah}(h]j`ah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jghjhKUhjdhhubh desc_content)}(hhh]h)}(h4check if the buffer object is an :c:type:`amdgpu_bo`h](h!check if the buffer object is an }(hj_hhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hjih]h amdgpu_bo}(hjkhhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hjgubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjj)}j]j c.amdgpu_bo_is_amdgpu_boasbj amdgpu_bouh1hhjhKUhj_ubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKUhj\hhubah}(h]h ]h"]h$]h&]uh1jZhjdhhhjhKUubeh}(h]h ](j4functioneh"]h$]h&]domainj4objtypejdesctypejnoindex noindexentrynocontentsentryuh1jbhhhj hNhNubh container)}(hX**Parameters** ``struct ttm_buffer_object *bo`` buffer object to be checked **Description** Uses destroy function associated with the object to determine if this is an :c:type:`amdgpu_bo`. **Return** true if the object belongs to :c:type:`amdgpu_bo`, false if not.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKYhjubj )}(hhh]j)}(h=``struct ttm_buffer_object *bo`` buffer object to be checked h](j)}(h ``struct ttm_buffer_object *bo``h]j:)}(hjh]hstruct ttm_buffer_object *bo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKVhjubj$)}(hhh]h)}(hbuffer object to be checkedh]hbuffer object to be checked}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKVhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKVhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKXhjubh)}(h`Uses destroy function associated with the object to determine if this is an :c:type:`amdgpu_bo`.h](hLUses destroy function associated with the object to determine if this is an }(hjhhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hj'h]h amdgpu_bo}(hj)hhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hj%ubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjj)}j]sbj amdgpu_bouh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKWhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhKWhjubh)}(h **Return**h]j)}(hjTh]hReturn}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKZhjubh)}(h@true if the object belongs to :c:type:`amdgpu_bo`, false if not.h](htrue if the object belongs to }(hjjhhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hjth]h amdgpu_bo}(hjvhhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hjrubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjjCj amdgpu_bouh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chK[hjjubh, false if not.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^,amdgpu_bo_placement_from_domain (C function)!c.amdgpu_bo_placement_from_domainhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hHvoid amdgpu_bo_placement_from_domain (struct amdgpu_bo *abo, u32 domain)h]jn)}(hGvoid amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)h](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKiubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKiubj)}(hamdgpu_bo_placement_from_domainh]j)}(hamdgpu_bo_placement_from_domainh]hamdgpu_bo_placement_from_domain}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKiubj)}(h#(struct amdgpu_bo *abo, u32 domain)h](j)}(hstruct amdgpu_bo *aboh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]j)}jjsb!c.amdgpu_bo_placement_from_domainasbuh1hhjubj)}(h h]h }(hj7 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjE hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(haboh]habo}(hjR hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u32 domainh](h)}(hhh]j)}(hu32h]hu32}(hjn hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjp modnameN classnameNjj)}j]j3 !c.amdgpu_bo_placement_from_domainasbuh1hhjg ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjg ubj)}(hdomainh]hdomain}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjg ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKiubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhKiubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhKihjhhubj[)}(hhh]h)}(hset buffer's placementh]hset buffer’s placement}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKihj hhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhKiubeh}(h]h ](j4functioneh"]h$]h&]jj4jj jj jjjuh1jbhhhj hNhNubj)}(h**Parameters** ``struct amdgpu_bo *abo`` :c:type:`amdgpu_bo` buffer object whose placement is to be set ``u32 domain`` requested domain **Description** Sets buffer's placement according to requested domain and the buffer's flags.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKmhj ubj )}(hhh](j)}(hY``struct amdgpu_bo *abo`` :c:type:`amdgpu_bo` buffer object whose placement is to be set h](j)}(h``struct amdgpu_bo *abo``h]j:)}(hj h]hstruct amdgpu_bo *abo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKjhj ubj$)}(hhh]h)}(h>:c:type:`amdgpu_bo` buffer object whose placement is to be seth](h)}(h:c:type:`amdgpu_bo`h]j:)}(hj$ h]h amdgpu_bo}(hj& hhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hj" ubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjjCj amdgpu_bouh1hhj hKjhj ubh+ buffer object whose placement is to be set}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKjhj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hKjhj ubj)}(h ``u32 domain`` requested domain h](j)}(h``u32 domain``h]j:)}(hj] h]h u32 domain}(hj_ hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj[ ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKkhjW ubj$)}(hhh]h)}(hrequested domainh]hrequested domain}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr hKkhjs ubah}(h]h ]h"]h$]h&]uh1j#hjW ubeh}(h]h ]h"]h$]h&]uh1j hjr hKkhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKmhj ubh)}(hMSets buffer's placement according to requested domain and the buffer's flags.h]hQSets buffer’s placement according to requested domain and the buffer’s flags.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKlhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^&amdgpu_bo_create_reserved (C function)c.amdgpu_bo_create_reservedhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hint amdgpu_bo_create_reserved (struct amdgpu_device *adev, unsigned long size, int align, u32 domain, struct amdgpu_bo **bo_ptr, u64 *gpu_addr, void **cpu_addr)h]jn)}(hint amdgpu_bo_create_reserved(struct amdgpu_device *adev, unsigned long size, int align, u32 domain, struct amdgpu_bo **bo_ptr, u64 *gpu_addr, void **cpu_addr)h](jt)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hKubj)}(hamdgpu_bo_create_reservedh]j)}(hamdgpu_bo_create_reservedh]hamdgpu_bo_create_reserved}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hKubj)}(h(struct amdgpu_device *adev, unsigned long size, int align, u32 domain, struct amdgpu_bo **bo_ptr, u64 *gpu_addr, void **cpu_addr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj' hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj8 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5 ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj: modnameN classnameNjj)}j]j)}jj sbc.amdgpu_bo_create_reservedasbuh1hhj ubj)}(h h]h }(hjX hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hjf hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hadevh]hadev}(hjs hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hunsigned long sizeh](jt)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjt)}(hlongh]hlong}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hsizeh]hsize}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(h int alignh](jt)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(halignh]halign}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(h u32 domainh](h)}(hhh]j)}(hu32h]hu32}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]jT c.amdgpu_bo_create_reservedasbuh1hhj ubj)}(h h]h }(hj3 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hdomainh]hdomain}(hjA hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hstruct amdgpu_bo **bo_ptrh](j)}(hjh]hstruct}(hjZ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV ubj)}(h h]h }(hjg hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjx hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjz modnameN classnameNjj)}j]jT c.amdgpu_bo_create_reservedasbuh1hhjV ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjV ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjV ubj)}(hbo_ptrh]hbo_ptr}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(h u64 *gpu_addrh](h)}(hhh]j)}(hu64h]hu64}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]jT c.amdgpu_bo_create_reservedasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hgpu_addrh]hgpu_addr}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hvoid **cpu_addrh](jt)}(hvoidh]hvoid}(hj, hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj( ubj)}(h h]h }(hj: hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj( ubj)}(hjh]h*}(hjH hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj( ubj)}(hjh]h*}(hjU hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj( ubj)}(hcpu_addrh]hcpu_addr}(hjb hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj( ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhj hKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj hhhj hKubah}(h]j ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj hKhj hhubj[)}(hhh]h)}(h!create reserved BO for kernel useh]h!create reserved BO for kernel use}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj hhubah}(h]h ]h"]h$]h&]uh1jZhj hhhj hKubeh}(h]h ](j4functioneh"]h$]h&]jj4jj jj jjjuh1jbhhhj hNhNubj)}(hXM**Parameters** ``struct amdgpu_device *adev`` amdgpu device object ``unsigned long size`` size for the new BO ``int align`` alignment for the new BO ``u32 domain`` where to place it ``struct amdgpu_bo **bo_ptr`` used to initialize BOs in structures ``u64 *gpu_addr`` GPU addr of the pinned BO ``void **cpu_addr`` optional CPU address mapping **Description** Allocates and pins a BO for kernel internal use, and returns it still reserved. **Note** For bo_ptr new BO is only created if bo_ptr points to NULL. **Return** 0 on success, negative error code otherwise.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubj )}(hhh](j)}(h4``struct amdgpu_device *adev`` amdgpu device object h](j)}(h``struct amdgpu_device *adev``h]j:)}(hj h]hstruct amdgpu_device *adev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubj$)}(hhh]h)}(hamdgpu device objecth]hamdgpu device object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hKhj ubj)}(h+``unsigned long size`` size for the new BO h](j)}(h``unsigned long size``h]j:)}(hjh]hunsigned long size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhjubj$)}(hhh]h)}(hsize for the new BOh]hsize for the new BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKhj ubj)}(h'``int align`` alignment for the new BO h](j)}(h ``int align``h]j:)}(hj?h]h int align}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj=ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj9ubj$)}(hhh]h)}(halignment for the new BOh]halignment for the new BO}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKhjUubah}(h]h ]h"]h$]h&]uh1j#hj9ubeh}(h]h ]h"]h$]h&]uh1j hjThKhj ubj)}(h!``u32 domain`` where to place it h](j)}(h``u32 domain``h]j:)}(hjxh]h u32 domain}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhjrubj$)}(hhh]h)}(hwhere to place ith]hwhere to place it}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjrubeh}(h]h ]h"]h$]h&]uh1j hjhKhj ubj)}(hC``struct amdgpu_bo **bo_ptr`` used to initialize BOs in structures h](j)}(h``struct amdgpu_bo **bo_ptr``h]j:)}(hjh]hstruct amdgpu_bo **bo_ptr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhjubj$)}(hhh]h)}(h$used to initialize BOs in structuresh]h$used to initialize BOs in structures}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKhj ubj)}(h,``u64 *gpu_addr`` GPU addr of the pinned BO h](j)}(h``u64 *gpu_addr``h]j:)}(hjh]h u64 *gpu_addr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhjubj$)}(hhh]h)}(hGPU addr of the pinned BOh]hGPU addr of the pinned BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKhj ubj)}(h1``void **cpu_addr`` optional CPU address mapping h](j)}(h``void **cpu_addr``h]j:)}(hj#h]hvoid **cpu_addr}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj!ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhjubj$)}(hhh]h)}(hoptional CPU address mappingh]hoptional CPU address mapping}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hKhj9ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj8hKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj^h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubh)}(hOAllocates and pins a BO for kernel internal use, and returns it still reserved.h]hOAllocates and pins a BO for kernel internal use, and returns it still reserved.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubh)}(h**Note**h]j)}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubh)}(h;For bo_ptr new BO is only created if bo_ptr points to NULL.h]h;For bo_ptr new BO is only created if bo_ptr points to NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubh)}(h,0 on success, negative error code otherwise.h]h,0 on success, negative error code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^$amdgpu_bo_create_kernel (C function)c.amdgpu_bo_create_kernelhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hint amdgpu_bo_create_kernel (struct amdgpu_device *adev, unsigned long size, int align, u32 domain, struct amdgpu_bo **bo_ptr, u64 *gpu_addr, void **cpu_addr)h]jn)}(hint amdgpu_bo_create_kernel(struct amdgpu_device *adev, unsigned long size, int align, u32 domain, struct amdgpu_bo **bo_ptr, u64 *gpu_addr, void **cpu_addr)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMBubj)}(hamdgpu_bo_create_kernelh]j)}(hamdgpu_bo_create_kernelh]hamdgpu_bo_create_kernel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMBubj)}(h(struct amdgpu_device *adev, unsigned long size, int align, u32 domain, struct amdgpu_bo **bo_ptr, u64 *gpu_addr, void **cpu_addr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjNmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_bo_create_kernelasbuh1hhj*ubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(hjh]h*}(hjzhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj*ubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(hunsigned long sizeh](jt)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjt)}(hlongh]hlong}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(h int alignh](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(halignh]halign}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(h u32 domainh](h)}(hhh]j)}(hu32h]hu32}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj+modnameN classnameNjj)}j]jhc.amdgpu_bo_create_kernelasbuh1hhj"ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(hdomainh]hdomain}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(hstruct amdgpu_bo **bo_ptrh](j)}(hjh]hstruct}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jhc.amdgpu_bo_create_kernelasbuh1hhjjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjjubj)}(hbo_ptrh]hbo_ptr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(h u64 *gpu_addrh](h)}(hhh]j)}(hu64h]hu64}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jhc.amdgpu_bo_create_kernelasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hgpu_addrh]hgpu_addr}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(hvoid **cpu_addrh](jt)}(hvoidh]hvoid}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj<ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(hjh]h*}(hj\hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj<ubj)}(hjh]h*}(hjihhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj<ubj)}(hcpu_addrh]hcpu_addr}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMBubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhMBubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMBhjhhubj[)}(hhh]h)}(hcreate BO for kernel useh]hcreate BO for kernel use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMBhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhMBubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu device object ``unsigned long size`` size for the new BO ``int align`` alignment for the new BO ``u32 domain`` where to place it ``struct amdgpu_bo **bo_ptr`` used to initialize BOs in structures ``u64 *gpu_addr`` GPU addr of the pinned BO ``void **cpu_addr`` optional CPU address mapping **Description** Allocates and pins a BO for kernel internal use. This function is exported to allow the V4L2 isp device external to drm device to create and access the kernel BO. **Note** For bo_ptr new BO is only created if bo_ptr points to NULL. **Return** 0 on success, negative error code otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMFhjubj )}(hhh](j)}(h4``struct amdgpu_device *adev`` amdgpu device object h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMDhjubj$)}(hhh]h)}(hamdgpu device objecth]hamdgpu device object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMDhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMDhjubj)}(h+``unsigned long size`` size for the new BO h](j)}(h``unsigned long size``h]j:)}(hjh]hunsigned long size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMEhjubj$)}(hhh]h)}(hsize for the new BOh]hsize for the new BO}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMEhj0ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj/hMEhjubj)}(h'``int align`` alignment for the new BO h](j)}(h ``int align``h]j:)}(hjSh]h int align}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjQubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMFhjMubj$)}(hhh]h)}(halignment for the new BOh]halignment for the new BO}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMFhjiubah}(h]h ]h"]h$]h&]uh1j#hjMubeh}(h]h ]h"]h$]h&]uh1j hjhhMFhjubj)}(h!``u32 domain`` where to place it h](j)}(h``u32 domain``h]j:)}(hjh]h u32 domain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMGhjubj$)}(hhh]h)}(hwhere to place ith]hwhere to place it}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMGhjubj)}(hC``struct amdgpu_bo **bo_ptr`` used to initialize BOs in structures h](j)}(h``struct amdgpu_bo **bo_ptr``h]j:)}(hjh]hstruct amdgpu_bo **bo_ptr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMHhjubj$)}(hhh]h)}(h$used to initialize BOs in structuresh]h$used to initialize BOs in structures}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMHhjubj)}(h,``u64 *gpu_addr`` GPU addr of the pinned BO h](j)}(h``u64 *gpu_addr``h]j:)}(hjh]h u64 *gpu_addr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMIhjubj$)}(hhh]h)}(hGPU addr of the pinned BOh]hGPU addr of the pinned BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMIhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMIhjubj)}(h1``void **cpu_addr`` optional CPU address mapping h](j)}(h``void **cpu_addr``h]j:)}(hj7h]hvoid **cpu_addr}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj5ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMJhj1ubj$)}(hhh]h)}(hoptional CPU address mappingh]hoptional CPU address mapping}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhMJhjMubah}(h]h ]h"]h$]h&]uh1j#hj1ubeh}(h]h ]h"]h$]h&]uh1j hjLhMJhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjrh]h Description}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMLhjubh)}(h0Allocates and pins a BO for kernel internal use.h]h0Allocates and pins a BO for kernel internal use.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMKhjubh)}(hqThis function is exported to allow the V4L2 isp device external to drm device to create and access the kernel BO.h]hqThis function is exported to allow the V4L2 isp device external to drm device to create and access the kernel BO.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMMhjubh)}(h**Note**h]j)}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMPhjubh)}(h;For bo_ptr new BO is only created if bo_ptr points to NULL.h]h;For bo_ptr new BO is only created if bo_ptr points to NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMQhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMShjubh)}(h,0 on success, negative error code otherwise.h]h,0 on success, negative error code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMShjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^&amdgpu_bo_create_isp_user (C function)c.amdgpu_bo_create_isp_userhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hint amdgpu_bo_create_isp_user (struct amdgpu_device *adev, struct dma_buf *dma_buf, u32 domain, struct amdgpu_bo **bo, u64 *gpu_addr)h]jn)}(hint amdgpu_bo_create_isp_user(struct amdgpu_device *adev, struct dma_buf *dma_buf, u32 domain, struct amdgpu_bo **bo, u64 *gpu_addr)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj"hMjubj)}(hamdgpu_bo_create_isp_userh]j)}(hamdgpu_bo_create_isp_userh]hamdgpu_bo_create_isp_user}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj"hMjubj)}(hg(struct amdgpu_device *adev, struct dma_buf *dma_buf, u32 domain, struct amdgpu_bo **bo, u64 *gpu_addr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjqmodnameN classnameNjj)}j]j)}jj7sbc.amdgpu_bo_create_isp_userasbuh1hhjMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjMubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubj)}(hstruct dma_buf *dma_bufh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdma_bufh]hdma_buf}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_bo_create_isp_userasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hdma_bufh]hdma_buf}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubj)}(h u32 domainh](h)}(hhh]j)}(hu32h]hu32}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj8modnameN classnameNjj)}j]jc.amdgpu_bo_create_isp_userasbuh1hhj/ubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(hdomainh]hdomain}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubj)}(hstruct amdgpu_bo **boh](j)}(hjh]hstruct}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_bo_create_isp_userasbuh1hhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjwubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjwubj)}(hboh]hbo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubj)}(h u64 *gpu_addrh](h)}(hhh]j)}(hu64h]hu64}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_bo_create_isp_userasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj'hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hgpu_addrh]hgpu_addr}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj"hMjubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj hhhj"hMjubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj"hMjhj hhubj[)}(hhh]h)}(hcreate user BO for isph]hcreate user BO for isp}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMjhj[hhubah}(h]h ]h"]h$]h&]uh1jZhj hhhj"hMjubeh}(h]h ](j4functioneh"]h$]h&]jj4jjvjjvjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu device object ``struct dma_buf *dma_buf`` DMABUF handle for isp buffer ``u32 domain`` where to place it ``struct amdgpu_bo **bo`` used to initialize BOs in structures ``u64 *gpu_addr`` GPU addr of the pinned BO **Description** Imports isp DMABUF to allocate and pin a user BO for isp internal use. It does GART alloc to generate gpu_addr for BO to make it accessible through the GART aperture for ISP HW. This function is exported to allow the V4L2 isp device external to drm device to create and access the isp user BO. **Return** 0 on success, negative error code otherwise.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMnhjzubj )}(hhh](j)}(h4``struct amdgpu_device *adev`` amdgpu device object h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMlhjubj$)}(hhh]h)}(hamdgpu device objecth]hamdgpu device object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMlhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMlhjubj)}(h9``struct dma_buf *dma_buf`` DMABUF handle for isp buffer h](j)}(h``struct dma_buf *dma_buf``h]j:)}(hjh]hstruct dma_buf *dma_buf}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMmhjubj$)}(hhh]h)}(hDMABUF handle for isp bufferh]hDMABUF handle for isp buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMmhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMmhjubj)}(h!``u32 domain`` where to place it h](j)}(h``u32 domain``h]j:)}(hjh]h u32 domain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMnhj ubj$)}(hhh]h)}(hwhere to place ith]hwhere to place it}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMnhj'ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj&hMnhjubj)}(h?``struct amdgpu_bo **bo`` used to initialize BOs in structures h](j)}(h``struct amdgpu_bo **bo``h]j:)}(hjJh]hstruct amdgpu_bo **bo}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjHubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMohjDubj$)}(hhh]h)}(h$used to initialize BOs in structuresh]h$used to initialize BOs in structures}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMohj`ubah}(h]h ]h"]h$]h&]uh1j#hjDubeh}(h]h ]h"]h$]h&]uh1j hj_hMohjubj)}(h,``u64 *gpu_addr`` GPU addr of the pinned BO h](j)}(h``u64 *gpu_addr``h]j:)}(hjh]h u64 *gpu_addr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMphj}ubj$)}(hhh]h)}(hGPU addr of the pinned BOh]hGPU addr of the pinned BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1j#hj}ubeh}(h]h ]h"]h$]h&]uh1j hjhMphjubeh}(h]h ]h"]h$]h&]uh1jhjzubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMrhjzubh)}(hImports isp DMABUF to allocate and pin a user BO for isp internal use. It does GART alloc to generate gpu_addr for BO to make it accessible through the GART aperture for ISP HW.h]hImports isp DMABUF to allocate and pin a user BO for isp internal use. It does GART alloc to generate gpu_addr for BO to make it accessible through the GART aperture for ISP HW.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMqhjzubh)}(hsThis function is exported to allow the V4L2 isp device external to drm device to create and access the isp user BO.h]hsThis function is exported to allow the V4L2 isp device external to drm device to create and access the isp user BO.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMuhjzubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMxhjzubh)}(h,0 on success, negative error code otherwise.h]h,0 on success, negative error code otherwise.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMyhjzubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^'amdgpu_bo_create_kernel_at (C function)c.amdgpu_bo_create_kernel_athNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hint amdgpu_bo_create_kernel_at (struct amdgpu_device *adev, uint64_t offset, uint64_t size, struct amdgpu_bo **bo_ptr, void **cpu_addr)h]jn)}(hint amdgpu_bo_create_kernel_at(struct amdgpu_device *adev, uint64_t offset, uint64_t size, struct amdgpu_bo **bo_ptr, void **cpu_addr)h](jt)}(hinth]hint}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj5hhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhjGhMubj)}(hamdgpu_bo_create_kernel_ath]j)}(hamdgpu_bo_create_kernel_ath]hamdgpu_bo_create_kernel_at}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5hhhjGhMubj)}(hh(struct amdgpu_device *adev, uint64_t offset, uint64_t size, struct amdgpu_bo **bo_ptr, void **cpu_addr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jj\sbc.amdgpu_bo_create_kernel_atasbuh1hhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjrubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjnubj)}(huint64_t offseth](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_bo_create_kernel_atasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjnubj)}(h uint64_t sizeh](h)}(hhh]j)}(huint64_th]huint64_t}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj5modnameN classnameNjj)}j]jc.amdgpu_bo_create_kernel_atasbuh1hhj,ubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hsizeh]hsize}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjnubj)}(hstruct amdgpu_bo **bo_ptrh](j)}(hjh]hstruct}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_bo_create_kernel_atasbuh1hhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjtubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjtubj)}(hbo_ptrh]hbo_ptr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjnubj)}(hvoid **cpu_addrh](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hcpu_addrh]hcpu_addr}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjnubeh}(h]h ]h"]h$]h&]jjuh1jhj5hhhjGhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj1hhhjGhMubah}(h]j,ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjGhMhj.hhubj[)}(hhh]h)}(h-create BO for kernel use at specific locationh]h-create BO for kernel use at specific location}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjRhhubah}(h]h ]h"]h$]h&]uh1jZhj.hhhjGhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjmjjmjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu device object ``uint64_t offset`` offset of the BO ``uint64_t size`` size of the BO ``struct amdgpu_bo **bo_ptr`` used to initialize BOs in structures ``void **cpu_addr`` optional CPU address mapping **Description** Creates a kernel BO at a specific offset in VRAM. **Return** 0 on success, negative error code otherwise.h](h)}(h**Parameters**h]j)}(hjwh]h Parameters}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjqubj )}(hhh](j)}(h4``struct amdgpu_device *adev`` amdgpu device object h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubj$)}(hhh]h)}(hamdgpu device objecth]hamdgpu device object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(h%``uint64_t offset`` offset of the BO h](j)}(h``uint64_t offset``h]j:)}(hjh]huint64_t offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubj$)}(hhh]h)}(hoffset of the BOh]hoffset of the BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(h!``uint64_t size`` size of the BO h](j)}(h``uint64_t size``h]j:)}(hjh]h uint64_t size}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubj$)}(hhh]h)}(hsize of the BOh]hsize of the BO}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(hC``struct amdgpu_bo **bo_ptr`` used to initialize BOs in structures h](j)}(h``struct amdgpu_bo **bo_ptr``h]j:)}(hjAh]hstruct amdgpu_bo **bo_ptr}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj?ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj;ubj$)}(hhh]h)}(h$used to initialize BOs in structuresh]h$used to initialize BOs in structures}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhMhjWubah}(h]h ]h"]h$]h&]uh1j#hj;ubeh}(h]h ]h"]h$]h&]uh1j hjVhMhjubj)}(h1``void **cpu_addr`` optional CPU address mapping h](j)}(h``void **cpu_addr``h]j:)}(hjzh]hvoid **cpu_addr}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjxubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjtubj$)}(hhh]h)}(hoptional CPU address mappingh]hoptional CPU address mapping}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjtubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubeh}(h]h ]h"]h$]h&]uh1jhjqubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjqubh)}(h1Creates a kernel BO at a specific offset in VRAM.h]h1Creates a kernel BO at a specific offset in VRAM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjqubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjqubh)}(h,0 on success, negative error code otherwise.h]h,0 on success, negative error code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjqubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^"amdgpu_bo_free_kernel (C function)c.amdgpu_bo_free_kernelhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hRvoid amdgpu_bo_free_kernel (struct amdgpu_bo **bo, u64 *gpu_addr, void **cpu_addr)h]jn)}(hQvoid amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr, void **cpu_addr)h](jt)}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj/hMubj)}(hamdgpu_bo_free_kernelh]j)}(hamdgpu_bo_free_kernelh]hamdgpu_bo_free_kernel}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj/hMubj)}(h7(struct amdgpu_bo **bo, u64 *gpu_addr, void **cpu_addr)h](j)}(hstruct amdgpu_bo **boh](j)}(hjh]hstruct}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj~modnameN classnameNjj)}j]j)}jjDsbc.amdgpu_bo_free_kernelasbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjZubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjZubj)}(hboh]hbo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(h u64 *gpu_addrh](h)}(hhh]j)}(hu64h]hu64}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_bo_free_kernelasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hgpu_addrh]hgpu_addr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(hvoid **cpu_addrh](jt)}(hvoidh]hvoid}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj.ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(hjh]h*}(hjNhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj.ubj)}(hjh]h*}(hj[hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj.ubj)}(hcpu_addrh]hcpu_addr}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj/hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhj/hMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj/hMhjhhubj[)}(hhh]h)}(hfree BO for kernel useh]hfree BO for kernel use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj/hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_bo **bo`` amdgpu BO to free ``u64 *gpu_addr`` pointer to where the BO's GPU memory space address was stored ``void **cpu_addr`` pointer to where the BO's CPU memory space address was stored **Description** unmaps and unpin a BO for kernel internal use. This function is exported to allow the V4L2 isp device external to drm device to free the kernel BO.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubj )}(hhh](j)}(h,``struct amdgpu_bo **bo`` amdgpu BO to free h](j)}(h``struct amdgpu_bo **bo``h]j:)}(hjh]hstruct amdgpu_bo **bo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubj$)}(hhh]h)}(hamdgpu BO to freeh]hamdgpu BO to free}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(hP``u64 *gpu_addr`` pointer to where the BO's GPU memory space address was stored h](j)}(h``u64 *gpu_addr``h]j:)}(hj h]h u64 *gpu_addr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubj$)}(hhh]h)}(h=pointer to where the BO's GPU memory space address was storedh]h?pointer to where the BO’s GPU memory space address was stored}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj!hMhjubj)}(hR``void **cpu_addr`` pointer to where the BO's CPU memory space address was stored h](j)}(h``void **cpu_addr``h]j:)}(hjEh]hvoid **cpu_addr}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjCubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj?ubj$)}(hhh]h)}(h=pointer to where the BO's CPU memory space address was storedh]h?pointer to where the BO’s CPU memory space address was stored}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j#hj?ubeh}(h]h ]h"]h$]h&]uh1j hjZhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubh)}(h.unmaps and unpin a BO for kernel internal use.h]h.unmaps and unpin a BO for kernel internal use.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubh)}(hdThis function is exported to allow the V4L2 isp device external to drm device to free the kernel BO.h]hdThis function is exported to allow the V4L2 isp device external to drm device to free the kernel BO.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^$amdgpu_bo_free_isp_user (C function)c.amdgpu_bo_free_isp_userhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(h3void amdgpu_bo_free_isp_user (struct amdgpu_bo *bo)h]jn)}(h2void amdgpu_bo_free_isp_user(struct amdgpu_bo *bo)h](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hamdgpu_bo_free_isp_userh]j)}(hamdgpu_bo_free_isp_userh]hamdgpu_bo_free_isp_user}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct amdgpu_bo *bo)h]j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hj/ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj, ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj1 modnameN classnameNjj)}j]j)}jjsbc.amdgpu_bo_free_isp_userasbuh1hhj ubj)}(h h]h }(hjO hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj] hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hboh]hbo}(hjj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMhjhhubj[)}(hhh]h)}(hfree BO for isp useh]hfree BO for isp use}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj hhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj jj jjjuh1jbhhhj hNhNubj)}(h**Parameters** ``struct amdgpu_bo *bo`` amdgpu isp user BO to free **Description** unpin and unref BO for isp internal use. This function is exported to allow the V4L2 isp device external to drm device to free the isp user BO.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj ubj )}(hhh]j)}(h4``struct amdgpu_bo *bo`` amdgpu isp user BO to free h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hj h]hstruct amdgpu_bo *bo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj ubj$)}(hhh]h)}(hamdgpu isp user BO to freeh]hamdgpu isp user BO to free}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj ubh)}(h(unpin and unref BO for isp internal use.h]h(unpin and unref BO for isp internal use.}(hj&!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj ubh)}(hfThis function is exported to allow the V4L2 isp device external to drm device to free the isp user BO.h]hfThis function is exported to allow the V4L2 isp device external to drm device to free the isp user BO.}(hj5!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_bo_create (C function)c.amdgpu_bo_createhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hhint amdgpu_bo_create (struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo **bo_ptr)h]jn)}(hgint amdgpu_bo_create(struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo **bo_ptr)h](jt)}(hinth]hint}(hjd!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj`!hhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMlubj)}(h h]h }(hjs!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`!hhhjr!hMlubj)}(hamdgpu_bo_createh]j)}(hamdgpu_bo_createh]hamdgpu_bo_create}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj`!hhhjr!hMlubj)}(hS(struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo **bo_ptr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj!modnameN classnameNjj)}j]j)}jj!sbc.amdgpu_bo_createasbuh1hhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(hjh]h*}(hj!hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj!ubj)}(hadevh]hadev}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubj)}(hstruct amdgpu_bo_param *bph](j)}(hjh]hstruct}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hj "hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubh)}(hhh]j)}(hamdgpu_bo_paramh]hamdgpu_bo_param}(hj1"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj."ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj3"modnameN classnameNjj)}j]j!c.amdgpu_bo_createasbuh1hhj"ubj)}(h h]h }(hjO"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(hjh]h*}(hj]"hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj"ubj)}(hbph]hbp}(hjj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubj)}(hstruct amdgpu_bo **bo_ptrh](j)}(hjh]hstruct}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj"modnameN classnameNjj)}j]j!c.amdgpu_bo_createasbuh1hhj"ubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(hjh]h*}(hj"hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj"ubj)}(hjh]h*}(hj"hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj"ubj)}(hbo_ptrh]hbo_ptr}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubeh}(h]h ]h"]h$]h&]jjuh1jhj`!hhhjr!hMlubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj\!hhhjr!hMlubah}(h]jW!ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjr!hMlhjY!hhubj[)}(hhh]h)}(h+create an :c:type:`amdgpu_bo` buffer objecth](h create an }(hj#hhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hj#h]h amdgpu_bo}(hj#hhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hj#ubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjj)}j]j!c.amdgpu_bo_createasbj amdgpu_bouh1hhjhKUhj#ubh buffer object}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMlhj#hhubah}(h]h ]h"]h$]h&]uh1jZhjY!hhhjr!hMlubeh}(h]h ](j4functioneh"]h$]h&]jj4jjQ#jjQ#jjjuh1jbhhhj hNhNubj)}(hXY**Parameters** ``struct amdgpu_device *adev`` amdgpu device object ``struct amdgpu_bo_param *bp`` parameters to be used for the buffer object ``struct amdgpu_bo **bo_ptr`` pointer to the buffer object pointer **Description** Creates an :c:type:`amdgpu_bo` buffer object. **Return** 0 for success or a negative error code on failure.h](h)}(h**Parameters**h]j)}(hj[#h]h Parameters}(hj]#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjY#ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMphjU#ubj )}(hhh](j)}(h4``struct amdgpu_device *adev`` amdgpu device object h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjz#h]hstruct amdgpu_device *adev}(hj|#hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjx#ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMmhjt#ubj$)}(hhh]h)}(hamdgpu device objecth]hamdgpu device object}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMmhj#ubah}(h]h ]h"]h$]h&]uh1j#hjt#ubeh}(h]h ]h"]h$]h&]uh1j hj#hMmhjq#ubj)}(hK``struct amdgpu_bo_param *bp`` parameters to be used for the buffer object h](j)}(h``struct amdgpu_bo_param *bp``h]j:)}(hj#h]hstruct amdgpu_bo_param *bp}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj#ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMnhj#ubj$)}(hhh]h)}(h+parameters to be used for the buffer objecth]h+parameters to be used for the buffer object}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMnhj#ubah}(h]h ]h"]h$]h&]uh1j#hj#ubeh}(h]h ]h"]h$]h&]uh1j hj#hMnhjq#ubj)}(hC``struct amdgpu_bo **bo_ptr`` pointer to the buffer object pointer h](j)}(h``struct amdgpu_bo **bo_ptr``h]j:)}(hj#h]hstruct amdgpu_bo **bo_ptr}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj#ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMohj#ubj$)}(hhh]h)}(h$pointer to the buffer object pointerh]h$pointer to the buffer object pointer}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMohj$ubah}(h]h ]h"]h$]h&]uh1j#hj#ubeh}(h]h ]h"]h$]h&]uh1j hj$hMohjq#ubeh}(h]h ]h"]h$]h&]uh1jhjU#ubh)}(h**Description**h]j)}(hj'$h]h Description}(hj)$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%$ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMqhjU#ubh)}(h-Creates an :c:type:`amdgpu_bo` buffer object.h](h Creates an }(hj=$hhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hjG$h]h amdgpu_bo}(hjI$hhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hjE$ubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjjCj amdgpu_bouh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMphj=$ubh buffer object.}(hj=$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjd$hMphjU#ubh)}(h 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]jah"]h$]h&]uh1jshj$hhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhj$hMubj)}(hamdgpu_bo_create_userh]j)}(hamdgpu_bo_create_userh]hamdgpu_bo_create_user}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$hhhj$hMubj)}(hY(struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo_user **ubo_ptr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj%modnameN classnameNjj)}j]j)}jj$sbc.amdgpu_bo_create_userasbuh1hhj$ubj)}(h h]h }(hj1%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(hjh]h*}(hj?%hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj$ubj)}(hadevh]hadev}(hjL%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h 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]jah"]h$]h&]uh1jhj%ubj)}(hjh]h*}(hj&hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj%ubj)}(hjh]h*}(hj,&hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj%ubj)}(hubo_ptrh]hubo_ptr}(hj9&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubeh}(h]h ]h"]h$]h&]jjuh1jhj$hhhj$hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj$hhhj$hMubah}(h]j$ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj$hMhj$hhubj[)}(hhh]h)}(h0create an :c:type:`amdgpu_bo_user` buffer objecth](h create an }(hjc&hhhNhNubh)}(h:c:type:`amdgpu_bo_user`h]j:)}(hjm&h]hamdgpu_bo_user}(hjo&hhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hjk&ubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjj)}j]j-%c.amdgpu_bo_create_userasbjamdgpu_bo_useruh1hhjhKUhjc&ubh buffer object}(hjc&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj`&hhubah}(h]h ]h"]h$]h&]uh1jZhj$hhhj$hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj&jj&jjjuh1jbhhhj hNhNubj)}(hX]**Parameters** ``struct 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buffer object pointerh]h$pointer to the buffer object pointer}(hjW'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjS'hMhjT'ubah}(h]h ]h"]h$]h&]uh1j#hj8'ubeh}(h]h ]h"]h$]h&]uh1j hjS'hMhj&ubeh}(h]h ]h"]h$]h&]uh1jhj&ubh)}(h**Description**h]j)}(hjy'h]h Description}(hj{'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjw'ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj&ubh)}(h+Create a BO to be used by user application;h]h+Create a BO to be used by user application;}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj&ubh)}(h **Return**h]j)}(hj'h]hReturn}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj&ubh)}(h20 for success or a negative error code on failure.h]h20 for success or a negative error code on failure.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^ amdgpu_bo_create_vm (C function)c.amdgpu_bo_create_vmhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hpint amdgpu_bo_create_vm (struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo_vm **vmbo_ptr)h]jn)}(hoint amdgpu_bo_create_vm(struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo_vm **vmbo_ptr)h](jt)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj'hhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhj'hMubj)}(hamdgpu_bo_create_vmh]j)}(hamdgpu_bo_create_vmh]hamdgpu_bo_create_vm}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj'hhhj'hMubj)}(hX(struct amdgpu_device *adev, struct amdgpu_bo_param *bp, struct amdgpu_bo_vm **vmbo_ptr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj"(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(h h]h }(hj/(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj@(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=(ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjB(modnameN classnameNjj)}j]j)}jj(sbc.amdgpu_bo_create_vmasbuh1hhj(ubj)}(h h]h }(hj`(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(hjh]h*}(hjn(hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj(ubj)}(hadevh]hadev}(hj{(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj(ubj)}(hstruct amdgpu_bo_param *bph](j)}(hjh]hstruct}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubh)}(hhh]j)}(hamdgpu_bo_paramh]hamdgpu_bo_param}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj(modnameN classnameNjj)}j]j\(c.amdgpu_bo_create_vmasbuh1hhj(ubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(hjh]h*}(hj(hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj(ubj)}(hbph]hbp}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj(ubj)}(hstruct amdgpu_bo_vm **vmbo_ptrh](j)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubh)}(hhh]j)}(h amdgpu_bo_vmh]h amdgpu_bo_vm}(hj")hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj$)modnameN classnameNjj)}j]j\(c.amdgpu_bo_create_vmasbuh1hhj)ubj)}(h h]h }(hj@)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(hjh]h*}(hjN)hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj)ubj)}(hjh]h*}(hj[)hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj)ubj)}(hvmbo_ptrh]hvmbo_ptr}(hjh)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj(ubeh}(h]h ]h"]h$]h&]jjuh1jhj'hhhj'hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj'hhhj'hMubah}(h]j'ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj'hMhj'hhubj[)}(hhh]h)}(h.create an :c:type:`amdgpu_bo_vm` buffer objecth](h create an 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Used via GEM ioctl.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjJCubh)}(h **Return**h]j)}(hjDh]hReturn}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjJCubh)}(h20 for success or a negative error code on failure.h]h20 for success or a negative error code on failure.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjJCubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_bo_get_metadata (C function)c.amdgpu_bo_get_metadatahNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(h}int amdgpu_bo_get_metadata (struct amdgpu_bo *bo, void *buffer, size_t buffer_size, uint32_t *metadata_size, uint64_t *flags)h]jn)}(h|int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer, size_t buffer_size, uint32_t *metadata_size, uint64_t *flags)h](jt)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjDhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhjDhMubj)}(hamdgpu_bo_get_metadatah]j)}(hamdgpu_bo_get_metadatah]hamdgpu_bo_get_metadata}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ](jjeh"]h$]h&]jjuh1jhjDhhhjDhMubj)}(hb(struct amdgpu_bo *bo, void *buffer, size_t buffer_size, uint32_t *metadata_size, uint64_t *flags)h](j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hj*EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hj;EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8Eubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj=EmodnameN classnameNjj)}j]j)}jjEsbc.amdgpu_bo_get_metadataasbuh1hhjEubj)}(h h]h }(hj[EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hjh]h*}(hjiEhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjEubj)}(hboh]hbo}(hjvEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubj)}(h void *bufferh](jt)}(hvoidh]hvoid}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjEubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hjh]h*}(hjEhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjEubj)}(hbufferh]hbuffer}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubj)}(hsize_t buffer_sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjEmodnameN classnameNjj)}j]jWEc.amdgpu_bo_get_metadataasbuh1hhjEubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h buffer_sizeh]h buffer_size}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubj)}(huint32_t *metadata_sizeh](h)}(hhh]j)}(huint32_th]huint32_t}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjFmodnameN classnameNjj)}j]jWEc.amdgpu_bo_get_metadataasbuh1hhjFubj)}(h h]h }(hj:FhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(hjh]h*}(hjHFhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjFubj)}(h metadata_sizeh]h metadata_size}(hjUFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubj)}(huint64_t *flagsh](h)}(hhh]j)}(huint64_th]huint64_t}(hjqFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnFubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjsFmodnameN classnameNjj)}j]jWEc.amdgpu_bo_get_metadataasbuh1hhjjFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjFubj)}(hjh]h*}(hjFhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjjFubj)}(hflagsh]hflags}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubeh}(h]h ]h"]h$]h&]jjuh1jhjDhhhjDhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjDhhhjDhMubah}(h]jDah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjDhMhjDhhubj[)}(hhh]h)}(h get metadatah]h get metadata}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjFhhubah}(h]h ]h"]h$]h&]uh1jZhjDhhhjDhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjFjjFjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_bo *bo`` :c:type:`amdgpu_bo` buffer object ``void *buffer`` returned metadata ``size_t buffer_size`` size of the buffer ``uint32_t *metadata_size`` size of the returned metadata ``uint64_t *flags`` flags of the returned metadata **Description** Gets buffer object's metadata, its size and flags. buffer_size shall not be less than metadata_size. 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Used via GEM ioctl.h]hzGets buffer object’s metadata, its size and flags. buffer_size shall not be less than metadata_size. Used via GEM ioctl.}(hjiHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjFubh)}(h **Return**h]j)}(hjzHh]hReturn}(hj|HhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjxHubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjFubh)}(h20 for success or a negative error code on failure.h]h20 for success or a negative error code on failure.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjFubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^"amdgpu_bo_move_notify (C function)c.amdgpu_bo_move_notifyhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hcvoid amdgpu_bo_move_notify (struct ttm_buffer_object *bo, bool evict, struct ttm_resource *new_mem)h]jn)}(hbvoid amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict, struct ttm_resource *new_mem)h](jt)}(hvoidh]hvoid}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjHhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjHhMubj)}(hamdgpu_bo_move_notifyh]j)}(hamdgpu_bo_move_notifyh]hamdgpu_bo_move_notify}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ](jjeh"]h$]h&]jjuh1jhjHhhhjHhMubj)}(hH(struct ttm_buffer_object *bo, bool evict, struct ttm_resource *new_mem)h](j)}(hstruct ttm_buffer_object *boh](j)}(hjh]hstruct}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hj IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(httm_buffer_objecth]httm_buffer_object}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjImodnameN classnameNjj)}j]j)}jjHsbc.amdgpu_bo_move_notifyasbuh1hhjHubj)}(h h]h }(hj:IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hjh]h*}(hjHIhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjHubj)}(hboh]hbo}(hjUIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjHubj)}(h bool evicth](jt)}(hjwh]hbool}(hjnIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjjIubj)}(h h]h }(hj{IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjIubj)}(hevicth]hevict}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjHubj)}(hstruct ttm_resource *new_memh](j)}(hjh]hstruct}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubh)}(hhh]j)}(h ttm_resourceh]h ttm_resource}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjImodnameN classnameNjj)}j]j6Ic.amdgpu_bo_move_notifyasbuh1hhjIubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(hjh]h*}(hjIhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjIubj)}(hnew_memh]hnew_mem}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjHubeh}(h]h ]h"]h$]h&]jjuh1jhjHhhhjHhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjHhhhjHhMubah}(h]jHah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjHhMhjHhhubj[)}(hhh]h)}(h notification about a memory moveh]h notification about a memory move}(hj#JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj Jhhubah}(h]h ]h"]h$]h&]uh1jZhjHhhhjHhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj;Jjj;Jjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct ttm_buffer_object *bo`` pointer to a buffer object ``bool evict`` if this move is evicting the buffer from the graphics address space ``struct ttm_resource *new_mem`` new resource for backing the BO **Description** Marks the corresponding :c:type:`amdgpu_bo` buffer object as invalid, also performs bookkeeping. TTM driver callback which is called when ttm moves a buffer.h](h)}(h**Parameters**h]j)}(hjEJh]h Parameters}(hjGJhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjCJubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj?Jubj )}(hhh](j)}(h<``struct ttm_buffer_object *bo`` pointer to a buffer object h](j)}(h ``struct ttm_buffer_object *bo``h]j:)}(hjdJh]hstruct ttm_buffer_object *bo}(hjfJhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjbJubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj^Jubj$)}(hhh]h)}(hpointer to a buffer objecth]hpointer to a buffer object}(hj}JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyJhMhjzJubah}(h]h ]h"]h$]h&]uh1j#hj^Jubeh}(h]h ]h"]h$]h&]uh1j hjyJhMhj[Jubj)}(hS``bool evict`` if this move is evicting the buffer from the graphics address space h](j)}(h``bool evict``h]j:)}(hjJh]h bool evict}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjJubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjJubj$)}(hhh]h)}(hCif this move is evicting the buffer from the graphics address spaceh]hCif this move is evicting the buffer from the graphics address space}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjJubah}(h]h ]h"]h$]h&]uh1j#hjJubeh}(h]h ]h"]h$]h&]uh1j hjJhMhj[Jubj)}(hA``struct ttm_resource *new_mem`` new resource for backing the BO h](j)}(h ``struct ttm_resource *new_mem``h]j:)}(hjJh]hstruct ttm_resource *new_mem}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjJubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjJubj$)}(hhh]h)}(hnew resource for backing the BOh]hnew resource for backing the BO}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjJubah}(h]h ]h"]h$]h&]uh1j#hjJubeh}(h]h ]h"]h$]h&]uh1j hjJhMhj[Jubeh}(h]h ]h"]h$]h&]uh1jhj?Jubh)}(h**Description**h]j)}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj?Jubh)}(hMarks the corresponding :c:type:`amdgpu_bo` buffer object as invalid, also performs bookkeeping. TTM driver callback which is called when ttm moves a buffer.h](hMarks the corresponding }(hj'KhhhNhNubh)}(h:c:type:`amdgpu_bo`h]j:)}(hj1Kh]h amdgpu_bo}(hj3KhhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hj/Kubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjjCj amdgpu_bouh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj'Kubhr buffer object as invalid, also performs bookkeeping. TTM driver callback which is called when ttm moves a buffer.}(hj'KhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNKhMhj?Jubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^%amdgpu_bo_release_notify (C function)c.amdgpu_bo_release_notifyhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hOhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjNubj)}(hboh]hbo}(hjKOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjNubj)}(hstruct dma_fence *fenceh](j)}(hjh]hstruct}(hjdOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Oubj)}(h h]h }(hjqOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Oubh)}(hhh]j)}(h dma_fenceh]h dma_fence}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjOmodnameN classnameNjj)}j]j,Oc.amdgpu_bo_fenceasbuh1hhj`Oubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Oubj)}(hjh]h*}(hjOhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj`Oubj)}(hfenceh]hfence}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Oubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjNubj)}(h bool sharedh](jt)}(hjwh]hbool}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjOubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(hsharedh]hshared}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjNubeh}(h]h ]h"]h$]h&]jjuh1jhjNhhhjNhM{ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjNhhhjNhM{ubah}(h]jNah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjNhM{hjNhhubj[)}(hhh]h)}(hadd fence to buffer objecth]hadd fence to buffer object}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM{hjPhhubah}(h]h ]h"]h$]h&]uh1jZhjNhhhjNhM{ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj1Pjj1Pjjjuh1jbhhhj hNhNubj)}(h**Parameters** ``struct amdgpu_bo *bo`` buffer object in question ``struct dma_fence *fence`` fence to add ``bool shared`` true if fence should be added sharedh](h)}(h**Parameters**h]j)}(hj;Ph]h Parameters}(hj=PhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9Pubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj5Pubj )}(hhh](j)}(h3``struct amdgpu_bo *bo`` buffer object in question h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hjZPh]hstruct amdgpu_bo *bo}(hj\PhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjXPubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM}hjTPubj$)}(hhh]h)}(hbuffer object in questionh]hbuffer object in question}(hjsPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjoPhM}hjpPubah}(h]h ]h"]h$]h&]uh1j#hjTPubeh}(h]h ]h"]h$]h&]uh1j hjoPhM}hjQPubj)}(h)``struct dma_fence *fence`` fence to add h](j)}(h``struct dma_fence *fence``h]j:)}(hjPh]hstruct dma_fence *fence}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjPubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM~hjPubj$)}(hhh]h)}(h fence to addh]h fence to add}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhM~hjPubah}(h]h ]h"]h$]h&]uh1j#hjPubeh}(h]h ]h"]h$]h&]uh1j hjPhM~hjQPubj)}(h4``bool shared`` true if fence should be added sharedh](j)}(h``bool shared``h]j:)}(hjPh]h bool shared}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjPubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjPubj$)}(hhh]h)}(h$true if fence should be added sharedh]h$true if fence should be added shared}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjPubah}(h]h ]h"]h$]h&]uh1j#hjPubeh}(h]h ]h"]h$]h&]uh1j hjPhMhjQPubeh}(h]h ]h"]h$]h&]uh1jhj5Pubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^%amdgpu_bo_sync_wait_resv (C function)c.amdgpu_bo_sync_wait_resvhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hint amdgpu_bo_sync_wait_resv (struct amdgpu_device *adev, struct dma_resv *resv, enum amdgpu_sync_mode sync_mode, void *owner, bool intr)h]jn)}(hint amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv, enum amdgpu_sync_mode sync_mode, void *owner, bool intr)h](jt)}(hinth]hint}(hj&QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj"Qhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hj5QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"Qhhhj4QhMubj)}(hamdgpu_bo_sync_wait_resvh]j)}(hamdgpu_bo_sync_wait_resvh]hamdgpu_bo_sync_wait_resv}(hjGQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCQubah}(h]h ](jjeh"]h$]h&]jjuh1jhj"Qhhhj4QhMubj)}(hl(struct amdgpu_device *adev, struct dma_resv *resv, enum amdgpu_sync_mode sync_mode, void *owner, bool intr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjcQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_Qubj)}(h h]h }(hjpQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_Qubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~Qubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjQmodnameN classnameNjj)}j]j)}jjIQsbc.amdgpu_bo_sync_wait_resvasbuh1hhj_Qubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_Qubj)}(hjh]h*}(hjQhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj_Qubj)}(hadevh]hadev}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_Qubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[Qubj)}(hstruct dma_resv *resvh](j)}(hjh]hstruct}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubh)}(hhh]j)}(hdma_resvh]hdma_resv}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjQmodnameN classnameNjj)}j]jQc.amdgpu_bo_sync_wait_resvasbuh1hhjQubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(hjh]h*}(hjRhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjQubj)}(hresvh]hresv}(hj,RhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[Qubj)}(henum amdgpu_sync_mode sync_modeh](j)}(henumh]henum}(hjERhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjARubj)}(h h]h }(hjSRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjARubh)}(hhh]j)}(hamdgpu_sync_modeh]hamdgpu_sync_mode}(hjdRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaRubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjfRmodnameN classnameNjj)}j]jQc.amdgpu_bo_sync_wait_resvasbuh1hhjARubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjARubj)}(h sync_modeh]h sync_mode}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjARubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[Qubj)}(h void *ownerh](jt)}(hvoidh]hvoid}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjRubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(hjh]h*}(hjRhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjRubj)}(hownerh]howner}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[Qubj)}(h bool intrh](jt)}(hjwh]hbool}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjRubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(hintrh]hintr}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[Qubeh}(h]h ]h"]h$]h&]jjuh1jhj"Qhhhj4QhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjQhhhj4QhMubah}(h]jQah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj4QhMhjQhhubj[)}(hhh]h)}(hWait for BO reservation fencesh]hWait for BO reservation fences}(hj0ShhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj-Shhubah}(h]h ]h"]h$]h&]uh1jZhjQhhhj4QhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjHSjjHSjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``struct dma_resv *resv`` reservation object to sync to ``enum amdgpu_sync_mode sync_mode`` synchronization mode ``void *owner`` fence owner ``bool intr`` Whether the wait is interruptible **Description** Extract the fences from the reservation object and waits for them to finish. **Return** 0 on success, errno otherwise.h](h)}(h**Parameters**h]j)}(hjRSh]h Parameters}(hjTShhhNhNubah}(h]h ]h"]h$]h&]uh1jhjPSubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjLSubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjqSh]hstruct amdgpu_device *adev}(hjsShhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjoSubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjkSubj$)}(hhh]h)}(hamdgpu device pointerh]hamdgpu device pointer}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjSubah}(h]h ]h"]h$]h&]uh1j#hjkSubeh}(h]h ]h"]h$]h&]uh1j hjShMhjhSubj)}(h8``struct dma_resv *resv`` reservation object to sync to h](j)}(h``struct dma_resv *resv``h]j:)}(hjSh]hstruct dma_resv *resv}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjSubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjSubj$)}(hhh]h)}(hreservation object to sync toh]hreservation object to sync to}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjSubah}(h]h ]h"]h$]h&]uh1j#hjSubeh}(h]h ]h"]h$]h&]uh1j hjShMhjhSubj)}(h9``enum amdgpu_sync_mode sync_mode`` synchronization mode h](j)}(h#``enum amdgpu_sync_mode sync_mode``h]j:)}(hjSh]henum amdgpu_sync_mode sync_mode}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjSubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjSubj$)}(hhh]h)}(hsynchronization modeh]hsynchronization mode}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjSubah}(h]h ]h"]h$]h&]uh1j#hjSubeh}(h]h ]h"]h$]h&]uh1j hjShMhjhSubj)}(h``void *owner`` fence owner h](j)}(h``void *owner``h]j:)}(hjTh]h void *owner}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjTubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjTubj$)}(hhh]h)}(h fence ownerh]h fence owner}(hj5ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1ThMhj2Tubah}(h]h ]h"]h$]h&]uh1j#hjTubeh}(h]h ]h"]h$]h&]uh1j hj1ThMhjhSubj)}(h0``bool intr`` Whether the wait is interruptible h](j)}(h ``bool intr``h]j:)}(hjUTh]h bool intr}(hjWThhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjSTubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjOTubj$)}(hhh]h)}(h!Whether the wait is interruptibleh]h!Whether the wait is interruptible}(hjnThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjThMhjkTubah}(h]h ]h"]h$]h&]uh1j#hjOTubeh}(h]h ]h"]h$]h&]uh1j hjjThMhjhSubeh}(h]h ]h"]h$]h&]uh1jhjLSubh)}(h**Description**h]j)}(hjTh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjTubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjLSubh)}(hLExtract the fences from the reservation object and waits for them to finish.h]hLExtract the fences from the reservation object and waits for them to finish.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjLSubh)}(h **Return**h]j)}(hjTh]hReturn}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jhjTubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjLSubh)}(h0 on success, errno otherwise.h]h0 on success, errno otherwise.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjLSubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^ amdgpu_bo_sync_wait (C function)c.amdgpu_bo_sync_waithNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hFint amdgpu_bo_sync_wait (struct amdgpu_bo *bo, void *owner, bool intr)h]jn)}(hEint amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)h](jt)}(hinth]hint}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjThhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hj UhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhj UhMubj)}(hamdgpu_bo_sync_waith]j)}(hamdgpu_bo_sync_waith]hamdgpu_bo_sync_wait}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ](jjeh"]h$]h&]jjuh1jhjThhhj UhMubj)}(h.(struct amdgpu_bo *bo, void *owner, bool intr)h](j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hj9UhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5Uubj)}(h h]h }(hjFUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5Uubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjWUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTUubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjYUmodnameN classnameNjj)}j]j)}jjUsbc.amdgpu_bo_sync_waitasbuh1hhj5Uubj)}(h h]h }(hjwUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5Uubj)}(hjh]h*}(hjUhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj5Uubj)}(hboh]hbo}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5Uubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj1Uubj)}(h void *ownerh](jt)}(hvoidh]hvoid}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjUubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(hjh]h*}(hjUhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjUubj)}(hownerh]howner}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj1Uubj)}(h bool intrh](jt)}(hjwh]hbool}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjUubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(hintrh]hintr}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj1Uubeh}(h]h ]h"]h$]h&]jjuh1jhjThhhj UhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjThhhj UhMubah}(h]jTah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj UhMhjThhubj[)}(hhh]h)}(h$Wrapper for amdgpu_bo_sync_wait_resvh]h$Wrapper for amdgpu_bo_sync_wait_resv}(hj2VhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj/Vhhubah}(h]h ]h"]h$]h&]uh1jZhjThhhj UhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjJVjjJVjjjuh1jbhhhj hNhNubj)}(h**Parameters** ``struct amdgpu_bo *bo`` buffer object to wait for ``void *owner`` fence owner ``bool intr`` Whether the wait is interruptible **Description** Wrapper to wait for fences in a BO. **Return** 0 on success, errno otherwise.h](h)}(h**Parameters**h]j)}(hjTVh]h Parameters}(hjVVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRVubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjNVubj )}(hhh](j)}(h3``struct amdgpu_bo *bo`` buffer object to wait for h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hjsVh]hstruct amdgpu_bo *bo}(hjuVhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjqVubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjmVubj$)}(hhh]h)}(hbuffer object to wait forh]hbuffer object to wait for}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhMhjVubah}(h]h ]h"]h$]h&]uh1j#hjmVubeh}(h]h ]h"]h$]h&]uh1j hjVhMhjjVubj)}(h``void *owner`` fence owner h](j)}(h``void *owner``h]j:)}(hjVh]h void *owner}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjVubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjVubj$)}(hhh]h)}(h fence ownerh]h fence owner}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhMhjVubah}(h]h ]h"]h$]h&]uh1j#hjVubeh}(h]h ]h"]h$]h&]uh1j hjVhMhjjVubj)}(h0``bool intr`` Whether the wait is interruptible h](j)}(h ``bool intr``h]j:)}(hjVh]h bool intr}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjVubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjVubj$)}(hhh]h)}(h!Whether the wait is interruptibleh]h!Whether the wait is interruptible}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhMhjVubah}(h]h ]h"]h$]h&]uh1j#hjVubeh}(h]h ]h"]h$]h&]uh1j hjVhMhjjVubeh}(h]h ]h"]h$]h&]uh1jhjNVubh)}(h**Description**h]j)}(hj Wh]h Description}(hj"WhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjNVubh)}(h#Wrapper to wait for fences in a BO.h]h#Wrapper to wait for fences in a BO.}(hj6WhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjNVubh)}(h **Return**h]j)}(hjGWh]hReturn}(hjIWhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjEWubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjNVubh)}(h0 on success, errno otherwise.h]h0 on success, errno otherwise.}(hj]WhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjNVubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^!amdgpu_bo_gpu_offset (C function)c.amdgpu_bo_gpu_offsethNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(h/u64 amdgpu_bo_gpu_offset (struct amdgpu_bo *bo)h]jn)}(h.u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)h](h)}(hhh]j)}(hu64h]hu64}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjWmodnameN classnameNjj)}j]j)}jamdgpu_bo_gpu_offsetsbc.amdgpu_bo_gpu_offsetasbuh1hhjWhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhjWhMubj)}(hamdgpu_bo_gpu_offseth]j)}(hjWh]hamdgpu_bo_gpu_offset}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ](jjeh"]h$]h&]jjuh1jhjWhhhjWhMubj)}(h(struct amdgpu_bo *bo)h]j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjWmodnameN classnameNjj)}j]jWc.amdgpu_bo_gpu_offsetasbuh1hhjWubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(hjh]h*}(hj(XhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjWubj)}(hboh]hbo}(hj5XhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubah}(h]h ]h"]h$]h&]jjuh1jhjWhhhjWhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjWhhhjWhMubah}(h]jWah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjWhMhjWhhubj[)}(hhh]h)}(hreturn GPU offset of boh]hreturn GPU offset of bo}(hj_XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj\Xhhubah}(h]h ]h"]h$]h&]uh1jZhjWhhhjWhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjwXjjwXjjjuh1jbhhhj hNhNubj)}(hX**Parameters** ``struct amdgpu_bo *bo`` amdgpu object for which we query the offset **Note** object should either be pinned or reserved when calling this function, it might be useful to add check for this for debugging. **Return** current GPU offset of the object.h](h)}(h**Parameters**h]j)}(hjXh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj{Xubj )}(hhh]j)}(hE``struct amdgpu_bo *bo`` amdgpu object for which we query the offset h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hjXh]hstruct amdgpu_bo *bo}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjXubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjXubj$)}(hhh]h)}(h+amdgpu object for which we query the offseth]h+amdgpu object for which we query the offset}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjXubah}(h]h ]h"]h$]h&]uh1j#hjXubeh}(h]h ]h"]h$]h&]uh1j hjXhMhjXubah}(h]h ]h"]h$]h&]uh1jhj{Xubh)}(h**Note**h]j)}(hjXh]hNote}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj{Xubh)}(h~object should either be pinned or reserved when calling this function, it might be useful to add check for this for debugging.h]h~object should either be pinned or reserved when calling this function, it might be useful to add check for this for debugging.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj{Xubh)}(h **Return**h]j)}(hjYh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj{Xubh)}(h!current GPU offset of the object.h]h!current GPU offset of the object.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj{Xubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_bo_fb_aper_addr (C function)c.amdgpu_bo_fb_aper_addrhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(h1u64 amdgpu_bo_fb_aper_addr (struct amdgpu_bo *bo)h]jn)}(h0u64 amdgpu_bo_fb_aper_addr(struct amdgpu_bo *bo)h](h)}(hhh]j)}(hu64h]hu64}(hjJYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGYubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjLYmodnameN classnameNjj)}j]j)}jamdgpu_bo_fb_aper_addrsbc.amdgpu_bo_fb_aper_addrasbuh1hhjCYhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hjlYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCYhhhjkYhMubj)}(hamdgpu_bo_fb_aper_addrh]j)}(hjhYh]hamdgpu_bo_fb_aper_addr}(hj~YhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzYubah}(h]h ](jjeh"]h$]h&]jjuh1jhjCYhhhjkYhMubj)}(h(struct amdgpu_bo *bo)h]j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjYmodnameN classnameNjj)}j]jfYc.amdgpu_bo_fb_aper_addrasbuh1hhjYubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj)}(hjh]h*}(hjYhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjYubj)}(hboh]hbo}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjYubah}(h]h ]h"]h$]h&]jjuh1jhjCYhhhjkYhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj?YhhhjkYhMubah}(h]j:Yah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjkYhMhjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:Zubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj6Zubj )}(hhh]j)}(hQ``struct amdgpu_bo *bo`` amdgpu VRAM buffer object for which we query the offset h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hj[Zh]hstruct amdgpu_bo *bo}(hj]ZhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjYZubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhjUZubj$)}(hhh]h)}(h7amdgpu VRAM buffer object for which we query the offseth]h7amdgpu VRAM buffer object for which we query the offset}(hjtZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjpZhMhjqZubah}(h]h ]h"]h$]h&]uh1j#hjUZubeh}(h]h ]h"]h$]h&]uh1j hjpZhMhjRZubah}(h]h ]h"]h$]h&]uh1jhj6Zubh)}(h **Return**h]j)}(hjZh]hReturn}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj6Zubh)}(h-current FB aperture GPU offset of the object.h]h-current FB aperture GPU offset of the object.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj6Zubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^*amdgpu_bo_gpu_offset_no_check (C function)c.amdgpu_bo_gpu_offset_no_checkhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(h8u64 amdgpu_bo_gpu_offset_no_check (struct amdgpu_bo *bo)h]jn)}(h7u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)h](h)}(hhh]j)}(hu64h]hu64}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjZmodnameN classnameNjj)}j]j)}jamdgpu_bo_gpu_offset_no_checksbc.amdgpu_bo_gpu_offset_no_checkasbuh1hhjZhhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhjZhMubj)}(hamdgpu_bo_gpu_offset_no_checkh]j)}(hjZh]hamdgpu_bo_gpu_offset_no_check}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZhhhjZhMubj)}(h(struct amdgpu_bo *bo)h]j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hj-[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)[ubj)}(h h]h }(hj:[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)[ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjK[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjH[ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjM[modnameN classnameNjj)}j]jZc.amdgpu_bo_gpu_offset_no_checkasbuh1hhj)[ubj)}(h h]h }(hji[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)[ubj)}(hjh]h*}(hjw[hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj)[ubj)}(hboh]hbo}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)[ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%[ubah}(h]h ]h"]h$]h&]jjuh1jhjZhhhjZhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjZhhhjZhMubah}(h]jZah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjZhMhjZhhubj[)}(hhh]h)}(hreturn GPU offset of boh]hreturn GPU offset of bo}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj[hhubah}(h]h ]h"]h$]h&]uh1jZhjZhhhjZhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj[jj[jjjuh1jbhhhj hNhNubj)}(h**Parameters** ``struct amdgpu_bo *bo`` amdgpu object for which we query the offset **Return** current GPU offset of the object without raising warnings.h](h)}(h**Parameters**h]j)}(hj[h]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj[ubj )}(hhh]j)}(hE``struct amdgpu_bo *bo`` amdgpu object for which we query the offset h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hj[h]hstruct amdgpu_bo *bo}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj[ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj[ubj$)}(hhh]h)}(h+amdgpu object for which we query the offseth]h+amdgpu object for which we query the offset}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1j#hj[ubeh}(h]h ]h"]h$]h&]uh1j hj\hMhj[ubah}(h]h ]h"]h$]h&]uh1jhj[ubh)}(h **Return**h]j)}(hj*\h]hReturn}(hj,\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(\ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj[ubh)}(h:current GPU offset of the object without raising warnings.h]h:current GPU offset of the object without raising warnings.}(hj@\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^*amdgpu_bo_mem_stats_placement (C function)c.amdgpu_bo_mem_stats_placementhNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(h=uint32_t amdgpu_bo_mem_stats_placement (struct amdgpu_bo *bo)h]jn)}(h` **Return** Which of the allowed domains is preferred for allocating the BO.h](h)}(h**Parameters**h]j)}(hjg_h]h Parameters}(hji_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhje_ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM6hja_ubj )}(hhh](j)}(h4``struct amdgpu_device *adev`` amdgpu device object h](j)}(h``struct amdgpu_device *adev``h]j:)}(hj_h]hstruct amdgpu_device *adev}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj_ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM3hj_ubj$)}(hhh]h)}(hamdgpu device objecth]hamdgpu device object}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hM3hj_ubah}(h]h ]h"]h$]h&]uh1j#hj_ubeh}(h]h ]h"]h$]h&]uh1j hj_hM3hj}_ubj)}(hJ``uint32_t domain`` allowed :ref:`memory domains ` h](j)}(h``uint32_t domain``h]j:)}(hj_h]huint32_t domain}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj_ubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM4hj_ubj$)}(hhh]h)}(h5allowed :ref:`memory domains `h](hallowed }(hj_hhhNhNubh)}(h-:ref:`memory domains `h]j)}(hj_h]hmemory domains}(hj_hhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]refdocj  refdomainj_reftyperef refexplicitrefwarnjamdgpu_memory_domainsuh1hhj_hM4hj_ubeh}(h]h ]h"]h$]h&]uh1hhj_hM4hj_ubah}(h]h ]h"]h$]h&]uh1j#hj_ubeh}(h]h ]h"]h$]h&]uh1j hj_hM4hj}_ubeh}(h]h ]h"]h$]h&]uh1jhja_ubh)}(h **Return**h]j)}(hj`h]hReturn}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM6hja_ubh)}(h@Which of the allowed domains is preferred for allocating the BO.h]h@Which of the allowed domains is preferred for allocating the BO.}(hj0`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chM6hja_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^!amdgpu_bo_print_info (C function)c.amdgpu_bo_print_infohNtauh1jQhj hhhNhNubjc)}(hhh](jh)}(hKu64 amdgpu_bo_print_info (int id, struct amdgpu_bo *bo, struct seq_file *m)h]jn)}(hJu64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)h](h)}(hhh]j)}(hu64h]hu64}(hjb`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_`ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjd`modnameN classnameNjj)}j]j)}jamdgpu_bo_print_infosbc.amdgpu_bo_print_infoasbuh1hhj[`hhhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMNubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[`hhhj`hMNubj)}(hamdgpu_bo_print_infoh]j)}(hj`h]hamdgpu_bo_print_info}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj[`hhhj`hMNubj)}(h2(int id, struct amdgpu_bo *bo, struct seq_file *m)h](j)}(hint idh](jt)}(hinth]hint}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj`ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(hidh]hid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjamodnameN classnameNjj)}j]j~`c.amdgpu_bo_print_infoasbuh1hhj`ubj)}(h h]h }(hj"ahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(hjh]h*}(hj0ahhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj`ubj)}(hboh]hbo}(hj=ahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(hstruct seq_file *mh](j)}(hjh]hstruct}(hjVahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRaubj)}(h h]h }(hjcahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRaubh)}(hhh]j)}(hseq_fileh]hseq_file}(hjtahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqaubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjvamodnameN classnameNjj)}j]j~`c.amdgpu_bo_print_infoasbuh1hhjRaubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRaubj)}(hjh]h*}(hjahhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjRaubj)}(hmh]hm}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubeh}(h]h ]h"]h$]h&]jjuh1jhj[`hhhj`hMNubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjW`hhhj`hMNubah}(h]jR`ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj`hMNhjT`hhubj[)}(hhh]h)}(hprint BO info in debugfs fileh]hprint BO info in debugfs file}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMNhjahhubah}(h]h ]h"]h$]h&]uh1jZhjT`hhhj`hMNubeh}(h]h ](j4functioneh"]h$]h&]jj4jjajjajjjuh1jbhhhj hNhNubj)}(h**Parameters** ``int id`` Index or Id of the BO ``struct amdgpu_bo *bo`` Requested BO for printing info ``struct seq_file *m`` debugfs file **Description** Print BO information in debugfs file **Return** Size of the BO in bytes.h](h)}(h**Parameters**h]j)}(hjah]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMRhjaubj )}(hhh](j)}(h!``int id`` Index or Id of the BO h](j)}(h ``int id``h]j:)}(hjbh]hint id}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjbubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMPhjbubj$)}(hhh]h)}(hIndex or Id of the BOh]hIndex or Id of the BO}(hj1bhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-bhMPhj.bubah}(h]h ]h"]h$]h&]uh1j#hjbubeh}(h]h ]h"]h$]h&]uh1j hj-bhMPhjbubj)}(h8``struct amdgpu_bo *bo`` Requested BO for printing info h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hjQbh]hstruct amdgpu_bo *bo}(hjSbhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjObubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: ./drivers/gpu/drm/amd/amdgpu/amdgpu_object.chMQhjKbubj$)}(hhh]h)}(hRequested BO for printing infoh]hRequested BO for printing info}(hjjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfbhMQhjgbubah}(h]h ]h"]h$]h&]uh1j#hjKbubeh}(h]h ]h"]h$]h&]uh1j hjfbhMQhjbubj)}(h$``struct seq_file *m`` debugfs file h](j)}(h``struct seq_file *m``h]j:)}(hjbh]hstruct seq_file *m}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjbubah}(h]h ]h"]h$]h&]uh1jhr/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:198: 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./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhjvubj )}(hhh](j)}(h'``struct drm_gem_object *gobj`` GEM BO h](j)}(h``struct drm_gem_object *gobj``h]j:)}(hjvh]hstruct drm_gem_object *gobj}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhjvubj$)}(hhh]h)}(hGEM BOh]hGEM BO}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1j#hjvubeh}(h]h ]h"]h$]h&]uh1j hjvhMhjvubj)}(h6``int flags`` Flags such as DRM_CLOEXEC and DRM_RDWR. h](j)}(h ``int flags``h]j:)}(hjvh]h int flags}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhjvubj$)}(hhh]h)}(h'Flags such as DRM_CLOEXEC and DRM_RDWR.h]h'Flags such as DRM_CLOEXEC and DRM_RDWR.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1j#hjvubeh}(h]h ]h"]h$]h&]uh1j hjvhMhjvubeh}(h]h ]h"]h$]h&]uh1jhjvubh)}(h**Description**h]j)}(hjwh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhjvubh)}(hCThe main work is done by the :c:type:`drm_gem_prime_export` helper.h](hThe main work is done by the }(hj3whhhNhNubh)}(h:c:type:`drm_gem_prime_export`h]j:)}(hj=wh]hdrm_gem_prime_export}(hj?whhhNhNubah}(h]h ](jj4c-typeeh"]h$]h&]uh1j9hj;wubah}(h]h ]h"]h$]h&]refdocj  refdomainj4reftypetype refexplicitrefwarnjjCjdrm_gem_prime_exportuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhj3wubh helper.}(hj3whhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZwhMhjvubh)}(h **Return**h]j)}(hjgwh]hReturn}(hjiwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjewubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: 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]jah"]h$]h&]uh1jhjwhhhjwhMubh)}(hhh]j)}(hdrm_gem_objecth]hdrm_gem_object}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjwmodnameN classnameNjj)}j]j)}jamdgpu_dma_buf_create_objsbc.amdgpu_dma_buf_create_objasbuh1hhjwhhhjwhMubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwhhhjwhMubj)}(hjh]h*}(hjwhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjwhhhjwhMubj)}(hamdgpu_dma_buf_create_objh]j)}(hjwh]hamdgpu_dma_buf_create_obj}(hj xhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ](jjeh"]h$]h&]jjuh1jhjwhhhjwhMubj)}(h1(struct drm_device *dev, struct dma_buf *dma_buf)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj&xhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"xubj)}(h h]h }(hj3xhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"xubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjDxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAxubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjFxmodnameN classnameNjj)}j]jwc.amdgpu_dma_buf_create_objasbuh1hhj"xubj)}(h h]h }(hjbxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"xubj)}(hjh]h*}(hjpxhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj"xubj)}(hdevh]hdev}(hj}xhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"xubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubj)}(hstruct dma_buf *dma_bufh](j)}(hjh]hstruct}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubh)}(hhh]j)}(hdma_bufh]hdma_buf}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjxmodnameN classnameNjj)}j]jwc.amdgpu_dma_buf_create_objasbuh1hhjxubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(hjh]h*}(hjxhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjxubj)}(hdma_bufh]hdma_buf}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubeh}(h]h ]h"]h$]h&]jjuh1jhjwhhhjwhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjwhhhjwhMubah}(h]jwah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjwhMhjwhhubj[)}(hhh]h)}(hcreate BO for DMA-buf importh]hcreate BO for DMA-buf import}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhjyhhubah}(h]h ]h"]h$]h&]uh1jZhjwhhhjwhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj/yjj/yjjjuh1jbhhhj chNhNubj)}(hX***Parameters** ``struct drm_device *dev`` DRM device ``struct dma_buf *dma_buf`` DMA-buf **Description** Creates an empty SG BO for DMA-buf import. **Return** A new GEM BO of the given DRM device, representing the memory described by the given DMA-buf attachment and scatter/gather table.h](h)}(h**Parameters**h]j)}(hj9yh]h Parameters}(hj;yhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj7yubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhj3yubj )}(hhh](j)}(h&``struct drm_device *dev`` DRM device h](j)}(h``struct drm_device *dev``h]j:)}(hjXyh]hstruct drm_device *dev}(hjZyhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjVyubah}(h]h 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](j4functioneh"]h$]h&]jj4jj4{jj4{jjjuh1jbhhhj chNhNubj)}(h**Parameters** ``struct dma_buf_attachment *attach`` the DMA-buf attachment **Description** Invalidate the DMA-buf attachment, making sure that the we re-create the mapping before the next use.h](h)}(h**Parameters**h]j)}(hj>{h]h Parameters}(hj@{hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<{ubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhj8{ubj )}(hhh]j)}(h=``struct dma_buf_attachment *attach`` the DMA-buf attachment h](j)}(h%``struct dma_buf_attachment *attach``h]j:)}(hj]{h]h!struct dma_buf_attachment *attach}(hj_{hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj[{ubah}(h]h ]h"]h$]h&]uh1jhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhjW{ubj$)}(hhh]h)}(hthe DMA-buf attachmenth]hthe DMA-buf attachment}(hjv{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr{hMhjs{ubah}(h]h ]h"]h$]h&]uh1j#hjW{ubeh}(h]h ]h"]h$]h&]uh1j hjr{hMhjT{ubah}(h]h ]h"]h$]h&]uh1jhj8{ubh)}(h**Description**h]j)}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhj8{ubh)}(heInvalidate the DMA-buf attachment, making sure that the we re-create the mapping before the next use.h]heInvalidate the DMA-buf attachment, making sure that the we re-create the mapping before the next use.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMhj8{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj chhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^$amdgpu_gem_prime_import (C function)c.amdgpu_gem_prime_importhNtauh1jQhj chhhNhNubjc)}(hhh](jh)}(hastruct drm_gem_object * amdgpu_gem_prime_import (struct drm_device *dev, struct dma_buf *dma_buf)h]jn)}(h_struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf)h](j)}(hjh]hstruct}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMBubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhj{hMBubh)}(hhh]j)}(hdrm_gem_objecth]hdrm_gem_object}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj{modnameN classnameNjj)}j]j)}jamdgpu_gem_prime_importsbc.amdgpu_gem_prime_importasbuh1hhj{hhhj{hMBubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhj{hMBubj)}(hjh]h*}(hj+|hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj{hhhj{hMBubj)}(hamdgpu_gem_prime_importh]j)}(hj|h]hamdgpu_gem_prime_import}(hj<|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8|ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj{hhhj{hMBubj)}(h1(struct drm_device *dev, struct dma_buf *dma_buf)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjW|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS|ubj)}(h h]h }(hjd|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS|ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hju|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr|ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjw|modnameN classnameNjj)}j]j|c.amdgpu_gem_prime_importasbuh1hhjS|ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS|ubj)}(hjh]h*}(hj|hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjS|ubj)}(hdevh]hdev}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjO|ubj)}(hstruct dma_buf *dma_bufh](j)}(hjh]hstruct}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubh)}(hhh]j)}(hdma_bufh]hdma_buf}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]Mh"]h$]h&] refdomainj4reftypej reftargetj|modnameN classnameNjj)}j]j|c.amdgpu_gem_prime_importasbuh1hhj|ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(hjh]h*}(hj}hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj|ubj)}(hdma_bufh]hdma_buf}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjO|ubeh}(h]h ]h"]h$]h&]jjuh1jhj{hhhj{hMBubeh}(h]h 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device.h](h)}(h**Parameters**h]j)}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMFhj}ubj )}(hhh](j)}(h&``struct drm_device *dev`` DRM device h](j)}(h``struct drm_device *dev``h]j:)}(hj}h]hstruct drm_device *dev}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj}ubah}(h]h ]h"]h$]h&]uh1jhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMChj}ubj$)}(hhh]h)}(h DRM deviceh]h DRM device}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMChj}ubah}(h]h ]h"]h$]h&]uh1j#hj}ubeh}(h]h ]h"]h$]h&]uh1j hj}hMChj}ubj)}(h.``struct dma_buf *dma_buf`` Shared DMA buffer h](j)}(h``struct dma_buf *dma_buf``h]j:)}(hj}h]hstruct dma_buf *dma_buf}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj}ubah}(h]h ]h"]h$]h&]uh1jhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: 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]jah"]h$]h&]uh1jhjVubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj[modnameN classnameNjj)}j]j"c.amdgpu_dmabuf_is_xgmi_accessibleasbuh1hhj7ubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj7ubj)}(hboh]hbo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubeh}(h]h ]h"]h$]h&]jjuh1jhj~hhhj~hMnubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj~hhhj~hMnubah}(h]j~ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj~hMnhj~hhubj[)}(hhh]h)}(h(Check if xgmi available for P2P transferh]h(Check if xgmi available for P2P transfer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:207: ./drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.chMnhjhhubah}(h]h ]h"]h$]h&]uh1jZhj~hhhj~hMnubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhj chNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer of the importer ``struct amdgpu_bo *bo`` amdgpu buffer object **Return** True if dmabuf accessible over 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mmu_notifier_range *range, unsigned long cur_seq)h](jt)}(hjwh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chK7ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hK7ubj)}(hamdgpu_hmm_invalidate_gfxh]j)}(hamdgpu_hmm_invalidate_gfxh]hamdgpu_hmm_invalidate_gfx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hK7ubj)}(hb(struct mmu_interval_notifier *mni, const struct mmu_notifier_range *range, unsigned long cur_seq)h](j)}(h!struct mmu_interval_notifier *mnih](j)}(hjh]hstruct}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubh)}(hhh]j)}(hmmu_interval_notifierh]hmmu_interval_notifier}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjXmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_hmm_invalidate_gfxasbuh1hhj4ubj)}(h h]h }(hjvhhhNhNubah}(h]h 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accessed and potentially dirty.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chK;hjubj )}(hhh](j)}(hH``struct mmu_interval_notifier *mni`` the range (mm) is about to update h](j)}(h%``struct mmu_interval_notifier *mni``h]j:)}(hjقh]h!struct mmu_interval_notifier *mni}(hjۂhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjׂubah}(h]h ]h"]h$]h&]uh1jho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chK9hjӂubj$)}(hhh]h)}(h!the range (mm) is about to updateh]h!the range (mm) is about to update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK9hjubah}(h]h ]h"]h$]h&]uh1j#hjӂubeh}(h]h ]h"]h$]h&]uh1j hjhK9hjЂubj)}(hG``const struct mmu_notifier_range *range`` details on the invalidation h](j)}(h*``const struct mmu_notifier_range *range``h]j:)}(hjh]h&const struct mmu_notifier_range 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]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chK=hjubh)}(hWBlock for operations on BOs to finish and mark pages as accessed and potentially dirty.h]hWBlock for operations on BOs to finish and mark pages as accessed and potentially dirty.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chK` to validate **Description** Determines whether the given HMM range **range** is still valid by checking for invalidations via the MMU notifier sequence. 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This is typically used to verify that the range has not been invalidated by concurrent address space updates before it is accessed.h](h'Determines whether the given HMM range }(hjhhhNhNubj)}(h **range**h]hrange}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh is still valid by checking for invalidations via the MMU notifier sequence. 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The reference count of the }(hjߍhhhNhNubj)}(h**bo**h]hbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjߍubh is incremented.}(hjߍhhhNhNubeh}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chKhjiubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chKhjiubh)}(hdPointer to a newly allocated struct amdgpu_hmm_range on success, or NULL if memory allocation fails.h]hdPointer to a newly allocated struct amdgpu_hmm_range on success, or NULL if memory allocation fails.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chKhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^"amdgpu_hmm_range_free (C function)c.amdgpu_hmm_range_freehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h;void amdgpu_hmm_range_free (struct amdgpu_hmm_range *range)h]jn)}(h:void amdgpu_hmm_range_free(struct amdgpu_hmm_range *range)h](jt)}(hvoidh]hvoid}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjUhhho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhjghMubj)}(hamdgpu_hmm_range_freeh]j)}(hamdgpu_hmm_range_freeh]hamdgpu_hmm_range_free}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ](jjeh"]h$]h&]jjuh1jhjUhhhjghMubj)}(h (struct amdgpu_hmm_range *range)h]j)}(hstruct amdgpu_hmm_range *rangeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hamdgpu_hmm_rangeh]hamdgpu_hmm_range}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jj|sbc.amdgpu_hmm_range_freeasbuh1hhjubj)}(h h]h }(hjԎhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hrangeh]hrange}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjUhhhjghMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjQhhhjghMubah}(h]jLah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjghMhjNhhubj[)}(hhh]h)}(hrelease an AMDGPU HMM rangeh]hrelease an AMDGPU HMM range}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjNhhhjghMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj1jj1jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_hmm_range *range`` pointer to the range object to free **Description** Releases all resources held by **range**, including the associated hmm_pfns and the dropping reference of associated bo if any. **Return** voidh](h)}(h**Parameters**h]j)}(hj;h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhj5ubj )}(hhh]j)}(hG``struct amdgpu_hmm_range *range`` pointer to the range object to free h](j)}(h"``struct amdgpu_hmm_range *range``h]j:)}(hjZh]hstruct amdgpu_hmm_range *range}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjXubah}(h]h ]h"]h$]h&]uh1jho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhjTubj$)}(hhh]h)}(h#pointer to the range object to freeh]h#pointer to the range object to free}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhjpubah}(h]h ]h"]h$]h&]uh1j#hjTubeh}(h]h ]h"]h$]h&]uh1j hjohMhjQubah}(h]h ]h"]h$]h&]uh1jhj5ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhj5ubh)}(hReleases all resources held by **range**, including the associated hmm_pfns and the dropping reference of associated bo if any.h](hReleases all resources held by }(hjhhhNhNubj)}(h **range**h]hrange}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhW, including the associated hmm_pfns and the dropping reference of associated bo if any.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhj5ubh)}(h **Return**h]j)}(hjΏh]hReturn}(hjЏhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj̏ubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhj5ubh)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:216: ./drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.chMhj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h] mmu-notifierah ]h"] mmu notifierah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hAMDGPU Virtual Memoryh]hAMDGPU Virtual Memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXGPUVM is the MMU functionality provided on the GPU. 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hKubj)}(hamdgpu_vm_assert_lockedh]j)}(hamdgpu_vm_assert_lockedh]hamdgpu_vm_assert_locked}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hKubj)}(h(struct amdgpu_vm *vm)h]j)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjZmodnameN classnameNjj)}j]j)}jj sbc.amdgpu_vm_assert_lockedasbuh1hhj6ubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj6ubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj hKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhj hKubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj hKhjhhubj[)}(hhh]h)}(hcheck if VM is correctly lockedh]hcheck if VM is correctly locked}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj hKubeh}(h]h ](j4functioneh"]h$]h&]jj4jjՓjjՓjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_vm *vm`` the VM which schould be tested **Description** Asserts that the VM root PD is locked.h](h)}(h**Parameters**h]j)}(hjߓh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjݓubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjٓubj )}(hhh]j)}(h8``struct amdgpu_vm *vm`` the VM which schould be tested h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hjh]hstruct amdgpu_vm *vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubj$)}(hhh]h)}(hthe VM which schould be testedh]hthe VM which schould be tested}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjٓubh)}(h**Description**h]j)}(hj9h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjٓubh)}(h&Asserts that the VM root PD is locked.h]h&Asserts that the VM root PD is locked.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjٓubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^)amdgpu_vm_is_bo_always_valid (C function)c.amdgpu_vm_is_bo_always_validhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hNbool amdgpu_vm_is_bo_always_valid (struct amdgpu_vm *vm, struct amdgpu_bo *bo)h]jn)}(hMbool amdgpu_vm_is_bo_always_valid(struct amdgpu_vm *vm, struct amdgpu_bo *bo)h](jt)}(hjwh]hbool}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjzhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjhKubj)}(hamdgpu_vm_is_bo_always_validh]j)}(hamdgpu_vm_is_bo_always_validh]hamdgpu_vm_is_bo_always_valid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjzhhhjhKubj)}(h,(struct amdgpu_vm *vm, struct amdgpu_bo *bo)h](j)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjǔhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjؔhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjՔubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjڔmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_is_bo_always_validasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjLmodnameN classnameNjj)}j]jc.amdgpu_vm_is_bo_always_validasbuh1hhj(ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(hjh]h*}(hjvhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj(ubj)}(hboh]hbo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjzhhhjhKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjvhhhjhKubah}(h]jqah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhKhjshhubj[)}(hhh]h)}(h"check if the BO is VM always validh]h"check if the BO is VM always valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjhhubah}(h]h ]h"]h$]h&]uh1jZhjshhhjhKubeh}(h]h ](j4functioneh"]h$]h&]jj4jjŕjjŕjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct 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amdgpu_bo *bo}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj%ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhj!ubj$)}(hhh]h)}(hBO to be tested.h]hBO to be tested.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKhj=ubah}(h]h ]h"]h$]h&]uh1j#hj!ubeh}(h]h ]h"]h$]h&]uh1j hj<hKhjubeh}(h]h ]h"]h$]h&]uh1jhjɕubh)}(h**Description**h]j)}(hjbh]h Description}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjɕubh)}(hvReturns true if the BO shares the dma_resv object with the root PD and is always guaranteed to be valid inside the VM.h]hvReturns true if the BO shares the dma_resv object with the root PD and is always guaranteed to be valid inside the VM.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjɕubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^!amdgpu_vm_bo_evicted (C function)c.amdgpu_vm_bo_evictedhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h;void amdgpu_vm_bo_evicted (struct amdgpu_vm_bo_base *vm_bo)h]jn)}(h:void amdgpu_vm_bo_evicted(struct amdgpu_vm_bo_base *vm_bo)h](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hamdgpu_vm_bo_evictedh]j)}(hamdgpu_vm_bo_evictedh]hamdgpu_vm_bo_evicted}(hjȖhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĖubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h!(struct amdgpu_vm_bo_base *vm_bo)h]j)}(hstruct amdgpu_vm_bo_base *vm_boh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hamdgpu_vm_bo_baseh]hamdgpu_vm_bo_base}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjʖsbc.amdgpu_vm_bo_evictedasbuh1hhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj0hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvm_boh]hvm_bo}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjܖubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhKubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhKhjhhubj[)}(hhh]h)}(hvm_bo is evictedh]hvm_bo is evicted}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjdhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhKubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_vm_bo_base *vm_bo`` vm_bo which is evicted **Description** State for vm_bo objects meaning the underlying BO was evicted and need to move in place again.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubj )}(hhh]j)}(h;``struct amdgpu_vm_bo_base *vm_bo`` vm_bo which is evicted h](j)}(h#``struct amdgpu_vm_bo_base *vm_bo``h]j:)}(hjh]hstruct amdgpu_vm_bo_base *vm_bo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubj$)}(hhh]h)}(hvm_bo which is evictedh]hvm_bo which is evicted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubh)}(h^State for vm_bo objects meaning the underlying BO was evicted and need to move in place again.h]h^State for vm_bo objects meaning the underlying BO was evicted and need to move in place again.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^&amdgpu_vm_bo_needs_update (C function)c.amdgpu_vm_bo_needs_updatehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h@void amdgpu_vm_bo_needs_update (struct amdgpu_vm_bo_base *vm_bo)h]jn)}(h?void amdgpu_vm_bo_needs_update(struct amdgpu_vm_bo_base *vm_bo)h](jt)}(hvoidh]hvoid}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj$hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhj6hKubj)}(hamdgpu_vm_bo_needs_updateh]j)}(hamdgpu_vm_bo_needs_updateh]hamdgpu_vm_bo_needs_update}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$hhhj6hKubj)}(h!(struct amdgpu_vm_bo_base *vm_bo)h]j)}(hstruct amdgpu_vm_bo_base *vm_boh](j)}(hjh]hstruct}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubh)}(hhh]j)}(hamdgpu_vm_bo_baseh]hamdgpu_vm_bo_base}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjKsbc.amdgpu_vm_bo_needs_updateasbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjaubj)}(hvm_boh]hvm_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj]ubah}(h]h ]h"]h$]h&]jjuh1jhj$hhhj6hKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj hhhj6hKubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj6hKhjhhubj[)}(hhh]h)}(hvm_bo needs pagetable updateh]hvm_bo needs pagetable update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj6hKubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_vm_bo_base *vm_bo`` vm_bo which is out of date **Description** State for vm_bo objects meaning the underlying BO had mapping changes (move, PRT bind/unbind) but the new location is not yet reflected in the page tables.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubj )}(hhh]j)}(h?``struct amdgpu_vm_bo_base *vm_bo`` vm_bo which is out of date h](j)}(h#``struct amdgpu_vm_bo_base *vm_bo``h]j:)}(hj)h]hstruct amdgpu_vm_bo_base *vm_bo}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj'ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhj#ubj$)}(hhh]h)}(hvm_bo which is out of dateh]hvm_bo which is out of date}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj?ubah}(h]h ]h"]h$]h&]uh1j#hj#ubeh}(h]h ]h"]h$]h&]uh1j hj>hKhj ubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubh)}(hState for vm_bo objects meaning the underlying BO had mapping changes (move, PRT bind/unbind) but the new location is not yet reflected in the page tables.h]hState for vm_bo objects meaning the underlying BO had mapping changes (move, PRT bind/unbind) but the new location is not yet reflected in the page tables.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_bo_idle (C function)c.amdgpu_vm_bo_idlehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h8void amdgpu_vm_bo_idle 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]j'ah"]h$]h&]uh1jhjubj)}(hvm_boh]hvm_bo}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjޙubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhKubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhKhjhhubj[)}(hhh]h)}(h vm_bo is idleh]h vm_bo is idle}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjfhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhKubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_vm_bo_base *vm_bo`` vm_bo which is now idle **Description** State for vm_bo objects meaning we are done with the state machine and no further action is necessary.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubj )}(hhh]j)}(h<``struct amdgpu_vm_bo_base *vm_bo`` vm_bo which is now idle h](j)}(h#``struct amdgpu_vm_bo_base *vm_bo``h]j:)}(hjh]hstruct amdgpu_vm_bo_base *vm_bo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubj$)}(hhh]h)}(hvm_bo which is now idleh]hvm_bo which is now idle}(hjÚhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubh)}(hfState for vm_bo objects meaning we are done with the state machine and no further action is necessary.h]hfState for vm_bo objects meaning we are done with the state machine and no further action is necessary.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^-amdgpu_vm_bo_reset_state_machine (C function)"c.amdgpu_vm_bo_reset_state_machinehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(htbo.resource ``int sign`` if we should add (+1) or subtract (-1) from the stat **Description** Caller need to have the vm stats_lock held. Useful for when multiple update need to happen at the same time.h](h)}(h**Parameters**h]j)}(hj4h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMThj.ubj )}(hhh](j)}(hP``struct amdgpu_vm_bo_base *base`` base structure for tracking BO usage in a VM h](j)}(h"``struct amdgpu_vm_bo_base *base``h]j:)}(hjSh]hstruct amdgpu_vm_bo_base *base}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjQubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMQhjMubj$)}(hhh]h)}(h,base structure for tracking BO usage in a VMh]h,base structure for tracking BO usage in a VM}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMQhjiubah}(h]h ]h"]h$]h&]uh1j#hjMubeh}(h]h ]h"]h$]h&]uh1j hjhhMQhjJubj)}(hw``struct ttm_resource *res`` the ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resource h](j)}(h``struct ttm_resource *res``h]j:)}(hjh]hstruct ttm_resource *res}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMShjubj$)}(hhh]h)}(hYthe ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resourceh]hYthe ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resource}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMRhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMShjJubj)}(hB``int sign`` if we should add (+1) or subtract (-1) from the stat h](j)}(h ``int sign``h]j:)}(hjơh]hint sign}(hjȡhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjġubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMThjubj$)}(hhh]h)}(h4if we should add (+1) or subtract (-1) from the stath]h4if we should add (+1) or subtract (-1) from the stat}(hjߡhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjۡhMThjܡubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjۡhMThjJubeh}(h]h ]h"]h$]h&]uh1jhj.ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMVhj.ubh)}(hlCaller need to have the vm stats_lock held. Useful for when multiple update need to happen at the same time.h]hlCaller need to have the vm stats_lock held. Useful for when multiple update need to happen at the same time.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMUhj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_vm_update_stats (C function)c.amdgpu_vm_update_statshNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h`void amdgpu_vm_update_stats (struct amdgpu_vm_bo_base *base, struct ttm_resource *res, int sign)h]jn)}(h_void amdgpu_vm_update_stats(struct amdgpu_vm_bo_base *base, struct ttm_resource *res, int sign)h](jt)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjBhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMyubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhjThMyubj)}(hamdgpu_vm_update_statsh]j)}(hamdgpu_vm_update_statsh]hamdgpu_vm_update_stats}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubah}(h]h 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}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj?hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hresh]hres}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj{ubj)}(hint signh](jt)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjaubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(hsignh]hsign}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj{ubeh}(h]h ]h"]h$]h&]jjuh1jhjBhhhjThMyubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj>hhhjThMyubah}(h]j9ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjThMyhj;hhubj[)}(hhh]h)}(h#helper to update normal memory stath]h#helper to update normal memory stat}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMyhjhhubah}(h]h ]h"]h$]h&]uh1jZhj;hhhjThMyubeh}(h]h ](j4functioneh"]h$]h&]jj4jjãjjãjjjuh1jbhhhjhNhNubj)}(hXr**Parameters** ``struct amdgpu_vm_bo_base *base`` base structure for tracking BO usage in a VM ``struct ttm_resource *res`` the ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resource ``int sign`` if we should add (+1) or subtract (-1) from the stat **Description** Updates the basic memory stat when bo is added/deleted/moved.h](h)}(h**Parameters**h]j)}(hjͣh]h Parameters}(hjϣhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjˣubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM}hjǣubj )}(hhh](j)}(hP``struct amdgpu_vm_bo_base *base`` base structure for tracking BO usage in a VM h](j)}(h"``struct amdgpu_vm_bo_base *base``h]j:)}(hjh]hstruct amdgpu_vm_bo_base *base}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMzhjubj$)}(hhh]h)}(h,base structure for tracking BO usage in a VMh]h,base structure for tracking BO usage in a VM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMzhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMzhjubj)}(hw``struct ttm_resource *res`` the ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resource h](j)}(h``struct ttm_resource *res``h]j:)}(hj%h]hstruct ttm_resource *res}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj#ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM|hjubj$)}(hhh]h)}(hYthe ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resourceh]hYthe ttm_resource to use for the purpose of accounting, may or may not be bo->tbo.resource}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM{hj;ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj:hM|hjubj)}(hB``int sign`` if we should add (+1) or subtract (-1) from the stat h](j)}(h ``int sign``h]j:)}(hj_h]hint sign}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj]ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM}hjYubj$)}(hhh]h)}(h4if we should add (+1) or subtract (-1) from the stath]h4if we should add (+1) or subtract (-1) from the stat}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM}hjuubah}(h]h ]h"]h$]h&]uh1j#hjYubeh}(h]h ]h"]h$]h&]uh1j hjthM}hjubeh}(h]h ]h"]h$]h&]uh1jhjǣubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjǣubh)}(h=Updates the basic memory stat when bo is added/deleted/moved.h]h=Updates the basic memory stat when bo is added/deleted/moved.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM~hjǣubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h 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]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubh)}(hhh]j)}(hdrm_exech]hdrm_exec}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)c.amdgpu_vm_lock_pdasbuh1hhj]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj]ubj)}(hexech]hexec}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned int num_fencesh](jt)}(hunsignedh]hunsigned}(hjѨhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjͨubj)}(h h]h }(hjߨhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjͨubjt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjͨubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjͨubj)}(h num_fencesh]h num_fences}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjͨubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMhjhhubj[)}(hhh]h)}(hlock PD in drm_exech]hlock PD in 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./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(h!number of extra fences to reserveh]h!number of extra fences to reserve}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjkubeh}(h]h ]h"]h$]h&]uh1jhjOubh)}(h**Description**h]j)}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjOubh)}(h1Lock the VM root PD in the DRM execution context.h]h1Lock the VM root PD in the DRM execution context.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^&amdgpu_vm_lock_individual (C function)c.amdgpu_vm_lock_individualhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hdint amdgpu_vm_lock_individual (struct amdgpu_vm *vm, struct drm_exec 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]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_exec *exech](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_exech]hdrm_exec}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj5modnameN classnameNjj)}j]jݪc.amdgpu_vm_lock_individualasbuh1hhjubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj_hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hexech]hexec}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned int num_fencesh](jt)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubjt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h num_fencesh]h num_fences}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjbhhhjthMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj^hhhjthMubah}(h]jYah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjthMhj[hhubj[)}(hhh]h)}(h(lock all BOs on the individual idle listh]h(lock all BOs on the individual idle list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhj[hhhjthMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hX **Parameters** ``struct amdgpu_vm *vm`` vm providing the BOs ``struct drm_exec *exec`` drm execution context ``unsigned int num_fences`` number of extra fences to reserve **Description** Lock the BOs on the individual idle list in the DRM execution context.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj )}(hhh](j)}(h.``struct amdgpu_vm *vm`` vm providing the BOs h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hj(h]hstruct amdgpu_vm *vm}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj&ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj"ubj$)}(hhh]h)}(hvm providing the BOsh]hvm providing the BOs}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1j#hj"ubeh}(h]h ]h"]h$]h&]uh1j hj=hMhjubj)}(h0``struct drm_exec *exec`` drm execution context h](j)}(h``struct drm_exec *exec``h]j:)}(hjah]hstruct drm_exec *exec}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj_ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj[ubj$)}(hhh]h)}(hdrm execution contexth]hdrm execution context}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjwubah}(h]h ]h"]h$]h&]uh1j#hj[ubeh}(h]h ]h"]h$]h&]uh1j hjvhMhjubj)}(h>``unsigned int num_fences`` number of extra fences to reserve h](j)}(h``unsigned int num_fences``h]j:)}(hjh]hunsigned int num_fences}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(h!number of extra fences to reserveh]h!number of extra fences to reserve}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjլh]h Description}(hj׬hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjӬubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(hFLock the BOs on the individual idle list in the DRM execution context.h]hFLock the BOs on the individual idle list in the DRM execution context.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^'amdgpu_vm_move_to_lru_tail (C function)c.amdgpu_vm_move_to_lru_tailhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hRvoid amdgpu_vm_move_to_lru_tail (struct amdgpu_device *adev, struct amdgpu_vm *vm)h]jn)}(hQvoid amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hMubj)}(hamdgpu_vm_move_to_lru_tailh]j)}(hamdgpu_vm_move_to_lru_tailh]hamdgpu_vm_move_to_lru_tail}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj(hMubj)}(h2(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjwmodnameN classnameNjj)}j]j)}jj=sbc.amdgpu_vm_move_to_lru_tailasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjSubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjɭhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŭubj)}(h h]h }(hj֭hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŭubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_move_to_lru_tailasbuh1hhjŭubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŭubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjŭubj)}(hvmh]hvm}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŭubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj(hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhj(hMubah}(h]j ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj(hMhjhhubj[)}(hhh]h)}(hmove all BOs to the end of LRUh]hmove all BOs to the end of LRU}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjGhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj(hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjbjjbjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``struct amdgpu_vm *vm`` vm providing the BOs **Description** Move all BOs to the end of LRU and remember their positions to put them together.h](h)}(h**Parameters**h]j)}(hjlh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjfubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(hamdgpu device pointerh]hamdgpu device pointer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(h.``struct amdgpu_vm *vm`` vm providing the BOs h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hjĮh]hstruct amdgpu_vm *vm}(hjƮhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj®ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(hvm providing the BOsh]hvm providing the BOs}(hjݮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjٮhMhjڮubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjٮhMhjubeh}(h]h ]h"]h$]h&]uh1jhjfubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjfubh)}(hQMove all BOs to the end of LRU and remember their positions to put them together.h]hQMove all BOs to the end of LRU and remember their positions to put them together.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^!amdgpu_vm_generation (C function)c.amdgpu_vm_generationhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hPuint64_t amdgpu_vm_generation (struct amdgpu_device *adev, struct amdgpu_vm *vm)h]jn)}(hOuint64_t amdgpu_vm_generation(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](h)}(hhh]j)}(huint64_th]huint64_t}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjImodnameN classnameNjj)}j]j)}jamdgpu_vm_generationsbc.amdgpu_vm_generationasbuh1hhj@hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM"ubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhjhhM"ubj)}(hamdgpu_vm_generationh]j)}(hjeh]hamdgpu_vm_generation}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@hhhjhhM"ubj)}(h2(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jcc.amdgpu_vm_generationasbuh1hhjubj)}(h h]h }(hjүhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj&modnameN classnameNjj)}j]jcc.amdgpu_vm_generationasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjPhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvmh]hvm}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj@hhhjhhM"ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj<hhhjhhM"ubah}(h]j7ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhhM"hj9hhubj[)}(hhh]h)}(h+return the page table re-generation counterh]h+return the page table re-generation counter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM"hjhhubah}(h]h ]h"]h$]h&]uh1jZhj9hhhjhhM"ubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hXT**Parameters** ``struct amdgpu_device *adev`` the amdgpu_device ``struct amdgpu_vm *vm`` optional VM to check, might be NULL **Description** Returns a page table re-generation token to allow checking if submissions are still valid to use this VM. The VM parameter might be NULL in which case just the VRAM lost counter will be used.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM&hjubj )}(hhh](j)}(h1``struct amdgpu_device *adev`` the amdgpu_device h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjȰh]hstruct amdgpu_device *adev}(hjʰhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjưubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM#hj°ubj$)}(hhh]h)}(hthe amdgpu_deviceh]hthe amdgpu_device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjݰhM#hjްubah}(h]h ]h"]h$]h&]uh1j#hj°ubeh}(h]h ]h"]h$]h&]uh1j hjݰhM#hjubj)}(h=``struct amdgpu_vm *vm`` optional VM to check, might be NULL h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hjh]hstruct amdgpu_vm *vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM$hjubj$)}(hhh]h)}(h#optional VM to check, might be NULLh]h#optional VM to check, might be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM$hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhM$hjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj<h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM&hjubh)}(hReturns a page table re-generation token to allow checking if submissions are still valid to use this VM. The VM parameter might be NULL in which case just the VRAM lost counter will be used.h]hReturns a page table re-generation token to allow checking if submissions are still valid to use this VM. The VM parameter might be NULL in which case just the VRAM lost counter will be used.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM%hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_validate (C function)c.amdgpu_vm_validatehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hint amdgpu_vm_validate (struct amdgpu_device *adev, struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket, int (*validate)(void *p, struct amdgpu_bo *bo), void *param)h]jn)}(hint amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket, int (*validate)(void *p, struct amdgpu_bo *bo), void *param)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj}hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM:ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}hhhjhM:ubj)}(hamdgpu_vm_validateh]j)}(hamdgpu_vm_validateh]hamdgpu_vm_validate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj}hhhjhM:ubj)}(h(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket, int (*validate)(void *p, struct amdgpu_bo *bo), void *param)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj˱hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjܱhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjٱubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjޱmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_validateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjPmodnameN classnameNjj)}j]jc.amdgpu_vm_validateasbuh1hhj,ubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hjh]h*}(hjzhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj,ubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct ww_acquire_ctx *ticketh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hww_acquire_ctxh]hww_acquire_ctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_validateasbuh1hhjubj)}(h h]h }(hjܲhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hticketh]hticket}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h.int (*validate)(void *p, struct amdgpu_bo *bo)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h(h]h(}(hj,hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj:hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hvalidateh]hvalidate}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h)h]h)}(hjUhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hj.h]h(}(hjchhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubjt)}(hvoidh]hvoid}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hj'h]hp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h,h]h,}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]hstruct}(hj³hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjϳhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݳubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_validateasbuh1hhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubj)}(hboh]hbo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjWh]h)}(hj'hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h void *paramh](jt)}(hvoidh]hvoid}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj;ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(hjh]h*}(hj[hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj;ubj)}(hparamh]hparam}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj}hhhjhM:ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjyhhhjhM:ubah}(h]jtah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhM:hjvhhubj[)}(hhh]h)}(h&validate evicted BOs tracked in the VMh]h&validate evicted BOs tracked in the VM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM:hjhhubah}(h]h ]h"]h$]h&]uh1jZhjvhhhjhM:ubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hXU**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``struct amdgpu_vm *vm`` vm providing the BOs ``struct ww_acquire_ctx *ticket`` optional reservation ticket used to reserve the VM ``int (*validate)(void *p, struct amdgpu_bo *bo)`` callback to do the validation ``void *param`` parameter for the validation callback **Description** Validate the page table BOs and per-VM BOs on command submission if necessary. If a ticket is given, also try to validate evicted user queue BOs. They must already be reserved with the given ticket. **Return** Validation result.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM>hjubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjӴh]hstruct amdgpu_device *adev}(hjմhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjѴubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM<hjʹubj$)}(hhh]h)}(hamdgpu device pointerh]hamdgpu device pointer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1j#hjʹubeh}(h]h ]h"]h$]h&]uh1j hjhM<hjʴubj)}(h.``struct amdgpu_vm *vm`` vm providing the BOs h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hj h]hstruct amdgpu_vm *vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM=hjubj$)}(hhh]h)}(hvm providing the BOsh]hvm providing the BOs}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hM=hj"ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj!hM=hjʴubj)}(hU``struct ww_acquire_ctx *ticket`` optional reservation ticket used to reserve the VM h](j)}(h!``struct ww_acquire_ctx *ticket``h]j:)}(hjEh]hstruct ww_acquire_ctx *ticket}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjCubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM>hj?ubj$)}(hhh]h)}(h2optional reservation ticket used to reserve the VMh]h2optional reservation ticket used to reserve the VM}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM>hj[ubah}(h]h ]h"]h$]h&]uh1j#hj?ubeh}(h]h ]h"]h$]h&]uh1j hjZhM>hjʴubj)}(hQ``int (*validate)(void *p, struct amdgpu_bo *bo)`` callback to do the validation h](j)}(h2``int (*validate)(void *p, struct amdgpu_bo *bo)``h]j:)}(hj~h]h.int (*validate)(void *p, struct amdgpu_bo *bo)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj|ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM?hjxubj$)}(hhh]h)}(hcallback to do the validationh]hcallback to do the validation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM?hjubah}(h]h ]h"]h$]h&]uh1j#hjxubeh}(h]h ]h"]h$]h&]uh1j hjhM?hjʴubj)}(h6``void *param`` parameter for the validation callback h](j)}(h``void *param``h]j:)}(hjh]h void *param}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM@hjubj$)}(hhh]h)}(h%parameter for the validation callbackh]h%parameter for the validation callback}(hjеhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj̵hM@hj͵ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj̵hM@hjʴubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMBhjubh)}(hValidate the page table BOs and per-VM BOs on command submission if necessary. If a ticket is given, also try to validate evicted user queue BOs. They must already be reserved with the given ticket.h]hValidate the page table BOs and per-VM BOs on command submission if necessary. If a ticket is given, also try to validate evicted user queue BOs. They must already be reserved with the given ticket.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMAhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMEhjubh)}(hValidation result.h]hValidation result.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMFhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_ready (C function)c.amdgpu_vm_readyhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h+bool amdgpu_vm_ready (struct amdgpu_vm *vm)h]jn)}(h*bool amdgpu_vm_ready(struct amdgpu_vm *vm)h](jt)}(hjwh]hbool}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjZhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhjkhMubj)}(hamdgpu_vm_readyh]j)}(hamdgpu_vm_readyh]hamdgpu_vm_ready}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZhhhjkhMubj)}(h(struct amdgpu_vm *vm)h]j)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_readyasbuh1hhjubj)}(h h]h }(hjضhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjZhhhjkhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjVhhhjkhMubah}(h]jQah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjkhMhjShhubj[)}(hhh]h)}(hcheck VM is ready for updatesh]hcheck VM is ready for updates}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjShhhjkhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj5jj5jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_vm *vm`` VM to check **Description** Check if all VM PDs/PTs are ready for updates **Return** True if VM is not evicting and all VM entities are not stoppedh](h)}(h**Parameters**h]j)}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj9ubj )}(hhh]j)}(h%``struct amdgpu_vm *vm`` VM to check h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hj^h]hstruct amdgpu_vm *vm}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj\ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjXubj$)}(hhh]h)}(h VM to checkh]h VM to check}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1j#hjXubeh}(h]h ]h"]h$]h&]uh1j hjshMhjUubah}(h]h ]h"]h$]h&]uh1jhj9ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj9ubh)}(h-Check if all VM PDs/PTs are ready for updatesh]h-Check if all VM PDs/PTs are ready for updates}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj9ubh)}(h **Return**h]j)}(hjh]hReturn}(hj·hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj9ubh)}(h>True if VM is not evicting and all VM entities are not stoppedh]h>True if VM is not evicting and all VM entities are not stopped}(hjַhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^(amdgpu_vm_check_compute_bug (C function)c.amdgpu_vm_check_compute_bughNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h=void amdgpu_vm_check_compute_bug (struct amdgpu_device *adev)h]jn)}(hubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjbmodnameN classnameNjj)}j]j)}jj(sbc.amdgpu_vm_check_compute_bugasbuh1hhj>ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj>ubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h 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refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jQc.amdgpu_vm_tlb_seq_cbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hcbh]hcb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMhjhhubj[)}(hhh]h)}(h#make sure to increment tlb sequenceh]h#make sure to increment tlb sequence}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj"jj"jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct dma_fence *fence`` unused ``struct dma_fence_cb *cb`` the callback structure **Description** Increments the tlb sequence to make sure that future CS execute a VM flush.h](h)}(h**Parameters**h]j)}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h 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]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM.hjubh)}(hKIncrements the tlb sequence to make sure that future CS execute a VM flush.h]hKIncrements the tlb sequence to make sure that future CS execute a VM flush.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM-hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_vm_update_range (C function)c.amdgpu_vm_update_rangehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hXKint amdgpu_vm_update_range (struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate, bool unlocked, bool flush_tlb, bool allow_override, struct amdgpu_sync *sync, uint64_t start, uint64_t last, uint64_t flags, uint64_t offset, uint64_t vram_base, struct ttm_resource *res, dma_addr_t *pages_addr, struct dma_fence **fence)h]jn)}(hXJint amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate, bool unlocked, bool flush_tlb, bool allow_override, struct amdgpu_sync *sync, uint64_t start, uint64_t last, uint64_t flags, uint64_t offset, uint64_t vram_base, struct ttm_resource *res, dma_addr_t *pages_addr, struct dma_fence **fence)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMSubj)}(hamdgpu_vm_update_rangeh]j)}(hamdgpu_vm_update_rangeh]hamdgpu_vm_update_range}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMSubj)}(hX0(struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate, bool unlocked, bool flush_tlb, bool allow_override, struct amdgpu_sync *sync, uint64_t start, uint64_t last, uint64_t flags, uint64_t offset, uint64_t vram_base, struct ttm_resource *res, dma_addr_t *pages_addr, struct dma_fence **fence)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjAmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjmhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool immediateh](jt)}(hjwh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h immediateh]h immediate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool unlockedh](jt)}(hjwh]hbool}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj3ubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(hunlockedh]hunlocked}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool flush_tlbh](jt)}(hjwh]hbool}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjgubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h flush_tlbh]h flush_tlb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool allow_overrideh](jt)}(hjwh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hallow_overrideh]hallow_override}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_sync *synch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_synch]h amdgpu_sync}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hsynch]hsync}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t starth](h)}(hhh]j)}(huint64_th]huint64_t}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjHmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhj?ubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(hstarth]hstart}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h uint64_t lasth](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hlasth]hlast}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t flagsh](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t offseth](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t vram_baseh](h)}(hhh]j)}(huint64_th]huint64_t}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjhmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhj_ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(h vram_baseh]h vram_base}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct ttm_resource *resh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h ttm_resourceh]h ttm_resource}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hresh]hres}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hdma_addr_t *pages_addrh](h)}(hhh]j)}(h dma_addr_th]h dma_addr_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjJhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(h pages_addrh]h pages_addr}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct dma_fence **fenceh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(h dma_fenceh]h dma_fence}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j[c.amdgpu_vm_update_rangeasbuh1hhjlubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjlubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjlubj)}(hfenceh]hfence}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMSubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhMSubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMShjhhubj[)}(hhh]h)}(h#update a range in the vm page tableh]h#update a range in the vm page table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMShjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhMSubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer to use for commands ``struct amdgpu_vm *vm`` the VM to update the range ``bool immediate`` immediate submission in a page fault ``bool unlocked`` unlocked invalidation during MM callback ``bool flush_tlb`` trigger tlb invalidation after update completed ``bool allow_override`` change MTYPE for local NUMA nodes ``struct amdgpu_sync *sync`` fences we need to sync to ``uint64_t start`` start of mapped range ``uint64_t last`` last mapped entry ``uint64_t flags`` flags for the entries ``uint64_t offset`` offset into nodes and pages_addr ``uint64_t vram_base`` base for vram mappings ``struct ttm_resource *res`` ttm_resource to map ``dma_addr_t *pages_addr`` DMA addresses to use for mapping ``struct dma_fence **fence`` optional resulting fence **Description** Fill in the page table entries between **start** and **last**. **Return** 0 for success, negative erro code for failure.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMWhjubj )}(hhh](j)}(hI``struct amdgpu_device *adev`` amdgpu_device pointer to use for commands h](j)}(h``struct amdgpu_device *adev``h]j:)}(hj?h]hstruct amdgpu_device *adev}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj=ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMUhj9ubj$)}(hhh]h)}(h)amdgpu_device pointer to use for commandsh]h)amdgpu_device pointer to use for commands}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMUhjUubah}(h]h ]h"]h$]h&]uh1j#hj9ubeh}(h]h ]h"]h$]h&]uh1j hjThMUhj6ubj)}(h4``struct amdgpu_vm *vm`` the VM to update the range h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hjxh]hstruct amdgpu_vm *vm}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMVhjrubj$)}(hhh]h)}(hthe VM to update the rangeh]hthe VM to update the range}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMVhjubah}(h]h ]h"]h$]h&]uh1j#hjrubeh}(h]h ]h"]h$]h&]uh1j hjhMVhj6ubj)}(h8``bool immediate`` immediate submission in a page fault h](j)}(h``bool immediate``h]j:)}(hjh]hbool immediate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMWhjubj$)}(hhh]h)}(h$immediate submission in a page faulth]h$immediate submission in a page fault}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMWhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMWhj6ubj)}(h;``bool unlocked`` unlocked invalidation during MM callback h](j)}(h``bool unlocked``h]j:)}(hjh]h bool unlocked}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMXhjubj$)}(hhh]h)}(h(unlocked invalidation during MM callbackh]h(unlocked invalidation during MM callback}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMXhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMXhj6ubj)}(hC``bool flush_tlb`` trigger tlb invalidation after update completed h](j)}(h``bool flush_tlb``h]j:)}(hj#h]hbool flush_tlb}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj!ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMYhjubj$)}(hhh]h)}(h/trigger tlb invalidation after update completedh]h/trigger tlb invalidation after update completed}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMYhj9ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj8hMYhj6ubj)}(h:``bool allow_override`` change MTYPE for local NUMA nodes h](j)}(h``bool allow_override``h]j:)}(hj\h]hbool allow_override}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjZubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMZhjVubj$)}(hhh]h)}(h!change MTYPE for local NUMA nodesh]h!change MTYPE for local NUMA nodes}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMZhjrubah}(h]h ]h"]h$]h&]uh1j#hjVubeh}(h]h ]h"]h$]h&]uh1j hjqhMZhj6ubj)}(h7``struct amdgpu_sync *sync`` fences we need to sync to h](j)}(h``struct amdgpu_sync *sync``h]j:)}(hjh]hstruct amdgpu_sync *sync}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: 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./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMahj{ubh)}(h9Make sure all BOs which are moved are updated in the PTs.h]h9Make sure all BOs which are moved are updated in the PTs.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM`hj{ubh)}(hPTs have to be reserved!h]hPTs have to be reserved!}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMchj{ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMehj{ubh)}(h0 for success.h]h0 for success.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMchj{ubeh}(h]h ] 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*adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj%modnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_flush_compute_tlbasbuh1hhjubj)}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjQhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j?c.amdgpu_vm_flush_compute_tlbasbuh1hhjsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjsubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t flush_typeh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j?c.amdgpu_vm_flush_compute_tlbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h flush_typeh]h flush_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t xcc_maskh](h)}(hhh]j)}(huint32_th]huint32_t}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj4modnameN classnameNjj)}j]j?c.amdgpu_vm_flush_compute_tlbasbuh1hhj+ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(hxcc_maskh]hxcc_mask}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMhjhhubj[)}(hhh]h)}(hFlush TLB on compute VMh]hFlush TLB on compute VM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hXL**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_vm *vm`` requested vm ``uint32_t flush_type`` flush type ``uint32_t xcc_mask`` mask of XCCs that belong to the compute partition in need of a TLB flush. **Description** Flush TLB if needed for a compute VM. **Return** 0 for success.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(h&``struct amdgpu_vm *vm`` requested vm h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hjh]hstruct amdgpu_vm *vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(h requested vmh]h requested vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubj)}(h#``uint32_t flush_type`` flush type h](j)}(h``uint32_t flush_type``h]j:)}(hj;h]huint32_t flush_type}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj9ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj5ubj$)}(hhh]h)}(h flush typeh]h flush type}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMhjQubah}(h]h ]h"]h$]h&]uh1j#hj5ubeh}(h]h ]h"]h$]h&]uh1j hjPhMhjubj)}(h```uint32_t xcc_mask`` mask of XCCs that belong to the compute partition in need of a TLB flush. h](j)}(h``uint32_t xcc_mask``h]j:)}(hjth]huint32_t xcc_mask}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjrubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjnubj$)}(hhh]h)}(hImask of XCCs that belong to the compute partition in need of a TLB flush.h]hImask of XCCs that belong to the compute partition in need of a TLB flush.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjnubeh}(h]h ]h"]h$]h&]uh1j hjhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(h%Flush TLB if needed for a compute VM.h]h%Flush TLB if needed for a compute VM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(h0 for success.h]h0 for success.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_bo_add (C function)c.amdgpu_vm_bo_addhNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hostruct amdgpu_bo_va * amdgpu_vm_bo_add (struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo *bo)h]jn)}(hmstruct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo *bo)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hMubh)}(hhh]j)}(h amdgpu_bo_vah]h amdgpu_bo_va}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj<modnameN classnameNjj)}j]j)}jamdgpu_vm_bo_addsbc.amdgpu_vm_bo_addasbuh1hhjhhhj(hMubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hMubj)}(hjh]h*}(hjihhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjhhhj(hMubj)}(hamdgpu_vm_bo_addh]j)}(hjXh]hamdgpu_vm_bo_add}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj(hMubj)}(hH(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo *bo)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jVc.amdgpu_vm_bo_addasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj%modnameN classnameNjj)}j]jVc.amdgpu_vm_bo_addasbuh1hhjubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjOhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hvmh]hvm}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jVc.amdgpu_vm_bo_addasbuh1hhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjqubj)}(hboh]hbo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj(hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhj(hMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj(hMhjhhubj[)}(hhh]h)}(hadd a bo to a specific vmh]hadd a bo to a specific vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj(hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hXY**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_vm *vm`` requested vm ``struct amdgpu_bo *bo`` amdgpu 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Add **bo** to the list of bos associated with the vm Object has to be reserved! **Return** Newly added bo_va or NULL for failureh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hj7h]hstruct amdgpu_device *adev}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj5ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj1ubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhMhjMubah}(h]h ]h"]h$]h&]uh1j#hj1ubeh}(h]h ]h"]h$]h&]uh1j hjLhMhj.ubj)}(h&``struct amdgpu_vm *vm`` requested vm h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hjph]hstruct amdgpu_vm *vm}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjnubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjjubj$)}(hhh]h)}(h requested vmh]h requested vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjjubeh}(h]h ]h"]h$]h&]uh1j hjhMhj.ubj)}(h.``struct amdgpu_bo *bo`` amdgpu buffer object h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hjh]hstruct amdgpu_bo *bo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(hamdgpu buffer objecth]hamdgpu buffer object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhj.ubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(hVAdd **bo** into the requested vm. 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Add }(hjhhhNhNubj)}(h**bo**h]hbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh* to the list of bos associated with the vm}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(hObject has to be reserved!h]hObject has to be reserved!}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(h **Return**h]j)}(hj>h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubh)}(h%Newly added bo_va or NULL for failureh]h%Newly added bo_va or NULL for failure}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^$amdgpu_vm_bo_insert_map (C function)c.amdgpu_vm_bo_insert_maphNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h{void amdgpu_vm_bo_insert_map (struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, struct amdgpu_bo_va_mapping *mapping)h]jn)}(hzvoid amdgpu_vm_bo_insert_map(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, struct amdgpu_bo_va_mapping *mapping)h](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hamdgpu_vm_bo_insert_maph]j)}(hamdgpu_vm_bo_insert_maph]hamdgpu_vm_bo_insert_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h^(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, struct amdgpu_bo_va_mapping *mapping)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_bo_insert_mapasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_bo_va *bo_vah](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(h amdgpu_bo_vah]h amdgpu_bo_va}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjRmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_insert_mapasbuh1hhj.ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(hjh]h*}(hj|hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj.ubj)}(hbo_vah]hbo_va}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h$struct amdgpu_bo_va_mapping *mappingh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hamdgpu_bo_va_mappingh]hamdgpu_bo_va_mapping}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_insert_mapasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hmappingh]hmapping}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj{hhhjhMubah}(h]jvah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhMhjxhhubj[)}(hhh]h)}(hinsert a new mappingh]hinsert a new mapping}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj hhubah}(h]h ]h"]h$]h&]uh1jZhjxhhhjhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj;jj;jjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_bo_va *bo_va`` bo_va to store the address ``struct amdgpu_bo_va_mapping *mapping`` the mapping to insert **Description** Insert a new mapping into all structures.h](h)}(h**Parameters**h]j)}(hjEh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj?ubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjdh]hstruct amdgpu_device *adev}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjbubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj^ubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMhjzubah}(h]h ]h"]h$]h&]uh1j#hj^ubeh}(h]h ]h"]h$]h&]uh1j hjyhMhj[ubj)}(h:``struct amdgpu_bo_va *bo_va`` bo_va to store the address h](j)}(h``struct amdgpu_bo_va *bo_va``h]j:)}(hjh]hstruct amdgpu_bo_va *bo_va}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjubj$)}(hhh]h)}(hbo_va to store the addressh]hbo_va to store the address}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhM hj[ubj)}(h?``struct amdgpu_bo_va_mapping *mapping`` the mapping to insert h](j)}(h(``struct amdgpu_bo_va_mapping *mapping``h]j:)}(hjh]h$struct amdgpu_bo_va_mapping *mapping}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjubj$)}(hhh]h)}(hthe mapping to inserth]hthe mapping to insert}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhM hj[ubeh}(h]h ]h"]h$]h&]uh1jhj?ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj?ubh)}(h)Insert a new mapping into all structures.h]h)Insert a new mapping into all structures.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_bo_map (C function)c.amdgpu_vm_bo_maphNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hint amdgpu_vm_bo_map (struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint32_t flags)h]jn)}(hint amdgpu_vm_bo_map(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint32_t flags)h](jt)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjRhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMBubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhhjdhMBubj)}(hamdgpu_vm_bo_maph]j)}(hamdgpu_vm_bo_maph]hamdgpu_vm_bo_map}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ](jjeh"]h$]h&]jjuh1jhjRhhhjdhMBubj)}(hx(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint32_t flags)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjysbc.amdgpu_vm_bo_mapasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_bo_va *bo_vah](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_bo_vah]h amdgpu_bo_va}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj%modnameN classnameNjj)}j]jc.amdgpu_vm_bo_mapasbuh1hhjubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjOhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hbo_vah]hbo_va}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t saddrh](h)}(hhh]j)}(huint64_th]huint64_t}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjzmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_mapasbuh1hhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(hsaddrh]hsaddr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t offseth](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_mapasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h uint64_t sizeh](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]jc.amdgpu_vm_bo_mapasbuh1hhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsizeh]hsize}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t flagsh](h)}(hhh]j)}(huint32_th]huint32_t}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjRmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_mapasbuh1hhjIubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(hflagsh]hflags}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjRhhhjdhMBubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjNhhhjdhMBubah}(h]jIah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjdhMBhjKhhubj[)}(hhh]h)}(hmap bo inside a vmh]hmap bo inside a vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMBhjhhubah}(h]h ]h"]h$]h&]uh1jZhjKhhhjdhMBubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_bo_va *bo_va`` bo_va to store the address ``uint64_t saddr`` where to map the BO ``uint64_t offset`` requested offset in the BO ``uint64_t size`` BO size in bytes ``uint32_t flags`` attributes of pages (read/write/valid/etc.) **Description** Add a mapping of the BO at the specefied addr into the VM. Object has to be reserved and unreserved outside! **Return** 0 for success, error for failure.h](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMFhjubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMDhjubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMDhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMDhjubj)}(h:``struct amdgpu_bo_va *bo_va`` bo_va to store the address h](j)}(h``struct amdgpu_bo_va *bo_va``h]j:)}(hj h]hstruct amdgpu_bo_va *bo_va}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMEhjubj$)}(hhh]h)}(hbo_va to store the addressh]hbo_va to store the address}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMEhj6ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj5hMEhjubj)}(h'``uint64_t saddr`` where to map the BO h](j)}(h``uint64_t saddr``h]j:)}(hjYh]huint64_t saddr}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjWubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMFhjSubj$)}(hhh]h)}(hwhere to map the BOh]hwhere to map the BO}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMFhjoubah}(h]h ]h"]h$]h&]uh1j#hjSubeh}(h]h ]h"]h$]h&]uh1j hjnhMFhjubj)}(h/``uint64_t offset`` requested offset in the BO h](j)}(h``uint64_t offset``h]j:)}(hjh]huint64_t offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMGhjubj$)}(hhh]h)}(hrequested offset in the BOh]hrequested offset in the BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMGhjubj)}(h#``uint64_t size`` BO size in bytes h](j)}(h``uint64_t size``h]j:)}(hjh]h uint64_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMHhjubj$)}(hhh]h)}(hBO size in bytesh]hBO size in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMHhjubj)}(h?``uint32_t flags`` attributes of pages (read/write/valid/etc.) h](j)}(h``uint32_t flags``h]j:)}(hjh]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMIhjubj$)}(hhh]h)}(h+attributes of pages (read/write/valid/etc.)h]h+attributes of pages (read/write/valid/etc.)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMIhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMIhjubeh}(h]h ]h"]h$]h&]uh1jhjubh)}(h**Description**h]j)}(hj?h]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMKhjubh)}(h:Add a mapping of the BO at the specefied addr into the VM.h]h:Add a mapping of the BO at the specefied addr into the VM.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMJhjubh)}(h1Object has to be reserved and unreserved outside!h]h1Object has to be reserved and unreserved outside!}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMMhjubh)}(h **Return**h]j)}(hjuh]hReturn}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMOhjubh)}(h!0 for success, error for failure.h]h!0 for success, error for failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^%amdgpu_vm_bo_replace_map (C function)c.amdgpu_vm_bo_replace_maphNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hint amdgpu_vm_bo_replace_map (struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint32_t flags)h]jn)}(hint amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint32_t flags)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM|ubj)}(hamdgpu_vm_bo_replace_maph]j)}(hamdgpu_vm_bo_replace_maph]hamdgpu_vm_bo_replace_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM|ubj)}(hx(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint32_t flags)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_bo_replace_mapasbuh1hhjubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjChhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_bo_va *bo_vah](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubh)}(hhh]j)}(h amdgpu_bo_vah]h amdgpu_bo_va}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j1c.amdgpu_vm_bo_replace_mapasbuh1hhjeubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjeubj)}(hbo_vah]hbo_va}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t saddrh](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j1c.amdgpu_vm_bo_replace_mapasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsaddrh]hsaddr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint64_t offseth](h)}(hhh]j)}(huint64_th]huint64_t}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj&modnameN classnameNjj)}j]j1c.amdgpu_vm_bo_replace_mapasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h uint64_t sizeh](h)}(hhh]j)}(huint64_th]huint64_t}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjnmodnameN classnameNjj)}j]j1c.amdgpu_vm_bo_replace_mapasbuh1hhjeubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t flagsh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j1c.amdgpu_vm_bo_replace_mapasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM|ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhM|ubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhM|hjhhubj[)}(hhh]h)}(h/map bo inside a vm, replacing existing mappingsh]h/map bo inside a vm, replacing existing mappings}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM|hjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhM|ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj"jj"jjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_bo_va *bo_va`` bo_va to store the address ``uint64_t saddr`` where to map the BO ``uint64_t offset`` requested offset in the BO ``uint64_t size`` BO size in bytes ``uint32_t flags`` attributes of pages (read/write/valid/etc.) **Description** Add a mapping of the BO at the specefied addr into the VM. Replace existing mappings as we do so. Object has to be reserved and unreserved outside! **Return** 0 for success, error for failure.h](h)}(h**Parameters**h]j)}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj&ubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjKh]hstruct amdgpu_device *adev}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjIubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM~hjEubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM~hjaubah}(h]h ]h"]h$]h&]uh1j#hjEubeh}(h]h ]h"]h$]h&]uh1j hj`hM~hjBubj)}(h:``struct amdgpu_bo_va *bo_va`` bo_va to store the address h](j)}(h``struct amdgpu_bo_va *bo_va``h]j:)}(hjh]hstruct amdgpu_bo_va *bo_va}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj~ubj$)}(hhh]h)}(hbo_va to store the addressh]hbo_va to store the address}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hj~ubeh}(h]h ]h"]h$]h&]uh1j hjhMhjBubj)}(h'``uint64_t saddr`` where to map the BO h](j)}(h``uint64_t saddr``h]j:)}(hjh]huint64_t saddr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(hwhere to map the BOh]hwhere to map the BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhMhjBubj)}(h/``uint64_t offset`` requested offset in the BO h](j)}(h``uint64_t offset``h]j:)}(hjh]huint64_t offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(hrequested offset in the BOh]hrequested offset in the BO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj hMhjBubj)}(h#``uint64_t size`` BO size in bytes h](j)}(h``uint64_t size``h]j:)}(hj/h]h uint64_t size}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj-ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj)ubj$)}(hhh]h)}(hBO size in bytesh]hBO size in bytes}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjEubah}(h]h ]h"]h$]h&]uh1j#hj)ubeh}(h]h ]h"]h$]h&]uh1j hjDhMhjBubj)}(h?``uint32_t flags`` attributes of pages (read/write/valid/etc.) h](j)}(h``uint32_t flags``h]j:)}(hjhh]huint32_t flags}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjfubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjbubj$)}(hhh]h)}(h+attributes of pages (read/write/valid/etc.)h]h+attributes of pages (read/write/valid/etc.)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj~ubah}(h]h ]h"]h$]h&]uh1j#hjbubeh}(h]h ]h"]h$]h&]uh1j hj}hMhjBubeh}(h]h ]h"]h$]h&]uh1jhj&ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj&ubh)}(haAdd a mapping of the BO at the specefied addr into the VM. Replace existing mappings as we do so.h]haAdd a mapping of the BO at the specefied addr into the VM. Replace existing mappings as we do so.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj&ubh)}(h1Object has to be reserved and unreserved outside!h]h1Object has to be reserved and unreserved outside!}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj&ubh)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj&ubh)}(h!0 for success, error for failure.h]h!0 for success, error for failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_bo_unmap (C function)c.amdgpu_vm_bo_unmaphNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h_int amdgpu_vm_bo_unmap (struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr)h]jn)}(h^int amdgpu_vm_bo_unmap(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj,hMubj)}(hamdgpu_vm_bo_unmaph]j)}(hamdgpu_vm_bo_unmaph]hamdgpu_vm_bo_unmap}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj,hMubj)}(hH(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj{modnameN classnameNjj)}j]j)}jjAsbc.amdgpu_vm_bo_unmapasbuh1hhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjWubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjSubj)}(hstruct amdgpu_bo_va *bo_vah](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_bo_vah]h amdgpu_bo_va}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_unmapasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hbo_vah]hbo_va}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjSubj)}(huint64_t saddrh](h)}(hhh]j)}(huint64_th]huint64_t}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjBmodnameN classnameNjj)}j]jc.amdgpu_vm_bo_unmapasbuh1hhj9ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(hsaddrh]hsaddr}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjSubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj,hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhj,hMubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj,hMhjhhubj[)}(hhh]h)}(hremove bo mapping from vmh]hremove bo mapping from vm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjhhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj,hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hXl**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_bo_va *bo_va`` bo_va to remove the address from ``uint64_t saddr`` where to the BO is mapped **Description** Remove a mapping of the BO at the specefied addr from the VM. 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]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubj$)}(hhh]h)}(hrequested bo_vah]hrequested bo_va}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hMhjH ubeh}(h]h ]h"]h$]h&]uh1jhj, ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj, ubh)}(h+Remove **bo_va->bo** from the requested vm.h](hRemove }(hj hhhNhNubj)}(h **bo_va->bo**h]h bo_va->bo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh from the requested vm.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj, ubh)}(hObject have to be reserved!h]hObject have to be reserved!}(hj hhhNhNubah}(h]h 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amdgpu_boh]h amdgpu_bo}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj modnameN classnameNjj)}j]j)}jjM sbc.amdgpu_vm_evictableasbuh1hhjc ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc ubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjc ubj)}(hboh]hbo}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj_ ubah}(h]h ]h"]h$]h&]jjuh1jhj' hhhj8 hMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj# hhhj8 hMubah}(h]j ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj8 hMhj hhubj[)}(hhh]h)}(hcheck if we can evict a VMh]hcheck if we can evict a VM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj hhubah}(h]h ]h"]h$]h&]uh1jZhj hhhj8 hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj jj jjjuh1jbhhhjhNhNubj)}(h{**Parameters** ``struct amdgpu_bo *bo`` A page table of the VM. **Description** Check if it is possible to evict a VM.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubj )}(hhh]j)}(h1``struct amdgpu_bo *bo`` A page table of the VM. h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hj+ h]hstruct amdgpu_bo *bo}(hj- hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj) ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj% ubj$)}(hhh]h)}(hA page table of the VM.h]hA page table of the VM.}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@ hMhjA ubah}(h]h ]h"]h$]h&]uh1j#hj% ubeh}(h]h ]h"]h$]h&]uh1j hj@ hMhj" ubah}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjf h]h Description}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjd ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubh)}(h&Check if it is possible to evict a VM.h]h&Check if it is possible to evict a VM.}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^$amdgpu_vm_bo_invalidate (C function)c.amdgpu_vm_bo_invalidatehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hAvoid amdgpu_vm_bo_invalidate (struct amdgpu_bo *bo, bool evicted)h]jn)}(h@void amdgpu_vm_bo_invalidate(struct amdgpu_bo *bo, bool evicted)h](jt)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hamdgpu_vm_bo_invalidateh]j)}(hamdgpu_vm_bo_invalidateh]hamdgpu_vm_bo_invalidate}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMubj)}(h$(struct amdgpu_bo *bo, bool evicted)h](j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hj 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]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj hhubah}(h]h ]h"]h$]h&]uh1jZhj hhhj hMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj jj jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_bo *bo`` amdgpu buffer object ``bool evicted`` is the BO evicted **Description** Mark **bo** as invalid.h](h)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubj )}(hhh](j)}(h.``struct amdgpu_bo *bo`` amdgpu buffer object h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hj h]hstruct amdgpu_bo *bo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubj$)}(hhh]h)}(hamdgpu buffer objecth]hamdgpu buffer object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hMhj ubj)}(h#``bool evicted`` is the BO evicted h](j)}(h``bool evicted``h]j:)}(hjh]h bool evicted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhjubj$)}(hhh]h)}(his the BO evictedh]his the BO evicted}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj/ubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hj.hMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubh)}(h**Description**h]j)}(hjTh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubh)}(hMark **bo** as invalid.h](hMark }(hjjhhhNhNubj)}(h**bo**h]hbo}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjjubh as invalid.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_bo_move (C function)c.amdgpu_vm_bo_movehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hYvoid amdgpu_vm_bo_move (struct amdgpu_bo *bo, struct ttm_resource *new_mem, bool evicted)h]jn)}(hXvoid amdgpu_vm_bo_move(struct amdgpu_bo *bo, struct ttm_resource *new_mem, bool evicted)h](jt)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hamdgpu_vm_bo_moveh]j)}(hamdgpu_vm_bo_moveh]hamdgpu_vm_bo_move}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(hB(struct amdgpu_bo *bo, struct ttm_resource *new_mem, bool evicted)h](j)}(hstruct amdgpu_bo *boh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_boh]h amdgpu_bo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_bo_moveasbuh1hhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj4hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hboh]hbo}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct ttm_resource *new_memh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubh)}(hhh]j)}(h ttm_resourceh]h ttm_resource}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjzmodnameN classnameNjj)}j]j"c.amdgpu_vm_bo_moveasbuh1hhjVubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjVubj)}(hnew_memh]hnew_mem}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool evictedh](jt)}(hjwh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hevictedh]hevicted}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhM ubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhM hjhhubj[)}(hhh]h)}(hhandle BO moveh]hhandle BO move}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj hhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj'jj'jjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_bo *bo`` amdgpu buffer object ``struct ttm_resource *new_mem`` the new placement of the BO move ``bool evicted`` is the BO evicted **Description** Update the memory stats for the new placement and mark **bo** as invalid.h](h)}(h**Parameters**h]j)}(hj1h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ubj )}(hhh](j)}(h.``struct amdgpu_bo *bo`` amdgpu buffer object h](j)}(h``struct amdgpu_bo *bo``h]j:)}(hjPh]hstruct amdgpu_bo *bo}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjNubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjJubj$)}(hhh]h)}(hamdgpu buffer objecth]hamdgpu buffer object}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehM hjfubah}(h]h ]h"]h$]h&]uh1j#hjJubeh}(h]h ]h"]h$]h&]uh1j hjehM hjGubj)}(hB``struct ttm_resource *new_mem`` the new placement of the BO move h](j)}(h ``struct ttm_resource *new_mem``h]j:)}(hjh]hstruct ttm_resource *new_mem}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjubj$)}(hhh]h)}(h the new placement of the BO moveh]h the new placement of the BO move}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhM hjGubj)}(h#``bool evicted`` is the BO evicted h](j)}(h``bool evicted``h]j:)}(hjh]h bool evicted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjubj$)}(hhh]h)}(his the BO evictedh]his the BO evicted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhM hjGubeh}(h]h ]h"]h$]h&]uh1jhj+ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ubh)}(hIUpdate the memory stats for the new placement and mark **bo** as invalid.h](h7Update the memory stats for the new placement and mark }(hjhhhNhNubj)}(h**bo**h]hbo}(hjhhhNhNubah}(h]h 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](jjeh"]h$]h&]jjuh1jhjPhhhjxhM/ ubj)}(h(uint64_t vm_size)h]j)}(huint64_t vm_sizeh](h)}(hhh]j)}(huint64_th]huint64_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jsc.amdgpu_vm_get_block_sizeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hvm_sizeh]hvm_size}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjPhhhjxhM/ ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjLhhhjxhM/ ubah}(h]jGah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjxhM/ hjIhhubj[)}(hhh]h)}(h,calculate VM page table size as power of twoh]h,calculate VM page table size as power of two}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM/ hjhhubah}(h]h ]h"]h$]h&]uh1jZhjIhhhjxhM/ ubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hY**Parameters** ``uint64_t vm_size`` VM size **Return** VM page table as power of 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amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j:c.amdgpu_vm_get_task_info_pasidasbuh1hhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjuubj)}(hadevh]hadev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(h u32 pasidh](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j:c.amdgpu_vm_get_task_info_pasidasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpasidh]hpasid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhj hM ubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj hM hjhhubj[)}(hhh]h)}(hExtracts task info for a PASID.h]hExtracts task info for a PASID.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj?hhubah}(h]h ]h"]h$]h&]uh1jZhjhhhj hM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jjZjjZjjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` drm device pointer ``u32 pasid`` PASID identifier for VM **Description** Returns the reference counted task_info structure, which must be referenced down with amdgpu_vm_put_task_info.h](h)}(h**Parameters**h]j)}(hjdh]h Parameters}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj^ubj )}(hhh](j)}(h2``struct amdgpu_device *adev`` drm device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjh]hstruct amdgpu_device *adev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj}ubj$)}(hhh]h)}(hdrm device pointerh]hdrm device pointer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j#hj}ubeh}(h]h ]h"]h$]h&]uh1j hjhM hjzubj)}(h&``u32 pasid`` PASID identifier for VM h](j)}(h ``u32 pasid``h]j:)}(hjh]h u32 pasid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjubj$)}(hhh]h)}(hPASID identifier for VMh]hPASID identifier for VM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j#hjubeh}(h]h ]h"]h$]h&]uh1j hjhM hjzubeh}(h]h ]h"]h$]h&]uh1jhj^ubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj^ubh)}(hnReturns the reference counted task_info structure, which must be referenced down with amdgpu_vm_put_task_info.h]hnReturns the reference counted task_info structure, which must be referenced down with amdgpu_vm_put_task_info.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^$amdgpu_vm_set_task_info (C function)c.amdgpu_vm_set_task_infohNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h3void amdgpu_vm_set_task_info (struct amdgpu_vm *vm)h]jn)}(h2void amdgpu_vm_set_task_info(struct amdgpu_vm *vm)h](jt)}(hvoidh]hvoid}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj8hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhjJhM ubj)}(hamdgpu_vm_set_task_infoh]j)}(hamdgpu_vm_set_task_infoh]hamdgpu_vm_set_task_info}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubah}(h]h ](jjeh"]h$]h&]jjuh1jhj8hhhjJhM ubj)}(h(struct amdgpu_vm *vm)h]j)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jj_sbc.amdgpu_vm_set_task_infoasbuh1hhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjuubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubah}(h]h ]h"]h$]h&]jjuh1jhj8hhhjJhM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj4hhhjJhM ubah}(h]j/ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjJhM hj1hhubj[)}(hhh]h)}(hSets VMs task info.h]hSets VMs task info.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjhhubah}(h]h ]h"]h$]h&]uh1jZhj1hhhjJhM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jjjjjjjuh1jbhhhjhNhNubj)}(hG**Parameters** ``struct amdgpu_vm *vm`` vm for which to set the infoh](h)}(h**Parameters**h]j)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjubj )}(hhh]j)}(h5``struct amdgpu_vm *vm`` vm for which to set the infoh](j)}(h``struct amdgpu_vm *vm``h]j:)}(hj=h]hstruct amdgpu_vm *vm}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj;ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj7ubj$)}(hhh]h)}(hvm for which to set the infoh]hvm for which to set the info}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjSubah}(h]h ]h"]h$]h&]uh1j#hj7ubeh}(h]h ]h"]h$]h&]uh1j hjRhM hj4ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_init (C function)c.amdgpu_vm_inithNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hUint amdgpu_vm_init (struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id)h]jn)}(hTint amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id)h](jt)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hamdgpu_vm_inith]j)}(hamdgpu_vm_inith]hamdgpu_vm_init}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(hB(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.amdgpu_vm_initasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]h*}(hj hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjubj)}(hadevh]hadev}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjfmodnameN classnameNjj)}j]jc.amdgpu_vm_initasbuh1hhjBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjBubj)}(hvmh]hvm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hint32_t xcp_idh](h)}(hhh]j)}(hint32_th]hint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjmodnameN classnameNjj)}j]jc.amdgpu_vm_initasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hxcp_idh]hxcp_id}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhjhM ubah}(h]jah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhM hjhhubj[)}(hhh]h)}(hinitialize a vm instanceh]hinitialize a vm instance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj hhubah}(h]h ]h"]h$]h&]uh1jZhjhhhjhM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj' jj' jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_vm *vm`` requested vm ``int32_t xcp_id`` GPU partition selection id **Description** Init **vm** fields. **Return** 0 for success, error for failure.h](h)}(h**Parameters**h]j)}(hj1 h]h Parameters}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ ubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjP h]hstruct amdgpu_device *adev}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjN ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjJ ubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1hhje hM hjf ubah}(h]h ]h"]h$]h&]uh1j#hjJ ubeh}(h]h ]h"]h$]h&]uh1j hje hM hjG ubj)}(h&``struct amdgpu_vm *vm`` requested vm h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hj h]hstruct amdgpu_vm *vm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj ubj$)}(hhh]h)}(h requested vmh]h requested vm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hM hjG ubj)}(h.``int32_t xcp_id`` GPU partition selection id h](j)}(h``int32_t xcp_id``h]j:)}(hj h]hint32_t xcp_id}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj ubj$)}(hhh]h)}(hGPU partition selection idh]hGPU partition selection id}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j#hj ubeh}(h]h ]h"]h$]h&]uh1j hj hM hjG ubeh}(h]h ]h"]h$]h&]uh1jhj+ ubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ ubh)}(hInit **vm** fields.h](hInit }(hj!hhhNhNubj)}(h**vm**h]hvm}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubh fields.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ ubh)}(h **Return**h]j)}(hj6!h]hReturn}(hj8!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4!ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ ubh)}(h!0 for success, error for failure.h]h!0 for success, error for failure.}(hjL!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj+ ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_vm_make_compute (C function)c.amdgpu_vm_make_computehNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hMint amdgpu_vm_make_compute (struct amdgpu_device *adev, struct amdgpu_vm *vm)h]jn)}(hLint amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](jt)}(hinth]hint}(hj{!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjw!hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw!hhhj!hM ubj)}(hamdgpu_vm_make_computeh]j)}(hamdgpu_vm_make_computeh]hamdgpu_vm_make_compute}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjw!hhhj!hM ubj)}(h2(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj!modnameN classnameNjj)}j]j)}jj!sbc.amdgpu_vm_make_computeasbuh1hhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(hjh]h*}(hj"hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj!ubj)}(hadevh]hadev}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hj*"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&"ubj)}(h h]h }(hj7"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&"ubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hjH"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE"ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjJ"modnameN classnameNjj)}j]j!c.amdgpu_vm_make_computeasbuh1hhj&"ubj)}(h h]h }(hjf"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&"ubj)}(hjh]h*}(hjt"hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj&"ubj)}(hvmh]hvm}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubeh}(h]h ]h"]h$]h&]jjuh1jhjw!hhhj!hM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjs!hhhj!hM ubah}(h]jn!ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj!hM hjp!hhubj[)}(hhh]h)}(hTurn a GFX VM into a compute VMh]hTurn a GFX VM into a compute VM}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj"hhubah}(h]h ]h"]h$]h&]uh1jZhjp!hhhj!hM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj"jj"jjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_vm *vm`` requested vm **Description** This only works on GFX VMs that don't have any BOs added and no page tables allocated yet. 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use_cpu_for_update - pte_supports_atsh]hLChanges the following VM parameters: - use_cpu_for_update - pte_supports_ats}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj"ubh)}(hDReinitializes the page directory to reflect the changed ATS setting.h]hDReinitializes the page directory to reflect the changed ATS setting.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj"ubh)}(h **Return**h]j)}(hj#h]hReturn}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj"ubh)}(h!0 for success, -errno for errors.h]h!0 for success, -errno for errors.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amdgpu_vm_fini (C function)c.amdgpu_vm_finihNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(hFvoid amdgpu_vm_fini (struct amdgpu_device *adev, struct amdgpu_vm *vm)h]jn)}(hEvoid amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](jt)}(hvoidh]hvoid}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj#hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM ubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj#hM ubj)}(hamdgpu_vm_finih]j)}(hamdgpu_vm_finih]hamdgpu_vm_fini}(hj $hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#hhhj#hM ubj)}(h2(struct amdgpu_device *adev, struct amdgpu_vm *vm)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj'$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#$ubj)}(h h]h }(hj4$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#$ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjE$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB$ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjG$modnameN classnameNjj)}j]j)}jj $sbc.amdgpu_vm_finiasbuh1hhj#$ubj)}(h h]h }(hje$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#$ubj)}(hjh]h*}(hjs$hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj#$ubj)}(hadevh]hadev}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(hstruct amdgpu_vm *vmh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(h amdgpu_vmh]h amdgpu_vm}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj$modnameN classnameNjj)}j]ja$c.amdgpu_vm_finiasbuh1hhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(hjh]h*}(hj$hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj$ubj)}(hvmh]hvm}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubeh}(h]h ]h"]h$]h&]jjuh1jhj#hhhj#hM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj#hhhj#hM ubah}(h]j#ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj#hM hj#hhubj[)}(hhh]h)}(htear down a vm instanceh]htear down a vm instance}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj%hhubah}(h]h ]h"]h$]h&]uh1jZhj#hhhj#hM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj2%jj2%jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer ``struct amdgpu_vm *vm`` requested vm **Description** Tear down **vm**. Unbind the VM and remove all bos from the vm bo listh](h)}(h**Parameters**h]j)}(hj<%h]h Parameters}(hj>%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:%ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj6%ubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hj[%h]hstruct amdgpu_device *adev}(hj]%hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjY%ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjU%ubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hjt%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjp%hM hjq%ubah}(h]h ]h"]h$]h&]uh1j#hjU%ubeh}(h]h ]h"]h$]h&]uh1j hjp%hM hjR%ubj)}(h&``struct amdgpu_vm *vm`` requested vm h](j)}(h``struct amdgpu_vm *vm``h]j:)}(hj%h]hstruct amdgpu_vm *vm}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj%ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj%ubj$)}(hhh]h)}(h requested vmh]h requested vm}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hM hj%ubah}(h]h ]h"]h$]h&]uh1j#hj%ubeh}(h]h ]h"]h$]h&]uh1j hj%hM hjR%ubeh}(h]h ]h"]h$]h&]uh1jhj6%ubh)}(h**Description**h]j)}(hj%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj6%ubh)}(hFTear down **vm**. Unbind the VM and remove all bos from the vm bo listh](h Tear down }(hj%hhhNhNubj)}(h**vm**h]hvm}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubh6. Unbind the VM and remove all bos from the vm bo list}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj6%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_vm_manager_init (C function)c.amdgpu_vm_manager_inithNtauh1jQhjhhhNhNubjc)}(hhh](jh)}(h8void amdgpu_vm_manager_init (struct amdgpu_device *adev)h]jn)}(h7void amdgpu_vm_manager_init(struct amdgpu_device *adev)h](jt)}(hvoidh]hvoid}(hj&&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj"&hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM ubj)}(h h]h }(hj5&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"&hhhj4&hM ubj)}(hamdgpu_vm_manager_inith]j)}(hamdgpu_vm_manager_inith]hamdgpu_vm_manager_init}(hjG&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC&ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj"&hhhj4&hM ubj)}(h(struct amdgpu_device *adev)h]j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjc&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_&ubj)}(h h]h }(hjp&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_&ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~&ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj&modnameN classnameNjj)}j]j)}jjI&sbc.amdgpu_vm_manager_initasbuh1hhj_&ubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_&ubj)}(hjh]h*}(hj&hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj_&ubj)}(hadevh]hadev}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_&ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[&ubah}(h]h ]h"]h$]h&]jjuh1jhj"&hhhj4&hM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj&hhhj4&hM ubah}(h]j&ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj4&hM hj&hhubj[)}(hhh]h)}(hinit the VM managerh]hinit the VM manager}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj&hhubah}(h]h ]h"]h$]h&]uh1jZhj&hhhj4&hM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj&jj&jjjuh1jbhhhjhNhNubj)}(h}**Parameters** ``struct amdgpu_device *adev`` amdgpu_device pointer **Description** Initialize the VM manager structuresh](h)}(h**Parameters**h]j)}(hj'h]h Parameters}(hj 'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj'ubj )}(hhh]j)}(h5``struct amdgpu_device *adev`` amdgpu_device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hj''h]hstruct amdgpu_device *adev}(hj)'hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj%'ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj!'ubj$)}(hhh]h)}(hamdgpu_device pointerh]hamdgpu_device pointer}(hj@'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<'hM hj='ubah}(h]h ]h"]h$]h&]uh1j#hj!'ubeh}(h]h ]h"]h$]h&]uh1j hj<'hM hj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubh)}(h**Description**h]j)}(hjb'h]h Description}(hjd'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`'ubah}(h]h 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]jah"]h$]h&]uh1jshj$)hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMN ubj)}(h h]h }(hj7)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$)hhhj6)hMN ubj)}(hamdgpu_vm_ioctlh]j)}(hamdgpu_vm_ioctlh]hamdgpu_vm_ioctl}(hjI)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE)ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$)hhhj6)hMN ubj)}(h;(struct drm_device *dev, void *data, struct drm_file *filp)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hje)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja)ubj)}(h h]h }(hjr)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja)ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj)modnameN classnameNjj)}j]j)}jjK)sbc.amdgpu_vm_ioctlasbuh1hhja)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja)ubj)}(hjh]h*}(hj)hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhja)ubj)}(hdevh]hdev}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj])ubj)}(h void *datah](jt)}(hvoidh]hvoid}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(hjh]h*}(hj)hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj)ubj)}(hdatah]hdata}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj])ubj)}(hstruct drm_file *filph](j)}(hjh]hstruct}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj&*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(hdrm_fileh]hdrm_file}(hj7*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4*ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj9*modnameN classnameNjj)}j]j)c.amdgpu_vm_ioctlasbuh1hhj*ubj)}(h h]h }(hjU*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(hjh]h*}(hjc*hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj*ubj)}(hfilph]hfilp}(hjp*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj])ubeh}(h]h ]h"]h$]h&]jjuh1jhj$)hhhj6)hMN ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj )hhhj6)hMN ubah}(h]j)ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj6)hMN hj)hhubj[)}(hhh]h)}(h%Manages VMID reservation for vm hubs.h]h%Manages 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amdgpu_device}(hje,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjb,ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjg,modnameN classnameNjj)}j]j,c.amdgpu_vm_lock_by_pasidasbuh1hhjC,ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC,ubj)}(hjh]h*}(hj,hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjC,ubj)}(hadevh]hadev}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?,ubj)}(h u32 pasidh](h)}(hhh]j)}(hu32h]hu32}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj,modnameN classnameNjj)}j]j,c.amdgpu_vm_lock_by_pasidasbuh1hhj,ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hpasidh]hpasid}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?,ubj)}(hstruct drm_exec *exech](j)}(hjh]hstruct}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj -hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(hdrm_exech]hdrm_exec}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj-modnameN classnameNjj)}j]j,c.amdgpu_vm_lock_by_pasidasbuh1hhj,ubj)}(h h]h }(hj;-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hjh]h*}(hjI-hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj,ubj)}(hexech]hexec}(hjV-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?,ubeh}(h]h ]h"]h$]h&]jjuh1jhj+hhhj+hMq ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj+hhhj+hMq ubah}(h]j+ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj+hMq hj+hhubj[)}(hhh]h)}(h*look up a VM by PASID and lock its root PDh]h*look up a VM by PASID and lock its root PD}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMq hj}-hhubah}(h]h ]h"]h$]h&]uh1jZhj+hhhj+hMq ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj-jj-jjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``u32 pasid`` PASID of the VM ``struct drm_exec *exec`` drm_exec context to lock the root PD in **Description** Must be called from within a drm_exec_until_all_locked() loop; the caller runs drm_exec_retry_on_contention() afterwards. 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The drm_exec context holds a reference on the root BO until it is finalised.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMu hj-ubh)}(h **Return**h]j)}(hj.h]hReturn}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMy hj-ubh)}(hlthe VM on success, or NULL if the PASID has no VM, the VM is being torn down, or locking the root PD failed.h]hlthe VM on success, or NULL if the PASID has no VM, the VM is being torn down, or locking the root PD failed.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMz hj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^#amdgpu_vm_handle_fault (C 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classnameNjj)}j]jP/c.amdgpu_vm_handle_faultasbuh1hhj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(htsh]hts}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/ubj)}(hbool write_faulth](jt)}(hjwh]hbool}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h write_faulth]h write_fault}(hj 1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/ubeh}(h]h ]h"]h$]h&]jjuh1jhj.hhhj.hM ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj.hhhj.hM ubah}(h]j.ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj.hM hj.hhubj[)}(hhh]h)}(hgraceful handling of VM faults.h]hgraceful handling of VM faults.}(hj51hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj21hhubah}(h]h ]h"]h$]h&]uh1jZhj.hhhj.hM ubeh}(h]h ](j4functioneh"]h$]h&]jj4jjM1jjM1jjjuh1jbhhhjhNhNubj)}(hX**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``u32 pasid`` PASID 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Only applicable for GFX 9.4.3.}(hj:2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj72ubah}(h]h ]h"]h$]h&]uh1j#hj2ubeh}(h]h ]h"]h$]h&]uh1j hj62hM hjm1ubj)}(h'``uint64_t addr`` Address of the fault h](j)}(h``uint64_t addr``h]j:)}(hj[2h]h uint64_t addr}(hj]2hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjY2ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjU2ubj$)}(hhh]h)}(hAddress of the faulth]hAddress of the fault}(hjt2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjp2hM hjq2ubah}(h]h ]h"]h$]h&]uh1j#hjU2ubeh}(h]h ]h"]h$]h&]uh1j hjp2hM hjm1ubj)}(h'``uint64_t ts`` Timestamp of the fault h](j)}(h``uint64_t ts``h]j:)}(hj2h]h uint64_t ts}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj2ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj2ubj$)}(hhh]h)}(hTimestamp of the faulth]hTimestamp of the fault}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hM hj2ubah}(h]h ]h"]h$]h&]uh1j#hj2ubeh}(h]h ]h"]h$]h&]uh1j hj2hM hjm1ubj)}(h>``bool write_fault`` true is write fault, false is read fault h](j)}(h``bool write_fault``h]j:)}(hj2h]hbool write_fault}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj2ubah}(h]h ]h"]h$]h&]uh1jhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hj2ubj$)}(hhh]h)}(h(true is write fault, false is read faulth]h(true is write fault, false is read fault}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hM hj2ubah}(h]h ]h"]h$]h&]uh1j#hj2ubeh}(h]h ]h"]h$]h&]uh1j hj2hM hjm1ubeh}(h]h ]h"]h$]h&]uh1jhjQ1ubh)}(h**Description**h]j)}(hj3h]h Description}(hj 3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM hjQ1ubh)}(hmTry to gracefully handle a VM fault. Return true if the fault was handled and shouldn't be reported any more.h]hoTry to gracefully handle a VM fault. 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]j'ah"]h$]h&]uh1jhj3ubj)}(hjah]hm}(hjS4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubeh}(h]h ]h"]h$]h&]jjuh1jhjI3hhhj[3hM? ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjE3hhhj[3hM? ubah}(h]j@3ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj[3hM? hjB3hhubj[)}(hhh]h)}(hprint BO info for the VMh]hprint BO info for the VM}(hj|4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chM? hjy4hhubah}(h]h ]h"]h$]h&]uh1jZhjB3hhhj[3hM? ubeh}(h]h ](j4functioneh"]h$]h&]jj4jj4jj4jjjuh1jbhhhjhNhNubj)}(h**Parameters** ``struct amdgpu_vm *vm`` Requested VM for printing BO info ``struct seq_file *m`` debugfs file **Description** Print BO information in debugfs file for the VMh](h)}(h**Parameters**h]j)}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMC hj4ubj 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vmhub)h](jt)}(hvoidh]hvoid}(hjv5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjr5hhhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMX ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr5hhhj5hMX ubj)}(hamdgpu_vm_update_fault_cacheh]j)}(hamdgpu_vm_update_fault_cacheh]hamdgpu_vm_update_fault_cache}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjr5hhhj5hMX ubj)}(hd(struct amdgpu_device *adev, unsigned int pasid, uint64_t addr, uint32_t status, unsigned int vmhub)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj5modnameN classnameNjj)}j]j)}jj5sbc.amdgpu_vm_update_fault_cacheasbuh1hhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(hjh]h*}(hj5hhhNhNubah}(h]h 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classnameNjj)}j]j5c.amdgpu_vm_update_fault_cacheasbuh1hhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(hstatush]hstatus}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubj)}(hunsigned int vmhubh](jt)}(hunsignedh]hunsigned}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj7ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubjt)}(hinth]hint}(hj"7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj7ubj)}(h h]h }(hj07hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(hvmhubh]hvmhub}(hj>7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubeh}(h]h ]h"]h$]h&]jjuh1jhjr5hhhj5hMX ubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjn5hhhj5hMX ubah}(h]ji5ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj5hMX hjk5hhubj[)}(hhh]h)}(hupdate cached fault into.h]hupdate cached fault into.}(hjh7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:225: ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.chMX hje7hhubah}(h]h ]h"]h$]h&]uh1jZhjk5hhhj5hMX ubeh}(h]h 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amdgpu_deviceh]h amdgpu_device}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj9modnameN classnameNjj)}j]j)}jjv9sbc.amdgpu_irq_disable_allasbuh1hhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(hjh]h*}(hj9hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj9ubj)}(hadevh]hadev}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubah}(h]h ]h"]h$]h&]jjuh1jhjO9hhhja9hKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjK9hhhja9hKubah}(h]jF9ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghja9hKhjH9hhubj[)}(hhh]h)}(hdisable *all* interruptsh](hdisable }(hj:hhhNhNubhemphasis)}(h*all*h]hall}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j:hj:ubh interrupts}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj:hhubah}(h]h ]h"]h$]h&]uh1jZhjH9hhhja9hKubeh}(h]h ](j4functioneh"]h$]h&]jj4jj?:jj?:jjjuh1jbhhhj8hNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer 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]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetj>modnameN classnameNjj)}j]j)}jj>sbc.amdgpu_irq_handle_ih2asbuh1hhj>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(hjh]h*}(hj ?hhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj>ubj)}(hworkh]hwork}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubah}(h]h ]h"]h$]h&]jjuh1jhj>hhhj>hKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhj{>hhhj>hKubah}(h]jv>ah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghj>hKhjx>hhubj[)}(hhh]h)}(hkick of processing for IH2h]hkick of processing for IH2}(hjC?hhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj@?hhubah}(h]h ]h"]h$]h&]uh1jZhjx>hhhj>hKubeh}(h]h ](j4functioneh"]h$]h&]jj4jj[?jj[?jjjuh1jbhhhj8hNhNubj)}(h**Parameters** ``struct work_struct *work`` work structure in struct amdgpu_irq **Description** Kick of processing IH ring 2.h](h)}(h**Parameters**h]j)}(hje?h]h Parameters}(hjg?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjc?ubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj_?ubj )}(hhh]j)}(hA``struct work_struct *work`` work structure in struct amdgpu_irq h](j)}(h``struct work_struct *work``h]j:)}(hj?h]hstruct work_struct *work}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj?ubah}(h]h ]h"]h$]h&]uh1jho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj~?ubj$)}(hhh]h)}(h#work structure in struct amdgpu_irqh]h#work structure in struct amdgpu_irq}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj?ubah}(h]h ]h"]h$]h&]uh1j#hj~?ubeh}(h]h ]h"]h$]h&]uh1j hj?hKhj{?ubah}(h]h ]h"]h$]h&]uh1jhj_?ubh)}(h**Description**h]j)}(hj?h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj_?ubh)}(hKick of processing IH ring 2.h]hKick of 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structure in struct amdgpu_irq **Description** Kick of processing IH soft ring.h](h)}(h**Parameters**h]j)}(hj@h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj@ubj )}(hhh]j)}(hA``struct work_struct *work`` work structure in struct amdgpu_irq h](j)}(h``struct work_struct *work``h]j:)}(hjAh]hstruct work_struct *work}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjAubah}(h]h ]h"]h$]h&]uh1jho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chKhj@ubj$)}(hhh]h)}(h#work structure in struct amdgpu_irqh]h#work structure in struct amdgpu_irq}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKhjAubah}(h]h ]h"]h$]h&]uh1j#hj@ubeh}(h]h ]h"]h$]h&]uh1j hjAhKhj@ubah}(h]h ]h"]h$]h&]uh1jhj@ubh)}(h**Description**h]j)}(hj@Ah]h Description}(hjBAhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>Aubah}(h]h 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int client_id, unsigned int src_id, struct amdgpu_irq_src *source)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjFmodnameN classnameNjj)}j]j)}jjFsbc.amdgpu_irq_add_idasbuh1hhjFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(hjh]h*}(hjFhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjFubj)}(hadevh]hadev}(hj GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hunsigned int client_idh](jt)}(hunsignedh]hunsigned}(hj$GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj Gubj)}(h h]h }(hj2GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Gubjt)}(hinth]hint}(hj@GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshj Gubj)}(h h]h }(hjNGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Gubj)}(h client_idh]h client_id}(hj\GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Gubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hunsigned int src_idh](jt)}(hunsignedh]hunsigned}(hjuGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjqGubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqGubjt)}(hinth]hint}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjqGubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqGubj)}(hsrc_idh]hsrc_id}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqGubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hstruct amdgpu_irq_src *sourceh](j)}(hjh]hstruct}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubh)}(hhh]j)}(hamdgpu_irq_srch]hamdgpu_irq_src}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjGmodnameN classnameNjj)}j]jFc.amdgpu_irq_add_idasbuh1hhjGubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj)}(hjh]h*}(hjHhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjGubj)}(hsourceh]hsource}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubeh}(h]h ]h"]h$]h&]jjuh1jhjqFhhhjFhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjmFhhhjFhMubah}(h]jhFah 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./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjcHubh)}(h!Registers IRQ source on a client.h]h!Registers IRQ source on a client.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjcHubh)}(h **Return**h]j)}(hjIh]hReturn}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjcHubh)}(h$0 on success or error code otherwiseh]h$0 on success or error code otherwise}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjcHubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj8hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^ amdgpu_irq_dispatch (C function)c.amdgpu_irq_dispatchhNtauh1jQhj8hhhNhNubjc)}(hhh](jh)}(hPvoid amdgpu_irq_dispatch (struct amdgpu_device *adev, struct amdgpu_ih_ring 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./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjKhhubah}(h]h ]h"]h$]h&]uh1jZhjIhhhjIhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jj"Kjj"Kjjjuh1jbhhhj8hNhNubj)}(h**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``struct amdgpu_ih_ring *ih`` interrupt ring instance **Description** Dispatches IRQ to IP blocks.h](h)}(h**Parameters**h]j)}(hj,Kh]h Parameters}(hj.KhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*Kubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhj&Kubj )}(hhh](j)}(h5``struct amdgpu_device *adev`` amdgpu device pointer h](j)}(h``struct amdgpu_device *adev``h]j:)}(hjKKh]hstruct amdgpu_device *adev}(hjMKhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjIKubah}(h]h ]h"]h$]h&]uh1jho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjEKubj$)}(hhh]h)}(hamdgpu device pointerh]hamdgpu device pointer}(hjdKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`KhMhjaKubah}(h]h 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./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhj&Kubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj8hhhNhNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^ amdgpu_irq_delegate (C function)c.amdgpu_irq_delegatehNtauh1jQhj8hhhNhNubjc)}(hhh](jh)}(hivoid amdgpu_irq_delegate (struct amdgpu_device *adev, struct amdgpu_iv_entry *entry, unsigned int num_dw)h]jn)}(hhvoid amdgpu_irq_delegate(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry, unsigned int num_dw)h](jt)}(hvoidh]hvoid}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjLhhho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhjLhMubj)}(hamdgpu_irq_delegateh]j)}(hamdgpu_irq_delegateh]hamdgpu_irq_delegate}(hj%LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!Lubah}(h]h ](jjeh"]h$]h&]jjuh1jhjLhhhjLhMubj)}(hP(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry, unsigned int num_dw)h](j)}(hstruct amdgpu_device *adevh](j)}(hjh]hstruct}(hjALhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=Lubj)}(h h]h }(hjNLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=Lubh)}(hhh]j)}(h amdgpu_deviceh]h amdgpu_device}(hj_LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\Lubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjaLmodnameN classnameNjj)}j]j)}jj'Lsbc.amdgpu_irq_delegateasbuh1hhj=Lubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=Lubj)}(hjh]h*}(hjLhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhj=Lubj)}(hadevh]hadev}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=Lubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9Lubj)}(hstruct amdgpu_iv_entry *entryh](j)}(hjh]hstruct}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubh)}(hhh]j)}(hamdgpu_iv_entryh]hamdgpu_iv_entry}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainj4reftypej reftargetjLmodnameN classnameNjj)}j]j{Lc.amdgpu_irq_delegateasbuh1hhjLubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubj)}(hjh]h*}(hjLhhhNhNubah}(h]h ]j'ah"]h$]h&]uh1jhjLubj)}(hentryh]hentry}(hj MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9Lubj)}(hunsigned int num_dwh](jt)}(hunsignedh]hunsigned}(hj#MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjMubj)}(h h]h }(hj1MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubjt)}(hinth]hint}(hj?MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jshjMubj)}(h h]h }(hjMMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(hnum_dwh]hnum_dw}(hj[MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9Lubeh}(h]h ]h"]h$]h&]jjuh1jhjLhhhjLhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjKhhhjLhMubah}(h]jKah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjLhMhjKhhubj[)}(hhh]h)}(hdelegate IV to soft IH ringh]hdelegate IV to soft IH ring}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hho/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:234: ./drivers/gpu/drm/amd/amdgpu/amdgpu_irq.chMhjMhhubah}(h]h ]h"]h$]h&]uh1jZhjKhhhjLhMubeh}(h]h ](j4functioneh"]h$]h&]jj4jjMjjMjjjuh1jbhhhj8hNhNubj)}(hX;**Parameters** ``struct amdgpu_device *adev`` amdgpu device pointer ``struct amdgpu_iv_entry *entry`` IV entry ``unsigned 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h](j)}(h``AMD_IP_BLOCK_TYPE_UVD``h]j:)}(hjJfh]hAMD_IP_BLOCK_TYPE_UVD}(hjLfhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjHfubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhhjDfubj$)}(hhh]h)}(hUnified Video Decoderh]hUnified Video Decoder}(hjcfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_fhKhhj`fubah}(h]h ]h"]h$]h&]uh1j#hjDfubeh}(h]h ]h"]h$]h&]uh1j hj_fhKhhjydubj)}(h3``AMD_IP_BLOCK_TYPE_VCE`` Video Compression Engine h](j)}(h``AMD_IP_BLOCK_TYPE_VCE``h]j:)}(hjfh]hAMD_IP_BLOCK_TYPE_VCE}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjfubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKkhj}fubj$)}(hhh]h)}(hVideo Compression Engineh]hVideo Compression Engine}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhKkhjfubah}(h]h ]h"]h$]h&]uh1j#hj}fubeh}(h]h ]h"]h$]h&]uh1j hjfhKkhjydubj)}(h-``AMD_IP_BLOCK_TYPE_ACP`` Audio Co-Processor h](j)}(h``AMD_IP_BLOCK_TYPE_ACP``h]j:)}(hjfh]hAMD_IP_BLOCK_TYPE_ACP}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjfubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKnhjfubj$)}(hhh]h)}(hAudio Co-Processorh]hAudio Co-Processor}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhKnhjfubah}(h]h ]h"]h$]h&]uh1j#hjfubeh}(h]h ]h"]h$]h&]uh1j hjfhKnhjydubj)}(h0``AMD_IP_BLOCK_TYPE_VCN`` Video Core/Codec Next h](j)}(h``AMD_IP_BLOCK_TYPE_VCN``h]j:)}(hjfh]hAMD_IP_BLOCK_TYPE_VCN}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjfubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKqhjfubj$)}(hhh]h)}(hVideo Core/Codec Nexth]hVideo Core/Codec Next}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ghKqhj gubah}(h]h ]h"]h$]h&]uh1j#hjfubeh}(h]h ]h"]h$]h&]uh1j hj ghKqhjydubj)}(h1``AMD_IP_BLOCK_TYPE_MES`` Micro-Engine Scheduler h](j)}(h``AMD_IP_BLOCK_TYPE_MES``h]j:)}(hj.gh]hAMD_IP_BLOCK_TYPE_MES}(hj0ghhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj,gubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKthj(gubj$)}(hhh]h)}(hMicro-Engine Schedulerh]hMicro-Engine Scheduler}(hjGghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjCghKthjDgubah}(h]h ]h"]h$]h&]uh1j#hj(gubeh}(h]h ]h"]h$]h&]uh1j hjCghKthjydubj)}(h'``AMD_IP_BLOCK_TYPE_JPEG`` JPEG Engine h](j)}(h``AMD_IP_BLOCK_TYPE_JPEG``h]j:)}(hjggh]hAMD_IP_BLOCK_TYPE_JPEG}(hjighhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjegubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKwhjagubj$)}(hhh]h)}(h JPEG Engineh]h JPEG Engine}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|ghKwhj}gubah}(h]h ]h"]h$]h&]uh1j#hjagubeh}(h]h ]h"]h$]h&]uh1j hj|ghKwhjydubj)}(h2``AMD_IP_BLOCK_TYPE_VPE`` Video Processing Engine h](j)}(h``AMD_IP_BLOCK_TYPE_VPE``h]j:)}(hjgh]hAMD_IP_BLOCK_TYPE_VPE}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjgubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKzhjgubj$)}(hhh]h)}(hVideo Processing Engineh]hVideo Processing Engine}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghKzhjgubah}(h]h ]h"]h$]h&]uh1j#hjgubeh}(h]h ]h"]h$]h&]uh1j hjghKzhjydubj)}(hB``AMD_IP_BLOCK_TYPE_UMSCH_MM`` User Mode Scheduler for Multimedia h](j)}(h``AMD_IP_BLOCK_TYPE_UMSCH_MM``h]j:)}(hjgh]hAMD_IP_BLOCK_TYPE_UMSCH_MM}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjgubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhK}hjgubj$)}(hhh]h)}(h"User Mode Scheduler for Multimediah]h"User Mode Scheduler for Multimedia}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghK}hjgubah}(h]h ]h"]h$]h&]uh1j#hjgubeh}(h]h ]h"]h$]h&]uh1j hjghK}hjydubj)}(h1``AMD_IP_BLOCK_TYPE_ISP`` Image Signal Processor h](j)}(h``AMD_IP_BLOCK_TYPE_ISP``h]j:)}(hjhh]hAMD_IP_BLOCK_TYPE_ISP}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjhubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhj hubj$)}(hhh]h)}(hImage Signal Processorh]hImage Signal Processor}(hj+hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hhKhj(hubah}(h]h ]h"]h$]h&]uh1j#hj hubeh}(h]h ]h"]h$]h&]uh1j hj'hhKhjydubj)}(hD``AMD_IP_BLOCK_TYPE_RAS`` Reliability, Availability, Serviceability h](j)}(h``AMD_IP_BLOCK_TYPE_RAS``h]j:)}(hjKhh]hAMD_IP_BLOCK_TYPE_RAS}(hjMhhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjIhubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhjEhubj$)}(hhh]h)}(h)Reliability, Availability, Serviceabilityh]h)Reliability, Availability, Serviceability}(hjdhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hhKhjahubah}(h]h ]h"]h$]h&]uh1j#hjEhubeh}(h]h ]h"]h$]h&]uh1j hj`hhKhjydubj)}(h8``AMD_IP_BLOCK_TYPE_NUM`` Total number of IP block typesh](j)}(h``AMD_IP_BLOCK_TYPE_NUM``h]j:)}(hjhh]hAMD_IP_BLOCK_TYPE_NUM}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjhubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhj~hubj$)}(hhh]h)}(hTotal number of IP block typesh]hTotal number of IP block types}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhjhubah}(h]h ]h"]h$]h&]uh1j#hj~hubeh}(h]h ]h"]h$]h&]uh1j hjhhKhjydubeh}(h]h ]h"]h$]h&]uh1jhj]dubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjchhhjchNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^DC_FEATURE_MASK (C enum)c.DC_FEATURE_MASKhNtauh1jQhjchhhjchNubjc)}(hhh](jh)}(hDC_FEATURE_MASKh]jn)}(henum DC_FEATURE_MASKh](j)}(hjGRh]henum}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhjhhKubj)}(hDC_FEATURE_MASKh]j)}(hjhh]hDC_FEATURE_MASK}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhhjhhKubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjhhhhjhhKubah}(h]jhah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjhhKhjhhhubj[)}(hhh]h)}(h%Bits that control DC feature defaultsh]h%Bits that control DC feature defaults}(hj ihhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhjihhubah}(h]h ]h"]h$]h&]uh1jZhjhhhhjhhKubeh}(h]h ](j4enumeh"]h$]h&]jj4jj8ijj8ijjjuh1jbhhhjchjchNubj)}(hX**Constants** ``DC_FBC_MASK`` (0x1) disabled by default ``DC_MULTI_MON_PP_MCLK_SWITCH_MASK`` (0x2) enabled by default ``DC_DISABLE_FRACTIONAL_PWM_MASK`` (0x4) disabled by default ``DC_PSR_MASK`` (0x8) disabled by default for DCN < 3.1 ``DC_EDP_NO_POWER_SEQUENCING`` (0x10) disabled by default ``DC_DISABLE_LTTPR_DP1_4A`` (0x20) disabled by default ``DC_DISABLE_LTTPR_DP2_0`` (0x40) disabled by default ``DC_PSR_ALLOW_SMU_OPT`` (0x80) disabled by default ``DC_PSR_ALLOW_MULTI_DISP_OPT`` (0x100) disabled by default ``DC_REPLAY_MASK`` (0x200) disabled by default for DCN < 3.1.4 ``DC_FRL_MASK`` (0x400) disabled by defaulth](h)}(h **Constants**h]j)}(hjBih]h Constants}(hjDihhhNhNubah}(h]h ]h"]h$]h&]uh1jhj@iubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhj``DC_MULTI_MON_PP_MCLK_SWITCH_MASK`` (0x2) enabled by default h](j)}(h$``DC_MULTI_MON_PP_MCLK_SWITCH_MASK``h]j:)}(hjih]h DC_MULTI_MON_PP_MCLK_SWITCH_MASK}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjiubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhKhjiubj$)}(hhh]h)}(h(0x2) enabled by defaulth]h(0x2) enabled by default}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKhjiubah}(h]h ]h"]h$]h&]uh1j#hjiubeh}(h]h ]h"]h$]h&]uh1j hjihKhjXiubj)}(h=``DC_DISABLE_FRACTIONAL_PWM_MASK`` (0x4) disabled by default h](j)}(h"``DC_DISABLE_FRACTIONAL_PWM_MASK``h]j:)}(hjih]hDC_DISABLE_FRACTIONAL_PWM_MASK}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjiubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjiubj$)}(hhh]h)}(h(0x4) disabled by defaulth]h(0x4) disabled by default}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMhjiubah}(h]h ]h"]h$]h&]uh1j#hjiubeh}(h]h ]h"]h$]h&]uh1j hjihMhjXiubj)}(h8``DC_PSR_MASK`` (0x8) disabled by default for DCN < 3.1 h](j)}(h``DC_PSR_MASK``h]j:)}(hj jh]h DC_PSR_MASK}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj jubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjjubj$)}(hhh]h)}(h'(0x8) disabled by default for DCN < 3.1h]h'(0x8) disabled by default for DCN < 3.1}(hj%jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!jhMhj"jubah}(h]h ]h"]h$]h&]uh1j#hjjubeh}(h]h ]h"]h$]h&]uh1j hj!jhMhjXiubj)}(h:``DC_EDP_NO_POWER_SEQUENCING`` (0x10) disabled by default h](j)}(h``DC_EDP_NO_POWER_SEQUENCING``h]j:)}(hjEjh]hDC_EDP_NO_POWER_SEQUENCING}(hjGjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjCjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj?jubj$)}(hhh]h)}(h(0x10) disabled by defaulth]h(0x10) disabled by default}(hj^jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZjhMhj[jubah}(h]h ]h"]h$]h&]uh1j#hj?jubeh}(h]h ]h"]h$]h&]uh1j hjZjhMhjXiubj)}(h7``DC_DISABLE_LTTPR_DP1_4A`` (0x20) disabled by default h](j)}(h``DC_DISABLE_LTTPR_DP1_4A``h]j:)}(hj~jh]hDC_DISABLE_LTTPR_DP1_4A}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj|jubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhM hjxjubj$)}(hhh]h)}(h(0x20) disabled by defaulth]h(0x20) disabled by default}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhM hjjubah}(h]h ]h"]h$]h&]uh1j#hjxjubeh}(h]h ]h"]h$]h&]uh1j hjjhM hjXiubj)}(h6``DC_DISABLE_LTTPR_DP2_0`` (0x40) disabled by default h](j)}(h``DC_DISABLE_LTTPR_DP2_0``h]j:)}(hjjh]hDC_DISABLE_LTTPR_DP2_0}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjjubj$)}(hhh]h)}(h(0x40) disabled by defaulth]h(0x40) disabled by default}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjjubah}(h]h ]h"]h$]h&]uh1j#hjjubeh}(h]h ]h"]h$]h&]uh1j hjjhMhjXiubj)}(h4``DC_PSR_ALLOW_SMU_OPT`` (0x80) disabled by default h](j)}(h``DC_PSR_ALLOW_SMU_OPT``h]j:)}(hjjh]hDC_PSR_ALLOW_SMU_OPT}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjjubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjjubj$)}(hhh]h)}(h(0x80) disabled by defaulth]h(0x80) disabled by default}(hj khhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjkubah}(h]h ]h"]h$]h&]uh1j#hjjubeh}(h]h ]h"]h$]h&]uh1j hjkhMhjXiubj)}(h<``DC_PSR_ALLOW_MULTI_DISP_OPT`` (0x100) disabled by default h](j)}(h``DC_PSR_ALLOW_MULTI_DISP_OPT``h]j:)}(hj)kh]hDC_PSR_ALLOW_MULTI_DISP_OPT}(hj+khhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj'kubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj#kubj$)}(hhh]h)}(h(0x100) disabled by defaulth]h(0x100) disabled by default}(hjBkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>khMhj?kubah}(h]h ]h"]h$]h&]uh1j#hj#kubeh}(h]h ]h"]h$]h&]uh1j hj>khMhjXiubj)}(h?``DC_REPLAY_MASK`` (0x200) disabled by default for DCN < 3.1.4 h](j)}(h``DC_REPLAY_MASK``h]j:)}(hjbkh]hDC_REPLAY_MASK}(hjdkhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj`kubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj\kubj$)}(hhh]h)}(h+(0x200) disabled by default for DCN < 3.1.4h]h+(0x200) disabled by default for DCN < 3.1.4}(hj{khhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwkhMhjxkubah}(h]h ]h"]h$]h&]uh1j#hj\kubeh}(h]h ]h"]h$]h&]uh1j hjwkhMhjXiubj)}(h+``DC_FRL_MASK`` (0x400) disabled by defaulth](j)}(h``DC_FRL_MASK``h]j:)}(hjkh]h DC_FRL_MASK}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjkubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjkubj$)}(hhh]h)}(h(0x400) disabled by defaulth]h(0x400) disabled by default}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjkubah}(h]h ]h"]h$]h&]uh1j#hjkubeh}(h]h ]h"]h$]h&]uh1j hjkhMhjXiubeh}(h]h ]h"]h$]h&]uh1jhjhjmubah}(h]h ]h"]h$]h&]uh1j#hjmubeh}(h]h ]h"]h$]h&]uh1j hjmhM?hjolubj)}(hA``DC_DISABLE_MPO`` (0x40) If set, disable multi-plane offloading h](j)}(h``DC_DISABLE_MPO``h]j:)}(hjmh]hDC_DISABLE_MPO}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjmubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMBhjmubj$)}(hhh]h)}(h-(0x40) If set, disable multi-plane offloadingh]h-(0x40) If set, disable multi-plane offloading}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMBhjmubah}(h]h ]h"]h$]h&]uh1j#hjmubeh}(h]h ]h"]h$]h&]uh1j hjmhMBhjolubj)}(hF``DC_ENABLE_DPIA_TRACE`` (0x80) If set, enable trace logging for DPIA h](j)}(h``DC_ENABLE_DPIA_TRACE``h]j:)}(hjnh]hDC_ENABLE_DPIA_TRACE}(hj nhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjnubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMEhjnubj$)}(hhh]h)}(h,(0x80) If set, enable trace logging for DPIAh]h,(0x80) If set, enable trace logging for DPIA}(hj!nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMEhjnubah}(h]h ]h"]h$]h&]uh1j#hjnubeh}(h]h ]h"]h$]h&]uh1j hjnhMEhjolubj)}(hh``DC_ENABLE_DML2`` (0x100) If set, force usage of DML2, even if the DCN version does not default to it. h](j)}(h``DC_ENABLE_DML2``h]j:)}(hjAnh]hDC_ENABLE_DML2}(hjCnhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj?nubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMIhj;nubj$)}(hhh]h)}(hT(0x100) If set, force usage of DML2, even if the DCN version does not default to it.h]hT(0x100) If set, force usage of DML2, even if the DCN version does not default to it.}(hjZnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMHhjWnubah}(h]h ]h"]h$]h&]uh1j#hj;nubeh}(h]h ]h"]h$]h&]uh1j hjVnhMIhjolubj)}(h5``DC_DISABLE_PSR_SU`` (0x200) If set, disable PSR SU h](j)}(h``DC_DISABLE_PSR_SU``h]j:)}(hj{nh]hDC_DISABLE_PSR_SU}(hj}nhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjynubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMLhjunubj$)}(hhh]h)}(h(0x200) If set, disable PSR SUh]h(0x200) If set, disable PSR SU}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMLhjnubah}(h]h ]h"]h$]h&]uh1j#hjunubeh}(h]h ]h"]h$]h&]uh1j hjnhMLhjolubj)}(h;``DC_DISABLE_REPLAY`` (0x400) If set, disable Panel Replay h](j)}(h``DC_DISABLE_REPLAY``h]j:)}(hjnh]hDC_DISABLE_REPLAY}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjnubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMOhjnubj$)}(hhh]h)}(h$(0x400) If set, disable Panel Replayh]h$(0x400) If set, disable Panel Replay}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMOhjnubah}(h]h ]h"]h$]h&]uh1j#hjnubeh}(h]h ]h"]h$]h&]uh1j hjnhMOhjolubj)}(hX``DC_DISABLE_IPS`` (0x800) If set, disable all Idle Power States, all the time. If more than one IPS debug bit is set, the lowest bit takes precedence. For example, if DC_FORCE_IPS_ENABLE and DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes precedence. h](j)}(h``DC_DISABLE_IPS``h]j:)}(hjnh]hDC_DISABLE_IPS}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjnubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMVhjnubj$)}(hhh]h)}(h(0x800) If set, disable all Idle Power States, all the time. If more than one IPS debug bit is set, the lowest bit takes precedence. For example, if DC_FORCE_IPS_ENABLE and DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes precedence.h]h(0x800) If set, disable all Idle Power States, all the time. If more than one IPS debug bit is set, the lowest bit takes precedence. For example, if DC_FORCE_IPS_ENABLE and DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes precedence.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMRhjoubah}(h]h ]h"]h$]h&]uh1j#hjnubeh}(h]h ]h"]h$]h&]uh1j hjohMVhjolubj)}(hs``DC_DISABLE_IPS_DYNAMIC`` (0x1000) If set, disable all IPS, all the time, *except* when driver goes into suspend. h](j)}(h``DC_DISABLE_IPS_DYNAMIC``h]j:)}(hj'oh]hDC_DISABLE_IPS_DYNAMIC}(hj)ohhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj%oubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMZhj!oubj$)}(hhh]h)}(hW(0x1000) If set, disable all IPS, all the time, *except* when driver goes into suspend.h](h0(0x1000) If set, disable all IPS, all the time, }(hj@ohhhNhNubj:)}(h*except*h]hexcept}(hjHohhhNhNubah}(h]h ]h"]h$]h&]uh1j:hj@oubh when driver goes into suspend.}(hj@ohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMYhj=oubah}(h]h ]h"]h$]h&]uh1j#hj!oubeh}(h]h ]h"]h$]h&]uh1j hj(0x40000) If set, disable support for custom brightness curvesh]h>(0x40000) If set, disable support for custom brightness curves}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMohjpubah}(h]h ]h"]h$]h&]uh1j#hjpubeh}(h]h ]h"]h$]h&]uh1j hjphMphjolubj)}(hy``DC_HDCP_LC_FORCE_FW_ENABLE`` (0x80000) If set, use HDCP Locality Check FW path regardless of reported HW capabilities. h](j)}(h``DC_HDCP_LC_FORCE_FW_ENABLE``h]j:)}(hjph]hDC_HDCP_LC_FORCE_FW_ENABLE}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjpubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMthjpubj$)}(hhh]h)}(hY(0x80000) If set, use HDCP Locality Check FW path regardless of reported HW capabilities.h]hY(0x80000) If set, use HDCP Locality Check FW path regardless of reported HW capabilities.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMshjpubah}(h]h ]h"]h$]h&]uh1j#hjpubeh}(h]h ]h"]h$]h&]uh1j hjphMthjolubj)}(h{``DC_HDCP_LC_ENABLE_SW_FALLBACK`` (0x100000) If set, upon HDCP Locality Check FW path failure, retry using legacy SW path. h](j)}(h!``DC_HDCP_LC_ENABLE_SW_FALLBACK``h]j:)}(hjqh]hDC_HDCP_LC_ENABLE_SW_FALLBACK}(hj qhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjqubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMxhjqubj$)}(hhh]h)}(hX(0x100000) If set, upon HDCP Locality Check FW path failure, retry using legacy SW path.h]hX(0x100000) If set, upon HDCP Locality Check FW path failure, retry using legacy SW path.}(hj qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMwhjqubah}(h]h ]h"]h$]h&]uh1j#hjqubeh}(h]h ]h"]h$]h&]uh1j hjqhMxhjolubj)}(hH``DC_SKIP_DETECTION_LT`` (0x200000) If set, skip detection link trainingh](j)}(h``DC_SKIP_DETECTION_LT``h]j:)}(hjAqh]hDC_SKIP_DETECTION_LT}(hjCqhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj?qubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMzhj;qubj$)}(hhh]h)}(h/(0x200000) If set, skip detection link trainingh]h/(0x200000) If set, skip detection link training}(hjZqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhM{hjWqubah}(h]h ]h"]h$]h&]uh1j#hj;qubeh}(h]h ]h"]h$]h&]uh1j hjVqhMzhjolubeh}(h]h ]h"]h$]h&]uh1jhjSlubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjchhhjchNubjR)}(hhh]h}(h]h ]h"]h$]h&]entries](j^amd_ip_funcs (C struct)c.amd_ip_funcshNtauh1jQhjchhhjchNubjc)}(hhh](jh)}(h amd_ip_funcsh]jn)}(hstruct amd_ip_funcsh](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqhhhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqhhhjqhMubj)}(h amd_ip_funcsh]j)}(hjqh]h amd_ip_funcs}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ](jjeh"]h$]h&]jjuh1jhjqhhhjqhMubeh}(h]h ]h"]h$]h&]jjjLuh1jmjMjNhjqhhhjqhMubah}(h]jqah ](jRjSeh"]h$]h&]jWjX)jYhuh1jghjqhMhjqhhubj[)}(hhh]h)}(h+general hooks for managing amdgpu IP Blocksh]h+general hooks for managing amdgpu IP Blocks}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjqhhubah}(h]h ]h"]h$]h&]uh1jZhjqhhhjqhMubeh}(h]h ](j4structeh"]h$]h&]jj4jjqjjqjjjuh1jbhhhjchjchNubj)}(hXM **Definition**:: struct amd_ip_funcs { char *name; int (*early_init)(struct amdgpu_ip_block *ip_block); int (*late_init)(struct amdgpu_ip_block *ip_block); int (*sw_init)(struct amdgpu_ip_block *ip_block); int (*sw_fini)(struct amdgpu_ip_block *ip_block); int (*early_fini)(struct amdgpu_ip_block *ip_block); int (*hw_init)(struct amdgpu_ip_block *ip_block); int (*hw_fini)(struct amdgpu_ip_block *ip_block); void (*late_fini)(struct amdgpu_ip_block *ip_block); int (*prepare_suspend)(struct amdgpu_ip_block *ip_block); int (*suspend)(struct amdgpu_ip_block *ip_block); int (*resume)(struct amdgpu_ip_block *ip_block); void (*complete)(struct amdgpu_ip_block *ip_block); bool (*is_idle)(struct amdgpu_ip_block *ip_block); int (*wait_for_idle)(struct amdgpu_ip_block *ip_block); int (*soft_reset)(struct amdgpu_ip_block *ip_block); int (*set_clockgating_state)(struct amdgpu_ip_block *ip_block, enum amd_clockgating_state state); int (*set_powergating_state)(struct amdgpu_ip_block *ip_block, enum amd_powergating_state state); void (*get_clockgating_state)(struct amdgpu_ip_block *ip_block, u64 *flags); void (*dump_ip_state)(struct amdgpu_ip_block *ip_block); void (*print_ip_state)(struct amdgpu_ip_block *ip_block, struct drm_printer *p); }; **Members** ``name`` Name of IP block ``early_init`` sets up early driver state (pre sw_init), does not configure hw - Optional ``late_init`` sets up late driver/hw state (post hw_init) - Optional ``sw_init`` sets up driver state, does not configure hw ``sw_fini`` tears down driver state, does not configure hw ``early_fini`` tears down stuff before dev detached from driver ``hw_init`` sets up the hw state ``hw_fini`` tears down the hw state ``late_fini`` final cleanup ``prepare_suspend`` handle IP specific changes to prepare for suspend (such as allocating any required memory) ``suspend`` handles IP specific hw/sw changes for suspend ``resume`` handles IP specific hw/sw changes for resume ``complete`` handles IP specific changes after resume ``is_idle`` returns current IP block idle status ``wait_for_idle`` poll for idle ``soft_reset`` soft reset the IP block ``set_clockgating_state`` enable/disable cg for the IP block ``set_powergating_state`` enable/disable pg for the IP block ``get_clockgating_state`` get current clockgating status ``dump_ip_state`` dump the IP state of the ASIC during a gpu hang ``print_ip_state`` print the IP state in devcoredump for each IP of the ASICh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjqubh:}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjqubj)}(hXstruct amd_ip_funcs { char *name; int (*early_init)(struct amdgpu_ip_block *ip_block); int (*late_init)(struct amdgpu_ip_block *ip_block); int (*sw_init)(struct amdgpu_ip_block *ip_block); int (*sw_fini)(struct amdgpu_ip_block *ip_block); int (*early_fini)(struct amdgpu_ip_block *ip_block); int (*hw_init)(struct amdgpu_ip_block *ip_block); int (*hw_fini)(struct amdgpu_ip_block *ip_block); void (*late_fini)(struct amdgpu_ip_block *ip_block); int (*prepare_suspend)(struct amdgpu_ip_block *ip_block); int (*suspend)(struct amdgpu_ip_block *ip_block); int (*resume)(struct amdgpu_ip_block *ip_block); void (*complete)(struct amdgpu_ip_block *ip_block); bool (*is_idle)(struct amdgpu_ip_block *ip_block); int (*wait_for_idle)(struct amdgpu_ip_block *ip_block); int (*soft_reset)(struct amdgpu_ip_block *ip_block); int (*set_clockgating_state)(struct amdgpu_ip_block *ip_block, enum amd_clockgating_state state); int (*set_powergating_state)(struct amdgpu_ip_block *ip_block, enum amd_powergating_state state); void (*get_clockgating_state)(struct amdgpu_ip_block *ip_block, u64 *flags); void (*dump_ip_state)(struct amdgpu_ip_block *ip_block); void (*print_ip_state)(struct amdgpu_ip_block *ip_block, struct drm_printer *p); };h]hXstruct amd_ip_funcs { char *name; int (*early_init)(struct amdgpu_ip_block *ip_block); int (*late_init)(struct amdgpu_ip_block *ip_block); int (*sw_init)(struct amdgpu_ip_block *ip_block); int (*sw_fini)(struct amdgpu_ip_block *ip_block); int (*early_fini)(struct amdgpu_ip_block *ip_block); int (*hw_init)(struct amdgpu_ip_block *ip_block); int (*hw_fini)(struct amdgpu_ip_block *ip_block); void (*late_fini)(struct amdgpu_ip_block *ip_block); int (*prepare_suspend)(struct amdgpu_ip_block *ip_block); int (*suspend)(struct amdgpu_ip_block *ip_block); int (*resume)(struct amdgpu_ip_block *ip_block); void (*complete)(struct amdgpu_ip_block *ip_block); bool (*is_idle)(struct amdgpu_ip_block *ip_block); int (*wait_for_idle)(struct amdgpu_ip_block *ip_block); int (*soft_reset)(struct amdgpu_ip_block *ip_block); int (*set_clockgating_state)(struct amdgpu_ip_block *ip_block, enum amd_clockgating_state state); int (*set_powergating_state)(struct amdgpu_ip_block *ip_block, enum amd_powergating_state state); void (*get_clockgating_state)(struct amdgpu_ip_block *ip_block, u64 *flags); void (*dump_ip_state)(struct amdgpu_ip_block *ip_block); void (*print_ip_state)(struct amdgpu_ip_block *ip_block, struct drm_printer *p); };}hjrsbah}(h]h ]h"]h$]h&]jjuh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjqubh)}(h **Members**h]j)}(hj+rh]hMembers}(hj-rhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)rubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjqubj )}(hhh](j)}(h``name`` Name of IP block h](j)}(h``name``h]j:)}(hjJrh]hname}(hjLrhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjHrubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjDrubj$)}(hhh]h)}(hName of IP blockh]hName of IP block}(hjcrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_rhMhj`rubah}(h]h ]h"]h$]h&]uh1j#hjDrubeh}(h]h ]h"]h$]h&]uh1j hj_rhMhjArubj)}(hZ``early_init`` sets up early driver state (pre sw_init), does not configure hw - Optional h](j)}(h``early_init``h]j:)}(hjrh]h early_init}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjrubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj}rubj$)}(hhh]h)}(hJsets up early driver state (pre sw_init), does not configure hw - Optionalh]hJsets up early driver state (pre sw_init), does not configure hw - Optional}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjrubah}(h]h ]h"]h$]h&]uh1j#hj}rubeh}(h]h ]h"]h$]h&]uh1j hjrhMhjArubj)}(hE``late_init`` sets up late driver/hw state (post hw_init) - Optional h](j)}(h ``late_init``h]j:)}(hjrh]h late_init}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjrubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjrubj$)}(hhh]h)}(h6sets up late driver/hw state (post hw_init) - Optionalh]h6sets up late driver/hw state (post hw_init) - Optional}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjrubah}(h]h ]h"]h$]h&]uh1j#hjrubeh}(h]h ]h"]h$]h&]uh1j hjrhMhjArubj)}(h8``sw_init`` sets up driver state, does not configure hw h](j)}(h ``sw_init``h]j:)}(hjrh]hsw_init}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjrubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjrubj$)}(hhh]h)}(h+sets up driver state, does not configure hwh]h+sets up driver state, does not configure hw}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhj shMhj subah}(h]h ]h"]h$]h&]uh1j#hjrubeh}(h]h ]h"]h$]h&]uh1j hj shMhjArubj)}(h;``sw_fini`` tears down driver state, does not configure hw h](j)}(h ``sw_fini``h]j:)}(hj/sh]hsw_fini}(hj1shhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj-subah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj)subj$)}(hhh]h)}(h.tears down driver state, does not configure hwh]h.tears down driver state, does not configure hw}(hjHshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDshMhjEsubah}(h]h ]h"]h$]h&]uh1j#hj)subeh}(h]h ]h"]h$]h&]uh1j hjDshMhjArubj)}(h@``early_fini`` tears down stuff before dev detached from driver h](j)}(h``early_fini``h]j:)}(hjhsh]h early_fini}(hjjshhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjfsubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjbsubj$)}(hhh]h)}(h0tears down stuff before dev detached from driverh]h0tears down stuff before dev detached from driver}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}shMhj~subah}(h]h ]h"]h$]h&]uh1j#hjbsubeh}(h]h ]h"]h$]h&]uh1j hj}shMhjArubj)}(h!``hw_init`` sets up the hw state h](j)}(h ``hw_init``h]j:)}(hjsh]hhw_init}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjsubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjsubj$)}(hhh]h)}(hsets up the hw stateh]hsets up the hw state}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjsubah}(h]h ]h"]h$]h&]uh1j#hjsubeh}(h]h ]h"]h$]h&]uh1j hjshMhjArubj)}(h$``hw_fini`` tears down the hw state h](j)}(h ``hw_fini``h]j:)}(hjsh]hhw_fini}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjsubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjsubj$)}(hhh]h)}(htears down the hw stateh]htears down the hw state}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjsubah}(h]h ]h"]h$]h&]uh1j#hjsubeh}(h]h ]h"]h$]h&]uh1j hjshMhjArubj)}(h``late_fini`` final cleanup h](j)}(h ``late_fini``h]j:)}(hjth]h late_fini}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjtubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj tubj$)}(hhh]h)}(h final cleanuph]h final cleanup}(hj,thhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(thMhj)tubah}(h]h ]h"]h$]h&]uh1j#hj tubeh}(h]h ]h"]h$]h&]uh1j hj(thMhjArubj)}(ho``prepare_suspend`` handle IP specific changes to prepare for suspend (such as allocating any required memory) h](j)}(h``prepare_suspend``h]j:)}(hjLth]hprepare_suspend}(hjNthhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjJtubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjFtubj$)}(hhh]h)}(hZhandle IP specific changes to prepare for suspend (such as allocating any required memory)h]hZhandle IP specific changes to prepare for suspend (such as allocating any required memory)}(hjethhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjbtubah}(h]h ]h"]h$]h&]uh1j#hjFtubeh}(h]h ]h"]h$]h&]uh1j hjathMhjArubj)}(h:``suspend`` handles IP specific hw/sw changes for suspend h](j)}(h ``suspend``h]j:)}(hjth]hsuspend}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjtubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjtubj$)}(hhh]h)}(h-handles IP specific hw/sw changes for suspendh]h-handles IP specific hw/sw changes for suspend}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjtubah}(h]h ]h"]h$]h&]uh1j#hjtubeh}(h]h ]h"]h$]h&]uh1j hjthMhjArubj)}(h8``resume`` handles IP specific hw/sw changes for resume h](j)}(h ``resume``h]j:)}(hjth]hresume}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjtubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjtubj$)}(hhh]h)}(h,handles IP specific hw/sw changes for resumeh]h,handles IP specific hw/sw changes for resume}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjtubah}(h]h ]h"]h$]h&]uh1j#hjtubeh}(h]h ]h"]h$]h&]uh1j hjthMhjArubj)}(h6``complete`` handles IP specific changes after resume h](j)}(h ``complete``h]j:)}(hjth]hcomplete}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjtubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjtubj$)}(hhh]h)}(h(handles IP specific changes after resumeh]h(handles IP specific changes after resume}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj uhMhjuubah}(h]h ]h"]h$]h&]uh1j#hjtubeh}(h]h ]h"]h$]h&]uh1j hj uhMhjArubj)}(h1``is_idle`` returns current IP block idle status h](j)}(h ``is_idle``h]j:)}(hj1uh]his_idle}(hj3uhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hj/uubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhj+uubj$)}(hhh]h)}(h$returns current IP block idle statush]h$returns current IP block idle status}(hjJuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFuhMhjGuubah}(h]h ]h"]h$]h&]uh1j#hj+uubeh}(h]h ]h"]h$]h&]uh1j hjFuhMhjArubj)}(h ``wait_for_idle`` poll for idle h](j)}(h``wait_for_idle``h]j:)}(hjjuh]h wait_for_idle}(hjluhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjhuubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjduubj$)}(hhh]h)}(h poll for idleh]h poll for idle}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjuubah}(h]h ]h"]h$]h&]uh1j#hjduubeh}(h]h ]h"]h$]h&]uh1j hjuhMhjArubj)}(h'``soft_reset`` soft reset the IP block h](j)}(h``soft_reset``h]j:)}(hjuh]h soft_reset}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjuubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjuubj$)}(hhh]h)}(hsoft reset the IP blockh]hsoft reset the IP block}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjuubah}(h]h ]h"]h$]h&]uh1j#hjuubeh}(h]h ]h"]h$]h&]uh1j hjuhMhjArubj)}(h=``set_clockgating_state`` enable/disable cg for the IP block h](j)}(h``set_clockgating_state``h]j:)}(hjuh]hset_clockgating_state}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjuubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjuubj$)}(hhh]h)}(h"enable/disable cg for the IP blockh]h"enable/disable cg for the IP block}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjuubah}(h]h ]h"]h$]h&]uh1j#hjuubeh}(h]h ]h"]h$]h&]uh1j hjuhMhjArubj)}(h=``set_powergating_state`` enable/disable pg for the IP block h](j)}(h``set_powergating_state``h]j:)}(hjvh]hset_powergating_state}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjvubj$)}(hhh]h)}(h"enable/disable pg for the IP blockh]h"enable/disable pg for the IP block}(hj.vhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*vhMhj+vubah}(h]h ]h"]h$]h&]uh1j#hjvubeh}(h]h ]h"]h$]h&]uh1j hj*vhMhjArubj)}(h9``get_clockgating_state`` get current clockgating status h](j)}(h``get_clockgating_state``h]j:)}(hjNvh]hget_clockgating_state}(hjPvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjLvubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjHvubj$)}(hhh]h)}(hget current clockgating statush]hget current clockgating status}(hjgvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjcvhMhjdvubah}(h]h ]h"]h$]h&]uh1j#hjHvubeh}(h]h ]h"]h$]h&]uh1j hjcvhMhjArubj)}(hB``dump_ip_state`` dump the IP state of the ASIC during a gpu hang h](j)}(h``dump_ip_state``h]j:)}(hjvh]h dump_ip_state}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjvubj$)}(hhh]h)}(h/dump the IP state of the ASIC during a gpu hangh]h/dump the IP state of the ASIC during a gpu hang}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1j#hjvubeh}(h]h ]h"]h$]h&]uh1j hjvhMhjArubj)}(hL``print_ip_state`` print the IP state in devcoredump for each IP of the ASICh](j)}(h``print_ip_state``h]j:)}(hjvh]hprint_ip_state}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j9hjvubah}(h]h ]h"]h$]h&]uh1jhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjvubj$)}(hhh]h)}(h9print the IP state in devcoredump for each IP of the ASICh]h9print the IP state in devcoredump for each IP of the ASIC}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjvubah}(h]h ]h"]h$]h&]uh1j#hjvubeh}(h]h ]h"]h$]h&]uh1j hjvhMhjArubeh}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjchhhjchNubh)}(h**Description**h]j)}(hjwh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&]uh1hhp/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/driver-core:243: ./drivers/gpu/drm/amd/include/amd_shared.hhMhjchhubh)}(hXXThese hooks provide an interface for controlling the operational state of IP blocks. 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