sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget//translations/zh_CN/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget//translations/zh_TW/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget//translations/it_IT/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget//translations/ja_JP/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget//translations/ko_KR/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget//translations/pt_BR/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget//translations/sp_SP/gpu/amdgpu/display/dc-debugmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hDisplay Core Debug toolsh]hDisplay Core Debug tools}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhI/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/display/dc-debug.rsthKubh paragraph)}(hIn this section, you will find helpful information on debugging the amdgpu driver from the display perspective. This page introduces debug mechanisms and procedures to help you identify if some issues are related to display code.h]hIn this section, you will find helpful information on debugging the amdgpu driver from the display perspective. This page introduces debug mechanisms and procedures to help you identify if some issues are related to display code.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hNarrow down display issuesh]hNarrow down display issues}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubh)}(hXSince the display is the driver's visual component, it is common to see users reporting issues as a display when another component causes the problem. This section equips users to determine if a specific issue was caused by the display component or another part of the driver.h]hXSince the display is the driver’s visual component, it is common to see users reporting issues as a display when another component causes the problem. This section equips users to determine if a specific issue was caused by the display component or another part of the driver.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hhh](h)}(hDC dmesg important messagesh]hDC dmesg important messages}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hXThe dmesg log is the first source of information to be checked, and amdgpu takes advantage of this feature by logging some valuable information. When looking for the issues associated with amdgpu, remember that each component of the driver (e.g., smu, PSP, dm, etc.) is loaded one by one, and this information can be found in the dmesg log. In this sense, look for the part of the log that looks like the below log snippet::h]hXThe dmesg log is the first source of information to be checked, and amdgpu takes advantage of this feature by logging some valuable information. When looking for the issues associated with amdgpu, remember that each component of the driver (e.g., smu, PSP, dm, etc.) is loaded one by one, and this information can be found in the dmesg log. In this sense, look for the part of the log that looks like the below log snippet:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh literal_block)}(hX[ 4.254295] [drm] initializing kernel modesetting (IP DISCOVERY 0x1002:0x744C 0x1002:0x0E3B 0xC8). [ 4.254718] [drm] register mmio base: 0xFCB00000 [ 4.254918] [drm] register mmio size: 1048576 [ 4.260095] [drm] add ip block number 0 [ 4.260318] [drm] add ip block number 1 [ 4.260510] [drm] add ip block number 2 [ 4.260696] [drm] add ip block number 3 [ 4.260878] [drm] add ip block number 4 [ 4.261057] [drm] add ip block number 5 [ 4.261231] [drm] add ip block number 6 [ 4.261402] [drm] add ip block number 7 [ 4.261568] [drm] add ip block number 8 [ 4.261729] [drm] add ip block number 9 [ 4.261887] [drm] add ip block number 10 h]hX[ 4.254295] [drm] initializing kernel modesetting (IP DISCOVERY 0x1002:0x744C 0x1002:0x0E3B 0xC8). [ 4.254718] [drm] register mmio base: 0xFCB00000 [ 4.254918] [drm] register mmio size: 1048576 [ 4.260095] [drm] add ip block number 0 [ 4.260318] [drm] add ip block number 1 [ 4.260510] [drm] add ip block number 2 [ 4.260696] [drm] add ip block number 3 [ 4.260878] [drm] add ip block number 4 [ 4.261057] [drm] add ip block number 5 [ 4.261231] [drm] add ip block number 6 [ 4.261402] [drm] add ip block number 7 [ 4.261568] [drm] add ip block number 8 [ 4.261729] [drm] add ip block number 9 [ 4.261887] [drm] add ip block number 10 }hjsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1jhhhKhhhhubh)}(hX5From the above example, you can see the line that reports that ``, (**Display Manager**), was loaded, which means that display can be part of the issue. If you do not see that line, something else might have failed before amdgpu loads the display component, indicating that we don't have a display issue.h](h?From the above example, you can see the line that reports that }(hj+hhhNhNubhtitle_reference)}(h``h]h}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hj+ubh, (}(hj+hhhNhNubhstrong)}(h**Display Manager**h]hDisplay Manager}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhj+ubh), was loaded, which means that display can be part of the issue. If you do not see that line, something else might have failed before amdgpu loads the display component, indicating that we don’t have a display issue.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK*hhhhubh)}(hAfter you identified that the DM was loaded correctly, you can check for the display version of the hardware in use, which can be retrieved from the dmesg log with the command::h]hAfter you identified that the DM was loaded correctly, you can check for the display version of the hardware in use, which can be retrieved from the dmesg log with the command:}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hhhhubj)}(hdmesg | grep -i 'display core'h]hdmesg | grep -i 'display core'}hjosbah}(h]h ]h"]h$]h&]j)j*uh1jhhhK4hhhhubh)}(h3This command shows a message that looks like this::h]h2This command shows a message that looks like this:}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hhhhubj)}(hA[ 4.655828] [drm] Display Core v3.2.285 initialized on DCN 3.2h]hA[ 4.655828] [drm] Display Core v3.2.285 initialized on DCN 3.2}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhK8hhhhubh)}(h/This message has two key pieces of information:h]h/This message has two key pieces of information:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hhhhubh bullet_list)}(hhh](h list_item)}(hX**The DC version (e.g., v3.2.285)**: Display developers release a new DC version every week, and this information can be advantageous in a situation where a user/developer must find a good point versus a bad point based on a tested version of the display code. Remember from page :ref:`Display Core `, that every week the new patches for display are heavily tested with IGT and manual tests.h]h)}(hX**The DC version (e.g., v3.2.285)**: Display developers release a new DC version every week, and this information can be advantageous in a situation where a user/developer must find a good point versus a bad point based on a tested version of the display code. Remember from page :ref:`Display Core `, that every week the new patches for display are heavily tested with IGT and manual tests.h](jH)}(h#**The DC version (e.g., v3.2.285)**h]hThe DC version (e.g., v3.2.285)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhjubh: Display developers release a new DC version every week, and this information can be advantageous in a situation where a user/developer must find a good point versus a bad point based on a tested version of the display code. Remember from page }(hjhhhNhNubh)}(h):ref:`Display Core `h]hinline)}(hjh]h Display Core}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocgpu/amdgpu/display/dc-debug refdomainjreftyperef refexplicitrefwarn reftargetamdgpu-display-coreuh1hhhhK [ 4.260318] [drm] add ip block number 1 [..] [ 4.261057] [drm] add ip block number 5 h]hX[ 4.254295] [drm] initializing kernel modesetting (IP DISCOVERY 0x1002:0x744C 0x1002:0x0E3B 0xC8). [..] [ 4.260095] [drm] add ip block number 0 [ 4.260318] [drm] add ip block number 1 [..] [ 4.261057] [drm] add ip block number 5 }hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhK_hjyhhubh)}(hNotice from the above example that the `dm` id is 5 for this specific hardware. Next, you need to run the following binary operation to identify the IP block mask::h](h'Notice from the above example that the }(hjhhhNhNubj4)}(h`dm`h]hdm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubhx id is 5 for this specific hardware. Next, you need to run the following binary operation to identify the IP block mask:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKfhjyhhubj)}(h0xffffffff & ~(1 << [DM ID])h]h0xffffffff & ~(1 << [DM ID])}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKjhjyhhubh)}(h!From our example the IP mask is::h]h From our example the IP mask is:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKlhjyhhubj)}(h#0xffffffff & ~(1 << 5) = 0xffffffdfh]h#0xffffffff & ~(1 << 5) = 0xffffffdf}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKnhjyhhubh)}(hUFinally, to disable DC, you just need to set the below parameter in your bootloader::h]hTFinally, to disable DC, you just need to set the below parameter in your bootloader:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKphjyhhubj)}(h!amdgpu.ip_block_mask = 0xffffffdfh]h!amdgpu.ip_block_mask = 0xffffffdf}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKshjyhhubh)}(hXIf you can boot your system with the DC disabled and still see the issue, it means you can rule DC out of the equation. However, if the bug disappears, you still need to consider the DC part of the problem and keep narrowing down the issue. In some scenarios, disabling DC is impossible since it might be necessary to use the display component to reproduce the issue (e.g., play a game).h]hXIf you can boot your system with the DC disabled and still see the issue, it means you can rule DC out of the equation. However, if the bug disappears, you still need to consider the DC part of the problem and keep narrowing down the issue. In some scenarios, disabling DC is impossible since it might be necessary to use the display component to reproduce the issue (e.g., play a game).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKuhjyhhubh)}(hE**Note: This will probably lead to the absence of a display output.**h]jH)}(hj.h]hANote: This will probably lead to the absence of a display output.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jGhj,ubah}(h]h ]h"]h$]h&]uh1hhhhK|hjyhhubeh}(h]avoid-loading-display-coreah ]h"]avoid loading display coreah$]h&]uh1hhhhhhhhKWubh)}(hhh](h)}(hDisplay flickeringh]hDisplay flickering}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhhhhhKubh)}(hDisplay flickering might have multiple causes; one is the lack of proper power to the GPU or problems in the DPM switches. A good first generic verification is to set the GPU to use high voltage::h]hDisplay flickering might have multiple causes; one is the lack of proper power to the GPU or problems in the DPM switches. A good first generic verification is to set the GPU to use high voltage:}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjKhhubj)}(hSbash -c "echo high > /sys/class/drm/card0/device/power_dpm_force_performance_level"h]hSbash -c "echo high > /sys/class/drm/card0/device/power_dpm_force_performance_level"}hjjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKhjKhhubh)}(hXThe above command sets the GPU/APU to use the maximum power allowed which disables DPM switches. If forcing DPM levels high does not fix the issue, it is less likely that the issue is related to power management. If the issue disappears, there is a good chance that other components might be involved, and the display should not be ignored since this could be a DPM issues. From the display side, if the power increase fixes the issue, it is worth debugging the clock configuration and the pipe split police used in the specific configuration.h]hXThe above command sets the GPU/APU to use the maximum power allowed which disables DPM switches. If forcing DPM levels high does not fix the issue, it is less likely that the issue is related to power management. If the issue disappears, there is a good chance that other components might be involved, and the display should not be ignored since this could be a DPM issues. From the display side, if the power increase fixes the issue, it is worth debugging the clock configuration and the pipe split police used in the specific configuration.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjKhhubeh}(h]display-flickeringah ]h"]display flickeringah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hDisplay artifactsh]hDisplay artifacts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXUsers may see some screen artifacts that can be categorized into two different types: localized artifacts and general artifacts. The localized artifacts happen in some specific areas, such as around the UI window corners; if you see this type of issue, there is a considerable chance that you have a userspace problem, likely Mesa or similar. The general artifacts usually happen on the entire screen. They might be caused by a misconfiguration at the driver level of the display parameters, but the userspace might also cause this issue. One way to identify the source of the problem is to take a screenshot or make a desktop video capture when the problem happens; after checking the screenshot/video recording, if you don't see any of the artifacts, it means that the issue is likely on the driver side. If you can still see the problem in the data collected, it is an issue that probably happened during rendering, and the display code just got the framebuffer already corrupted.h]hXUsers may see some screen artifacts that can be categorized into two different types: localized artifacts and general artifacts. The localized artifacts happen in some specific areas, such as around the UI window corners; if you see this type of issue, there is a considerable chance that you have a userspace problem, likely Mesa or similar. The general artifacts usually happen on the entire screen. They might be caused by a misconfiguration at the driver level of the display parameters, but the userspace might also cause this issue. One way to identify the source of the problem is to take a screenshot or make a desktop video capture when the problem happens; after checking the screenshot/video recording, if you don’t see any of the artifacts, it means that the issue is likely on the driver side. If you can still see the problem in the data collected, it is an issue that probably happened during rendering, and the display code just got the framebuffer already corrupted.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]display-artifactsah ]h"]display artifactsah$]h&]uh1hhhhhhhhKubeh}(h]narrow-down-display-issuesah ]h"]narrow down display issuesah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(h$Disabling/Enabling specific featuresh]h$Disabling/Enabling specific features}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXDC has a struct named `dc_debug_options`, which is statically initialized by all DCE/DCN components based on the specific hardware characteristic. This structure usually facilitates the bring-up phase since developers can start with many disabled features and enable them individually. This is also an important debug feature since users can change it when debugging specific issues.h](hDC has a struct named }(hjhhhNhNubj4)}(h`dc_debug_options`h]hdc_debug_options}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubhXW, which is statically initialized by all DCE/DCN components based on the specific hardware characteristic. This structure usually facilitates the bring-up phase since developers can start with many disabled features and enable them individually. This is also an important debug feature since users can change it when debugging specific issues.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXGFor example, dGPU users sometimes see a problem where a horizontal fillet of flickering happens in some specific part of the screen. This could be an indication of Sub-Viewport issues; after the users identified the target DCN, they can set the `force_disable_subvp` field to true in the statically initialized version of `dc_debug_options` to see if the issue gets fixed. Along the same lines, users/developers can also try to turn off `fams2_config` and `enable_single_display_2to1_odm_policy`. In summary, the `dc_debug_options` is an interesting form for identifying the problem.h](hFor example, dGPU users sometimes see a problem where a horizontal fillet of flickering happens in some specific part of the screen. This could be an indication of Sub-Viewport issues; after the users identified the target DCN, they can set the }(hjhhhNhNubj4)}(h`force_disable_subvp`h]hforce_disable_subvp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh8 field to true in the statically initialized version of }(hjhhhNhNubj4)}(h`dc_debug_options`h]hdc_debug_options}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubha to see if the issue gets fixed. Along the same lines, users/developers can also try to turn off }(hjhhhNhNubj4)}(h`fams2_config`h]h fams2_config}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh and }(hjhhhNhNubj4)}(h'`enable_single_display_2to1_odm_policy`h]h%enable_single_display_2to1_odm_policy}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh. In summary, the }(hjhhhNhNubj4)}(h`dc_debug_options`h]hdc_debug_options}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh4 is an interesting form for identifying the problem.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]$disabling-enabling-specific-featuresah ]h"]$disabling/enabling specific featuresah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hDC Visual Confirmationh]hDC Visual Confirmation}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hhhhhKubh)}(hDisplay core provides a feature named visual confirmation, which is a set of bars added at the scanout time by the driver to convey some specific information. In general, you can enable this debug option by using::h]hDisplay core provides a feature named visual confirmation, which is a set of bars added at the scanout time by the driver to convey some specific information. In general, you can enable this debug option by using:}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj^hhubj)}(h;echo > /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirmh]h;echo > /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirm}hj}sbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKhj^hhubh)}(hWhere `N` is an integer number for some specific scenarios that the developer wants to enable, you will see some of these debug cases in the following subsection.h](hWhere }(hjhhhNhNubj4)}(h`N`h]hN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3hjubh is an integer number for some specific scenarios that the developer wants to enable, you will see some of these debug cases in the following subsection.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj^hhubh)}(hhh](h)}(hMultiple Planes Debugh]hMultiple Planes Debug}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hIf you want to enable or debug multiple planes in a specific user-space application, you can leverage a debug feature named visual confirm. For enabling it, you will need::h]hIf you want to enable or debug multiple planes in a specific user-space application, you can leverage a debug feature named visual confirm. For enabling it, you will need:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(h9echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirmh]h9echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirm}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKhjhhubh)}(hYou need to reload your GUI to see the visual confirmation. When the plane configuration changes or a full update occurs there will be a colored bar at the bottom of each hardware plane being drawn on the screen.h]hYou need to reload your GUI to see the visual confirmation. When the plane configuration changes or a full update occurs there will be a colored bar at the bottom of each hardware plane being drawn on the screen.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(hhh](j)}(hKThe color indicates the format - For example, red is AR24 and green is NV12h]h)}(hjh]hKThe color indicates the format - For example, red is AR24 and green is NV12}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h6The height of the bar indicates the index of the planeh]h)}(hjh]h6The height of the bar indicates the index of the plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hePipe split can be observed if there are two bars with a difference in height covering the same plane h]h)}(hdPipe split can be observed if there are two bars with a difference in height covering the same planeh]hdPipe split can be observed if there are two bars with a difference in height covering the same plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]j)j*uh1jhhhKhjhhubh)}(hConsider the video playback case in which a video is played in a specific plane, and the desktop is drawn in another plane. The video plane should feature one or two green bars at the bottom of the video depending on pipe split configuration.h]hConsider the video playback case in which a video is played in a specific plane, and the desktop is drawn in another plane. The video plane should feature one or two green bars at the bottom of the video depending on pipe split configuration.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(hhh](j)}(h-There should **not** be any visual corruptionh]h)}(hjHh](h There should }(hjJhhhNhNubjH)}(h**not**h]hnot}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhjJubh be any visual corruption}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjFubah}(h]h ]h"]h$]h&]uh1jhjChhhhhNubj)}(h7There should **not** be any underflow or screen flashesh]h)}(hjqh](h There should }(hjshhhNhNubjH)}(h**not**h]hnot}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhjsubh# be any underflow or screen flashes}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjoubah}(h]h ]h"]h$]h&]uh1jhjChhhhhNubj)}(h)There should **not** be any black screensh]h)}(hjh](h There should }(hjhhhNhNubjH)}(h**not**h]hnot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhjubh be any black screens}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjChhhhhNubj)}(h-There should **not** be any cursor corruptionh]h)}(hjh](h There should }(hjhhhNhNubjH)}(h**not**h]hnot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhjubh be any cursor corruption}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjChhhhhNubj)}(hMultiple plane **may** be briefly disabled during window transitions or resizing but should come back after the action has finished h]h)}(hMultiple plane **may** be briefly disabled during window transitions or resizing but should come back after the action has finishedh](hMultiple plane }(hjhhhNhNubjH)}(h**may**h]hmay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jGhjubhm be briefly disabled during window transitions or resizing but should come back after the action has finished}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjChhhhhNubeh}(h]h ]h"]h$]h&]j)j*uh1jhhhKhjhhubeh}(h]multiple-planes-debugah ]h"]multiple planes debugah$]h&]uh1hhj^hhhhhKubh)}(hhh](h)}(hPipe Split Debugh]hPipe Split Debug}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hhhhhKubh)}(hSometimes we need to debug if DCN is splitting pipes correctly, and visual confirmation is also handy for this case. Similar to the MPO case, you can use the below command to enable visual confirmation::h]hSometimes we need to debug if DCN is splitting pipes correctly, and visual confirmation is also handy for this case. Similar to the MPO case, you can use the below command to enable visual confirmation:}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj"hhubj)}(h9echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirmh]h9echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirm}hjAsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKhj"hhubh)}(hIn this case, if you have a pipe split, you will see one small red bar at the bottom of the display covering the entire display width and another bar covering the second pipe. In other words, you will see a bit high bar in the second pipe.h]hIn this case, if you have a pipe split, you will see one small red bar at the bottom of the display covering the entire display width and another bar covering the second pipe. In other words, you will see a bit high bar in the second pipe.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj"hhubeh}(h]pipe-split-debugah ]h"]pipe split debugah$]h&]uh1hhj^hhhhhKubeh}(h]dc-visual-confirmationah ]h"]dc visual confirmationah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h DTN Debugh]h DTN Debug}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhhhhhKubh)}(hDC (DCN) provides an extensive log that dumps multiple details from our hardware configuration. Via debugfs, you can capture those status values by using Display Test Next (DTN) log, which can be captured via debugfs by using::h]hDC (DCN) provides an extensive log that dumps multiple details from our hardware configuration. Via debugfs, you can capture those status values by using Display Test Next (DTN) log, which can be captured via debugfs by using:}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmhhubj)}(h-cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_logh]h-cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKhjmhhubh)}(h|Since this log is updated accordingly with DCN status, you can also follow the change in real-time by using something like::h]h{Since this log is updated accordingly with DCN status, you can also follow the change in real-time by using something like:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmhhubj)}(h;sudo watch -d cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_logh]h;sudo watch -d cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhKhjmhhubh)}(hgWhen reporting a bug related to DC, consider attaching this log before and after you reproduce the bug.h]hgWhen reporting a bug related to DC, consider attaching this log before and after you reproduce the bug.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmhhubeh}(h] dtn-debugah ]h"] dtn debugah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hCollect Firmware informationh]hCollect Firmware information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hWhen reporting issues, it is important to have the firmware information since it can be helpful for debugging purposes. To get all the firmware information, use the command::h]hWhen reporting issues, it is important to have the firmware information since it can be helpful for debugging purposes. To get all the firmware information, use the command:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(h0cat /sys/kernel/debug/dri/0/amdgpu_firmware_infoh]h0cat /sys/kernel/debug/dri/0/amdgpu_firmware_info}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhMhjhhubh)}(hRFrom the display perspective, pay attention to the firmware of the DMCU and DMCUB.h]hRFrom the display perspective, pay attention to the firmware of the DMCU and DMCUB.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h]collect-firmware-informationah ]h"]collect firmware informationah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hDMUB Firmware Debugh]hDMUB Firmware Debug}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM ubh)}(hXJSometimes, dmesg logs aren't enough. This is especially true if a feature is implemented primarily in DMUB firmware. In such cases, all we see in dmesg when an issue arises is some generic timeout error. So, to get more relevant information, we can trace DMUB commands by enabling the relevant bits in `amdgpu_dm_dmub_trace_mask`.h](hX0Sometimes, dmesg logs aren’t enough. This is especially true if a feature is implemented primarily in DMUB firmware. In such cases, all we see in dmesg when an issue arises is some generic timeout error. So, to get more relevant information, we can trace DMUB commands by enabling the relevant bits in }(hj hhhNhNubj4)}(h`amdgpu_dm_dmub_trace_mask`h]hamdgpu_dm_dmub_trace_mask}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j3hj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM hjhhubh)}(h:Currently, we support the tracing of the following groups:h]h:Currently, we support the tracing of the following groups:}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hhh](h)}(h Trace Groupsh]h Trace Groups}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhhhhhMubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jihjfubjj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jihjfubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hNameh]hName}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh7Documentation/gpu/amdgpu/display/trace-groups-table.csvhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Mask Valueh]h Mask Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjfubhtbody)}(hhh](j)}(hhh](j)}(hhh]h)}(hINFOh]hINFO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x1h]h0x1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hIRQ SVCh]hIRQ SVC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x2h]h0x2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hVBIOSh]hVBIOS}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj<ubah}(h]h ]h"]h$]h&]uh1jhj9ubj)}(hhh]h)}(h0x4h]h0x4}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjSubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hREGISTERh]hREGISTER}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjsubah}(h]h ]h"]h$]h&]uh1jhjpubj)}(hhh]h)}(h0x8h]h0x8}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPHY DBGh]hPHY DBG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x10h]h0x10}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPSRh]hPSR}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x20h]h0x20}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hAUXh]hAUX}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x40h]h0x40}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj/ ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSMUh]hSMU}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjO ubah}(h]h ]h"]h$]h&]uh1jhjL ubj)}(hhh]h)}(h0x80h]h0x80}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjf ubah}(h]h ]h"]h$]h&]uh1jhjL ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMALLh]hMALL}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x100h]h0x100}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hABMh]hABM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x200h]h0x200}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hALPMh]hALPM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x400h]h0x400}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTIMERh]hTIMER}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj+ ubah}(h]h ]h"]h$]h&]uh1jhj( ubj)}(hhh]h)}(h0x800h]h0x800}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjB ubah}(h]h ]h"]h$]h&]uh1jhj( ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h HW LOCK MGRh]h HW LOCK MGR}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjb ubah}(h]h ]h"]h$]h&]uh1jhj_ ubj)}(hhh]h)}(h0x1000h]h0x1000}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjy ubah}(h]h ]h"]h$]h&]uh1jhj_ ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hINBOX1h]hINBOX1}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x2000h]h0x2000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPHY SEQh]hPHY SEQ}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x4000h]h0x4000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h PSR STATEh]h PSR STATE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x8000h]h0x8000}(hj! hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hZSTATEh]hZSTATE}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj> ubah}(h]h ]h"]h$]h&]uh1jhj; ubj)}(hhh]h)}(h0x10000h]h0x10000}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjU ubah}(h]h ]h"]h$]h&]uh1jhj; ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTRANSMITTER CTLh]hTRANSMITTER CTL}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhju ubah}(h]h ]h"]h$]h&]uh1jhjr ubj)}(hhh]h)}(h0x20000h]h0x20000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhjr ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h PANEL CNTLh]h PANEL CNTL}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x40000h]h0x40000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hFAMSh]hFAMS}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x80000h]h0x80000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hDPIAh]hDPIA}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x100000h]h0x100000}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj1 ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSUBVPh]hSUBVP}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjQ ubah}(h]h ]h"]h$]h&]uh1jhjN ubj)}(hhh]h)}(h0x200000h]h0x200000}(hjk hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjh ubah}(h]h ]h"]h$]h&]uh1jhjN ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hINBOX0h]hINBOX0}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0x400000h]h0x400000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSDPh]hSDP}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h 0x4000000h]h 0x4000000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hREPLAYh]hREPLAY}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h 0x8000000h]h 0x8000000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hREPLAY RESIDENCYh]hREPLAY RESIDENCY}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj- ubah}(h]h ]h"]h$]h&]uh1jhj* ubj)}(hhh]h)}(h 0x20000000h]h 0x20000000}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjD ubah}(h]h ]h"]h$]h&]uh1jhj* ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h CURSOR INFOh]h CURSOR INFO}(hjg hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjd ubah}(h]h ]h"]h$]h&]uh1jhja ubj)}(hhh]h)}(h 0x80000000h]h 0x80000000}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj{ ubah}(h]h ]h"]h$]h&]uh1jhja ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hIPSh]hIPS}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h 0x100000000h]h 0x100000000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]colsKuh1jdhjaubah}(h]h ]colwidths-givenah"]h$]h&]uh1j_hjNhhhjhNubh)}(h>**Note: Not all ASICs support all of the listed trace groups**h]jH)}(hj h]h:Note: Not all ASICs support all of the listed trace groups}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jGhj ubah}(h]h ]h"]h$]h&]uh1hhhhMhjNhhubh)}(hBSo, to enable just PSR tracing you can use the following command::h]hASo, to enable just PSR tracing you can use the following command:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjNhhubj)}(hA# echo 0x8020 > /sys/kernel/debug/dri/0/amdgpu_dm_dmub_trace_maskh]hA# echo 0x8020 > /sys/kernel/debug/dri/0/amdgpu_dm_dmub_trace_mask}hjsbah}(h]h ]h"]h$]h&]j)j*uh1jhhhM!hjNhhubh)}(hcThen, you need to enable logging trace events to the buffer, which you can do using the following::h]hbThen, you need to enable logging trace events to the buffer, which you can do using the following:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM#hjNhhubj)}(hA# echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_enh]hA# echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_en}hj$sbah}(h]h ]h"]h$]h&]j)j*uh1jhhhM&hjNhhubh)}(hLastly, after you are able to reproduce the issue you are trying to debug, you can disable tracing and read the trace log by using the following::h]hLastly, after you are able to reproduce the issue you are trying to debug, you can disable tracing and read the trace log by using the following:}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM(hjNhhubj)}(hz# echo 0 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_en # cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_tracebufferh]hz# echo 0 > /sys/kernel/debug/dri/0/amdgpu_dm_dmcub_trace_event_en # cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_tracebuffer}hj@sbah}(h]h ]h"]h$]h&]j)j*uh1jhhhM+hjNhhubh)}(hSo, when reporting bugs related to features such as PSR and ABM, consider enabling the relevant bits in the mask before reproducing the issue and attach the log that you obtain from the trace buffer in any bug reports that you create.h]hSo, when reporting bugs related to features such as PSR and ABM, consider enabling the relevant bits in the mask before reproducing the issue and attach the log that you obtain from the trace buffer in any bug reports that you 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