€•QjŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ&/translations/zh_CN/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ&/translations/zh_TW/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ&/translations/it_IT/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ&/translations/ja_JP/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ&/translations/ko_KR/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ&/translations/pt_BR/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ&/translations/sp_SP/gpu/amdgpu/debugfs”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒAMDGPU DebugFS”h]”hŒAMDGPU DebugFS”…””}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³Œ@/var/lib/git/docbuild/linux/Documentation/gpu/amdgpu/debugfs.rst”h´KubhŒ paragraph”“”)”}”(hŒ—The amdgpu driver provides a number of debugfs files to aid in debugging issues in the driver. These are usually found in /sys/kernel/debug/dri/.”h]”hŒ—The amdgpu driver provides a number of debugfs files to aid in debugging issues in the driver. These are usually found in /sys/kernel/debug/dri/.”…””}”(hhÍh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khh·h²hubh¶)”}”(hhh]”(h»)”}”(hŒ DebugFS Files”h]”hŒ DebugFS Files”…””}”(hhÞh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhhÛh²hh³hÊh´K ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_benchmark”h]”hŒamdgpu_benchmark”…””}”(hhïh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhhìh²hh³hÊh´K ubhÌ)”}”(hXQRun benchmarks using the DMA engine the driver uses for GPU memory paging. Write a number to the file to run the test. The results are written to the kernel log. VRAM is on device memory (dGPUs) or carve out (APUs) and GTT (Graphics Translation Tables) is system memory that is accessible by the GPU. The following tests are available:”h]”hXQRun benchmarks using the DMA engine the driver uses for GPU memory paging. Write a number to the file to run the test. The results are written to the kernel log. VRAM is on device memory (dGPUs) or carve out (APUs) and GTT (Graphics Translation Tables) is system memory that is accessible by the GPU. The following tests are available:”…””}”(hhýh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khhìh²hubhŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒ+1: simple test, VRAM to GTT and GTT to VRAM”h]”hÌ)”}”(hjh]”hŒ+1: simple test, VRAM to GTT and GTT to VRAM”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ2: simple test, VRAM to VRAM”h]”hÌ)”}”(hj+h]”hŒ2: simple test, VRAM to VRAM”…””}”(hj-h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khj)ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ.3: GTT to VRAM, buffer size sweep, powers of 2”h]”hÌ)”}”(hjBh]”hŒ.3: GTT to VRAM, buffer size sweep, powers of 2”…””}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khj@ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ.4: VRAM to GTT, buffer size sweep, powers of 2”h]”hÌ)”}”(hjYh]”hŒ.4: VRAM to GTT, buffer size sweep, powers of 2”…””}”(hj[h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KhjWubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ/5: VRAM to VRAM, buffer size sweep, powers of 2”h]”hÌ)”}”(hjph]”hŒ/5: VRAM to VRAM, buffer size sweep, powers of 2”…””}”(hjrh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjnubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ76: GTT to VRAM, buffer size sweep, common display sizes”h]”hÌ)”}”(hj‡h]”hŒ76: GTT to VRAM, buffer size sweep, common display sizes”…””}”(hj‰h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khj…ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ77: VRAM to GTT, buffer size sweep, common display sizes”h]”hÌ)”}”(hjžh]”hŒ77: VRAM to GTT, buffer size sweep, common display sizes”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjœubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubj)”}”(hŒ98: VRAM to VRAM, buffer size sweep, common display sizes ”h]”hÌ)”}”(hŒ88: VRAM to VRAM, buffer size sweep, common display sizes”h]”hŒ88: VRAM to VRAM, buffer size sweep, common display sizes”…””}”(hj·h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khj³ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j h³hÊh´Khhìh²hubeh}”(h]”Œamdgpu-benchmark”ah ]”h"]”Œamdgpu_benchmark”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_test_ib”h]”hŒamdgpu_test_ib”…””}”(hjÞh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjÛh²hh³hÊh´KubhÌ)”}”(hXgRead this file to run simple IB (Indirect Buffer) tests on all kernel managed rings. IBs are command buffers usually generated by userspace applications which are submitted to the kernel for execution on an particular GPU engine. This just runs the simple IB tests included in the kernel. These tests are engine specific and verify that IB submission works.”h]”hXgRead this file to run simple IB (Indirect Buffer) tests on all kernel managed rings. IBs are command buffers usually generated by userspace applications which are submitted to the kernel for execution on an particular GPU engine. This just runs the simple IB tests included in the kernel. These tests are engine specific and verify that IB submission works.”…””}”(hjìh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K!hjÛh²hubeh}”(h]”Œamdgpu-test-ib”ah ]”h"]”Œamdgpu_test_ib”ah$]”h&]”uh1hµhhÛh²hh³hÊh´Kubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_discovery”h]”hŒamdgpu_discovery”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K(ubhÌ)”}”(hŒÉProvides raw access to the IP discovery binary provided by the GPU. Read this file to access the raw binary. This is useful for verifying the contents of the IP discovery table. It is chip specific.”h]”hŒÉProvides raw access to the IP discovery binary provided by the GPU. Read this file to access the raw binary. This is useful for verifying the contents of the IP discovery table. It is chip specific.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K*hjh²hubeh}”(h]”Œamdgpu-discovery”ah ]”h"]”Œamdgpu_discovery”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K(ubh¶)”}”(hhh]”(h»)”}”(hŒ amdgpu_vbios”h]”hŒ amdgpu_vbios”…””}”(hj,h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj)h²hh³hÊh´K/ubhÌ)”}”(hŒ¼Provides raw access to the ROM binary image from the GPU. Read this file to access the raw binary. This is useful for verifying the contents of the video BIOS ROM. It is board specific.”h]”hŒ¼Provides raw access to the ROM binary image from the GPU. Read this file to access the raw binary. This is useful for verifying the contents of the video BIOS ROM. It is board specific.”…””}”(hj:h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K1hj)h²hubeh}”(h]”Œ amdgpu-vbios”ah ]”h"]”Œ amdgpu_vbios”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K/ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_evict_gtt”h]”hŒamdgpu_evict_gtt”…””}”(hjSh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjPh²hh³hÊh´K6ubhÌ)”}”(hŒ`Evict all buffers from the GTT memory pool. Read this file to evict all buffers from this pool.”h]”hŒ`Evict all buffers from the GTT memory pool. Read this file to evict all buffers from this pool.”…””}”(hjah²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K8hjPh²hubeh}”(h]”Œamdgpu-evict-gtt”ah ]”h"]”Œamdgpu_evict_gtt”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K6ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_evict_vram”h]”hŒamdgpu_evict_vram”…””}”(hjzh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjwh²hh³hÊh´Khjwh²hubeh}”(h]”Œamdgpu-evict-vram”ah ]”h"]”Œamdgpu_evict_vram”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K”h]”hŒamdgpu_ring_”…””}”(hjÈh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjÅh²hh³hÊh´KHubhÌ)”}”(hX“Provides read access to the kernel managed ring buffers for each ring . These are useful for debugging problems on a particular ring. The ring buffer is how the CPU sends commands to the GPU. The CPU writes commands into the buffer and then asks the GPU engine to process it. This is the raw binary contents of the ring buffer. Use a tool like UMR to decode the rings into human readable form.”h]”hX“Provides read access to the kernel managed ring buffers for each ring . These are useful for debugging problems on a particular ring. The ring buffer is how the CPU sends commands to the GPU. The CPU writes commands into the buffer and then asks the GPU engine to process it. This is the raw binary contents of the ring buffer. Use a tool like UMR to decode the rings into human readable form.”…””}”(hjÖh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KJhjÅh²hubeh}”(h]”Œamdgpu-ring-name”ah ]”h"]”Œamdgpu_ring_”ah$]”h&]”uh1hµhhÛh²hh³hÊh´KHubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_mqd_”h]”hŒamdgpu_mqd_”…””}”(hjïh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjìh²hh³hÊh´KRubhÌ)”}”(hX$Provides read access to the kernel managed MQD (Memory Queue Descriptor) for ring managed by the kernel driver. MQDs define the features of the ring and are used to store the ring's state when it is not connected to hardware. The driver writes the requested ring features and metadata (GPU addresses of the ring itself and associated buffers) to the MQD and the firmware uses the MQD to populate the hardware when the ring is mapped to a hardware slot. Only available on engines which use MQDs. This provides access to the raw MQD binary.”h]”hX&Provides read access to the kernel managed MQD (Memory Queue Descriptor) for ring managed by the kernel driver. MQDs define the features of the ring and are used to store the ring’s state when it is not connected to hardware. The driver writes the requested ring features and metadata (GPU addresses of the ring itself and associated buffers) to the MQD and the firmware uses the MQD to populate the hardware when the ring is mapped to a hardware slot. Only available on engines which use MQDs. This provides access to the raw MQD binary.”…””}”(hjýh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KThjìh²hubeh}”(h]”Œamdgpu-mqd-name”ah ]”h"]”Œamdgpu_mqd_”ah$]”h&]”uh1hµhhÛh²hh³hÊh´KRubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_error_”h]”hŒamdgpu_error_”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K^ubhÌ)”}”(hŒØProvides an interface to set an error code on the dma fences associated with ring . The error code specified is propagated to all fences associated with the ring. Use this to inject a fence error into a ring.”h]”hŒØProvides an interface to set an error code on the dma fences associated with ring . The error code specified is propagated to all fences associated with the ring. Use this to inject a fence error into a ring.”…””}”(hj$h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K`hjh²hubeh}”(h]”Œamdgpu-error-name”ah ]”h"]”Œamdgpu_error_”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K^ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_pm_info”h]”hŒamdgpu_pm_info”…””}”(hj=h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj:h²hh³hÊh´KeubhÌ)”}”(hXProvides human readable information about the power management features and state of the GPU. This includes current GFX clock, Memory clock, voltages, average SoC power, temperature, GFX load, Memory load, SMU feature mask, VCN power state, clock and power gating features.”h]”hXProvides human readable information about the power management features and state of the GPU. This includes current GFX clock, Memory clock, voltages, average SoC power, temperature, GFX load, Memory load, SMU feature mask, VCN power state, clock and power gating features.”…””}”(hjKh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kghj:h²hubeh}”(h]”Œamdgpu-pm-info”ah ]”h"]”Œamdgpu_pm_info”ah$]”h&]”uh1hµhhÛh²hh³hÊh´Keubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_firmware_info”h]”hŒamdgpu_firmware_info”…””}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjah²hh³hÊh´KmubhÌ)”}”(hŒ©Lists the firmware versions for all firmwares used by the GPU. Only entries with a non-0 version are valid. If the version is 0, the firmware is not valid for the GPU.”h]”hŒ©Lists the firmware versions for all firmwares used by the GPU. Only entries with a non-0 version are valid. If the version is 0, the firmware is not valid for the GPU.”…””}”(hjrh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kohjah²hubeh}”(h]”Œamdgpu-firmware-info”ah ]”h"]”Œamdgpu_firmware_info”ah$]”h&]”uh1hµhhÛh²hh³hÊh´Kmubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_fence_info”h]”hŒamdgpu_fence_info”…””}”(hj‹h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjˆh²hh³hÊh´KtubhÌ)”}”(hXÆShows the last signalled and emitted fence sequence numbers for each kernel driver managed ring. Fences are associated with submissions to the engine. Emitted fences have been submitted to the ring and signalled fences have been signalled by the GPU. Rings with a larger emitted fence value have outstanding work that is still being processed by the engine that owns that ring. When the emitted and signalled fence values are equal, the ring is idle.”h]”hXÆShows the last signalled and emitted fence sequence numbers for each kernel driver managed ring. Fences are associated with submissions to the engine. Emitted fences have been submitted to the ring and signalled fences have been signalled by the GPU. Rings with a larger emitted fence value have outstanding work that is still being processed by the engine that owns that ring. When the emitted and signalled fence values are equal, the ring is idle.”…””}”(hj™h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kvhjˆh²hubeh}”(h]”Œamdgpu-fence-info”ah ]”h"]”Œamdgpu_fence_info”ah$]”h&]”uh1hµhhÛh²hh³hÊh´Ktubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_gem_info”h]”hŒamdgpu_gem_info”…””}”(hj²h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj¯h²hh³hÊh´KubhÌ)”}”(hŒÏLists all of the PIDs using the GPU and the GPU buffers that they have allocated. This lists the buffer size, pool (VRAM, GTT, etc.), and buffer attributes (CPU access required, CPU cache attributes, etc.).”h]”hŒÏLists all of the PIDs using the GPU and the GPU buffers that they have allocated. This lists the buffer size, pool (VRAM, GTT, etc.), and buffer attributes (CPU access required, CPU cache attributes, etc.).”…””}”(hjÀh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khj¯h²hubeh}”(h]”Œamdgpu-gem-info”ah ]”h"]”Œamdgpu_gem_info”ah$]”h&]”uh1hµhhÛh²hh³hÊh´Kubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_vm_info”h]”hŒamdgpu_vm_info”…””}”(hjÙh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjÖh²hh³hÊh´K†ubhÌ)”}”(hŒÕLists all of the PIDs using the GPU and the GPU buffers that they have allocated as well as the status of those buffers relative to that process' GPU virtual address space (e.g., evicted, idle, invalidated, etc.).”h]”hŒ×Lists all of the PIDs using the GPU and the GPU buffers that they have allocated as well as the status of those buffers relative to that process’ GPU virtual address space (e.g., evicted, idle, invalidated, etc.).”…””}”(hjçh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KˆhjÖh²hubeh}”(h]”Œamdgpu-vm-info”ah ]”h"]”Œamdgpu_vm_info”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K†ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_sa_info”h]”hŒamdgpu_sa_info”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjýh²hh³hÊh´KubhÌ)”}”(hXPrints out all of the suballocations (sa) by the suballocation manager in the kernel driver. Prints the GPU address, size, and fence info associated with each suballocation. The suballocations are used internally within the kernel driver for various things.”h]”hXPrints out all of the suballocations (sa) by the suballocation manager in the kernel driver. Prints the GPU address, size, and fence info associated with each suballocation. The suballocations are used internally within the kernel driver for various things.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjýh²hubeh}”(h]”Œamdgpu-sa-info”ah ]”h"]”Œamdgpu_sa_info”ah$]”h&]”uh1hµhhÛh²hh³hÊh´Kubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu__mm”h]”hŒamdgpu__mm”…””}”(hj'h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj$h²hh³hÊh´K•ubhÌ)”}”(hŒ4Prints TTM information about the memory pool .”h]”hŒ4Prints TTM information about the memory pool .”…””}”(hj5h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K—hj$h²hubeh}”(h]”Œamdgpu-pool-mm”ah ]”h"]”Œamdgpu__mm”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K•ubh¶)”}”(hhh]”(h»)”}”(hŒ amdgpu_vram”h]”hŒ amdgpu_vram”…””}”(hjNh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjKh²hh³hÊh´KšubhÌ)”}”(hŒSProvides direct access to VRAM. Used by tools like UMR to inspect objects in VRAM.”h]”hŒSProvides direct access to VRAM. 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Used by tools like UMR to access GPU registers.”…””}”(hjªh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K¨hj™h²hubeh}”(h]”Œ amdgpu-regs”ah ]”h"]”Œ amdgpu_regs_*”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K¦ubh¶)”}”(hhh]”(h»)”}”(hŒ amdgpu_regs2”h]”hŒ amdgpu_regs2”…””}”(hjÃh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjÀh²hh³hÊh´K¬ubhÌ)”}”(hŒKProvides an IOCTL interface used by UMR for interacting with GPU registers.”h]”hŒKProvides an IOCTL interface used by UMR for interacting with GPU registers.”…””}”(hjÑh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K®hjÀh²hubeh}”(h]”Œ amdgpu-regs2”ah ]”h"]”Œ amdgpu_regs2”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K¬ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_sensors”h]”hŒamdgpu_sensors”…””}”(hjêh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjçh²hh³hÊh´K²ubhÌ)”}”(hŒˆProvides an interface to query GPU power metrics (temperature, average power, etc.). Used by tools like UMR to query GPU power metrics.”h]”hŒˆProvides an interface to query GPU power metrics (temperature, average power, etc.). Used by tools like UMR to query GPU power metrics.”…””}”(hjøh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K´hjçh²hubeh}”(h]”Œamdgpu-sensors”ah ]”h"]”Œamdgpu_sensors”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K²ubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_gca_config”h]”hŒamdgpu_gca_config”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K¹ubhÌ)”}”(hŒ—Provides an interface to query GPU details (Graphics/Compute Array config, PCI config, GPU family, etc.). Used by tools like UMR to query GPU details.”h]”hŒ—Provides an interface to query GPU details (Graphics/Compute Array config, PCI config, GPU family, etc.). Used by tools like UMR to query GPU details.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K»hjh²hubeh}”(h]”Œamdgpu-gca-config”ah ]”h"]”Œamdgpu_gca_config”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K¹ubh¶)”}”(hhh]”(h»)”}”(hŒ amdgpu_wave”h]”hŒ amdgpu_wave”…””}”(hj8h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj5h²hh³hÊh´K¿ubhÌ)”}”(hŒ|Used to query GFX/compute wave information from the hardware. Used by tools like UMR to query GFX/compute wave information.”h]”hŒ|Used to query GFX/compute wave information from the hardware. Used by tools like UMR to query GFX/compute wave information.”…””}”(hjFh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÁhj5h²hubeh}”(h]”Œ amdgpu-wave”ah ]”h"]”Œ amdgpu_wave”ah$]”h&]”uh1hµhhÛh²hh³hÊh´K¿ubh¶)”}”(hhh]”(h»)”}”(hŒ amdgpu_gpr”h]”hŒ amdgpu_gpr”…””}”(hj_h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj\h²hh³hÊh´KÅubhÌ)”}”(hŒ•Used to query GFX/compute GPR (General Purpose Register) information from the hardware. Used by tools like UMR to query GPRs when debugging shaders.”h]”hŒ•Used to query GFX/compute GPR (General Purpose Register) information from the hardware. Used by tools like UMR to query GPRs when debugging shaders.”…””}”(hjmh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÇhj\h²hubeh}”(h]”Œ amdgpu-gpr”ah ]”h"]”Œ amdgpu_gpr”ah$]”h&]”uh1hµhhÛh²hh³hÊh´KÅubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_gprwave”h]”hŒamdgpu_gprwave”…””}”(hj†h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjƒh²hh³hÊh´KËubhÌ)”}”(hŒJProvides an IOCTL interface used by UMR for interacting with shader waves.”h]”hŒJProvides an IOCTL interface used by UMR for interacting with shader waves.”…””}”(hj”h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÍhjƒh²hubeh}”(h]”Œamdgpu-gprwave”ah ]”h"]”Œamdgpu_gprwave”ah$]”h&]”uh1hµhhÛh²hh³hÊh´KËubh¶)”}”(hhh]”(h»)”}”(hŒamdgpu_fw_attestation”h]”hŒamdgpu_fw_attestation”…””}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjªh²hh³hÊh´KÐubhÌ)”}”(hŒDProvides an interface for reading back firmware attestation records.”h]”hŒDProvides an interface for reading back firmware attestation records.”…””}”(hj»h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÒhjªh²hubeh}”(h]”Œamdgpu-fw-attestation”ah ]”h"]”Œamdgpu_fw_attestation”ah$]”h&]”uh1hµhhÛh²hh³hÊh´KÐubeh}”(h]”Œ debugfs-files”ah ]”h"]”Œ debugfs files”ah$]”h&]”uh1hµhh·h²hh³hÊh´K ubeh}”(h]”Œamdgpu-debugfs”ah ]”h"]”Œamdgpu debugfs”ah$]”h&]”uh1hµhhh²hh³hÊh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÊuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hºNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÊŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jÞjÛjÖjÓjØjÕjÿjüj&j#jMjJjtjqj›j˜jÂj¿jéjæjj j7j4j^j[j…j‚j¬j©jÓjÐjúj÷j!jjHjEjojlj–j“j½jºjäjáj jj2j/jYjVj€j}j§j¤jÎjËuŒ nametypes”}”(jÞ‰jÖ‰j؉jÿ‰j&‰jM‰jt‰j›‰j‰jé‰j‰j7‰j^‰j…‰j¬‰jÓ‰jú‰j!‰jH‰jo‰j–‰j½‰jä‰j ‰j2‰jY‰j€‰j§‰jΉuh}”(jÛh·jÓhÛjÕhìjüjÛj#jjJj)jqjPj˜jwj¿jžjæjÅj jìj4jj[j:j‚jaj©jˆjÐj¯j÷jÖjjýjEj$jljKj“jrjºj™jájÀjjçj/jjVj5j}j\j¤jƒjËjªuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.