sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftargethhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hhhhhKTubh)}(hNoneh]hNone}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhj;hhubeh}(h]id1ah ]h"]h$]jah&]uh1hhjhhhhhKTjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahhhhhKXubh)}(hfA null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of EEPROM.h]hfA null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of EEPROM.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjahhubh)}(h[Note that the hardware ID can be up to 256 characters long, including the terminating null.h]h[Note that the hardware ID can be up to 256 characters long, including the terminating null.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hjahhubeh}(h]id2ah ]h"]h$]jah&]uh1hhjhhhhhKXjKubeh}(h]hwid-chrome-os-hardware-idah ]h"]hwid (chrome os hardware id)ah$]h&]uh1hhhhhhhhKPubh)}(hhh](h)}(h!FWID (Chrome OS firmware version)h]h!FWID (Chrome OS firmware version)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK_ubh)}(hkThis control method returns the firmware version for the rewritable portion of the main processor firmware.h]hkThis control method returns the firmware version for the rewritable portion of the main processor firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKdubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjhhubeh}(h]id3ah ]h"]h$] arguments:ah&]uh1hhjhhhhhKdjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKhubh)}(hA null-terminated ASCII string containing the complete firmware version for the rewritable portion of the main processor firmware.h]hA null-terminated ASCII string containing the complete firmware version for the rewritable portion of the main processor firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihjhhubeh}(h]id4ah ]h"]h$] result code:ah&]uh1hhjhhhhhKhjKubeh}(h]fwid-chrome-os-firmware-versionah ]h"]!fwid (chrome os firmware version)ah$]h&]uh1hhhhhhhhK_ubh)}(hhh](h)}(h+FRID (Chrome OS read-only firmware version)h]h+FRID (Chrome OS read-only firmware version)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKmubh)}(hjThis control method returns the firmware version for the read-only portion of the main processor firmware.h]hjThis control method returns the firmware version for the read-only portion of the main processor firmware.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hhhhhKrubh)}(hNoneh]hNone}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshj1hhubeh}(h]id5ah ]h"]h$] arguments:ah&]uh1hhjhhhhhKrjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhhhhhKvubh)}(hA null-terminated ASCII string containing the complete firmware version for the read-only (bootstrap + recovery ) portion of the main processor firmware.h]hA null-terminated ASCII string containing the complete firmware version for the read-only (bootstrap + recovery ) portion of the main processor firmware.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhjXhhubeh}(h]id6ah ]h"]h$] result code:ah&]uh1hhjhhhhhKvjKubeh}(h])frid-chrome-os-read-only-firmware-versionah ]h"]+frid (chrome os read-only firmware version)ah$]h&]uh1hhhhhhhhKmubh)}(hhh](h)}(h!BINF (Chrome OS boot information)h]h!BINF (Chrome OS boot information)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK{ubh)}(h?This control method returns information about the current boot.h]h?This control method returns information about the current boot.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]id7ah ]h"]h$] arguments:ah&]uh1hhjhhhhhKjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh literal_block)}(h~Package { Reserved1 Reserved2 Active EC Firmware Active Main Firmware Type Reserved5 }h]h~Package { Reserved1 Reserved2 Active EC Firmware Active Main Firmware Type Reserved5 }}hjsbah}(h]h ]h"]h$]h&]hhforcelanguagenonehighlight_args}uh1jhhhKhjhhubh)}(hhh]h)}(hhh](h)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjubh)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjubh)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjubj)}(hhh]j )}(hhh](j)}(hhh]h)}(hFieldh]hField}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hFormath]hFormat}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj4ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Descriptionh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjKubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1jhjubjN)}(hhh](j )}(hhh](j)}(hhh]h)}(h Reserved1h]h Reserved1}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjtubah}(h]h ]h"]h$]h&]uh1jhjqubj)}(hhh]h)}(hDWORDh]hDWORD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjqubj)}(hhh]h)}(h@Set to 256 (0x100). This indicates this field is no longer used.h]h@Set to 256 (0x100). This indicates this field is no longer used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1j hjnubj )}(hhh](j)}(hhh]h)}(h Reserved2h]h Reserved2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hDWORDh]hDWORD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h@Set to 256 (0x100). This indicates this field is no longer used.h]h@Set to 256 (0x100). This indicates this field is no longer used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1j hjnubj )}(hhh](j)}(hhh]h)}(hActive EC firmwareh]hActive EC firmware}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hDWORDh]hDWORD}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h+The EC firmware which was used during boot.h]h+The EC firmware which was used during boot.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj>ubh bullet_list)}(hhh](h list_item)}(h!0 - Read-only (recovery) firmwareh]h)}(hjXh]h!0 - Read-only (recovery) firmware}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjVubah}(h]h ]h"]h$]h&]uh1jThjQubjU)}(h1 - Rewritable firmware. h]h)}(h1 - Rewritable firmware.h]h1 - Rewritable firmware.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jThjQubeh}(h]h ]h"]h$]h&]bullet-uh1jOhhhKhj>ubh)}(h,Set to 0 if EC firmware is always read-only.h]h,Set to 0 if EC firmware is always read-only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj>ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1j hjnubj )}(hhh](j)}(hhh]h)}(hActive Main Firmware Typeh]hActive Main Firmware Type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hDWORDh]hDWORD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h2The main firmware type which was used during boot.h]h2The main firmware type which was used during boot.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubjP)}(hhh](jU)}(h 0 - Recoveryh]h)}(hjh]h 0 - Recovery}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jThjubjU)}(h 1 - Normalh]h)}(hj h]h 1 - Normal}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jThjubjU)}(h 2 - Developerh]h)}(hj h]h 2 - Developer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jThjubjU)}(h(3 - netboot (factory installation only) h]h)}(h'3 - netboot (factory installation only)h]h'3 - netboot (factory installation only)}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj1 ubah}(h]h ]h"]h$]h&]uh1jThjubeh}(h]h ]h"]h$]h&]jjuh1jOhhhKhjubh)}(hOther values are reserved.h]hOther values are reserved.}(hjO hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1j hjnubj )}(hhh](j)}(hhh]h)}(h Reserved5h]h Reserved5}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjl ubah}(h]h ]h"]h$]h&]uh1jhji ubj)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhji ubj)}(hhh]h)}(h@Set to 256 (0x100). This indicates this field is no longer used.h]h@Set to 256 (0x100). This indicates this field is no longer used.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhji ubeh}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1jMhjubeh}(h]h ]h"]h$]h&]colsKuh1hhjubah}(h]h ]h"]h$]h&]uh1hhjhhhNhNubeh}(h]id8ah ]h"]h$] result code:ah&]uh1hhjhhhhhKjKubeh}(h]binf-chrome-os-boot-informationah ]h"]!binf (chrome os boot information)ah$]h&]uh1hhhhhhhhK{ubh)}(hhh](h)}(h!GPIO (Chrome OS GPIO assignments)h]h!GPIO (Chrome OS GPIO assignments)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hThis control method returns information about Chrome OS specific GPIO assignments for Chrome OS hardware, so the kernel can directly control that hardware.h]hThis control method returns information about Chrome OS specific GPIO assignments for Chrome OS hardware, so the kernel can directly control that hardware.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hNoneh]hNone}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubeh}(h]id9ah ]h"]h$] arguments:ah&]uh1hhj hhhhhKjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubj)}(hXPackage { Package { // First GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ }, ... Package { // Last GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ } }h]hXPackage { Package { // First GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ }, ... Package { // Last GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ } }}hj1 sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhhhKhj hhubh)}(h2Where ASCIIZ means a null-terminated ASCII string.h]h2Where ASCIIZ means a null-terminated ASCII string.}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hhh]h)}(hhh](h)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjQ ubh)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjQ ubh)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjQ ubj)}(hhh]j )}(hhh](j)}(hhh]h)}(hFieldh]hField}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjx ubah}(h]h ]h"]h$]h&]uh1jhju ubj)}(hhh]h)}(hFormath]hFormat}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhju ubj)}(hhh]h)}(h Descriptionh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhju ubeh}(h]h ]h"]h$]h&]uh1j hjr ubah}(h]h ]h"]h$]h&]uh1jhjQ ubjN)}(hhh](j )}(hhh](j)}(hhh]h)}(h Signal Typeh]h Signal Type}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(hType of GPIO signalh]hType of GPIO signal}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubjP)}(hhh](jU)}(h0x00000001 - Recovery buttonh]h)}(hj h]h0x00000001 - Recovery button}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jThj ubjU)}(h"0x00000002 - Developer mode switchh]h)}(hj* h]h"0x00000002 - Developer mode switch}(hj, hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj( ubah}(h]h ]h"]h$]h&]uh1jThj ubjU)}(h-0x00000003 - Firmware write protection switchh]h)}(hjA h]h-0x00000003 - Firmware write protection switch}(hjC hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj? ubah}(h]h ]h"]h$]h&]uh1jThj ubjU)}(h 0x00000100 - Debug header GPIO 0h]h)}(hjX h]h 0x00000100 - Debug header GPIO 0}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjV ubah}(h]h ]h"]h$]h&]uh1jThj ubjU)}(h...h]h)}(hjo h]h...}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjm ubah}(h]h ]h"]h$]h&]uh1jThj ubjU)}(h#0x000001FF - Debug header GPIO 255 h]h)}(h"0x000001FF - Debug header GPIO 255h]h"0x000001FF - Debug header GPIO 255}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jThj ubeh}(h]h ]h"]h$]h&]jjuh1jOhhhKhj ubh)}(hOther values are reserved.h]hOther values are reserved.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1j hj ubj )}(hhh](j)}(hhh]h)}(h Attributesh]h Attributes}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(hSignal attributes as bitfields:h]hSignal attributes as bitfields:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubjP)}(hhh]jU)}(h0x00000001 - Signal is active-high (for button, a GPIO value of 1 means the button is pressed; for switches, a GPIO value of 1 means the switch is enabled). If this bit is 0, the signal is active low. Set to 0 for debug header GPIOs. h]h)}(h0x00000001 - Signal is active-high (for button, a GPIO value of 1 means the button is pressed; for switches, a GPIO value of 1 means the switch is enabled). If this bit is 0, the signal is active low. Set to 0 for debug header GPIOs.h]h0x00000001 - Signal is active-high (for button, a GPIO value of 1 means the button is pressed; for switches, a GPIO value of 1 means the switch is enabled). If this bit is 0, the signal is active low. Set to 0 for debug header GPIOs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jThj ubah}(h]h ]h"]h$]h&]jjuh1jOhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1j hj ubj )}(hhh](j)}(hhh]h)}(hController Offseth]hController Offset}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj. ubah}(h]h ]h"]h$]h&]uh1jhj+ ubj)}(hhh]h)}(hDWORDh]hDWORD}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjE ubah}(h]h ]h"]h$]h&]uh1jhj+ ubj)}(hhh]h)}(h(GPIO number on the specified controller.h]h(GPIO number on the specified controller.}(hj_ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj\ ubah}(h]h ]h"]h$]h&]uh1jhj+ ubeh}(h]h ]h"]h$]h&]uh1j hj ubj )}(hhh](j)}(hhh]h)}(hController Nameh]hController Name}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj| ubah}(h]h ]h"]h$]h&]uh1jhjy ubj)}(hhh]h)}(hASCIIZh]hASCIIZ}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjy ubj)}(hhh]h)}(hXName of the controller for the GPIO. Currently supported names: "NM10" - Intel NM10 chiph]h\Name of the controller for the GPIO. Currently supported names: “NM10” - Intel NM10 chip}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjy ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1jMhjQ ubeh}(h]h ]h"]h$]h&]colsKuh1hhjN ubah}(h]h ]h"]h$]h&]uh1hhj hhhNhNubeh}(h]id10ah ]h"]h$] result code:ah&]uh1hhj hhhhhKjKubeh}(h]gpio-chrome-os-gpio-assignmentsah ]h"]!gpio (chrome os gpio assignments)ah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h VBNV (Chrome OS NVRAM locations)h]h VBNV (Chrome OS NVRAM locations)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hkThis control method returns information about the NVRAM (CMOS) locations used to communicate with the BIOS.h]hkThis control method returns information about the NVRAM (CMOS) locations used to communicate with the BIOS.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hNoneh]hNone}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h]id11ah ]h"]h$] arguments:ah&]uh1hhj hhhhhMjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0 hhhhhM ubj)}(h]Package { NV Storage Block Offset //DWORD NV Storage Block Size //DWORD }h]h]Package { NV Storage Block Offset //DWORD NV Storage Block Size //DWORD }}hjA sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhhhM hj0 hhubh)}(hhh]h)}(hhh](h)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjS ubh)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjS ubh)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1hhjS ubj)}(hhh]j )}(hhh](j)}(hhh]h)}(hFieldh]hField}(hj} hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjz ubah}(h]h ]h"]h$]h&]uh1jhjw ubj)}(hhh]h)}(hFormath]hFormat}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhjw ubj)}(hhh]h)}(h Descriptionh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhjw ubeh}(h]h ]h"]h$]h&]uh1j hjt ubah}(h]h ]h"]h$]h&]uh1jhjS ubjN)}(hhh](j )}(hhh](j)}(hhh]h)}(hNV Storage Block Offseth]hNV Storage Block Offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hOffset in CMOS bank 0 of the verified boot non-volatile storage block, counting from the first writable CMOS byte (that is, offset=0 is the byte following the 14 bytes of clock data).h]hOffset in CMOS bank 0 of the verified boot non-volatile storage block, counting from the first writable CMOS byte (that is, offset=0 is the byte following the 14 bytes of clock data).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1j hj ubj )}(hhh](j)}(hhh]h)}(hNV Storage Block Sizeh]hNV Storage Block Size}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hDWORDh]hDWORD}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM!hj6ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h>Size in bytes of the verified boot non-volatile storage block.h]h>Size in bytes of the verified boot non-volatile storage block.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM"hjMubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1jMhjS ubeh}(h]h ]h"]h$]h&]colsKuh1hhjP ubah}(h]h ]h"]h$]h&]uh1hhj0 hhhNhNubeh}(h]id12ah ]h"]h$] result code:ah&]uh1hhj hhhhhM jKubeh}(h]vbnv-chrome-os-nvram-locationsah ]h"] vbnv (chrome os nvram locations)ah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h!FMAP (Chrome OS flashmap address)h]h!FMAP (Chrome OS flashmap address)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM%ubh)}(hmThis control method returns the physical memory address of the start of the main processor firmware flashmap.h]hmThis control method returns the physical memory address of the start of the main processor firmware flashmap.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM&hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM*ubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM+hjhhubeh}(h]id13ah ]h"]h$] arguments:ah&]uh1hhjhhhhhM*jKubh)}(hhh](h)}(hNoneResult code:h]hNoneResult code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM.ubh)}(hdA DWORD containing the physical memory address of the start of the main processor firmware flashmap.h]hdA DWORD containing the physical memory address of the start of the main processor firmware flashmap.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM/hjhhubeh}(h]noneresult-codeah ]h"]noneresult code:ah$]h&]uh1hhjhhhhhM.ubeh}(h]fmap-chrome-os-flashmap-addressah ]h"]!fmap (chrome os flashmap address)ah$]h&]uh1hhhhhhhhM%ubh)}(hhh](h)}(h#VDTA (Chrome OS verified boot data)h]h#VDTA (Chrome OS verified boot data)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM3ubh)}(hThis control method returns the verified boot data block shared between the firmware verification step and the kernel verification step.h]hThis control method returns the verified boot data block shared between the firmware verification step and the kernel verification step.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hhhhhM8ubh)}(hNoneh]hNone}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM9hj!hhubeh}(h]id14ah ]h"]h$] arguments:ah&]uh1hhjhhhhhM8jKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhhhhhM<ubh)}(h1A buffer containing the verified boot data block.h]h1A buffer containing the verified boot data block.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM=hjHhhubeh}(h]id15ah ]h"]h$] result code:ah&]uh1hhjhhhhhM<jKubeh}(h]!vdta-chrome-os-verified-boot-dataah ]h"]#vdta (chrome os verified boot data)ah$]h&]uh1hhhhhhhhM3ubh)}(hhh](h)}(h!MECK (Management Engine Checksum)h]h!MECK (Management Engine Checksum)}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhhhhhM@ubh)}(hXTThis control method returns the SHA-1 or SHA-256 hash that is read out of the Management Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that the ME firmware has not changed. If Management Engine is not present, or if the firmware was unable to read the extended registers, this buffer can be zero.h]hXTThis control method returns the SHA-1 or SHA-256 hash that is read out of the Management Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that the ME firmware has not changed. If Management Engine is not present, or if the firmware was unable to read the extended registers, this buffer can be zero.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjwhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMGubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjhhubeh}(h]id16ah ]h"]h$] arguments:ah&]uh1hhjwhhhhhMGjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMKubh)}(h A buffer containing the ME hash.h]h A buffer containing the ME hash.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMLhjhhubeh}(h]id17ah ]h"]h$] result code:ah&]uh1hhjwhhhhhMKjKubeh}(h]meck-management-engine-checksumah ]h"]!meck (management engine checksum)ah$]h&]uh1hhhhhhhhM@ubh)}(hhh](h)}(hMLST (Chrome OS method list)h]hMLST (Chrome OS method list)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMOubh)}(hkThis control method returns a list of the other control methods supported by the Chrome OS hardware device.h]hkThis control method returns a list of the other control methods supported by the Chrome OS hardware device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMTubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMUhj hhubeh}(h]id18ah ]h"]h$] arguments:ah&]uh1hhjhhhhhMTjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hhhhhMXubh)}(hA package containing a list of null-terminated ASCII strings, one for each control method supported by the Chrome OS hardware device, not including the MLST method itself. For this version of the specification, the result is:h]hA package containing a list of null-terminated ASCII strings, one for each control method supported by the Chrome OS hardware device, not including the MLST method itself. For this version of the specification, the result is:}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMYhj2hhubj)}(hPackage { "CHSW", "FWID", "HWID", "FRID", "BINF", "GPIO", "VBNV", "FMAP", "VDTA", "MECK" }h]hPackage { "CHSW", "FWID", "HWID", "FRID", "BINF", "GPIO", "VBNV", "FMAP", "VDTA", "MECK" }}hjQsbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhhhM]hj2hhubeh}(h]id19ah ]h"]h$] result code:ah&]uh1hhjhhhhhMXjKubeh}(h]mlst-chrome-os-method-listah ]h"]mlst (chrome os method list)ah$]h&]uh1hhhhhhhhMOubeh}(h]chrome-os-acpi-deviceah ]h"]chrome os acpi deviceah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksjfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(jujrjj arguments:N result code:Njjjj jjj j j j jjjjjjjtjqjjjmjju nametypes}(jujjjjjjj j jjjjtjjmuh}(jrhjjjjjjjjj\j;jjaj jjjjjjjjRj1jyjXj jjjj jj j j j j j jj j* j jj0 jjjjjjjqjjBj!jijHjjwjjjjjjjj,j jbj2jhu footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}jKsRparse_messages](hsystem_message)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j\alevelKtypeINFOsourcehlineKTuh1jhj;hhhhhKTubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineKXuh1jhjahhhhhKXubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7ubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineKduh1jhjhhhhhKdubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineKhuh1jhjhhhhhKhubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmubah}(h]h ]h"]h$]h&]jRalevelKtypejsourcehlineKruh1jhj1hhhhhKrubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jyalevelKtypejsourcehlineKvuh1jhjXhhhhhKvubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineKuh1jhjhhhhhKubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j alevelKtypejsourcehlineKuh1jhjhhhhhKubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j alevelKtypejsourcehlineKuh1jhj hhhhhKubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j alevelKtypejsourcehlineKuh1jhj hhhhhKubj)}(hhh]h)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejlineKsourcehuh1jhjm ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*ubah}(h]h ]h"]h$]h&]j* alevelKtypejsourcehlineMuh1jhj hhhhhMubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineM uh1jhj0 hhhhhM ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`ubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineM*uh1jhjhhhhhM*ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{ubah}(h]h ]h"]h$]h&]jBalevelKtypejsourcehlineM8uh1jhj!hhhhhM8ubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jialevelKtypejsourcehlineM<uh1jhjHhhhhhM<ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineMGuh1jhjhhhhhMGubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypejsourcehlineMKuh1jhjhhhhhMKubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j,alevelKtypejsourcehlineMTuh1jhj hhhhhMTubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jbalevelKtypejsourcehlineMXuh1jhj2hhhhhMXubetransform_messages] transformerN include_log] decorationNhhub.