sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftargetubah}(h]h ]h"]h$]h&]uh1j%hj"ubeh}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j!)}(hhh](j&)}(hhh]h)}(hCHSWh]hCHSW}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjiubah}(h]h ]h"]h$]h&]uh1j%hjfubj&)}(hhh]h)}(hChrome OS switch positionsh]hChrome OS switch positions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjfubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hHWIDh]hHWID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hChrome OS hardware IDh]hChrome OS hardware ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hFWIDh]hFWID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hChrome OS firmware versionh]hChrome OS firmware version}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hFRIDh]hFRID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(h$Chrome OS read-only firmware versionh]h$Chrome OS read-only firmware version}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj%ubah}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hBINFh]hBINF}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjEubah}(h]h ]h"]h$]h&]uh1j%hjBubj&)}(hhh]h)}(hChrome OS boot informationh]hChrome OS boot information}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj\ubah}(h]h ]h"]h$]h&]uh1j%hjBubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hGPIOh]hGPIO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK!hj|ubah}(h]h ]h"]h$]h&]uh1j%hjyubj&)}(hhh]h)}(hChrome OS GPIO assignmentsh]hChrome OS GPIO assignments}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK"hjubah}(h]h ]h"]h$]h&]uh1j%hjyubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hVBNVh]hVBNV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK$hjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hChrome OS NVRAM locationsh]hChrome OS NVRAM locations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hVDTAh]hVDTA}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hChrome OS verified boot datah]hChrome OS verified boot data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hFMAPh]hFMAP}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hj!ubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hChrome OS flashmap base addressh]hChrome OS flashmap base address}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hj8ubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjcubj!)}(hhh](j&)}(hhh]h)}(hMLSTh]hMLST}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hjXubah}(h]h ]h"]h$]h&]uh1j%hjUubj&)}(hhh]h)}(hChrome OS method listh]hChrome OS method list}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjoubah}(h]h ]h"]h$]h&]uh1j%hjUubeh}(h]h ]h"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]uh1jahjubeh}(h]h ]h"]h$]h&]colsKuh1jhhubeh}(h]id20ah ]h"]h$]h&]uh1hhhhhhNhNubh)}(hhh](h)}(h!CHSW (Chrome OS switch positions)h]h!CHSW (Chrome OS switch positions)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK1ubh)}(hZThis control method returns the switch positions for Chrome OS specific hardware switches.h]hZThis control method returns the switch positions for Chrome OS specific hardware switches.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK5ubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hjhhubeh}(h] argumentsah ]h"]h$] arguments:ah&]uh1hhjhhhhhK5 referencedKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK9ubh)}(h8An integer containing the switch positions as bitfields:h]h8An integer containing the switch positions as bitfields:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjhhubh)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhj ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhj ubjb)}(hhh](j!)}(hhh](j&)}(hhh]h)}(h 0x00000002h]h 0x00000002}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK?hj&ubah}(h]h ]h"]h$]h&]uh1j%hj#ubj&)}(hhh]h)}(h5Recovery button was pressed when x86 firmware booted.h]h5Recovery button was pressed when x86 firmware booted.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hj=ubah}(h]h ]h"]h$]h&]uh1j%hj#ubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(h 0x00000004h]h 0x00000004}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhj]ubah}(h]h ]h"]h$]h&]uh1j%hjZubj&)}(hhh]h)}(hnRecovery button was pressed when EC firmware booted. (required if EC EEPROM is rewritable; otherwise optional)h]hnRecovery button was pressed when EC firmware booted. (required if EC EEPROM is rewritable; otherwise optional)}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjtubah}(h]h ]h"]h$]h&]uh1j%hjZubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(h 0x00000020h]h 0x00000020}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKFhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(h6Developer switch was enabled when x86 firmware booted.h]h6Developer switch was enabled when x86 firmware booted.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(h 0x00000200h]h 0x00000200}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hFirmware write protection was disabled when x86 firmware booted. (required if firmware write protection is controlled through x86 BIOS; otherwise optional)h]hFirmware write protection was disabled when x86 firmware booted. (required if firmware write protection is controlled through x86 BIOS; otherwise optional)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1jahj ubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1hhjhhhNhNubh)}(h3All other bits are reserved and should be set to 0.h]h3All other bits are reserved and should be set to 0.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhjhhubeh}(h] result-codeah ]h"]h$] result code:ah&]uh1hhjhhhhhK9jKubeh}(h]chsw-chrome-os-switch-positionsah ]h"]!chsw (chrome os switch positions)ah$]h&]uh1hhhhhhhhK1ubh)}(hhh](h)}(hHWID (Chrome OS hardware ID)h]hHWID (Chrome OS hardware ID)}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hhhhhKPubh)}(h?This control method returns the hardware ID for the Chromebook.h]h?This control method returns the hardware ID for the Chromebook.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhj0hhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhhhhhKTubh)}(hNoneh]hNone}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhjOhhubeh}(h]id1ah ]h"]h$]jah&]uh1hhj0hhhhhKTjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhhhhhKXubh)}(hfA null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of EEPROM.h]hfA null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of EEPROM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjuhhubh)}(h[Note that the hardware ID can be up to 256 characters long, including the terminating null.h]h[Note that the hardware ID can be up to 256 characters long, including the terminating null.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hjuhhubeh}(h]id2ah ]h"]h$]j&ah&]uh1hhj0hhhhhKXjKubeh}(h]hwid-chrome-os-hardware-idah ]h"]hwid (chrome os hardware id)ah$]h&]uh1hhhhhhhhKPubh)}(hhh](h)}(h!FWID (Chrome OS firmware version)h]h!FWID (Chrome OS firmware version)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK_ubh)}(hkThis control method returns the firmware version for the rewritable portion of the main processor firmware.h]hkThis control method returns the firmware version for the rewritable portion of the main processor firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKdubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjhhubeh}(h]id3ah ]h"]h$] arguments:ah&]uh1hhjhhhhhKdjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKhubh)}(hA null-terminated ASCII string containing the complete firmware version for the rewritable portion of the main processor firmware.h]hA null-terminated ASCII string containing the complete firmware version for the rewritable portion of the main processor firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihjhhubeh}(h]id4ah ]h"]h$] result code:ah&]uh1hhjhhhhhKhjKubeh}(h]fwid-chrome-os-firmware-versionah ]h"]!fwid (chrome os firmware version)ah$]h&]uh1hhhhhhhhK_ubh)}(hhh](h)}(h+FRID (Chrome OS read-only firmware version)h]h+FRID (Chrome OS read-only firmware version)}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hhhhhKmubh)}(hjThis control method returns the firmware version for the read-only portion of the main processor firmware.h]hjThis control method returns the firmware version for the read-only portion of the main processor firmware.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhj&hhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhhhhhKrubh)}(hNoneh]hNone}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjEhhubeh}(h]id5ah ]h"]h$] arguments:ah&]uh1hhj&hhhhhKrjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhhhhhKvubh)}(hA null-terminated ASCII string containing the complete firmware version for the read-only (bootstrap + recovery ) portion of the main processor firmware.h]hA null-terminated ASCII string containing the complete firmware version for the read-only (bootstrap + recovery ) portion of the main processor firmware.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhjlhhubeh}(h]id6ah ]h"]h$] result code:ah&]uh1hhj&hhhhhKvjKubeh}(h])frid-chrome-os-read-only-firmware-versionah ]h"]+frid (chrome os read-only firmware version)ah$]h&]uh1hhhhhhhhKmubh)}(hhh](h)}(h!BINF (Chrome OS boot information)h]h!BINF (Chrome OS boot information)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK{ubh)}(h?This control method returns information about the current boot.h]h?This control method returns information about the current boot.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]id7ah ]h"]h$] arguments:ah&]uh1hhjhhhhhKjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh literal_block)}(h~Package { Reserved1 Reserved2 Active EC Firmware Active Main Firmware Type Reserved5 }h]h~Package { Reserved1 Reserved2 Active EC Firmware Active Main Firmware Type Reserved5 }}hjsbah}(h]h ]h"]h$]h&]hhƌforcelanguagenonehighlight_args}uh1jhhhKhjhhubh)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhj ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhj ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhj ubj)}(hhh]j!)}(hhh](j&)}(hhh]h)}(hFieldh]hField}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj1ubah}(h]h ]h"]h$]h&]uh1j%hj.ubj&)}(hhh]h)}(hFormath]hFormat}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjHubah}(h]h ]h"]h$]h&]uh1j%hj.ubj&)}(hhh]h)}(h Descriptionh]h Description}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj_ubah}(h]h ]h"]h$]h&]uh1j%hj.ubeh}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1jhj ubjb)}(hhh](j!)}(hhh](j&)}(hhh]h)}(h Reserved1h]h Reserved1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hDWORDh]hDWORD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(h@Set to 256 (0x100). This indicates this field is no longer used.h]h@Set to 256 (0x100). This indicates this field is no longer used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjubj!)}(hhh](j&)}(hhh]h)}(h Reserved2h]h Reserved2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hDWORDh]hDWORD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(h@Set to 256 (0x100). This indicates this field is no longer used.h]h@Set to 256 (0x100). This indicates this field is no longer used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjubj!)}(hhh](j&)}(hhh]h)}(hActive EC firmwareh]hActive EC firmware}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj$ubah}(h]h ]h"]h$]h&]uh1j%hj!ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj;ubah}(h]h ]h"]h$]h&]uh1j%hj!ubj&)}(hhh](h)}(h+The EC firmware which was used during boot.h]h+The EC firmware which was used during boot.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjRubh bullet_list)}(hhh](h list_item)}(h!0 - Read-only (recovery) firmwareh]h)}(hjlh]h!0 - Read-only (recovery) firmware}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjjubah}(h]h ]h"]h$]h&]uh1jhhjeubji)}(h1 - Rewritable firmware. h]h)}(h1 - Rewritable firmware.h]h1 - Rewritable firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhhjeubeh}(h]h ]h"]h$]h&]bullet-uh1jchhhKhjRubh)}(h,Set to 0 if EC firmware is always read-only.h]h,Set to 0 if EC firmware is always read-only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjRubeh}(h]h ]h"]h$]h&]uh1j%hj!ubeh}(h]h ]h"]h$]h&]uh1j hjubj!)}(hhh](j&)}(hhh]h)}(hActive Main Firmware Typeh]hActive Main Firmware Type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh]h)}(hDWORDh]hDWORD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j%hjubj&)}(hhh](h)}(h2The main firmware type which was used during boot.h]h2The main firmware type which was used during boot.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubjd)}(hhh](ji)}(h 0 - Recoveryh]h)}(hj h]h 0 - Recovery}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhhjubji)}(h 1 - Normalh]h)}(hj h]h 1 - Normal}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhhjubji)}(h 2 - Developerh]h)}(hj0 h]h 2 - Developer}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj. ubah}(h]h ]h"]h$]h&]uh1jhhjubji)}(h(3 - netboot (factory installation only) h]h)}(h'3 - netboot (factory installation only)h]h'3 - netboot (factory installation only)}(hjI hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjE ubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]jjuh1jchhhKhjubh)}(hOther values are reserved.h]hOther values are reserved.}(hjc hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1j%hjubeh}(h]h ]h"]h$]h&]uh1j hjubj!)}(hhh](j&)}(hhh]h)}(h Reserved5h]h Reserved5}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj} ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj} ubj&)}(hhh]h)}(h@Set to 256 (0x100). This indicates this field is no longer used.h]h@Set to 256 (0x100). This indicates this field is no longer used.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj} ubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1jahj ubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1hhjhhhNhNubeh}(h]id8ah ]h"]h$] result code:ah&]uh1hhjhhhhhKjKubeh}(h]binf-chrome-os-boot-informationah ]h"]!binf (chrome os boot information)ah$]h&]uh1hhhhhhhhK{ubh)}(hhh](h)}(h!GPIO (Chrome OS GPIO assignments)h]h!GPIO (Chrome OS GPIO assignments)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hThis control method returns information about Chrome OS specific GPIO assignments for Chrome OS hardware, so the kernel can directly control that hardware.h]hThis control method returns information about Chrome OS specific GPIO assignments for Chrome OS hardware, so the kernel can directly control that hardware.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hNoneh]hNone}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubeh}(h]id9ah ]h"]h$] arguments:ah&]uh1hhj hhhhhKjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4 hhhhhKubj)}(hXPackage { Package { // First GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ }, ... Package { // Last GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ } }h]hXPackage { Package { // First GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ }, ... Package { // Last GPIO assignment Signal Type //DWORD Attributes //DWORD Controller Offset //DWORD Controller Name //ASCIIZ } }}hjE sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhhhKhj4 hhubh)}(h2Where ASCIIZ means a null-terminated ASCII string.h]h2Where ASCIIZ means a null-terminated ASCII string.}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj4 hhubh)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhje ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhje ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhje ubj)}(hhh]j!)}(hhh](j&)}(hhh]h)}(hFieldh]hField}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hFormath]hFormat}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(h Descriptionh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhje ubjb)}(hhh](j!)}(hhh](j&)}(hhh]h)}(h Signal Typeh]h Signal Type}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh](h)}(hType of GPIO signalh]hType of GPIO signal}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubjd)}(hhh](ji)}(h0x00000001 - Recovery buttonh]h)}(hj' h]h0x00000001 - Recovery button}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj% ubah}(h]h ]h"]h$]h&]uh1jhhj" ubji)}(h"0x00000002 - Developer mode switchh]h)}(hj> h]h"0x00000002 - Developer mode switch}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj< ubah}(h]h ]h"]h$]h&]uh1jhhj" ubji)}(h-0x00000003 - Firmware write protection switchh]h)}(hjU h]h-0x00000003 - Firmware write protection switch}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjS ubah}(h]h ]h"]h$]h&]uh1jhhj" ubji)}(h 0x00000100 - Debug header GPIO 0h]h)}(hjl h]h 0x00000100 - Debug header GPIO 0}(hjn hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjj ubah}(h]h ]h"]h$]h&]uh1jhhj" ubji)}(h...h]h)}(hj h]h...}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhhj" ubji)}(h#0x000001FF - Debug header GPIO 255 h]h)}(h"0x000001FF - Debug header GPIO 255h]h"0x000001FF - Debug header GPIO 255}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhhj" ubeh}(h]h ]h"]h$]h&]jjuh1jchhhKhj ubh)}(hOther values are reserved.h]hOther values are reserved.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(h Attributesh]h Attributes}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh](h)}(hSignal attributes as bitfields:h]hSignal attributes as bitfields:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubjd)}(hhh]ji)}(h0x00000001 - Signal is active-high (for button, a GPIO value of 1 means the button is pressed; for switches, a GPIO value of 1 means the switch is enabled). If this bit is 0, the signal is active low. Set to 0 for debug header GPIOs. h]h)}(h0x00000001 - Signal is active-high (for button, a GPIO value of 1 means the button is pressed; for switches, a GPIO value of 1 means the switch is enabled). If this bit is 0, the signal is active low. Set to 0 for debug header GPIOs.h]h0x00000001 - Signal is active-high (for button, a GPIO value of 1 means the button is pressed; for switches, a GPIO value of 1 means the switch is enabled). If this bit is 0, the signal is active low. Set to 0 for debug header GPIOs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhhj ubah}(h]h ]h"]h$]h&]jjuh1jchhhKhj ubeh}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(hController Offseth]hController Offset}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjB ubah}(h]h ]h"]h$]h&]uh1j%hj? ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjY ubah}(h]h ]h"]h$]h&]uh1j%hj? ubj&)}(hhh]h)}(h(GPIO number on the specified controller.h]h(GPIO number on the specified controller.}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjp ubah}(h]h ]h"]h$]h&]uh1j%hj? ubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(hController Nameh]hController Name}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hASCIIZh]hASCIIZ}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hXName of the controller for the GPIO. Currently supported names: "NM10" - Intel NM10 chiph]h\Name of the controller for the GPIO. Currently supported names: “NM10” - Intel NM10 chip}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1jahje ubeh}(h]h ]h"]h$]h&]colsKuh1jhjb ubah}(h]h ]h"]h$]h&]uh1hhj4 hhhNhNubeh}(h]id10ah ]h"]h$] result code:ah&]uh1hhj hhhhhKjKubeh}(h]gpio-chrome-os-gpio-assignmentsah ]h"]!gpio (chrome os gpio assignments)ah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h VBNV (Chrome OS NVRAM locations)h]h VBNV (Chrome OS NVRAM locations)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hkThis control method returns information about the NVRAM (CMOS) locations used to communicate with the BIOS.h]hkThis control method returns information about the NVRAM (CMOS) locations used to communicate with the BIOS.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hNoneh]hNone}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h]id11ah ]h"]h$] arguments:ah&]uh1hhj hhhhhMjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjD hhhhhM ubj)}(h]Package { NV Storage Block Offset //DWORD NV Storage Block Size //DWORD }h]h]Package { NV Storage Block Offset //DWORD NV Storage Block Size //DWORD }}hjU sbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhhhM hjD hhubh)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjg ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjg ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjg ubj)}(hhh]j!)}(hhh](j&)}(hhh]h)}(hFieldh]hField}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hFormath]hFormat}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(h Descriptionh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhjg ubjb)}(hhh](j!)}(hhh](j&)}(hhh]h)}(hNV Storage Block Offseth]hNV Storage Block Offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j%hj ubj&)}(hhh]h)}(hOffset in CMOS bank 0 of the verified boot non-volatile storage block, counting from the first writable CMOS byte (that is, offset=0 is the byte following the 14 bytes of clock data).h]hOffset in CMOS bank 0 of the verified boot non-volatile storage block, counting from the first writable CMOS byte (that is, offset=0 is the byte following the 14 bytes of clock data).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1j%hj ubeh}(h]h ]h"]h$]h&]uh1j hj ubj!)}(hhh](j&)}(hhh]h)}(hNV Storage Block Sizeh]hNV Storage Block Size}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj3ubah}(h]h ]h"]h$]h&]uh1j%hj0ubj&)}(hhh]h)}(hDWORDh]hDWORD}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM!hjJubah}(h]h ]h"]h$]h&]uh1j%hj0ubj&)}(hhh]h)}(h>Size in bytes of the verified boot non-volatile storage block.h]h>Size in bytes of the verified boot non-volatile storage block.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM"hjaubah}(h]h ]h"]h$]h&]uh1j%hj0ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1jahjg ubeh}(h]h ]h"]h$]h&]colsKuh1jhjd ubah}(h]h ]h"]h$]h&]uh1hhjD hhhNhNubeh}(h]id12ah ]h"]h$] result code:ah&]uh1hhj hhhhhM jKubeh}(h]vbnv-chrome-os-nvram-locationsah ]h"] vbnv (chrome os nvram locations)ah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h!FMAP (Chrome OS flashmap address)h]h!FMAP (Chrome OS flashmap address)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM%ubh)}(hmThis control method returns the physical memory address of the start of the main processor firmware flashmap.h]hmThis control method returns the physical memory address of the start of the main processor firmware flashmap.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM&hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM*ubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM+hjhhubeh}(h]id13ah ]h"]h$] arguments:ah&]uh1hhjhhhhhM*jKubh)}(hhh](h)}(hNoneResult code:h]hNoneResult code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM.ubh)}(hdA DWORD containing the physical memory address of the start of the main processor firmware flashmap.h]hdA DWORD containing the physical memory address of the start of the main processor firmware flashmap.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM/hjhhubeh}(h]noneresult-codeah ]h"]noneresult code:ah$]h&]uh1hhjhhhhhM.ubeh}(h]fmap-chrome-os-flashmap-addressah ]h"]!fmap (chrome os flashmap address)ah$]h&]uh1hhhhhhhhM%ubh)}(hhh](h)}(h#VDTA (Chrome OS verified boot data)h]h#VDTA (Chrome OS verified boot data)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM3ubh)}(hThis control method returns the verified boot data block shared between the firmware verification step and the kernel verification step.h]hThis control method returns the verified boot data block shared between the firmware verification step and the kernel verification step.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hhhhhM8ubh)}(hNoneh]hNone}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM9hj5hhubeh}(h]id14ah ]h"]h$] arguments:ah&]uh1hhjhhhhhM8jKubh)}(hhh](h)}(h Result code:h]h Result code:}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hhhhhM<ubh)}(h1A buffer containing the verified boot data block.h]h1A buffer containing the verified boot data block.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM=hj\hhubeh}(h]id15ah ]h"]h$] result code:ah&]uh1hhjhhhhhM<jKubeh}(h]!vdta-chrome-os-verified-boot-dataah ]h"]#vdta (chrome os verified boot data)ah$]h&]uh1hhhhhhhhM3ubh)}(hhh](h)}(h!MECK (Management Engine Checksum)h]h!MECK (Management Engine Checksum)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM@ubh)}(hXTThis control method returns the SHA-1 or SHA-256 hash that is read out of the Management Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that the ME firmware has not changed. If Management Engine is not present, or if the firmware was unable to read the extended registers, this buffer can be zero.h]hXTThis control method returns the SHA-1 or SHA-256 hash that is read out of the Management Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that the ME firmware has not changed. If Management Engine is not present, or if the firmware was unable to read the extended registers, this buffer can be zero.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMGubh)}(hNoneh]hNone}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjhhubeh}(h]id16ah ]h"]h$] arguments:ah&]uh1hhjhhhhhMGjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMKubh)}(h A buffer containing the ME hash.h]h A buffer containing the ME hash.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMLhjhhubeh}(h]id17ah ]h"]h$] result code:ah&]uh1hhjhhhhhMKjKubeh}(h]meck-management-engine-checksumah ]h"]!meck (management engine checksum)ah$]h&]uh1hhhhhhhhM@ubh)}(hhh](h)}(hMLST (Chrome OS method list)h]hMLST (Chrome OS method list)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMOubh)}(hkThis control method returns a list of the other control methods supported by the Chrome OS hardware device.h]hkThis control method returns a list of the other control methods supported by the Chrome OS hardware device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhjhhubh)}(hhh](h)}(h Arguments:h]h Arguments:}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMTubh)}(hNoneh]hNone}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMUhjhhubeh}(h]id18ah ]h"]h$] arguments:ah&]uh1hhjhhhhhMTjKubh)}(hhh](h)}(h Result code:h]h Result code:}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhhhhhMXubh)}(hA package containing a list of null-terminated ASCII strings, one for each control method supported by the Chrome OS hardware device, not including the MLST method itself. For this version of the specification, the result is:h]hA package containing a list of null-terminated ASCII strings, one for each control method supported by the Chrome OS hardware device, not including the MLST method itself. For this version of the specification, the result is:}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMYhjFhhubj)}(hPackage { "CHSW", "FWID", "HWID", "FRID", "BINF", "GPIO", "VBNV", "FMAP", "VDTA", "MECK" }h]hPackage { "CHSW", "FWID", "HWID", "FRID", "BINF", "GPIO", "VBNV", "FMAP", "VDTA", "MECK" }}hjesbah}(h]h ]h"]h$]h&]hhjjjj}uh1jhhhM]hjFhhubeh}(h]id19ah ]h"]h$] result code:ah&]uh1hhjhhhhhMXjKubeh}(h]mlst-chrome-os-method-listah ]h"]mlst (chrome os method list)ah$]h&]uh1hhhhhhhhMOubeh}(h]chrome-os-acpi-deviceah ]h"]chrome os acpi deviceah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksj%footnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehnj _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(jjj-j* arguments:N result code:Njjj#j jjj j j j jjjjj jjjjjjj~u nametypes}(jj-jjjj#jj j jjj jjjuh}(jhj*jjjj"jjj0jpjOjjuj jjjjjjj&jfjEjjlj jjjj jj j j. j j j4 jj j> j jjD jjjjjjjjjVj5j}j\jjjjjjj~jj@jjvjFjhu footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}jKsRparse_messages](hsystem_message)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jpalevelKtypeINFOsourcehnjlineKTuh1jhjOhhhhhKTubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0ubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineKXuh1jhjuhhhhhKXubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineKduh1jhjhhhhhKdubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineKhuh1jhjhhhhhKhubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jfalevelKtypej-sourcehnjlineKruh1jhjEhhhhhKrubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineKvuh1jhjlhhhhhKvubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineKuh1jhjhhhhhKubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j alevelKtypej-sourcehnjlineKuh1jhjhhhhhKubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j. alevelKtypej-sourcehnjlineKuh1jhj hhhhhKubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j alevelKtypej-sourcehnjlineKuh1jhj4 hhhhhKubj)}(hhh]h)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#ubah}(h]h ]h"]h$]h&]levelKtypej-lineKsourcehuh1jhj ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>ubah}(h]h ]h"]h$]h&]j> alevelKtypej-sourcehnjlineMuh1jhj hhhhhMubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineM uh1jhjD hhhhhM ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjtubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineM*uh1jhjhhhhhM*ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jValevelKtypej-sourcehnjlineM8uh1jhj5hhhhhM8ubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j}alevelKtypej-sourcehnjlineM<uh1jhj\hhhhhM<ubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineMGuh1jhjhhhhhMGubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypej-sourcehnjlineMKuh1jhjhhhhhMKubj)}(hhh]h)}(h-Duplicate implicit target name: "arguments:".h]h1Duplicate implicit target name: “arguments:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]j@alevelKtypej-sourcehnjlineMTuh1jhjhhhhhMTubj)}(hhh]h)}(h/Duplicate implicit target name: "result code:".h]h3Duplicate implicit target name: “result code:”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jvalevelKtypej-sourcehnjlineMXuh1jhjFhhhhhMXubetransform_messages] transformerN include_log] decorationNhhub.