sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget1/translations/zh_CN/firmware-guide/acpi/apei/einjmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget1/translations/zh_TW/firmware-guide/acpi/apei/einjmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget1/translations/it_IT/firmware-guide/acpi/apei/einjmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget1/translations/ja_JP/firmware-guide/acpi/apei/einjmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget1/translations/ko_KR/firmware-guide/acpi/apei/einjmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget1/translations/sp_SP/firmware-guide/acpi/apei/einjmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhK/var/lib/git/docbuild/linux/Documentation/firmware-guide/acpi/apei/einj.rsthKubhsection)}(hhh](htitle)}(hAPEI Error INJectionh]hAPEI Error INJection}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hEINJ provides a hardware error injection mechanism. It is very useful for debugging and testing APEI and RAS features in general.h]hEINJ provides a hardware error injection mechanism. It is very useful for debugging and testing APEI and RAS features in general.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(huYou need to check whether your BIOS supports EINJ first. For that, look for early boot messages similar to this one::h]htYou need to check whether your BIOS supports EINJ first. For that, look for early boot messages similar to this one:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh literal_block)}(hQACPI: EINJ 0x000000007370A000 000150 (v01 INTEL 00000001 INTL 00000001)h]hQACPI: EINJ 0x000000007370A000 000150 (v01 INTEL 00000001 INTL 00000001)}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhK hhhhubh)}(hnwhich shows that the BIOS is exposing an EINJ table - it is the mechanism through which the injection is done.h]hnwhich shows that the BIOS is exposing an EINJ table - it is the mechanism through which the injection is done.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h{Alternatively, look in /sys/firmware/acpi/tables for an "EINJ" file, which is a different representation of the same thing.h]hAlternatively, look in /sys/firmware/acpi/tables for an “EINJ” file, which is a different representation of the same thing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXqIt doesn't necessarily mean that EINJ is not supported if those above don't exist: before you give up, go into BIOS setup to see if the BIOS has an option to enable error injection. Look for something called WHEA or similar. Often, you need to enable an ACPI5 support option prior, in order to see the APEI,EINJ,... functionality supported and exposed by the BIOS menu.h]hXuIt doesn’t necessarily mean that EINJ is not supported if those above don’t exist: before you give up, go into BIOS setup to see if the BIOS has an option to enable error injection. Look for something called WHEA or similar. Often, you need to enable an ACPI5 support option prior, in order to see the APEI,EINJ,... functionality supported and exposed by the BIOS menu.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hWTo use EINJ, make sure the following are options enabled in your kernel configuration::h]hVTo use EINJ, make sure the following are options enabled in your kernel configuration:}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h6CONFIG_DEBUG_FS CONFIG_ACPI_APEI CONFIG_ACPI_APEI_EINJh]h6CONFIG_DEBUG_FS CONFIG_ACPI_APEI CONFIG_ACPI_APEI_EINJ}hj/sbah}(h]h ]h"]h$]h&]hhuh1hhhhKhhhhubh)}(h@...and to (optionally) enable CXL protocol error injection set::h]h?...and to (optionally) enable CXL protocol error injection set:}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK#hhhhubh)}(hCONFIG_ACPI_APEI_EINJ_CXLh]hCONFIG_ACPI_APEI_EINJ_CXL}hjKsbah}(h]h ]h"]h$]h&]hhuh1hhhhK%hhhhubh)}(h>The EINJ user interface is in /apei/einj.h]h>The EINJ user interface is in /apei/einj.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hhhhubh)}(h!The following files belong to it:h]h!The following files belong to it:}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hhhhubh bullet_list)}(hhh](h list_item)}(hXavailable_error_type This file shows which error types are supported: ================ =================================== Error Type Value Error Description ================ =================================== 0x00000001 Processor Correctable 0x00000002 Processor Uncorrectable non-fatal 0x00000004 Processor Uncorrectable fatal 0x00000008 Memory Correctable 0x00000010 Memory Uncorrectable non-fatal 0x00000020 Memory Uncorrectable fatal 0x00000040 PCI Express Correctable 0x00000080 PCI Express Uncorrectable non-fatal 0x00000100 PCI Express Uncorrectable fatal 0x00000200 Platform Correctable 0x00000400 Platform Uncorrectable non-fatal 0x00000800 Platform Uncorrectable fatal ================ =================================== The format of the file contents are as above, except present are only the available error types. h](h)}(havailable_error_typeh]havailable_error_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hj|ubh)}(h0This file shows which error types are supported:h]h0This file shows which error types are supported:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hj|ubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK#uh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hError Type Valueh]hError Type Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hError Descriptionh]hError Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j)}(hhh](j)}(hhh]h)}(h 0x00000001h]h 0x00000001}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hProcessor Correctableh]hProcessor Correctable}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000002h]h 0x00000002}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hjAubah}(h]h ]h"]h$]h&]uh1jhj>ubj)}(hhh]h)}(h!Processor Uncorrectable non-fatalh]h!Processor Uncorrectable non-fatal}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hjXubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000004h]h 0x00000004}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjxubah}(h]h ]h"]h$]h&]uh1jhjuubj)}(hhh]h)}(hProcessor Uncorrectable fatalh]hProcessor Uncorrectable fatal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000008h]h 0x00000008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK5hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hMemory Correctableh]hMemory Correctable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK5hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000010h]h 0x00000010}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hMemory Uncorrectable non-fatalh]hMemory Uncorrectable non-fatal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000020h]h 0x00000020}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hMemory Uncorrectable fatalh]hMemory Uncorrectable fatal}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hj4ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000040h]h 0x00000040}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK8hjTubah}(h]h ]h"]h$]h&]uh1jhjQubj)}(hhh]h)}(hPCI Express Correctableh]hPCI Express Correctable}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK8hjkubah}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000080h]h 0x00000080}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK9hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h#PCI Express Uncorrectable non-fatalh]h#PCI Express Uncorrectable non-fatal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK9hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000100h]h 0x00000100}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hPCI Express Uncorrectable fatalh]hPCI Express Uncorrectable fatal}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000200h]h 0x00000200}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK;hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hPlatform Correctableh]hPlatform Correctable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK;hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 0x00000400h]h 0x00000400}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUsed when the 0x1 bit is set in "flags" to specify the APIC idh]hBUsed when the 0x1 bit is set in “flags” to specify the APIC id}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhj8ubeh}(h]h ]h"]h$]h&]uh1jzhjwhhhhhNubj{)}(hMparam4 Used when the 0x4 bit is set in "flags" to specify target PCIe device h]h)}(hLparam4 Used when the 0x4 bit is set in "flags" to specify target PCIe deviceh]hPparam4 Used when the 0x4 bit is set in “flags” to specify target PCIe device}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKphj^ubah}(h]h ]h"]h$]h&]uh1jzhjwhhhhhNubj{)}(hXnotrigger The error injection mechanism is a two-step process. First inject the error, then perform some actions to trigger it. Setting "notrigger" to 1 skips the trigger phase, which *may* allow the user to cause the error in some other context by a simple access to the CPU, memory location, or device that is the target of the error injection. Whether this actually works depends on what operations the BIOS actually includes in the trigger phase. h](h)}(h notriggerh]h notrigger}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjvubh)}(hXThe error injection mechanism is a two-step process. First inject the error, then perform some actions to trigger it. Setting "notrigger" to 1 skips the trigger phase, which *may* allow the user to cause the error in some other context by a simple access to the CPU, memory location, or device that is the target of the error injection. Whether this actually works depends on what operations the BIOS actually includes in the trigger phase.h](hThe error injection mechanism is a two-step process. First inject the error, then perform some actions to trigger it. Setting “notrigger” to 1 skips the trigger phase, which }(hjhhhNhNubhemphasis)}(h*may*h]hmay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhX allow the user to cause the error in some other context by a simple access to the CPU, memory location, or device that is the target of the error injection. Whether this actually works depends on what operations the BIOS actually includes in the trigger phase.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKuhjvubeh}(h]h ]h"]h$]h&]uh1jzhjwhhhhhNubeh}(h]h ]h"]h$]h&]bullet-uh1juhhhK+hhhhubh)}(hCXL error types are supported from ACPI 6.5 onwards (given a CXL port is present). The EINJ user interface for CXL error types is at /cxl. The following files belong to it:h]hCXL error types are supported from ACPI 6.5 onwards (given a CXL port is present). The EINJ user interface for CXL error types is at /cxl. The following files belong to it:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK}hhhhubjv)}(hhh](j{)}(heeinj_types: Provides the same functionality as available_error_types above, but for CXL error types h](h)}(h einj_types:h]h einj_types:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hWProvides the same functionality as available_error_types above, but for CXL error typesh]hWProvides the same functionality as available_error_types above, but for CXL error types}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jzhjhhhhhNubj{)}(hXP$dport_dev/einj_inject: Injects a CXL error type into the CXL port represented by $dport_dev, where $dport_dev is the name of the CXL port (usually a PCIe device name). Error injections targeting a CXL 2.0+ port can use the legacy interface under /apei/einj, while CXL 1.1/1.0 port injections must use this file. h](h)}(h$dport_dev/einj_inject:h]h$dport_dev/einj_inject:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hX5Injects a CXL error type into the CXL port represented by $dport_dev, where $dport_dev is the name of the CXL port (usually a PCIe device name). Error injections targeting a CXL 2.0+ port can use the legacy interface under /apei/einj, while CXL 1.1/1.0 port injections must use this file.h]hX5Injects a CXL error type into the CXL port represented by $dport_dev, where $dport_dev is the name of the CXL port (usually a PCIe device name). Error injections targeting a CXL 2.0+ port can use the legacy interface under /apei/einj, while CXL 1.1/1.0 port injections must use this file.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jzhjhhhhhNubeh}(h]h ]h"]h$]h&]jjuh1juhhhKhhhhubh)}(hXoBIOS versions based on the ACPI 4.0 specification have limited options in controlling where the errors are injected. Your BIOS may support an extension (enabled with the param_extension=1 module parameter, or boot command line einj.param_extension=1). This allows the address and mask for memory injections to be specified by the param1 and param2 files in apei/einj.h]hXoBIOS versions based on the ACPI 4.0 specification have limited options in controlling where the errors are injected. Your BIOS may support an extension (enabled with the param_extension=1 module parameter, or boot command line einj.param_extension=1). This allows the address and mask for memory injections to be specified by the param1 and param2 files in apei/einj.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXXBIOS versions based on the ACPI 5.0 specification have more control over the target of the injection. For processor-related errors (type 0x1, 0x2 and 0x4), you can set flags to 0x3 (param3 for bit 0, and param1 and param2 for bit 1) so that you have more information added to the error signature being injected. The actual data passed is this::h]hXWBIOS versions based on the ACPI 5.0 specification have more control over the target of the injection. For processor-related errors (type 0x1, 0x2 and 0x4), you can set flags to 0x3 (param3 for bit 0, and param1 and param2 for bit 1) so that you have more information added to the error signature being injected. The actual data passed is this:}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h\memory_address = param1; memory_address_range = param2; apicid = param3; pcie_sbdf = param4;h]h\memory_address = param1; memory_address_range = param2; apicid = param3; pcie_sbdf = param4;}hj7sbah}(h]h ]h"]h$]h&]hhuh1hhhhKhhhhubh)}(hFor memory errors (type 0x8, 0x10 and 0x20) the address is set using param1 with a mask in param2 (0x0 is equivalent to all ones). For PCI express errors (type 0x40, 0x80 and 0x100) the segment, bus, device and function are specified using param1::h]hFor memory errors (type 0x8, 0x10 and 0x20) the address is set using param1 with a mask in param2 (0x0 is equivalent to all ones). For PCI express errors (type 0x40, 0x80 and 0x100) the segment, bus, device and function are specified using param1:}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h 31 24 23 16 15 11 10 8 7 0 +-------------------------------------------------+ | segment | bus | device | function | reserved | +-------------------------------------------------+h]h 31 24 23 16 15 11 10 8 7 0 +-------------------------------------------------+ | segment | bus | device | function | reserved | +-------------------------------------------------+}hjSsbah}(h]h ]h"]h$]h&]hhuh1hhhhKhhhhubh)}(hdAnyway, you get the idea, if there's doubt just take a look at the code in drivers/acpi/apei/einj.c.h]hfAnyway, you get the idea, if there’s doubt just take a look at the code in drivers/acpi/apei/einj.c.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXsAn ACPI 5.0 BIOS may also allow vendor-specific errors to be injected. In this case a file named vendor will contain identifying information from the BIOS that hopefully will allow an application wishing to use the vendor-specific extension to tell that they are running on a BIOS that supports it. All vendor extensions have the 0x80000000 bit set in error_type. A file vendor_flags controls the interpretation of param1 and param2 (1 = PROCESSOR, 2 = MEMORY, 4 = PCI). See your BIOS vendor documentation for details (and expect changes to this API if vendors creativity in using this feature expands beyond our expectations).h]hXsAn ACPI 5.0 BIOS may also allow vendor-specific errors to be injected. In this case a file named vendor will contain identifying information from the BIOS that hopefully will allow an application wishing to use the vendor-specific extension to tell that they are running on a BIOS that supports it. All vendor extensions have the 0x80000000 bit set in error_type. A file vendor_flags controls the interpretation of param1 and param2 (1 = PROCESSOR, 2 = MEMORY, 4 = PCI). See your BIOS vendor documentation for details (and expect changes to this API if vendors creativity in using this feature expands beyond our expectations).}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hAn error injection example::h]hAn error injection example:}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hX# cd /sys/kernel/debug/apei/einj # cat available_error_type # See which errors can be injected 0x00000002 Processor Uncorrectable non-fatal 0x00000008 Memory Correctable 0x00000010 Memory Uncorrectable non-fatal # echo 0x12345000 > param1 # Set memory address for injection # echo 0xfffffffffffff000 > param2 # Mask - anywhere in this page # echo 0x8 > error_type # Choose correctable memory error # echo 1 > error_inject # Inject nowh]hX# cd /sys/kernel/debug/apei/einj # cat available_error_type # See which errors can be injected 0x00000002 Processor Uncorrectable non-fatal 0x00000008 Memory Correctable 0x00000010 Memory Uncorrectable non-fatal # echo 0x12345000 > param1 # Set memory address for injection # echo 0xfffffffffffff000 > param2 # Mask - anywhere in this page # echo 0x8 > error_type # Choose correctable memory error # echo 1 > error_inject # Inject now}hjsbah}(h]h ]h"]h$]h&]hhuh1hhhhKhhhhubh)}(h-You should see something like this in dmesg::h]h,You should see something like this in dmesg:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hX,[22715.830801] EDAC sbridge MC3: HANDLING MCE MEMORY ERROR [22715.834759] EDAC sbridge MC3: CPU 0: Machine Check Event: 0 Bank 7: 8c00004000010090 [22715.834759] EDAC sbridge MC3: TSC 0 [22715.834759] EDAC sbridge MC3: ADDR 12345000 EDAC sbridge MC3: MISC 144780c86 [22715.834759] EDAC sbridge MC3: PROCESSOR 0:306e7 TIME 1422553404 SOCKET 0 APIC 0 [22716.616173] EDAC MC3: 1 CE memory read error on CPU_SrcID#0_Channel#0_DIMM#0 (channel:0 slot:0 page:0x12345 offset:0x0 grain:32 syndrome:0x0 - area:DRAM err_code:0001:0090 socket:0 channel_mask:1 rank:0)h]hX,[22715.830801] EDAC sbridge MC3: HANDLING MCE MEMORY ERROR [22715.834759] EDAC sbridge MC3: CPU 0: Machine Check Event: 0 Bank 7: 8c00004000010090 [22715.834759] EDAC sbridge MC3: TSC 0 [22715.834759] EDAC sbridge MC3: ADDR 12345000 EDAC sbridge MC3: MISC 144780c86 [22715.834759] EDAC sbridge MC3: PROCESSOR 0:306e7 TIME 1422553404 SOCKET 0 APIC 0 [22716.616173] EDAC MC3: 1 CE memory read error on CPU_SrcID#0_Channel#0_DIMM#0 (channel:0 slot:0 page:0x12345 offset:0x0 grain:32 syndrome:0x0 - area:DRAM err_code:0001:0090 socket:0 channel_mask:1 rank:0)}hjsbah}(h]h ]h"]h$]h&]hhuh1hhhhKhhhhubh)}(h einj_inject # Inject errorh]hX# cd /sys/kernel/debug/cxl/ # ls 0000:e0:01.1 0000:0c:00.0 # cat einj_types # See which errors can be injected 0x00008000 CXL.mem Protocol Correctable 0x00010000 CXL.mem Protocol Uncorrectable non-fatal 0x00020000 CXL.mem Protocol Uncorrectable fatal # cd 0000:e0:01.1 # Navigate to dport to inject into # echo 0x8000 > einj_inject # Inject error}hjsbah}(h]h ]h"]h$]h&]hhuh1hhhhKhhhhubh)}(h.Special notes for injection into SGX enclaves:h]h.Special notes for injection into SGX enclaves:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hBThere may be a separate BIOS setup option to enable SGX injection.h]hBThere may be a separate BIOS setup option to enable SGX injection.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXThe injection process consists of setting some special memory controller trigger that will inject the error on the next write to the target address. But the h/w prevents any software outside of an SGX enclave from accessing enclave pages (even BIOS SMM mode).h]hXThe injection process consists of setting some special memory controller trigger that will inject the error on the next write to the target address. But the h/w prevents any software outside of an SGX enclave from accessing enclave pages (even BIOS SMM mode).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubj5)}(hhh]j:)}(hXThe following sequence can be used: 1) Determine physical address of enclave page 2) Use "notrigger=1" mode to inject (this will setup the injection address, but will not actually inject) 3) Enter the enclave 4) Store data to the virtual address matching physical address from step 1 5) Execute CLFLUSH for that virtual address 6) Spin delay for 250ms 7) Read from the virtual address. This will trigger the error h](j@)}(h#The following sequence can be used:h]h#The following sequence can be used:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j?hhhKhjubjP)}(hhh]henumerated_list)}(hhh](j{)}(h*Determine physical address of enclave pageh]h)}(hjh]h*Determine physical address of enclave page}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jzhjubj{)}(hfUse "notrigger=1" mode to inject (this will setup the injection address, but will not actually inject)h]h)}(hfUse "notrigger=1" mode to inject (this will setup the injection address, but will not actually inject)h]hjUse “notrigger=1” mode to inject (this will setup the injection address, but will not actually inject)}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj/ubah}(h]h ]h"]h$]h&]uh1jzhjubj{)}(hEnter the enclaveh]h)}(hjIh]hEnter the enclave}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjGubah}(h]h ]h"]h$]h&]uh1jzhjubj{)}(hGStore data to the virtual address matching physical address from step 1h]h)}(hj`h]hGStore data to the virtual address matching physical address from step 1}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj^ubah}(h]h ]h"]h$]h&]uh1jzhjubj{)}(h(Execute CLFLUSH for that virtual addressh]h)}(hjwh]h(Execute CLFLUSH for that virtual address}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjuubah}(h]h ]h"]h$]h&]uh1jzhjubj{)}(hSpin delay for 250msh]h)}(hjh]hSpin delay for 250ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jzhjubj{)}(h;Read from the virtual address. This will trigger the error h]h)}(h:Read from the virtual address. This will trigger the errorh]h:Read from the virtual address. This will trigger the error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jzhjubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix)uh1jhjubah}(h]h ]h"]h$]h&]uh1jOhjubeh}(h]h ]h"]h$]h&]uh1j9hhhKhjubah}(h]h ]h"]h$]h&]uh1j4hhhhhNhNubh)}(hyFor more information about EINJ, please refer to ACPI specification version 4.0, section 17.5 and ACPI 5.0, section 18.6.h]hyFor more information about EINJ, please refer to ACPI specification version 4.0, section 17.5 and ACPI 5.0, section 18.6.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubeh}(h]apei-error-injectionah ]h"]apei error injectionah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksjfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}jjs nametypes}jsh}jhs footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.