csphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget-/translations/zh_CN/filesystems/spufs/spu_runmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/zh_TW/filesystems/spufs/spu_runmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/it_IT/filesystems/spufs/spu_runmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ja_JP/filesystems/spufs/spu_runmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ko_KR/filesystems/spufs/spu_runmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/sp_SP/filesystems/spufs/spu_runmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhG/var/lib/git/docbuild/linux/Documentation/filesystems/spufs/spu_run.rsthKubhsection)}(hhh](htitle)}(hspu_runh]hspu_run}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hNameh]hName}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubh block_quote)}(h"spu_run - execute an spu context h]h paragraph)}(h spu_run - execute an spu contexth]h spu_run - execute an spu context}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubeh}(h]nameah ]h"]nameah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(hSynopsish]hSynopsis}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(ha:: #include int spu_run(int fd, unsigned int *npc, unsigned int *event); h]h literal_block)}(hR#include int spu_run(int fd, unsigned int *npc, unsigned int *event);h]hR#include int spu_run(int fd, unsigned int *npc, unsigned int *event);}hjsbah}(h]h ]h"]h$]h&]hhuh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubeh}(h]synopsisah ]h"]synopsisah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h Descriptionh]h Description}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hhhhhKubh)}(hX The spu_run system call is used on PowerPC machines that implement the Cell Broadband Engine Architecture in order to access Synergistic Pro- cessor Units (SPUs). It uses the fd that was returned from spu_cre- ate(2) to address a specific SPU context. When the context gets sched- uled to a physical SPU, it starts execution at the instruction pointer passed in npc. Execution of SPU code happens synchronously, meaning that spu_run does not return while the SPU is still running. If there is a need to exe- cute SPU code in parallel with other code on either the main CPU or other SPUs, you need to create a new thread of execution first, e.g. using the pthread_create(3) call. When spu_run returns, the current value of the SPU instruction pointer is written back to npc, so you can call spu_run again without updating the pointers. event can be a NULL pointer or point to an extended status code that gets filled when spu_run returns. It can be one of the following con- stants: SPE_EVENT_DMA_ALIGNMENT A DMA alignment error SPE_EVENT_SPE_DATA_SEGMENT A DMA segmentation error SPE_EVENT_SPE_DATA_STORAGE A DMA storage error If NULL is passed as the event argument, these errors will result in a signal delivered to the calling process. h](h)}(hXvThe spu_run system call is used on PowerPC machines that implement the Cell Broadband Engine Architecture in order to access Synergistic Pro- cessor Units (SPUs). It uses the fd that was returned from spu_cre- ate(2) to address a specific SPU context. When the context gets sched- uled to a physical SPU, it starts execution at the instruction pointer passed in npc.h]hXvThe spu_run system call is used on PowerPC machines that implement the Cell Broadband Engine Architecture in order to access Synergistic Pro- cessor Units (SPUs). It uses the fd that was returned from spu_cre- ate(2) to address a specific SPU context. When the context gets sched- uled to a physical SPU, it starts execution at the instruction pointer passed in npc.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjBubh)}(hXAExecution of SPU code happens synchronously, meaning that spu_run does not return while the SPU is still running. If there is a need to exe- cute SPU code in parallel with other code on either the main CPU or other SPUs, you need to create a new thread of execution first, e.g. using the pthread_create(3) call.h]hXAExecution of SPU code happens synchronously, meaning that spu_run does not return while the SPU is still running. If there is a need to exe- cute SPU code in parallel with other code on either the main CPU or other SPUs, you need to create a new thread of execution first, e.g. using the pthread_create(3) call.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjBubh)}(hWhen spu_run returns, the current value of the SPU instruction pointer is written back to npc, so you can call spu_run again without updating the pointers.h]hWhen spu_run returns, the current value of the SPU instruction pointer is written back to npc, so you can call spu_run again without updating the pointers.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hjBubh)}(hevent can be a NULL pointer or point to an extended status code that gets filled when spu_run returns. It can be one of the following con- stants:h]hevent can be a NULL pointer or point to an extended status code that gets filled when spu_run returns. It can be one of the following con- stants:}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjBubhdefinition_list)}(hhh](hdefinition_list_item)}(h.SPE_EVENT_DMA_ALIGNMENT A DMA alignment error h](hterm)}(hSPE_EVENT_DMA_ALIGNMENTh]hSPE_EVENT_DMA_ALIGNMENT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK.hjubh definition)}(hhh]h)}(hA DMA alignment errorh]hA DMA alignment error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK.hjubj)}(h4SPE_EVENT_SPE_DATA_SEGMENT A DMA segmentation error h](j)}(hSPE_EVENT_SPE_DATA_SEGMENTh]hSPE_EVENT_SPE_DATA_SEGMENT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK1hjubj)}(hhh]h)}(hA DMA segmentation errorh]hA DMA segmentation error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK1hjubj)}(h/SPE_EVENT_SPE_DATA_STORAGE A DMA storage error h](j)}(hSPE_EVENT_SPE_DATA_STORAGEh]hSPE_EVENT_SPE_DATA_STORAGE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK4hjubj)}(hhh]h)}(hA DMA storage errorh]hA DMA storage error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK4hjubeh}(h]h ]h"]h$]h&]uh1j~hjBubh)}(hpIf NULL is passed as the event argument, these errors will result in a signal delivered to the calling process.h]hpIf NULL is passed as the event argument, these errors will result in a signal delivered to the calling process.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hjBubeh}(h]h ]h"]h$]h&]uh1hhhhKhj1hhubeh}(h] descriptionah ]h"] descriptionah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h Return Valueh]h Return Value}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hhhhhK:ubh)}(hXJspu_run returns the value of the spu_status register or -1 to indicate an error and set errno to one of the error codes listed below. The spu_status register value contains a bit mask of status codes and optionally a 14 bit code returned from the stop-and-signal instruction on the SPU. The bit masks for the status codes are: 0x02 SPU was stopped by stop-and-signal. 0x04 SPU was stopped by halt. 0x08 SPU is waiting for a channel. 0x10 SPU is in single-step mode. 0x20 SPU has tried to execute an invalid instruction. 0x40 SPU has tried to access an invalid channel. 0x3fff0000 The bits masked with this value contain the code returned from stop-and-signal. There are always one or more of the lower eight bits set or an error code is returned from spu_run. h](h)}(hXSspu_run returns the value of the spu_status register or -1 to indicate an error and set errno to one of the error codes listed below. The spu_status register value contains a bit mask of status codes and optionally a 14 bit code returned from the stop-and-signal instruction on the SPU. The bit masks for the status codes are:h]hXSspu_run returns the value of the spu_status register or -1 to indicate an error and set errno to one of the error codes listed below. The spu_status register value contains a bit mask of status codes and optionally a 14 bit code returned from the stop-and-signal instruction on the SPU. The bit masks for the status codes are:}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK;hjIubj)}(hhh](j)}(h)0x02 SPU was stopped by stop-and-signal. h](j)}(h0x02h]h0x02}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKBhj^ubj)}(hhh]h)}(h#SPU was stopped by stop-and-signal.h]h#SPU was stopped by stop-and-signal.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjpubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jhhhKBhj[ubj)}(h0x04 SPU was stopped by halt. h](j)}(h0x04h]h0x04}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKEhjubj)}(hhh]h)}(hSPU was stopped by halt.h]hSPU was stopped by halt.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKEhj[ubj)}(h#0x08 SPU is waiting for a channel. h](j)}(h0x08h]h0x08}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKHhjubj)}(hhh]h)}(hSPU is waiting for a channel.h]hSPU is waiting for a channel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKHhj[ubj)}(h!0x10 SPU is in single-step mode. h](j)}(h0x10h]h0x10}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKKhjubj)}(hhh]h)}(hSPU is in single-step mode.h]hSPU is in single-step mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKKhj[ubj)}(h60x20 SPU has tried to execute an invalid instruction. h](j)}(h0x20h]h0x20}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKNhjubj)}(hhh]h)}(h0SPU has tried to execute an invalid instruction.h]h0SPU has tried to execute an invalid instruction.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKNhj[ubj)}(h10x40 SPU has tried to access an invalid channel. h](j)}(h0x40h]h0x40}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKQhjIubj)}(hhh]h)}(h+SPU has tried to access an invalid channel.h]h+SPU has tried to access an invalid channel.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhj[ubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jhhhKQhj[ubj)}(h]0x3fff0000 The bits masked with this value contain the code returned from stop-and-signal. h](j)}(h 0x3fff0000h]h 0x3fff0000}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKUhjxubj)}(hhh]h)}(hQThe bits masked with this value contain the code returned from stop-and-signal.h]hQThe bits masked with this value contain the code returned from stop-and-signal.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKThjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jhhhKUhj[ubeh}(h]h ]h"]h$]h&]uh1j~hjIubh)}(hfThere are always one or more of the lower eight bits set or an error code is returned from spu_run.h]hfThere are always one or more of the lower eight bits set or an error code is returned from spu_run.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKWhjIubeh}(h]h ]h"]h$]h&]uh1hhhhK;hj8hhubeh}(h] return-valueah ]h"] return valueah$]h&]uh1hhhhhhhhK:ubh)}(hhh](h)}(hErrorsh]hErrors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK[ubh)}(hXEAGAIN or EWOULDBLOCK fd is in non-blocking mode and spu_run would block. EBADF fd is not a valid file descriptor. EFAULT npc is not a valid pointer or status is neither NULL nor a valid pointer. EINTR A signal occurred while spu_run was in progress. The npc value has been updated to the new program counter value if necessary. EINVAL fd is not a file descriptor returned from spu_create(2). ENOMEM Insufficient memory was available to handle a page fault result- ing from an MFC direct memory access. ENOSYS the functionality is not provided by the current system, because either the hardware does not provide SPUs or the spufs module is not loaded. h](j)}(hhh]j)}(hJEAGAIN or EWOULDBLOCK fd is in non-blocking mode and spu_run would block. h](j)}(hEAGAIN or EWOULDBLOCKh]hEAGAIN or EWOULDBLOCK}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK]hjubj)}(hhh]h)}(h3fd is in non-blocking mode and spu_run would block.h]h3fd is in non-blocking mode and spu_run would block.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK]hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK]hjubah}(h]h ]h"]h$]h&]uh1j~hjubh)}(h)EBADF fd is not a valid file descriptor.h]h)EBADF fd is not a valid file descriptor.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK_hjubj)}(hhh](j)}(hQEFAULT npc is not a valid pointer or status is neither NULL nor a valid pointer. h](j)}(hGEFAULT npc is not a valid pointer or status is neither NULL nor a validh]hGEFAULT npc is not a valid pointer or status is neither NULL nor a valid}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKbhj'ubj)}(hhh]h)}(hpointer.h]hpointer.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhj9ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhhhKbhj$ubj)}(hEINTR A signal occurred while spu_run was in progress. The npc value has been updated to the new program counter value if necessary. h](j)}(hGEINTR A signal occurred while spu_run was in progress. The npc valueh]hGEINTR A signal occurred while spu_run was in progress. The npc value}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKehjVubj)}(hhh]h)}(h@has been updated to the new program counter value if necessary.h]h@has been updated to the new program counter value if necessary.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjhubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jhhhKehj$ubeh}(h]h ]h"]h$]h&]uh1j~hjubh)}(h?EINVAL fd is not a file descriptor returned from spu_create(2).h]h?EINVAL fd is not a file descriptor returned from spu_create(2).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghjubj)}(hhh](j)}(hnENOMEM Insufficient memory was available to handle a page fault result- ing from an MFC direct memory access. h](j)}(hGENOMEM Insufficient memory was available to handle a page fault result-h]hGENOMEM Insufficient memory was available to handle a page fault result-}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKjhjubj)}(hhh]h)}(h%ing from an MFC direct memory access.h]h%ing from an MFC direct memory access.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKjhjubj)}(hENOSYS the functionality is not provided by the current system, because either the hardware does not provide SPUs or the spufs module is not loaded. h](j)}(hGENOSYS the functionality is not provided by the current system, becauseh]hGENOSYS the functionality is not provided by the current system, because}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKohjubj)}(hhh]h)}(hLeither the hardware does not provide SPUs or the spufs module is not loaded.h]hLeither the hardware does not provide SPUs or the spufs module is not loaded.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKohjubeh}(h]h ]h"]h$]h&]uh1j~hjubeh}(h]h ]h"]h$]h&]uh1hhhhK\hjhhubeh}(h]errorsah ]h"]errorsah$]h&]uh1hhhhhhhhK[ubh)}(hhh](h)}(hNotesh]hNotes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKrubh)}(hspu_run is meant to be used from libraries that implement a more abstract interface to SPUs, not to be used from regular applications. See http://www.bsc.es/projects/deepcomputing/linuxoncell/ for the rec- ommended libraries. h]h)}(hspu_run is meant to be used from libraries that implement a more abstract interface to SPUs, not to be used from regular applications. See http://www.bsc.es/projects/deepcomputing/linuxoncell/ for the rec- ommended libraries.h](hspu_run is meant to be used from libraries that implement a more abstract interface to SPUs, not to be used from regular applications. See }(hj#hhhNhNubh reference)}(h5http://www.bsc.es/projects/deepcomputing/linuxoncell/h]h5http://www.bsc.es/projects/deepcomputing/linuxoncell/}(hj-hhhNhNubah}(h]h ]h"]h$]h&]refurij/uh1j+hj#ubh! for the rec- ommended libraries.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKshjubah}(h]h ]h"]h$]h&]uh1hhhhKshjhhubeh}(h]notesah ]h"]notesah$]h&]uh1hhhhhhhhKrubh)}(hhh](h)}(h Conforming toh]h Conforming to}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThhhhhKzubh)}(hThis call is Linux specific and only implemented by the ppc64 architec- ture. Programs using this system call are not portable. h]h)}(hThis call is Linux specific and only implemented by the ppc64 architec- ture. Programs using this system call are not portable.h]hThis call is Linux specific and only implemented by the ppc64 architec- ture. Programs using this system call are not portable.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK{hjeubah}(h]h ]h"]h$]h&]uh1hhhhK{hjThhubeh}(h] conforming-toah ]h"] conforming toah$]h&]uh1hhhhhhhhKzubh)}(hhh](h)}(hBugsh]hBugs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hDThe code does not yet fully implement all features lined out here. h]h)}(hBThe code does not yet fully implement all features lined out here.h]hBThe code does not yet fully implement all features lined out here.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]bugsah ]h"]bugsah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hAuthorh]hAuthor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(h!Arnd Bergmann h]h)}(h Arnd Bergmann h](hArnd Bergmann <}(hjhhhNhNubj,)}(harndb@de.ibm.comh]harndb@de.ibm.com}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:arndb@de.ibm.comuh1j+hjubh>}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]authorah ]h"]authorah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hSee Alsoh]hSee Also}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(h2capabilities(7), close(2), spu_create(2), spufs(7)h]h)}(hjh]h2capabilities(7), close(2), spu_create(2), spufs(7)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]see-alsoah ]h"]see alsoah$]h&]uh1hhhhhhhhKubeh}(h]spu-runah ]h"]spu_runah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjVerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(j0j-hhj.j+j5j2jjj jjQjNjjjjjjj(j%u nametypes}(j0hj.j5jj jQjjjj(uh}(j-hhhj+hj2j1jj8jjjNjjjTjjjjj%ju footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.