sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget/translations/zh_CN/fb/matroxfbmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/zh_TW/fb/matroxfbmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/it_IT/fb/matroxfbmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ja_JP/fb/matroxfbmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ko_KR/fb/matroxfbmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/sp_SP/fb/matroxfbmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hWhat is matroxfb?h]hWhat is matroxfb?}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh9/var/lib/git/docbuild/linux/Documentation/fb/matroxfb.rsthKubhcomment)}(h:[This file is cloned from VesaFB. Thanks go to Gerd Knorr]h]h:[This file is cloned from VesaFB. Thanks go to Gerd Knorr]}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhhhKubh paragraph)}(h\This is a driver for a graphic framebuffer for Matrox devices on Alpha, Intel and PPC boxes.h]h\This is a driver for a graphic framebuffer for Matrox devices on Alpha, Intel and PPC boxes.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h Advantages:h]h Advantages:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh block_quote)}(h* It provides a nice large console (128 cols + 48 lines with 1024x768) without using tiny, unreadable fonts. * You can run XF{68,86}_FBDev or XFree86 fbdev driver on top of /dev/fb0 * Most important: boot logo :-) h]h bullet_list)}(hhh](h list_item)}(hjIt provides a nice large console (128 cols + 48 lines with 1024x768) without using tiny, unreadable fonts.h]h)}(hjIt provides a nice large console (128 cols + 48 lines with 1024x768) without using tiny, unreadable fonts.h]hjIt provides a nice large console (128 cols + 48 lines with 1024x768) without using tiny, unreadable fonts.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubah}(h]h ]h"]h$]h&]uh1hhhubh)}(hFYou can run XF{68,86}_FBDev or XFree86 fbdev driver on top of /dev/fb0h]h)}(hjh]hFYou can run XF{68,86}_FBDev or XFree86 fbdev driver on top of /dev/fb0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1hhhubh)}(hMost important: boot logo :-) h]h)}(hMost important: boot logo :-)h]hMost important: boot logo :-)}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj#ubah}(h]h ]h"]h$]h&]uh1hhhubeh}(h]h ]h"]h$]h&]bullet*uh1hhhhK hhubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hDisadvantages:h]hDisadvantages:}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h|* graphic mode is slower than text mode... but you should not notice if you use same resolution as you used in textmode. h]h)}(hhh]h)}(hxgraphic mode is slower than text mode... but you should not notice if you use same resolution as you used in textmode. h]h)}(hvgraphic mode is slower than text mode... but you should not notice if you use same resolution as you used in textmode.h]hvgraphic mode is slower than text mode... but you should not notice if you use same resolution as you used in textmode.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj^ubah}(h]h ]h"]h$]h&]uh1hhj[ubah}(h]h ]h"]h$]h&]jAjBuh1hhhhKhjWubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hHow to use it?h]hHow to use it?}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hbSwitching modes is done using the video=matroxfb:vesa:... boot parameter or using `fbset` program.h](hRSwitching modes is done using the video=matroxfb:vesa:... boot parameter or using }(hjhhhNhNubhtitle_reference)}(h`fbset`h]hfbset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh program.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hIf you want, for example, enable a resolution of 1280x1024x24bpp you should pass to the kernel this command line: "video=matroxfb:vesa:0x1BB".h]hIf you want, for example, enable a resolution of 1280x1024x24bpp you should pass to the kernel this command line: “video=matroxfb:vesa:0x1BB”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hYou should compile in both vgacon (to boot if you remove you Matrox from box) and matroxfb (for graphics mode). You should not compile-in vesafb unless you have primary display on non-Matrox VBE2.0 device (see Documentation/fb/vesafb.rst for details).h]hYou should compile in both vgacon (to boot if you remove you Matrox from box) and matroxfb (for graphics mode). You should not compile-in vesafb unless you have primary display on non-Matrox VBE2.0 device (see Documentation/fb/vesafb.rst for details).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK!hjhhubh)}(hmCurrently supported video modes are (through vesa:... interface, PowerMac has [as addon] compatibility code):h]hmCurrently supported video modes are (through vesa:... interface, PowerMac has [as addon] compatibility code):}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK&hjhhubh)}(hhh](h)}(h Graphic modesh]h Graphic modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK+ubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hbpph]hbpp}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjDubah}(h]h ]h"]h$]h&]uh1jBhj?ubjC)}(hhh]h)}(h640x400h]h640x400}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hj[ubah}(h]h ]h"]h$]h&]uh1jBhj?ubjC)}(hhh]h)}(h640x480h]h640x480}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjrubah}(h]h ]h"]h$]h&]uh1jBhj?ubjC)}(hhh]h)}(h768x576h]h768x576}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1jBhj?ubjC)}(hhh]h)}(h800x600h]h800x600}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1jBhj?ubjC)}(hhh]h)}(h960x720h]h960x720}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1jBhj?ubeh}(h]h ]h"]h$]h&]uh1j=hj:ubah}(h]h ]h"]h$]h&]uh1j8hjubhtbody)}(hhh](j>)}(hhh](jC)}(hhh]h)}(h4h]h4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x12h]h0x12}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x102h]h0x102}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hj"ubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h}(h]h 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]h"]h$]h&]uh1jBhjdubjC)}(hhh]h)}(h0x198h]h0x198}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hjubah}(h]h ]h"]h$]h&]uh1jBhjdubjC)}(hhh]h)}(h0x11Ch]h0x11C}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hjubah}(h]h ]h"]h$]h&]uh1jBhjdubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(h15h]h15}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x116h]h0x116}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x191h]h0x191}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhj'ubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x119h]h0x119}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhj>ubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x199h]h0x199}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjUubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x11Dh]h0x11D}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjlubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(h16h]h16}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x117h]h0x117}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x192h]h0x192}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x11Ah]h0x11A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x19Ah]h0x19A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h0x11Eh]h0x11E}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(h24h]h24}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x1B8h]h0x1B8}(hj9 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChj6 ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x194h]h0x194}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjM ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x1BBh]h0x1BB}(hjg hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjd ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x19Ch]h0x19C}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChj{ ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x1BFh]h0x1BF}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChj ubah}(h]h ]h"]h$]h&]uh1jBhj ubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(h32h]h32}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x118h]h0x118}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x193h]h0x193}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x11Bh]h0x11B}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x19Bh]h0x19B}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h}(h]h ]h"]h$]h&]uh1jBhj ubeh}(h]h ]h"]h$]h&]uh1j=hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhj hhhhhNubeh}(h]graphic-modes-continuedah ]h"]graphic modes (continued)ah$]h&]uh1hhjhhhhhK:ubh)}(hhh](h)}(h Text modesh]h Text modes}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjO hhhhhKIubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjc ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjc ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjc ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjc ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjc ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjc ubj9)}(hhh]j>)}(hhh](jC)}(hhh]h)}(htexth]htext}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h640x400h]h640x400}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h640x480h]h640x480}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h1056x344h]h1056x344}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h1056x400h]h1056x400}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h1056x480h]h1056x480}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubeh}(h]h ]h"]h$]h&]uh1j=hj ubah}(h]h ]h"]h$]h&]uh1j8hjc ubj)}(hhh](j>)}(hhh](jC)}(hhh]h)}(h8x8h]h8x8}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjD ubah}(h]h ]h"]h$]h&]uh1jBhjA ubjC)}(hhh]h)}(h0x1C0h]h0x1C0}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj[ ubah}(h]h ]h"]h$]h&]uh1jBhjA ubjC)}(hhh]h)}(h0x108h]h0x108}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjr ubah}(h]h ]h"]h$]h&]uh1jBhjA ubjC)}(hhh]h)}(h0x10Ah]h0x10A}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj ubah}(h]h ]h"]h$]h&]uh1jBhjA ubjC)}(hhh]h)}(h0x10Bh]h0x10B}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj ubah}(h]h ]h"]h$]h&]uh1jBhjA ubjC)}(hhh]h)}(h0x10Ch]h0x10C}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj ubah}(h]h ]h"]h$]h&]uh1jBhjA ubeh}(h]h ]h"]h$]h&]uh1j=hj> ubj>)}(hhh](jC)}(hhh]h)}(h8x16h]h8x16}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKOhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h2, 3, 7h]h2, 3, 7}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKOhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(h0x109h]h0x109}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKOhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h}(h]h ]h"]h$]h&]uh1jBhj ubeh}(h]h ]h"]h$]h&]uh1j=hj> ubeh}(h]h ]h"]h$]h&]uh1jhjc ubeh}(h]h ]h"]h$]h&]colsKuh1jhj` ubah}(h]h ]h"]h$]h&]uh1jhjO hhhhhNubh)}(hYou can enter these number either hexadecimal (leading `0x`) or decimal (0x100 = 256). You can also use value + 512 to achieve compatibility with your old number passed to vesafb.h](h7You can enter these number either hexadecimal (leading }(hjP hhhNhNubj)}(h`0x`h]h0x}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjP ubhx) or decimal (0x100 = 256). You can also use value + 512 to achieve compatibility with your old number passed to vesafb.}(hjP hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKRhjO hhubh)}(hNon-listed number can be achieved by more complicated command-line, for example 1600x1200x32bpp can be specified by `video=matroxfb:vesa:0x11C,depth:32`.h](htNon-listed number can be achieved by more complicated command-line, for example 1600x1200x32bpp can be specified by }(hjp hhhNhNubj)}(h$`video=matroxfb:vesa:0x11C,depth:32`h]h"video=matroxfb:vesa:0x11C,depth:32}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjp ubh.}(hjp hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKVhjO hhubeh}(h] text-modesah ]h"] text modesah$]h&]uh1hhjhhhhhKIubeh}(h] how-to-use-itah ]h"]how to use it?ah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hX11h]hX11}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhK[ubh)}(hXF{68,86}_FBDev should work just fine, but it is non-accelerated. On non-intel architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp works fine.h]hXF{68,86}_FBDev should work just fine, but it is non-accelerated. On non-intel architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp works fine.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK]hj hhubh)}(hXRunning another (accelerated) X-Server like XF86_SVGA works too. But (at least) XFree servers have big troubles in multihead configurations (even on first head, not even talking about second). Running XFree86 4.x accelerated mga driver is possible, but you must not enable DRI - if you do, resolution and color depth of your X desktop must match resolution and color depths of your virtual consoles, otherwise X will corrupt accelerator settings.h]hXRunning another (accelerated) X-Server like XF86_SVGA works too. But (at least) XFree servers have big troubles in multihead configurations (even on first head, not even talking about second). Running XFree86 4.x accelerated mga driver is possible, but you must not enable DRI - if you do, resolution and color depth of your X desktop must match resolution and color depths of your virtual consoles, otherwise X will corrupt accelerator settings.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKahj hhubeh}(h]x11ah ]h"]x11ah$]h&]uh1hhhhhhhhK[ubh)}(hhh](h)}(hSVGALibh]hSVGALib}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKjubh)}(hXDriver contains SVGALib compatibility code. It is turned on by choosing textual mode for console. You can do it at boot time by using videomode 2,3,7,0x108-0x10C or 0x1C0. At runtime, `fbset -depth 0` does this work. Unfortunately, after SVGALib application exits, screen contents is corrupted. Switching to another console and back fixes it. I hope that it is SVGALib's problem and not mine, but I'm not sure.h](hDriver contains SVGALib compatibility code. It is turned on by choosing textual mode for console. You can do it at boot time by using videomode 2,3,7,0x108-0x10C or 0x1C0. At runtime, }(hj hhhNhNubj)}(h`fbset -depth 0`h]hfbset -depth 0}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh does this work. Unfortunately, after SVGALib application exits, screen contents is corrupted. Switching to another console and back fixes it. I hope that it is SVGALib’s problem and not mine, but I’m not sure.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKlhj hhubeh}(h]svgalibah ]h"]svgalibah$]h&]uh1hhhhhhhhKjubh)}(hhh](h)}(h Configurationh]h Configuration}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKuubh)}(hYou can pass kernel command line options to matroxfb with `video=matroxfb:option1,option2:value2,option3` (multiple options should be separated by comma, values are separated from options by `:`). Accepted options:h](h:You can pass kernel command line options to matroxfb with }(hj hhhNhNubj)}(h/`video=matroxfb:option1,option2:value2,option3`h]h-video=matroxfb:option1,option2:value2,option3}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubhV (multiple options should be separated by comma, values are separated from options by }(hj hhhNhNubj)}(h`:`h]h:}(hj9 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh). Accepted options:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKwhj hhubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjT ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKCuh1jhjT ubj)}(hhh](j>)}(hhh](jC)}(hhh]h)}(hmem:Xh]hmem:X}(hjt hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK}hjq ubah}(h]h ]h"]h$]h&]uh1jBhjn ubjC)}(hhh]h)}(hsize of memory (X can be in megabytes, kilobytes or bytes) You can only decrease value determined by driver because of it always probe for memory. Default is to use whole detected memory usable for on-screen display (i.e. max. 8 MB).h]hsize of memory (X can be in megabytes, kilobytes or bytes) You can only decrease value determined by driver because of it always probe for memory. Default is to use whole detected memory usable for on-screen display (i.e. max. 8 MB).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK}hj ubah}(h]h ]h"]h$]h&]uh1jBhjn ubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hdisabledh]hdisabled}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubjC)}(hhh]h)}(hGdo not load driver; you can use also `off`, but `disabled` is here too.h](h%do not load driver; you can use also }(hj hhhNhNubj)}(h`off`h]hoff}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh, but }(hj hhhNhNubj)}(h `disabled`h]hdisabled}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh is here too.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jBhj ubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(henabledh]henabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hload driver, if you have `video=matroxfb:disabled` in LILO configuration, you can override it by this (you cannot override `off`). It is default.h](hload driver, if you have }(hjhhhNhNubj)}(h`video=matroxfb:disabled`h]hvideo=matroxfb:disabled}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhI in LILO configuration, you can override it by this (you cannot override }(hjhhhNhNubj)}(h`off`h]hoff}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh). It is default.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnoaccelh]hnoaccel}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj^ubah}(h]h ]h"]h$]h&]uh1jBhj[ubjC)}(hhh]h)}(h;do not use acceleration engine. It does not work on Alphas.h]h;do not use acceleration engine. It does not work on Alphas.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjuubah}(h]h ]h"]h$]h&]uh1jBhj[ubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(haccelh]haccel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h'use acceleration engine. It is default.h]h'use acceleration engine. It is default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnopanh]hnopan}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hLcreate initial consoles with vyres = yres, thus disabling virtual scrolling.h]hLcreate initial consoles with vyres = yres, thus disabling virtual scrolling.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hpanh]hpan}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hRcreate initial consoles as tall as possible (vyres = memory/vxres). It is default.h]hRcreate initial consoles as tall as possible (vyres = memory/vxres). It is default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h nopciretryh]h nopciretry}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj:ubah}(h]h ]h"]h$]h&]uh1jBhj7ubjC)}(hhh]h)}(hdisable PCI retries. It is needed for some broken chipsets, it is autodetected for intel's 82437. In this case device does not comply to PCI 2.1 specs (it will not guarantee that every transaction terminate with success or retry in 32 PCLK).h]hdisable PCI retries. It is needed for some broken chipsets, it is autodetected for intel’s 82437. In this case device does not comply to PCI 2.1 specs (it will not guarantee that every transaction terminate with success or retry in 32 PCLK).}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjQubah}(h]h ]h"]h$]h&]uh1jBhj7ubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hpciretryh]hpciretry}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjqubah}(h]h ]h"]h$]h&]uh1jBhjnubjC)}(hhh]h)}(henable PCI retries. It is default, except for intel’s 82437.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjnubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnovgah]hnovga}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hdisables VGA I/O ports. It is default if BIOS did not enable device. You should not use this option, some boards then do not restart without power off.h]hdisables VGA I/O ports. It is default if BIOS did not enable device. You should not use this option, some boards then do not restart without power off.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hvgah]hvga}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hpreserve state of VGA I/O ports. It is default. Driver does not enable VGA I/O if BIOS did not it (it is not safe to enable it in most cases).h]hpreserve state of VGA I/O ports. It is default. Driver does not enable VGA I/O if BIOS did not it (it is not safe to enable it in most cases).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnobiosh]hnobios}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hdisables BIOS ROM. It is default if BIOS did not enable BIOS itself. You should not use this option, some boards then do not restart without power off.h]hdisables BIOS ROM. It is default if BIOS did not enable BIOS itself. You should not use this option, some boards then do not restart without power off.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj-ubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hbiosh]hbios}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjMubah}(h]h ]h"]h$]h&]uh1jBhjJubjC)}(hhh]h)}(hfpreserve state of BIOS ROM. It is default. Driver does not enable BIOS if BIOS was not enabled before.h]hfpreserve state of BIOS ROM. It is default. Driver does not enable BIOS if BIOS was not enabled before.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjdubah}(h]h ]h"]h$]h&]uh1jBhjJubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnoinith]hnoinit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(htells driver, that devices were already initialized. You should use it if you have G100 and/or if driver cannot detect memory, you see strange pattern on screen and so on. Devices not enabled by BIOS are still initialized. It is default.h]htells driver, that devices were already initialized. You should use it if you have G100 and/or if driver cannot detect memory, you see strange pattern on screen and so on. Devices not enabled by BIOS are still initialized. It is default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hinith]hinit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h/driver initializes every device it knows about.h]h/driver initializes every device it knows about.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hmemtypeh]hmemtype}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh](h)}(hfspecifies memory type, implies 'init'. This is valid only for G200 and G400 and has following meaning:h]hjspecifies memory type, implies ‘init’. This is valid only for G200 and G400 and has following meaning:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hXG200: - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram - 4 -> 2x512Kx16 chips, 8/16MB onboard, probably sdram only - 5 -> same as above - 6 -> 4x128Kx32 chips, 4MB onboard, probably sgram - 7 -> 4x128Kx32 chips, 8MB onboard, probably sgram G400: - 0 -> 2x512Kx16 SDRAM, 16/32MB - 2x512Kx32 SGRAM, 16/32MB - 1 -> 2x256Kx32 SGRAM, 8/16MB - 2 -> 4x128Kx32 SGRAM, 8/16MB - 3 -> 4x512Kx32 SDRAM, 32MB - 4 -> 4x256Kx32 SGRAM, 16/32MB - 5 -> 2x1Mx32 SDRAM, 32MB - 6 -> reserved - 7 -> reserved h]hdefinition_list)}(hhh](hdefinition_list_item)}(hXG200: - 0 -> 2x128Kx32 chips, 2MB onboard, probably sgram - 1 -> 2x128Kx32 chips, 4MB onboard, probably sgram - 2 -> 2x256Kx32 chips, 4MB onboard, probably sgram - 3 -> 2x256Kx32 chips, 8MB onboard, probably sgram - 4 -> 2x512Kx16 chips, 8/16MB onboard, probably sdram only - 5 -> same as above - 6 -> 4x128Kx32 chips, 4MB onboard, probably sgram - 7 -> 4x128Kx32 chips, 8MB onboard, probably sgramh](hterm)}(hG200:h]hG200:}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j)hhhKhj%ubh definition)}(hhh]h)}(hhh](h)}(h10 -> 2x128Kx32 chips, 2MB onboard, probably sgramh]h)}(hjCh]h10 -> 2x128Kx32 chips, 2MB onboard, probably sgram}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjAubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h11 -> 2x128Kx32 chips, 4MB onboard, probably sgramh]h)}(hjZh]h11 -> 2x128Kx32 chips, 4MB onboard, probably sgram}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjXubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h12 -> 2x256Kx32 chips, 4MB onboard, probably sgramh]h)}(hjqh]h12 -> 2x256Kx32 chips, 4MB onboard, probably sgram}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjoubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h13 -> 2x256Kx32 chips, 8MB onboard, probably sgramh]h)}(hjh]h13 -> 2x256Kx32 chips, 8MB onboard, probably sgram}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h94 -> 2x512Kx16 chips, 8/16MB onboard, probably sdram onlyh]h)}(hjh]h94 -> 2x512Kx16 chips, 8/16MB onboard, probably sdram only}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h5 -> same as aboveh]h)}(hjh]h5 -> same as above}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h16 -> 4x128Kx32 chips, 4MB onboard, probably sgramh]h)}(hjh]h16 -> 4x128Kx32 chips, 4MB onboard, probably sgram}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(h17 -> 4x128Kx32 chips, 8MB onboard, probably sgramh]h)}(hjh]h17 -> 4x128Kx32 chips, 8MB onboard, probably sgram}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj>ubeh}(h]h ]h"]h$]h&]jA-uh1hhhhKhj;ubah}(h]h ]h"]h$]h&]uh1j9hj%ubeh}(h]h ]h"]h$]h&]uh1j#hhhKhj ubj$)}(hXG400: - 0 -> 2x512Kx16 SDRAM, 16/32MB - 2x512Kx32 SGRAM, 16/32MB - 1 -> 2x256Kx32 SGRAM, 8/16MB - 2 -> 4x128Kx32 SGRAM, 8/16MB - 3 -> 4x512Kx32 SDRAM, 32MB - 4 -> 4x256Kx32 SGRAM, 16/32MB - 5 -> 2x1Mx32 SDRAM, 32MB - 6 -> reserved - 7 -> reserved h](j*)}(hG400:h]hG400:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j)hhhKhj ubj:)}(hhh]h)}(hhh](h)}(h0 -> 2x512Kx16 SDRAM, 16/32MBh]h)}(hj&h]h0 -> 2x512Kx16 SDRAM, 16/32MB}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj$ubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h2x512Kx32 SGRAM, 16/32MBh]h)}(hj=h]h2x512Kx32 SGRAM, 16/32MB}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj;ubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h1 -> 2x256Kx32 SGRAM, 8/16MBh]h)}(hjTh]h1 -> 2x256Kx32 SGRAM, 8/16MB}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjRubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h2 -> 4x128Kx32 SGRAM, 8/16MBh]h)}(hjkh]h2 -> 4x128Kx32 SGRAM, 8/16MB}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjiubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h3 -> 4x512Kx32 SDRAM, 32MBh]h)}(hjh]h3 -> 4x512Kx32 SDRAM, 32MB}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h4 -> 4x256Kx32 SGRAM, 16/32MBh]h)}(hjh]h4 -> 4x256Kx32 SGRAM, 16/32MB}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h5 -> 2x1Mx32 SDRAM, 32MBh]h)}(hjh]h5 -> 2x1Mx32 SDRAM, 32MB}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h 6 -> reservedh]h)}(hjh]h 6 -> reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj!ubh)}(h7 -> reserved h]h)}(h 7 -> reservedh]h 7 -> reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj!ubeh}(h]h ]h"]h$]h&]jAjuh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j9hj ubeh}(h]h ]h"]h$]h&]uh1j#hhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hIYou should use sdram or sgram parameter in addition to memtype parameter.h]hIYou should use sdram or sgram parameter in addition to memtype parameter.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnomtrrh]hnomtrr}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj/ubah}(h]h ]h"]h$]h&]uh1jBhj,ubjC)}(hhh]h)}(hdisables write combining on frame buffer. This slows down driver but there is reported minor incompatibility between GUS DMA and XFree under high loads if write combining is enabled (sound dropouts).h]hdisables write combining on frame buffer. This slows down driver but there is reported minor incompatibility between GUS DMA and XFree under high loads if write combining is enabled (sound dropouts).}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjFubah}(h]h ]h"]h$]h&]uh1jBhj,ubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hmtrrh]hmtrr}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjfubah}(h]h ]h"]h$]h&]uh1jBhjcubjC)}(hhh]h)}(henables write combining on frame buffer. It speeds up video accesses much. It is default. You must have MTRR support enabled in kernel and your CPU must have MTRR (f.e. Pentium II have them).h]henables write combining on frame buffer. It speeds up video accesses much. It is default. You must have MTRR support enabled in kernel and your CPU must have MTRR (f.e. Pentium II have them).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj}ubah}(h]h ]h"]h$]h&]uh1jBhjcubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hsgramh]hsgram}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hVtells to driver that you have Gxx0 with SGRAM memory. It has no effect without `init`.h](hOtells to driver that you have Gxx0 with SGRAM memory. It has no effect without }(hjhhhNhNubj)}(h`init`h]hinit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hsdramh]hsdram}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hFtells to driver that you have Gxx0 with SDRAM memory. It is a default.h]hFtells to driver that you have Gxx0 with SDRAM memory. It is a default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hinv24h]hinv24}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hchange timings parameters for 24bpp modes on Millennium and Millennium II. Specify this if you see strange color shadows around characters.h]hchange timings parameters for 24bpp modes on Millennium and Millennium II. Specify this if you see strange color shadows around characters.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj4ubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnoinv24h]hnoinv24}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjTubah}(h]h ]h"]h$]h&]uh1jBhjQubjC)}(hhh]h)}(h(use standard timings. It is the default.h]h(use standard timings. It is the default.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjkubah}(h]h ]h"]h$]h&]uh1jBhjQubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hinverseh]hinverse}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h*invert colors on screen (for LCD displays)h]h*invert colors on screen (for LCD displays)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h noinverseh]h noinverse}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h*show true colors on screen. It is default.h]h*show true colors on screen. It is default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hdev:Xh]hdev:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hbind driver to device X. Driver numbers device from 0 up to N, where device 0 is first `known` device found, 1 second and so on. lspci lists devices in this order. Default is `every` known device.h](hWbind driver to device X. Driver numbers device from 0 up to N, where device 0 is first }(hjhhhNhNubj)}(h`known`h]hknown}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhQ device found, 1 second and so on. lspci lists devices in this order. Default is }(hjhhhNhNubj)}(h`every`h]hevery}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh known device.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h nohwcursorh]h nohwcursor}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjTubah}(h]h ]h"]h$]h&]uh1jBhjQubjC)}(hhh]h)}(h7disables hardware cursor (use software cursor instead).h]h7disables hardware cursor (use software cursor instead).}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjkubah}(h]h ]h"]h$]h&]uh1jBhjQubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hhwcursorh]hhwcursor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(henables hardware cursor. It is default. If you are using non-accelerated mode (`noaccel` or `fbset -accel false`), software cursor is used (except for text mode).h](hOenables hardware cursor. It is default. If you are using non-accelerated mode (}(hjhhhNhNubj)}(h `noaccel`h]hnoaccel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh or }(hjhhhNhNubj)}(h`fbset -accel false`h]hfbset -accel false}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh2), software cursor is used (except for text mode).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hnoblinkh]hnoblink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hLdisables cursor blinking. Cursor in text mode always blinks (hw limitation).h]hLdisables cursor blinking. Cursor in text mode always blinks (hw limitation).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hblinkh]hblink}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h'enables cursor blinking. It is default.h]h'enables cursor blinking. It is default.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj4ubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h nofastfonth]h nofastfont}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjTubah}(h]h ]h"]h$]h&]uh1jBhjQubjC)}(hhh]h)}(h)disables fastfont feature. It is default.h]h)disables fastfont feature. It is default.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjkubah}(h]h ]h"]h$]h&]uh1jBhjQubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h fastfont:Xh]h fastfont:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(henables fastfont feature. X specifies size of memory reserved for font data, it must be >= (fontwidth*fontheight*chars_in_font)/8. It is faster on Gx00 series, but slower on older cards.h]henables fastfont feature. X specifies size of memory reserved for font data, it must be >= (fontwidth*fontheight*chars_in_font)/8. It is faster on Gx00 series, but slower on older cards.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h grayscaleh]h grayscale}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(henable grayscale summing. It works in PSEUDOCOLOR modes (text, 4bpp, 8bpp). In DIRECTCOLOR modes it is limited to characters displayed through putc/putcs. Direct accesses to framebuffer can paint colors.h]henable grayscale summing. It works in PSEUDOCOLOR modes (text, 4bpp, 8bpp). In DIRECTCOLOR modes it is limited to characters displayed through putc/putcs. Direct accesses to framebuffer can paint colors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h nograyscaleh]h nograyscale}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(h)disable grayscale summing. It is default.h]h)disable grayscale summing. It is default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hcross4MBh]hcross4MB}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj0ubah}(h]h ]h"]h$]h&]uh1jBhj-ubjC)}(hhh]h)}(hQenables that pixel line can cross 4MB boundary. It is default for non-Millennium.h]hQenables that pixel line can cross 4MB boundary. It is default for non-Millennium.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjGubah}(h]h ]h"]h$]h&]uh1jBhj-ubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h nocross4MBh]h nocross4MB}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjgubah}(h]h ]h"]h$]h&]uh1jBhjdubjC)}(hhh]h)}(hpixel line must not cross 4MB boundary. It is default for Millennium I or II, because of these devices have hardware limitations which do not allow this. But this option is incompatible with some (if not all yet released) versions of XF86_FBDev.h]hpixel line must not cross 4MB boundary. It is default for Millennium I or II, because of these devices have hardware limitations which do not allow this. But this option is incompatible with some (if not all yet released) versions of XF86_FBDev.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj~ubah}(h]h ]h"]h$]h&]uh1jBhjdubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hdfph]hdfp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(henables digital flat panel interface. This option is incompatible with secondary (TV) output - if DFP is active, TV output must be inactive and vice versa. DFP always uses same timing as primary (monitor) output.h]henables digital flat panel interface. This option is incompatible with secondary (TV) output - if DFP is active, TV output must be inactive and vice versa. DFP always uses same timing as primary (monitor) output.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hdfp:Xh]hdfp:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hXuse settings X for digital flat panel interface. X is number from 0 to 0xFF, and meaning of each individual bit is described in G400 manual, in description of DAC register 0x1F. For normal operation you should set all bits to zero, except lowest bit. This lowest bit selects who is source of display clocks, whether G400, or panel. Default value is now read back from hardware - so you should specify this value only if you are also using `init` parameter.h](hXuse settings X for digital flat panel interface. X is number from 0 to 0xFF, and meaning of each individual bit is described in G400 manual, in description of DAC register 0x1F. For normal operation you should set all bits to zero, except lowest bit. This lowest bit selects who is source of display clocks, whether G400, or panel. Default value is now read back from hardware - so you should specify this value only if you are also using }(hjhhhNhNubj)}(h`init`h]hinit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh parameter.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(h outputs:XYZh]h outputs:XYZ}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hXset mapping between CRTC and outputs. Each letter can have value of 0 (for no CRTC), 1 (CRTC1) or 2 (CRTC2), and first letter corresponds to primary analog output, second letter to the secondary analog output and third letter to the DVI output. Default setting is 100 for cards below G400 or G400 without DFP, 101 for G400 with DFP, and 111 for G450 and G550. You can set mapping only on first card, use matroxset for setting up other devices.h]hXset mapping between CRTC and outputs. Each letter can have value of 0 (for no CRTC), 1 (CRTC1) or 2 (CRTC2), and first letter corresponds to primary analog output, second letter to the secondary analog output and third letter to the DVI output. Default setting is 100 for cards below G400 or G400 without DFP, 101 for G400 with DFP, and 111 for G450 and G550. You can set mapping only on first card, use matroxset for setting up other devices.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj5ubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjk ubj>)}(hhh](jC)}(hhh]h)}(hvesa:Xh]hvesa:X}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjUubah}(h]h ]h"]h$]h&]uh1jBhjRubjC)}(hhh]h)}(hXselects startup videomode. X is number from 0 to 0x1FF, see table above for detailed explanation. Default is 640x480x8bpp if driver has 8bpp support. Otherwise first available of 640x350x4bpp, 640x480x15bpp, 640x480x24bpp, 640x480x32bpp or 80x25 text (80x25 text is always available).h]hXselects startup videomode. X is number from 0 to 0x1FF, see table above for detailed explanation. Default is 640x480x8bpp if driver has 8bpp support. Otherwise first available of 640x350x4bpp, 640x480x15bpp, 640x480x24bpp, 640x480x32bpp or 80x25 text (80x25 text is always available).}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlubah}(h]h ]h"]h$]h&]uh1jBhjRubeh}(h]h ]h"]h$]h&]uh1j=hjk ubeh}(h]h ]h"]h$]h&]uh1jhjT ubeh}(h]h ]h"]h$]h&]colsKuh1jhjQ ubah}(h]h ]h"]h$]h&]uh1jhj hhhhhNubh)}(hhIf you are not satisfied with videomode selected by `vesa` option, you can modify it with these options:.h](h4If you are not satisfied with videomode selected by }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh. option, you can modify it with these options:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKCuh1jhjubj)}(hhh](j>)}(hhh](jC)}(hhh]h)}(hxres:Xh]hxres:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hHhorizontal resolution, in pixels. Default is derived from `vesa` option.h](h:horizontal resolution, in pixels. Default is derived from }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh option.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hyres:Xh]hyres:X}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj%ubah}(h]h ]h"]h$]h&]uh1jBhj"ubjC)}(hhh]h)}(hKvertical resolution, in pixel lines. Default is derived from `vesa` option.h](h=vertical resolution, in pixel lines. Default is derived from }(hj?hhhNhNubj)}(h`vesa`h]hvesa}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubh option.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj<ubah}(h]h ]h"]h$]h&]uh1jBhj"ubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hupper:Xh]hupper:X}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjnubah}(h]h ]h"]h$]h&]uh1jBhjkubjC)}(hhh]h)}(htop boundary: lines between end of VSYNC pulse and start of first pixel line of picture. Default is derived from `vesa` option.h](hqtop boundary: lines between end of VSYNC pulse and start of first pixel line of picture. Default is derived from }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh option.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jBhjkubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hlower:Xh]hlower:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hnbottom boundary: lines between end of picture and start of VSYNC pulse. Default is derived from `vesa` option.h](h`bottom boundary: lines between end of picture and start of VSYNC pulse. Default is derived from }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh option.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hvslen:Xh]hvslen:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hGlength of VSYNC pulse, in lines. Default is derived from `vesa` option.h](h9length of VSYNC pulse, in lines. Default is derived from }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh option.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hleft:Xh]hleft:X}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjIubah}(h]h ]h"]h$]h&]uh1jBhjFubjC)}(hhh]h)}(hhleft boundary: pixels between end of HSYNC pulse and first pixel. Default is derived from `vesa` option.h](hZleft boundary: pixels between end of HSYNC pulse and first pixel. Default is derived from }(hjchhhNhNubj)}(h`vesa`h]hvesa}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjcubh option.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj`ubah}(h]h ]h"]h$]h&]uh1jBhjFubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hright:Xh]hright:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hnright boundary: pixels between end of picture and start of HSYNC pulse. Default is derived from `vesa` option.h](h`right boundary: pixels between end of picture and start of HSYNC pulse. Default is derived from }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh option.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hhslen:Xh]hhslen:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hHlength of HSYNC pulse, in pixels. Default is derived from `vesa` option.h](h:length of HSYNC pulse, in pixels. Default is derived from }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh option.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(h pixclock:Xh]h pixclock:X}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj$ubah}(h]h ]h"]h$]h&]uh1jBhj!ubjC)}(hhh]h)}(hedotclocks, in ps (picoseconds). Default is derived from `vesa` option and from `fh` and `fv` options.h](h8dotclocks, in ps (picoseconds). Default is derived from }(hj>hhhNhNubj)}(h`vesa`h]hvesa}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubh option and from }(hj>hhhNhNubj)}(h`fh`h]hfh}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubh and }(hj>hhhNhNubj)}(h`fv`h]hfv}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubh options.}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj;ubah}(h]h ]h"]h$]h&]uh1jBhj!ubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hsync:Xh]hsync:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hX7sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity. If bit 3 (value 0x08) is set, composite sync instead of HSYNC is generated. If bit 5 (value 0x20) is set, sync on green is turned on. Do not forget that if you want sync on green, you also probably want composite sync. Default depends on `vesa`.h](hX0sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity. If bit 3 (value 0x08) is set, composite sync instead of HSYNC is generated. If bit 5 (value 0x20) is set, sync on green is turned on. Do not forget that if you want sync on green, you also probably want composite sync. Default depends on }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hdepth:Xh]hdepth:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hFBits per pixel: 0=text, 4,8,15,16,24 or 32. Default depends on `vesa`.h](h?Bits per pixel: 0=text, 4,8,15,16,24 or 32. Default depends on }(hjhhhNhNubj)}(h`vesa`h]hvesa}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhj hhhhhNubh)}(hIf you know capabilities of your monitor, you can specify some (or all) of `maxclk`, `fh` and `fv`. In this case, `pixclock` is computed so that pixclock <= maxclk, real_fh <= fh and real_fv <= fv.h](hKIf you know capabilities of your monitor, you can specify some (or all) of }(hj3hhhNhNubj)}(h`maxclk`h]hmaxclk}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh, }(hj3hhhNhNubj)}(h`fh`h]hfh}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh and }(hj3hhhNhNubj)}(h`fv`h]hfv}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh. In this case, }(hj3hhhNhNubj)}(h `pixclock`h]hpixclock}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubhI is computed so that pixclock <= maxclk, real_fh <= fh and real_fv <= fv.}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM!hj hhubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKBuh1jhjubj)}(hhh](j>)}(hhh](jC)}(hhh]h)}(hmaxclk:Xh]hmaxclk:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM&hjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hPmaximum dotclock. X can be specified in MHz, kHz or Hz. Default is `don`t care`.h](hCmaximum dotclock. X can be specified in MHz, kHz or Hz. Default is }(hjhhhNhNubj)}(h `don`t care`h]h don`t care}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM&hjubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hfh:Xh]hfh:X}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM(hjubah}(h]h ]h"]h$]h&]uh1jBhjubjC)}(hhh]h)}(hgmaximum horizontal synchronization frequency. X can be specified in kHz or Hz. Default is `don't care`.h](hZmaximum horizontal synchronization frequency. X can be specified in kHz or Hz. Default is }(hj hhhNhNubj)}(h `don't care`h]h don’t care}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM(hj ubah}(h]h ]h"]h$]h&]uh1jBhjubeh}(h]h ]h"]h$]h&]uh1j=hjubj>)}(hhh](jC)}(hhh]h)}(hfv:Xh]hfv:X}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM*hj;ubah}(h]h ]h"]h$]h&]uh1jBhj8ubjC)}(hhh]h)}(hmaximum vertical frequency. X must be specified in Hz. Default is 70 for modes derived from `vesa` with yres <= 400, 60Hz for yres > 400.h](h\maximum vertical frequency. X must be specified in Hz. Default is 70 for modes derived from }(hjUhhhNhNubj)}(h`vesa`h]hvesa}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjUubh' with yres <= 400, 60Hz for yres > 400.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM*hjRubah}(h]h ]h"]h$]h&]uh1jBhj8ubeh}(h]h ]h"]h$]h&]uh1j=hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhj hhhhhNubeh}(h] configurationah ]h"] configurationah$]h&]uh1hhhhhhhhKuubh)}(hhh](h)}(h Limitationsh]h Limitations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM1ubh)}(heThere are known and unknown bugs, features and misfeatures. Currently there are following known bugs:h]heThere are known and unknown bugs, features and misfeatures. Currently there are following known bugs:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM3hjhhubh)}(hXK- SVGALib does not restore screen on exit - generic fbcon-cfbX procedures do not work on Alphas. Due to this, `noaccel` (and cfb4 accel) driver does not work on Alpha. So everyone with access to `/dev/fb*` on Alpha can hang machine (you should restrict access to `/dev/fb*` - everyone with access to this device can destroy your monitor, believe me...). - 24bpp does not support correctly XF-FBDev on big-endian architectures. - interlaced text mode is not supported; it looks like hardware limitation, but I'm not sure. - Gxx0 SGRAM/SDRAM is not autodetected. - maybe more... h]h)}(hhh](h)}(h'SVGALib does not restore screen on exith]h)}(hjh]h'SVGALib does not restore screen on exit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM6hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hX5generic fbcon-cfbX procedures do not work on Alphas. Due to this, `noaccel` (and cfb4 accel) driver does not work on Alpha. So everyone with access to `/dev/fb*` on Alpha can hang machine (you should restrict access to `/dev/fb*` - everyone with access to this device can destroy your monitor, believe me...).h]h)}(hX5generic fbcon-cfbX procedures do not work on Alphas. Due to this, `noaccel` (and cfb4 accel) driver does not work on Alpha. So everyone with access to `/dev/fb*` on Alpha can hang machine (you should restrict access to `/dev/fb*` - everyone with access to this device can destroy your monitor, believe me...).h](hBgeneric fbcon-cfbX procedures do not work on Alphas. Due to this, }(hjhhhNhNubj)}(h `noaccel`h]hnoaccel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhL (and cfb4 accel) driver does not work on Alpha. So everyone with access to }(hjhhhNhNubj)}(h `/dev/fb*`h]h/dev/fb*}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh: on Alpha can hang machine (you should restrict access to }(hjhhhNhNubj)}(h `/dev/fb*`h]h/dev/fb*}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhP - everyone with access to this device can destroy your monitor, believe me...).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM7hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hF24bpp does not support correctly XF-FBDev on big-endian architectures.h]h)}(hj)h]hF24bpp does not support correctly XF-FBDev on big-endian architectures.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM<hj'ubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h[interlaced text mode is not supported; it looks like hardware limitation, but I'm not sure.h]h)}(h[interlaced text mode is not supported; it looks like hardware limitation, but I'm not sure.h]h]interlaced text mode is not supported; it looks like hardware limitation, but I’m not sure.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM=hj>ubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h%Gxx0 SGRAM/SDRAM is not autodetected.h]h)}(hjXh]h%Gxx0 SGRAM/SDRAM is not autodetected.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM?hjVubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hmaybe more... h]h)}(h maybe more...h]h maybe more...}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM@hjmubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jAjuh1hhhhM6hjubah}(h]h ]h"]h$]h&]uh1hhhhM6hjhhubh)}(hAnd following misfeatures:h]hAnd following misfeatures:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMBhjhhubh)}(hX- SVGALib does not restore screen on exit. - pixclock for text modes is limited by hardware to - 83 MHz on G200 - 66 MHz on Millennium I - 60 MHz on Millennium II Because I have no access to other devices, I do not know specific frequencies for them. So driver does not check this and allows you to set frequency higher that this. It causes sparks, black holes and other pretty effects on screen. Device was not destroyed during tests. :-) - my Millennium G200 oscillator has frequency range from 35 MHz to 380 MHz (and it works with 8bpp on about 320 MHz dotclocks (and changed mclk)). But Matrox says on product sheet that VCO limit is 50-250 MHz, so I believe them (maybe that chip overheats, but it has a very big cooler (G100 has none), so it should work). - special mixed video/graphics videomodes of Mystique and Gx00 - 2G8V16 and G16V16 are not supported - color keying is not supported - feature connector of Mystique and Gx00 is set to VGA mode (it is disabled by BIOS) - DDC (monitor detection) is supported through dualhead driver - some check for input values are not so strict how it should be (you can specify vslen=4000 and so on). - maybe more... h]h)}(hhh](h)}(h(SVGALib does not restore screen on exit.h]h)}(hjh]h(SVGALib does not restore screen on exit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMDhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hXpixclock for text modes is limited by hardware to - 83 MHz on G200 - 66 MHz on Millennium I - 60 MHz on Millennium II Because I have no access to other devices, I do not know specific frequencies for them. So driver does not check this and allows you to set frequency higher that this. It causes sparks, black holes and other pretty effects on screen. Device was not destroyed during tests. :-)h](h)}(h1pixclock for text modes is limited by hardware toh]h1pixclock for text modes is limited by hardware to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhjubh)}(hD- 83 MHz on G200 - 66 MHz on Millennium I - 60 MHz on Millennium II h]h)}(hhh](h)}(h83 MHz on G200h]h)}(hjh]h83 MHz on G200}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMGhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h66 MHz on Millennium Ih]h)}(hjh]h66 MHz on Millennium I}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h60 MHz on Millennium II h]h)}(h60 MHz on Millennium IIh]h60 MHz on Millennium II}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMIhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jAjuh1hhhhMGhjubah}(h]h ]h"]h$]h&]uh1hhhhMGhjubh)}(hXBecause I have no access to other devices, I do not know specific frequencies for them. So driver does not check this and allows you to set frequency higher that this. It causes sparks, black holes and other pretty effects on screen. Device was not destroyed during tests. :-)h]hXBecause I have no access to other devices, I do not know specific frequencies for them. So driver does not check this and allows you to set frequency higher that this. It causes sparks, black holes and other pretty effects on screen. Device was not destroyed during tests. :-)}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMKhjubeh}(h]h ]h"]h$]h&]uh1hhjubh)}(hX?my Millennium G200 oscillator has frequency range from 35 MHz to 380 MHz (and it works with 8bpp on about 320 MHz dotclocks (and changed mclk)). But Matrox says on product sheet that VCO limit is 50-250 MHz, so I believe them (maybe that chip overheats, but it has a very big cooler (G100 has none), so it should work).h]h)}(hX?my Millennium G200 oscillator has frequency range from 35 MHz to 380 MHz (and it works with 8bpp on about 320 MHz dotclocks (and changed mclk)). But Matrox says on product sheet that VCO limit is 50-250 MHz, so I believe them (maybe that chip overheats, but it has a very big cooler (G100 has none), so it should work).h]hX?my Millennium G200 oscillator has frequency range from 35 MHz to 380 MHz (and it works with 8bpp on about 320 MHz dotclocks (and changed mclk)). But Matrox says on product sheet that VCO limit is 50-250 MHz, so I believe them (maybe that chip overheats, but it has a very big cooler (G100 has none), so it should work).}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMOhj<ubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hbspecial mixed video/graphics videomodes of Mystique and Gx00 - 2G8V16 and G16V16 are not supportedh]h)}(hbspecial mixed video/graphics videomodes of Mystique and Gx00 - 2G8V16 and G16V16 are not supportedh]hbspecial mixed video/graphics videomodes of Mystique and Gx00 - 2G8V16 and G16V16 are not supported}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMThjTubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hcolor keying is not supportedh]h)}(hjnh]hcolor keying is not supported}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMVhjlubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hRfeature connector of Mystique and Gx00 is set to VGA mode (it is disabled by BIOS)h]h)}(hRfeature connector of Mystique and Gx00 is set to VGA mode (it is disabled by BIOS)h]hRfeature connector of Mystique and Gx00 is set to VGA mode (it is disabled by BIOS)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMWhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hh](hPetr Vandrovec <}(hj"hhhNhNubj!)}(hvandrove@vc.cvut.czh]hvandrove@vc.cvut.cz}(hj"hhhNhNubah}(h]h ]h"]h$]h&]refurimailto:vandrove@vc.cvut.czuh1j!hj"ubh>}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj!hhubeh}(h] dualhead-g450ah ]h"] dualhead g450ah$]h&]uh1hhhhhhhhMubeh}(h]what-is-matroxfbah ]h"]what is matroxfb?ah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksjBfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj"error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(j"j"j j jjjL jI j j j j j j jjj\ jY j j j!j!j"j"u nametypes}(j"j jjL j j j jj\ j j!j"uh}(j"hj jjjjI j j jO j j j j jj jY jj j_ j!j j"j!u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.