€•4Œsphinx.addnodes”Œdocument”“”)�”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)�”}”(hhh]”(hŒ pending_xref”“”)�”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…”�”}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ:/translations/zh_CN/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)�”}”(hhh]”hŒChinese (Traditional)”…”�”}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ:/translations/zh_TW/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒItalian”…”�”}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ:/translations/it_IT/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒJapanese”…”�”}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ:/translations/ja_JP/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒKorean”…”�”}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ:/translations/ko_KR/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒPortuguese (Brazilian)”…”�”}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ:/translations/pt_BR/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒSpanish”…”�”}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ:/translations/sp_SP/driver-api/usb/writing_musb_glue_layer”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)�”}”(hhh]”(hŒtitle”“”)�”}”(hŒWriting a MUSB Glue Layer”h]”hŒWriting a MUSB Glue Layer”…”�”}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³ŒT/var/lib/git/docbuild/linux/Documentation/driver-api/usb/writing_musb_glue_layer.rst”h´KubhŒ field_list”“”)�”}”(hhh]”hŒfield”“”)�”}”(hhh]”(hŒ field_name”“”)�”}”(hŒAuthor”h]”hŒAuthor”…”�”}”(hh×h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÕhhÒh³hÊh´KubhŒ field_body”“”)�”}”(hŒApelete Seketeli ”h]”hŒ paragraph”“”)�”}”(hŒApelete Seketeli”h]”hŒApelete Seketeli”…”�”}”(hhíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Khhçubah}”(h]”h ]”h"]”h$]”h&]”uh1håhhÒubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÐh³hÊh´KhhÍh²hubah}”(h]”h ]”h"]”h$]”h&]”uh1hËhh·h²hh³hÊh´Kubh¶)�”}”(hhh]”(h»)�”}”(hŒ Introduction”h]”hŒ Introduction”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj h²hh³hÊh´Kubhì)�”}”(hŒæThe Linux MUSB subsystem is part of the larger Linux USB subsystem. It provides support for embedded USB Device Controllers (UDC) that do not use Universal Host Controller Interface (UHCI) or Open Host Controller Interface (OHCI).”h]”hŒæThe Linux MUSB subsystem is part of the larger Linux USB subsystem. It provides support for embedded USB Device Controllers (UDC) that do not use Universal Host Controller Interface (UHCI) or Open Host Controller Interface (OHCI).”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´K hj h²hubhì)�”}”(hXInstead, these embedded UDC rely on the USB On-the-Go (OTG) specification which they implement at least partially. The silicon reference design used in most cases is the Multipoint USB Highspeed Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventraâ„¢ design.”h]”hXInstead, these embedded UDC rely on the USB On-the-Go (OTG) specification which they implement at least partially. The silicon reference design used in most cases is the Multipoint USB Highspeed Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventraâ„¢ design.”…”�”}”(hj,h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Khj h²hubhì)�”}”(hX’As a self-taught exercise I have written an MUSB glue layer for the Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the kernel source tree. This layer can be found at ``drivers/usb/musb/jz4740.c``. In this documentation I will walk through the basics of the ``jz4740.c`` glue layer, explaining the different pieces and what needs to be done in order to write your own device glue layer.”h]”(hŒ·As a self-taught exercise I have written an MUSB glue layer for the Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the kernel source tree. This layer can be found at ”…”�”}”(hj:h²hh³Nh´NubhŒliteral”“”)�”}”(hŒ``drivers/usb/musb/jz4740.c``”h]”hŒdrivers/usb/musb/jz4740.c”…”�”}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj:ubhŒ>. In this documentation I will walk through the basics of the ”…”�”}”(hj:h²hh³Nh´NubjC)�”}”(hŒ ``jz4740.c``”h]”hŒjz4740.c”…”�”}”(hjVh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj:ubhŒt glue layer, explaining the different pieces and what needs to be done in order to write your own device glue layer.”…”�”}”(hj:h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Khj h²hubhŒtarget”“”)�”}”(hŒ.. _musb-basics:”h]”h}”(h]”h ]”h"]”h$]”h&]”Œrefid”Œ musb-basics”uh1jnh´Khj h²hh³hÊubeh}”(h]”Œ introduction”ah ]”h"]”Œ introduction”ah$]”h&]”uh1hµhh·h²hh³hÊh´Kubh¶)�”}”(hhh]”(h»)�”}”(hŒLinux MUSB Basics”h]”hŒLinux MUSB Basics”…”�”}”(hj‡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj„h²hh³hÊh´Kubhì)�”}”(hX&To get started on the topic, please read USB On-the-Go Basics (see Resources) which provides an introduction of USB OTG operation at the hardware level. A couple of wiki pages by Texas Instruments and Analog Devices also provide an overview of the Linux kernel MUSB configuration, albeit focused on some specific devices provided by these companies. Finally, getting acquainted with the USB specification at USB home page may come in handy, with practical instance provided through the Writing USB Device Drivers documentation (again, see Resources).”h]”hX&To get started on the topic, please read USB On-the-Go Basics (see Resources) which provides an introduction of USB OTG operation at the hardware level. A couple of wiki pages by Texas Instruments and Analog Devices also provide an overview of the Linux kernel MUSB configuration, albeit focused on some specific devices provided by these companies. Finally, getting acquainted with the USB specification at USB home page may come in handy, with practical instance provided through the Writing USB Device Drivers documentation (again, see Resources).”…”�”}”(hj•h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´K!hj„h²hubhì)�”}”(hŒ½Linux USB stack is a layered architecture in which the MUSB controller hardware sits at the lowest. The MUSB controller driver abstract the MUSB controller hardware to the Linux USB stack::”h]”hŒ¼Linux USB stack is a layered architecture in which the MUSB controller hardware sits at the lowest. The MUSB controller driver abstract the MUSB controller hardware to the Linux USB stack:”…”�”}”(hj£h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´K*hj„h²hubhŒ literal_block”“”)�”}”(hXN ------------------------ | | <------- drivers/usb/gadget | Linux USB Core Stack | <------- drivers/usb/host | | <------- drivers/usb/core ------------------------ â¬� -------------------------- | | <------ drivers/usb/musb/musb_gadget.c | MUSB Controller driver | <------ drivers/usb/musb/musb_host.c | | <------ drivers/usb/musb/musb_core.c -------------------------- â¬� --------------------------------- | MUSB Platform Specific Driver | | | <-- drivers/usb/musb/jz4740.c | aka "Glue Layer" | --------------------------------- â¬� --------------------------------- | MUSB Controller Hardware | ---------------------------------”h]”hXN ------------------------ | | <------- drivers/usb/gadget | Linux USB Core Stack | <------- drivers/usb/host | | <------- drivers/usb/core ------------------------ â¬� -------------------------- | | <------ drivers/usb/musb/musb_gadget.c | MUSB Controller driver | <------ drivers/usb/musb/musb_host.c | | <------ drivers/usb/musb/musb_core.c -------------------------- â¬� --------------------------------- | MUSB Platform Specific Driver | | | <-- drivers/usb/musb/jz4740.c | aka "Glue Layer" | --------------------------------- â¬� --------------------------------- | MUSB Controller Hardware | ---------------------------------”…”�”}”hj³sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1j±h³hÊh´K.hj„h²hubhì)�”}”(hŒŽAs outlined above, the glue layer is actually the platform specific code sitting in between the controller driver and the controller hardware.”h]”hŒŽAs outlined above, the glue layer is actually the platform specific code sitting in between the controller driver and the controller hardware.”…”�”}”(hjÃh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KDhj„h²hubhì)�”}”(hXµJust like a Linux USB driver needs to register itself with the Linux USB subsystem, the MUSB glue layer needs first to register itself with the MUSB controller driver. This will allow the controller driver to know about which device the glue layer supports and which functions to call when a supported device is detected or released; remember we are talking about an embedded controller chip here, so no insertion or removal at run-time.”h]”hXµJust like a Linux USB driver needs to register itself with the Linux USB subsystem, the MUSB glue layer needs first to register itself with the MUSB controller driver. This will allow the controller driver to know about which device the glue layer supports and which functions to call when a supported device is detected or released; remember we are talking about an embedded controller chip here, so no insertion or removal at run-time.”…”�”}”(hjÑh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KGhj„h²hubhì)�”}”(hŒŒAll of this information is passed to the MUSB controller driver through a :c:type:`platform_driver` structure defined in the glue layer as::”h]”(hŒJAll of this information is passed to the MUSB controller driver through a ”…”�”}”(hjßh²hh³Nh´Nubh)�”}”(hŒ:c:type:`platform_driver`”h]”jC)�”}”(hjéh]”hŒplatform_driver”…”�”}”(hjëh²hh³Nh´Nubah}”(h]”h ]”(Œxref”Œc”Œc-type”eh"]”h$]”h&]”uh1jBhjçubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”Œ&driver-api/usb/writing_musb_glue_layer”Œ refdomain”jöŒreftype”Œtype”Œ refexplicit”‰Œrefwarn”‰Œ reftarget”Œplatform_driver”uh1hh³hÊh´KOhjßubhŒ( structure defined in the glue layer as:”…”�”}”(hjßh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KOhj„h²hubj²)�”}”(hŒ¯static struct platform_driver jz4740_driver = { .probe = jz4740_probe, .remove = jz4740_remove, .driver = { .name = "musb-jz4740", }, };”h]”hŒ¯static struct platform_driver jz4740_driver = { .probe = jz4740_probe, .remove = jz4740_remove, .driver = { .name = "musb-jz4740", }, };”…”�”}”hjsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´KRhj„h²hubhì)�”}”(hXRThe probe and remove function pointers are called when a matching device is detected and, respectively, released. The name string describes the device supported by this glue layer. In the current case it matches a platform_device structure declared in ``arch/mips/jz4740/platform.c``. Note that we are not using device tree bindings here.”h]”(hŒüThe probe and remove function pointers are called when a matching device is detected and, respectively, released. The name string describes the device supported by this glue layer. In the current case it matches a platform_device structure declared in ”…”�”}”(hj"h²hh³Nh´NubjC)�”}”(hŒ``arch/mips/jz4740/platform.c``”h]”hŒarch/mips/jz4740/platform.c”…”�”}”(hj*h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj"ubhŒ7. Note that we are not using device tree bindings here.”…”�”}”(hj"h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KZhj„h²hubhì)�”}”(hXLIn order to register itself to the controller driver, the glue layer goes through a few steps, basically allocating the controller hardware resources and initialising a couple of circuits. To do so, it needs to keep track of the information used throughout these steps. This is done by defining a private ``jz4740_glue`` structure::”h]”(hX1In order to register itself to the controller driver, the glue layer goes through a few steps, basically allocating the controller hardware resources and initialising a couple of circuits. To do so, it needs to keep track of the information used throughout these steps. This is done by defining a private ”…”�”}”(hjBh²hh³Nh´NubjC)�”}”(hŒ``jz4740_glue``”h]”hŒ jz4740_glue”…”�”}”(hjJh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjBubhŒ structure:”…”�”}”(hjBh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´K`hj„h²hubj²)�”}”(hŒvstruct jz4740_glue { struct device *dev; struct platform_device *musb; struct clk *clk; };”h]”hŒvstruct jz4740_glue { struct device *dev; struct platform_device *musb; struct clk *clk; };”…”�”}”hjbsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´Kfhj„h²hubhì)�”}”(hXLThe dev and musb members are both device structure variables. The first one holds generic information about the device, since it's the basic device structure, and the latter holds information more closely related to the subsystem the device is registered to. The clk variable keeps information related to the device clock operation.”h]”hXNThe dev and musb members are both device structure variables. The first one holds generic information about the device, since it’s the basic device structure, and the latter holds information more closely related to the subsystem the device is registered to. The clk variable keeps information related to the device clock operation.”…”�”}”(hjph²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Kmhj„h²hubhì)�”}”(hŒwLet's go through the steps of the probe function that leads the glue layer to register itself to the controller driver.”h]”hŒyLet’s go through the steps of the probe function that leads the glue layer to register itself to the controller driver.”…”�”}”(hj~h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Kshj„h²hubhŒnote”“”)�”}”(hŒ‰For the sake of readability each function will be split in logical parts, each part being shown as if it was independent from the others.”h]”hì)�”}”(hŒ‰For the sake of readability each function will be split in logical parts, each part being shown as if it was independent from the others.”h]”hŒ‰For the sake of readability each function will be split in logical parts, each part being shown as if it was independent from the others.”…”�”}”(hj’h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KxhjŽubah}”(h]”h ]”h"]”h$]”h&]”uh1jŒhj„h²hh³hÊh´Nubj²)�”}”(hX%static int jz4740_probe(struct platform_device *pdev) { struct platform_device *musb; struct jz4740_glue *glue; struct clk *clk; int ret; glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); if (!glue) return -ENOMEM; musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); if (!musb) { dev_err(&pdev->dev, "failed to allocate musb device\n"); return -ENOMEM; } clk = devm_clk_get(&pdev->dev, "udc"); if (IS_ERR(clk)) { dev_err(&pdev->dev, "failed to get clock\n"); ret = PTR_ERR(clk); goto err_platform_device_put; } ret = clk_prepare_enable(clk); if (ret) { dev_err(&pdev->dev, "failed to enable clock\n"); goto err_platform_device_put; } musb->dev.parent = &pdev->dev; glue->dev = &pdev->dev; glue->musb = musb; glue->clk = clk; return 0; err_platform_device_put: platform_device_put(musb); return ret; }”h]”hX%static int jz4740_probe(struct platform_device *pdev) { struct platform_device *musb; struct jz4740_glue *glue; struct clk *clk; int ret; glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); if (!glue) return -ENOMEM; musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); if (!musb) { dev_err(&pdev->dev, "failed to allocate musb device\n"); return -ENOMEM; } clk = devm_clk_get(&pdev->dev, "udc"); if (IS_ERR(clk)) { dev_err(&pdev->dev, "failed to get clock\n"); ret = PTR_ERR(clk); goto err_platform_device_put; } ret = clk_prepare_enable(clk); if (ret) { dev_err(&pdev->dev, "failed to enable clock\n"); goto err_platform_device_put; } musb->dev.parent = &pdev->dev; glue->dev = &pdev->dev; glue->musb = musb; glue->clk = clk; return 0; err_platform_device_put: platform_device_put(musb); return ret; }”…”�”}”hj¦sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂŒforce”‰Œlanguage”jöŒhighlight_args”}”Œhl_lines”]”(KK Kesuh1j±h³hÊh´K{hj„h²hubhì)�”}”(hX€The first few lines of the probe function allocate and assign the glue, musb and clk variables. The ``GFP_KERNEL`` flag (line 8) allows the allocation process to sleep and wait for memory, thus being usable in a locking situation. The ``PLATFORM_DEVID_AUTO`` flag (line 12) allows automatic allocation and management of device IDs in order to avoid device namespace collisions with explicit IDs. With :c:func:`devm_clk_get` (line 18) the glue layer allocates the clock -- the ``devm_`` prefix indicates that :c:func:`clk_get` is managed: it automatically frees the allocated clock resource data when the device is released -- and enable it.”h]”(hŒdThe first few lines of the probe function allocate and assign the glue, musb and clk variables. The ”…”�”}”(hjºh²hh³Nh´NubjC)�”}”(hŒ``GFP_KERNEL``”h]”hŒ GFP_KERNEL”…”�”}”(hjÂh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjºubhŒy flag (line 8) allows the allocation process to sleep and wait for memory, thus being usable in a locking situation. The ”…”�”}”(hjºh²hh³Nh´NubjC)�”}”(hŒ``PLATFORM_DEVID_AUTO``”h]”hŒPLATFORM_DEVID_AUTO”…”�”}”(hjÔh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjºubhŒ� flag (line 12) allows automatic allocation and management of device IDs in order to avoid device namespace collisions with explicit IDs. With ”…”�”}”(hjºh²hh³Nh´Nubh)�”}”(hŒ:c:func:`devm_clk_get`”h]”jC)�”}”(hjèh]”hŒdevm_clk_get()”…”�”}”(hjêh²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhjæubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒ devm_clk_get”uh1hh³hÊh´K©hjºubhŒ5 (line 18) the glue layer allocates the clock -- the ”…”�”}”(hjºh²hh³Nh´NubjC)�”}”(hŒ ``devm_``”h]”hŒdevm_”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjºubhŒ prefix indicates that ”…”�”}”(hjºh²hh³Nh´Nubh)�”}”(hŒ:c:func:`clk_get`”h]”jC)�”}”(hjh]”hŒ clk_get()”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhjubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒclk_get”uh1hh³hÊh´K©hjºubhŒs is managed: it automatically frees the allocated clock resource data when the device is released -- and enable it.”…”�”}”(hjºh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´K©hj„h²hubhì)�”}”(hŒ"Then comes the registration steps:”h]”hŒ"Then comes the registration steps:”…”�”}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´K¶hj„h²hubj²)�”}”(hXðstatic int jz4740_probe(struct platform_device *pdev) { struct musb_hdrc_platform_data *pdata = &jz4740_musb_platform_data; pdata->platform_ops = &jz4740_musb_ops; platform_set_drvdata(pdev, glue); ret = platform_device_add_resources(musb, pdev->resource, pdev->num_resources); if (ret) { dev_err(&pdev->dev, "failed to add resources\n"); goto err_clk_disable; } ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); if (ret) { dev_err(&pdev->dev, "failed to add platform_data\n"); goto err_clk_disable; } return 0; err_clk_disable: clk_disable_unprepare(clk); err_platform_device_put: platform_device_put(musb); return ret; }”h]”hXðstatic int jz4740_probe(struct platform_device *pdev) { struct musb_hdrc_platform_data *pdata = &jz4740_musb_platform_data; pdata->platform_ops = &jz4740_musb_ops; platform_set_drvdata(pdev, glue); ret = platform_device_add_resources(musb, pdev->resource, pdev->num_resources); if (ret) { dev_err(&pdev->dev, "failed to add resources\n"); goto err_clk_disable; } ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); if (ret) { dev_err(&pdev->dev, "failed to add platform_data\n"); goto err_clk_disable; } return 0; err_clk_disable: clk_disable_unprepare(clk); err_platform_device_put: platform_device_put(musb); return ret; }”…”�”}”hjRsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(KKKK Kesuh1j±h³hÊh´K¸hj„h²hubhì)�”}”(hX)The first step is to pass the device data privately held by the glue layer on to the controller driver through :c:func:`platform_set_drvdata` (line 7). Next is passing on the device resources information, also privately held at that point, through :c:func:`platform_device_add_resources` (line 9).”h]”(hŒoThe first step is to pass the device data privately held by the glue layer on to the controller driver through ”…”�”}”(hjbh²hh³Nh´Nubh)�”}”(hŒ:c:func:`platform_set_drvdata`”h]”jC)�”}”(hjlh]”hŒplatform_set_drvdata()”…”�”}”(hjnh²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhjjubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒplatform_set_drvdata”uh1hh³hÊh´KÙhjbubhŒk (line 7). Next is passing on the device resources information, also privately held at that point, through ”…”�”}”(hjbh²hh³Nh´Nubh)�”}”(hŒ':c:func:`platform_device_add_resources`”h]”jC)�”}”(hj�h]”hŒplatform_device_add_resources()”…”�”}”(hj‘h²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhj�ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒplatform_device_add_resources”uh1hh³hÊh´KÙhjbubhŒ (line 9).”…”�”}”(hjbh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KÙhj„h²hubhì)�”}”(hX„Finally comes passing on the platform specific data to the controller driver (line 16). Platform data will be discussed in :ref:`musb-dev-platform-data`, but here we are looking at the ``platform_ops`` function pointer (line 5) in ``musb_hdrc_platform_data`` structure (line 3). This function pointer allows the MUSB controller driver to know which function to call for device operation::”h]”(hŒ{Finally comes passing on the platform specific data to the controller driver (line 16). Platform data will be discussed in ”…”�”}”(hj¶h²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-dev-platform-data`”h]”hŒinline”“”)�”}”(hjÀh]”hŒmusb-dev-platform-data”…”�”}”(hjÄh²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj¾ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jÎŒreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒmusb-dev-platform-data”uh1hh³hÊh´KÞhj¶ubhŒ!, but here we are looking at the ”…”�”}”(hj¶h²hh³Nh´NubjC)�”}”(hŒ``platform_ops``”h]”hŒ platform_ops”…”�”}”(hjäh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj¶ubhŒ function pointer (line 5) in ”…”�”}”(hj¶h²hh³Nh´NubjC)�”}”(hŒ``musb_hdrc_platform_data``”h]”hŒmusb_hdrc_platform_data”…”�”}”(hjöh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj¶ubhŒ� structure (line 3). This function pointer allows the MUSB controller driver to know which function to call for device operation:”…”�”}”(hj¶h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´KÞhj„h²hubj²)�”}”(hŒ„static const struct musb_platform_ops jz4740_musb_ops = { .init = jz4740_musb_init, .exit = jz4740_musb_exit, };”h]”hŒ„static const struct musb_platform_ops jz4740_musb_ops = { .init = jz4740_musb_init, .exit = jz4740_musb_exit, };”…”�”}”hjsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´Kåhj„h²hubhì)�”}”(hX€Here we have the minimal case where only init and exit functions are called by the controller driver when needed. Fact is the JZ4740 MUSB controller is a basic controller, lacking some features found in other controllers, otherwise we may also have pointers to a few other functions like a power management function or a function to switch between OTG and non-OTG modes, for instance.”h]”hX€Here we have the minimal case where only init and exit functions are called by the controller driver when needed. Fact is the JZ4740 MUSB controller is a basic controller, lacking some features found in other controllers, otherwise we may also have pointers to a few other functions like a power management function or a function to switch between OTG and non-OTG modes, for instance.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Kêhj„h²hubhì)�”}”(hŒbAt that point of the registration process, the controller driver actually calls the init function:”h]”hŒbAt that point of the registration process, the controller driver actually calls the init function:”…”�”}”(hj*h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Kñhj„h²hubhŒ block_quote”“”)�”}”(hXÜ.. code-block:: c :emphasize-lines: 12,14 static int jz4740_musb_init(struct musb *musb) { musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); if (!musb->xceiv) { pr_err("HS UDC: no transceiver configured\n"); return -ENODEV; } /* Silicon does not implement ConfigData register. * Set dyn_fifo to avoid reading EP config from hardware. */ musb->dyn_fifo = true; musb->isr = jz4740_musb_interrupt; return 0; } ”h]”j²)�”}”(hX¡static int jz4740_musb_init(struct musb *musb) { musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); if (!musb->xceiv) { pr_err("HS UDC: no transceiver configured\n"); return -ENODEV; } /* Silicon does not implement ConfigData register. * Set dyn_fifo to avoid reading EP config from hardware. */ musb->dyn_fifo = true; musb->isr = jz4740_musb_interrupt; return 0; }”h]”hX¡static int jz4740_musb_init(struct musb *musb) { musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); if (!musb->xceiv) { pr_err("HS UDC: no transceiver configured\n"); return -ENODEV; } /* Silicon does not implement ConfigData register. * Set dyn_fifo to avoid reading EP config from hardware. */ musb->dyn_fifo = true; musb->isr = jz4740_musb_interrupt; return 0; }”…”�”}”hj>sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(K Kesuh1j±h³hÊh´Kôhj:ubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´Kôhj„h²hubhì)�”}”(hXŠThe goal of ``jz4740_musb_init()`` is to get hold of the transceiver driver data of the MUSB controller hardware and pass it on to the MUSB controller driver, as usual. The transceiver is the circuitry inside the controller hardware responsible for sending/receiving the USB data. Since it is an implementation of the physical layer of the OSI model, the transceiver is also referred to as PHY.”h]”(hŒ The goal of ”…”�”}”(hjTh²hh³Nh´NubjC)�”}”(hŒ``jz4740_musb_init()``”h]”hŒjz4740_musb_init()”…”�”}”(hj\h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjTubhXh is to get hold of the transceiver driver data of the MUSB controller hardware and pass it on to the MUSB controller driver, as usual. The transceiver is the circuitry inside the controller hardware responsible for sending/receiving the USB data. Since it is an implementation of the physical layer of the OSI model, the transceiver is also referred to as PHY.”…”�”}”(hjTh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M hj„h²hubhì)�”}”(hXrGetting hold of the ``MUSB PHY`` driver data is done with ``usb_get_phy()`` which returns a pointer to the structure containing the driver instance data. The next couple of instructions (line 12 and 14) are used as a quirk and to setup IRQ handling respectively. Quirks and IRQ handling will be discussed later in :ref:`musb-dev-quirks` and :ref:`musb-handling-irqs`\ ::”h]”(hŒGetting hold of the ”…”�”}”(hjth²hh³Nh´NubjC)�”}”(hŒ ``MUSB PHY``”h]”hŒMUSB PHY”…”�”}”(hj|h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjtubhŒ driver data is done with ”…”�”}”(hjth²hh³Nh´NubjC)�”}”(hŒ``usb_get_phy()``”h]”hŒ usb_get_phy()”…”�”}”(hjŽh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjtubhŒï which returns a pointer to the structure containing the driver instance data. The next couple of instructions (line 12 and 14) are used as a quirk and to setup IRQ handling respectively. Quirks and IRQ handling will be discussed later in ”…”�”}”(hjth²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-dev-quirks`”h]”jÃ)�”}”(hj¢h]”hŒmusb-dev-quirks”…”�”}”(hj¤h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”j®Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒmusb-dev-quirks”uh1hh³hÊh´MhjtubhŒ and ”…”�”}”(hjth²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-handling-irqs`”h]”jÃ)�”}”(hjÆh]”hŒmusb-handling-irqs”…”�”}”(hjÈh²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhjÄubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jÒŒreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒmusb-handling-irqs”uh1hh³hÊh´MhjtubhŒ”…”�”}”(hjth²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mhj„h²hubj²)�”}”(hŒ_static int jz4740_musb_exit(struct musb *musb) { usb_put_phy(musb->xceiv); return 0; }”h]”hŒ_static int jz4740_musb_exit(struct musb *musb) { usb_put_phy(musb->xceiv); return 0; }”…”�”}”hjîsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´Mhj„h²hubhì)�”}”(hŒŽActing as the counterpart of init, the exit function releases the MUSB PHY driver when the controller hardware itself is about to be released.”h]”hŒŽActing as the counterpart of init, the exit function releases the MUSB PHY driver when the controller hardware itself is about to be released.”…”�”}”(hjüh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mhj„h²hubhì)�”}”(hXAgain, note that init and exit are fairly simple in this case due to the basic set of features of the JZ4740 controller hardware. When writing an musb glue layer for a more complex controller hardware, you might need to take care of more processing in those two functions.”h]”hXAgain, note that init and exit are fairly simple in this case due to the basic set of features of the JZ4740 controller hardware. When writing an musb glue layer for a more complex controller hardware, you might need to take care of more processing in those two functions.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M!hj„h²hubhì)�”}”(hŒaReturning from the init function, the MUSB controller driver jumps back into the probe function::”h]”hŒ`Returning from the init function, the MUSB controller driver jumps back into the probe function:”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M&hj„h²hubj²)�”}”(hX[static int jz4740_probe(struct platform_device *pdev) { ret = platform_device_add(musb); if (ret) { dev_err(&pdev->dev, "failed to register musb device\n"); goto err_clk_disable; } return 0; err_clk_disable: clk_disable_unprepare(clk); err_platform_device_put: platform_device_put(musb); return ret; }”h]”hX[static int jz4740_probe(struct platform_device *pdev) { ret = platform_device_add(musb); if (ret) { dev_err(&pdev->dev, "failed to register musb device\n"); goto err_clk_disable; } return 0; err_clk_disable: clk_disable_unprepare(clk); err_platform_device_put: platform_device_put(musb); return ret; }”…”�”}”hj&sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´M)hj„h²hubhì)�”}”(hŒóThis is the last part of the device registration process where the glue layer adds the controller hardware device to Linux kernel device hierarchy: at this stage, all known information about the device is passed on to the Linux USB core stack:”h]”hŒóThis is the last part of the device registration process where the glue layer adds the controller hardware device to Linux kernel device hierarchy: at this stage, all known information about the device is passed on to the Linux USB core stack:”…”�”}”(hj4h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M:hj„h²hubj9)�”}”(hX .. code-block:: c :emphasize-lines: 5,6 static int jz4740_remove(struct platform_device *pdev) { struct jz4740_glue *glue = platform_get_drvdata(pdev); platform_device_unregister(glue->musb); clk_disable_unprepare(glue->clk); return 0; } ”h]”j²)�”}”(hŒØstatic int jz4740_remove(struct platform_device *pdev) { struct jz4740_glue *glue = platform_get_drvdata(pdev); platform_device_unregister(glue->musb); clk_disable_unprepare(glue->clk); return 0; }”h]”hŒØstatic int jz4740_remove(struct platform_device *pdev) { struct jz4740_glue *glue = platform_get_drvdata(pdev); platform_device_unregister(glue->musb); clk_disable_unprepare(glue->clk); return 0; }”…”�”}”hjFsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(KKesuh1j±h³hÊh´M?hjBubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´M?hj„h²hubhì)�”}”(hŒ¡Acting as the counterpart of probe, the remove function unregister the MUSB controller hardware (line 5) and disable the clock (line 6), allowing it to be gated.”h]”hŒ¡Acting as the counterpart of probe, the remove function unregister the MUSB controller hardware (line 5) and disable the clock (line 6), allowing it to be gated.”…”�”}”(hj\h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MLhj„h²hubjo)�”}”(hŒ.. _musb-handling-irqs:”h]”h}”(h]”h ]”h"]”h$]”h&]”jzŒmusb-handling-irqs”uh1jnh´MPhj„h²hh³hÊubeh}”(h]”(Œlinux-musb-basics”j{eh ]”h"]”(Œlinux musb basics”Œ musb-basics”eh$]”h&]”uh1hµhh·h²hh³hÊh´KŒexpect_referenced_by_name”}”j{jpsŒexpect_referenced_by_id”}”j{jpsubh¶)�”}”(hhh]”(h»)�”}”(hŒ Handling IRQs”h]”hŒ Handling IRQs”…”�”}”(hj…h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj‚h²hh³hÊh´MSubhì)�”}”(hŒ„Additionally to the MUSB controller hardware basic setup and registration, the glue layer is also responsible for handling the IRQs:”h]”hŒ„Additionally to the MUSB controller hardware basic setup and registration, the glue layer is also responsible for handling the IRQs:”…”�”}”(hj“h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MUhj‚h²hubj9)�”}”(hX’.. code-block:: c :emphasize-lines: 7,9-11,14,24 static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; spin_lock_irqsave(&musb->lock, flags); musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); /* * The controller is gadget only, the state of the host mode IRQ bits is * undefined. Mask them to make sure that the musb driver core will * never see them set */ musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME | MUSB_INTR_RESET | MUSB_INTR_SOF; if (musb->int_usb || musb->int_tx || musb->int_rx) retval = musb_interrupt(musb); spin_unlock_irqrestore(&musb->lock, flags); return retval; } ”h]”j²)�”}”(hXIstatic irqreturn_t jz4740_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; spin_lock_irqsave(&musb->lock, flags); musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); /* * The controller is gadget only, the state of the host mode IRQ bits is * undefined. Mask them to make sure that the musb driver core will * never see them set */ musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME | MUSB_INTR_RESET | MUSB_INTR_SOF; if (musb->int_usb || musb->int_tx || musb->int_rx) retval = musb_interrupt(musb); spin_unlock_irqrestore(&musb->lock, flags); return retval; }”h]”hXIstatic irqreturn_t jz4740_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; spin_lock_irqsave(&musb->lock, flags); musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); /* * The controller is gadget only, the state of the host mode IRQ bits is * undefined. Mask them to make sure that the musb driver core will * never see them set */ musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME | MUSB_INTR_RESET | MUSB_INTR_SOF; if (musb->int_usb || musb->int_tx || musb->int_rx) retval = musb_interrupt(musb); spin_unlock_irqrestore(&musb->lock, flags); return retval; }”…”�”}”hj¥sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(KK K K KKesuh1j±h³hÊh´MXhj¡ubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´MXhj‚h²hubhì)�”}”(hŒ³Here the glue layer mostly has to read the relevant hardware registers and pass their values on to the controller driver which will handle the actual event that triggered the IRQ.”h]”hŒ³Here the glue layer mostly has to read the relevant hardware registers and pass their values on to the controller driver which will handle the actual event that triggered the IRQ.”…”�”}”(hj»h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mwhj‚h²hubhì)�”}”(hX The interrupt handler critical section is protected by the :c:func:`spin_lock_irqsave` and counterpart :c:func:`spin_unlock_irqrestore` functions (line 7 and 24 respectively), which prevent the interrupt handler code to be run by two different threads at the same time.”h]”(hŒ;The interrupt handler critical section is protected by the ”…”�”}”(hjÉh²hh³Nh´Nubh)�”}”(hŒ:c:func:`spin_lock_irqsave`”h]”jC)�”}”(hjÓh]”hŒspin_lock_irqsave()”…”�”}”(hjÕh²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhjÑubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒspin_lock_irqsave”uh1hh³hÊh´M{hjÉubhŒ and counterpart ”…”�”}”(hjÉh²hh³Nh´Nubh)�”}”(hŒ :c:func:`spin_unlock_irqrestore`”h]”jC)�”}”(hjöh]”hŒspin_unlock_irqrestore()”…”�”}”(hjøh²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhjôubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒspin_unlock_irqrestore”uh1hh³hÊh´M{hjÉubhŒ† functions (line 7 and 24 respectively), which prevent the interrupt handler code to be run by two different threads at the same time.”…”�”}”(hjÉh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M{hj‚h²hubhì)�”}”(hŒ>Then the relevant interrupt registers are read (line 9 to 11):”h]”hŒ>Then the relevant interrupt registers are read (line 9 to 11):”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M€hj‚h²hubhŒ bullet_list”“”)�”}”(hhh]”(hŒ list_item”“”)�”}”(hŒG``MUSB_INTRUSB``: indicates which USB interrupts are currently active, ”h]”hì)�”}”(hŒF``MUSB_INTRUSB``: indicates which USB interrupts are currently active,”h]”(jC)�”}”(hŒ``MUSB_INTRUSB``”h]”hŒ MUSB_INTRUSB”…”�”}”(hj:h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj6ubhŒ6: indicates which USB interrupts are currently active,”…”�”}”(hj6h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M‚hj2ubah}”(h]”h ]”h"]”h$]”h&]”uh1j0hj-h²hh³hÊh´Nubj1)�”}”(hŒZ``MUSB_INTRTX``: indicates which of the interrupts for TX endpoints are currently active, ”h]”hì)�”}”(hŒY``MUSB_INTRTX``: indicates which of the interrupts for TX endpoints are currently active,”h]”(jC)�”}”(hŒ``MUSB_INTRTX``”h]”hŒ MUSB_INTRTX”…”�”}”(hj`h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj\ubhŒJ: indicates which of the interrupts for TX endpoints are currently active,”…”�”}”(hj\h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M„hjXubah}”(h]”h ]”h"]”h$]”h&]”uh1j0hj-h²hh³hÊh´Nubj1)�”}”(hŒZ``MUSB_INTRRX``: indicates which of the interrupts for TX endpoints are currently active. ”h]”hì)�”}”(hŒY``MUSB_INTRRX``: indicates which of the interrupts for TX endpoints are currently active.”h]”(jC)�”}”(hŒ``MUSB_INTRRX``”h]”hŒ MUSB_INTRRX”…”�”}”(hj†h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj‚ubhŒJ: indicates which of the interrupts for TX endpoints are currently active.”…”�”}”(hj‚h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M‡hj~ubah}”(h]”h ]”h"]”h$]”h&]”uh1j0hj-h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j+h³hÊh´M‚hj‚h²hubhì)�”}”(hXNote that :c:func:`musb_readb` is used to read 8-bit registers at most, while :c:func:`musb_readw` allows us to read at most 16-bit registers. There are other functions that can be used depending on the size of your device registers. See ``musb_io.h`` for more information.”h]”(hŒ Note that ”…”�”}”(hj¬h²hh³Nh´Nubh)�”}”(hŒ:c:func:`musb_readb`”h]”jC)�”}”(hj¶h]”hŒ musb_readb()”…”�”}”(hj¸h²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhj´ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒ musb_readb”uh1hh³hÊh´MŠhj¬ubhŒ0 is used to read 8-bit registers at most, while ”…”�”}”(hj¬h²hh³Nh´Nubh)�”}”(hŒ:c:func:`musb_readw`”h]”jC)�”}”(hjÙh]”hŒ musb_readw()”…”�”}”(hjÛh²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-func”eh"]”h$]”h&]”uh1jBhj×ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œfunc”Œ refexplicit”‰Œrefwarn”‰jŒ musb_readw”uh1hh³hÊh´MŠhj¬ubhŒŒ allows us to read at most 16-bit registers. There are other functions that can be used depending on the size of your device registers. See ”…”�”}”(hj¬h²hh³Nh´NubjC)�”}”(hŒ ``musb_io.h``”h]”hŒ musb_io.h”…”�”}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj¬ubhŒ for more information.”…”�”}”(hj¬h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MŠhj‚h²hubhì)�”}”(hŒŽInstruction on line 18 is another quirk specific to the JZ4740 USB device controller, which will be discussed later in :ref:`musb-dev-quirks`.”h]”(hŒwInstruction on line 18 is another quirk specific to the JZ4740 USB device controller, which will be discussed later in ”…”�”}”(hjh²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-dev-quirks`”h]”jÃ)�”}”(hjh]”hŒmusb-dev-quirks”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhjubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”j(Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒmusb-dev-quirks”uh1hh³hÊh´M�hjubhŒ.”…”�”}”(hjh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M�hj‚h²hubhì)�”}”(hŒyThe glue layer still needs to register the IRQ handler though. Remember the instruction on line 14 of the init function::”h]”hŒxThe glue layer still needs to register the IRQ handler though. Remember the instruction on line 14 of the init function:”…”�”}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M’hj‚h²hubj²)�”}”(hŒhstatic int jz4740_musb_init(struct musb *musb) { musb->isr = jz4740_musb_interrupt; return 0; }”h]”hŒhstatic int jz4740_musb_init(struct musb *musb) { musb->isr = jz4740_musb_interrupt; return 0; }”…”�”}”hjRsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´M•hj‚h²hubhì)�”}”(hŒîThis instruction sets a pointer to the glue layer IRQ handler function, in order for the controller hardware to call the handler back when an IRQ comes from the controller hardware. The interrupt handler is now implemented and registered.”h]”hŒîThis instruction sets a pointer to the glue layer IRQ handler function, in order for the controller hardware to call the handler back when an IRQ comes from the controller hardware. The interrupt handler is now implemented and registered.”…”�”}”(hj`h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mœhj‚h²hubjo)�”}”(hŒ.. _musb-dev-platform-data:”h]”h}”(h]”h ]”h"]”h$]”h&]”jzŒmusb-dev-platform-data”uh1jnh´M¡hj‚h²hh³hÊubeh}”(h]”(Œ handling-irqs”jteh ]”h"]”(Œ handling irqs”Œmusb-handling-irqs”eh$]”h&]”uh1hµhh·h²hh³hÊh´MSj~}”jjjsj€}”jtjjsubh¶)�”}”(hhh]”(h»)�”}”(hŒDevice Platform Data”h]”hŒDevice Platform Data”…”�”}”(hj‡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj„h²hh³hÊh´M¤ubhì)�”}”(hŒ¥In order to write an MUSB glue layer, you need to have some data describing the hardware capabilities of your controller hardware, which is called the platform data.”h]”hŒ¥In order to write an MUSB glue layer, you need to have some data describing the hardware capabilities of your controller hardware, which is called the platform data.”…”�”}”(hj•h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M¦hj„h²hubhì)�”}”(hŒ½Platform data is specific to your hardware, though it may cover a broad range of devices, and is generally found somewhere in the ``arch/`` directory, depending on your device architecture.”h]”(hŒ‚Platform data is specific to your hardware, though it may cover a broad range of devices, and is generally found somewhere in the ”…”�”}”(hj£h²hh³Nh´NubjC)�”}”(hŒ ``arch/``”h]”hŒarch/”…”�”}”(hj«h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj£ubhŒ2 directory, depending on your device architecture.”…”�”}”(hj£h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mªhj„h²hubhì)�”}”(hŒ¾For instance, platform data for the JZ4740 SoC is found in ``arch/mips/jz4740/platform.c``. In the ``platform.c`` file each device of the JZ4740 SoC is described through a set of structures.”h]”(hŒ;For instance, platform data for the JZ4740 SoC is found in ”…”�”}”(hjÃh²hh³Nh´NubjC)�”}”(hŒ``arch/mips/jz4740/platform.c``”h]”hŒarch/mips/jz4740/platform.c”…”�”}”(hjËh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÃubhŒ . In the ”…”�”}”(hjÃh²hh³Nh´NubjC)�”}”(hŒ``platform.c``”h]”hŒ platform.c”…”�”}”(hjÝh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÃubhŒM file each device of the JZ4740 SoC is described through a set of structures.”…”�”}”(hjÃh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M®hj„h²hubhì)�”}”(hŒ`Here is the part of ``arch/mips/jz4740/platform.c`` that covers the USB Device Controller (UDC):”h]”(hŒHere is the part of ”…”�”}”(hjõh²hh³Nh´NubjC)�”}”(hŒ``arch/mips/jz4740/platform.c``”h]”hŒarch/mips/jz4740/platform.c”…”�”}”(hjýh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjõubhŒ- that covers the USB Device Controller (UDC):”…”�”}”(hjõh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M²hj„h²hubj9)�”}”(hX|.. code-block:: c :emphasize-lines: 2,7,14-17,21,22,25,26,28,29 /* USB Device Controller */ struct platform_device jz4740_udc_xceiv_device = { .name = "usb_phy_gen_xceiv", .id = 0, }; static struct resource jz4740_udc_resources[] = { [0] = { .start = JZ4740_UDC_BASE_ADDR, .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = JZ4740_IRQ_UDC, .end = JZ4740_IRQ_UDC, .flags = IORESOURCE_IRQ, .name = "mc", }, }; struct platform_device jz4740_udc_device = { .name = "musb-jz4740", .id = -1, .dev = { .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(jz4740_udc_resources), .resource = jz4740_udc_resources, }; ”h]”j²)�”}”(hX/* USB Device Controller */ struct platform_device jz4740_udc_xceiv_device = { .name = "usb_phy_gen_xceiv", .id = 0, }; static struct resource jz4740_udc_resources[] = { [0] = { .start = JZ4740_UDC_BASE_ADDR, .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = JZ4740_IRQ_UDC, .end = JZ4740_IRQ_UDC, .flags = IORESOURCE_IRQ, .name = "mc", }, }; struct platform_device jz4740_udc_device = { .name = "musb-jz4740", .id = -1, .dev = { .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(jz4740_udc_resources), .resource = jz4740_udc_resources, };”h]”hX/* USB Device Controller */ struct platform_device jz4740_udc_xceiv_device = { .name = "usb_phy_gen_xceiv", .id = 0, }; static struct resource jz4740_udc_resources[] = { [0] = { .start = JZ4740_UDC_BASE_ADDR, .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = JZ4740_IRQ_UDC, .end = JZ4740_IRQ_UDC, .flags = IORESOURCE_IRQ, .name = "mc", }, }; struct platform_device jz4740_udc_device = { .name = "musb-jz4740", .id = -1, .dev = { .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(jz4740_udc_resources), .resource = jz4740_udc_resources, };”…”�”}”hjsbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(KKKKKKKKKKKKesuh1j±h³hÊh´Mµhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´Mµhj„h²hubhì)�”}”(hŒ{The ``jz4740_udc_xceiv_device`` platform device structure (line 2) describes the UDC transceiver with a name and id number.”h]”(hŒThe ”…”�”}”(hj/h²hh³Nh´NubjC)�”}”(hŒ``jz4740_udc_xceiv_device``”h]”hŒjz4740_udc_xceiv_device”…”�”}”(hj7h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj/ubhŒ\ platform device structure (line 2) describes the UDC transceiver with a name and id number.”…”�”}”(hj/h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M×hj„h²hubhì)�”}”(hXAt the time of this writing, note that ``usb_phy_gen_xceiv`` is the specific name to be used for all transceivers that are either built-in with reference USB IP or autonomous and doesn't require any PHY programming. You will need to set ``CONFIG_NOP_USB_XCEIV=y`` in the kernel configuration to make use of the corresponding transceiver driver. The id field could be set to -1 (equivalent to ``PLATFORM_DEVID_NONE``), -2 (equivalent to ``PLATFORM_DEVID_AUTO``) or start with 0 for the first device of this kind if we want a specific id number.”h]”(hŒ'At the time of this writing, note that ”…”�”}”(hjOh²hh³Nh´NubjC)�”}”(hŒ``usb_phy_gen_xceiv``”h]”hŒusb_phy_gen_xceiv”…”�”}”(hjWh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjOubhŒ³ is the specific name to be used for all transceivers that are either built-in with reference USB IP or autonomous and doesn’t require any PHY programming. You will need to set ”…”�”}”(hjOh²hh³Nh´NubjC)�”}”(hŒ``CONFIG_NOP_USB_XCEIV=y``”h]”hŒCONFIG_NOP_USB_XCEIV=y”…”�”}”(hjih²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjOubhŒ� in the kernel configuration to make use of the corresponding transceiver driver. The id field could be set to -1 (equivalent to ”…”�”}”(hjOh²hh³Nh´NubjC)�”}”(hŒ``PLATFORM_DEVID_NONE``”h]”hŒPLATFORM_DEVID_NONE”…”�”}”(hj{h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjOubhŒ), -2 (equivalent to ”…”�”}”(hjOh²hh³Nh´NubjC)�”}”(hŒ``PLATFORM_DEVID_AUTO``”h]”hŒPLATFORM_DEVID_AUTO”…”�”}”(hj�h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjOubhŒT) or start with 0 for the first device of this kind if we want a specific id number.”…”�”}”(hjOh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MÚhj„h²hubhì)�”}”(hŒbThe ``jz4740_udc_resources`` resource structure (line 7) defines the UDC registers base addresses.”h]”(hŒThe ”…”�”}”(hj¥h²hh³Nh´NubjC)�”}”(hŒ``jz4740_udc_resources``”h]”hŒjz4740_udc_resources”…”�”}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj¥ubhŒF resource structure (line 7) defines the UDC registers base addresses.”…”�”}”(hj¥h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mähj„h²hubhì)�”}”(hXØThe first array (line 9 to 11) defines the UDC registers base memory addresses: start points to the first register memory address, end points to the last register memory address and the flags member defines the type of resource we are dealing with. So ``IORESOURCE_MEM`` is used to define the registers memory addresses. The second array (line 14 to 17) defines the UDC IRQ registers addresses. Since there is only one IRQ register available for the JZ4740 UDC, start and end point at the same address. The ``IORESOURCE_IRQ`` flag tells that we are dealing with IRQ resources, and the name ``mc`` is in fact hard-coded in the MUSB core in order for the controller driver to retrieve this IRQ resource by querying it by its name.”h]”(hŒüThe first array (line 9 to 11) defines the UDC registers base memory addresses: start points to the first register memory address, end points to the last register memory address and the flags member defines the type of resource we are dealing with. So ”…”�”}”(hjÅh²hh³Nh´NubjC)�”}”(hŒ``IORESOURCE_MEM``”h]”hŒIORESOURCE_MEM”…”�”}”(hjÍh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÅubhŒí is used to define the registers memory addresses. The second array (line 14 to 17) defines the UDC IRQ registers addresses. Since there is only one IRQ register available for the JZ4740 UDC, start and end point at the same address. The ”…”�”}”(hjÅh²hh³Nh´NubjC)�”}”(hŒ``IORESOURCE_IRQ``”h]”hŒIORESOURCE_IRQ”…”�”}”(hjßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÅubhŒA flag tells that we are dealing with IRQ resources, and the name ”…”�”}”(hjÅh²hh³Nh´NubjC)�”}”(hŒ``mc``”h]”hŒmc”…”�”}”(hjñh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÅubhŒ„ is in fact hard-coded in the MUSB core in order for the controller driver to retrieve this IRQ resource by querying it by its name.”…”�”}”(hjÅh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mçhj„h²hubhì)�”}”(hŒ`Finally, the ``jz4740_udc_device`` platform device structure (line 21) describes the UDC itself.”h]”(hŒ Finally, the ”…”�”}”(hj h²hh³Nh´NubjC)�”}”(hŒ``jz4740_udc_device``”h]”hŒjz4740_udc_device”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj ubhŒ> platform device structure (line 21) describes the UDC itself.”…”�”}”(hj h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Móhj„h²hubhì)�”}”(hXßThe ``musb-jz4740`` name (line 22) defines the MUSB driver that is used for this device; remember this is in fact the name that we used in the ``jz4740_driver`` platform driver structure in :ref:`musb-basics`. The id field (line 23) is set to -1 (equivalent to ``PLATFORM_DEVID_NONE``) since we do not need an id for the device: the MUSB controller driver was already set to allocate an automatic id in :ref:`musb-basics`. In the dev field we care for DMA related information here. The ``dma_mask`` field (line 25) defines the width of the DMA mask that is going to be used, and ``coherent_dma_mask`` (line 26) has the same purpose but for the ``alloc_coherent`` DMA mappings: in both cases we are using a 32 bits mask. Then the resource field (line 29) is simply a pointer to the resource structure defined before, while the ``num_resources`` field (line 28) keeps track of the number of arrays defined in the resource structure (in this case there were two resource arrays defined before).”h]”(hŒThe ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ``musb-jz4740``”h]”hŒ musb-jz4740”…”�”}”(hj1 h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒ| name (line 22) defines the MUSB driver that is used for this device; remember this is in fact the name that we used in the ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ``jz4740_driver``”h]”hŒ jz4740_driver”…”�”}”(hjC h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒ platform driver structure in ”…”�”}”(hj) h²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-basics`”h]”jÃ)�”}”(hjW h]”hŒ musb-basics”…”�”}”(hjY h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhjU ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jc Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒ musb-basics”uh1hh³hÊh´Möhj) ubhŒ5. The id field (line 23) is set to -1 (equivalent to ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ``PLATFORM_DEVID_NONE``”h]”hŒPLATFORM_DEVID_NONE”…”�”}”(hjy h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒw) since we do not need an id for the device: the MUSB controller driver was already set to allocate an automatic id in ”…”�”}”(hj) h²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-basics`”h]”jÃ)�”}”(hj� h]”hŒ musb-basics”…”�”}”(hj� h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj‹ ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”j™ Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒ musb-basics”uh1hh³hÊh´Möhj) ubhŒA. In the dev field we care for DMA related information here. The ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ ``dma_mask``”h]”hŒdma_mask”…”�”}”(hj¯ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒQ field (line 25) defines the width of the DMA mask that is going to be used, and ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ``coherent_dma_mask``”h]”hŒcoherent_dma_mask”…”�”}”(hjÁ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒ, (line 26) has the same purpose but for the ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ``alloc_coherent``”h]”hŒalloc_coherent”…”�”}”(hjÓ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒ¤ DMA mappings: in both cases we are using a 32 bits mask. Then the resource field (line 29) is simply a pointer to the resource structure defined before, while the ”…”�”}”(hj) h²hh³Nh´NubjC)�”}”(hŒ``num_resources``”h]”hŒ num_resources”…”�”}”(hjå h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj) ubhŒ” field (line 28) keeps track of the number of arrays defined in the resource structure (in this case there were two resource arrays defined before).”…”�”}”(hj) h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Möhj„h²hubhì)�”}”(hŒ±With this quick overview of the UDC platform data at the ``arch/`` level now done, let's get back to the MUSB glue layer specific platform data in ``drivers/usb/musb/jz4740.c``:”h]”(hŒ9With this quick overview of the UDC platform data at the ”…”�”}”(hjý h²hh³Nh´NubjC)�”}”(hŒ ``arch/``”h]”hŒarch/”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjý ubhŒS level now done, let’s get back to the MUSB glue layer specific platform data in ”…”�”}”(hjý h²hh³Nh´NubjC)�”}”(hŒ``drivers/usb/musb/jz4740.c``”h]”hŒdrivers/usb/musb/jz4740.c”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjý ubhŒ:”…”�”}”(hjý h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mhj„h²hubj9)�”}”(hXE.. code-block:: c :emphasize-lines: 3,5,7-9,11 static struct musb_hdrc_config jz4740_musb_config = { /* Silicon does not implement USB OTG. */ .multipoint = 0, /* Max EPs scanned, driver will decide which EP can be used. */ .num_eps = 4, /* RAMbits needed to configure EPs from table */ .ram_bits = 9, .fifo_cfg = jz4740_musb_fifo_cfg, .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg), }; static struct musb_hdrc_platform_data jz4740_musb_platform_data = { .mode = MUSB_PERIPHERAL, .config = &jz4740_musb_config, }; ”h]”j²)�”}”(hXstatic struct musb_hdrc_config jz4740_musb_config = { /* Silicon does not implement USB OTG. */ .multipoint = 0, /* Max EPs scanned, driver will decide which EP can be used. */ .num_eps = 4, /* RAMbits needed to configure EPs from table */ .ram_bits = 9, .fifo_cfg = jz4740_musb_fifo_cfg, .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg), }; static struct musb_hdrc_platform_data jz4740_musb_platform_data = { .mode = MUSB_PERIPHERAL, .config = &jz4740_musb_config, };”h]”hXstatic struct musb_hdrc_config jz4740_musb_config = { /* Silicon does not implement USB OTG. */ .multipoint = 0, /* Max EPs scanned, driver will decide which EP can be used. */ .num_eps = 4, /* RAMbits needed to configure EPs from table */ .ram_bits = 9, .fifo_cfg = jz4740_musb_fifo_cfg, .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg), }; static struct musb_hdrc_platform_data jz4740_musb_platform_data = { .mode = MUSB_PERIPHERAL, .config = &jz4740_musb_config, };”…”�”}”hj3 sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(KKKKK K esuh1j±h³hÊh´M hj/ ubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´M hj„h²hubhì)�”}”(hŒÓFirst the glue layer configures some aspects of the controller driver operation related to the controller hardware specifics. This is done through the ``jz4740_musb_config`` :c:type:`musb_hdrc_config` structure.”h]”(hŒ—First the glue layer configures some aspects of the controller driver operation related to the controller hardware specifics. This is done through the ”…”�”}”(hjI h²hh³Nh´NubjC)�”}”(hŒ``jz4740_musb_config``”h]”hŒjz4740_musb_config”…”�”}”(hjQ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjI ubhŒ ”…”�”}”(hjI h²hh³Nh´Nubh)�”}”(hŒ:c:type:`musb_hdrc_config`”h]”jC)�”}”(hje h]”hŒmusb_hdrc_config”…”�”}”(hjg h²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-type”eh"]”h$]”h&]”uh1jBhjc ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œtype”Œ refexplicit”‰Œrefwarn”‰jŒmusb_hdrc_config”uh1hh³hÊh´MhjI ubhŒ structure.”…”�”}”(hjI h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mhj„h²hubhì)�”}”(hXœDefining the OTG capability of the controller hardware, the multipoint member (line 3) is set to 0 (equivalent to false) since the JZ4740 UDC is not OTG compatible. Then ``num_eps`` (line 5) defines the number of USB endpoints of the controller hardware, including endpoint 0: here we have 3 endpoints + endpoint 0. Next is ``ram_bits`` (line 7) which is the width of the RAM address bus for the MUSB controller hardware. This information is needed when the controller driver cannot automatically configure endpoints by reading the relevant controller hardware registers. This issue will be discussed when we get to device quirks in :ref:`musb-dev-quirks`. Last two fields (line 8 and 9) are also about device quirks: ``fifo_cfg`` points to the USB endpoints configuration table and ``fifo_cfg_size`` keeps track of the size of the number of entries in that configuration table. More on that later in :ref:`musb-dev-quirks`.”h]”(hŒªDefining the OTG capability of the controller hardware, the multipoint member (line 3) is set to 0 (equivalent to false) since the JZ4740 UDC is not OTG compatible. Then ”…”�”}”(hjŒ h²hh³Nh´NubjC)�”}”(hŒ ``num_eps``”h]”hŒnum_eps”…”�”}”(hj” h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjŒ ubhŒ� (line 5) defines the number of USB endpoints of the controller hardware, including endpoint 0: here we have 3 endpoints + endpoint 0. Next is ”…”�”}”(hjŒ h²hh³Nh´NubjC)�”}”(hŒ ``ram_bits``”h]”hŒram_bits”…”�”}”(hj¦ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjŒ ubhX) (line 7) which is the width of the RAM address bus for the MUSB controller hardware. This information is needed when the controller driver cannot automatically configure endpoints by reading the relevant controller hardware registers. This issue will be discussed when we get to device quirks in ”…”�”•a}”(hjŒ h²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-dev-quirks`”h]”jÃ)�”}”(hjº h]”hŒmusb-dev-quirks”…”�”}”(hj¼ h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj¸ ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jÆ Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒmusb-dev-quirks”uh1hh³hÊh´M hjŒ ubhŒ?. Last two fields (line 8 and 9) are also about device quirks: ”…”�”}”(hjŒ h²hh³Nh´NubjC)�”}”(hŒ ``fifo_cfg``”h]”hŒfifo_cfg”…”�”}”(hjÜ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjŒ ubhŒ5 points to the USB endpoints configuration table and ”…”�”}”(hjŒ h²hh³Nh´NubjC)�”}”(hŒ``fifo_cfg_size``”h]”hŒ fifo_cfg_size”…”�”}”(hjî h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjŒ ubhŒe keeps track of the size of the number of entries in that configuration table. More on that later in ”…”�”}”(hjŒ h²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-dev-quirks`”h]”jÃ)�”}”(hj h]”hŒmusb-dev-quirks”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”j Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒmusb-dev-quirks”uh1hh³hÊh´M hjŒ ubhŒ.”…”�”}”(hjŒ h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M hj„h²hubhì)�”}”(hX\Then this configuration is embedded inside ``jz4740_musb_platform_data`` :c:type:`musb_hdrc_platform_data` structure (line 11): config is a pointer to the configuration structure itself, and mode tells the controller driver if the controller hardware may be used as ``MUSB_HOST`` only, ``MUSB_PERIPHERAL`` only or ``MUSB_OTG`` which is a dual mode.”h]”(hŒ+Then this configuration is embedded inside ”…”�”}”(hj* h²hh³Nh´NubjC)�”}”(hŒ``jz4740_musb_platform_data``”h]”hŒjz4740_musb_platform_data”…”�”}”(hj2 h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj* ubhŒ ”…”�”}”(hj* h²hh³Nh´Nubh)�”}”(hŒ!:c:type:`musb_hdrc_platform_data`”h]”jC)�”}”(hjF h]”hŒmusb_hdrc_platform_data”…”�”}”(hjH h²hh³Nh´Nubah}”(h]”h ]”(jõjöŒc-type”eh"]”h$]”h&]”uh1jBhjD ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jöŒreftype”Œtype”Œ refexplicit”‰Œrefwarn”‰jŒmusb_hdrc_platform_data”uh1hh³hÊh´M/hj* ubhŒ  structure (line 11): config is a pointer to the configuration structure itself, and mode tells the controller driver if the controller hardware may be used as ”…”�”}”(hj* h²hh³Nh´NubjC)�”}”(hŒ ``MUSB_HOST``”h]”hŒ MUSB_HOST”…”�”}”(hjg h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj* ubhŒ only, ”…”�”}”(hj* h²hh³Nh´NubjC)�”}”(hŒ``MUSB_PERIPHERAL``”h]”hŒMUSB_PERIPHERAL”…”�”}”(hjy h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj* ubhŒ only or ”…”�”}”(hj* h²hh³Nh´NubjC)�”}”(hŒ ``MUSB_OTG``”h]”hŒMUSB_OTG”…”�”}”(hj‹ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj* ubhŒ which is a dual mode.”…”�”}”(hj* h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M/hj„h²hubhì)�”}”(hŒ™Remember that ``jz4740_musb_platform_data`` is then used to convey platform data information as we have seen in the probe function in :ref:`musb-basics`.”h]”(hŒRemember that ”…”�”}”(hj£ h²hh³Nh´NubjC)�”}”(hŒ``jz4740_musb_platform_data``”h]”hŒjz4740_musb_platform_data”…”�”}”(hj« h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj£ ubhŒ[ is then used to convey platform data information as we have seen in the probe function in ”…”�”}”(hj£ h²hh³Nh´Nubh)�”}”(hŒ:ref:`musb-basics`”h]”jÃ)�”}”(hj¿ h]”hŒ musb-basics”…”�”}”(hjÁ h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj½ ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”jË Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆjŒ musb-basics”uh1hh³hÊh´M5hj£ ubhŒ.”…”�”}”(hj£ h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M5hj„h²hubjo)�”}”(hŒ.. _musb-dev-quirks:”h]”h}”(h]”h ]”h"]”h$]”h&]”jzŒmusb-dev-quirks”uh1jnh´M9hj„h²hh³hÊubeh}”(h]”(Œdevice-platform-data”jxeh ]”h"]”(Œdevice platform data”Œmusb-dev-platform-data”eh$]”h&]”uh1hµhh·h²hh³hÊh´M¤j~}”jø jnsj€}”jxjnsubh¶)�”}”(hhh]”(h»)�”}”(hŒ Device Quirks”h]”hŒ Device Quirks”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjý h²hh³hÊh´M<ubhì)�”}”(hX(Completing the platform data specific to your device, you may also need to write some code in the glue layer to work around some device specific limitations. These quirks may be due to some hardware bugs, or simply be the result of an incomplete implementation of the USB On-the-Go specification.”h]”hX(Completing the platform data specific to your device, you may also need to write some code in the glue layer to work around some device specific limitations. These quirks may be due to some hardware bugs, or simply be the result of an incomplete implementation of the USB On-the-Go specification.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M>hjý h²hubhì)�”}”(hŒ³The JZ4740 UDC exhibits such quirks, some of which we will discuss here for the sake of insight even though these might not be found in the controller hardware you are working on.”h]”hŒ³The JZ4740 UDC exhibits such quirks, some of which we will discuss here for the sake of insight even though these might not be found in the controller hardware you are working on.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MDhjý h²hubhì)�”}”(hŒ*Let's get back to the init function first:”h]”hŒ,Let’s get back to the init function first:”…”�”}”(hj* h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MHhjý h²hubj9)�”}”(hXÙ.. code-block:: c :emphasize-lines: 12 static int jz4740_musb_init(struct musb *musb) { musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); if (!musb->xceiv) { pr_err("HS UDC: no transceiver configured\n"); return -ENODEV; } /* Silicon does not implement ConfigData register. * Set dyn_fifo to avoid reading EP config from hardware. */ musb->dyn_fifo = true; musb->isr = jz4740_musb_interrupt; return 0; } ”h]”j²)�”}”(hX¡static int jz4740_musb_init(struct musb *musb) { musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); if (!musb->xceiv) { pr_err("HS UDC: no transceiver configured\n"); return -ENODEV; } /* Silicon does not implement ConfigData register. * Set dyn_fifo to avoid reading EP config from hardware. */ musb->dyn_fifo = true; musb->isr = jz4740_musb_interrupt; return 0; }”h]”hX¡static int jz4740_musb_init(struct musb *musb) { musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); if (!musb->xceiv) { pr_err("HS UDC: no transceiver configured\n"); return -ENODEV; } /* Silicon does not implement ConfigData register. * Set dyn_fifo to avoid reading EP config from hardware. */ musb->dyn_fifo = true; musb->isr = jz4740_musb_interrupt; return 0; }”…”�”}”hj< sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”K asuh1j±h³hÊh´MJhj8 ubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´MJhjý h²hubhì)�”}”(hŒ°Instruction on line 12 helps the MUSB controller driver to work around the fact that the controller hardware is missing registers that are used for USB endpoints configuration.”h]”hŒ°Instruction on line 12 helps the MUSB controller driver to work around the fact that the controller hardware is missing registers that are used for USB endpoints configuration.”…”�”}”(hjR h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M_hjý h²hubhì)�”}”(hXWithout these registers, the controller driver is unable to read the endpoints configuration from the hardware, so we use line 12 instruction to bypass reading the configuration from silicon, and rely on a hard-coded table that describes the endpoints configuration instead::”h]”hXWithout these registers, the controller driver is unable to read the endpoints configuration from the hardware, so we use line 12 instruction to bypass reading the configuration from silicon, and rely on a hard-coded table that describes the endpoints configuration instead:”…”�”}”(hj` h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mchjý h²hubj²)�”}”(hŒõstatic const struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = { { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, }, };”h]”hŒõstatic const struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = { { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, }, };”…”�”}”hjn sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂuh1j±h³hÊh´Mhhjý h²hubhì)�”}”(hX³Looking at the configuration table above, we see that each endpoints is described by three fields: ``hw_ep_num`` is the endpoint number, style is its direction (either ``FIFO_TX`` for the controller driver to send packets in the controller hardware, or ``FIFO_RX`` to receive packets from hardware), and maxpacket defines the maximum size of each data packet that can be transmitted over that endpoint. Reading from the table, the controller driver knows that endpoint 1 can be used to send and receive USB data packets of 512 bytes at once (this is in fact a bulk in/out endpoint), and endpoint 2 can be used to send data packets of 64 bytes at once (this is in fact an interrupt endpoint).”h]”(hŒcLooking at the configuration table above, we see that each endpoints is described by three fields: ”…”�”}”(hj| h²hh³Nh´NubjC)�”}”(hŒ ``hw_ep_num``”h]”hŒ hw_ep_num”…”�”}”(hj„ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj| ubhŒ8 is the endpoint number, style is its direction (either ”…”�”}”(hj| h²hh³Nh´NubjC)�”}”(hŒ ``FIFO_TX``”h]”hŒFIFO_TX”…”�”}”(hj– h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj| ubhŒJ for the controller driver to send packets in the controller hardware, or ”…”�”}”(hj| h²hh³Nh´NubjC)�”}”(hŒ ``FIFO_RX``”h]”hŒFIFO_RX”…”�”}”(hj¨ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj| ubhX« to receive packets from hardware), and maxpacket defines the maximum size of each data packet that can be transmitted over that endpoint. Reading from the table, the controller driver knows that endpoint 1 can be used to send and receive USB data packets of 512 bytes at once (this is in fact a bulk in/out endpoint), and endpoint 2 can be used to send data packets of 64 bytes at once (this is in fact an interrupt endpoint).”…”�”}”(hj| h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Mnhjý h²hubhì)�”}”(hXNote that there is no information about endpoint 0 here: that one is implemented by default in every silicon design, with a predefined configuration according to the USB specification. For more examples of endpoint configuration tables, see ``musb_core.c``.”h]”(hŒñNote that there is no information about endpoint 0 here: that one is implemented by default in every silicon design, with a predefined configuration according to the USB specification. For more examples of endpoint configuration tables, see ”…”�”}”(hjÀ h²hh³Nh´NubjC)�”}”(hŒ``musb_core.c``”h]”hŒ musb_core.c”…”�”}”(hjÈ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÀ ubhŒ.”…”�”}”(hjÀ h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´Myhjý h²hubhì)�”}”(hŒ5Let's now get back to the interrupt handler function:”h]”hŒ7Let’s now get back to the interrupt handler function:”…”�”}”(hjà h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M~hjý h²hubj9)�”}”(hX‹.. code-block:: c :emphasize-lines: 18-19 static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; spin_lock_irqsave(&musb->lock, flags); musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); /* * The controller is gadget only, the state of the host mode IRQ bits is * undefined. Mask them to make sure that the musb driver core will * never see them set */ musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME | MUSB_INTR_RESET | MUSB_INTR_SOF; if (musb->int_usb || musb->int_tx || musb->int_rx) retval = musb_interrupt(musb); spin_unlock_irqrestore(&musb->lock, flags); return retval; } ”h]”j²)�”}”(hXIstatic irqreturn_t jz4740_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; spin_lock_irqsave(&musb->lock, flags); musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); /* * The controller is gadget only, the state of the host mode IRQ bits is * undefined. Mask them to make sure that the musb driver core will * never see them set */ musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME | MUSB_INTR_RESET | MUSB_INTR_SOF; if (musb->int_usb || musb->int_tx || musb->int_rx) retval = musb_interrupt(musb); spin_unlock_irqrestore(&musb->lock, flags); return retval; }”h]”hXIstatic irqreturn_t jz4740_musb_interrupt(int irq, void *__hci) { unsigned long flags; irqreturn_t retval = IRQ_NONE; struct musb *musb = __hci; spin_lock_irqsave(&musb->lock, flags); musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); /* * The controller is gadget only, the state of the host mode IRQ bits is * undefined. Mask them to make sure that the musb driver core will * never see them set */ musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME | MUSB_INTR_RESET | MUSB_INTR_SOF; if (musb->int_usb || musb->int_tx || musb->int_rx) retval = musb_interrupt(musb); spin_unlock_irqrestore(&musb->lock, flags); return retval; }”…”�”}”hjò sbah}”(h]”h ]”h"]”h$]”h&]”jÁjÂj´‰jµjöj¶}”j¸]”(KKesuh1j±h³hÊh´M€hjî ubah}”(h]”h ]”h"]”h$]”h&]”uh1j8h³hÊh´M€hjý h²hubhì)�”}”(hXInstruction on line 18 above is a way for the controller driver to work around the fact that some interrupt bits used for USB host mode operation are missing in the ``MUSB_INTRUSB`` register, thus left in an undefined hardware state, since this MUSB controller hardware is used in peripheral mode only. As a consequence, the glue layer masks these missing bits out to avoid parasite interrupts by doing a logical AND operation between the value read from ``MUSB_INTRUSB`` and the bits that are actually implemented in the register.”h]”(hŒ¥Instruction on line 18 above is a way for the controller driver to work around the fact that some interrupt bits used for USB host mode operation are missing in the ”…”�”}”(hj h²hh³Nh´NubjC)�”}”(hŒ``MUSB_INTRUSB``”h]”hŒ MUSB_INTRUSB”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj ubhX register, thus left in an undefined hardware state, since this MUSB controller hardware is used in peripheral mode only. As a consequence, the glue layer masks these missing bits out to avoid parasite interrupts by doing a logical AND operation between the value read from ”…”�”}”(hj h²hh³Nh´NubjC)�”}”(hŒ``MUSB_INTRUSB``”h]”hŒ MUSB_INTRUSB”…”�”}”(hj" h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj ubhŒ< and the bits that are actually implemented in the register.”…”�”}”(hj h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MŸhjý h²hubhì)�”}”(hŒÿThese are only a couple of the quirks found in the JZ4740 USB device controller. Some others were directly addressed in the MUSB core since the fixes were generic enough to provide a better handling of the issues for others controller hardware eventually.”h]”hŒÿThese are only a couple of the quirks found in the JZ4740 USB device controller. Some others were directly addressed in the MUSB core since the fixes were generic enough to provide a better handling of the issues for others controller hardware eventually.”…”�”}”(hj: h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M¨hjý h²hubeh}”(h]”(Œ device-quirks”jñ eh ]”h"]”(Œ device quirks”Œmusb-dev-quirks”eh$]”h&]”uh1hµhh·h²hh³hÊh´M<j~}”jN jç sj€}”jñ jç subh¶)�”}”(hhh]”(h»)�”}”(hŒ Conclusion”h]”hŒ Conclusion”…”�”}”(hjV h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjS h²hh³hÊh´M®ubhì)�”}”(hŒˆWriting a Linux MUSB glue layer should be a more accessible task, as this documentation tries to show the ins and outs of this exercise.”h]”hŒˆWriting a Linux MUSB glue layer should be a more accessible task, as this documentation tries to show the ins and outs of this exercise.”…”�”}”(hjd h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M°hjS h²hubhì)�”}”(hXXThe JZ4740 USB device controller being fairly simple, I hope its glue layer serves as a good example for the curious mind. Used with the current MUSB glue layers, this documentation should provide enough guidance to get started; should anything gets out of hand, the linux-usb mailing list archive is another helpful resource to browse through.”h]”hXXThe JZ4740 USB device controller being fairly simple, I hope its glue layer serves as a good example for the curious mind. Used with the current MUSB glue layers, this documentation should provide enough guidance to get started; should anything gets out of hand, the linux-usb mailing list archive is another helpful resource to browse through.”…”�”}”(hjr h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M³hjS h²hubeh}”(h]”Œ conclusion”ah ]”h"]”Œ conclusion”ah$]”h&]”uh1hµhh·h²hh³hÊh´M®ubh¶)�”}”(hhh]”(h»)�”}”(hŒAcknowledgements”h]”hŒAcknowledgements”…”�”}”(hj‹ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjˆ h²hh³hÊh´Mºubhì)�”}”(hŒ´Many thanks to Lars-Peter Clausen and Maarten ter Huurne for answering my questions while I was writing the JZ4740 glue layer and for helping me out getting the code in good shape.”h]”hŒ´Many thanks to Lars-Peter Clausen and Maarten ter Huurne for answering my questions while I was writing the JZ4740 glue layer and for helping me out getting the code in good shape.”…”�”}”(hj™ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´M¼hjˆ h²hubhì)�”}”(hŒdI would also like to thank the Qi-Hardware community at large for its cheerful guidance and support.”h]”hŒdI would also like to thank the Qi-Hardware community at large for its cheerful guidance and support.”…”�”}”(hj§ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MÀhjˆ h²hubeh}”(h]”Œacknowledgements”ah ]”h"]”Œacknowledgements”ah$]”h&]”uh1hµhh·h²hh³hÊh´Mºubh¶)�”}”(hhh]”(h»)�”}”(hŒ Resources”h]”hŒ Resources”…”�”}”(hjÀ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj½ h²hh³hÊh´MÄubhì)�”}”(hŒ"USB Home Page: https://www.usb.org”h]”(hŒUSB Home Page: ”…”�”}”(hjÎ h²hh³Nh´NubhŒ reference”“”)�”}”(hŒhttps://www.usb.org”h]”hŒhttps://www.usb.org”…”�”}”(hjØ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jÚ uh1jÖ hjÎ ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MÆhj½ h²hubhì)�”}”(hŒBlinux-usb Mailing List Archives: https://lore.kernel.org/linux-usb”h]”(hŒ!linux-usb Mailing List Archives: ”…”�”}”(hjí h²hh³Nh´Nubj× )�”}”(hŒ!https://lore.kernel.org/linux-usb”h]”hŒ!https://lore.kernel.org/linux-usb”…”�”}”(hjõ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j÷ uh1jÖ hjí ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MÈhj½ h²hubhì)�”}”(hŒQUSB On-the-Go Basics: https://www.maximintegrated.com/app-notes/index.mvp/id/1822”h]”(hŒUSB On-the-Go Basics: ”…”�”}”(hj h²hh³Nh´Nubj× )�”}”(hŒ;https://www.maximintegrated.com/app-notes/index.mvp/id/1822”h]”hŒ;https://www.maximintegrated.com/app-notes/index.mvp/id/1822”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”juh1jÖ hj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MÊhj½ h²hubhì)�”}”(hŒ6:ref:`Writing USB Device Drivers `”h]”h)�”}”(hj)h]”jÃ)�”}”(hj)h]”hŒWriting USB Device Drivers”…”�”}”(hj.h²hh³Nh´Nubah}”(h]”h ]”(jõŒstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂhj+ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jŒ refdomain”j8Œreftype”Œref”Œ refexplicit”ˆŒrefwarn”ˆjŒwriting-usb-driver”uh1hh³hÊh´MÍhj'ubah}”(h]”h ]”h"]”h$]”h&]”uh1hëh³hÊh´MÍhj½ h²hubhì)�”}”(hŒ�Texas Instruments USB Configuration Wiki Page: https://web.archive.org/web/20201215135015/http://processors.wiki.ti.com/index.php/Usbgeneralpage”h]”(hŒ/Texas Instruments USB Configuration Wiki Page: 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