€•nHŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ(/translations/zh_CN/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/zh_TW/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/it_IT/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/ja_JP/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/ko_KR/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/pt_BR/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/sp_SP/driver-api/switchtec”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒLinux Switchtec Support”h]”hŒLinux Switchtec Support”…””}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³ŒB/var/lib/git/docbuild/linux/Documentation/driver-api/switchtec.rst”h´KubhŒ paragraph”“”)”}”(hŒúMicrosemi's "Switchtec" line of PCI switch devices is already supported by the kernel with standard PCI switch drivers. However, the Switchtec device advertises a special management endpoint which enables some additional functionality. This includes:”h]”hXMicrosemi’s “Switchtec†line of PCI switch devices is already supported by the kernel with standard PCI switch drivers. However, the Switchtec device advertises a special management endpoint which enables some additional functionality. This includes:”…””}”(hhÍh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khh·h²hubhŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒPacket and Byte Counters”h]”hÌ)”}”(hhäh]”hŒPacket and Byte Counters”…””}”(hhæh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K hhâubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhhÝh²hh³hÊh´Nubhá)”}”(hŒFirmware Upgrades”h]”hÌ)”}”(hhûh]”hŒFirmware Upgrades”…””}”(hhýh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K hhùubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhhÝh²hh³hÊh´Nubhá)”}”(hŒEvent and Error logs”h]”hÌ)”}”(hjh]”hŒEvent and Error logs”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K hjubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhhÝh²hh³hÊh´Nubhá)”}”(hŒQuerying port link status”h]”hÌ)”}”(hj)h]”hŒQuerying port link status”…””}”(hj+h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K hj'ubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhhÝh²hh³hÊh´Nubhá)”}”(hŒCustom user firmware commands ”h]”hÌ)”}”(hŒCustom user firmware commands”h]”hŒCustom user firmware commands”…””}”(hjBh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khj>ubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhhÝh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hÛh³hÊh´K hh·h²hubhÌ)”}”(hŒ:The switchtec kernel module implements this functionality.”h]”hŒ:The switchtec kernel module implements this functionality.”…””}”(hj^h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khh·h²hubh¶)”}”(hhh]”(h»)”}”(hŒ Interface”h]”hŒ Interface”…””}”(hjoh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjlh²hh³hÊh´KubhÌ)”}”(hX”The primary means of communicating with the Switchtec management firmware is through the Memory-mapped Remote Procedure Call (MRPC) interface. Commands are submitted to the interface with a 4-byte command identifier and up to 1KB of command specific data. The firmware will respond with a 4-byte return code and up to 1KB of command-specific data. The interface only processes a single command at a time.”h]”hX”The primary means of communicating with the Switchtec management firmware is through the Memory-mapped Remote Procedure Call (MRPC) interface. Commands are submitted to the interface with a 4-byte command identifier and up to 1KB of command specific data. The firmware will respond with a 4-byte return code and up to 1KB of command-specific data. The interface only processes a single command at a time.”…””}”(hj}h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjlh²hubeh}”(h]”Œ interface”ah ]”h"]”Œ interface”ah$]”h&]”uh1hµhh·h²hh³hÊh´Kubh¶)”}”(hhh]”(h»)”}”(hŒUserspace Interface”h]”hŒUserspace Interface”…””}”(hj–h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj“h²hh³hÊh´KubhÌ)”}”(hŒŽThe MRPC interface will be exposed to userspace through a simple char device: /dev/switchtec#, one for each management endpoint in the system.”h]”hŒŽThe MRPC interface will be exposed to userspace through a simple char device: /dev/switchtec#, one for each management endpoint in the system.”…””}”(hj¤h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K!hj“h²hubhÌ)”}”(hŒ,The char device has the following semantics:”h]”hŒ,The char device has the following semantics:”…””}”(hj²h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K$hj“h²hubhÜ)”}”(hhh]”(há)”}”(hŒóA write must consist of at least 4 bytes and no more than 1028 bytes. The first 4 bytes will be interpreted as the Command ID and the remainder will be used as the input data. A write will send the command to the firmware to begin processing. ”h]”hÌ)”}”(hŒòA write must consist of at least 4 bytes and no more than 1028 bytes. The first 4 bytes will be interpreted as the Command ID and the remainder will be used as the input data. A write will send the command to the firmware to begin processing.”h]”hŒòA write must consist of at least 4 bytes and no more than 1028 bytes. The first 4 bytes will be interpreted as the Command ID and the remainder will be used as the input data. A write will send the command to the firmware to begin processing.”…””}”(hjÇh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K&hjÃubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhjÀh²hh³hÊh´Nubhá)”}”(hŒ˜Each write must be followed by exactly one read. Any double write will produce an error and any read that doesn't follow a write will produce an error. ”h]”hÌ)”}”(hŒ—Each write must be followed by exactly one read. Any double write will produce an error and any read that doesn't follow a write will produce an error.”h]”hŒ™Each write must be followed by exactly one read. Any double write will produce an error and any read that doesn’t follow a write will produce an error.”…””}”(hjßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K+hjÛubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhjÀh²hh³hÊh´Nubhá)”}”(hXA read will block until the firmware completes the command and return the 4-byte Command Return Value plus up to 1024 bytes of output data. (The length will be specified by the size parameter of the read call -- reading less than 4 bytes will produce an error.) ”h]”hÌ)”}”(hXA read will block until the firmware completes the command and return the 4-byte Command Return Value plus up to 1024 bytes of output data. (The length will be specified by the size parameter of the read call -- reading less than 4 bytes will produce an error.)”h]”hXA read will block until the firmware completes the command and return the 4-byte Command Return Value plus up to 1024 bytes of output data. (The length will be specified by the size parameter of the read call -- reading less than 4 bytes will produce an error.)”…””}”(hj÷h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K/hjóubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhjÀh²hh³hÊh´Nubhá)”}”(hŒˆThe poll call will also be supported for userspace applications that need to do other things while waiting for the command to complete. ”h]”hÌ)”}”(hŒ‡The poll call will also be supported for userspace applications that need to do other things while waiting for the command to complete.”h]”hŒ‡The poll call will also be supported for userspace applications that need to do other things while waiting for the command to complete.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K4hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhjÀh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j\j]uh1hÛh³hÊh´K&hj“h²hubhÌ)”}”(hŒ6The following IOCTLs are also supported by the device:”h]”hŒ6The following IOCTLs are also supported by the device:”…””}”(hj)h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K7hj“h²hubhÜ)”}”(hhh]”(há)”}”(hŒ^SWITCHTEC_IOCTL_FLASH_INFO - Retrieve firmware length and number of partitions in the device. ”h]”hÌ)”}”(hŒ]SWITCHTEC_IOCTL_FLASH_INFO - Retrieve firmware length and number of partitions in the device.”h]”hŒ]SWITCHTEC_IOCTL_FLASH_INFO - Retrieve firmware length and number of partitions in the device.”…””}”(hj>h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K9hj:ubah}”(h]”h ]”h"]”h$]”h&]”uh1hàhj7h²hh³hÊh´Nubhá)”}”(hŒeSWITCHTEC_IOCTL_FLASH_PART_INFO - Retrieve address and lengeth for any specified partition in flash. ”h]”hÌ)”}”(hŒdSWITCHTEC_IOCTL_FLASH_PART_INFO - Retrieve address and lengeth for any specified partition in flash.”h]”hŒdSWITCHTEC_IOCTL_FLASH_PART_INFO - Retrieve address and lengeth for any specified partition in flash.”…””}”(hjVh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kjjj½jºj9j6uŒ nametypes”}”(jA‰j‰j½‰j9‰uh}”(j>h·jjljºj“j6jÀuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.