€•oŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ-/translations/zh_CN/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ-/translations/zh_TW/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ-/translations/it_IT/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ-/translations/ja_JP/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ-/translations/ko_KR/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ-/translations/pt_BR/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ-/translations/sp_SP/driver-api/rapidio/tsi721”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒIRapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.”h]”hŒIRapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.”…””}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³ŒG/var/lib/git/docbuild/linux/Documentation/driver-api/rapidio/tsi721.rst”h´Kubh¶)”}”(hhh]”(h»)”}”(hŒ 1. Overview”h]”hŒ 1. Overview”…””}”(hhÎh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhhËh²hh³hÊh´KubhŒ paragraph”“”)”}”(hŒàThis driver implements all currently defined RapidIO mport callback functions. It supports maintenance read and write operations, inbound and outbound RapidIO doorbells, inbound maintenance port-writes and RapidIO messaging.”h]”hŒàThis driver implements all currently defined RapidIO mport callback functions. It supports maintenance read and write operations, inbound and outbound RapidIO doorbells, inbound maintenance port-writes and RapidIO messaging.”…””}”(hhÞh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KhhËh²hubhÝ)”}”(hŒàTo generate SRIO maintenance transactions this driver uses one of Tsi721 DMA channels. This mechanism provides access to larger range of hop counts and destination IDs without need for changes in outbound window translation.”h]”hŒàTo generate SRIO maintenance transactions this driver uses one of Tsi721 DMA channels. This mechanism provides access to larger range of hop counts and destination IDs without need for changes in outbound window translation.”…””}”(hhìh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K hhËh²hubhÝ)”}”(hX?RapidIO messaging support uses dedicated messaging channels for each mailbox. For inbound messages this driver uses destination ID matching to forward messages into the corresponding message queue. Messaging callbacks are implemented to be fully compatible with RIONET driver (Ethernet over RapidIO messaging services).”h]”hX?RapidIO messaging support uses dedicated messaging channels for each mailbox. For inbound messages this driver uses destination ID matching to forward messages into the corresponding message queue. Messaging callbacks are implemented to be fully compatible with RIONET driver (Ethernet over RapidIO messaging services).”…””}”(hhúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KhhËh²hubhŒenumerated_list”“”)”}”(hhh]”hŒ list_item”“”)”}”(hŒModule parameters: ”h]”hÝ)”}”(hŒModule parameters:”h]”hŒModule parameters:”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj h²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1jhhËh²hh³hÊh´KubhŒ bullet_list”“”)”}”(hhh]”(j)”}”(hX¼'dbg_level' - This parameter allows to control amount of debug information generated by this device driver. This parameter is formed by set of This parameter can be changed bit masks that correspond to the specific functional block. For mask definitions see 'drivers/rapidio/devices/tsi721.h' This parameter can be changed dynamically. Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level. ”h]”hŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hX 'dbg_level' - This parameter allows to control amount of debug information generated by this device driver. This parameter is formed by set of This parameter can be changed bit masks that correspond to the specific functional block. For mask definitions see 'drivers/rapidio/devices/tsi721.h' This parameter can be changed dynamically. Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level. ”h]”(hŒterm”“”)”}”(hŒ 'dbg_level'”h]”hŒ‘dbg_level’”…””}”(hjHh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´KhjBubhŒ definition”“”)”}”(hhh]”j3)”}”(hhh]”j)”}”(hX†This parameter allows to control amount of debug information generated by this device driver. This parameter is formed by set of This parameter can be changed bit masks that correspond to the specific functional block. For mask definitions see 'drivers/rapidio/devices/tsi721.h' This parameter can be changed dynamically. Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level. ”h]”hÝ)”}”(hX…This parameter allows to control amount of debug information generated by this device driver. This parameter is formed by set of This parameter can be changed bit masks that correspond to the specific functional block. For mask definitions see 'drivers/rapidio/devices/tsi721.h' This parameter can be changed dynamically. Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level.”h]”hX‰This parameter allows to control amount of debug information generated by this device driver. This parameter is formed by set of This parameter can be changed bit masks that correspond to the specific functional block. For mask definitions see ‘drivers/rapidio/devices/tsi721.h’ This parameter can be changed dynamically. Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level.”…””}”(hjbh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´Khj^ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj[ubah}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j2h³hÊh´KhjXubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjBubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´Khj=ubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hj7ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj4h²hh³Nh´Nubj)”}”(hŒ²'dma_desc_per_channel' - This parameter defines number of hardware buffer descriptors allocated for each registered Tsi721 DMA channel. Its default value is 128. ”h]”j<)”}”(hhh]”jA)”}”(hŒ¦'dma_desc_per_channel' - This parameter defines number of hardware buffer descriptors allocated for each registered Tsi721 DMA channel. Its default value is 128. ”h]”(jG)”}”(hŒ'dma_desc_per_channel'”h]”hŒ‘dma_desc_per_channel’”…””}”(hj¡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´K#hjubjW)”}”(hhh]”j3)”}”(hhh]”j)”}”(hŒ‰This parameter defines number of hardware buffer descriptors allocated for each registered Tsi721 DMA channel. Its default value is 128. ”h]”hÝ)”}”(hŒˆThis parameter defines number of hardware buffer descriptors allocated for each registered Tsi721 DMA channel. Its default value is 128.”h]”hŒˆThis parameter defines number of hardware buffer descriptors allocated for each registered Tsi721 DMA channel. Its default value is 128.”…””}”(hj¹h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K!hjµubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj²ubah}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´K!hj¯ubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´K#hjšubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hj–ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj4h²hh³Nh´Nubj)”}”(hŒ®'dma_txqueue_sz' - DMA transactions queue size. Defines number of pending transaction requests that can be accepted by each DMA channel. Default value is 16. ”h]”j<)”}”(hhh]”jA)”}”(hŒ¢'dma_txqueue_sz' - DMA transactions queue size. Defines number of pending transaction requests that can be accepted by each DMA channel. Default value is 16. ”h]”(jG)”}”(hŒ'dma_txqueue_sz'”h]”hŒ‘dma_txqueue_sz’”…””}”(hjöh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´K(hjòubjW)”}”(hhh]”j3)”}”(hhh]”j)”}”(hŒ‹DMA transactions queue size. Defines number of pending transaction requests that can be accepted by each DMA channel. Default value is 16. ”h]”hÝ)”}”(hŒŠDMA transactions queue size. Defines number of pending transaction requests that can be accepted by each DMA channel. Default value is 16.”h]”hŒŠDMA transactions queue size. Defines number of pending transaction requests that can be accepted by each DMA channel. Default value is 16.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K&hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjubah}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´K&hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjòubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´K(hjïubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hjëubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj4h²hh³Nh´Nubj)”}”(hXf'dma_sel' - DMA channel selection mask. Bitmask that defines which hardware DMA channels (0 ... 6) will be registered with DmaEngine core. If bit is set to 1, the corresponding DMA channel will be registered. DMA channels not selected by this mask will not be used by this device driver. Default value is 0x7f (use all channels). ”h]”j<)”}”(hhh]”jA)”}”(hXR'dma_sel' - DMA channel selection mask. Bitmask that defines which hardware DMA channels (0 ... 6) will be registered with DmaEngine core. If bit is set to 1, the corresponding DMA channel will be registered. DMA channels not selected by this mask will not be used by this device driver. Default value is 0x7f (use all channels). ”h]”(jG)”}”(hŒ 'dma_sel'”h]”hŒ ‘dma_sel’”…””}”(hjKh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´K/hjGubjW)”}”(hhh]”j3)”}”(hhh]”j)”}”(hX>DMA channel selection mask. Bitmask that defines which hardware DMA channels (0 ... 6) will be registered with DmaEngine core. If bit is set to 1, the corresponding DMA channel will be registered. DMA channels not selected by this mask will not be used by this device driver. Default value is 0x7f (use all channels). ”h]”hÝ)”}”(hX=DMA channel selection mask. Bitmask that defines which hardware DMA channels (0 ... 6) will be registered with DmaEngine core. If bit is set to 1, the corresponding DMA channel will be registered. DMA channels not selected by this mask will not be used by this device driver. Default value is 0x7f (use all channels).”h]”hX=DMA channel selection mask. Bitmask that defines which hardware DMA channels (0 ... 6) will be registered with DmaEngine core. If bit is set to 1, the corresponding DMA channel will be registered. DMA channels not selected by this mask will not be used by this device driver. Default value is 0x7f (use all channels).”…””}”(hjch²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K+hj_ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj\ubah}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´K+hjYubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjGubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´K/hjDubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hj@ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj4h²hh³Nh´Nubj)”}”(hX²'pcie_mrrs' - override value for PCIe Maximum Read Request Size (MRRS). This parameter gives an ability to override MRRS value set during PCIe configuration process. Tsi721 supports read request sizes up to 4096B. Value for this parameter must be set as defined by PCIe specification: 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B. Default value is '-1' (= keep platform setting). ”h]”j<)”}”(hhh]”jA)”}”(hXš'pcie_mrrs' - override value for PCIe Maximum Read Request Size (MRRS). This parameter gives an ability to override MRRS value set during PCIe configuration process. Tsi721 supports read request sizes up to 4096B. Value for this parameter must be set as defined by PCIe specification: 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B. Default value is '-1' (= keep platform setting). ”h]”(jG)”}”(hŒ 'pcie_mrrs'”h]”hŒ‘pcie_mrrs’”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´K7hjœubjW)”}”(hhh]”j3)”}”(hhh]”j)”}”(hX‚override value for PCIe Maximum Read Request Size (MRRS). This parameter gives an ability to override MRRS value set during PCIe configuration process. Tsi721 supports read request sizes up to 4096B. Value for this parameter must be set as defined by PCIe specification: 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B. Default value is '-1' (= keep platform setting). ”h]”hÝ)”}”(hXoverride value for PCIe Maximum Read Request Size (MRRS). This parameter gives an ability to override MRRS value set during PCIe configuration process. Tsi721 supports read request sizes up to 4096B. Value for this parameter must be set as defined by PCIe specification: 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B. Default value is '-1' (= keep platform setting).”h]”hX…override value for PCIe Maximum Read Request Size (MRRS). This parameter gives an ability to override MRRS value set during PCIe configuration process. Tsi721 supports read request sizes up to 4096B. Value for this parameter must be set as defined by PCIe specification: 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B. Default value is ‘-1’ (= keep platform setting).”…””}”(hj¸h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K2hj´ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj±ubah}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´K2hj®ubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjœubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´K7hj™ubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hj•ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj4h²hh³Nh´Nubj)”}”(hX,'mbox_sel' - RIO messaging MBOX selection mask. This is a bitmask that defines messaging MBOXes are managed by this device driver. Mask bits 0 - 3 correspond to MBOX0 - MBOX3. MBOX is under driver's control if the corresponding bit is set to '1'. Default value is 0x0f (= all). ”h]”j<)”}”(hhh]”jA)”}”(hX'mbox_sel' - RIO messaging MBOX selection mask. This is a bitmask that defines messaging MBOXes are managed by this device driver. Mask bits 0 - 3 correspond to MBOX0 - MBOX3. MBOX is under driver's control if the corresponding bit is set to '1'. Default value is 0x0f (= all). ”h]”(jG)”}”(hŒ 'mbox_sel'”h]”hŒ‘mbox_sel’”…””}”(hjõh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´K=hjñubjW)”}”(hhh]”j3)”}”(hhh]”j)”}”(hX RIO messaging MBOX selection mask. This is a bitmask that defines messaging MBOXes are managed by this device driver. Mask bits 0 - 3 correspond to MBOX0 - MBOX3. MBOX is under driver's control if the corresponding bit is set to '1'. Default value is 0x0f (= all). ”h]”hÝ)”}”(hXRIO messaging MBOX selection mask. This is a bitmask that defines messaging MBOXes are managed by this device driver. Mask bits 0 - 3 correspond to MBOX0 - MBOX3. MBOX is under driver's control if the corresponding bit is set to '1'. Default value is 0x0f (= all).”h]”hXRIO messaging MBOX selection mask. This is a bitmask that defines messaging MBOXes are managed by this device driver. Mask bits 0 - 3 correspond to MBOX0 - MBOX3. MBOX is under driver’s control if the corresponding bit is set to ‘1’. Default value is 0x0f (= all).”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K:hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjubah}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´K:hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjñubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´K=hjîubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hjêubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj4h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´KhhËh²hubeh}”(h]”Œoverview”ah ]”h"]”Œ 1. overview”ah$]”h&]”uh1hµhh·h²hh³hÊh´Kubh¶)”}”(hhh]”(h»)”}”(hŒ2. Known problems”h]”hŒ2. Known problems”…””}”(hjPh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjMh²hh³hÊh´K@ubhŒ block_quote”“”)”}”(hŒNone. ”h]”hÝ)”}”(hŒNone.”h]”hŒNone.”…””}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KBhj`ubah}”(h]”h ]”h"]”h$]”h&]”uh1j^h³hÊh´KBhjMh²hubeh}”(h]”Œknown-problems”ah ]”h"]”Œ2. known problems”ah$]”h&]”uh1hµhh·h²hh³hÊh´K@ubh¶)”}”(hhh]”(h»)”}”(hŒ3. DMA Engine Support”h]”hŒ3. DMA Engine Support”…””}”(hjƒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj€h²hh³hÊh´KEubhÝ)”}”(hŒÚTsi721 mport driver supports DMA data transfers between local system memory and remote RapidIO devices. This functionality is implemented according to SLAVE mode API defined by common Linux kernel DMA Engine framework.”h]”hŒÚTsi721 mport driver supports DMA data transfers between local system memory and remote RapidIO devices. This functionality is implemented according to SLAVE mode API defined by common Linux kernel DMA Engine framework.”…””}”(hj‘h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KGhj€h²hubhÝ)”}”(hX3Depending on system requirements RapidIO DMA operations can be included/excluded by setting CONFIG_RAPIDIO_DMA_ENGINE option. Tsi721 miniport driver uses seven out of eight available BDMA channels to support DMA data transfers. One BDMA channel is reserved for generation of maintenance read/write requests.”h]”hX3Depending on system requirements RapidIO DMA operations can be included/excluded by setting CONFIG_RAPIDIO_DMA_ENGINE option. Tsi721 miniport driver uses seven out of eight available BDMA channels to support DMA data transfers. One BDMA channel is reserved for generation of maintenance read/write requests.”…””}”(hjŸh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KKhj€h²hubhÝ)”}”(hŒ‡If Tsi721 mport driver have been built with RAPIDIO_DMA_ENGINE support included, this driver will accept DMA-specific module parameter:”h]”hŒ‡If Tsi721 mport driver have been built with RAPIDIO_DMA_ENGINE support included, this driver will accept DMA-specific module parameter:”…””}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KPhj€h²hubj_)”}”(hŒ¯"dma_desc_per_channel" - defines number of hardware buffer descriptors used by each BDMA channel of Tsi721 (by default - 128). ”h]”j<)”}”(hhh]”jA)”}”(hŒ"dma_desc_per_channel" - defines number of hardware buffer descriptors used by each BDMA channel of Tsi721 (by default - 128). ”h]”(jG)”}”(hŒ"dma_desc_per_channel"”h]”hŒ“dma_desc_per_channel—…””}”(hjÆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jFh³hÊh´KUhjÂubjW)”}”(hhh]”j3)”}”(hhh]”j)”}”(hŒfdefines number of hardware buffer descriptors used by each BDMA channel of Tsi721 (by default - 128). ”h]”hÝ)”}”(hŒedefines number of hardware buffer descriptors used by each BDMA channel of Tsi721 (by default - 128).”h]”hŒedefines number of hardware buffer descriptors used by each BDMA channel of Tsi721 (by default - 128).”…””}”(hjÞh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KThjÚubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj×ubah}”(h]”h ]”h"]”h$]”h&]”j|j}uh1j2h³hÊh´KThjÔubah}”(h]”h ]”h"]”h$]”h&]”uh1jVhjÂubeh}”(h]”h ]”h"]”h$]”h&]”uh1j@h³hÊh´KUhj¿ubah}”(h]”h ]”h"]”h$]”h&]”uh1j;hj»ubah}”(h]”h ]”h"]”h$]”h&]”uh1j^h³hÊh´KShj€h²hubj )”}”(hhh]”j)”}”(hŒVersion History ”h]”hÝ)”}”(hŒVersion History”h]”hŒVersion History”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KWhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjh²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”j-j.j/hj0j1Œstart”Kuh1jhj€h²hh³hÊh´KWubj_)”}”(hX6===== ==================================================================== 1.1.0 DMA operations re-worked to support data scatter/gather lists larger than hardware buffer descriptors ring. 1.0.0 Initial driver release. ===== ==================================================================== ”h]”hŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j@hj=ubjA)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”KDuh1j@hj=ubhŒtbody”“”)”}”(hhh]”(hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”hÝ)”}”(hŒ1.1.0”h]”hŒ1.1.0”…””}”(hjeh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KZhjbubah}”(h]”h ]”h"]”h$]”h&]”uh1j`hj]ubja)”}”(hhh]”hÝ)”}”(hŒkDMA operations re-worked to support data scatter/gather lists larger than hardware buffer descriptors ring.”h]”hŒkDMA operations re-worked to support data scatter/gather lists larger than hardware buffer descriptors ring.”…””}”(hj|h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KZhjyubah}”(h]”h ]”h"]”h$]”h&]”uh1j`hj]ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j[hjXubj\)”}”(hhh]”(ja)”}”(hhh]”hÝ)”}”(hŒ1.0.0”h]”hŒ1.0.0”…””}”(hjœh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K\hj™ubah}”(h]”h ]”h"]”h$]”h&]”uh1j`hj–ubja)”}”(hhh]”hÝ)”}”(hŒInitial driver release.”h]”hŒInitial driver release.”…””}”(hj³h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´K\hj°ubah}”(h]”h ]”h"]”h$]”h&]”uh1j`hj–ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j[hjXubeh}”(h]”h ]”h"]”h$]”h&]”uh1jVhj=ubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1j;hj8ubah}”(h]”h ]”h"]”h$]”h&]”uh1j6hj2ubah}”(h]”h ]”h"]”h$]”h&]”uh1j^h³hÊh´KYhj€h²hubeh}”(h]”Œdma-engine-support”ah ]”h"]”Œ3. dma engine support”ah$]”h&]”uh1hµhh·h²hh³hÊh´KEubh¶)”}”(hhh]”(h»)”}”(hŒ 5. License”h]”hŒ 5. License”…””}”(hjñh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjîh²hh³hÊh´K`ubj_)”}”(hXðCopyright(c) 2011 Integrated Device Technology, Inc. All rights reserved. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.”h]”(hÝ)”}”(hŒICopyright(c) 2011 Integrated Device Technology, Inc. All rights reserved.”h]”hŒICopyright(c) 2011 Integrated Device Technology, Inc. All rights reserved.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KbhjÿubhÝ)”}”(hŒïThis program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.”h]”hŒïThis program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KdhjÿubhÝ)”}”(hŒéThis program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.”h]”hŒéThis program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´KihjÿubhÝ)”}”(hŒÉYou should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.”h]”hŒÉYou should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.”…””}”(hj-h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜh³hÊh´Knhjÿubeh}”(h]”h ]”h"]”h$]”h&]”uh1j^h³hÊh´Kbhjîh²hubeh}”(h]”Œlicense”ah ]”h"]”Œ 5. license”ah$]”h&]”uh1hµhh·h²hh³hÊh´K`ubeh}”(h]”ŒHrapidio-subsystem-mport-driver-for-idt-tsi721-pci-express-to-srio-bridge”ah ]”h"]”ŒIrapidio subsystem mport driver for idt tsi721 pci express-to-srio bridge.”ah$]”h&]”uh1hµhhh²hh³hÊh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÊuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hºNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”j`Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jsŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÊŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jNjKjJjGj}jzjëjèjFjCuŒ nametypes”}”(jN‰jJ‰j}‰jë‰jF‰uh}”(jKh·jGhËjzjMjèj€jCjîuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”hŒsystem_message”“”)”}”(hhh]”hÝ)”}”(hŒ:Enumerated list start value not ordinal-1: "4" (ordinal 4)”h]”hŒ>Enumerated list start value not ordinal-1: “4†(ordinal 4)”…””}”(hjÚh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜhj×ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”hÊŒline”Kuh1jÕhj€h²hh³hÊh´KWubaŒtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.