sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget,/translations/zh_CN/driver-api/nvdimm/nvdimmmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget,/translations/zh_TW/driver-api/nvdimm/nvdimmmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget,/translations/it_IT/driver-api/nvdimm/nvdimmmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget,/translations/ja_JP/driver-api/nvdimm/nvdimmmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget,/translations/ko_KR/driver-api/nvdimm/nvdimmmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget,/translations/sp_SP/driver-api/nvdimm/nvdimmmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hLIBNVDIMM: Non-Volatile Devicesh]hLIBNVDIMM: Non-Volatile Devices}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhF/var/lib/git/docbuild/linux/Documentation/driver-api/nvdimm/nvdimm.rsthKubh paragraph)}(h8libnvdimm - kernel / libndctl - userspace helper libraryh]h8libnvdimm - kernel / libndctl - userspace helper library}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hnvdimm@lists.linux.devh]h reference)}(hhh]hnvdimm@lists.linux.dev}(hhhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:nvdimm@lists.linux.devuh1hhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h Version 13h]h Version 13}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubhcomment)}(hXLcontents: Glossary Overview Supporting Documents Git Trees LIBNVDIMM PMEM PMEM-REGIONs, Atomic Sectors, and DAX Example NVDIMM Platform LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API LIBNDCTL: Context libndctl: instantiate a new library context example LIBNVDIMM/LIBNDCTL: Bus libnvdimm: control class device in /sys/class libnvdimm: bus libndctl: bus enumeration example LIBNVDIMM/LIBNDCTL: DIMM (NMEM) libnvdimm: DIMM (NMEM) libndctl: DIMM enumeration example LIBNVDIMM/LIBNDCTL: Region libnvdimm: region libndctl: region enumeration example Why Not Encode the Region Type into the Region Name? How Do I Determine the Major Type of a Region? LIBNVDIMM/LIBNDCTL: Namespace libnvdimm: namespace libndctl: namespace enumeration example libndctl: namespace creation example Why the Term "namespace"? LIBNVDIMM/LIBNDCTL: Block Translation Table "btt" libnvdimm: btt layout libndctl: btt creation example Summary LIBNDCTL Diagramh]hXLcontents: Glossary Overview Supporting Documents Git Trees LIBNVDIMM PMEM PMEM-REGIONs, Atomic Sectors, and DAX Example NVDIMM Platform LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API LIBNDCTL: Context libndctl: instantiate a new library context example LIBNVDIMM/LIBNDCTL: Bus libnvdimm: control class device in /sys/class libnvdimm: bus libndctl: bus enumeration example LIBNVDIMM/LIBNDCTL: DIMM (NMEM) libnvdimm: DIMM (NMEM) libndctl: DIMM enumeration example LIBNVDIMM/LIBNDCTL: Region libnvdimm: region libndctl: region enumeration example Why Not Encode the Region Type into the Region Name? How Do I Determine the Major Type of a Region? LIBNVDIMM/LIBNDCTL: Namespace libnvdimm: namespace libndctl: namespace enumeration example libndctl: namespace creation example Why the Term "namespace"? LIBNVDIMM/LIBNDCTL: Block Translation Table "btt" libnvdimm: btt layout libndctl: btt creation example Summary LIBNDCTL Diagram}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhhhK-ubh)}(hhh](h)}(hGlossaryh]hGlossary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK/ubhdefinition_list)}(hhh](hdefinition_list_item)}(hPMEM: A system-physical-address range where writes are persistent. A block device composed of PMEM is capable of DAX. A PMEM address range may span an interleave of several DIMMs. h](hterm)}(hPMEM:h]hPMEM:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK4hjubh definition)}(hhh]h)}(hA system-physical-address range where writes are persistent. A block device composed of PMEM is capable of DAX. A PMEM address range may span an interleave of several DIMMs.h]hA system-physical-address range where writes are persistent. A block device composed of PMEM is capable of DAX. A PMEM address range may span an interleave of several DIMMs.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hj0ubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhK4hjubj)}(hX!DPA: DIMM Physical Address, is a DIMM-relative offset. With one DIMM in the system there would be a 1:1 system-physical-address:DPA association. Once more DIMMs are added a memory controller interleave must be decoded to determine the DPA associated with a given system-physical-address. h](j)}(hDPA:h]hDPA:}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK;hjMubj/)}(hhh]h)}(hXDIMM Physical Address, is a DIMM-relative offset. With one DIMM in the system there would be a 1:1 system-physical-address:DPA association. Once more DIMMs are added a memory controller interleave must be decoded to determine the DPA associated with a given system-physical-address.h]hXDIMM Physical Address, is a DIMM-relative offset. With one DIMM in the system there would be a 1:1 system-physical-address:DPA association. Once more DIMMs are added a memory controller interleave must be decoded to determine the DPA associated with a given system-physical-address.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hj_ubah}(h]h ]h"]h$]h&]uh1j.hjMubeh}(h]h ]h"]h$]h&]uh1jhhhK;hjhhubj)}(hDAX: File system extensions to bypass the page cache and block layer to mmap persistent memory, from a PMEM block device, directly into a process address space. h](j)}(hDAX:h]hDAX:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK@hj|ubj/)}(hhh]h)}(hFile system extensions to bypass the page cache and block layer to mmap persistent memory, from a PMEM block device, directly into a process address space.h]hFile system extensions to bypass the page cache and block layer to mmap persistent memory, from a PMEM block device, directly into a process address space.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK>hjubah}(h]h ]h"]h$]h&]uh1j.hj|ubeh}(h]h ]h"]h$]h&]uh1jhhhK@hjhhubj)}(haDSM: Device Specific Method: ACPI method to control specific device - in this case the firmware. h](j)}(hDSM:h]hDSM:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKDhjubj/)}(hhh]h)}(h[Device Specific Method: ACPI method to control specific device - in this case the firmware.h]h[Device Specific Method: ACPI method to control specific device - in this case the firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKDhjhhubj)}(hDCR: NVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5. It defines a vendor-id, device-id, and interface format for a given DIMM. h](j)}(hDCR:h]hDCR:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKHhjubj/)}(hhh]h)}(hNVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5. It defines a vendor-id, device-id, and interface format for a given DIMM.h]hNVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5. It defines a vendor-id, device-id, and interface format for a given DIMM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhjubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKHhjhhubj)}(hXGBTT: Block Translation Table: Persistent memory is byte addressable. Existing software may have an expectation that the power-fail-atomicity of writes is at least one sector, 512 bytes. The BTT is an indirection table with atomic update semantics to front a PMEM block device driver and present arbitrary atomic sector sizes. h](j)}(hBTT:h]hBTT:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKOhj ubj/)}(hhh]h)}(hXABlock Translation Table: Persistent memory is byte addressable. Existing software may have an expectation that the power-fail-atomicity of writes is at least one sector, 512 bytes. The BTT is an indirection table with atomic update semantics to front a PMEM block device driver and present arbitrary atomic sector sizes.h]hXABlock Translation Table: Persistent memory is byte addressable. Existing software may have an expectation that the power-fail-atomicity of writes is at least one sector, 512 bytes. The BTT is an indirection table with atomic update semantics to front a PMEM block device driver and present arbitrary atomic sector sizes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1j.hj ubeh}(h]h ]h"]h$]h&]uh1jhhhKOhjhhubj)}(hXLABEL: Metadata stored on a DIMM device that partitions and identifies (persistently names) capacity allocated to different PMEM namespaces. It also indicates whether an address abstraction like a BTT is applied to the namespace. Note that traditional partition tables, GPT/MBR, are layered on top of a PMEM namespace, or an address abstraction like BTT if present, but partition support is deprecated going forward. h](j)}(hLABEL:h]hLABEL:}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKXhj8ubj/)}(hhh]h)}(hXMetadata stored on a DIMM device that partitions and identifies (persistently names) capacity allocated to different PMEM namespaces. It also indicates whether an address abstraction like a BTT is applied to the namespace. Note that traditional partition tables, GPT/MBR, are layered on top of a PMEM namespace, or an address abstraction like BTT if present, but partition support is deprecated going forward.h]hXMetadata stored on a DIMM device that partitions and identifies (persistently names) capacity allocated to different PMEM namespaces. It also indicates whether an address abstraction like a BTT is applied to the namespace. Note that traditional partition tables, GPT/MBR, are layered on top of a PMEM namespace, or an address abstraction like BTT if present, but partition support is deprecated going forward.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKRhjJubah}(h]h ]h"]h$]h&]uh1j.hj8ubeh}(h]h ]h"]h$]h&]uh1jhhhKXhjhhubeh}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]glossaryah ]h"]glossaryah$]h&]uh1hhhhhhhhK/ubh)}(hhh](h)}(hOverviewh]hOverview}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhhhhhK[ubh)}(hXbThe LIBNVDIMM subsystem provides support for PMEM described by platform firmware or a device driver. On ACPI based systems the platform firmware conveys persistent memory resource via the ACPI NFIT "NVDIMM Firmware Interface Table" in ACPI 6. While the LIBNVDIMM subsystem implementation is generic and supports pre-NFIT platforms, it was guided by the superset of capabilities need to support this ACPI 6 definition for NVDIMM resources. The original implementation supported the block-window-aperture capability described in the NFIT, but that support has since been abandoned and never shipped in a product.h]hXfThe LIBNVDIMM subsystem provides support for PMEM described by platform firmware or a device driver. On ACPI based systems the platform firmware conveys persistent memory resource via the ACPI NFIT “NVDIMM Firmware Interface Table” in ACPI 6. While the LIBNVDIMM subsystem implementation is generic and supports pre-NFIT platforms, it was guided by the superset of capabilities need to support this ACPI 6 definition for NVDIMM resources. The original implementation supported the block-window-aperture capability described in the NFIT, but that support has since been abandoned and never shipped in a product.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK]hjuhhubh)}(hhh](h)}(hSupporting Documentsh]hSupporting Documents}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKhubj)}(hhh](j)}(hGACPI 6: https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdfh](j)}(hACPI 6:h]hACPI 6:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKjhjubj/)}(hhh]h)}(h?https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdfh]h)}(hjh]h?https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubah}(h]h ]h"]h$]h&]uh1hhhhKkhjubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKjhjubj)}(hENVDIMM Namespace: https://pmem.io/documents/NVDIMM_Namespace_Spec.pdfh](j)}(hNVDIMM Namespace:h]hNVDIMM Namespace:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKlhjubj/)}(hhh]h)}(h3https://pmem.io/documents/NVDIMM_Namespace_Spec.pdfh]h)}(hjh]h3https://pmem.io/documents/NVDIMM_Namespace_Spec.pdf}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKlhjhhubj)}(hQDSM Interface Example: https://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdfh](j)}(hDSM Interface Example:h]hDSM Interface Example:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKnhjubj/)}(hhh]h)}(h:https://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdfh]h)}(hj1h]h:https://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf}(hj3hhhNhNubah}(h]h ]h"]h$]h&]refurij1uh1hhj/ubah}(h]h ]h"]h$]h&]uh1hhhhKohj,ubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKnhjhhubj)}(hQDriver Writer's Guide: https://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf h](j)}(hDriver Writer's Guide:h]hDriver Writer’s Guide:}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKqhjSubj/)}(hhh]h)}(h9https://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdfh]h)}(hjjh]h9https://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf}(hjlhhhNhNubah}(h]h ]h"]h$]h&]refurijjuh1hhjhubah}(h]h ]h"]h$]h&]uh1hhhhKqhjeubah}(h]h ]h"]h$]h&]uh1j.hjSubeh}(h]h ]h"]h$]h&]uh1jhhhKqhjhhubeh}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]supporting-documentsah ]h"]supporting documentsah$]h&]uh1hhjuhhhhhKhubh)}(hhh](h)}(h Git Treesh]h Git Trees}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKtubj)}(hhh](j)}(hILIBNVDIMM: https://git.kernel.org/cgit/linux/kernel/git/nvdimm/nvdimm.gith](j)}(h LIBNVDIMM:h]h LIBNVDIMM:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKvhjubj/)}(hhh]h)}(h>https://git.kernel.org/cgit/linux/kernel/git/nvdimm/nvdimm.gith]h)}(hjh]h>https://git.kernel.org/cgit/linux/kernel/git/nvdimm/nvdimm.git}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubah}(h]h ]h"]h$]h&]uh1hhhhKwhjubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKvhjubj)}(h-LIBNDCTL: https://github.com/pmem/ndctl.git h](j)}(h LIBNDCTL:h]h LIBNDCTL:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKzhjubj/)}(hhh]h)}(h!https://github.com/pmem/ndctl.gith]h)}(hjh]h!https://github.com/pmem/ndctl.git}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubah}(h]h ]h"]h$]h&]uh1hhhhKyhjubah}(h]h ]h"]h$]h&]uh1j.hjubeh}(h]h ]h"]h$]h&]uh1jhhhKzhjhhubeh}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h] git-treesah ]h"] git treesah$]h&]uh1hhjuhhhhhKtubeh}(h]overviewah ]h"]overviewah$]h&]uh1hhhhhhhhK[ubh)}(hhh](h)}(hLIBNVDIMM PMEMh]hLIBNVDIMM PMEM}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hhhhhK}ubh)}(hXPrior to the arrival of the NFIT, non-volatile memory was described to a system in various ad-hoc ways. Usually only the bare minimum was provided, namely, a single system-physical-address range where writes are expected to be durable after a system power loss. Now, the NFIT specification standardizes not only the description of PMEM, but also platform message-passing entry points for control and configuration.h]hXPrior to the arrival of the NFIT, non-volatile memory was described to a system in various ad-hoc ways. Usually only the bare minimum was provided, namely, a single system-physical-address range where writes are expected to be durable after a system power loss. Now, the NFIT specification standardizes not only the description of PMEM, but also platform message-passing entry points for control and configuration.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj6hhubh)}(hX*PMEM (nd_pmem.ko): Drives a system-physical-address range. This range is contiguous in system memory and may be interleaved (hardware memory controller striped) across multiple DIMMs. When interleaved the platform may optionally provide details of which DIMMs are participating in the interleave.h]hX*PMEM (nd_pmem.ko): Drives a system-physical-address range. This range is contiguous in system memory and may be interleaved (hardware memory controller striped) across multiple DIMMs. When interleaved the platform may optionally provide details of which DIMMs are participating in the interleave.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj6hhubh)}(hXuIt is worth noting that when the labeling capability is detected (a EFI namespace label index block is found), then no block device is created by default as userspace needs to do at least one allocation of DPA to the PMEM range. In contrast ND_NAMESPACE_IO ranges, once registered, can be immediately attached to nd_pmem. This latter mode is called label-less or "legacy".h]hXyIt is worth noting that when the labeling capability is detected (a EFI namespace label index block is found), then no block device is created by default as userspace needs to do at least one allocation of DPA to the PMEM range. In contrast ND_NAMESPACE_IO ranges, once registered, can be immediately attached to nd_pmem. This latter mode is called label-less or “legacy”.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj6hhubh)}(hhh](h)}(h%PMEM-REGIONs, Atomic Sectors, and DAXh]h%PMEM-REGIONs, Atomic Sectors, and DAX}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhhhhhKubh)}(hFor the cases where an application or filesystem still needs atomic sector update guarantees it can register a BTT on a PMEM device or partition. See LIBNVDIMM/NDCTL: Block Translation Table "btt"h]hFor the cases where an application or filesystem still needs atomic sector update guarantees it can register a BTT on a PMEM device or partition. See LIBNVDIMM/NDCTL: Block Translation Table “btt”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjqhhubeh}(h]#pmem-regions-atomic-sectors-and-daxah ]h"]%pmem-regions, atomic sectors, and daxah$]h&]uh1hhj6hhhhhKubeh}(h]libnvdimm-pmemah ]h"]libnvdimm pmemah$]h&]uh1hhhhhhhhK}ubh)}(hhh](h)}(hExample NVDIMM Platformh]hExample NVDIMM Platform}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hkFor the remainder of this document the following diagram will be referenced for any example sysfs layouts::h]hjFor the remainder of this document the following diagram will be referenced for any example sysfs layouts:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh literal_block)}(hXN (a) (b) DIMM +-------------------+--------+--------+--------+ +------+ | pm0.0 | free | pm1.0 | free | 0 | imc0 +--+- - - region0- - - +--------+ +--------+ +--+---+ | pm0.0 | free | pm1.0 | free | 1 | +-------------------+--------v v--------+ +--+---+ | | | cpu0 | region1 +--+---+ | | | +----------------------------^ ^--------+ +--+---+ | free | pm1.0 | free | 2 | imc1 +--+----------------------------| +--------+ +------+ | free | pm1.0 | free | 3 +----------------------------+--------+--------+h]hXN (a) (b) DIMM +-------------------+--------+--------+--------+ +------+ | pm0.0 | free | pm1.0 | free | 0 | imc0 +--+- - - region0- - - +--------+ +--------+ +--+---+ | pm0.0 | free | pm1.0 | free | 1 | +-------------------+--------v v--------+ +--+---+ | | | cpu0 | region1 +--+---+ | | | +----------------------------^ ^--------+ +--+---+ | free | pm1.0 | free | 2 | imc1 +--+----------------------------| +--------+ +------+ | free | pm1.0 | free | 3 +----------------------------+--------+--------+}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjhhubh)}(hIn this platform we have four DIMMs and two memory controllers in one socket. Each PMEM interleave set is identified by a region device with a dynamically assigned id.h]hIn this platform we have four DIMMs and two memory controllers in one socket. Each PMEM interleave set is identified by a region device with a dynamically assigned id.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh block_quote)}(hX1. The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined. 2. In the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named "pm1.0". This bus is provided by the kernel under the device /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from tools/testing/nvdimm is loaded. This module is a unit test for LIBNVDIMM and the acpi_nfit.ko driver. h](henumerated_list)}(hhh](h list_item)}(hX5The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined. h]h)}(hX4The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined.h]hX8The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of “pm0.0”. Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hIn the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named "pm1.0". h]h)}(hIn the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named "pm1.0".h]hIn the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named “pm1.0”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jhjubh)}(hThis bus is provided by the kernel under the device /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from tools/testing/nvdimm is loaded. This module is a unit test for LIBNVDIMM and the acpi_nfit.ko driver.h]hThis bus is provided by the kernel under the device /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from tools/testing/nvdimm is loaded. This module is a unit test for LIBNVDIMM and the acpi_nfit.ko driver.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubeh}(h]example-nvdimm-platformah ]h"]example nvdimm platformah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h8LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace APIh]h8LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhhhhhKubh)}(hXWhat follows is a description of the LIBNVDIMM sysfs layout and a corresponding object hierarchy diagram as viewed through the LIBNDCTL API. The example sysfs paths and diagrams are relative to the Example NVDIMM Platform which is also the LIBNVDIMM bus used in the LIBNDCTL unit test.h]hXWhat follows is a description of the LIBNVDIMM sysfs layout and a corresponding object hierarchy diagram as viewed through the LIBNDCTL API. The example sysfs paths and diagrams are relative to the Example NVDIMM Platform which is also the LIBNVDIMM bus used in the LIBNDCTL unit test.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjAhhubh)}(hhh](h)}(hLIBNDCTL: Contexth]hLIBNDCTL: Context}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hhhhhKubh)}(hEvery API call in the LIBNDCTL library requires a context that holds the logging parameters and other library instance state. The library is based on the libabc template:h]hEvery API call in the LIBNDCTL library requires a context that holds the logging parameters and other library instance state. The library is based on the libabc template:}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj`hhubj)}(h ../../../ndbus0 |-- subsystem -> ../../../../../../../class/ndh]hi/sys/class/nd/ndctl0 |-- dev |-- device -> ../../../ndbus0 |-- subsystem -> ../../../../../../../class/nd}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjhhubeh}(h]+libnvdimm-control-class-device-in-sys-classah ]h"]-libnvdimm: control class device in /sys/classah$]h&]uh1hhjAhhhhhKubh)}(hhh](h)}(hLIBNVDIMM: bush]hLIBNVDIMM: bus}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hhhhhKubj)}(hnstruct nvdimm_bus *nvdimm_bus_register(struct device *parent, struct nvdimm_bus_descriptor *nfit_desc);h]hnstruct nvdimm_bus *nvdimm_bus_register(struct device *parent, struct nvdimm_bus_descriptor *nfit_desc);}hj=sbah}(h]h ]h"]h$]h&]jjuh1jhhhKhj,hhubj)}(h/sys/devices/platform/nfit_test.0/ndbus0 |-- commands |-- nd |-- nfit |-- nmem0 |-- nmem1 |-- nmem2 |-- nmem3 |-- power |-- provider |-- region0 |-- region1 |-- region2 |-- region3 |-- region4 |-- region5 |-- uevent `-- wait_probeh]h/sys/devices/platform/nfit_test.0/ndbus0 |-- commands |-- nd |-- nfit |-- nmem0 |-- nmem1 |-- nmem2 |-- nmem3 |-- power |-- provider |-- region0 |-- region1 |-- region2 |-- region3 |-- region4 |-- region5 |-- uevent `-- wait_probe}hjKsbah}(h]h ]h"]h$]h&]jjuh1jhhhMhj,hhubh)}(hhh](h)}(h!LIBNDCTL: bus enumeration exampleh]h!LIBNDCTL: bus enumeration example}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhhhhhMubh)}(hIFind the bus handle that describes the bus from Example NVDIMM Platform::h]hHFind the bus handle that describes the bus from Example NVDIMM Platform:}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjYhhubj)}(hXcstatic struct ndctl_bus *get_bus_by_provider(struct ndctl_ctx *ctx, const char *provider) { struct ndctl_bus *bus; ndctl_bus_foreach(ctx, bus) if (strcmp(provider, ndctl_bus_get_provider(bus)) == 0) return bus; return NULL; } bus = get_bus_by_provider(ctx, "nfit_test.0");h]hXcstatic struct ndctl_bus *get_bus_by_provider(struct ndctl_ctx *ctx, const char *provider) { struct ndctl_bus *bus; ndctl_bus_foreach(ctx, bus) if (strcmp(provider, ndctl_bus_get_provider(bus)) == 0) return bus; return NULL; } bus = get_bus_by_provider(ctx, "nfit_test.0");}hjxsbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjYhhubeh}(h] libndctl-bus-enumeration-exampleah ]h"]!libndctl: bus enumeration exampleah$]h&]uh1hhj,hhhhhMubeh}(h] libnvdimm-busah ]h"]libnvdimm: busah$]h&]uh1hhjAhhhhhKubh)}(hhh](h)}(hLIBNVDIMM/LIBNDCTL: DIMM (NMEM)h]hLIBNVDIMM/LIBNDCTL: DIMM (NMEM)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM,ubh)}(hThe DIMM device provides a character device for sending commands to hardware, and it is a container for LABELs. If the DIMM is defined by NFIT then an optional 'nfit' attribute sub-directory is available to add NFIT-specifics.h]hThe DIMM device provides a character device for sending commands to hardware, and it is a container for LABELs. If the DIMM is defined by NFIT then an optional ‘nfit’ attribute sub-directory is available to add NFIT-specifics.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM.hjhhubh)}(hXNote that the kernel device name for "DIMMs" is "nmemX". The NFIT describes these devices via "Memory Device to System Physical Address Range Mapping Structure", and there is no requirement that they actually be physical DIMMs, so we use a more generic name.h]hXNote that the kernel device name for “DIMMs” is “nmemX”. The NFIT describes these devices via “Memory Device to System Physical Address Range Mapping Structure”, and there is no requirement that they actually be physical DIMMs, so we use a more generic name.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM3hjhhubh)}(hhh](h)}(hLIBNVDIMM: DIMM (NMEM)h]hLIBNVDIMM: DIMM (NMEM)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM9ubj)}(hstruct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data, const struct attribute_group **groups, unsigned long flags, unsigned long *dsm_mask);h]hstruct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data, const struct attribute_group **groups, unsigned long flags, unsigned long *dsm_mask);}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhM=hjhhubj)}(hX/sys/devices/platform/nfit_test.0/ndbus0 |-- nmem0 | |-- available_slots | |-- commands | |-- dev | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nvdimm | |-- modalias | |-- nfit | | |-- device | | |-- format | | |-- handle | | |-- phys_id | | |-- rev_id | | |-- serial | | `-- vendor | |-- state | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- nmem1 [..]h]hX/sys/devices/platform/nfit_test.0/ndbus0 |-- nmem0 | |-- available_slots | |-- commands | |-- dev | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nvdimm | |-- modalias | |-- nfit | | |-- device | | |-- format | | |-- handle | | |-- phys_id | | |-- rev_id | | |-- serial | | `-- vendor | |-- state | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- nmem1 [..]}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhMChjhhubeh}(h]libnvdimm-dimm-nmemah ]h"]libnvdimm: dimm (nmem)ah$]h&]uh1hhjhhhhhM9ubh)}(hhh](h)}(h"LIBNDCTL: DIMM enumeration exampleh]h"LIBNDCTL: DIMM enumeration example}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM[ubh)}(hwNote, in this example we are assuming NFIT-defined DIMMs which are identified by an "nfit_handle" a 32-bit value where:h]h{Note, in this example we are assuming NFIT-defined DIMMs which are identified by an “nfit_handle” a 32-bit value where:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM]hjhhubj)}(h- Bit 3:0 DIMM number within the memory channel - Bit 7:4 memory channel number - Bit 11:8 memory controller ID - Bit 15:12 socket ID (within scope of a Node controller if node controller is present) - Bit 27:16 Node Controller ID - Bit 31:28 Reserved h]h bullet_list)}(hhh](j)}(h-Bit 3:0 DIMM number within the memory channelh]h)}(hj"h]h-Bit 3:0 DIMM number within the memory channel}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM`hj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hBit 7:4 memory channel numberh]h)}(hj9h]hBit 7:4 memory channel number}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMahj7ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hBit 11:8 memory controller IDh]h)}(hjPh]hBit 11:8 memory controller ID}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMbhjNubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hUBit 15:12 socket ID (within scope of a Node controller if node controller is present)h]h)}(hUBit 15:12 socket ID (within scope of a Node controller if node controller is present)h]hUBit 15:12 socket ID (within scope of a Node controller if node controller is present)}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMchjeubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hBit 27:16 Node Controller IDh]h)}(hjh]hBit 27:16 Node Controller ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMehj}ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hBit 31:28 Reserved h]h)}(hBit 31:28 Reservedh]hBit 31:28 Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMfhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]bullet-uh1jhhhM`hjubah}(h]h ]h"]h$]h&]uh1jhhhM`hjhhubj)}(hXstatic struct ndctl_dimm *get_dimm_by_handle(struct ndctl_bus *bus, unsigned int handle) { struct ndctl_dimm *dimm; ndctl_dimm_foreach(bus, dimm) if (ndctl_dimm_get_handle(dimm) == handle) return dimm; return NULL; } #define DIMM_HANDLE(n, s, i, c, d) \ (((n & 0xfff) << 16) | ((s & 0xf) << 12) | ((i & 0xf) << 8) \ | ((c & 0xf) << 4) | (d & 0xf)) dimm = get_dimm_by_handle(bus, DIMM_HANDLE(0, 0, 0, 0, 0));h]hXstatic struct ndctl_dimm *get_dimm_by_handle(struct ndctl_bus *bus, unsigned int handle) { struct ndctl_dimm *dimm; ndctl_dimm_foreach(bus, dimm) if (ndctl_dimm_get_handle(dimm) == handle) return dimm; return NULL; } #define DIMM_HANDLE(n, s, i, c, d) \ (((n & 0xfff) << 16) | ((s & 0xf) << 12) | ((i & 0xf) << 8) \ | ((c & 0xf) << 4) | (d & 0xf)) dimm = get_dimm_by_handle(bus, DIMM_HANDLE(0, 0, 0, 0, 0));}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhMjhjhhubeh}(h]!libndctl-dimm-enumeration-exampleah ]h"]"libndctl: dimm enumeration exampleah$]h&]uh1hhjhhhhhM[ubeh}(h]libnvdimm-libndctl-dimm-nmemah ]h"]libnvdimm/libndctl: dimm (nmem)ah$]h&]uh1hhjAhhhhhM,ubh)}(hhh](h)}(hLIBNVDIMM/LIBNDCTL: Regionh]hLIBNVDIMM/LIBNDCTL: Region}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM}ubh)}(hX A generic REGION device is registered for each PMEM interleave-set / range. Per the example there are 2 PMEM regions on the "nfit_test.0" bus. The primary role of regions are to be a container of "mappings". A mapping is a tuple of .h]hXA generic REGION device is registered for each PMEM interleave-set / range. Per the example there are 2 PMEM regions on the “nfit_test.0” bus. The primary role of regions are to be a container of “mappings”. A mapping is a tuple of .}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hLIBNVDIMM provides a built-in driver for REGION devices. This driver is responsible for all parsing LABELs, if present, and then emitting NAMESPACE devices for the nd_pmem driver to consume.h]hLIBNVDIMM provides a built-in driver for REGION devices. This driver is responsible for all parsing LABELs, if present, and then emitting NAMESPACE devices for the nd_pmem driver to consume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXIn addition to the generic attributes of "mapping"s, "interleave_ways" and "size" the REGION device also exports some convenience attributes. "nstype" indicates the integer type of namespace-device this region emits, "devtype" duplicates the DEVTYPE variable stored by udev at the 'add' event, "modalias" duplicates the MODALIAS variable stored by udev at the 'add' event, and finally, the optional "spa_index" is provided in the case where the region is defined by a SPA.h]hXIn addition to the generic attributes of “mapping”s, “interleave_ways” and “size” the REGION device also exports some convenience attributes. “nstype” indicates the integer type of namespace-device this region emits, “devtype” duplicates the DEVTYPE variable stored by udev at the ‘add’ event, “modalias” duplicates the MODALIAS variable stored by udev at the ‘add’ event, and finally, the optional “spa_index” is provided in the case where the region is defined by a SPA.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hLIBNVDIMM: region::h]hLIBNVDIMM: region:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(h|struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, struct nd_region_desc *ndr_desc);h]h|struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, struct nd_region_desc *ndr_desc);}hj!sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjhhubj)}(hX/sys/devices/platform/nfit_test.0/ndbus0 |-- region0 | |-- available_size | |-- btt0 | |-- btt_seed | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nd_region | |-- init_namespaces | |-- mapping0 | |-- mapping1 | |-- mappings | |-- modalias | |-- namespace0.0 | |-- namespace_seed | |-- numa_node | |-- nfit | | `-- spa_index | |-- nstype | |-- set_cookie | |-- size | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- region1 [..]h]hX/sys/devices/platform/nfit_test.0/ndbus0 |-- region0 | |-- available_size | |-- btt0 | |-- btt_seed | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nd_region | |-- init_namespaces | |-- mapping0 | |-- mapping1 | |-- mappings | |-- modalias | |-- namespace0.0 | |-- namespace_seed | |-- numa_node | |-- nfit | | `-- spa_index | |-- nstype | |-- set_cookie | |-- size | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- region1 [..]}hj/sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjhhubh)}(hhh](h)}(h$LIBNDCTL: region enumeration exampleh]h$LIBNDCTL: region enumeration example}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hhhhhMubh)}(h`Sample region retrieval routines based on NFIT-unique data like "spa_index" (interleave set id).h]hdSample region retrieval routines based on NFIT-unique data like “spa_index” (interleave set id).}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj=hhubj)}(hXstatic struct ndctl_region *get_pmem_region_by_spa_index(struct ndctl_bus *bus, unsigned int spa_index) { struct ndctl_region *region; ndctl_region_foreach(bus, region) { if (ndctl_region_get_type(region) != ND_DEVICE_REGION_PMEM) continue; if (ndctl_region_get_spa_index(region) == spa_index) return region; } return NULL; }h]hXstatic struct ndctl_region *get_pmem_region_by_spa_index(struct ndctl_bus *bus, unsigned int spa_index) { struct ndctl_region *region; ndctl_region_foreach(bus, region) { if (ndctl_region_get_type(region) != ND_DEVICE_REGION_PMEM) continue; if (ndctl_region_get_spa_index(region) == spa_index) return region; } return NULL; }}hj\sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhj=hhubeh}(h]#libndctl-region-enumeration-exampleah ]h"]$libndctl: region enumeration exampleah$]h&]uh1hhjhhhhhMubeh}(h]libnvdimm-libndctl-regionah ]h"]libnvdimm/libndctl: regionah$]h&]uh1hhjAhhhhhM}ubh)}(hhh](h)}(hLIBNVDIMM/LIBNDCTL: Namespaceh]hLIBNVDIMM/LIBNDCTL: Namespace}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhhhhhMubh)}(hA REGION, after resolving DPA aliasing and LABEL specified boundaries, surfaces one or more "namespace" devices. The arrival of a "namespace" device currently triggers the nd_pmem driver to load and register a disk/block device.h]hA REGION, after resolving DPA aliasing and LABEL specified boundaries, surfaces one or more “namespace” devices. The arrival of a “namespace” device currently triggers the nd_pmem driver to load and register a disk/block device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjzhhubh)}(hhh](h)}(hLIBNVDIMM: namespaceh]hLIBNVDIMM: namespace}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hX Here is a sample layout from the 2 major types of NAMESPACE where namespace0.0 represents DIMM-info-backed PMEM (note that it has a 'uuid' attribute), and namespace1.0 represents an anonymous PMEM namespace (note that has no 'uuid' attribute due to not support a LABEL)h]hXHere is a sample layout from the 2 major types of NAMESPACE where namespace0.0 represents DIMM-info-backed PMEM (note that it has a ‘uuid’ attribute), and namespace1.0 represents an anonymous PMEM namespace (note that has no ‘uuid’ attribute due to not support a LABEL)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(hX/sys/devices/platform/nfit_test.0/ndbus0/region0/namespace0.0 |-- alt_name |-- devtype |-- dpa_extents |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type |-- uevent `-- uuid /sys/devices/platform/nfit_test.1/ndbus1/region1/namespace1.0 |-- block | `-- pmem0 |-- devtype |-- driver -> ../../../../../../bus/nd/drivers/pmem |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type `-- ueventh]hX/sys/devices/platform/nfit_test.0/ndbus0/region0/namespace0.0 |-- alt_name |-- devtype |-- dpa_extents |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type |-- uevent `-- uuid /sys/devices/platform/nfit_test.1/ndbus1/region1/namespace1.0 |-- block | `-- pmem0 |-- devtype |-- driver -> ../../../../../../bus/nd/drivers/pmem |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type `-- uevent}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjhhubeh}(h]libnvdimm-namespaceah ]h"]libnvdimm: namespaceah$]h&]uh1hhjzhhhhhMubh)}(hhh](h)}(h'LIBNDCTL: namespace enumeration exampleh]h'LIBNDCTL: namespace enumeration example}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hNamespaces are indexed relative to their parent region, example below. These indexes are mostly static from boot to boot, but subsystem makes no guarantees in this regard. For a static namespace identifier use its 'uuid' attribute.h]hNamespaces are indexed relative to their parent region, example below. These indexes are mostly static from boot to boot, but subsystem makes no guarantees in this regard. For a static namespace identifier use its ‘uuid’ attribute.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(hX,static struct ndctl_namespace *get_namespace_by_id(struct ndctl_region *region, unsigned int id) { struct ndctl_namespace *ndns; ndctl_namespace_foreach(region, ndns) if (ndctl_namespace_get_id(ndns) == id) return ndns; return NULL; }h]hX,static struct ndctl_namespace *get_namespace_by_id(struct ndctl_region *region, unsigned int id) { struct ndctl_namespace *ndns; ndctl_namespace_foreach(region, ndns) if (ndctl_namespace_get_id(ndns) == id) return ndns; return NULL; }}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjhhubeh}(h]&libndctl-namespace-enumeration-exampleah ]h"]'libndctl: namespace enumeration exampleah$]h&]uh1hhjzhhhhhMubh)}(hhh](h)}(h$LIBNDCTL: namespace creation exampleh]h$LIBNDCTL: namespace creation example}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhM ubh)}(hXIdle namespaces are automatically created by the kernel if a given region has enough available capacity to create a new namespace. Namespace instantiation involves finding an idle namespace and configuring it. For the most part the setting of namespace attributes can occur in any order, the only constraint is that 'uuid' must be set before 'size'. This enables the kernel to track DPA allocations internally with a static identifier::h]hXIdle namespaces are automatically created by the kernel if a given region has enough available capacity to create a new namespace. Namespace instantiation involves finding an idle namespace and configuring it. For the most part the setting of namespace attributes can occur in any order, the only constraint is that ‘uuid’ must be set before ‘size’. This enables the kernel to track DPA allocations internally with a static identifier:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj hhubj)}(hXstatic int configure_namespace(struct ndctl_region *region, struct ndctl_namespace *ndns, struct namespace_parameters *parameters) { char devname[50]; snprintf(devname, sizeof(devname), "namespace%d.%d", ndctl_region_get_id(region), parameters->id); ndctl_namespace_set_alt_name(ndns, devname); /* 'uuid' must be set prior to setting size! */ ndctl_namespace_set_uuid(ndns, parameters->uuid); ndctl_namespace_set_size(ndns, parameters->size); /* unlike pmem namespaces, blk namespaces have a sector size */ if (parameters->lbasize) ndctl_namespace_set_sector_size(ndns, parameters->lbasize); ndctl_namespace_enable(ndns); }h]hXstatic int configure_namespace(struct ndctl_region *region, struct ndctl_namespace *ndns, struct namespace_parameters *parameters) { char devname[50]; snprintf(devname, sizeof(devname), "namespace%d.%d", ndctl_region_get_id(region), parameters->id); ndctl_namespace_set_alt_name(ndns, devname); /* 'uuid' must be set prior to setting size! */ ndctl_namespace_set_uuid(ndns, parameters->uuid); ndctl_namespace_set_size(ndns, parameters->size); /* unlike pmem namespaces, blk namespaces have a sector size */ if (parameters->lbasize) ndctl_namespace_set_sector_size(ndns, parameters->lbasize); ndctl_namespace_enable(ndns); }}hj" sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhj hhubeh}(h]#libndctl-namespace-creation-exampleah ]h"]$libndctl: namespace creation exampleah$]h&]uh1hhjzhhhhhM ubh)}(hhh](h)}(hWhy the Term "namespace"?h]hWhy the Term “namespace”?}(hj; hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8 hhhhhM(ubj)}(hX1. Why not "volume" for instance? "volume" ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper. 2. The term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: https://www.nvmexpress.org/specifications/), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces. h]j)}(hhh](j)}(hWhy not "volume" for instance? "volume" ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper. h]h)}(hWhy not "volume" for instance? "volume" ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper.h]hWhy not “volume” for instance? “volume” ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper.}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM*hjP ubah}(h]h ]h"]h$]h&]uh1jhjM ubj)}(hX The term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: https://www.nvmexpress.org/specifications/), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces. h]h)}(hX The term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: https://www.nvmexpress.org/specifications/), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces.h](hzThe term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: }(hjl hhhNhNubh)}(h*https://www.nvmexpress.org/specifications/h]h*https://www.nvmexpress.org/specifications/}(hjt hhhNhNubah}(h]h ]h"]h$]h&]refurijv uh1hhjl ubhe), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces.}(hjl hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM-hjh ubah}(h]h ]h"]h$]h&]uh1jhjM ubeh}(h]h ]h"]h$]h&]j j!j"hj#j$uh1jhjI ubah}(h]h ]h"]h$]h&]uh1jhhhM*hj8 hhubeh}(h]why-the-term-namespaceah ]h"]why the term "namespace"?ah$]h&]uh1hhjzhhhhhM(ubeh}(h]libnvdimm-libndctl-namespaceah ]h"]libnvdimm/libndctl: namespaceah$]h&]uh1hhjAhhhhhMubh)}(hhh](h)}(h1LIBNVDIMM/LIBNDCTL: Block Translation Table "btt"h]h5LIBNVDIMM/LIBNDCTL: Block Translation Table “btt”}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhM5ubh)}(hA BTT (design document: https://pmem.io/2014/09/23/btt.html) is a personality driver for a namespace that fronts entire namespace as an 'address abstraction'.h](hA BTT (design document: }(hj hhhNhNubh)}(h#https://pmem.io/2014/09/23/btt.htmlh]h#https://pmem.io/2014/09/23/btt.html}(hj hhhNhNubah}(h]h ]h"]h$]h&]refurij uh1hhj ubhg) is a personality driver for a namespace that fronts entire namespace as an ‘address abstraction’.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM7hj hhubh)}(hhh](h)}(hLIBNVDIMM: btt layouth]hLIBNVDIMM: btt layout}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhM<ubh)}(hEvery region will start out with at least one BTT device which is the seed device. To activate it set the "namespace", "uuid", and "sector_size" attributes and then bind the device to the nd_pmem or nd_blk driver depending on the region type::h]hEvery region will start out with at least one BTT device which is the seed device. To activate it set the “namespace”, “uuid”, and “sector_size” attributes and then bind the device to the nd_pmem or nd_blk driver depending on the region type:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM>hj hhubj)}(h/sys/devices/platform/nfit_test.1/ndbus0/region0/btt0/ |-- namespace |-- delete |-- devtype |-- modalias |-- numa_node |-- sector_size |-- subsystem -> ../../../../../bus/nd |-- uevent `-- uuidh]h/sys/devices/platform/nfit_test.1/ndbus0/region0/btt0/ |-- namespace |-- delete |-- devtype |-- modalias |-- numa_node |-- sector_size |-- subsystem -> ../../../../../bus/nd |-- uevent `-- uuid}hj sbah}(h]h ]h"]h$]h&]jjuh1jhhhMChj hhubeh}(h]libnvdimm-btt-layoutah ]h"]libnvdimm: btt layoutah$]h&]uh1hhj hhhhhM<ubh)}(hhh](h)}(hLIBNDCTL: btt creation exampleh]hLIBNDCTL: btt creation example}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMOubh)}(hXSimilar to namespaces an idle BTT device is automatically created per region. Each time this "seed" btt device is configured and enabled a new seed is created. Creating a BTT configuration involves two steps of finding and idle BTT and assigning it to consume a namespace.h]hXSimilar to namespaces an idle BTT device is automatically created per region. Each time this “seed” btt device is configured and enabled a new seed is created. Creating a BTT configuration involves two steps of finding and idle BTT and assigning it to consume a namespace.}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMQhj hhubj)}(hXstatic struct ndctl_btt *get_idle_btt(struct ndctl_region *region) { struct ndctl_btt *btt; ndctl_btt_foreach(region, btt) if (!ndctl_btt_is_enabled(btt) && !ndctl_btt_is_configured(btt)) return btt; return NULL; } static int configure_btt(struct ndctl_region *region, struct btt_parameters *parameters) { btt = get_idle_btt(region); ndctl_btt_set_uuid(btt, parameters->uuid); ndctl_btt_set_sector_size(btt, parameters->sector_size); ndctl_btt_set_namespace(btt, parameters->ndns); /* turn off raw mode device */ ndctl_namespace_disable(parameters->ndns); /* turn on btt access */ ndctl_btt_enable(btt); }h]hXstatic struct ndctl_btt *get_idle_btt(struct ndctl_region *region) { struct ndctl_btt *btt; ndctl_btt_foreach(region, btt) if (!ndctl_btt_is_enabled(btt) && !ndctl_btt_is_configured(btt)) return btt; return NULL; } static int configure_btt(struct ndctl_region *region, struct btt_parameters *parameters) { btt = get_idle_btt(region); ndctl_btt_set_uuid(btt, parameters->uuid); ndctl_btt_set_sector_size(btt, parameters->sector_size); ndctl_btt_set_namespace(btt, parameters->ndns); /* turn off raw mode device */ ndctl_namespace_disable(parameters->ndns); /* turn on btt access */ ndctl_btt_enable(btt); }}hj5 sbah}(h]h ]h"]h$]h&]jjuh1jhhhMXhj hhubh)}(hSOnce instantiated a new inactive btt seed device will appear underneath the region.h]hSOnce instantiated a new inactive btt seed device will appear underneath the region.}(hjC hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMrhj hhubh)}(hXOnce a "namespace" is removed from a BTT that instance of the BTT device will be deleted or otherwise reset to default values. This deletion is only at the device model level. In order to destroy a BTT the "info block" needs to be destroyed. Note, that to destroy a BTT the media needs to be written in raw mode. By default, the kernel will autodetect the presence of a BTT and disable raw mode. This autodetect behavior can be suppressed by enabling raw mode for the namespace via the ndctl_namespace_set_raw_mode() API.h]hXOnce a “namespace” is removed from a BTT that instance of the BTT device will be deleted or otherwise reset to default values. This deletion is only at the device model level. In order to destroy a BTT the “info block” needs to be destroyed. Note, that to destroy a BTT the media needs to be written in raw mode. By default, the kernel will autodetect the presence of a BTT and disable raw mode. This autodetect behavior can be suppressed by enabling raw mode for the namespace via the ndctl_namespace_set_raw_mode() API.}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMuhj hhubeh}(h]libndctl-btt-creation-exampleah ]h"]libndctl: btt creation exampleah$]h&]uh1hhj hhhhhMOubeh}(h].libnvdimm-libndctl-block-translation-table-bttah ]h"]1libnvdimm/libndctl: block translation table "btt"ah$]h&]uh1hhjAhhhhhM5ubh)}(hhh](h)}(hSummary LIBNDCTL Diagramh]hSummary LIBNDCTL Diagram}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjo hhhhhMubh)}(hZFor the given example above, here is the view of the objects as seen by the LIBNDCTL API::h]hYFor the given example above, here is the view of the objects as seen by the LIBNDCTL API:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjo hhubj)}(hX* +---+ |CTX| +-+-+ | +-------+ | | DIMM0 <-+ | +---------+ +--------------+ +---------------+ +-------+ | | +-> REGION0 +---> NAMESPACE0.0 +--> PMEM8 "pm0.0" | | DIMM1 <-+ +-v--+ | +---------+ +--------------+ +---------------+ +-------+ +-+BUS0+-| +---------+ +--------------+ +----------------------+ | DIMM2 <-+ +----+ +-> REGION1 +---> NAMESPACE1.0 +--> PMEM6 "pm1.0" | BTT1 | +-------+ | | +---------+ +--------------+ +---------------+------+ | DIMM3 <-+ +-------+h]hX* +---+ |CTX| +-+-+ | +-------+ | | DIMM0 <-+ | +---------+ +--------------+ +---------------+ +-------+ | | +-> REGION0 +---> NAMESPACE0.0 +--> PMEM8 "pm0.0" | | DIMM1 <-+ +-v--+ | +---------+ +--------------+ +---------------+ +-------+ +-+BUS0+-| +---------+ +--------------+ +----------------------+ | DIMM2 <-+ +----+ +-> REGION1 +---> NAMESPACE1.0 +--> PMEM6 "pm1.0" | BTT1 | +-------+ | | +---------+ +--------------+ +---------------+------+ | DIMM3 <-+ +-------+g }hj sbah}(h]h ]h"]h$]h&]jjuh1jhhhMhjo hhubeh}(h]summary-libndctl-diagramah ]h"]summary libndctl diagramah$]h&]uh1hhjAhhhhhMubeh}(h]8libnvdimm-kernel-device-model-and-libndctl-userspace-apiah ]h"]8libnvdimm kernel device model and libndctl userspace apiah$]h&]uh1hhhhhhhhKubeh}(h]libnvdimm-non-volatile-devicesah ]h"]libnvdimm: non-volatile devicesah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(j j jrjoj3j0jjj+j(jjjjj>j;j j jjjjjjj)j&jjjjjjjjjjjwjtjojlj j jjj jj5 j2 j j jl ji j j jd ja j j u nametypes}(j jrj3jj+jjj>j jjjj)jjjjjjwjoj jj j5 j jl j jd j uh}(j hjojj0jujjj(jjj6jjqj;jj jAjj`jjjjj&jjj,jjYjjjjjjjtjjlj=j jzjjjjj2 j j j8 ji j j j ja j j jo u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.