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How Do I Determine the Major Type of a Region? LIBNVDIMM/LIBNDCTL: Namespace libnvdimm: namespace libndctl: namespace enumeration example libndctl: namespace creation example Why the Term "namespace"? LIBNVDIMM/LIBNDCTL: Block Translation Table "btt" libnvdimm: btt layout libndctl: btt creation example Summary LIBNDCTL Diagram”h]”hXLcontents: Glossary Overview Supporting Documents Git Trees LIBNVDIMM PMEM PMEM-REGIONs, Atomic Sectors, and DAX Example NVDIMM Platform LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API LIBNDCTL: Context libndctl: instantiate a new library context example LIBNVDIMM/LIBNDCTL: Bus libnvdimm: control class device in /sys/class libnvdimm: bus libndctl: bus enumeration example LIBNVDIMM/LIBNDCTL: DIMM (NMEM) libnvdimm: DIMM (NMEM) libndctl: DIMM enumeration example LIBNVDIMM/LIBNDCTL: Region libnvdimm: region libndctl: region enumeration example Why Not Encode the Region Type into the Region Name? How Do I Determine the Major Type of a Region? LIBNVDIMM/LIBNDCTL: Namespace libnvdimm: namespace libndctl: namespace enumeration example libndctl: namespace creation example Why the Term "namespace"? LIBNVDIMM/LIBNDCTL: Block Translation Table "btt" libnvdimm: btt layout libndctl: btt creation example Summary LIBNDCTL Diagram”…”�”}”hjsbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1jhh·h²hh³hÊh´K-ubh¶)�”}”(hhh]”(h»)�”}”(hŒGlossary”h]”hŒGlossary”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjh²hh³hÊh´K/ubhŒdefinition_list”“”)�”}”(hhh]”(hŒdefinition_list_item”“”)�”}”(hŒ¶PMEM: A system-physical-address range where writes are persistent. A block device composed of PMEM is capable of DAX. A PMEM address range may span an interleave of several DIMMs. ”h]”(hŒterm”“”)�”}”(hŒPMEM:”h]”hŒPMEM:”…”�”}”(hj4h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´K4hj.ubhŒ definition”“”)�”}”(hhh]”hÌ)�”}”(hŒ¯A system-physical-address range where writes are persistent. A block device composed of PMEM is capable of DAX. A PMEM address range may span an interleave of several DIMMs.”h]”hŒ¯A system-physical-address range where writes are persistent. A block device composed of PMEM is capable of DAX. A PMEM address range may span an interleave of several DIMMs.”…”�”}”(hjGh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K2hjDubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj.ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´K4hj)ubj-)�”}”(hX!DPA: DIMM Physical Address, is a DIMM-relative offset. With one DIMM in the system there would be a 1:1 system-physical-address:DPA association. Once more DIMMs are added a memory controller interleave must be decoded to determine the DPA associated with a given system-physical-address. ”h]”(j3)�”}”(hŒDPA:”h]”hŒDPA:”…”�”}”(hjeh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´K;hjaubjC)�”}”(hhh]”hÌ)�”}”(hXDIMM Physical Address, is a DIMM-relative offset. With one DIMM in the system there would be a 1:1 system-physical-address:DPA association. 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Once more DIMMs are added a memory controller interleave must be decoded to determine the DPA associated with a given system-physical-address.”…”�”}”(hjvh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K7hjsubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjaubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´K;hj)h²hubj-)�”}”(hŒ¡DAX: File system extensions to bypass the page cache and block layer to mmap persistent memory, from a PMEM block device, directly into a process address space. ”h]”(j3)�”}”(hŒDAX:”h]”hŒDAX:”…”�”}”(hj”h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´K@hj�ubjC)�”}”(hhh]”hÌ)�”}”(hŒ›File system extensions to bypass the page cache and block layer to mmap persistent memory, from a PMEM block device, directly into a process address space.”h]”hŒ›File system extensions to bypass the page cache and block layer to mmap persistent memory, from a PMEM block device, directly into a process address space.”…”�”}”(hj¥h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K>hj¢ubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj�ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´K@hj)h²hubj-)�”}”(hŒaDSM: Device Specific Method: ACPI method to control specific device - in this case the firmware. ”h]”(j3)�”}”(hŒDSM:”h]”hŒDSM:”…”�”}”(hjÃh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KDhj¿ubjC)�”}”(hhh]”hÌ)�”}”(hŒ[Device Specific Method: ACPI method to control specific device - in this case the firmware.”h]”hŒ[Device Specific Method: ACPI method to control specific device - in this case the firmware.”…”�”}”(hjÔh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KChjÑubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj¿ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´KDhj)h²hubj-)�”}”(hŒ“DCR: NVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5. It defines a vendor-id, device-id, and interface format for a given DIMM. ”h]”(j3)�”}”(hŒDCR:”h]”hŒDCR:”…”�”}”(hjòh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KHhjîubjC)�”}”(hhh]”hÌ)�”}”(hŒ�NVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5. It defines a vendor-id, device-id, and interface format for a given DIMM.”h]”hŒ�NVDIMM Control Region Structure defined in ACPI 6 Section 5.2.25.5. It defines a vendor-id, device-id, and interface format for a given DIMM.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KGhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjîubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´KHhj)h²hubj-)�”}”(hXGBTT: Block Translation Table: Persistent memory is byte addressable. Existing software may have an expectation that the power-fail-atomicity of writes is at least one sector, 512 bytes. The BTT is an indirection table with atomic update semantics to front a PMEM block device driver and present arbitrary atomic sector sizes. ”h]”(j3)�”}”(hŒBTT:”h]”hŒBTT:”…”�”}”(hj!h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KOhjubjC)�”}”(hhh]”hÌ)�”}”(hXABlock Translation Table: Persistent memory is byte addressable. Existing software may have an expectation that the power-fail-atomicity of writes is at least one sector, 512 bytes. The BTT is an indirection table with atomic update semantics to front a PMEM block device driver and present arbitrary atomic sector sizes.”h]”hXABlock Translation Table: Persistent memory is byte addressable. Existing software may have an expectation that the power-fail-atomicity of writes is at least one sector, 512 bytes. The BTT is an indirection table with atomic update semantics to front a PMEM block device driver and present arbitrary atomic sector sizes.”…”�”}”(hj2h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KKhj/ubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´KOhj)h²hubj-)�”}”(hX£LABEL: Metadata stored on a DIMM device that partitions and identifies (persistently names) capacity allocated to different PMEM namespaces. It also indicates whether an address abstraction like a BTT is applied to the namespace. Note that traditional partition tables, GPT/MBR, are layered on top of a PMEM namespace, or an address abstraction like BTT if present, but partition support is deprecated going forward. ”h]”(j3)�”}”(hŒLABEL:”h]”hŒLABEL:”…”�”}”(hjPh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KXhjLubjC)�”}”(hhh]”hÌ)�”}”(hXšMetadata stored on a DIMM device that partitions and identifies (persistently names) capacity allocated to different PMEM namespaces. It also indicates whether an address abstraction like a BTT is applied to the namespace. Note that traditional partition tables, GPT/MBR, are layered on top of a PMEM namespace, or an address abstraction like BTT if present, but partition support is deprecated going forward.”h]”hXšMetadata stored on a DIMM device that partitions and identifies (persistently names) capacity allocated to different PMEM namespaces. It also indicates whether an address abstraction like a BTT is applied to the namespace. Note that traditional partition tables, GPT/MBR, are layered on top of a PMEM namespace, or an address abstraction like BTT if present, but partition support is deprecated going forward.”…”�”}”(hjah²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KRhj^ubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjLubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´KXhj)h²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1j'hjh²hh³hÊh´Nubeh}”(h]”Œglossary”ah ]”h"]”Œglossary”ah$]”h&]”uh1hµhh·h²hh³hÊh´K/ubh¶)�”}”(hhh]”(h»)�”}”(hŒOverview”h]”hŒOverview”…”�”}”(hjŒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj‰h²hh³hÊh´K[ubhÌ)�”}”(hXbThe LIBNVDIMM subsystem provides support for PMEM described by platform firmware or a device driver. On ACPI based systems the platform firmware conveys persistent memory resource via the ACPI NFIT "NVDIMM Firmware Interface Table" in ACPI 6. While the LIBNVDIMM subsystem implementation is generic and supports pre-NFIT platforms, it was guided by the superset of capabilities need to support this ACPI 6 definition for NVDIMM resources. The original implementation supported the block-window-aperture capability described in the NFIT, but that support has since been abandoned and never shipped in a product.”h]”hXfThe LIBNVDIMM subsystem provides support for PMEM described by platform firmware or a device driver. On ACPI based systems the platform firmware conveys persistent memory resource via the ACPI NFIT “NVDIMM Firmware Interface Tableâ€� in ACPI 6. While the LIBNVDIMM subsystem implementation is generic and supports pre-NFIT platforms, it was guided by the superset of capabilities need to support this ACPI 6 definition for NVDIMM resources. The original implementation supported the block-window-aperture capability described in the NFIT, but that support has since been abandoned and never shipped in a product.”…”�”}”(hjšh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K]hj‰h²hubh¶)�”}”(hhh]”(h»)�”}”(hŒSupporting Documents”h]”hŒSupporting Documents”…”�”}”(hj«h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj¨h²hh³hÊh´Khubj()�”}”(hhh]”(j-)�”}”(hŒGACPI 6: https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf”h]”(j3)�”}”(hŒACPI 6:”h]”hŒACPI 6:”…”�”}”(hjÀh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´Kjhj¼ubjC)�”}”(hhh]”hÌ)�”}”(hŒ?https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf”h]”hà)�”}”(hjÓh]”hŒ?https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf”…”�”}”(hjÕh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jÓuh1hßhjÑubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KkhjÎubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj¼ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´Kjhj¹ubj-)�”}”(hŒENVDIMM Namespace: https://pmem.io/documents/NVDIMM_Namespace_Spec.pdf”h]”(j3)�”}”(hŒNVDIMM Namespace:”h]”hŒNVDIMM Namespace:”…”�”}”(hjùh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KlhjõubjC)�”}”(hhh]”hÌ)�”}”(hŒ3https://pmem.io/documents/NVDIMM_Namespace_Spec.pdf”h]”hà)�”}”(hj h]”hŒ3https://pmem.io/documents/NVDIMM_Namespace_Spec.pdf”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j uh1hßhj ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kmhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjõubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´Klhj¹h²hubj-)�”}”(hŒQDSM Interface Example: https://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf”h]”(j3)�”}”(hŒDSM Interface Example:”h]”hŒDSM Interface Example:”…”�”}”(hj2h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´Knhj.ubjC)�”}”(hhh]”hÌ)�”}”(hŒ:https://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf”h]”hà)�”}”(hjEh]”hŒ:https://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf”…”�”}”(hjGh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jEuh1hßhjCubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kohj@ubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhj.ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´Knhj¹h²hubj-)�”}”(hŒQDriver Writer's Guide: https://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf ”h]”(j3)�”}”(hŒDriver Writer's Guide:”h]”hŒDriver Writer’s Guide:”…”�”}”(hjkh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KqhjgubjC)�”}”(hhh]”hÌ)�”}”(hŒ9https://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf”h]”hà)�”}”(hj~h]”hŒ9https://pmem.io/documents/NVDIMM_Driver_Writers_Guide.pdf”…”�”}”(hj€h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j~uh1hßhj|ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kqhjyubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjgubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´Kqhj¹h²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1j'hj¨h²hh³hÊh´Nubeh}”(h]”Œsupporting-documents”ah ]”h"]”Œsupporting documents”ah$]”h&]”uh1hµhj‰h²hh³hÊh´Khubh¶)�”}”(hhh]”(h»)�”}”(hŒ Git Trees”h]”hŒ Git Trees”…”�”}”(hj±h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj®h²hh³hÊh´Ktubj()�”}”(hhh]”(j-)�”}”(hŒILIBNVDIMM: https://git.kernel.org/cgit/linux/kernel/git/nvdimm/nvdimm.git”h]”(j3)�”}”(hŒ LIBNVDIMM:”h]”hŒ LIBNVDIMM:”…”�”}”(hjÆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KvhjÂubjC)�”}”(hhh]”hÌ)�”}”(hŒ>https://git.kernel.org/cgit/linux/kernel/git/nvdimm/nvdimm.git”h]”hà)�”}”(hjÙh]”hŒ>https://git.kernel.org/cgit/linux/kernel/git/nvdimm/nvdimm.git”…”�”}”(hjÛh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jÙuh1hßhj×ubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KwhjÔubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjÂubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´Kvhj¿ubj-)�”}”(hŒ-LIBNDCTL: https://github.com/pmem/ndctl.git ”h]”(j3)�”}”(hŒ LIBNDCTL:”h]”hŒ LIBNDCTL:”…”�”}”(hjÿh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j2h³hÊh´KzhjûubjC)�”}”(hhh]”hÌ)�”}”(hŒ!https://github.com/pmem/ndctl.git”h]”hà)�”}”(hjh]”hŒ!https://github.com/pmem/ndctl.git”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”juh1hßhjubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kyhj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jBhjûubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,h³hÊh´Kzhj¿h²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1j'hj®h²hh³hÊh´Nubeh}”(h]”Œ git-trees”ah ]”h"]”Œ git trees”ah$]”h&]”uh1hµhj‰h²hh³hÊh´Ktubeh}”(h]”Œoverview”ah ]”h"]”Œoverview”ah$]”h&]”uh1hµhh·h²hh³hÊh´K[ubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM PMEM”h]”hŒLIBNVDIMM PMEM”…”�”}”(hjMh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjJh²hh³hÊh´K}ubhÌ)�”}”(hX Prior to the arrival of the NFIT, non-volatile memory was described to a system in various ad-hoc ways. Usually only the bare minimum was provided, namely, a single system-physical-address range where writes are expected to be durable after a system power loss. Now, the NFIT specification standardizes not only the description of PMEM, but also platform message-passing entry points for control and configuration.”h]”hX Prior to the arrival of the NFIT, non-volatile memory was described to a system in various ad-hoc ways. Usually only the bare minimum was provided, namely, a single system-physical-address range where writes are expected to be durable after a system power loss. Now, the NFIT specification standardizes not only the description of PMEM, but also platform message-passing entry points for control and configuration.”…”�”}”(hj[h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KhjJh²hubhÌ)�”}”(hX*PMEM (nd_pmem.ko): Drives a system-physical-address range. This range is contiguous in system memory and may be interleaved (hardware memory controller striped) across multiple DIMMs. When interleaved the platform may optionally provide details of which DIMMs are participating in the interleave.”h]”hX*PMEM (nd_pmem.ko): Drives a system-physical-address range. This range is contiguous in system memory and may be interleaved (hardware memory controller striped) across multiple DIMMs. When interleaved the platform may optionally provide details of which DIMMs are participating in the interleave.”…”�”}”(hjih²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K†hjJh²hubhÌ)�”}”(hXuIt is worth noting that when the labeling capability is detected (a EFI namespace label index block is found), then no block device is created by default as userspace needs to do at least one allocation of DPA to the PMEM range. In contrast ND_NAMESPACE_IO ranges, once registered, can be immediately attached to nd_pmem. This latter mode is called label-less or "legacy".”h]”hXyIt is worth noting that when the labeling capability is detected (a EFI namespace label index block is found), then no block device is created by default as userspace needs to do at least one allocation of DPA to the PMEM range. In contrast ND_NAMESPACE_IO ranges, once registered, can be immediately attached to nd_pmem. This latter mode is called label-less or “legacyâ€�.”…”�”}”(hjwh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K‹hjJh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒ%PMEM-REGIONs, Atomic Sectors, and DAX”h]”hŒ%PMEM-REGIONs, Atomic Sectors, and DAX”…”�”}”(hjˆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj…h²hh³hÊh´K“ubhÌ)�”}”(hŒÅFor the cases where an application or filesystem still needs atomic sector update guarantees it can register a BTT on a PMEM device or partition. See LIBNVDIMM/NDCTL: Block Translation Table "btt"”h]”hŒÉFor the cases where an application or filesystem still needs atomic sector update guarantees it can register a BTT on a PMEM device or partition. See LIBNVDIMM/NDCTL: Block Translation Table “bttâ€�”…”�”}”(hj–h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K•hj…h²hubeh}”(h]”Œ#pmem-regions-atomic-sectors-and-dax”ah ]”h"]”Œ%pmem-regions, atomic sectors, and dax”ah$]”h&]”uh1hµhjJh²hh³hÊh´K“ubeh}”(h]”Œlibnvdimm-pmem”ah ]”h"]”Œlibnvdimm pmem”ah$]”h&]”uh1hµhh·h²hh³hÊh´K}ubh¶)�”}”(hhh]”(h»)�”}”(hŒExample NVDIMM Platform”h]”hŒExample NVDIMM Platform”…”�”}”(hj·h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj´h²hh³hÊh´K›ubhÌ)�”}”(hŒkFor the remainder of this document the following diagram will be referenced for any example sysfs layouts::”h]”hŒjFor the remainder of this document the following diagram will be referenced for any example sysfs layouts:”…”�”}”(hjÅh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K�hj´h²hubhŒ literal_block”“”)�”}”(hXN (a) (b) DIMM +-------------------+--------+--------+--------+ +------+ | pm0.0 | free | pm1.0 | free | 0 | imc0 +--+- - - region0- - - +--------+ +--------+ +--+---+ | pm0.0 | free | pm1.0 | free | 1 | +-------------------+--------v v--------+ +--+---+ | | | cpu0 | region1 +--+---+ | | | +----------------------------^ ^--------+ +--+---+ | free | pm1.0 | free | 2 | imc1 +--+----------------------------| +--------+ +------+ | free | pm1.0 | free | 3 +----------------------------+--------+--------+”h]”hXN (a) (b) DIMM +-------------------+--------+--------+--------+ +------+ | pm0.0 | free | pm1.0 | free | 0 | imc0 +--+- - - region0- - - +--------+ +--------+ +--+---+ | pm0.0 | free | pm1.0 | free | 1 | +-------------------+--------v v--------+ +--+---+ | | | cpu0 | region1 +--+---+ | | | +----------------------------^ ^--------+ +--+---+ | free | pm1.0 | free | 2 | imc1 +--+----------------------------| +--------+ +------+ | free | pm1.0 | free | 3 +----------------------------+--------+--------+”…”�”}”hjÕsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´K¡hj´h²hubhÌ)�”}”(hŒ¨In this platform we have four DIMMs and two memory controllers in one socket. Each PMEM interleave set is identified by a region device with a dynamically assigned id.”h]”hŒ¨In this platform we have four DIMMs and two memory controllers in one socket. Each PMEM interleave set is identified by a region device with a dynamically assigned id.”…”�”}”(hjãh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K°hj´h²hubhŒ block_quote”“”)�”}”(hX1. The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined. 2. In the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named "pm1.0". This bus is provided by the kernel under the device /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from tools/testing/nvdimm is loaded. This module is a unit test for LIBNVDIMM and the acpi_nfit.ko driver. ”h]”(hŒenumerated_list”“”)�”}”(hhh]”(hŒ list_item”“”)�”}”(hX5The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined. ”h]”hÌ)�”}”(hX4The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined.”h]”hX8The first portion of DIMM0 and DIMM1 are interleaved as REGION0. A single PMEM namespace is created in the REGION0-SPA-range that spans most of DIMM0 and DIMM1 with a user-specified name of “pm0.0â€�. Some of that interleaved system-physical-address range is left free for another PMEM namespace to be defined.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K´hjþubah}”(h]”h ]”h"]”h$]”h&]”uh1jühjùubjý)�”}”(hŒÞIn the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named "pm1.0". ”h]”hÌ)�”}”(hŒÝIn the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named "pm1.0".”h]”hŒáIn the last portion of DIMM0 and DIMM1 we have an interleaved system-physical-address range, REGION1, that spans those two DIMMs as well as DIMM2 and DIMM3. Some of REGION1 is allocated to a PMEM namespace named “pm1.0â€�.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Kºhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jühjùubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1j÷hjóubhÌ)�”}”(hŒÞThis bus is provided by the kernel under the device /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from tools/testing/nvdimm is loaded. This module is a unit test for LIBNVDIMM and the acpi_nfit.ko driver.”h]”hŒÞThis bus is provided by the kernel under the device /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from tools/testing/nvdimm is loaded. This module is a unit test for LIBNVDIMM and the acpi_nfit.ko driver.”…”�”}”(hj9h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K¿hjóubeh}”(h]”h ]”h"]”h$]”h&]”uh1jñh³hÊh´K´hj´h²hubeh}”(h]”Œexample-nvdimm-platform”ah ]”h"]”Œexample nvdimm platform”ah$]”h&]”uh1hµhh·h²hh³hÊh´K›ubh¶)�”}”(hhh]”(h»)�”}”(hŒ8LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API”h]”hŒ8LIBNVDIMM Kernel Device Model and LIBNDCTL Userspace API”…”�”}”(hjXh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjUh²hh³hÊh´KÆubhÌ)�”}”(hXWhat follows is a description of the LIBNVDIMM sysfs layout and a corresponding object hierarchy diagram as viewed through the LIBNDCTL API. The example sysfs paths and diagrams are relative to the Example NVDIMM Platform which is also the LIBNVDIMM bus used in the LIBNDCTL unit test.”h]”hXWhat follows is a description of the LIBNVDIMM sysfs layout and a corresponding object hierarchy diagram as viewed through the LIBNDCTL API. The example sysfs paths and diagrams are relative to the Example NVDIMM Platform which is also the LIBNVDIMM bus used in the LIBNDCTL unit test.”…”�”}”(hjfh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÈhjUh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNDCTL: Context”h]”hŒLIBNDCTL: Context”…”�”}”(hjwh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjth²hh³hÊh´KÏubhÌ)�”}”(hŒ«Every API call in the LIBNDCTL library requires a context that holds the logging parameters and other library instance state. The library is based on the libabc template:”h]”hŒ«Every API call in the LIBNDCTL library requires a context that holds the logging parameters and other library instance state. The library is based on the libabc template:”…”�”}”(hj…h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KÑhjth²hubjò)�”}”(hŒ ../../../ndbus0 |-- subsystem -> ../../../../../../../class/nd”h]”hŒi/sys/class/nd/ndctl0 |-- dev |-- device -> ../../../ndbus0 |-- subsystem -> ../../../../../../../class/nd”…”�”}”hj*sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Kóhj h²hubeh}”(h]”Œ+libnvdimm-control-class-device-in-sys-class”ah ]”h"]”Œ-libnvdimm: control class device in /sys/class”ah$]”h&]”uh1hµhjUh²hh³hÊh´Kîubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM: bus”h]”hŒLIBNVDIMM: bus”…”�”}”(hjCh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj@h²hh³hÊh´KûubjÔ)�”}”(hŒnstruct nvdimm_bus *nvdimm_bus_register(struct device *parent, struct nvdimm_bus_descriptor *nfit_desc);”h]”hŒnstruct nvdimm_bus *nvdimm_bus_register(struct device *parent, struct nvdimm_bus_descriptor *nfit_desc);”…”�”}”hjQsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Kÿhj@h²hubjÔ)�”}”(hŒæ/sys/devices/platform/nfit_test.0/ndbus0 |-- commands |-- nd |-- nfit |-- nmem0 |-- nmem1 |-- nmem2 |-- nmem3 |-- power |-- provider |-- region0 |-- region1 |-- region2 |-- region3 |-- region4 |-- region5 |-- uevent `-- wait_probe”h]”hŒæ/sys/devices/platform/nfit_test.0/ndbus0 |-- commands |-- nd |-- nfit |-- nmem0 |-- nmem1 |-- nmem2 |-- nmem3 |-- power |-- provider |-- region0 |-- region1 |-- region2 |-- region3 |-- region4 |-- region5 |-- uevent `-- wait_probe”…”�”}”hj_sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Mhj@h²hubh¶)�”}”(hhh]”(h»)�”}”(hŒ!LIBNDCTL: bus enumeration example”h]”hŒ!LIBNDCTL: bus enumeration example”…”�”}”(hjph²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjmh²hh³hÊh´MubhÌ)�”}”(hŒIFind the bus handle that describes the bus from Example NVDIMM Platform::”h]”hŒHFind the bus handle that describes the bus from Example NVDIMM Platform:”…”�”}”(hj~h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mhjmh²hubjÔ)�”}”(hXcstatic struct ndctl_bus *get_bus_by_provider(struct ndctl_ctx *ctx, const char *provider) { struct ndctl_bus *bus; ndctl_bus_foreach(ctx, bus) if (strcmp(provider, ndctl_bus_get_provider(bus)) == 0) return bus; return NULL; } bus = get_bus_by_provider(ctx, "nfit_test.0");”h]”hXcstatic struct ndctl_bus *get_bus_by_provider(struct ndctl_ctx *ctx, const char *provider) { struct ndctl_bus *bus; ndctl_bus_foreach(ctx, bus) if (strcmp(provider, ndctl_bus_get_provider(bus)) == 0) return bus; return NULL; } bus = get_bus_by_provider(ctx, "nfit_test.0");”…”�”}”hjŒsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Mhjmh²hubeh}”(h]”Œ libndctl-bus-enumeration-example”ah ]”h"]”Œ!libndctl: bus enumeration example”ah$]”h&]”uh1hµhj@h²hh³hÊh´Mubeh}”(h]”Œ libnvdimm-bus”ah ]”h"]”Œlibnvdimm: bus”ah$]”h&]”uh1hµhjUh²hh³hÊh´Kûubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM/LIBNDCTL: DIMM (NMEM)”h]”hŒLIBNVDIMM/LIBNDCTL: DIMM (NMEM)”…”�”}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjªh²hh³hÊh´M,ubhÌ)�”}”(hŒãThe DIMM device provides a character device for sending commands to hardware, and it is a container for LABELs. If the DIMM is defined by NFIT then an optional 'nfit' attribute sub-directory is available to add NFIT-specifics.”h]”hŒçThe DIMM device provides a character device for sending commands to hardware, and it is a container for LABELs. If the DIMM is defined by NFIT then an optional ‘nfit’ attribute sub-directory is available to add NFIT-specifics.”…”�”}”(hj»h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M.hjªh²hubhÌ)�”}”(hXNote that the kernel device name for "DIMMs" is "nmemX". The NFIT describes these devices via "Memory Device to System Physical Address Range Mapping Structure", and there is no requirement that they actually be physical DIMMs, so we use a more generic name.”h]”hXNote that the kernel device name for “DIMMsâ€� is “nmemXâ€�. The NFIT describes these devices via “Memory Device to System Physical Address Range Mapping Structureâ€�, and there is no requirement that they actually be physical DIMMs, so we use a more generic name.”…”�”}”(hjÉh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M3hjªh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM: DIMM (NMEM)”h]”hŒLIBNVDIMM: DIMM (NMEM)”…”�”}”(hjÚh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj×h²hh³hÊh´M9ubjÔ)�”}”(hŒÆstruct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data, const struct attribute_group **groups, unsigned long flags, unsigned long *dsm_mask);”h]”hŒÆstruct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data, const struct attribute_group **groups, unsigned long flags, unsigned long *dsm_mask);”…”�”}”hjèsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´M=hj×h²hubjÔ)�”}”(hX©/sys/devices/platform/nfit_test.0/ndbus0 |-- nmem0 | |-- available_slots | |-- commands | |-- dev | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nvdimm | |-- modalias | |-- nfit | | |-- device | | |-- format | | |-- handle | | |-- phys_id | | |-- rev_id | | |-- serial | | `-- vendor | |-- state | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- nmem1 [..]”h]”hX©/sys/devices/platform/nfit_test.0/ndbus0 |-- nmem0 | |-- available_slots | |-- commands | |-- dev | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nvdimm | |-- modalias | |-- nfit | | |-- device | | |-- format | | |-- handle | | |-- phys_id | | |-- rev_id | | |-- serial | | `-- vendor | |-- state | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- nmem1 [..]”…”�”}”hjösbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´MChj×h²hubeh}”(h]”Œlibnvdimm-dimm-nmem”ah ]”h"]”Œlibnvdimm: dimm (nmem)”ah$]”h&]”uh1hµhjªh²hh³hÊh´M9ubh¶)�”}”(hhh]”(h»)�”}”(hŒ"LIBNDCTL: DIMM enumeration example”h]”hŒ"LIBNDCTL: DIMM enumeration example”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj h²hh³hÊh´M[ubhÌ)�”}”(hŒwNote, in this example we are assuming NFIT-defined DIMMs which are identified by an "nfit_handle" a 32-bit value where:”h]”hŒ{Note, in this example we are assuming NFIT-defined DIMMs which are identified by an “nfit_handleâ€� a 32-bit value where:”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M]hj h²hubjò)�”}”(hŒþ- Bit 3:0 DIMM number within the memory channel - Bit 7:4 memory channel number - Bit 11:8 memory controller ID - Bit 15:12 socket ID (within scope of a Node controller if node controller is present) - Bit 27:16 Node Controller ID - Bit 31:28 Reserved ”h]”hŒ bullet_list”“”)�”}”(hhh]”(jý)�”}”(hŒ-Bit 3:0 DIMM number within the memory channel”h]”hÌ)�”}”(hj6h]”hŒ-Bit 3:0 DIMM number within the memory channel”…”�”}”(hj8h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M`hj4ubah}”(h]”h ]”h"]”h$]”h&]”uh1jühj1ubjý)�”}”(hŒBit 7:4 memory channel number”h]”hÌ)�”}”(hjMh]”hŒBit 7:4 memory channel number”…”�”}”(hjOh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MahjKubah}”(h]”h ]”h"]”h$]”h&]”uh1jühj1ubjý)�”}”(hŒBit 11:8 memory controller ID”h]”hÌ)�”}”(hjdh]”hŒBit 11:8 memory controller ID”…”�”}”(hjfh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mbhjbubah}”(h]”h ]”h"]”h$]”h&]”uh1jühj1ubjý)�”}”(hŒUBit 15:12 socket ID (within scope of a Node controller if node controller is present)”h]”hÌ)�”}”(hŒUBit 15:12 socket ID (within scope of a Node controller if node controller is present)”h]”hŒUBit 15:12 socket ID (within scope of a Node controller if node controller is present)”…”�”}”(hj}h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mchjyubah}”(h]”h ]”h"]”h$]”h&]”uh1jühj1ubjý)�”}”(hŒBit 27:16 Node Controller ID”h]”hÌ)�”}”(hj“h]”hŒBit 27:16 Node Controller ID”…”�”}”(hj•h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mehj‘ubah}”(h]”h ]”h"]”h$]”h&]”uh1jühj1ubjý)�”}”(hŒBit 31:28 Reserved ”h]”hÌ)�”}”(hŒBit 31:28 Reserved”h]”hŒBit 31:28 Reserved”…”�”}”(hj¬h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mfhj¨ubah}”(h]”h ]”h"]”h$]”h&]”uh1jühj1ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j/h³hÊh´M`hj+ubah}”(h]”h ]”h"]”h$]”h&]”uh1jñh³hÊh´M`hj h²hubjÔ)�”}”(hXóstatic struct ndctl_dimm *get_dimm_by_handle(struct ndctl_bus *bus, unsigned int handle) { struct ndctl_dimm *dimm; ndctl_dimm_foreach(bus, dimm) if (ndctl_dimm_get_handle(dimm) == handle) return dimm; return NULL; } #define DIMM_HANDLE(n, s, i, c, d) \ (((n & 0xfff) << 16) | ((s & 0xf) << 12) | ((i & 0xf) << 8) \ | ((c & 0xf) << 4) | (d & 0xf)) dimm = get_dimm_by_handle(bus, DIMM_HANDLE(0, 0, 0, 0, 0));”h]”hXóstatic struct ndctl_dimm *get_dimm_by_handle(struct ndctl_bus *bus, unsigned int handle) { struct ndctl_dimm *dimm; ndctl_dimm_foreach(bus, dimm) if (ndctl_dimm_get_handle(dimm) == handle) return dimm; return NULL; } #define DIMM_HANDLE(n, s, i, c, d) \ (((n & 0xfff) << 16) | ((s & 0xf) << 12) | ((i & 0xf) << 8) \ | ((c & 0xf) << 4) | (d & 0xf)) dimm = get_dimm_by_handle(bus, DIMM_HANDLE(0, 0, 0, 0, 0));”…”�”}”hjÎsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Mjhj h²hubeh}”(h]”Œ!libndctl-dimm-enumeration-example”ah ]”h"]”Œ"libndctl: dimm enumeration example”ah$]”h&]”uh1hµhjªh²hh³hÊh´M[ubeh}”(h]”Œlibnvdimm-libndctl-dimm-nmem”ah ]”h"]”Œlibnvdimm/libndctl: dimm (nmem)”ah$]”h&]”uh1hµhjUh²hh³hÊh´M,ubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM/LIBNDCTL: Region”h]”hŒLIBNVDIMM/LIBNDCTL: Region”…”�”}”(hjïh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjìh²hh³hÊh´M}ubhÌ)�”}”(hX A generic REGION device is registered for each PMEM interleave-set / range. Per the example there are 2 PMEM regions on the "nfit_test.0" bus. The primary role of regions are to be a container of "mappings". A mapping is a tuple of .”h]”hXA generic REGION device is registered for each PMEM interleave-set / range. Per the example there are 2 PMEM regions on the “nfit_test.0â€� bus. The primary role of regions are to be a container of “mappingsâ€�. A mapping is a tuple of .”…”�”}”(hjýh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mhjìh²hubhÌ)�”}”(hŒ¿LIBNVDIMM provides a built-in driver for REGION devices. This driver is responsible for all parsing LABELs, if present, and then emitting NAMESPACE devices for the nd_pmem driver to consume.”h]”hŒ¿LIBNVDIMM provides a built-in driver for REGION devices. This driver is responsible for all parsing LABELs, if present, and then emitting NAMESPACE devices for the nd_pmem driver to consume.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M„hjìh²hubhÌ)�”}”(hXØIn addition to the generic attributes of "mapping"s, "interleave_ways" and "size" the REGION device also exports some convenience attributes. "nstype" indicates the integer type of namespace-device this region emits, "devtype" duplicates the DEVTYPE variable stored by udev at the 'add' event, "modalias" duplicates the MODALIAS variable stored by udev at the 'add' event, and finally, the optional "spa_index" is provided in the case where the region is defined by a SPA.”h]”hXüIn addition to the generic attributes of “mappingâ€�s, “interleave_waysâ€� and “sizeâ€� the REGION device also exports some convenience attributes. “nstypeâ€� indicates the integer type of namespace-device this region emits, “devtypeâ€� duplicates the DEVTYPE variable stored by udev at the ‘add’ event, “modaliasâ€� duplicates the MODALIAS variable stored by udev at the ‘add’ event, and finally, the optional “spa_indexâ€� is provided in the case where the region is defined by a SPA.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mˆhjìh²hubhÌ)�”}”(hŒLIBNVDIMM: region::”h]”hŒLIBNVDIMM: region:”…”�”}”(hj'h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M�hjìh²hubjÔ)�”}”(hŒ|struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, struct nd_region_desc *ndr_desc);”h]”hŒ|struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, struct nd_region_desc *ndr_desc);”…”�”}”hj5sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´M’hjìh²hubjÔ)�”}”(hXê/sys/devices/platform/nfit_test.0/ndbus0 |-- region0 | |-- available_size | |-- btt0 | |-- btt_seed | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nd_region | |-- init_namespaces | |-- mapping0 | |-- mapping1 | |-- mappings | |-- modalias | |-- namespace0.0 | |-- namespace_seed | |-- numa_node | |-- nfit | | `-- spa_index | |-- nstype | |-- set_cookie | |-- size | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- region1 [..]”h]”hXê/sys/devices/platform/nfit_test.0/ndbus0 |-- region0 | |-- available_size | |-- btt0 | |-- btt_seed | |-- devtype | |-- driver -> ../../../../../bus/nd/drivers/nd_region | |-- init_namespaces | |-- mapping0 | |-- mapping1 | |-- mappings | |-- modalias | |-- namespace0.0 | |-- namespace_seed | |-- numa_node | |-- nfit | | `-- spa_index | |-- nstype | |-- set_cookie | |-- size | |-- subsystem -> ../../../../../bus/nd | `-- uevent |-- region1 [..]”…”�”}”hjCsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´M—hjìh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒ$LIBNDCTL: region enumeration example”h]”hŒ$LIBNDCTL: region enumeration example”…”�”}”(hjTh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjQh²hh³hÊh´M±ubhÌ)�”}”(hŒ`Sample region retrieval routines based on NFIT-unique data like "spa_index" (interleave set id).”h]”hŒdSample region retrieval routines based on NFIT-unique data like “spa_indexâ€� (interleave set id).”…”�”}”(hjbh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M³hjQh²hubjÔ)�”}”(hXÆstatic struct ndctl_region *get_pmem_region_by_spa_index(struct ndctl_bus *bus, unsigned int spa_index) { struct ndctl_region *region; ndctl_region_foreach(bus, region) { if (ndctl_region_get_type(region) != ND_DEVICE_REGION_PMEM) continue; if (ndctl_region_get_spa_index(region) == spa_index) return region; } return NULL; }”h]”hXÆstatic struct ndctl_region *get_pmem_region_by_spa_index(struct ndctl_bus *bus, unsigned int spa_index) { struct ndctl_region *region; ndctl_region_foreach(bus, region) { if (ndctl_region_get_type(region) != ND_DEVICE_REGION_PMEM) continue; if (ndctl_region_get_spa_index(region) == spa_index) return region; } return NULL; }”…”�”}”hjpsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´M¸hjQh²hubeh}”(h]”Œ#libndctl-region-enumeration-example”ah ]”h"]”Œ$libndctl: region enumeration example”ah$]”h&]”uh1hµhjìh²hh³hÊh´M±ubeh}”(h]”Œlibnvdimm-libndctl-region”ah ]”h"]”Œlibnvdimm/libndctl: region”ah$]”h&]”uh1hµhjUh²hh³hÊh´M}ubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM/LIBNDCTL: Namespace”h]”hŒLIBNVDIMM/LIBNDCTL: Namespace”…”�”}”(hj‘h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjŽh²hh³hÊh´MÈubhÌ)�”}”(hŒåA REGION, after resolving DPA aliasing and LABEL specified boundaries, surfaces one or more "namespace" devices. The arrival of a "namespace" device currently triggers the nd_pmem driver to load and register a disk/block device.”h]”hŒíA REGION, after resolving DPA aliasing and LABEL specified boundaries, surfaces one or more “namespaceâ€� devices. The arrival of a “namespaceâ€� device currently triggers the nd_pmem driver to load and register a disk/block device.”…”�”}”(hjŸh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MÊhjŽh²hubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM: namespace”h]”hŒLIBNVDIMM: namespace”…”�”}”(hj°h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj­h²hh³hÊh´MÏubhÌ)�”}”(hX Here is a sample layout from the 2 major types of NAMESPACE where namespace0.0 represents DIMM-info-backed PMEM (note that it has a 'uuid' attribute), and namespace1.0 represents an anonymous PMEM namespace (note that has no 'uuid' attribute due to not support a LABEL)”h]”hXHere is a sample layout from the 2 major types of NAMESPACE where namespace0.0 represents DIMM-info-backed PMEM (note that it has a ‘uuid’ attribute), and namespace1.0 represents an anonymous PMEM namespace (note that has no ‘uuid’ attribute due to not support a LABEL)”…”�”}”(hj¾h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MÑhj­h²hubjÔ)�”}”(hXÿ/sys/devices/platform/nfit_test.0/ndbus0/region0/namespace0.0 |-- alt_name |-- devtype |-- dpa_extents |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type |-- uevent `-- uuid /sys/devices/platform/nfit_test.1/ndbus1/region1/namespace1.0 |-- block | `-- pmem0 |-- devtype |-- driver -> ../../../../../../bus/nd/drivers/pmem |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type `-- uevent”h]”hXÿ/sys/devices/platform/nfit_test.0/ndbus0/region0/namespace0.0 |-- alt_name |-- devtype |-- dpa_extents |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type |-- uevent `-- uuid /sys/devices/platform/nfit_test.1/ndbus1/region1/namespace1.0 |-- block | `-- pmem0 |-- devtype |-- driver -> ../../../../../../bus/nd/drivers/pmem |-- force_raw |-- modalias |-- numa_node |-- resource |-- size |-- subsystem -> ../../../../../../bus/nd |-- type `-- uevent”…”�”}”hjÌsbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´MØhj­h²hubeh}”(h]”Œlibnvdimm-namespace”ah ]”h"]”Œlibnvdimm: namespace”ah$]”h&]”uh1hµhjŽh²hh³hÊh´MÏubh¶)�”}”(hhh]”(h»)�”}”(hŒ'LIBNDCTL: namespace enumeration example”h]”hŒ'LIBNDCTL: namespace enumeration example”…”�”}”(hjåh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjâh²hh³hÊh´MôubhÌ)�”}”(hŒèNamespaces are indexed relative to their parent region, example below. These indexes are mostly static from boot to boot, but subsystem makes no guarantees in this regard. For a static namespace identifier use its 'uuid' attribute.”h]”hŒìNamespaces are indexed relative to their parent region, example below. These indexes are mostly static from boot to boot, but subsystem makes no guarantees in this regard. For a static namespace identifier use its ‘uuid’ attribute.”…”�”}”(hjóh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mõhjâh²hubjÔ)�”}”(hX,static struct ndctl_namespace *get_namespace_by_id(struct ndctl_region *region, unsigned int id) { struct ndctl_namespace *ndns; ndctl_namespace_foreach(region, ndns) if (ndctl_namespace_get_id(ndns) == id) return ndns; return NULL; }”h]”hX,static struct ndctl_namespace *get_namespace_by_id(struct ndctl_region *region, unsigned int id) { struct ndctl_namespace *ndns; ndctl_namespace_foreach(region, ndns) if (ndctl_namespace_get_id(ndns) == id) return ndns; return NULL; }”…”�”}”hj sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Mühjâh²hubeh}”(h]”Œ&libndctl-namespace-enumeration-example”ah ]”h"]”Œ'libndctl: namespace enumeration example”ah$]”h&]”uh1hµhjŽh²hh³hÊh´Môubh¶)�”}”(hhh]”(h»)�”}”(hŒ$LIBNDCTL: namespace creation example”h]”hŒ$LIBNDCTL: namespace creation example”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj h²hh³hÊh´M ubhÌ)�”}”(hX¶Idle namespaces are automatically created by the kernel if a given region has enough available capacity to create a new namespace. Namespace instantiation involves finding an idle namespace and configuring it. For the most part the setting of namespace attributes can occur in any order, the only constraint is that 'uuid' must be set before 'size'. This enables the kernel to track DPA allocations internally with a static identifier::”h]”hX½Idle namespaces are automatically created by the kernel if a given region has enough available capacity to create a new namespace. Namespace instantiation involves finding an idle namespace and configuring it. For the most part the setting of namespace attributes can occur in any order, the only constraint is that ‘uuid’ must be set before ‘size’. This enables the kernel to track DPA allocations internally with a static identifier:”…”�”}”(hj( h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M hj h²hubjÔ)�”}”(hXstatic int configure_namespace(struct ndctl_region *region, struct ndctl_namespace *ndns, struct namespace_parameters *parameters) { char devname[50]; snprintf(devname, sizeof(devname), "namespace%d.%d", ndctl_region_get_id(region), parameters->id); ndctl_namespace_set_alt_name(ndns, devname); /* 'uuid' must be set prior to setting size! */ ndctl_namespace_set_uuid(ndns, parameters->uuid); ndctl_namespace_set_size(ndns, parameters->size); /* unlike pmem namespaces, blk namespaces have a sector size */ if (parameters->lbasize) ndctl_namespace_set_sector_size(ndns, parameters->lbasize); ndctl_namespace_enable(ndns); }”h]”hXstatic int configure_namespace(struct ndctl_region *region, struct ndctl_namespace *ndns, struct namespace_parameters *parameters) { char devname[50]; snprintf(devname, sizeof(devname), "namespace%d.%d", ndctl_region_get_id(region), parameters->id); ndctl_namespace_set_alt_name(ndns, devname); /* 'uuid' must be set prior to setting size! */ ndctl_namespace_set_uuid(ndns, parameters->uuid); ndctl_namespace_set_size(ndns, parameters->size); /* unlike pmem namespaces, blk namespaces have a sector size */ if (parameters->lbasize) ndctl_namespace_set_sector_size(ndns, parameters->lbasize); ndctl_namespace_enable(ndns); }”…”�”}”hj6 sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´Mhj h²hubeh}”(h]”Œ#libndctl-namespace-creation-example”ah ]”h"]”Œ$libndctl: namespace creation example”ah$]”h&]”uh1hµhjŽh²hh³hÊh´M ubh¶)�”}”(hhh]”(h»)�”}”(hŒWhy the Term "namespace"?”h]”hŒWhy the Term “namespaceâ€�?”…”�”}”(hjO h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjL h²hh³hÊh´M(ubjò)�”}”(hX¥1. Why not "volume" for instance? "volume" ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper. 2. The term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: https://www.nvmexpress.org/specifications/), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces. ”h]”jø)�”}”(hhh]”(jý)�”}”(hŒ„Why not "volume" for instance? "volume" ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper. ”h]”hÌ)�”}”(hŒƒWhy not "volume" for instance? "volume" ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper.”h]”hŒ‹Why not “volumeâ€� for instance? “volumeâ€� ran the risk of confusing ND (libnvdimm subsystem) to a volume manager like device-mapper.”…”�”}”(hjh h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M*hjd ubah}”(h]”h ]”h"]”h$]”h&]”uh1jühja ubjý)�”}”(hX The term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: https://www.nvmexpress.org/specifications/), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces. ”h]”hÌ)�”}”(hX The term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: https://www.nvmexpress.org/specifications/), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces.”h]”(hŒzThe term originated to describe the sub-devices that can be created within a NVME controller (see the nvme specification: ”…”�”}”(hj€ h²hh³Nh´Nubhà)�”}”(hŒ*https://www.nvmexpress.org/specifications/”h]”hŒ*https://www.nvmexpress.org/specifications/”…”�”}”(hjˆ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jŠ uh1hßhj€ ubhŒe), and NFIT namespaces are meant to parallel the capabilities and configurability of NVME-namespaces.”…”�”}”(hj€ h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M-hj| ubah}”(h]”h ]”h"]”h$]”h&]”uh1jühja ubeh}”(h]”h ]”h"]”h$]”h&]”j4j5j6hj7j8uh1j÷hj] ubah}”(h]”h ]”h"]”h$]”h&]”uh1jñh³hÊh´M*hjL h²hubeh}”(h]”Œwhy-the-term-namespace”ah ]”h"]”Œwhy the term "namespace"?”ah$]”h&]”uh1hµhjŽh²hh³hÊh´M(ubeh}”(h]”Œlibnvdimm-libndctl-namespace”ah ]”h"]”Œlibnvdimm/libndctl: namespace”ah$]”h&]”uh1hµhjUh²hh³hÊh´MÈubh¶)�”}”(hhh]”(h»)�”}”(hŒ1LIBNVDIMM/LIBNDCTL: Block Translation Table "btt"”h]”hŒ5LIBNVDIMM/LIBNDCTL: Block Translation Table “bttâ€�”…”�”}”(hjÆ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjà h²hh³hÊh´M5ubhÌ)�”}”(hŒžA BTT (design document: https://pmem.io/2014/09/23/btt.html) is a personality driver for a namespace that fronts entire namespace as an 'address abstraction'.”h]”(hŒA BTT (design document: ”…”�”}”(hjÔ h²hh³Nh´Nubhà)�”}”(hŒ#https://pmem.io/2014/09/23/btt.html”h]”hŒ#https://pmem.io/2014/09/23/btt.html”…”�”}”(hjÜ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jÞ uh1hßhjÔ ubhŒg) is a personality driver for a namespace that fronts entire namespace as an ‘address abstraction’.”…”�”}”(hjÔ h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M7hjà h²hubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNVDIMM: btt layout”h]”hŒLIBNVDIMM: btt layout”…”�”}”(hjø h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjõ h²hh³hÊh´M<ubhÌ)�”}”(hŒôEvery region will start out with at least one BTT device which is the seed device. To activate it set the "namespace", "uuid", and "sector_size" attributes and then bind the device to the nd_pmem or nd_blk driver depending on the region type::”h]”hŒÿEvery region will start out with at least one BTT device which is the seed device. To activate it set the “namespaceâ€�, “uuidâ€�, and “sector_sizeâ€� attributes and then bind the device to the nd_pmem or nd_blk driver depending on the region type:”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M>hjõ h²hubjÔ)�”}”(hŒÁ/sys/devices/platform/nfit_test.1/ndbus0/region0/btt0/ |-- namespace |-- delete |-- devtype |-- modalias |-- numa_node |-- sector_size |-- subsystem -> ../../../../../bus/nd |-- uevent `-- uuid”h]”hŒÁ/sys/devices/platform/nfit_test.1/ndbus0/region0/btt0/ |-- namespace |-- delete |-- devtype |-- modalias |-- numa_node |-- sector_size |-- subsystem -> ../../../../../bus/nd |-- uevent `-- uuid”…”�”}”hj sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´MChjõ h²hubeh}”(h]”Œlibnvdimm-btt-layout”ah ]”h"]”Œlibnvdimm: btt layout”ah$]”h&]”uh1hµhjà h²hh³hÊh´M<ubh¶)�”}”(hhh]”(h»)�”}”(hŒLIBNDCTL: btt creation example”h]”hŒLIBNDCTL: btt creation example”…”�”}”(hj- h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhj* h²hh³hÊh´MOubhÌ)�”}”(hXSimilar to namespaces an idle BTT device is automatically created per region. Each time this "seed" btt device is configured and enabled a new seed is created. Creating a BTT configuration involves two steps of finding and idle BTT and assigning it to consume a namespace.”h]”hXSimilar to namespaces an idle BTT device is automatically created per region. Each time this “seedâ€� btt device is configured and enabled a new seed is created. Creating a BTT configuration involves two steps of finding and idle BTT and assigning it to consume a namespace.”…”�”}”(hj; h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´MQhj* h²hubjÔ)�”}”(hXstatic struct ndctl_btt *get_idle_btt(struct ndctl_region *region) { struct ndctl_btt *btt; ndctl_btt_foreach(region, btt) if (!ndctl_btt_is_enabled(btt) && !ndctl_btt_is_configured(btt)) return btt; return NULL; } static int configure_btt(struct ndctl_region *region, struct btt_parameters *parameters) { btt = get_idle_btt(region); ndctl_btt_set_uuid(btt, parameters->uuid); ndctl_btt_set_sector_size(btt, parameters->sector_size); ndctl_btt_set_namespace(btt, parameters->ndns); /* turn off raw mode device */ ndctl_namespace_disable(parameters->ndns); /* turn on btt access */ ndctl_btt_enable(btt); }”h]”hXstatic struct ndctl_btt *get_idle_btt(struct ndctl_region *region) { struct ndctl_btt *btt; ndctl_btt_foreach(region, btt) if (!ndctl_btt_is_enabled(btt) && !ndctl_btt_is_configured(btt)) return btt; return NULL; } static int configure_btt(struct ndctl_region *region, struct btt_parameters *parameters) { btt = get_idle_btt(region); ndctl_btt_set_uuid(btt, parameters->uuid); ndctl_btt_set_sector_size(btt, parameters->sector_size); ndctl_btt_set_namespace(btt, parameters->ndns); /* turn off raw mode device */ ndctl_namespace_disable(parameters->ndns); /* turn on btt access */ ndctl_btt_enable(btt); }”…”�”}”hjI sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´MXhj* h²hubhÌ)�”}”(hŒSOnce instantiated a new inactive btt seed device will appear underneath the region.”h]”hŒSOnce instantiated a new inactive btt seed device will appear underneath the region.”…”�”}”(hjW h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Mrhj* h²hubhÌ)�”}”(hXOnce a "namespace" is removed from a BTT that instance of the BTT device will be deleted or otherwise reset to default values. This deletion is only at the device model level. In order to destroy a BTT the "info block" needs to be destroyed. Note, that to destroy a BTT the media needs to be written in raw mode. By default, the kernel will autodetect the presence of a BTT and disable raw mode. This autodetect behavior can be suppressed by enabling raw mode for the namespace via the ndctl_namespace_set_raw_mode() API.”h]”hXOnce a “namespaceâ€� is removed from a BTT that instance of the BTT device will be deleted or otherwise reset to default values. This deletion is only at the device model level. In order to destroy a BTT the “info blockâ€� needs to be destroyed. Note, that to destroy a BTT the media needs to be written in raw mode. By default, the kernel will autodetect the presence of a BTT and disable raw mode. This autodetect behavior can be suppressed by enabling raw mode for the namespace via the ndctl_namespace_set_raw_mode() API.”…”�”}”(hje h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Muhj* h²hubeh}”(h]”Œlibndctl-btt-creation-example”ah ]”h"]”Œlibndctl: btt creation example”ah$]”h&]”uh1hµhjà h²hh³hÊh´MOubeh}”(h]”Œ.libnvdimm-libndctl-block-translation-table-btt”ah ]”h"]”Œ1libnvdimm/libndctl: block translation table "btt"”ah$]”h&]”uh1hµhjUh²hh³hÊh´M5ubh¶)�”}”(hhh]”(h»)�”}”(hŒSummary LIBNDCTL Diagram”h]”hŒSummary LIBNDCTL Diagram”…”�”}”(hj† h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhjƒ h²hh³hÊh´M€ubhÌ)�”}”(hŒZFor the given example above, here is the view of the objects as seen by the LIBNDCTL API::”h]”hŒYFor the given example above, here is the view of the objects as seen by the LIBNDCTL API:”…”�”}”(hj” h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´M‚hjƒ h²hubjÔ)�”}”(hX* +---+ |CTX| +-+-+ | +-------+ | | DIMM0 <-+ | +---------+ +--------------+ +---------------+ +-------+ | | +-> REGION0 +---> NAMESPACE0.0 +--> PMEM8 "pm0.0" | | DIMM1 <-+ +-v--+ | +---------+ +--------------+ +---------------+ +-------+ +-+BUS0+-| +---------+ +--------------+ +----------------------+ | DIMM2 <-+ +----+ +-> REGION1 +---> NAMESPACE1.0 +--> PMEM6 "pm1.0" | BTT1 | +-------+ | | +---------+ +--------------+ +---------------+------+ | DIMM3 <-+ +-------+”•¡h]”hX* +---+ |CTX| +-+-+ | +-------+ | | DIMM0 <-+ | +---------+ +--------------+ +---------------+ +-------+ | | +-> REGION0 +---> NAMESPACE0.0 +--> PMEM8 "pm0.0" | | DIMM1 <-+ +-v--+ | +---------+ +--------------+ +---------------+ +-------+ +-+BUS0+-| +---------+ +--------------+ +----------------------+ | DIMM2 <-+ +----+ +-> REGION1 +---> NAMESPACE1.0 +--> PMEM6 "pm1.0" | BTT1 | +-------+ | | +---------+ +--------------+ +---------------+------+ | DIMM3 <-+ +-------+”…”�”}”hj¢ sbah}”(h]”h ]”h"]”h$]”h&]”jjuh1jÓh³hÊh´M…hjƒ h²hubeh}”(h]”Œsummary-libndctl-diagram”ah ]”h"]”Œsummary libndctl diagram”ah$]”h&]”uh1hµhjUh²hh³hÊh´M€ubeh}”(h]”Œ8libnvdimm-kernel-device-model-and-libndctl-userspace-api”ah ]”h"]”Œ8libnvdimm kernel device model and libndctl userspace api”ah$]”h&]”uh1hµhh·h²hh³hÊh´KÆubeh}”(h]”Œlibnvdimm-non-volatile-devices”ah ]”h"]”Œlibnvdimm: non-volatile devices”ah$]”h&]”uh1hµhhh²hh³hÊh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÊuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)�”}”(hºNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jë Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÊŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jÅ j j†jƒjGjDj«j¨j?j<j±j®j©j¦jRjOj½ jº jájÞjÙjÖjjj=j:j§j¤jŸjœjéjæj jjájÞj‹jˆjƒj€jÀ j½ jßjÜj j jI jF j¸ jµ j€ j} j' j$ jx ju jµ j² uŒ nametypes”}”(jÅ ‰j†‰jG‰j«‰j?‰j±‰j©‰jR‰j½ ‰já‰jÙ‰j‰j=‰j§‰jŸ‰jé‰j ‰já‰j‹‰jƒ‰jÀ ‰j߉j ‰jI ‰j¸ ‰j€ ‰j' ‰jx ‰jµ ‰uh}”(j h·jƒjjDj‰j¨j¨j<j®j®jJj¦j…jOj´jº jUjÞjtjÖjµjjäj:j j¤j@jœjmjæjªjj×jÞj jˆjìj€jQj½ jŽjÜj­j jâjF j jµ jL j} jà j$ jõ ju j* j² jƒ uŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.