sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget5/translations/zh_CN/driver-api/memory-devices/ti-gpmcmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget5/translations/zh_TW/driver-api/memory-devices/ti-gpmcmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget5/translations/it_IT/driver-api/memory-devices/ti-gpmcmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget5/translations/ja_JP/driver-api/memory-devices/ti-gpmcmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget5/translations/ko_KR/driver-api/memory-devices/ti-gpmcmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget5/translations/sp_SP/driver-api/memory-devices/ti-gpmcmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhO/var/lib/git/docbuild/linux/Documentation/driver-api/memory-devices/ti-gpmc.rsthKubhsection)}(hhh](htitle)}(h(GPMC (General Purpose Memory Controller)h]h(GPMC (General Purpose Memory Controller)}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hZGPMC is an unified memory controller dedicated to interfacing external memory devices likeh]hZGPMC is an unified memory controller dedicated to interfacing external memory devices like}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h* Asynchronous SRAM like memories and application specific integrated circuit devices. * Asynchronous, synchronous, and page mode burst NOR flash devices NAND flash * Pseudo-SRAM devices h]h bullet_list)}(hhh](h list_item)}(hTAsynchronous SRAM like memories and application specific integrated circuit devices.h]h)}(hTAsynchronous SRAM like memories and application specific integrated circuit devices.h]hTAsynchronous SRAM like memories and application specific integrated circuit devices.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubah}(h]h ]h"]h$]h&]uh1hhhubh)}(hKAsynchronous, synchronous, and page mode burst NOR flash devices NAND flashh]h)}(hKAsynchronous, synchronous, and page mode burst NOR flash devices NAND flashh]hKAsynchronous, synchronous, and page mode burst NOR flash devices NAND flash}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubah}(h]h ]h"]h$]h&]uh1hhhubh)}(hPseudo-SRAM devices h]h)}(hPseudo-SRAM devicesh]hPseudo-SRAM devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhubeh}(h]h ]h"]h$]h&]bullet*uh1hhhhK hhubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hpGPMC is found on Texas Instruments SoC's (OMAP based) IP details: https://www.ti.com/lit/pdf/spruh73 section 7.1h](hDGPMC is found on Texas Instruments SoC’s (OMAP based) IP details: }(hj<hhhNhNubh reference)}(h"https://www.ti.com/lit/pdf/spruh73h]h"https://www.ti.com/lit/pdf/spruh73}(hjFhhhNhNubah}(h]h ]h"]h$]h&]refurijHuh1jDhj<ubh section 7.1}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(h GPMC generic timing calculation:h]h GPMC generic timing calculation:}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hhhhhKubh)}(hXGPMC has certain timings that has to be programmed for proper functioning of the peripheral, while peripheral has another set of timings. To have peripheral work with gpmc, peripheral timings has to be translated to the form gpmc can understand. The way it has to be translated depends on the connected peripheral. Also there is a dependency for certain gpmc timings on gpmc clock frequency. Hence a generic timing routine was developed to achieve above requirements.h]hXGPMC has certain timings that has to be programmed for proper functioning of the peripheral, while peripheral has another set of timings. To have peripheral work with gpmc, peripheral timings has to be translated to the form gpmc can understand. The way it has to be translated depends on the connected peripheral. Also there is a dependency for certain gpmc timings on gpmc clock frequency. Hence a generic timing routine was developed to achieve above requirements.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj_hhubh)}(hXnGeneric routine provides a generic method to calculate gpmc timings from gpmc peripheral timings. struct gpmc_device_timings fields has to be updated with timings from the datasheet of the peripheral that is connected to gpmc. A few of the peripheral timings can be fed either in time or in cycles, provision to handle this scenario has been provided (refer struct gpmc_device_timings definition). It may so happen that timing as specified by peripheral datasheet is not present in timing structure, in this scenario, try to correlate peripheral timing to the one available. If that doesn't work, try to add a new field as required by peripheral, educate generic timing routine to handle it, make sure that it does not break any of the existing. Then there may be cases where peripheral datasheet doesn't mention certain fields of struct gpmc_device_timings, zero those entries.h]hXrGeneric routine provides a generic method to calculate gpmc timings from gpmc peripheral timings. struct gpmc_device_timings fields has to be updated with timings from the datasheet of the peripheral that is connected to gpmc. A few of the peripheral timings can be fed either in time or in cycles, provision to handle this scenario has been provided (refer struct gpmc_device_timings definition). It may so happen that timing as specified by peripheral datasheet is not present in timing structure, in this scenario, try to correlate peripheral timing to the one available. If that doesn’t work, try to add a new field as required by peripheral, educate generic timing routine to handle it, make sure that it does not break any of the existing. Then there may be cases where peripheral datasheet doesn’t mention certain fields of struct gpmc_device_timings, zero those entries.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj_hhubh)}(hiGeneric timing routine has been verified to work properly on multiple onenand's and tusb6010 peripherals.h]hkGeneric timing routine has been verified to work properly on multiple onenand’s and tusb6010 peripherals.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hj_hhubh)}(hXDA word of caution: generic timing routine has been developed based on understanding of gpmc timings, peripheral timings, available custom timing routines, a kind of reverse engineering without most of the datasheets & hardware (to be exact none of those supported in mainline having custom timing routine) and by simulation.h]hXDA word of caution: generic timing routine has been developed based on understanding of gpmc timings, peripheral timings, available custom timing routines, a kind of reverse engineering without most of the datasheets & hardware (to be exact none of those supported in mainline having custom timing routine) and by simulation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hj_hhubh)}(h-gpmc timing dependency on peripheral timings:h]h-gpmc timing dependency on peripheral timings:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hj_hhubh)}(h?[: , ...]h]h?[: , ...]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK8hj_hhubhenumerated_list)}(hhh]h)}(hcommon h]h)}(hcommonh]hcommon}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubah}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jhj_hhhhhK:ubhdefinition_list)}(hhh](hdefinition_list_item)}(hcs_on: t_ceasuh](hterm)}(hcs_on:h]hcs_on:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKwe_on, wr_data_mux_bus: t_weasu, t_rdyo, t_aavdh, cyc_aavhd_weh](j)}(hwe_on, wr_data_mux_bus:h]hwe_on, wr_data_mux_bus:}(hj, hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj( ubj)}(hhh]h)}(h&t_weasu, t_rdyo, t_aavdh, cyc_aavhd_weh]h&t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj: ubah}(h]h ]h"]h$]h&]uh1jhj( ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hwe_off: t_wpl, cyc_wplh](j)}(hwe_off:h]hwe_off:}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjW ubj)}(hhh]h)}(ht_wpl, cyc_wplh]ht_wpl, cyc_wpl}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhji ubah}(h]h ]h"]h$]h&]uh1jhjW ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hcs_wr_off: t_wphh](j)}(h cs_wr_off:h]h cs_wr_off:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(ht_wphh]ht_wph}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hwr_cycle: t_cez_w, t_ce_rdyz h](j)}(h wr_cycle:h]h wr_cycle:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(ht_cez_w, t_ce_rdyzh]ht_cez_w, t_ce_rdyz}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubeh}(h]h ]h"]h$]h&]uh1jhj_hhhhhNubj)}(hhh]h)}(hwrite sync non-muxed h]h)}(hwrite sync non-muxedh]hwrite sync non-muxed}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1hhj hhhhhNubah}(h]h ]h"]h$]h&]jjjhjjj|K uh1jhj_hhhhhKubj)}(hhh](j)}(hadv_wr_off: t_avdp_wh](j)}(h adv_wr_off:h]h adv_wr_off:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(ht_avdp_wh]ht_avdp_w}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(h'we_on, wr_data_mux_bus: t_weasu, t_rdyoh](j)}(hwe_on, wr_data_mux_bus:h]hwe_on, wr_data_mux_bus:}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj= ubj)}(hhh]h)}(ht_weasu, t_rdyoh]ht_weasu, t_rdyo}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjO ubah}(h]h ]h"]h$]h&]uh1jhj= ubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hwe_off: t_wpl, cyc_wplh](j)}(hwe_off:h]hwe_off:}(hjp hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjl ubj)}(hhh]h)}(ht_wpl, cyc_wplh]ht_wpl, cyc_wpl}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj~ ubah}(h]h ]h"]h$]h&]uh1jhjl ubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hcs_wr_off: t_wphh](j)}(h cs_wr_off:h]h cs_wr_off:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(ht_wphh]ht_wph}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hwr_cycle: t_cez_w, t_ce_rdyz h](j)}(h wr_cycle:h]h wr_cycle:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(ht_cez_w, t_ce_rdyzh]ht_cez_w, t_ce_rdyz}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hXNote: Many of gpmc timings are dependent on other gpmc timings (a few gpmc timings purely dependent on other gpmc timings, a reason that some of the gpmc timings are missing above), and it will result in indirect dependency of peripheral timings to gpmc timings other than mentioned above, refer timing routine for more details. To know what these peripheral timings correspond to, please see explanations in struct gpmc_device_timings definition. And for gpmc timings refer IP details (link above).h](j)}(hNote:h]hNote:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(hXMany of gpmc timings are dependent on other gpmc timings (a few gpmc timings purely dependent on other gpmc timings, a reason that some of the gpmc timings are missing above), and it will result in indirect dependency of peripheral timings to gpmc timings other than mentioned above, refer timing routine for more details. To know what these peripheral timings correspond to, please see explanations in struct gpmc_device_timings definition. And for gpmc timings refer IP details (link above).h]hXMany of gpmc timings are dependent on other gpmc timings (a few gpmc timings purely dependent on other gpmc timings, a reason that some of the gpmc timings are missing above), and it will result in indirect dependency of peripheral timings to gpmc timings other than mentioned above, refer timing routine for more details. To know what these peripheral timings correspond to, please see explanations in struct gpmc_device_timings definition. And for gpmc timings refer IP details (link above).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubeh}(h]h ]h"]h$]h&]uh1jhj_hhhhhNubeh}(h]gpmc-generic-timing-calculationah ]h"] gpmc generic timing calculation:ah$]h&]uh1hhhhhhhhKubeh}(h]&gpmc-general-purpose-memory-controllerah ]h"](gpmc (general purpose memory controller)ah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerja error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(j; j8 j3 j0 u nametypes}(j; j3 uh}(j8 hj0 j_u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages](hsystem_message)}(hhh]h)}(h:Enumerated list start value not ordinal-1: "2" (ordinal 2)h]h>Enumerated list start value not ordinal-1: “2” (ordinal 2)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]levelKtypeINFOsourcehlineKuh1j hj_hhhhhKAubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "3" (ordinal 3)h]h>Enumerated list start value not ordinal-1: “3” (ordinal 3)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhKJubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "4" (ordinal 4)h]h>Enumerated list start value not ordinal-1: “4” (ordinal 4)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhKUubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "5" (ordinal 5)h]h>Enumerated list start value not ordinal-1: “5” (ordinal 5)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhK`ubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "6" (ordinal 6)h]h>Enumerated list start value not ordinal-1: “6” (ordinal 6)}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2 ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhKkubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "7" (ordinal 7)h]h>Enumerated list start value not ordinal-1: “7” (ordinal 7)}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjM ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhKvubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "8" (ordinal 8)h]h>Enumerated list start value not ordinal-1: “8” (ordinal 8)}(hjk hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjh ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhKubj )}(hhh]h)}(h:Enumerated list start value not ordinal-1: "9" (ordinal 9)h]h>Enumerated list start value not ordinal-1: “9” (ordinal 9)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ubah}(h]h ]h"]h$]h&]levelKtypej sourcehlineKuh1j hj_hhhhhKubj )}(hhh]h)}(h