€•­|      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ7/translations/zh_CN/driver-api/media/drivers/pxa_camera”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ7/translations/zh_TW/driver-api/media/drivers/pxa_camera”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ7/translations/it_IT/driver-api/media/drivers/pxa_camera”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ7/translations/ja_JP/driver-api/media/drivers/pxa_camera”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ7/translations/ko_KR/driver-api/media/drivers/pxa_camera”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ7/translations/sp_SP/driver-api/media/drivers/pxa_camera”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒQ/var/lib/git/docbuild/linux/Documentation/driver-api/media/drivers/pxa_camera.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒPXA-Camera Host Driver”h]”hŒPXA-Camera Host Driver”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hŒ/Author: Robert Jarzmik <robert.jarzmik@free.fr>”h]”(hŒAuthor: Robert Jarzmik <”…””}”(hhËhžhhŸNh NubhŒ	reference”“”)”}”(hŒrobert.jarzmik@free.fr”h]”hŒrobert.jarzmik@free.fr”…””}”(hhÕhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:robert.jarzmik@free.fr”uh1hÓhhËubhŒ>”…””}”(hhËhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒConstraints”h]”hŒConstraints”…””}”(hhòhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhïhžhhŸh³h K	ubhŒenumerated_list”“”)”}”(hhh]”hŒ	list_item”“”)”}”(hŒ±Image size for YUV422P format
All YUV422P images are enforced to have width x height % 16 = 0.
This is due to DMA constraints, which transfers only planes of 8 byte
multiples.

”h]”hÊ)”}”(hŒ¯Image size for YUV422P format
All YUV422P images are enforced to have width x height % 16 = 0.
This is due to DMA constraints, which transfers only planes of 8 byte
multiples.”h]”hŒ¯Image size for YUV422P format
All YUV422P images are enforced to have width x height % 16 = 0.
This is due to DMA constraints, which transfers only planes of 8 byte
multiples.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œ
loweralpha”Œprefix”hŒsuffix”Œ)”uh1j   hhïhžhhŸh³h Kubeh}”(h]”Œconstraints”ah ]”h"]”Œconstraints”ah$]”h&]”uh1h´hh¶hžhhŸh³h K	ubhµ)”}”(hhh]”(hº)”}”(hŒGlobal video workflow”h]”hŒGlobal video workflow”…””}”(hj5  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj2  hžhhŸh³h Kubj  )”}”(hhh]”(j  )”}”(hŒ|QCI stopped
Initially, the QCI interface is stopped.
When a buffer is queued, start_streaming is called and the QCI starts.
”h]”hÊ)”}”(hŒ{QCI stopped
Initially, the QCI interface is stopped.
When a buffer is queued, start_streaming is called and the QCI starts.”h]”hŒ{QCI stopped
Initially, the QCI interface is stopped.
When a buffer is queued, start_streaming is called and the QCI starts.”…””}”(hjJ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjF  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjC  hžhhŸh³h Nubj  )”}”(hXµ  QCI started
More buffers can be queued while the QCI is started without halting the
capture.  The new buffers are "appended" at the tail of the DMA chain, and
smoothly captured one frame after the other.

Once a buffer is filled in the QCI interface, it is marked as "DONE" and
removed from the active buffers list. It can be then requeud or dequeued by
userland application.

Once the last buffer is filled in, the QCI interface stops.
”h]”(hÊ)”}”(hŒËQCI started
More buffers can be queued while the QCI is started without halting the
capture.  The new buffers are "appended" at the tail of the DMA chain, and
smoothly captured one frame after the other.”h]”hŒÏQCI started
More buffers can be queued while the QCI is started without halting the
capture.  The new buffers are â€œappendedâ€ at the tail of the DMA chain, and
smoothly captured one frame after the other.”…””}”(hjb  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj^  ubhÊ)”}”(hŒªOnce a buffer is filled in the QCI interface, it is marked as "DONE" and
removed from the active buffers list. It can be then requeud or dequeued by
userland application.”h]”hŒ®Once a buffer is filled in the QCI interface, it is marked as â€œDONEâ€ and
removed from the active buffers list. It can be then requeud or dequeued by
userland application.”…””}”(hjp  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj^  ubhÊ)”}”(hŒ;Once the last buffer is filled in, the QCI interface stops.”h]”hŒ;Once the last buffer is filled in, the QCI interface stops.”…””}”(hj~  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K!hj^  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hjC  hžhhŸh³h Nubj  )”}”(hŒ+Capture global finite state machine schema
”h]”hÊ)”}”(hŒ*Capture global finite state machine schema”h]”hŒ*Capture global finite state machine schema”…””}”(hj–  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K#hj’  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjC  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”j%  j&  j'  hj(  j)  uh1j   hj2  hžhhŸh³h KubhŒliteral_block”“”)”}”(hXÇ  +----+                             +---+  +----+
| DQ |                             | Q |  | DQ |
|    v                             |   v  |    v
+-----------+                     +------------------------+
|   STOP    |                     | Wait for capture start |
+-----------+         Q           +------------------------+
+-> | QCI: stop | ------------------> | QCI: run               | <------------+
|   | DMA: stop |                     | DMA: stop              |              |
|   +-----------+             +-----> +------------------------+              |
|                            /                            |                   |
|                           /             +---+  +----+   |                   |
|capture list empty        /              | Q |  | DQ |   | QCI Irq EOF       |
|                         /               |   v  |    v   v                   |
|   +--------------------+             +----------------------+               |
|   | DMA hotlink missed |             |    Capture running   |               |
|   +--------------------+             +----------------------+               |
|   | QCI: run           |     +-----> | QCI: run             | <-+           |
|   | DMA: stop          |    /        | DMA: run             |   |           |
|   +--------------------+   /         +----------------------+   | Other     |
|     ^                     /DMA still            |               | channels  |
|     | capture list       /  running             | DMA Irq End   | not       |
|     | not empty         /                       |               | finished  |
|     |                  /                        v               | yet       |
|   +----------------------+           +----------------------+   |           |
|   |  Videobuf released   |           |  Channel completed   |   |           |
|   +----------------------+           +----------------------+   |           |
+-- | QCI: run             |           | QCI: run             | --+           |
| DMA: run             |           | DMA: run             |               |
+----------------------+           +----------------------+               |
        ^                      /           |                           |
        |          no overrun /            | overrun                   |
        |                    /             v                           |
+--------------------+         /   +----------------------+               |
|  Frame completed   |        /    |     Frame overran    |               |
+--------------------+ <-----+     +----------------------+ restart frame |
| QCI: run           |             | QCI: stop            | --------------+
| DMA: run           |             | DMA: stop            |
+--------------------+             +----------------------+

Legend: - each box is a FSM state
        - each arrow is the condition to transition to another state
        - an arrow with a comment is a mandatory transition (no condition)
        - arrow "Q" means : a buffer was enqueued
        - arrow "DQ" means : a buffer was dequeued
        - "QCI: stop" means the QCI interface is not enabled
        - "DMA: stop" means all 3 DMA channels are stopped
        - "DMA: run" means at least 1 DMA channel is still running”h]”hXÇ  +----+                             +---+  +----+
| DQ |                             | Q |  | DQ |
|    v                             |   v  |    v
+-----------+                     +------------------------+
|   STOP    |                     | Wait for capture start |
+-----------+         Q           +------------------------+
+-> | QCI: stop | ------------------> | QCI: run               | <------------+
|   | DMA: stop |                     | DMA: stop              |              |
|   +-----------+             +-----> +------------------------+              |
|                            /                            |                   |
|                           /             +---+  +----+   |                   |
|capture list empty        /              | Q |  | DQ |   | QCI Irq EOF       |
|                         /               |   v  |    v   v                   |
|   +--------------------+             +----------------------+               |
|   | DMA hotlink missed |             |    Capture running   |               |
|   +--------------------+             +----------------------+               |
|   | QCI: run           |     +-----> | QCI: run             | <-+           |
|   | DMA: stop          |    /        | DMA: run             |   |           |
|   +--------------------+   /         +----------------------+   | Other     |
|     ^                     /DMA still            |               | channels  |
|     | capture list       /  running             | DMA Irq End   | not       |
|     | not empty         /                       |               | finished  |
|     |                  /                        v               | yet       |
|   +----------------------+           +----------------------+   |           |
|   |  Videobuf released   |           |  Channel completed   |   |           |
|   +----------------------+           +----------------------+   |           |
+-- | QCI: run             |           | QCI: run             | --+           |
| DMA: run             |           | DMA: run             |               |
+----------------------+           +----------------------+               |
        ^                      /           |                           |
        |          no overrun /            | overrun                   |
        |                    /             v                           |
+--------------------+         /   +----------------------+               |
|  Frame completed   |        /    |     Frame overran    |               |
+--------------------+ <-----+     +----------------------+ restart frame |
| QCI: run           |             | QCI: stop            | --------------+
| DMA: run           |             | DMA: stop            |
+--------------------+             +----------------------+

Legend: - each box is a FSM state
        - each arrow is the condition to transition to another state
        - an arrow with a comment is a mandatory transition (no condition)
        - arrow "Q" means : a buffer was enqueued
        - arrow "DQ" means : a buffer was dequeued
        - "QCI: stop" means the QCI interface is not enabled
        - "DMA: stop" means all 3 DMA channels are stopped
        - "DMA: run" means at least 1 DMA channel is still running”…””}”hj²  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²Œforce”‰Œlanguage”Œnone”Œhighlight_args”}”uh1j°  hŸh³h K%hj2  hžhubeh}”(h]”Œglobal-video-workflow”ah ]”h"]”Œglobal video workflow”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒ	DMA usage”h]”hŒ	DMA usage”…””}”(hjÐ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjÍ  hžhhŸh³h KXubj  )”}”(hhh]”(j  )”}”(hXÉ  DMA flow
  - first buffer queued for capture
    Once a first buffer is queued for capture, the QCI is started, but data
    transfer is not started. On "End Of Frame" interrupt, the irq handler
    starts the DMA chain.
  - capture of one videobuffer
    The DMA chain starts transferring data into videobuffer RAM pages.
    When all pages are transferred, the DMA irq is raised on "ENDINTR" status
  - finishing one videobuffer
    The DMA irq handler marks the videobuffer as "done", and removes it from
    the active running queue
    Meanwhile, the next videobuffer (if there is one), is transferred by DMA
  - finishing the last videobuffer
    On the DMA irq of the last videobuffer, the QCI is stopped.
”h]”hŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hX¯  DMA flow
- first buffer queued for capture
  Once a first buffer is queued for capture, the QCI is started, but data
  transfer is not started. On "End Of Frame" interrupt, the irq handler
  starts the DMA chain.
- capture of one videobuffer
  The DMA chain starts transferring data into videobuffer RAM pages.
  When all pages are transferred, the DMA irq is raised on "ENDINTR" status
- finishing one videobuffer
  The DMA irq handler marks the videobuffer as "done", and removes it from
  the active running queue
  Meanwhile, the next videobuffer (if there is one), is transferred by DMA
- finishing the last videobuffer
  On the DMA irq of the last videobuffer, the QCI is stopped.
”h]”(hŒterm”“”)”}”(hŒDMA flow”h]”hŒDMA flow”…””}”(hjò  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jð  hŸh³h Kghjì  ubhŒ
definition”“”)”}”(hhh]”hŒbullet_list”“”)”}”(hhh]”(j  )”}”(hŒÃfirst buffer queued for capture
Once a first buffer is queued for capture, the QCI is started, but data
transfer is not started. On "End Of Frame" interrupt, the irq handler
starts the DMA chain.”h]”hÊ)”}”(hŒÃfirst buffer queued for capture
Once a first buffer is queued for capture, the QCI is started, but data
transfer is not started. On "End Of Frame" interrupt, the irq handler
starts the DMA chain.”h]”hŒÇfirst buffer queued for capture
Once a first buffer is queued for capture, the QCI is started, but data
transfer is not started. On â€œEnd Of Frameâ€ interrupt, the irq handler
starts the DMA chain.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K[hj
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubj  )”}”(hŒ§capture of one videobuffer
The DMA chain starts transferring data into videobuffer RAM pages.
When all pages are transferred, the DMA irq is raised on "ENDINTR" status”h]”hÊ)”}”(hŒ§capture of one videobuffer
The DMA chain starts transferring data into videobuffer RAM pages.
When all pages are transferred, the DMA irq is raised on "ENDINTR" status”h]”hŒ«capture of one videobuffer
The DMA chain starts transferring data into videobuffer RAM pages.
When all pages are transferred, the DMA irq is raised on â€œENDINTRâ€ status”…””}”(hj&  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K_hj"  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubj  )”}”(hŒÄfinishing one videobuffer
The DMA irq handler marks the videobuffer as "done", and removes it from
the active running queue
Meanwhile, the next videobuffer (if there is one), is transferred by DMA”h]”hÊ)”}”(hŒÄfinishing one videobuffer
The DMA irq handler marks the videobuffer as "done", and removes it from
the active running queue
Meanwhile, the next videobuffer (if there is one), is transferred by DMA”h]”hŒÈfinishing one videobuffer
The DMA irq handler marks the videobuffer as â€œdoneâ€, and removes it from
the active running queue
Meanwhile, the next videobuffer (if there is one), is transferred by DMA”…””}”(hj>  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kbhj:  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubj  )”}”(hŒ[finishing the last videobuffer
On the DMA irq of the last videobuffer, the QCI is stopped.
”h]”hÊ)”}”(hŒZfinishing the last videobuffer
On the DMA irq of the last videobuffer, the QCI is stopped.”h]”hŒZfinishing the last videobuffer
On the DMA irq of the last videobuffer, the QCI is stopped.”…””}”(hjV  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KfhjR  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j  hŸh³h K[hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j   hjì  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jê  hŸh³h Kghjç  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jå  hjá  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÞ  hžhhŸNh Nubj  )”}”(hŒ-DMA prepared buffer will have this structure
”h]”hÊ)”}”(hŒ,DMA prepared buffer will have this structure”h]”hŒ,DMA prepared buffer will have this structure”…””}”(hjŽ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KihjŠ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÞ  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”j%  j&  j'  hj(  j)  uh1j   hjÍ  hžhhŸh³h KZubj±  )”}”(hŒ¤+------------+-----+---------------+-----------------+
| desc-sg[0] | ... | desc-sg[last] | finisher/linker |
+------------+-----+---------------+-----------------+”h]”hŒ¤+------------+-----+---------------+-----------------+
| desc-sg[0] | ... | desc-sg[last] | finisher/linker |
+------------+-----+---------------+-----------------+”…””}”hj¨  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²jÀ  ‰jÁ  Œnone”jÃ  }”uh1j°  hŸh³h KkhjÍ  hžhubhÊ)”}”(hŒNThis structure is pointed by dma->sg_cpu.
The descriptors are used as follows:”h]”hŒNThis structure is pointed by dma->sg_cpu.
The descriptors are used as follows:”…””}”(hj¸  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KqhjÍ  hžhubj  )”}”(hhh]”(j  )”}”(hŒ`desc-sg[i]: i-th descriptor, transferring the i-th sg
element to the video buffer scatter gather”h]”hÊ)”}”(hŒ`desc-sg[i]: i-th descriptor, transferring the i-th sg
element to the video buffer scatter gather”h]”hŒ`desc-sg[i]: i-th descriptor, transferring the i-th sg
element to the video buffer scatter gather”…””}”(hjÍ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KthjÉ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÆ  hžhhŸh³h Nubj  )”}”(hŒ-finisher: has ddadr=DADDR_STOP, dcmd=ENDIRQEN”h]”hÊ)”}”(hjã  h]”hŒ-finisher: has ddadr=DADDR_STOP, dcmd=ENDIRQEN”…””}”(hjå  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kvhjá  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÆ  hžhhŸh³h Nubj  )”}”(hŒ;linker: has ddadr= desc-sg[0] of next video buffer, dcmd=0
”h]”hÊ)”}”(hŒ:linker: has ddadr= desc-sg[0] of next video buffer, dcmd=0”h]”hŒ:linker: has ddadr= desc-sg[0] of next video buffer, dcmd=0”…””}”(hjü  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kwhjø  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjÆ  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jp  jq  uh1j  hŸh³h KthjÍ  hžhubhÊ)”}”(hŒŠFor the next schema, let's assume d0=desc-sg[0] .. dN=desc-sg[N],
"f" stands for finisher and "l" for linker.
A typical running chain is :”h]”hŒ”For the next schema, letâ€™s assume d0=desc-sg[0] .. dN=desc-sg[N],
â€œfâ€ stands for finisher and â€œlâ€ for linker.
A typical running chain is :”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KyhjÍ  hžhubj±  )”}”(hŒØ    Videobuffer 1         Videobuffer 2
+---------+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+---+
                 |    |
                 +----+”h]”hŒØ    Videobuffer 1         Videobuffer 2
+---------+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+---+
                 |    |
                 +----+”…””}”hj$  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²jÀ  ‰jÁ  Œnone”jÃ  }”uh1j°  hŸh³h K}hjÍ  hžhubhÊ)”}”(hŒ6After the chaining is finished, the chain looks like :”h]”hŒ6After the chaining is finished, the chain looks like :”…””}”(hj4  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K†hjÍ  hžhubj±  )”}”(hX‹      Videobuffer 1         Videobuffer 2         Videobuffer 3
+---------+----+---+  +----+----+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+
                 |    |                |    |
                 +----+                +----+
                                      new_link”h]”hX‹      Videobuffer 1         Videobuffer 2         Videobuffer 3
+---------+----+---+  +----+----+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+
                 |    |                |    |
                 +----+                +----+
                                      new_link”…””}”hjB  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²jÀ  ‰jÁ  Œnone”jÃ  }”uh1j°  hŸh³h KˆhjÍ  hžhubj  )”}”(hhh]”j  )”}”(hŒ!DMA hot chaining timeslice issue
”h]”hÊ)”}”(hŒ DMA hot chaining timeslice issue”h]”hŒ DMA hot chaining timeslice issue”…””}”(hjY  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K’hjU  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjR  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”j%  j&  j'  hj(  j)  Œstart”Kuh1j   hjÍ  hžhhŸh³h K’ubhÊ)”}”(hŒÎAs DMA chaining is done while DMA _is_ running, the linking may be done
while the DMA jumps from one Videobuffer to another. On the schema, that
would be a problem if the following sequence is encountered :”h]”hŒÎAs DMA chaining is done while DMA _is_ running, the linking may be done
while the DMA jumps from one Videobuffer to another. On the schema, that
would be a problem if the following sequence is encountered :”…””}”(hjt  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K”hjÍ  hžhubj  )”}”(hhh]”(j  )”}”(hŒ(DMA chain is Videobuffer1 + Videobuffer2”h]”hÊ)”}”(hj‡  h]”hŒ(DMA chain is Videobuffer1 + Videobuffer2”…””}”(hj‰  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K˜hj…  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj‚  hžhhŸh³h Nubj  )”}”(hŒ4pxa_videobuf_queue() is called to queue Videobuffer3”h]”hÊ)”}”(hjž  h]”hŒ4pxa_videobuf_queue() is called to queue Videobuffer3”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K™hjœ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj‚  hžhhŸh³h Nubj  )”}”(hŒ4DMA controller finishes Videobuffer2, and DMA stops
”h]”hÊ)”}”(hŒ3DMA controller finishes Videobuffer2, and DMA stops”h]”hŒ3DMA controller finishes Videobuffer2, and DMA stops”…””}”(hj·  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kšhj³  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj‚  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jp  jq  uh1j  hŸh³h K˜hjÍ  hžhubj±  )”}”(hX   =>
    Videobuffer 1         Videobuffer 2
+---------+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+-^-+
                 |    |                |
                 +----+                +-- DMA DDADR loads DDADR_STOP”h]”hX   =>
    Videobuffer 1         Videobuffer 2
+---------+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+-^-+
                 |    |                |
                 +----+                +-- DMA DDADR loads DDADR_STOP”…””}”hjÑ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²jÀ  ‰jÁ  Œnone”jÃ  }”uh1j°  hŸh³h KœhjÍ  hžhubj  )”}”(hhh]”(j  )”}”(hŒ~pxa_dma_add_tail_buf() is called, the Videobuffer2 "finisher" is
replaced by a "linker" to Videobuffer3 (creation of new_link)”h]”hÊ)”}”(hŒ~pxa_dma_add_tail_buf() is called, the Videobuffer2 "finisher" is
replaced by a "linker" to Videobuffer3 (creation of new_link)”h]”hŒ†pxa_dma_add_tail_buf() is called, the Videobuffer2 â€œfinisherâ€ is
replaced by a â€œlinkerâ€ to Videobuffer3 (creation of new_link)”…””}”(hjè  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¦hjä  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjá  hžhhŸh³h Nubj  )”}”(hŒpxa_videobuf_queue() finishes”h]”hÊ)”}”(hjþ  h]”hŒpxa_videobuf_queue() finishes”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¨hjü  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjá  hžhhŸh³h Nubj  )”}”(hŒ<the DMA irq handler is called, which terminates Videobuffer2”h]”hÊ)”}”(hj  h]”hŒ<the DMA irq handler is called, which terminates Videobuffer2”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K©hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjá  hžhhŸh³h Nubj  )”}”(hŒGVideobuffer3 capture is not scheduled on DMA chain (as it stopped !!!)
”h]”hÊ)”}”(hŒFVideobuffer3 capture is not scheduled on DMA chain (as it stopped !!!)”h]”hŒFVideobuffer3 capture is not scheduled on DMA chain (as it stopped !!!)”…””}”(hj.  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kªhj*  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjá  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jp  jq  uh1j  hŸh³h K¦hjÍ  hžhubj±  )”}”(hXÎ      Videobuffer 1         Videobuffer 2         Videobuffer 3
+---------+----+---+  +----+----+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+
                 |    |                |    |
                 +----+                +----+
                                      new_link
                                     DMA DDADR still is DDADR_STOP”h]”hXÎ      Videobuffer 1         Videobuffer 2         Videobuffer 3
+---------+----+---+  +----+----+----+---+  +----+----+----+---+
| d0 | .. | dN | l |  | d0 | .. | dN | l |  | d0 | .. | dN | f |
+---------+----+-|-+  ^----+----+----+-|-+  ^----+----+----+---+
                 |    |                |    |
                 +----+                +----+
                                      new_link
                                     DMA DDADR still is DDADR_STOP”…””}”hjH  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²jÀ  ‰jÁ  Œnone”jÃ  }”uh1j°  hŸh³h K¬hjÍ  hžhubj  )”}”(hhh]”(j  )”}”(hŒÚpxa_camera_check_link_miss() is called
This checks if the DMA is finished and a buffer is still on the
pcdev->capture list. If that's the case, the capture will be restarted,
and Videobuffer3 is scheduled on DMA chain.”h]”hÊ)”}”(hŒÚpxa_camera_check_link_miss() is called
This checks if the DMA is finished and a buffer is still on the
pcdev->capture list. If that's the case, the capture will be restarted,
and Videobuffer3 is scheduled on DMA chain.”h]”hŒÜpxa_camera_check_link_miss() is called
This checks if the DMA is finished and a buffer is still on the
pcdev->capture list. If thatâ€™s the case, the capture will be restarted,
and Videobuffer3 is scheduled on DMA chain.”…””}”(hj_  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K·hj[  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjX  hžhhŸh³h Nubj  )”}”(hŒthe DMA irq handler finishes
”h]”hÊ)”}”(hŒthe DMA irq handler finishes”h]”hŒthe DMA irq handler finishes”…””}”(hjw  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K»hjs  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjX  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jp  jq  uh1j  hŸh³h K·hjÍ  hžhubhŒnote”“”)”}”(hX  If DMA stops just after pxa_camera_check_link_miss() reads DDADR()
value, we have the guarantee that the DMA irq handler will be called back
when the DMA will finish the buffer, and pxa_camera_check_link_miss() will
be called again, to reschedule Videobuffer3.”h]”hÊ)”}”(hX  If DMA stops just after pxa_camera_check_link_miss() reads DDADR()
value, we have the guarantee that the DMA irq handler will be called back
when the DMA will finish the buffer, and pxa_camera_check_link_miss() will
be called again, to reschedule Videobuffer3.”h]”hX  If DMA stops just after pxa_camera_check_link_miss() reads DDADR()
value, we have the guarantee that the DMA irq handler will be called back
when the DMA will finish the buffer, and pxa_camera_check_link_miss() will
be called again, to reschedule Videobuffer3.”…””}”(hj—  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¿hj“  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j‘  hjÍ  hžhhŸh³h Nubeh}”(h]”Œ	dma-usage”ah ]”h"]”Œ	dma usage”ah$]”h&]”uh1h´hh¶hžhhŸh³h KXubeh}”(h]”Œpxa-camera-host-driver”ah ]”h"]”Œpxa-camera host driver”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jÞ  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j¸  jµ  j/  j,  jÊ  jÇ  j°  j­  uŒ	nametypes”}”(j¸  ‰j/  ‰jÊ  ‰j°  ‰uh}”(jµ  h¶j,  hïjÇ  j2  j­  jÍ  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”hŒsystem_message”“”)”}”(hhh]”hÊ)”}”(hŒ:Enumerated list start value not ordinal-1: "c" (ordinal 3)”h]”hŒ>Enumerated list start value not ordinal-1: â€œcâ€ (ordinal 3)”…””}”(hjE  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhjB  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”h³Œline”Kuh1j@  hjÍ  hžhhŸh³h K’ubaŒtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.