sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget#/translations/zh_CN/driver-api/edacmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/zh_TW/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/it_IT/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ja_JP/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ko_KR/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/sp_SP/driver-api/edacmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h-Error Detection And Correction (EDAC) Devicesh]h-Error Detection And Correction (EDAC) Devices}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh=/var/lib/git/docbuild/linux/Documentation/driver-api/edac.rsthKubh)}(hhh](h)}(h(Main Concepts used at the EDAC subsystemh]h(Main Concepts used at the EDAC subsystem}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hThere are several things to be aware of that aren't at all obvious, like *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*, etc...h](hKThere are several things to be aware of that aren’t at all obvious, like }(hhhhhNhNubhemphasis)}(h*sockets, *socket sets*h]hsockets, *socket sets}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }(hhhhhNhNubh)}(h*banks*h]hbanks}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }hhsbh)}(h*rows*h]hrows}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }hhsbh)}(h*chip-select rows*h]hchip-select rows}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }hhsbh)}(h *channels*h]hchannels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, etc...}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hThese are some of the many terms that are thrown about that don't always mean what people think they mean (Inconceivable!). In the interest of creating a common ground for discussion, terms and their definitions will be established.h]hThese are some of the many terms that are thrown about that don’t always mean what people think they mean (Inconceivable!). In the interest of creating a common ground for discussion, terms and their definitions will be established.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh bullet_list)}(hhh]h list_item)}(hMemory devices h]h)}(hMemory devicesh]hMemory devices}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjIubah}(h]h ]h"]h$]h&]uh1jGhjDhhhhhNubah}(h]h ]h"]h$]h&]bullet*uh1jBhhhKhhhhubh)}(hXThe individual DRAM chips on a memory stick. These devices commonly output 4 and 8 bits each (x4, x8). Grouping several of these in parallel provides the number of bits that the memory controller expects: typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.h]hXThe individual DRAM chips on a memory stick. These devices commonly output 4 and 8 bits each (x4, x8). Grouping several of these in parallel provides the number of bits that the memory controller expects: typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjC)}(hhh]jH)}(h Memory Stick h]h)}(h Memory Stickh]h Memory Stick}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjzubah}(h]h ]h"]h$]h&]uh1jGhjwhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKhhhhubh)}(hA printed circuit board that aggregates multiple memory devices in parallel. In general, this is the Field Replaceable Unit (FRU) which gets replaced, in the case of excessive errors. Most often it is also called DIMM (Dual Inline Memory Module).h]hA printed circuit board that aggregates multiple memory devices in parallel. In general, this is the Field Replaceable Unit (FRU) which gets replaced, in the case of excessive errors. Most often it is also called DIMM (Dual Inline Memory Module).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjC)}(hhh]jH)}(hMemory Socket h]h)}(h Memory Socketh]h Memory Socket}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKhhhhubh)}(hxA physical connector on the motherboard that accepts a single memory stick. Also called as "slot" on several datasheets.h]h|A physical connector on the motherboard that accepts a single memory stick. Also called as “slot” on several datasheets.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubjC)}(hhh]jH)}(hChannel h]h)}(hChannelh]hChannel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK#hjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhK#hhhhubh)}(hA memory controller channel, responsible to communicate with a group of DIMMs. Each channel has its own independent control (command) and data bus, and can be used independently or grouped with other channels.h]hA memory controller channel, responsible to communicate with a group of DIMMs. Each channel has its own independent control (command) and data bus, and can be used independently or grouped with other channels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hhhhubjC)}(hhh]jH)}(hBranch h]h)}(hBranchh]hBranch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhK)hhhhubh)}(hXIt is typically the highest hierarchy on a Fully-Buffered DIMM memory controller. Typically, it contains two channels. Two channels at the same branch can be used in single mode or in lockstep mode. When lockstep is enabled, the cacheline is doubled, but it generally brings some performance penalty. Also, it is generally not possible to point to just one memory stick when an error occurs, as the error correction code is calculated using two DIMMs instead of one. Due to that, it is capable of correcting more errors than on single mode.h]hXIt is typically the highest hierarchy on a Fully-Buffered DIMM memory controller. Typically, it contains two channels. Two channels at the same branch can be used in single mode or in lockstep mode. When lockstep is enabled, the cacheline is doubled, but it generally brings some performance penalty. Also, it is generally not possible to point to just one memory stick when an error occurs, as the error correction code is calculated using two DIMMs instead of one. Due to that, it is capable of correcting more errors than on single mode.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hhhhubjC)}(hhh]jH)}(hSingle-channel h]h)}(hSingle-channelh]hSingle-channel}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hj6ubah}(h]h ]h"]h$]h&]uh1jGhj3hhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhK4hhhhubh)}(hX>The data accessed by the memory controller is contained into one dimm only. E. g. if the data is 64 bits-wide, the data flows to the CPU using one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 memories. FB-DIMM and RAMBUS use a different concept for channel, so this concept doesn't apply there.h]hX@The data accessed by the memory controller is contained into one dimm only. E. g. if the data is 64 bits-wide, the data flows to the CPU using one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 memories. FB-DIMM and RAMBUS use a different concept for channel, so this concept doesn’t apply there.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hhhhubjC)}(hhh]jH)}(hDouble-channel h]h)}(hDouble-channelh]hDouble-channel}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjC)}(hhh]jH)}(hChip-select row h]h)}(hChip-select rowh]hChip-select row}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKChhhhubh)}(hX:This is the name of the DRAM signal used to select the DRAM ranks to be accessed. Common chip-select rows for single channel are 64 bits, for dual channel 128 bits. It may not be visible by the memory controller, as some DIMM types have a memory buffer that can hide direct access to it from the Memory Controller.h]hX:This is the name of the DRAM signal used to select the DRAM ranks to be accessed. Common chip-select rows for single channel are 64 bits, for dual channel 128 bits. It may not be visible by the memory controller, as some DIMM types have a memory buffer that can hide direct access to it from the Memory Controller.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhhhhubjC)}(hhh]jH)}(hSingle-Ranked stick h]h)}(hSingle-Ranked stickh]hSingle-Ranked stick}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKKhhhhubh)}(hA Single-ranked stick has 1 chip-select row of memory. Motherboards commonly drive two chip-select pins to a memory stick. A single-ranked stick, will occupy only one of those rows. The other will be unused.h]hA Single-ranked stick has 1 chip-select row of memory. Motherboards commonly drive two chip-select pins to a memory stick. A single-ranked stick, will occupy only one of those rows. The other will be unused.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhhhhubhtarget)}(h.. _doubleranked:h]h}(h]h ]h"]h$]h&]refid doublerankeduh1jhKQhhhhhhubjC)}(hhh]jH)}(hDouble-Ranked stick h]h)}(hDouble-Ranked stickh]hDouble-Ranked stick}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]jah ]h"] doublerankedah$]h&]jgjhuh1jBhhhKShhhhexpect_referenced_by_name}jjsexpect_referenced_by_id}jjsubh)}(hA double-ranked stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently.h]hA double-ranked stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhhhhubjC)}(hhh]jH)}(hDouble-sided stick h]h)}(hDouble-sided stickh]hDouble-sided stick}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKXhj4ubah}(h]h ]h"]h$]h&]uh1jGhj1hhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKXhhhhubh)}(hC**DEPRECATED TERM**, see :ref:`Double-Ranked stick `.h](hstrong)}(h**DEPRECATED TERM**h]hDEPRECATED TERM}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjRubh, see }(hjRhhhNhNubh)}(h):ref:`Double-Ranked stick `h]hinline)}(hjlh]hDouble-Ranked stick}(hjphhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jnhjjubah}(h]h ]h"]h$]h&]refdocdriver-api/edac refdomainj{reftyperef refexplicitrefwarn reftarget doublerankeduh1hhhhKZhjRubh.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKZhhhhubh)}(hA double-sided stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently. "Double-sided" is irrespective of the memory devices being mounted on both sides of the memory stick.h]hA double-sided stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently. “Double-sided” is irrespective of the memory devices being mounted on both sides of the memory stick.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hhhhubjC)}(hhh]jH)}(h Socket set h]h)}(h Socket seth]h Socket set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKahjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKahhhhubh)}(hAll of the memory sticks that are required for a single memory access or all of the memory sticks spanned by a chip-select row. A single socket set has two chip-select rows and if double-sided sticks are used these will occupy those chip-select rows.h]hAll of the memory sticks that are required for a single memory access or all of the memory sticks spanned by a chip-select row. A single socket set has two chip-select rows and if double-sided sticks are used these will occupy those chip-select rows.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchhhhubjC)}(hhh]jH)}(hBank h]h)}(hBankh]hBank}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKhhhhhubh)}(hpThis term is avoided because it is unclear when needing to distinguish between chip-select rows and socket sets.h]hpThis term is avoided because it is unclear when needing to distinguish between chip-select rows and socket sets.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhhhhubjC)}(hhh]jH)}(hHigh Bandwidth Memory (HBM) h]h)}(hHigh Bandwidth Memory (HBM)h]hHigh Bandwidth Memory (HBM)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1jGhjhhhhhNubah}(h]h ]h"]h$]h&]jgjhuh1jBhhhKmhhhhubh)}(hHBM is a new memory type with low power consumption and ultra-wide communication lanes. It uses vertically stacked memory chips (DRAM dies) interconnected by microscopic wires called "through-silicon vias," or TSVs.h]hHBM is a new memory type with low power consumption and ultra-wide communication lanes. It uses vertically stacked memory chips (DRAM dies) interconnected by microscopic wires called “through-silicon vias,” or TSVs.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohhhhubh)}(hSeveral stacks of HBM chips connect to the CPU or GPU through an ultra-fast interconnect called the "interposer". Therefore, HBM's characteristics are nearly indistinguishable from on-chip integrated RAM.h]hSeveral stacks of HBM chips connect to the CPU or GPU through an ultra-fast interconnect called the “interposer”. Therefore, HBM’s characteristics are nearly indistinguishable from on-chip integrated RAM.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthhhhubeh}(h](main-concepts-used-at-the-edac-subsystemah ]h"](main concepts used at the edac subsystemah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hMemory Controllersh]hMemory Controllers}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhhhhhKyubh)}(hXMost of the EDAC core is focused on doing Memory Controller error detection. The :c:func:`edac_mc_alloc`. It uses internally the struct ``mem_ctl_info`` to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.h](hQMost of the EDAC core is focused on doing Memory Controller error detection. The }(hj[hhhNhNubh)}(h:c:func:`edac_mc_alloc`h]hliteral)}(hjeh]hedac_mc_alloc()}(hjihhhNhNubah}(h]h ](jzcc-funceh"]h$]h&]uh1jghjcubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypefunc refexplicitrefwarnj edac_mc_allocuh1hhhhK{hj[ubh . It uses internally the struct }(hj[hhhNhNubjh)}(h``mem_ctl_info``h]h mem_ctl_info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghj[ubh~ to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK{hjJhhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singledev_type (C enum) c.dev_typehNtauh1jhjJhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhNubhdesc)}(hhh](hdesc_signature)}(hdev_typeh]hdesc_signature_line)}(h enum dev_typeh](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubh desc_name)}(hdev_typeh]h desc_sig_name)}(hjh]hdev_type}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jj add_permalinkuh1jsphinx_line_type declaratorhjhhhjhKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhjhKhjhhubh desc_content)}(hhh]h)}(h8describe the type of memory DRAM chips used at the stickh]h8describe the type of memory DRAM chips used at the stick}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKjj?j@jAuh1jhhhjJhjhNubjC)}(hXm**Constants** ``HW_EVENT_ERR_CORRECTED`` Corrected Error - Indicates that an ECC corrected error was detected ``HW_EVENT_ERR_UNCORRECTED`` Uncorrected Error - Indicates an error that can't be corrected by ECC, but it is not fatal (maybe it is on an unused memory area, or the memory controller could recover from it for example, by re-trying the operation). ``HW_EVENT_ERR_DEFERRED`` Deferred Error - Indicates an uncorrectable error whose handling is not urgent. This could be due to hardware data poisoning where the system can continue operation until the poisoned data is consumed. Preemptive measures may also be taken, e.g. offlining pages, etc. ``HW_EVENT_ERR_FATAL`` Fatal Error - Uncorrected error that could not be recovered. ``HW_EVENT_ERR_INFO`` Informational - The CPER spec defines a forth type of error: informational logs.h](h)}(h **Constants**h]jW)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKahjubja)}(hhh](jf)}(h```HW_EVENT_ERR_CORRECTED`` Corrected Error - Indicates that an ECC corrected error was detected h](jl)}(h``HW_EVENT_ERR_CORRECTED``h]jh)}(hjh]hHW_EVENT_ERR_CORRECTED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKehjubj)}(hhh]h)}(hDCorrected Error - Indicates that an ECC corrected error was detectedh]hDCorrected Error - Indicates that an ECC corrected error was detected}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKdhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhKehjubjf)}(h``HW_EVENT_ERR_UNCORRECTED`` Uncorrected Error - Indicates an error that can't be corrected by ECC, but it is not fatal (maybe it is on an unused memory area, or the memory controller could recover from it for example, by re-trying the operation). h](jl)}(h``HW_EVENT_ERR_UNCORRECTED``h]jh)}(hj>h]hHW_EVENT_ERR_UNCORRECTED}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj<ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKlhj8ubj)}(hhh]h)}(hUncorrected Error - Indicates an error that can't be corrected by ECC, but it is not fatal (maybe it is on an unused memory area, or the memory controller could recover from it for example, by re-trying the operation).h]hUncorrected Error - Indicates an error that can’t be corrected by ECC, but it is not fatal (maybe it is on an unused memory area, or the memory controller could recover from it for example, by re-trying the operation).}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhhjTubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jehjShKlhjubjf)}(hX&``HW_EVENT_ERR_DEFERRED`` Deferred Error - Indicates an uncorrectable error whose handling is not urgent. This could be due to hardware data poisoning where the system can continue operation until the poisoned data is consumed. Preemptive measures may also be taken, e.g. offlining pages, etc. h](jl)}(h``HW_EVENT_ERR_DEFERRED``h]jh)}(hjxh]hHW_EVENT_ERR_DEFERRED}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjvubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKthjrubj)}(hhh]h)}(hX Deferred Error - Indicates an uncorrectable error whose handling is not urgent. This could be due to hardware data poisoning where the system can continue operation until the poisoned data is consumed. Preemptive measures may also be taken, e.g. offlining pages, etc.h]hX Deferred Error - Indicates an uncorrectable error whose handling is not urgent. This could be due to hardware data poisoning where the system can continue operation until the poisoned data is consumed. Preemptive measures may also be taken, e.g. offlining pages, etc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKohjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jehjhKthjubjf)}(hT``HW_EVENT_ERR_FATAL`` Fatal Error - Uncorrected error that could not be recovered. h](jl)}(h``HW_EVENT_ERR_FATAL``h]jh)}(hjh]hHW_EVENT_ERR_FATAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKxhjubj)}(hhh]h)}(hj j?j@jAuh1jhhhjJhjhNubjC)}(hX**Constants** ``MEM_EMPTY`` Empty csrow ``MEM_RESERVED`` Reserved csrow type ``MEM_UNKNOWN`` Unknown csrow type ``MEM_FPM`` FPM - Fast Page Mode, used on systems up to 1995. ``MEM_EDO`` EDO - Extended data out, used on systems up to 1998. ``MEM_BEDO`` BEDO - Burst Extended data out, an EDO variant. ``MEM_SDR`` SDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank. ``MEM_RDR`` Registered SDR SDRAM ``MEM_DDR`` Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAM ``MEM_RDDR`` Registered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller. ``MEM_RMBS`` Rambus DRAM, used on a few Pentium III/IV controllers. ``MEM_DDR2`` DDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR. ``MEM_FB_DDR2`` Fully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal. ``MEM_RDDR2`` Registered DDR2 RAM This is a variant of the DDR2 memories. ``MEM_XDR`` Rambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it. ``MEM_DDR3`` DDR3 RAM ``MEM_RDDR3`` Registered DDR3 RAM This is a variant of the DDR3 memories. ``MEM_LRDDR3`` Load-Reduced DDR3 memory. ``MEM_LPDDR3`` Low-Power DDR3 memory. ``MEM_DDR4`` Unbuffered DDR4 RAM ``MEM_RDDR4`` Registered DDR4 RAM This is a variant of the DDR4 memories. ``MEM_LRDDR4`` Load-Reduced DDR4 memory. ``MEM_LPDDR4`` Low-Power DDR4 memory. ``MEM_DDR5`` Unbuffered DDR5 RAM ``MEM_RDDR5`` Registered DDR5 RAM ``MEM_LRDDR5`` Load-Reduced DDR5 memory. ``MEM_NVDIMM`` Non-volatile RAM ``MEM_WIO2`` Wide I/O 2. ``MEM_HBM2`` High bandwidth Memory Gen 2. ``MEM_HBM3`` High bandwidth Memory Gen 3.h](h)}(h **Constants**h]jW)}(hj h]h Constants}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubja)}(hhh](jf)}(h``MEM_EMPTY`` Empty csrow h](jl)}(h ``MEM_EMPTY``h]jh)}(hj h]h MEM_EMPTY}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h Empty csrowh]h Empty csrow}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h%``MEM_RESERVED`` Reserved csrow type h](jl)}(h``MEM_RESERVED``h]jh)}(hj h]h MEM_RESERVED}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hReserved csrow typeh]hReserved csrow type}(hj+ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj' hKhj( ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj' hKhj ubjf)}(h#``MEM_UNKNOWN`` Unknown csrow type h](jl)}(h``MEM_UNKNOWN``h]jh)}(hjK h]h MEM_UNKNOWN}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjI ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjE ubj)}(hhh]h)}(hUnknown csrow typeh]hUnknown csrow type}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj` hKhja ubah}(h]h ]h"]h$]h&]uh1jhjE ubeh}(h]h ]h"]h$]h&]uh1jehj` hKhj ubjf)}(h>``MEM_FPM`` FPM - Fast Page Mode, used on systems up to 1995. h](jl)}(h ``MEM_FPM``h]jh)}(hj h]hMEM_FPM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj~ ubj)}(hhh]h)}(h1FPM - Fast Page Mode, used on systems up to 1995.h]h1FPM - Fast Page Mode, used on systems up to 1995.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj~ ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(hA``MEM_EDO`` EDO - Extended data out, used on systems up to 1998. h](jl)}(h ``MEM_EDO``h]jh)}(hj h]hMEM_EDO}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h4EDO - Extended data out, used on systems up to 1998.h]h4EDO - Extended data out, used on systems up to 1998.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h=``MEM_BEDO`` BEDO - Burst Extended data out, an EDO variant. h](jl)}(h ``MEM_BEDO``h]jh)}(hj h]hMEM_BEDO}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h/BEDO - Burst Extended data out, an EDO variant.h]h/BEDO - Burst Extended data out, an EDO variant.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h``MEM_SDR`` SDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank. h](jl)}(h ``MEM_SDR``h]jh)}(hj/ h]hMEM_SDR}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj- ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj) ubj)}(hhh]h)}(hSDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.h](hSDR - Single data rate SDRAM }(hjH hhhNhNubj )}(hEhttp://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memoryh]hEhttp://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory}(hjP hhhNhNubah}(h]h ]h"]h$]h&]refurijR uh1j hjH ubhw They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.}(hjH hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjE ubah}(h]h ]h"]h$]h&]uh1jhj) ubeh}(h]h ]h"]h$]h&]uh1jehjD hKhj ubjf)}(h!``MEM_RDR`` Registered SDR SDRAM h](jl)}(h ``MEM_RDR``h]jh)}(hj| h]hMEM_RDR}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjz ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjv ubj)}(hhh]h)}(hRegistered SDR SDRAMh]hRegistered SDR SDRAM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjv ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(hJ``MEM_DDR`` Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAM h](jl)}(h ``MEM_DDR``h]jh)}(hj h]hMEM_DDR}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h=Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAMh](hDouble data rate SDRAM }(hj hhhNhNubj )}(h&http://en.wikipedia.org/wiki/DDR_SDRAMh]h&http://en.wikipedia.org/wiki/DDR_SDRAM}(hj hhhNhNubah}(h]h ]h"]h$]h&]refurij uh1j hj ubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h``MEM_RDDR`` Registered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller. h](jl)}(h ``MEM_RDDR``h]jh)}(hj h]hMEM_RDDR}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hRegistered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller.h]hRegistered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(hD``MEM_RMBS`` Rambus DRAM, used on a few Pentium III/IV controllers. h](jl)}(h ``MEM_RMBS``h]jh)}(hj8 h]hMEM_RMBS}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj6 ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj2 ubj)}(hhh]h)}(h6Rambus DRAM, used on a few Pentium III/IV controllers.h]h6Rambus DRAM, used on a few Pentium III/IV controllers.}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjM hKhjN ubah}(h]h ]h"]h$]h&]uh1jhj2 ubeh}(h]h ]h"]h$]h&]uh1jehjM hKhj ubjf)}(h``MEM_DDR2`` DDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR. h](jl)}(h ``MEM_DDR2``h]jh)}(hjq h]hMEM_DDR2}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjo ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjk ubj)}(hhh]h)}(hzDDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR.h]hDDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as “PC2-” instead of “PC” to differentiate from DDR.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhjk ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h``MEM_FB_DDR2`` Fully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal. h](jl)}(h``MEM_FB_DDR2``h]jh)}(hj h]h MEM_FB_DDR2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hFully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal.h]hFully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(hJ``MEM_RDDR2`` Registered DDR2 RAM This is a variant of the DDR2 memories. h](jl)}(h ``MEM_RDDR2``h]jh)}(hj h]h MEM_RDDR2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h;Registered DDR2 RAM This is a variant of the DDR2 memories.h]h;Registered DDR2 RAM This is a variant of the DDR2 memories.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h``MEM_XDR`` Rambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it. h](jl)}(h ``MEM_XDR``h]jh)}(hj h]hMEM_XDR}(hj! hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hRambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it.h]hRambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren’t used on any x86 arch, but cell_edac PPC memory controller uses it.}(hj8 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj5 ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj4 hKhj ubjf)}(h``MEM_DDR3`` DDR3 RAM h](jl)}(h ``MEM_DDR3``h]jh)}(hjY h]hMEM_DDR3}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjW ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjS ubj)}(hhh]h)}(hDDR3 RAMh]hDDR3 RAM}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjn hKhjo ubah}(h]h ]h"]h$]h&]uh1jhjS ubeh}(h]h ]h"]h$]h&]uh1jehjn hKhj ubjf)}(hJ``MEM_RDDR3`` Registered DDR3 RAM This is a variant of the DDR3 memories. h](jl)}(h ``MEM_RDDR3``h]jh)}(hj h]h MEM_RDDR3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h;Registered DDR3 RAM This is a variant of the DDR3 memories.h]h;Registered DDR3 RAM This is a variant of the DDR3 memories.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h)``MEM_LRDDR3`` Load-Reduced DDR3 memory. h](jl)}(h``MEM_LRDDR3``h]jh)}(hj h]h MEM_LRDDR3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hLoad-Reduced DDR3 memory.h]hLoad-Reduced DDR3 memory.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj hKhj ubjf)}(h&``MEM_LPDDR3`` Low-Power DDR3 memory. h](jl)}(h``MEM_LPDDR3``h]jh)}(hjh]h MEM_LPDDR3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hLow-Power DDR3 memory.h]hLow-Power DDR3 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h!``MEM_DDR4`` Unbuffered DDR4 RAM h](jl)}(h ``MEM_DDR4``h]jh)}(hj>h]hMEM_DDR4}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj<ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj8ubj)}(hhh]h)}(hUnbuffered DDR4 RAMh]hUnbuffered DDR4 RAM}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShKhjTubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jehjShKhj ubjf)}(hJ``MEM_RDDR4`` Registered DDR4 RAM This is a variant of the DDR4 memories. h](jl)}(h ``MEM_RDDR4``h]jh)}(hjwh]h MEM_RDDR4}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjuubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjqubj)}(hhh]h)}(h;Registered DDR4 RAM This is a variant of the DDR4 memories.h]h;Registered DDR4 RAM This is a variant of the DDR4 memories.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h)``MEM_LRDDR4`` Load-Reduced DDR4 memory. h](jl)}(h``MEM_LRDDR4``h]jh)}(hjh]h MEM_LRDDR4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLoad-Reduced DDR4 memory.h]hLoad-Reduced DDR4 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h&``MEM_LPDDR4`` Low-Power DDR4 memory. h](jl)}(h``MEM_LPDDR4``h]jh)}(hjh]h MEM_LPDDR4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLow-Power DDR4 memory.h]hLow-Power DDR4 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h!``MEM_DDR5`` Unbuffered DDR5 RAM h](jl)}(h ``MEM_DDR5``h]jh)}(hj#h]hMEM_DDR5}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj!ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hUnbuffered DDR5 RAMh]hUnbuffered DDR5 RAM}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hKhj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj8hKhj ubjf)}(h"``MEM_RDDR5`` Registered DDR5 RAM h](jl)}(h ``MEM_RDDR5``h]jh)}(hj\h]h MEM_RDDR5}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjZubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjVubj)}(hhh]h)}(hRegistered DDR5 RAMh]hRegistered DDR5 RAM}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhKhjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jehjqhKhj ubjf)}(h)``MEM_LRDDR5`` Load-Reduced DDR5 memory. h](jl)}(h``MEM_LRDDR5``h]jh)}(hjh]h MEM_LRDDR5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLoad-Reduced DDR5 memory.h]hLoad-Reduced DDR5 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h ``MEM_NVDIMM`` Non-volatile RAM h](jl)}(h``MEM_NVDIMM``h]jh)}(hjh]h MEM_NVDIMM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hNon-volatile RAMh]hNon-volatile RAM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h``MEM_WIO2`` Wide I/O 2. h](jl)}(h ``MEM_WIO2``h]jh)}(hjh]hMEM_WIO2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(h Wide I/O 2.h]h Wide I/O 2.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubjf)}(h*``MEM_HBM2`` High bandwidth Memory Gen 2. h](jl)}(h ``MEM_HBM2``h]jh)}(hj@h]hMEM_HBM2}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jghj>ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj:ubj)}(hhh]h)}(hHigh bandwidth Memory Gen 2.h]hHigh bandwidth Memory Gen 2.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhKhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jehjUhKhj ubjf)}(h)``MEM_HBM3`` High bandwidth Memory Gen 3.h](jl)}(h ``MEM_HBM3``h]jh)}(hjyh]hMEM_HBM3}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjwubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjsubj)}(hhh]h)}(hHigh bandwidth Memory Gen 3.h]hHigh bandwidth Memory Gen 3.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jehjhKhj ubeh}(h]h ]h"]h$]h&]uh1j`hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_type (C enum) c.edac_typehNtauh1jhjJhhhjhNubj)}(hhh](j)}(h edac_typeh]j)}(henum edac_typeh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h edac_typeh]j)}(hjh]h edac_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h4Error Detection and Correction capabilities and modeh]h4Error Detection and Correction capabilities and mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jsenumeh"]h$]h&]j<jsj=j-j>j-j?j@jAuh1jhhhjJhjhNubjC)}(hX**Constants** ``EDAC_UNKNOWN`` Unknown if ECC is available ``EDAC_NONE`` Doesn't support ECC ``EDAC_RESERVED`` Reserved ECC type ``EDAC_PARITY`` Detects parity errors ``EDAC_EC`` Error Checking - no correction ``EDAC_SECDED`` Single bit error correction, Double detection ``EDAC_S2ECD2ED`` Chipkill x2 devices - do these exist? ``EDAC_S4ECD4ED`` Chipkill x4 devices ``EDAC_S8ECD8ED`` Chipkill x8 devices ``EDAC_S16ECD16ED`` Chipkill x16 devicesh](h)}(h **Constants**h]jW)}(hj7h]h Constants}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj5ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj1ubja)}(hhh](jf)}(h-``EDAC_UNKNOWN`` Unknown if ECC is available h](jl)}(h``EDAC_UNKNOWN``h]jh)}(hjVh]h EDAC_UNKNOWN}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjTubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjPubj)}(hhh]h)}(hUnknown if ECC is availableh]hUnknown if ECC is available}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjlubah}(h]h ]h"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]uh1jehjkhMhjMubjf)}(h"``EDAC_NONE`` Doesn't support ECC h](jl)}(h ``EDAC_NONE``h]jh)}(hjh]h EDAC_NONE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjubj)}(hhh]h)}(hDoesn't support ECCh]hDoesn’t support ECC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM hjMubjf)}(h$``EDAC_RESERVED`` Reserved ECC type h](jl)}(h``EDAC_RESERVED``h]jh)}(hjh]h EDAC_RESERVED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjubj)}(hhh]h)}(hReserved ECC typeh]hReserved ECC type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM hjMubjf)}(h&``EDAC_PARITY`` Detects parity errors h](jl)}(h``EDAC_PARITY``h]jh)}(hjh]h EDAC_PARITY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hDetects parity errorsh]hDetects parity errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjMubjf)}(h+``EDAC_EC`` Error Checking - no correction h](jl)}(h ``EDAC_EC``h]jh)}(hj:h]hEDAC_EC}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj8ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj4ubj)}(hhh]h)}(hError Checking - no correctionh]hError Checking - no correction}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jehjOhMhjMubjf)}(h>``EDAC_SECDED`` Single bit error correction, Double detection h](jl)}(h``EDAC_SECDED``h]jh)}(hjsh]h EDAC_SECDED}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjqubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjmubj)}(hhh]h)}(h-Single bit error correction, Double detectionh]h-Single bit error correction, Double detection}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jehjhMhjMubjf)}(h8``EDAC_S2ECD2ED`` Chipkill x2 devices - do these exist? h](jl)}(h``EDAC_S2ECD2ED``h]jh)}(hjh]h EDAC_S2ECD2ED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h%Chipkill x2 devices - do these exist?h]h%Chipkill x2 devices - do these exist?}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjMubjf)}(h&``EDAC_S4ECD4ED`` Chipkill x4 devices h](jl)}(h``EDAC_S4ECD4ED``h]jh)}(hjh]h EDAC_S4ECD4ED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hChipkill x4 devicesh]hChipkill x4 devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjMubjf)}(h&``EDAC_S8ECD8ED`` Chipkill x8 devices h](jl)}(h``EDAC_S8ECD8ED``h]jh)}(hjh]h EDAC_S8ECD8ED}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hChipkill x8 devicesh]hChipkill x8 devices}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMhj4ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj3hMhjMubjf)}(h(``EDAC_S16ECD16ED`` Chipkill x16 devicesh](jl)}(h``EDAC_S16ECD16ED``h]jh)}(hjWh]hEDAC_S16ECD16ED}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjUubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM!hjQubj)}(hhh]h)}(hChipkill x16 devicesh]hChipkill x16 devices}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM"hjmubah}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jehjlhM!hjMubeh}(h]h ]h"]h$]h&]uh1j`hj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jscrub_type (C enum) c.scrub_typehNtauh1jhjJhhhjhNubj)}(hhh](j)}(h scrub_typeh]j)}(henum scrub_typeh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM(ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM(ubj)}(h scrub_typeh]j)}(hjh]h scrub_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM(ubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhjhM(ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM(hjhhubj)}(hhh]h)}(hscrubbing capabilitiesh]hscrubbing capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM$hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM(ubeh}(h]h ](jsenumeh"]h$]h&]j<jsj=j j>j j?j@jAuh1jhhhjJhjhNubjC)}(hX1**Constants** ``SCRUB_UNKNOWN`` Unknown if scrubber is available ``SCRUB_NONE`` No scrubber ``SCRUB_SW_PROG`` SW progressive (sequential) scrubbing ``SCRUB_SW_SRC`` Software scrub only errors ``SCRUB_SW_PROG_SRC`` Progressive software scrub from an error ``SCRUB_SW_TUNABLE`` Software scrub frequency is tunable ``SCRUB_HW_PROG`` HW progressive (sequential) scrubbing ``SCRUB_HW_SRC`` Hardware scrub only errors ``SCRUB_HW_PROG_SRC`` Progressive hardware scrub from an error ``SCRUB_HW_TUNABLE`` Hardware scrub frequency is tunableh](h)}(h **Constants**h]jW)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM(hjubja)}(hhh](jf)}(h3``SCRUB_UNKNOWN`` Unknown if scrubber is available h](jl)}(h``SCRUB_UNKNOWN``h]jh)}(hj4h]h SCRUB_UNKNOWN}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj2ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM+hj.ubj)}(hhh]h)}(h Unknown if scrubber is availableh]h Unknown if scrubber is available}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhM+hjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jehjIhM+hj+ubjf)}(h``SCRUB_NONE`` No scrubber h](jl)}(h``SCRUB_NONE``h]jh)}(hjmh]h SCRUB_NONE}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jghjkubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM.hjgubj)}(hhh]h)}(h No scrubberh]h No scrubber}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM.hjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jehjhM.hj+ubjf)}(h8``SCRUB_SW_PROG`` SW progressive (sequential) scrubbing h](jl)}(h``SCRUB_SW_PROG``h]jh)}(hjh]h SCRUB_SW_PROG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM1hjubj)}(hhh]h)}(h%SW progressive (sequential) scrubbingh]h%SW progressive (sequential) scrubbing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM1hj+ubjf)}(h,``SCRUB_SW_SRC`` Software scrub only errors h](jl)}(h``SCRUB_SW_SRC``h]jh)}(hjh]h SCRUB_SW_SRC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM4hjubj)}(hhh]h)}(hSoftware scrub only errorsh]hSoftware scrub only errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM4hj+ubjf)}(h?``SCRUB_SW_PROG_SRC`` Progressive software scrub from an error h](jl)}(h``SCRUB_SW_PROG_SRC``h]jh)}(hjh]hSCRUB_SW_PROG_SRC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM7hjubj)}(hhh]h)}(h(Progressive software scrub from an errorh]h(Progressive software scrub from an error}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hM7hj.ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj-hM7hj+ubjf)}(h9``SCRUB_SW_TUNABLE`` Software scrub frequency is tunable h](jl)}(h``SCRUB_SW_TUNABLE``h]jh)}(hjQh]hSCRUB_SW_TUNABLE}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jghjOubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM:hjKubj)}(hhh]h)}(h#Software scrub frequency is tunableh]h#Software scrub frequency is tunable}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhM:hjgubah}(h]h ]h"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]uh1jehjfhM:hj+ubjf)}(h8``SCRUB_HW_PROG`` HW progressive (sequential) scrubbing h](jl)}(h``SCRUB_HW_PROG``h]jh)}(hjh]h SCRUB_HW_PROG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM=hjubj)}(hhh]h)}(h%HW progressive (sequential) scrubbingh]h%HW progressive (sequential) scrubbing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM=hj+ubjf)}(h,``SCRUB_HW_SRC`` Hardware scrub only errors h](jl)}(h``SCRUB_HW_SRC``h]jh)}(hjh]h SCRUB_HW_SRC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM@hjubj)}(hhh]h)}(hHardware scrub only errorsh]hHardware scrub only errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM@hj+ubjf)}(h?``SCRUB_HW_PROG_SRC`` Progressive hardware scrub from an error h](jl)}(h``SCRUB_HW_PROG_SRC``h]jh)}(hjh]hSCRUB_HW_PROG_SRC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMChjubj)}(hhh]h)}(h(Progressive hardware scrub from an errorh]h(Progressive hardware scrub from an error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMChj+ubjf)}(h8``SCRUB_HW_TUNABLE`` Hardware scrub frequency is tunableh](jl)}(h``SCRUB_HW_TUNABLE``h]jh)}(hj5h]hSCRUB_HW_TUNABLE}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj3ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMEhj/ubj)}(hhh]h)}(h#Hardware scrub frequency is tunableh]h#Hardware scrub frequency is tunable}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMFhjKubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jehjJhMEhj+ubeh}(h]h ]h"]h$]h&]uh1j`hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_layer_type (C enum)c.edac_mc_layer_typehNtauh1jhjJhhhjhNubj)}(hhh](j)}(hedac_mc_layer_typeh]j)}(henum edac_mc_layer_typeh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMLubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMLubj)}(hedac_mc_layer_typeh]j)}(hjh]hedac_mc_layer_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMLubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhjhMLubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMLhjhhubj)}(hhh]h)}(h!memory controller hierarchy layerh]h!memory controller hierarchy layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMPhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMLubeh}(h]h ](jsenumeh"]h$]h&]j<jsj=jj>jj?j@jAuh1jhhhjJhjhNubjC)}(hX**Constants** ``EDAC_MC_LAYER_BRANCH`` memory layer is named "branch" ``EDAC_MC_LAYER_CHANNEL`` memory layer is named "channel" ``EDAC_MC_LAYER_SLOT`` memory layer is named "slot" ``EDAC_MC_LAYER_CHIP_SELECT`` memory layer is named "chip select" ``EDAC_MC_LAYER_ALL_MEM`` memory layout is unknown. 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This is used when retrieving errors from a firmware driven driver.h](h)}(h **Constants**h]jW)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMThjubja)}(hhh](jf)}(h8``EDAC_MC_LAYER_BRANCH`` memory layer is named "branch" h](jl)}(h``EDAC_MC_LAYER_BRANCH``h]jh)}(hjh]hEDAC_MC_LAYER_BRANCH}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMWhj ubj)}(hhh]h)}(hmemory layer is named "branch"h]h"memory layer is named “branch”}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMWhj(ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jehj'hMWhj ubjf)}(h:``EDAC_MC_LAYER_CHANNEL`` memory layer is named "channel" h](jl)}(h``EDAC_MC_LAYER_CHANNEL``h]jh)}(hjKh]hEDAC_MC_LAYER_CHANNEL}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjIubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMZhjEubj)}(hhh]h)}(hmemory layer is named "channel"h]h#memory layer is named “channel”}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMZhjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jehj`hMZhj ubjf)}(h4``EDAC_MC_LAYER_SLOT`` memory layer is named "slot" h](jl)}(h``EDAC_MC_LAYER_SLOT``h]jh)}(hjh]hEDAC_MC_LAYER_SLOT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM]hj~ubj)}(hhh]h)}(hmemory layer is named "slot"h]h memory layer is named “slot”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jehjhM]hj ubjf)}(hB``EDAC_MC_LAYER_CHIP_SELECT`` memory layer is named "chip select" h](jl)}(h``EDAC_MC_LAYER_CHIP_SELECT``h]jh)}(hjh]hEDAC_MC_LAYER_CHIP_SELECT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM`hjubj)}(hhh]h)}(h#memory layer is named "chip select"h]h'memory layer is named “chip select”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhM`hj ubjf)}(h``EDAC_MC_LAYER_ALL_MEM`` memory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h](jl)}(h``EDAC_MC_LAYER_ALL_MEM``h]jh)}(hjh]hEDAC_MC_LAYER_ALL_MEM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMdhjubj)}(hhh]h)}(hmemory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h]hmemory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMchj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj hMdhj ubeh}(h]h ]h"]h$]h&]uh1j`hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubh)}(h**Description**h]jW)}(hj9h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj7ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhhjJhhubh)}(hxThis enum is used by the drivers to tell edac_mc_sysfs what name should be used when describing a memory stick location.h]hxThis enum is used by the drivers to tell edac_mc_sysfs what name should be used when describing a memory stick location.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMZhjJhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_layer (C struct)c.edac_mc_layerhNtauh1jhjJhhhjhNubj)}(hhh](j)}(h edac_mc_layerh]j)}(hstruct edac_mc_layerh](j)}(hstructh]hstruct}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM`ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhjhM`ubj)}(h edac_mc_layerh]j)}(hjqh]h edac_mc_layer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjshhhjhM`ubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjohhhjhM`ubah}(h]jjah ](jjeh"]h$]h&]jj)jhuh1jhjhM`hjlhhubj)}(hhh]h)}(h)describes the memory controller hierarchyh]h)describes the memory controller hierarchy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMfhjhhubah}(h]h ]h"]h$]h&]uh1jhjlhhhjhM`ubeh}(h]h ](jsstructeh"]h$]h&]j<jsj=jj>jj?j@jAuh1jhhhjJhjhNubjC)}(hX**Definition**:: struct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; }; **Members** ``type`` layer type ``size`` number of components per layer. For example, if the channel layer has two channels, size = 2 ``is_virt_csrow`` This layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh](h)}(h**Definition**::h](jW)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMjhjubh literal_block)}(hfstruct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; };h]hfstruct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; };}hjsbah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMlhjubh)}(h **Members**h]jW)}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhjubja)}(hhh](jf)}(h``type`` layer type h](jl)}(h``type``h]jh)}(hj)h]htype}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj'ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhhj#ubj)}(hhh]h)}(h layer typeh]h layer type}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jehj>hMhhj ubjf)}(hf``size`` number of components per layer. For example, if the channel layer has two channels, size = 2 h](jl)}(h``size``h]jh)}(hjbh]hsize}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jghj`ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMjhj\ubj)}(hhh]h)}(h\number of components per layer. For example, if the channel layer has two channels, size = 2h]h\number of components per layer. For example, if the channel layer has two channels, size = 2}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMihjxubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jehjwhMjhj ubjf)}(hz``is_virt_csrow`` This layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh](jl)}(h``is_virt_csrow``h]jh)}(hjh]h is_virt_csrow}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMlhjubj)}(hhh]h)}(hhThis layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh]hlThis layer is part of the “csrow” when old API compatibility mode is enabled. Otherwise, it is a channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMkhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMlhj ubeh}(h]h ]h"]h$]h&]uh1j`hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jrank_info (C struct) c.rank_infohNtauh1jhjJhhhjhNubj)}(hhh](j)}(h rank_infoh]j)}(hstruct rank_infoh](j)}(hjyh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMsubj)}(h rank_infoh]j)}(hjh]h rank_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMsubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhjhMsubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMshjhhubj)}(hhh]h)}(h*contains the information for one DIMM rankh]h*contains the information for one DIMM rank}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj5hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMsubeh}(h]h ](jsstructeh"]h$]h&]j<jsj=jPj>jPj?j@jAuh1jhhhjJhjhNubjC)}(hX**Definition**:: struct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; }; **Members** ``chan_idx`` channel number where the rank is (typically, 0 or 1) ``csrow`` A pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector. ``dimm`` A pointer to the DIMM structure, where the DIMM label information is stored. ``ce_count`` number of correctable errors for this rankh](h)}(h**Definition**::h](jW)}(h**Definition**h]h Definition}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjXubh:}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjTubj)}(hsstruct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; };h]hsstruct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; };}hjusbah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjTubh)}(h **Members**h]jW)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjTubja)}(hhh](jf)}(hB``chan_idx`` channel number where the rank is (typically, 0 or 1) h](jl)}(h ``chan_idx``h]jh)}(hjh]hchan_idx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h4channel number where the rank is (typically, 0 or 1)h]h4channel number where the rank is (typically, 0 or 1)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h``csrow`` A pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector. h](jl)}(h ``csrow``h]jh)}(hjh]hcsrow}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hA pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector.h]hA pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(hV``dimm`` A pointer to the DIMM structure, where the DIMM label information is stored. h](jl)}(h``dimm``h]jh)}(hjh]hdimm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hLA pointer to the DIMM structure, where the DIMM label information is stored.h]hLA pointer to the DIMM structure, where the DIMM label information is stored.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj.ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj-hMhjubjf)}(h7``ce_count`` number of correctable errors for this rankh](jl)}(h ``ce_count``h]jh)}(hjRh]hce_count}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jghjPubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjLubj)}(hhh]h)}(h*number of correctable errors for this rankh]h*number of correctable errors for this rank}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jehjghMhjubeh}(h]h ]h"]h$]h&]uh1j`hjTubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubh)}(h**Description**h]jW)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjJhhubja)}(hhh]jf)}(hFIXME: Currently, the EDAC core model will assume one DIMM per rank. This is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue. h](jl)}(hDFIXME: Currently, the EDAC core model will assume one DIMM per rank.h]hDFIXME: Currently, the EDAC core model will assume one DIMM per rank.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hkThis is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue.h]hkThis is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubah}(h]h ]h"]h$]h&]uh1j`hjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_raw_error_desc (C struct)c.edac_raw_error_deschNtauh1jhjJhhhjhNubj)}(hhh](j)}(hedac_raw_error_desch]j)}(hstruct edac_raw_error_desch](j)}(hjyh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubj)}(hedac_raw_error_desch]j)}(hjh]hedac_raw_error_desc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhj hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjhhubj)}(hhh]h)}(hRaw error report structureh]hRaw error report structure}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj=hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMubeh}(h]h ](jsstructeh"]h$]h&]j<jsj=jXj>jXj?j@jAuh1jhhhjJhjhNubjC)}(hX**Definition**:: struct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; }; **Members** ``location`` location of the error ``label`` label of the affected DIMM(s) ``grain`` minimum granularity for an error report, in bytes ``error_count`` number of errors of the same type ``type`` severity of the error (CE/UE/Fatal) ``top_layer`` top layer of the error (layer[0]) ``mid_layer`` middle layer of the error (layer[1]) ``low_layer`` low layer of the error (layer[2]) ``page_frame_number`` page where the error happened ``offset_in_page`` page offset ``syndrome`` syndrome of the error (or 0 if unknown or if the syndrome is not applicable) ``msg`` error message ``other_detail`` other driver-specific detail about the errorh](h)}(h**Definition**::h](jW)}(h**Definition**h]h Definition}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj`ubh:}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj\ubj)}(hXstruct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; };h]hXstruct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; };}hj}sbah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj\ubh)}(h **Members**h]jW)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj\ubja)}(hhh](jf)}(h#``location`` location of the error h](jl)}(h ``location``h]jh)}(hjh]hlocation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hlocation of the errorh]hlocation of the error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h(``label`` label of the affected DIMM(s) h](jl)}(h ``label``h]jh)}(hjh]hlabel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hlabel of the affected DIMM(s)h]hlabel of the affected DIMM(s)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h<``grain`` minimum granularity for an error report, in bytes h](jl)}(h ``grain``h]jh)}(hjh]hgrain}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h1minimum granularity for an error report, in bytesh]h1minimum granularity for an error report, in bytes}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj4hMhjubjf)}(h2``error_count`` number of errors of the same type h](jl)}(h``error_count``h]jh)}(hjXh]h error_count}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjVubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjRubj)}(hhh]h)}(h!number of errors of the same typeh]h!number of errors of the same type}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjnubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jehjmhMhjubjf)}(h-``type`` severity of the error (CE/UE/Fatal) h](jl)}(h``type``h]jh)}(hjh]htype}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h#severity of the error (CE/UE/Fatal)h]h#severity of the error (CE/UE/Fatal)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h0``top_layer`` top layer of the error (layer[0]) h](jl)}(h ``top_layer``h]jh)}(hjh]h top_layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h!top layer of the error (layer[0])h]h!top layer of the error (layer[0])}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h3``mid_layer`` middle layer of the error (layer[1]) h](jl)}(h ``mid_layer``h]jh)}(hjh]h mid_layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h$middle layer of the error (layer[1])h]h$middle layer of the error (layer[1])}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h0``low_layer`` low layer of the error (layer[2]) h](jl)}(h ``low_layer``h]jh)}(hj<h]h low_layer}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj:ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj6ubj)}(hhh]h)}(h!low layer of the error (layer[2])h]h!low layer of the error (layer[2])}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMhjRubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jehjQhMhjubjf)}(h4``page_frame_number`` page where the error happened h](jl)}(h``page_frame_number``h]jh)}(hjuh]hpage_frame_number}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjsubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjoubj)}(hhh]h)}(hpage where the error happenedh]hpage where the error happened}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h``offset_in_page`` page offset h](jl)}(h``offset_in_page``h]jh)}(hjh]hoffset_in_page}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h page offseth]h page offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(hZ``syndrome`` syndrome of the error (or 0 if unknown or if the syndrome is not applicable) h](jl)}(h ``syndrome``h]jh)}(hjh]hsyndrome}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hLsyndrome of the error (or 0 if unknown or if the syndrome is not applicable)h]hLsyndrome of the error (or 0 if unknown or if the syndrome is not applicable)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehjhMhjubjf)}(h``msg`` error message h](jl)}(h``msg``h]jh)}(hj!h]hmsg}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h error messageh]h error message}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jehj6hMhjubjf)}(h=``other_detail`` other driver-specific detail about the errorh](jl)}(h``other_detail``h]jh)}(hjZh]h other_detail}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjXubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjTubj)}(hhh]h)}(h,other driver-specific detail about the errorh]h,other driver-specific detail about the error}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jehjohMhjubeh}(h]h ]h"]h$]h&]uh1j`hj\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_get_dimm (C function)c.edac_get_dimmhNtauh1jhjJhhhjhNubj)}(hhh](j)}(h_struct dimm_info * edac_get_dimm (struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h]j)}(h]struct dimm_info *edac_get_dimm(struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h](j)}(hjyh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM~ubh)}(hhh]j)}(h dimm_infoh]h dimm_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjsreftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}j edac_get_dimmsbc.edac_get_dimmasbuh1hhjhhhjhM~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM~ubhdesc_sig_punctuation)}(hjhh]h*}(hj hhhNhNubah}(h]h ]pah"]h$]h&]uh1j hjhhhjhM~ubj)}(h edac_get_dimmh]j)}(hjh]h edac_get_dimm}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM~ubhdesc_parameterlist)}(h>(struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h](hdesc_parameter)}(hstruct mem_ctl_info *mcih](j)}(hjyh]hstruct}(hj= hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 ubj)}(h h]h }(hjJ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj[ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj] modnameN classnameNjj)}j]jc.edac_get_dimmasbuh1hhj9 ubj)}(h h]h }(hjy hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 ubj )}(hjhh]h*}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9 ubj)}(hmcih]hmci}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj3 ubj8 )}(h int layer0h](hdesc_sig_keyword_type)}(hinth]hint}(hj hhhNhNubah}(h]h ]ktah"]h$]h&]uh1j hj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hlayer0h]hlayer0}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj3 ubj8 )}(h int layer1h](j )}(hinth]hint}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hlayer1h]hlayer1}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj3 ubj8 )}(h int layer2h](j )}(hinth]hint}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(h h]h }(hj(!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(hlayer2h]hlayer2}(hj6!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj3 ubeh}(h]h ]h"]h$]h&]jjuh1j1 hjhhhjhM~ubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhjhM~ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM~hjhhubj)}(hhh]h)}(hOGet DIMM info from a memory controller given by [layer0,layer1,layer2] positionh]hOGet DIMM info from a memory controller given by [layer0,layer1,layer2] position}(hj`!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMnhj]!hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM~ubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jx!j>jx!j?j@jAuh1jhhhjJhjhNubjC)}(hX**Parameters** ``struct mem_ctl_info *mci`` MC descriptor struct mem_ctl_info ``int layer0`` layer0 position ``int layer1`` layer1 position. Unused if n_layers < 2 ``int layer2`` layer2 position. Unused if n_layers < 3 **Description** For 1 layer, this function returns "dimms[layer0]"; For 2 layers, this function is similar to allocating a two-dimensional array and returning "dimms[layer0][layer1]"; For 3 layers, this function is similar to allocating a tri-dimensional array and returning "dimms[layer0][layer1][layer2]";h](h)}(h**Parameters**h]jW)}(hj!h]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj!ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhj|!ubja)}(hhh](jf)}(h?``struct mem_ctl_info *mci`` MC descriptor struct mem_ctl_info h](jl)}(h``struct mem_ctl_info *mci``h]jh)}(hj!h]hstruct mem_ctl_info *mci}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj!ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMqhj!ubj)}(hhh]h)}(h!MC descriptor struct mem_ctl_infoh]h!MC descriptor struct mem_ctl_info}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMqhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jehj!hMqhj!ubjf)}(h``int layer0`` layer0 position h](jl)}(h``int layer0``h]jh)}(hj!h]h int layer0}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj!ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhj!ubj)}(hhh]h)}(hlayer0 positionh]hlayer0 position}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMrhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jehj!hMrhj!ubjf)}(h7``int layer1`` layer1 position. Unused if n_layers < 2 h](jl)}(h``int layer1``h]jh)}(hj"h]h int layer1}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj"ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMshj "ubj)}(hhh]h)}(h'layer1 position. Unused if n_layers < 2h]h'layer1 position. Unused if n_layers < 2}(hj,"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj("hMshj)"ubah}(h]h ]h"]h$]h&]uh1jhj "ubeh}(h]h ]h"]h$]h&]uh1jehj("hMshj!ubjf)}(h7``int layer2`` layer2 position. Unused if n_layers < 3 h](jl)}(h``int layer2``h]jh)}(hjL"h]h int layer2}(hjN"hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjJ"ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMthjF"ubj)}(hhh]h)}(h'layer2 position. Unused if n_layers < 3h]h'layer2 position. Unused if n_layers < 3}(hje"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhja"hMthjb"ubah}(h]h ]h"]h$]h&]uh1jhjF"ubeh}(h]h ]h"]h$]h&]uh1jehja"hMthj!ubeh}(h]h ]h"]h$]h&]uh1j`hj|!ubh)}(h**Description**h]jW)}(hj"h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj"ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMvhj|!ubh)}(h3For 1 layer, this function returns "dimms[layer0]";h]h7For 1 layer, this function returns “dimms[layer0]”;}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMvhj|!ubh)}(hsFor 2 layers, this function is similar to allocating a two-dimensional array and returning "dimms[layer0][layer1]";h]hwFor 2 layers, this function is similar to allocating a two-dimensional array and returning “dimms[layer0][layer1]”;}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMxhj|!ubh)}(h{For 3 layers, this function is similar to allocating a tri-dimensional array and returning "dimms[layer0][layer1][layer2]";h]hFor 3 layers, this function is similar to allocating a tri-dimensional array and returning “dimms[layer0][layer1][layer2]”;}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM{hj|!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_scrub_ops (C struct)c.edac_scrub_opshNtauh1jhjJhhhjhNubj)}(hhh](j)}(hedac_scrub_opsh]j)}(hstruct edac_scrub_opsh](j)}(hjyh]hstruct}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhj"hMubj)}(hedac_scrub_opsh]j)}(hj"h]hedac_scrub_ops}(hj #hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj"hhhj"hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj"hhhj"hMubah}(h]j"ah ](jjeh"]h$]h&]jj)jhuh1jhj"hMhj"hhubj)}(hhh]h)}(h/scrub device operations (all elements optional)h]h/scrub device operations (all elements optional)}(hj,#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)#hhubah}(h]h ]h"]h$]h&]uh1jhj"hhhj"hMubeh}(h]h ](jsstructeh"]h$]h&]j<jsj=jD#j>jD#j?j@jAuh1jhhhjJhjhNubjC)}(hX**Definition**:: struct edac_scrub_ops { int (*read_addr)(struct device *dev, void *drv_data, u64 *base); int (*read_size)(struct device *dev, void *drv_data, u64 *size); int (*write_addr)(struct device *dev, void *drv_data, u64 base); int (*write_size)(struct device *dev, void *drv_data, u64 size); int (*get_enabled_bg)(struct device *dev, void *drv_data, bool *enable); int (*set_enabled_bg)(struct device *dev, void *drv_data, bool enable); int (*get_min_cycle)(struct device *dev, void *drv_data, u32 *min); int (*get_max_cycle)(struct device *dev, void *drv_data, u32 *max); int (*get_cycle_duration)(struct device *dev, void *drv_data, u32 *cycle); int (*set_cycle_duration)(struct device *dev, void *drv_data, u32 cycle); }; **Members** ``read_addr`` read base address of scrubbing range. ``read_size`` read offset of scrubbing range. ``write_addr`` set base address of the scrubbing range. ``write_size`` set offset of the scrubbing range. ``get_enabled_bg`` check if currently performing background scrub. ``set_enabled_bg`` start or stop a bg-scrub. ``get_min_cycle`` get minimum supported scrub cycle duration in seconds. ``get_max_cycle`` get maximum supported scrub cycle duration in seconds. ``get_cycle_duration`` get current scrub cycle duration in seconds. ``set_cycle_duration`` set current scrub cycle duration in seconds.h](h)}(h**Definition**::h](jW)}(h**Definition**h]h Definition}(hjP#hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjL#ubh:}(hjL#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjH#ubj)}(hXstruct edac_scrub_ops { int (*read_addr)(struct device *dev, void *drv_data, u64 *base); int (*read_size)(struct device *dev, void *drv_data, u64 *size); int (*write_addr)(struct device *dev, void *drv_data, u64 base); int (*write_size)(struct device *dev, void *drv_data, u64 size); int (*get_enabled_bg)(struct device *dev, void *drv_data, bool *enable); int (*set_enabled_bg)(struct device *dev, void *drv_data, bool enable); int (*get_min_cycle)(struct device *dev, void *drv_data, u32 *min); int (*get_max_cycle)(struct device *dev, void *drv_data, u32 *max); int (*get_cycle_duration)(struct device *dev, void *drv_data, u32 *cycle); int (*set_cycle_duration)(struct device *dev, void *drv_data, u32 cycle); };h]hXstruct edac_scrub_ops { int (*read_addr)(struct device *dev, void *drv_data, u64 *base); int (*read_size)(struct device *dev, void *drv_data, u64 *size); int (*write_addr)(struct device *dev, void *drv_data, u64 base); int (*write_size)(struct device *dev, void *drv_data, u64 size); int (*get_enabled_bg)(struct device *dev, void *drv_data, bool *enable); int (*set_enabled_bg)(struct device *dev, void *drv_data, bool enable); int (*get_min_cycle)(struct device *dev, void *drv_data, u32 *min); int (*get_max_cycle)(struct device *dev, void *drv_data, u32 *max); int (*get_cycle_duration)(struct device *dev, void *drv_data, u32 *cycle); int (*set_cycle_duration)(struct device *dev, void *drv_data, u32 cycle); };}hji#sbah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjH#ubh)}(h **Members**h]jW)}(hjz#h]hMembers}(hj|#hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjx#ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjH#ubja)}(hhh](jf)}(h4``read_addr`` read base address of scrubbing range. h](jl)}(h ``read_addr``h]jh)}(hj#h]h read_addr}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj#ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#ubj)}(hhh]h)}(h%read base address of scrubbing range.h]h%read base address of scrubbing range.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jehj#hMhj#ubjf)}(h.``read_size`` read offset of scrubbing range. h](jl)}(h ``read_size``h]jh)}(hj#h]h read_size}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj#ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#ubj)}(hhh]h)}(hread offset of scrubbing range.h]hread offset of scrubbing range.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jehj#hMhj#ubjf)}(h8``write_addr`` set base address of the scrubbing range. h](jl)}(h``write_addr``h]jh)}(hj $h]h write_addr}(hj $hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj $ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(h(set base address of the scrubbing range.h]h(set base address of the scrubbing range.}(hj$$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj $hMhj!$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jehj $hMhj#ubjf)}(h2``write_size`` set offset of the scrubbing range. h](jl)}(h``write_size``h]jh)}(hjD$h]h write_size}(hjF$hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjB$ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj>$ubj)}(hhh]h)}(h"set offset of the scrubbing range.h]h"set offset of the scrubbing range.}(hj]$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY$hMhjZ$ubah}(h]h ]h"]h$]h&]uh1jhj>$ubeh}(h]h ]h"]h$]h&]uh1jehjY$hMhj#ubjf)}(hC``get_enabled_bg`` check if currently performing background scrub. h](jl)}(h``get_enabled_bg``h]jh)}(hj}$h]hget_enabled_bg}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj{$ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjw$ubj)}(hhh]h)}(h/check if currently performing background scrub.h]h/check if currently performing background scrub.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj$ubah}(h]h ]h"]h$]h&]uh1jhjw$ubeh}(h]h ]h"]h$]h&]uh1jehj$hMhj#ubjf)}(h-``set_enabled_bg`` start or stop a bg-scrub. h](jl)}(h``set_enabled_bg``h]jh)}(hj$h]hset_enabled_bg}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj$ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(hstart or stop a bg-scrub.h]hstart or stop a bg-scrub.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jehj$hMhj#ubjf)}(hI``get_min_cycle`` get minimum supported scrub cycle duration in seconds. h](jl)}(h``get_min_cycle``h]jh)}(hj$h]h get_min_cycle}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj$ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(h6get minimum supported scrub cycle duration in seconds.h]h6get minimum supported scrub cycle duration in seconds.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jehj%hMhj#ubjf)}(hI``get_max_cycle`` get maximum supported scrub cycle duration in seconds. h](jl)}(h``get_max_cycle``h]jh)}(hj(%h]h get_max_cycle}(hj*%hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj&%ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj"%ubj)}(hhh]h)}(h6get maximum supported scrub cycle duration in seconds.h]h6get maximum supported scrub cycle duration in seconds.}(hjA%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=%hMhj>%ubah}(h]h ]h"]h$]h&]uh1jhj"%ubeh}(h]h ]h"]h$]h&]uh1jehj=%hMhj#ubjf)}(hD``get_cycle_duration`` get current scrub cycle duration in seconds. h](jl)}(h``get_cycle_duration``h]jh)}(hja%h]hget_cycle_duration}(hjc%hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj_%ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj[%ubj)}(hhh]h)}(h,get current scrub cycle duration in seconds.h]h,get current scrub cycle duration in seconds.}(hjz%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjv%hMhjw%ubah}(h]h ]h"]h$]h&]uh1jhj[%ubeh}(h]h ]h"]h$]h&]uh1jehjv%hMhj#ubjf)}(hC``set_cycle_duration`` set current scrub cycle duration in seconds.h](jl)}(h``set_cycle_duration``h]jh)}(hj%h]hset_cycle_duration}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj%ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubj)}(hhh]h)}(h,set current scrub cycle duration in seconds.h]h,set current scrub cycle duration in seconds.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jehj%hMhj#ubeh}(h]h ]h"]h$]h&]uh1j`hjH#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_ecs_ops (C struct)c.edac_ecs_opshNtauh1jhjJhhhjhNubj)}(hhh](j)}(h edac_ecs_opsh]j)}(hstruct edac_ecs_opsh](j)}(hjyh]hstruct}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%hhhj&hMubj)}(h edac_ecs_opsh]j)}(hj%h]h edac_ecs_ops}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj%hhhj&hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj%hhhj&hMubah}(h]j%ah ](jjeh"]h$]h&]jj)jhuh1jhj&hMhj%hhubj)}(hhh]h)}(h-ECS device operations (all elements optional)h]h-ECS device operations (all elements optional)}(hj6&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj3&hhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj&hMubeh}(h]h ](jsstructeh"]h$]h&]j<jsj=jN&j>jN&j?j@jAuh1jhhhjJhjhNubjC)}(hX **Definition**:: struct edac_ecs_ops { int (*get_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_mode)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_mode)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*reset)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_threshold)(struct device *dev, void *drv_data, int fru_id, u32 *threshold); int (*set_threshold)(struct device *dev, void *drv_data, int fru_id, u32 threshold); }; **Members** ``get_log_entry_type`` read the log entry type value. ``set_log_entry_type`` set the log entry type value. ``get_mode`` read the mode value. ``set_mode`` set the mode value. ``reset`` reset the ECS counter. ``get_threshold`` read the threshold count per gigabits of memory cells. ``set_threshold`` set the threshold count per gigabits of memory cells.h](h)}(h**Definition**::h](jW)}(h**Definition**h]h Definition}(hjZ&hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjV&ubh:}(hjV&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjR&ubj)}(hXdstruct edac_ecs_ops { int (*get_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_mode)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_mode)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*reset)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_threshold)(struct device *dev, void *drv_data, int fru_id, u32 *threshold); int (*set_threshold)(struct device *dev, void *drv_data, int fru_id, u32 threshold); };h]hXdstruct edac_ecs_ops { int (*get_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_mode)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_mode)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*reset)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_threshold)(struct device *dev, void *drv_data, int fru_id, u32 *threshold); int (*set_threshold)(struct device *dev, void *drv_data, int fru_id, u32 threshold); };}hjs&sbah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjR&ubh)}(h **Members**h]jW)}(hj&h]hMembers}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj&ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjR&ubja)}(hhh](jf)}(h6``get_log_entry_type`` read the log entry type value. h](jl)}(h``get_log_entry_type``h]jh)}(hj&h]hget_log_entry_type}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj&ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&ubj)}(hhh]h)}(hread the log entry type value.h]hread the log entry type value.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jehj&hMhj&ubjf)}(h5``set_log_entry_type`` set the log entry type value. h](jl)}(h``set_log_entry_type``h]jh)}(hj&h]hset_log_entry_type}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj&ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&ubj)}(hhh]h)}(hset the log entry type value.h]hset the log entry type value.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jehj&hMhj&ubjf)}(h"``get_mode`` read the mode value. h](jl)}(h ``get_mode``h]jh)}(hj'h]hget_mode}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj'ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj'ubj)}(hhh]h)}(hread the mode value.h]hread the mode value.}(hj.'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*'hMhj+'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jehj*'hMhj&ubjf)}(h!``set_mode`` set the mode value. h](jl)}(h ``set_mode``h]jh)}(hjN'h]hset_mode}(hjP'hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjL'ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjH'ubj)}(hhh]h)}(hset the mode value.h]hset the mode value.}(hjg'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjc'hMhjd'ubah}(h]h ]h"]h$]h&]uh1jhjH'ubeh}(h]h ]h"]h$]h&]uh1jehjc'hMhj&ubjf)}(h!``reset`` reset the ECS counter. h](jl)}(h ``reset``h]jh)}(hj'h]hreset}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj'ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj'ubj)}(hhh]h)}(hreset the ECS counter.h]hreset the ECS counter.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jehj'hMhj&ubjf)}(hI``get_threshold`` read the threshold count per gigabits of memory cells. h](jl)}(h``get_threshold``h]jh)}(hj'h]h get_threshold}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj'ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj'ubj)}(hhh]h)}(h6read the threshold count per gigabits of memory cells.h]h6read the threshold count per gigabits of memory cells.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jehj'hMhj&ubjf)}(hG``set_threshold`` set the threshold count per gigabits of memory cells.h](jl)}(h``set_threshold``h]jh)}(hj'h]h set_threshold}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj'ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj'ubj)}(hhh]h)}(h5set the threshold count per gigabits of memory cells.h]h5set the threshold count per gigabits of memory cells.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jehj(hMhj&ubeh}(h]h ]h"]h$]h&]uh1j`hjR&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mem_repair_ops (C struct)c.edac_mem_repair_opshNtauh1jhjJhhhjhNubj)}(hhh](j)}(hedac_mem_repair_opsh]j)}(hstruct edac_mem_repair_opsh](j)}(hjyh]hstruct}(hjS(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO(hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hja(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO(hhhj`(hMubj)}(hedac_mem_repair_opsh]j)}(hjM(h]hedac_mem_repair_ops}(hjs(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo(ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjO(hhhj`(hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjK(hhhj`(hMubah}(h]jF(ah ](jjeh"]h$]h&]jj)jhuh1jhj`(hMhjH(hhubj)}(hhh]h)}(hVmemory repair operations (all elements are optional except do_repair, set_hpa/set_dpa)h]hVmemory repair operations (all elements are optional except do_repair, set_hpa/set_dpa)}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(hhubah}(h]h ]h"]h$]h&]uh1jhjH(hhhj`(hMubeh}(h]h ](jsstructeh"]h$]h&]j<jsj=j(j>j(j?j@jAuh1jhhhjJhjhNubjC)}(hXE**Definition**:: struct edac_mem_repair_ops { int (*get_repair_type)(struct device *dev, void *drv_data, const char **type); int (*get_persist_mode)(struct device *dev, void *drv_data, bool *persist); int (*set_persist_mode)(struct device *dev, void *drv_data, bool persist); int (*get_repair_safe_when_in_use)(struct device *dev, void *drv_data, bool *safe); int (*get_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*set_hpa)(struct device *dev, void *drv_data, u64 hpa); int (*get_min_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_max_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*set_dpa)(struct device *dev, void *drv_data, u64 dpa); int (*get_min_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_max_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_nibble_mask)(struct device *dev, void *drv_data, u32 *val); int (*set_nibble_mask)(struct device *dev, void *drv_data, u32 val); int (*get_bank_group)(struct device *dev, void *drv_data, u32 *val); int (*set_bank_group)(struct device *dev, void *drv_data, u32 val); int (*get_bank)(struct device *dev, void *drv_data, u32 *val); int (*set_bank)(struct device *dev, void *drv_data, u32 val); int (*get_rank)(struct device *dev, void *drv_data, u32 *val); int (*set_rank)(struct device *dev, void *drv_data, u32 val); int (*get_row)(struct device *dev, void *drv_data, u32 *val); int (*set_row)(struct device *dev, void *drv_data, u32 val); int (*get_column)(struct device *dev, void *drv_data, u32 *val); int (*set_column)(struct device *dev, void *drv_data, u32 val); int (*get_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_channel)(struct device *dev, void *drv_data, u32 val); int (*get_sub_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_sub_channel)(struct device *dev, void *drv_data, u32 val); int (*do_repair)(struct device *dev, void *drv_data, u32 val); }; **Members** ``get_repair_type`` get the memory repair type, listed in enum edac_mem_repair_function. ``get_persist_mode`` get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair). ``set_persist_mode`` set the persist mode of the memory repair instance. ``get_repair_safe_when_in_use`` get whether memory media is accessible and data is retained during repair operation. ``get_hpa`` get current host physical address (HPA) of memory to repair. ``set_hpa`` set host physical address (HPA) of memory to repair. ``get_min_hpa`` get the minimum supported host physical address (HPA). ``get_max_hpa`` get the maximum supported host physical address (HPA). ``get_dpa`` get current device physical address (DPA) of memory to repair. ``set_dpa`` set device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records. ``get_min_dpa`` get the minimum supported device physical address (DPA). ``get_max_dpa`` get the maximum supported device physical address (DPA). ``get_nibble_mask`` get current nibble mask of memory to repair. ``set_nibble_mask`` set nibble mask of memory to repair. ``get_bank_group`` get current bank group of memory to repair. ``set_bank_group`` set bank group of memory to repair. ``get_bank`` get current bank of memory to repair. ``set_bank`` set bank of memory to repair. ``get_rank`` get current rank of memory to repair. ``set_rank`` set rank of memory to repair. ``get_row`` get current row of memory to repair. ``set_row`` set row of memory to repair. ``get_column`` get current column of memory to repair. ``set_column`` set column of memory to repair. ``get_channel`` get current channel of memory to repair. ``set_channel`` set channel of memory to repair. ``get_sub_channel`` get current subchannel of memory to repair. ``set_sub_channel`` set subchannel of memory to repair. ``do_repair`` Issue memory repair operation for the HPA/DPA and other control attributes set for the memory to repair.h](h)}(h**Definition**::h](jW)}(h**Definition**h]h Definition}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj(ubh:}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubj)}(hX"struct edac_mem_repair_ops { int (*get_repair_type)(struct device *dev, void *drv_data, const char **type); int (*get_persist_mode)(struct device *dev, void *drv_data, bool *persist); int (*set_persist_mode)(struct device *dev, void *drv_data, bool persist); int (*get_repair_safe_when_in_use)(struct device *dev, void *drv_data, bool *safe); int (*get_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*set_hpa)(struct device *dev, void *drv_data, u64 hpa); int (*get_min_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_max_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*set_dpa)(struct device *dev, void *drv_data, u64 dpa); int (*get_min_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_max_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_nibble_mask)(struct device *dev, void *drv_data, u32 *val); int (*set_nibble_mask)(struct device *dev, void *drv_data, u32 val); int (*get_bank_group)(struct device *dev, void *drv_data, u32 *val); int (*set_bank_group)(struct device *dev, void *drv_data, u32 val); int (*get_bank)(struct device *dev, void *drv_data, u32 *val); int (*set_bank)(struct device *dev, void *drv_data, u32 val); int (*get_rank)(struct device *dev, void *drv_data, u32 *val); int (*set_rank)(struct device *dev, void *drv_data, u32 val); int (*get_row)(struct device *dev, void *drv_data, u32 *val); int (*set_row)(struct device *dev, void *drv_data, u32 val); int (*get_column)(struct device *dev, void *drv_data, u32 *val); int (*set_column)(struct device *dev, void *drv_data, u32 val); int (*get_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_channel)(struct device *dev, void *drv_data, u32 val); int (*get_sub_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_sub_channel)(struct device *dev, void *drv_data, u32 val); int (*do_repair)(struct device *dev, void *drv_data, u32 val); };h]hX"struct edac_mem_repair_ops { int (*get_repair_type)(struct device *dev, void *drv_data, const char **type); int (*get_persist_mode)(struct device *dev, void *drv_data, bool *persist); int (*set_persist_mode)(struct device *dev, void *drv_data, bool persist); int (*get_repair_safe_when_in_use)(struct device *dev, void *drv_data, bool *safe); int (*get_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*set_hpa)(struct device *dev, void *drv_data, u64 hpa); int (*get_min_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_max_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*set_dpa)(struct device *dev, void *drv_data, u64 dpa); int (*get_min_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_max_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_nibble_mask)(struct device *dev, void *drv_data, u32 *val); int (*set_nibble_mask)(struct device *dev, void *drv_data, u32 val); int (*get_bank_group)(struct device *dev, void *drv_data, u32 *val); int (*set_bank_group)(struct device *dev, void *drv_data, u32 val); int (*get_bank)(struct device *dev, void *drv_data, u32 *val); int (*set_bank)(struct device *dev, void *drv_data, u32 val); int (*get_rank)(struct device *dev, void *drv_data, u32 *val); int (*set_rank)(struct device *dev, void *drv_data, u32 val); int (*get_row)(struct device *dev, void *drv_data, u32 *val); int (*set_row)(struct device *dev, void *drv_data, u32 val); int (*get_column)(struct device *dev, void *drv_data, u32 *val); int (*set_column)(struct device *dev, void *drv_data, u32 val); int (*get_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_channel)(struct device *dev, void *drv_data, u32 val); int (*get_sub_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_sub_channel)(struct device *dev, void *drv_data, u32 val); int (*do_repair)(struct device *dev, void *drv_data, u32 val); };}hj(sbah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubh)}(h **Members**h]jW)}(hj(h]hMembers}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj(ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubja)}(hhh](jf)}(hY``get_repair_type`` get the memory repair type, listed in enum edac_mem_repair_function. h](jl)}(h``get_repair_type``h]jh)}(hj)h]hget_repair_type}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj)ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubj)}(hhh]h)}(hDget the memory repair type, listed in enum edac_mem_repair_function.h]hDget the memory repair type, listed in enum edac_mem_repair_function.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jehj)hMhj(ubjf)}(h``get_persist_mode`` get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair). h](jl)}(h``get_persist_mode``h]jh)}(hj<)h]hget_persist_mode}(hj>)hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj:)ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj6)ubj)}(hhh]h)}(h}get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair).h]h}get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair).}(hjU)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjR)ubah}(h]h ]h"]h$]h&]uh1jhj6)ubeh}(h]h ]h"]h$]h&]uh1jehjQ)hMhj(ubjf)}(hI``set_persist_mode`` set the persist mode of the memory repair instance. h](jl)}(h``set_persist_mode``h]jh)}(hjv)h]hset_persist_mode}(hjx)hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjt)ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjp)ubj)}(hhh]h)}(h3set the persist mode of the memory repair instance.h]h3set the persist mode of the memory repair instance.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj)ubah}(h]h ]h"]h$]h&]uh1jhjp)ubeh}(h]h ]h"]h$]h&]uh1jehj)hMhj(ubjf)}(hu``get_repair_safe_when_in_use`` get whether memory media is accessible and data is retained during repair operation. h](jl)}(h``get_repair_safe_when_in_use``h]jh)}(hj)h]hget_repair_safe_when_in_use}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj)ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubj)}(hhh]h)}(hTget whether memory media is accessible and data is retained during repair operation.h]hTget whether memory media is accessible and data is retained during repair operation.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jehj)hMhj(ubjf)}(hI``get_hpa`` get current host physical address (HPA) of memory to repair. h](jl)}(h ``get_hpa``h]jh)}(hj)h]hget_hpa}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj)ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubj)}(hhh]h)}(hget current device physical address (DPA) of memory to repair.h]h>get current device physical address (DPA) of memory to repair.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jehj*hMhj(ubjf)}(hX``set_dpa`` set device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records. h](jl)}(h ``set_dpa``h]jh)}(hj+h]hset_dpa}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj+ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hj+ubj)}(hhh]h)}(hXset device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records.h]hXset device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jehj+hM hj(ubjf)}(hI``get_min_dpa`` get the minimum supported device physical address (DPA). h](jl)}(h``get_min_dpa``h]jh)}(hj@+h]h get_min_dpa}(hjB+hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj>+ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hj:+ubj)}(hhh]h)}(h8get the minimum supported device physical address (DPA).h]h8get the minimum supported device physical address (DPA).}(hjY+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU+hM hjV+ubah}(h]h ]h"]h$]h&]uh1jhj:+ubeh}(h]h ]h"]h$]h&]uh1jehjU+hM hj(ubjf)}(hI``get_max_dpa`` get the maximum supported device physical address (DPA). h](jl)}(h``get_max_dpa``h]jh)}(hjy+h]h get_max_dpa}(hj{+hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjw+ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjs+ubj)}(hhh]h)}(h8get the maximum supported device physical address (DPA).h]h8get the maximum supported device physical address (DPA).}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hM hj+ubah}(h]h ]h"]h$]h&]uh1jhjs+ubeh}(h]h ]h"]h$]h&]uh1jehj+hM hj(ubjf)}(hA``get_nibble_mask`` get current nibble mask of memory to repair. h](jl)}(h``get_nibble_mask``h]jh)}(hj+h]hget_nibble_mask}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj+ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj+ubj)}(hhh]h)}(h,get current nibble mask of memory to repair.h]h,get current nibble mask of memory to repair.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jehj+hMhj(ubjf)}(h9``set_nibble_mask`` set nibble mask of memory to repair. h](jl)}(h``set_nibble_mask``h]jh)}(hj+h]hset_nibble_mask}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj+ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj+ubj)}(hhh]h)}(h$set nibble mask of memory to repair.h]h$set nibble mask of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jehj,hMhj(ubjf)}(h?``get_bank_group`` get current bank group of memory to repair. h](jl)}(h``get_bank_group``h]jh)}(hj$,h]hget_bank_group}(hj&,hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj",ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(h+get current bank group of memory to repair.h]h+get current bank group of memory to repair.}(hj=,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9,hMhj:,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jehj9,hMhj(ubjf)}(h7``set_bank_group`` set bank group of memory to repair. h](jl)}(h``set_bank_group``h]jh)}(hj],h]hset_bank_group}(hj_,hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj[,ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjW,ubj)}(hhh]h)}(h#set bank group of memory to repair.h]h#set bank group of memory to repair.}(hjv,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr,hMhjs,ubah}(h]h ]h"]h$]h&]uh1jhjW,ubeh}(h]h ]h"]h$]h&]uh1jehjr,hMhj(ubjf)}(h3``get_bank`` get current bank of memory to repair. h](jl)}(h ``get_bank``h]jh)}(hj,h]hget_bank}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj,ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(h%get current bank of memory to repair.h]h%get current bank of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jehj,hMhj(ubjf)}(h+``set_bank`` set bank of memory to repair. h](jl)}(h ``set_bank``h]jh)}(hj,h]hset_bank}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj,ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(hset bank of memory to repair.h]hset bank of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jehj,hMhj(ubjf)}(h3``get_rank`` get current rank of memory to repair. h](jl)}(h ``get_rank``h]jh)}(hj-h]hget_rank}(hj -hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj-ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(h%get current rank of memory to repair.h]h%get current rank of memory to repair.}(hj!-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jehj-hMhj(ubjf)}(h+``set_rank`` set rank of memory to repair. h](jl)}(h ``set_rank``h]jh)}(hjA-h]hset_rank}(hjC-hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj?-ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj;-ubj)}(hhh]h)}(hset rank of memory to repair.h]hset rank of memory to repair.}(hjZ-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjV-hMhjW-ubah}(h]h ]h"]h$]h&]uh1jhj;-ubeh}(h]h ]h"]h$]h&]uh1jehjV-hMhj(ubjf)}(h1``get_row`` get current row of memory to repair. h](jl)}(h ``get_row``h]jh)}(hjz-h]hget_row}(hj|-hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjx-ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjt-ubj)}(hhh]h)}(h$get current row of memory to repair.h]h$get current row of memory to repair.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhjt-ubeh}(h]h ]h"]h$]h&]uh1jehj-hMhj(ubjf)}(h)``set_row`` set row of memory to repair. h](jl)}(h ``set_row``h]jh)}(hj-h]hset_row}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj-ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(hset row of memory to repair.h]hset row of memory to repair.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jehj-hMhj(ubjf)}(h7``get_column`` get current column of memory to repair. h](jl)}(h``get_column``h]jh)}(hj-h]h get_column}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj-ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(h'get current column of memory to repair.h]h'get current column of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jehj.hMhj(ubjf)}(h/``set_column`` set column of memory to repair. h](jl)}(h``set_column``h]jh)}(hj%.h]h set_column}(hj'.hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj#.ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj.ubj)}(hhh]h)}(hset column of memory to repair.h]hset column of memory to repair.}(hj>.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:.hMhj;.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jehj:.hMhj(ubjf)}(h9``get_channel`` get current channel of memory to repair. h](jl)}(h``get_channel``h]jh)}(hj^.h]h get_channel}(hj`.hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj\.ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjX.ubj)}(hhh]h)}(h(get current channel of memory to repair.h]h(get current channel of memory to repair.}(hjw.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjs.hMhjt.ubah}(h]h ]h"]h$]h&]uh1jhjX.ubeh}(h]h ]h"]h$]h&]uh1jehjs.hMhj(ubjf)}(h1``set_channel`` set channel of memory to repair. h](jl)}(h``set_channel``h]jh)}(hj.h]h set_channel}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj.ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj.ubj)}(hhh]h)}(h set channel of memory to repair.h]h set channel of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jehj.hMhj(ubjf)}(h@``get_sub_channel`` get current subchannel of memory to repair. h](jl)}(h``get_sub_channel``h]jh)}(hj.h]hget_sub_channel}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj.ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj.ubj)}(hhh]h)}(h+get current subchannel of memory to repair.h]h+get current subchannel of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jehj.hMhj(ubjf)}(h8``set_sub_channel`` set subchannel of memory to repair. h](jl)}(h``set_sub_channel``h]jh)}(hj /h]hset_sub_channel}(hj /hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj/ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj/ubj)}(hhh]h)}(h#set subchannel of memory to repair.h]h#set subchannel of memory to repair.}(hj"/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jehj/hMhj(ubjf)}(hv``do_repair`` Issue memory repair operation for the HPA/DPA and other control attributes set for the memory to repair.h](jl)}(h ``do_repair``h]jh)}(hjB/h]h do_repair}(hjD/hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj@/ubah}(h]h ]h"]h$]h&]uh1jkhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjj1j?j@jAuh1jhhhjJhNhNubjC)}(hX**Parameters** ``unsigned int mc_num`` Memory controller number ``unsigned int n_layers`` Number of MC hierarchy layers ``struct edac_mc_layer *layers`` Describes each layer as seen by the Memory Controller ``unsigned int sz_pvt`` size of private storage needed **Description** Everything is kmalloc'ed as one big chunk - more efficient. Only can be used if all structures have the same lifetime - otherwise you have to allocate and initialize your own structures. Use edac_mc_free() to free mc structures allocated by this function. .. note:: drivers handle multi-rank memories in different ways: in some drivers, one multi-rank memory stick is mapped as one entry, while, in others, a single multi-rank memory stick would be mapped into several entries. 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Only can be used if all structures have the same lifetime - otherwise you have to allocate and initialize your own structures.h]hEverything is kmalloc’ed as one big chunk - more efficient. Only can be used if all structures have the same lifetime - otherwise you have to allocate and initialize your own structures.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKkhj1ubh)}(hDUse edac_mc_free() to free mc structures allocated by this function.h]hDUse edac_mc_free() to free mc structures allocated by this function.}(hj$3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKohj1ubhnote)}(hX^drivers handle multi-rank memories in different ways: in some drivers, one multi-rank memory stick is mapped as one entry, while, in others, a single multi-rank memory stick would be mapped into several entries. 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NULL otherwise.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj4ubah}(h]h ]h"]h$]h&]uh1jf3hj4hKhj_4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_free (C function)c.edac_mc_freehNtauh1jhjJhhhNhNubj)}(hhh](j)}(h,void edac_mc_free (struct mem_ctl_info *mci)h]j)}(h+void edac_mc_free(struct mem_ctl_info *mci)h](j )}(hvoidh]hvoid}(hj 5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 5hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 5hhhj5hKubj)}(h edac_mc_freeh]j)}(h edac_mc_freeh]h edac_mc_free}(hj.5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj 5hhhj5hKubj2 )}(h(struct mem_ctl_info *mci)h]j8 )}(hstruct mem_ctl_info *mcih](j)}(hjyh]hstruct}(hjJ5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF5ubj)}(h h]h }(hjW5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF5ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hjh5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje5ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjj5modnameN classnameNjj)}j]j)}jj05sbc.edac_mc_freeasbuh1hhjF5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF5ubj )}(hjhh]h*}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjF5ubj)}(hmcih]hmci}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF5ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjB5ubah}(h]h ]h"]h$]h&]jjuh1j1 hj 5hhhj5hKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj5hhhj5hKubah}(h]j5ah ](jjeh"]h$]h&]jj)jhuh1jhj5hKhj5hhubj)}(hhh]h)}(h.Frees a previously allocated **mci** structureh](hFrees a previously allocated }(hj5hhhNhNubjW)}(h**mci**h]hmci}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj5ubh structure}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj5hhubah}(h]h ]h"]h$]h&]uh1jhj5hhhj5hKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=j5j>j5j?j@jAuh1jhhhjJhNhNubjC)}(hY**Parameters** ``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structureh](h)}(h**Parameters**h]jW)}(hj6h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj5ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj5ubja)}(hhh]jf)}(hG``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structureh](jl)}(h``struct mem_ctl_info *mci``h]jh)}(hj 6h]hstruct mem_ctl_info *mci}(hj"6hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj6ubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj6ubj)}(hhh]h)}(h*pointer to a struct mem_ctl_info structureh]h*pointer to a struct mem_ctl_info structure}(hj96hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj66ubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jehj56hKhj6ubah}(h]h ]h"]h$]h&]uh1j`hj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_has_mcs (C function)c.edac_has_mcshNtauh1jhjJhhhNhNubj)}(hhh](j)}(hbool edac_has_mcs (void)h]j)}(hbool edac_has_mcs(void)h](j )}(hboolh]hbool}(hjz6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv6hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv6hhhj6hKubj)}(h edac_has_mcsh]j)}(h edac_has_mcsh]h edac_has_mcs}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjv6hhhj6hKubj2 )}(h(void)h]j8 )}(hvoidh]j )}(hvoidh]hvoid}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]noemphjjuh1j7 hj6ubah}(h]h ]h"]h$]h&]jjuh1j1 hjv6hhhj6hKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjr6hhhj6hKubah}(h]jm6ah ](jjeh"]h$]h&]jj)jhuh1jhj6hKhjo6hhubj)}(hhh]h)}(h%Check if any MCs have been allocated.h]h%Check if any MCs have been allocated.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj6hhubah}(h]h ]h"]h$]h&]uh1jhjo6hhhj6hKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=j6j>j6j?j@jAuh1jhhhjJhNhNubjC)}(h**Parameters** ``void`` no arguments **Return** True if MC instances have been registered successfully. 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False otherwise.h]hHTrue if MC instances have been registered successfully. False otherwise.}(hjw7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjs7ubah}(h]h ]h"]h$]h&]uh1jf3hj7hKhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_find (C function)c.edac_mc_findhNtauh1jhjJhhhNhNubj)}(hhh](j)}(h,struct mem_ctl_info * edac_mc_find (int idx)h]j)}(h*struct mem_ctl_info *edac_mc_find(int idx)h](j)}(hjyh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhj7hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj7modnameN classnameNjj)}j]j)}j edac_mc_findsbc.edac_mc_findasbuh1hhj7hhhj7hKubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhj7hKubj )}(hjhh]h*}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhj7hKubj)}(h edac_mc_findh]j)}(hj7h]h edac_mc_find}(hj 8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj7hhhj7hKubj2 )}(h (int idx)h]j8 )}(hint idxh](j )}(hinth]hint}(hj&8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"8ubj)}(h h]h }(hj48hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"8ubj)}(hidxh]hidx}(hjB8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"8ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj8ubah}(h]h ]h"]h$]h&]jjuh1j1 hj7hhhj7hKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj7hhhj7hKubah}(h]j7ah ](jjeh"]h$]h&]jj)jhuh1jhj7hKhj7hhubj)}(hhh]h)}(h;Search for a mem_ctl_info structure whose index is **idx**.h](h3Search for a mem_ctl_info structure whose index is }(hjl8hhhNhNubjW)}(h**idx**h]hidx}(hjt8hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjl8ubh.}(hjl8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhji8hhubah}(h]h ]h"]h$]h&]uh1jhj7hhhj7hKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=j8j>j8j?j@jAuh1jhhhjJhNhNubjC)}(h**Parameters** ``int idx`` index to be seek **Description** If found, return a pointer to the structure. Else return NULL.h](h)}(h**Parameters**h]jW)}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj8ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubja)}(hhh]jf)}(h``int idx`` index to be seek h](jl)}(h ``int idx``h]jh)}(hj8h]hint idx}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj8ubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubj)}(hhh]h)}(hindex to be seekh]hindex to be seek}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hKhj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jehj8hKhj8ubah}(h]h ]h"]h$]h&]uh1j`hj8ubh)}(h**Description**h]jW)}(hj8h]h Description}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj8ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubh)}(h>If found, return a pointer to the structure. Else return NULL.h]h>If found, return a pointer to the structure. Else return NULL.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jfind_mci_by_dev (C function)c.find_mci_by_devhNtauh1jhjJhhhNhNubj)}(hhh](j)}(h:struct mem_ctl_info * find_mci_by_dev (struct device *dev)h]j)}(h8struct mem_ctl_info *find_mci_by_dev(struct device *dev)h](j)}(hjyh]hstruct}(hj?9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;9hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hjM9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;9hhhjL9hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj^9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[9ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj`9modnameN classnameNjj)}j]j)}jfind_mci_by_devsbc.find_mci_by_devasbuh1hhj;9hhhjL9hKubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;9hhhjL9hKubj )}(hjhh]h*}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;9hhhjL9hKubj)}(hfind_mci_by_devh]j)}(hj|9h]hfind_mci_by_dev}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj;9hhhjL9hKubj2 )}(h(struct device *dev)h]j8 )}(hstruct device *devh](j)}(hjyh]hstruct}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(hdeviceh]hdevice}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj9modnameN classnameNjj)}j]jz9c.find_mci_by_devasbuh1hhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj )}(hjhh]h*}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj)}(hdevh]hdev}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj9ubah}(h]h ]h"]h$]h&]jjuh1j1 hj;9hhhjL9hKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj79hhhjL9hKubah}(h]j29ah ](jjeh"]h$]h&]jj)jhuh1jhjL9hKhj49hhubj)}(hhh]h)}(hMScan list of controllers looking for the one that manages the **dev** device.h](h>Scan list of controllers looking for the one that manages the }(hj::hhhNhNubjW)}(h**dev**h]hdev}(hjB:hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj::ubh device.}(hj::hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj7:hhubah}(h]h ]h"]h$]h&]uh1jhj49hhhjL9hKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jd:j>jd:j?j@jAuh1jhhhjJhNhNubjC)}(h**Parameters** ``struct device *dev`` pointer to a struct device related with the MCI **Return** on success, returns a pointer to struct :c:type:`mem_ctl_info`; ``NULL`` otherwise.h](h)}(h**Parameters**h]jW)}(hjn:h]h Parameters}(hjp:hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjl:ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjh:ubja)}(hhh]jf)}(hG``struct device *dev`` pointer to a struct device related with the MCI h](jl)}(h``struct device *dev``h]jh)}(hj:h]hstruct device *dev}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj:ubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj:ubj)}(hhh]h)}(h/pointer to a struct device related with the MCIh]h/pointer to a struct device related with the MCI}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hKhj:ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jehj:hKhj:ubah}(h]h ]h"]h$]h&]uh1j`hjh:ubh)}(h **Return**h]jW)}(hj:h]hReturn}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj:ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjh:ubh)}(hSon success, returns a pointer to struct :c:type:`mem_ctl_info`; ``NULL`` otherwise.h](h(on success, returns a pointer to struct }(hj:hhhNhNubh)}(h:c:type:`mem_ctl_info`h]jh)}(hj:h]h mem_ctl_info}(hj:hhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghj:ubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj)}j]sbj mem_ctl_infouh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj:ubh; }(hj:hhhNhNubjh)}(h``NULL``h]hNULL}(hj ;hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj:ubh otherwise.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hKhjh:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_del_mc (C function)c.edac_mc_del_mchNtauh1jhjJhhhNhNubj)}(hhh](j)}(h9struct mem_ctl_info * edac_mc_del_mc (struct device *dev)h]j)}(h7struct mem_ctl_info *edac_mc_del_mc(struct device *dev)h](j)}(hjyh]hstruct}(hjE;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA;hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hjS;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA;hhhjR;hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hjd;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja;ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjf;modnameN classnameNjj)}j]j)}jedac_mc_del_mcsbc.edac_mc_del_mcasbuh1hhjA;hhhjR;hKubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA;hhhjR;hKubj )}(hjhh]h*}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA;hhhjR;hKubj)}(hedac_mc_del_mch]j)}(hj;h]hedac_mc_del_mc}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjA;hhhjR;hKubj2 )}(h(struct device *dev)h]j8 )}(hstruct device *devh](j)}(hjyh]hstruct}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hdeviceh]hdevice}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj;modnameN classnameNjj)}j]j;c.edac_mc_del_mcasbuh1hhj;ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj )}(hjhh]h*}(hj <hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hdevh]hdev}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj;ubah}(h]h ]h"]h$]h&]jjuh1j1 hjA;hhhjR;hKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj=;hhhjR;hKubah}(h]j8;ah ](jjeh"]h$]h&]jj)jhuh1jhjR;hKhj:;hhubj)}(hhh]h)}(hiRemove sysfs entries for mci structure associated with **dev** and remove mci structure from global list.h](h7Remove sysfs entries for mci structure associated with }(hj@<hhhNhNubjW)}(h**dev**h]hdev}(hjH<hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj@<ubh+ and remove mci structure from global list.}(hj@<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj=<hhubah}(h]h ]h"]h$]h&]uh1jhj:;hhhjR;hKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jj<j>jj<j?j@jAuh1jhhhjJhNhNubjC)}(h**Parameters** ``struct device *dev`` Pointer to struct :c:type:`device` representing mci structure to remove. **Return** pointer to removed mci structure, or ``NULL`` if device not found.h](h)}(h**Parameters**h]jW)}(hjt<h]h Parameters}(hjv<hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjr<ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjn<ubja)}(hhh]jf)}(h```struct device *dev`` Pointer to struct :c:type:`device` representing mci structure to remove. h](jl)}(h``struct device *dev``h]jh)}(hj<h]hstruct device *dev}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj<ubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj<ubj)}(hhh]h)}(hHPointer to struct :c:type:`device` representing mci structure to remove.h](hPointer to struct }(hj<hhhNhNubh)}(h:c:type:`device`h]jh)}(hj<h]hdevice}(hj<hhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghj<ubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jdeviceuh1hhj<hKhj<ubh& representing mci structure to remove.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hKhj<ubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jehj<hKhj<ubah}(h]h ]h"]h$]h&]uh1j`hjn<ubh)}(h **Return**h]jW)}(hj<h]hReturn}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj<ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjn<ubh)}(hBpointer to removed mci structure, or ``NULL`` if device not found.h](h%pointer to removed mci structure, or }(hj=hhhNhNubjh)}(h``NULL``h]hNULL}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj=ubh if device not found.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjn<ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j'edac_mc_find_csrow_by_page (C function)c.edac_mc_find_csrow_by_pagehNtauh1jhjJhhhNhNubj)}(hhh](j)}(hMint edac_mc_find_csrow_by_page (struct mem_ctl_info *mci, unsigned long page)h]j)}(hLint edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)h](j )}(hinth]hint}(hjH=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD=hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hjW=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjD=hhhjV=hKubj)}(hedac_mc_find_csrow_by_pageh]j)}(hedac_mc_find_csrow_by_pageh]hedac_mc_find_csrow_by_page}(hji=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje=ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjD=hhhjV=hKubj2 )}(h.(struct mem_ctl_info *mci, unsigned long page)h](j8 )}(hstruct mem_ctl_info *mcih](j)}(hjyh]hstruct}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj=modnameN classnameNjj)}j]j)}jjk=sbc.edac_mc_find_csrow_by_pageasbuh1hhj=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(hjhh]h*}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hmcih]hmci}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj}=ubj8 )}(hunsigned long pageh](j )}(hunsignedh]hunsigned}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(hlongh]hlong}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(h h]h }(hj!>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hpageh]hpage}(hj/>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj}=ubeh}(h]h ]h"]h$]h&]jjuh1j1 hjD=hhhjV=hKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj@=hhhjV=hKubah}(h]j;=ah ](jjeh"]h$]h&]jj)jhuh1jhjV=hKhj==hhubj)}(hhh]h)}(h@Ancillary routine to identify what csrow contains a memory page.h]h@Ancillary routine to identify what csrow contains a memory page.}(hjY>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjV>hhubah}(h]h ]h"]h$]h&]uh1jhj==hhhjV=hKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jq>j>jq>j?j@jAuh1jhhhjJhNhNubjC)}(h**Parameters** ``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structure ``unsigned long page`` memory page to find **Return** on success, returns the csrow. -1 if not found.h](h)}(h**Parameters**h]jW)}(hj{>h]h Parameters}(hj}>hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjy>ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhju>ubja)}(hhh](jf)}(hH``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structure h](jl)}(h``struct mem_ctl_info *mci``h]jh)}(hj>h]hstruct mem_ctl_info *mci}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj>ubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubj)}(hhh]h)}(h*pointer to a struct mem_ctl_info structureh]h*pointer to a struct mem_ctl_info structure}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj>ubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jehj>hKhj>ubjf)}(h+``unsigned long page`` memory page to find h](jl)}(h``unsigned long page``h]jh)}(hj>h]hunsigned long page}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj>ubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubj)}(hhh]h)}(hmemory page to findh]hmemory page to find}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj>ubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jehj>hKhj>ubeh}(h]h ]h"]h$]h&]uh1j`hju>ubh)}(h **Return**h]jW)}(hj?h]hReturn}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj ?ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhju>ubh)}(h/on success, returns the csrow. -1 if not found.h]h/on success, returns the csrow. -1 if not found.}(hj$?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhju>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j%edac_raw_mc_handle_error (C function)c.edac_raw_mc_handle_errorhNtauh1jhjJhhhNhNubj)}(hhh](j)}(h=void edac_raw_mc_handle_error (struct edac_raw_error_desc *e)h]j)}(hj+@j?j@jAuh1jhhhjJhNhNubjC)}(hX**Parameters** ``struct edac_raw_error_desc *e`` error description **Description** This raw function is used internally by edac_mc_handle_error(). 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It should only be called directly when the hardware error come directly from BIOS, like in the case of APEI GHES driver.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj/@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!edac_mc_handle_error (C function)c.edac_mc_handle_errorhNtauh1jhjJhhhNhNubj)}(hhh](j)}(hXDvoid edac_mc_handle_error (const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const u16 error_count, const unsigned long page_frame_number, const unsigned long offset_in_page, const unsigned long syndrome, const int top_layer, const int mid_layer, const int low_layer, const char *msg, const char *other_detail)h]j)}(hXCvoid edac_mc_handle_error(const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const u16 error_count, const unsigned long page_frame_number, const unsigned long offset_in_page, const unsigned long syndrome, const int top_layer, const int mid_layer, const int low_layer, const char *msg, const char *other_detail)h](j )}(hvoidh]hvoid}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhj@hKubj)}(hedac_mc_handle_errorh]j)}(hedac_mc_handle_errorh]hedac_mc_handle_error}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@hhhj@hKubj2 )}(hX*(const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const u16 error_count, const unsigned long page_frame_number, const unsigned long offset_in_page, const unsigned long syndrome, const int top_layer, const int mid_layer, const int low_layer, const char *msg, const char *other_detail)h](j8 )}(h$const enum hw_event_mc_err_type typeh](j)}(hj3h]hconst}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubj)}(hjh]henum}(hj,AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubj)}(h h]h }(hj9AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubh)}(hhh]j)}(hhw_event_mc_err_typeh]hhw_event_mc_err_type}(hjJAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGAubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjLAmodnameN classnameNjj)}j]j)}jj@sbc.edac_mc_handle_errorasbuh1hhj Aubj)}(h h]h }(hjjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubj)}(htypeh]htype}(hjxAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj Aubj8 )}(hstruct mem_ctl_info *mcih](j)}(hjyh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjAmodnameN classnameNjj)}j]jfAc.edac_mc_handle_errorasbuh1hhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj )}(hjhh]h*}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj)}(hmcih]hmci}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj Aubj8 )}(hconst u16 error_counth](j)}(hj3h]hconst}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(hu16h]hu16}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj!BmodnameN classnameNjj)}j]jfAc.edac_mc_handle_errorasbuh1hhjAubj)}(h h]h }(hj=BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h error_counth]h error_count}(hjKBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj Aubj8 )}(h%const unsigned long page_frame_numberh](j)}(hj3h]hconst}(hjdBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Bubj)}(h h]h }(hjqBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Bubj )}(hunsignedh]hunsigned}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`Bubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Bubj )}(hlongh]hlong}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`Bubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Bubj)}(hpage_frame_numberh]hpage_frame_number}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Bubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj Aubj8 )}(h"const unsigned long offset_in_pageh](j)}(hj3h]hconst}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj )}(hunsignedh]hunsigned}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj )}(hlongh]hlong}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj)}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(hoffset_in_pageh]hoffset_in_page}(hj#ChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj Aubj8 )}(hconst unsigned long syndromeh](j)}(hj3h]hconst}(hjj{Ej?j@jAuh1jhhhjJhNhNubjC)}(hX.**Parameters** ``const enum hw_event_mc_err_type type`` severity of the error (CE/UE/Fatal) ``struct mem_ctl_info *mci`` a struct mem_ctl_info pointer ``const u16 error_count`` Number of errors of the same type ``const unsigned long page_frame_number`` mem page where the error occurred ``const unsigned long offset_in_page`` offset of the error inside the page ``const unsigned long syndrome`` ECC syndrome ``const int top_layer`` Memory layer[0] position ``const int mid_layer`` Memory layer[1] position ``const int low_layer`` Memory layer[2] position ``const char *msg`` Message meaningful to the end users that explains the event ``const char *other_detail`` Technical details about the event that may help hardware manufacturers and EDAC developers to analyse the eventh](h)}(h**Parameters**h]jW)}(hjEh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjEubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjEubja)}(hhh](jf)}(hM``const enum hw_event_mc_err_type type`` severity of the error (CE/UE/Fatal) h](jl)}(h(``const enum hw_event_mc_err_type type``h]jh)}(hjEh]h$const enum hw_event_mc_err_type type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjEubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjEubj)}(hhh]h)}(h#severity of the error (CE/UE/Fatal)h]h#severity of the error (CE/UE/Fatal)}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jehjEhKhjEubjf)}(h;``struct mem_ctl_info *mci`` a struct mem_ctl_info pointer h](jl)}(h``struct mem_ctl_info *mci``h]jh)}(hjEh]hstruct mem_ctl_info *mci}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjEubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjEubj)}(hhh]h)}(ha struct mem_ctl_info pointerh]ha struct mem_ctl_info pointer}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jehjEhKhjEubjf)}(h<``const u16 error_count`` Number of errors of the same type h](jl)}(h``const u16 error_count``h]jh)}(hjFh]hconst u16 error_count}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjFubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(h!Number of errors of the same typeh]h!Number of errors of the same type}(hj/FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+FhKhj,Fubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jehj+FhKhjEubjf)}(hL``const unsigned long page_frame_number`` mem page where the error occurred h](jl)}(h)``const unsigned long page_frame_number``h]jh)}(hjOFh]h%const unsigned long page_frame_number}(hjQFhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjMFubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjIFubj)}(hhh]h)}(h!mem page where the error occurredh]h!mem page where the error occurred}(hjhFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdFhKhjeFubah}(h]h ]h"]h$]h&]uh1jhjIFubeh}(h]h ]h"]h$]h&]uh1jehjdFhKhjEubjf)}(hK``const unsigned long offset_in_page`` offset of the error inside the page h](jl)}(h&``const unsigned long offset_in_page``h]jh)}(hjFh]h"const unsigned long offset_in_page}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjFubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(h#offset of the error inside the pageh]h#offset of the error inside the page}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKhjFubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jehjFhKhjEubjf)}(h.``const unsigned long syndrome`` ECC syndrome h](jl)}(h ``const unsigned long syndrome``h]jh)}(hjFh]hconst unsigned long syndrome}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjFubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(h ECC syndromeh]h ECC syndrome}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKhjFubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jehjFhKhjEubjf)}(h1``const int top_layer`` Memory layer[0] position h](jl)}(h``const int top_layer``h]jh)}(hjFh]hconst int top_layer}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjFubah}(h]h ]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(hMemory layer[0] positionh]hMemory layer[0] position}(hjGhhhNhNubah}(h]h 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]h"]h$]h&]uh1jkhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjGubj)}(hhh]h)}(hoTechnical details about the event that may help hardware manufacturers and EDAC developers to analyse the eventh]hoTechnical details about the event that may help hardware manufacturers and EDAC developers to analyse the event}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jehjGhKhjEubeh}(h]h ]h"]h$]h&]uh1j`hjEubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjJhhhNhNubeh}(h]memory-controllersah ]h"]memory controllersah$]h&]uh1hhhhhhhhKyubh)}(hhh](h)}(hPCI Controllersh]hPCI Controllers}(hj+HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(HhhhhhKubh)}(hThe EDAC subsystem provides a mechanism to handle PCI controllers by calling the :c:func:`edac_pci_alloc_ctl_info`. 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It will use the struct }(hj9HhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hjfHh]hedac_pci_ctl_info}(hjhHhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjdHubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhhhKhj9Hubh! to describe the PCI controllers.}(hj9HhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj(Hhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$edac_pci_alloc_ctl_info (C function)c.edac_pci_alloc_ctl_infohNtauh1jhj(HhhhNhNubj)}(hhh](j)}(hcstruct edac_pci_ctl_info * edac_pci_alloc_ctl_info (unsigned int sz_pvt, const char *edac_pci_name)h]j)}(hastruct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, const char *edac_pci_name)h](j)}(hjyh]hstruct}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjHhKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjHmodnameN classnameNjj)}j]j)}jedac_pci_alloc_ctl_infosbc.edac_pci_alloc_ctl_infoasbuh1hhjHhhhjHhKubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjHhKubj )}(hjhh]h*}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHhhhjHhKubj)}(hedac_pci_alloc_ctl_infoh]j)}(hjHh]hedac_pci_alloc_ctl_info}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ](jjeh"]h$]h&]jjuh1jhjHhhhjHhKubj2 )}(h0(unsigned int sz_pvt, const char *edac_pci_name)h](j8 )}(hunsigned int sz_pvth](j )}(hunsignedh]hunsigned}(hj IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj)}(h h]h }(hj.IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj )}(hinth]hint}(hjjIj?j@jAuh1jhhhj(HhNhNubjC)}(hX**Parameters** ``unsigned int sz_pvt`` size of the private info at struct :c:type:`edac_pci_ctl_info` ``const char *edac_pci_name`` name of the PCI device **Description** The chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE. **Return** a pointer to struct :c:type:`edac_pci_ctl_info` on success; ``NULL`` otherwise.h](h)}(h**Parameters**h]jW)}(hjJh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjIubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjIubja)}(hhh](jf)}(hW``unsigned int sz_pvt`` size of the private info at struct :c:type:`edac_pci_ctl_info` h](jl)}(h``unsigned int sz_pvt``h]jh)}(hj Jh]hunsigned int sz_pvt}(hj"JhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjJubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjJubj)}(hhh]h)}(h>size of the private info at struct :c:type:`edac_pci_ctl_info`h](h#size of the private info at struct }(hj9JhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hjCJh]hedac_pci_ctl_info}(hjEJhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjAJubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhj5JhKhj9Jubeh}(h]h ]h"]h$]h&]uh1hhj5JhKhj6Jubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jehj5JhKhjJubjf)}(h5``const char *edac_pci_name`` name of the PCI device h](jl)}(h``const char *edac_pci_name``h]jh)}(hjxJh]hconst char *edac_pci_name}(hjzJhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjvJubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjrJubj)}(hhh]h)}(hname of the PCI deviceh]hname of the PCI device}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1jhjrJubeh}(h]h ]h"]h$]h&]uh1jehjJhKhjJubeh}(h]h ]h"]h$]h&]uh1j`hjIubh)}(h**Description**h]jW)}(hjJh]h Description}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjJubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjIubh)}(hpThe chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE.h]hpThe chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjIubh)}(h **Return**h]jW)}(hjJh]hReturn}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjJubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjIubh)}(hOa pointer to struct :c:type:`edac_pci_ctl_info` on success; ``NULL`` otherwise.h](ha pointer to struct }(hjJhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hjJh]hedac_pci_ctl_info}(hjJhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjJubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjJubh on success; }(hjJhhhNhNubjh)}(h``NULL``h]hNULL}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjJubh otherwise.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjKhKhjIubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhj(HhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_pci_free_ctl_info (C function)c.edac_pci_free_ctl_infohNtauh1jhj(HhhhNhNubj)}(hhh](j)}(h;void edac_pci_free_ctl_info (struct edac_pci_ctl_info *pci)h]j)}(h:void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)h](j )}(hvoidh]hvoid}(hjTKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPKhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjcKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPKhhhjbKhKubj)}(hedac_pci_free_ctl_infoh]j)}(hedac_pci_free_ctl_infoh]hedac_pci_free_ctl_info}(hjuKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqKubah}(h]h ](jjeh"]h$]h&]jjuh1jhjPKhhhjbKhKubj2 )}(h(struct edac_pci_ctl_info *pci)h]j8 )}(hstruct edac_pci_ctl_info *pcih](j)}(hjyh]hstruct}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjKmodnameN classnameNjj)}j]j)}jjwKsbc.edac_pci_free_ctl_infoasbuh1hhjKubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj )}(hjhh]h*}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj)}(hpcih]hpci}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjKubah}(h]h ]h"]h$]h&]jjuh1j1 hjPKhhhjbKhKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjLKhhhjbKhKubah}(h]jGKah ](jjeh"]h$]h&]jj)jhuh1jhjbKhKhjIKhhubj)}(hhh]h)}(h)Last action on the pci control structure.h]h)Last action on the pci control structure.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjLhhubah}(h]h ]h"]h$]h&]uh1jhjIKhhhjbKhKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=j,Lj>j,Lj?j@jAuh1jhhhj(HhNhNubjC)}(hX1**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** Calls the remove sysfs information, which will unregister this control struct's kobj. When that kobj's ref count goes to zero, its release function will be call and then kfree() the memory.h](h)}(h**Parameters**h]jW)}(hj6Lh]h Parameters}(hj8LhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj4Lubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj0Lubja)}(hhh]jf)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jl)}(h!``struct edac_pci_ctl_info *pci``h]jh)}(hjULh]hstruct edac_pci_ctl_info *pci}(hjWLhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjSLubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjOLubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hjnLhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hjxLh]hedac_pci_ctl_info}(hjzLhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjvLubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhjjLhKhjnLubeh}(h]h ]h"]h$]h&]uh1hhjjLhKhjkLubah}(h]h ]h"]h$]h&]uh1jhjOLubeh}(h]h ]h"]h$]h&]uh1jehjjLhKhjLLubah}(h]h ]h"]h$]h&]uh1j`hj0Lubh)}(h**Description**h]jW)}(hjLh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjLubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj0Lubh)}(hCalls the remove sysfs information, which will unregister this control struct's kobj. When that kobj's ref count goes to zero, its release function will be call and then kfree() the memory.h]hCalls the remove sysfs information, which will unregister this control struct’s kobj. When that kobj’s ref count goes to zero, its release function will be call and then kfree() the memory.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj0Lubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhj(HhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!edac_pci_alloc_index (C function)c.edac_pci_alloc_indexhNtauh1jhj(HhhhNhNubj)}(hhh](j)}(hint edac_pci_alloc_index (void)h]j)}(hint edac_pci_alloc_index(void)h](j )}(hinth]hint}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhjMhKubj)}(hedac_pci_alloc_indexh]j)}(hedac_pci_alloc_indexh]hedac_pci_alloc_index}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ](jjeh"]h$]h&]jjuh1jhjLhhhjMhKubj2 )}(h(void)h]j8 )}(hvoidh]j )}(hvoidh]hvoid}(hj1MhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Mubah}(h]h ]h"]h$]h&]noemphjjuh1j7 hj)Mubah}(h]h ]h"]h$]h&]jjuh1j1 hjLhhhjMhKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjLhhhjMhKubah}(h]jLah ](jjeh"]h$]h&]jj)jhuh1jhjMhKhjLhhubj)}(hhh]h)}(h"Allocate a unique PCI index numberh]h"Allocate a unique PCI index number}(hj[MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjXMhhubah}(h]h ]h"]h$]h&]uh1jhjLhhhjMhKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jsMj>jsMj?j@jAuh1jhhhj(HhNhNubjC)}(hP**Parameters** ``void`` no arguments **Return** allocated index numberh](h)}(h**Parameters**h]jW)}(hj}Mh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj{Mubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjwMubja)}(hhh]jf)}(h``void`` no arguments h](jl)}(h``void``h]jh)}(hjMh]hvoid}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjMubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMubj)}(hhh]h)}(h no argumentsh]h no arguments}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKhjMubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jehjMhKhjMubah}(h]h ]h"]h$]h&]uh1j`hjwMubh)}(h **Return**h]jW)}(hjMh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjMubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjwMubjg3)}(hallocated index numberh]h)}(hjMh]hallocated index number}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMubah}(h]h ]h"]h$]h&]uh1jf3hjMhKhjwMubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhj(HhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j edac_pci_add_device (C function)c.edac_pci_add_devicehNtauh1jhj(HhhhNhNubj)}(hhh](j)}(hEint edac_pci_add_device (struct edac_pci_ctl_info *pci, int edac_idx)h]j)}(hDint edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)h](j )}(hinth]hint}(hj%NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!NhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hj4NhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!Nhhhj3NhKubj)}(hedac_pci_add_deviceh]j)}(hedac_pci_add_deviceh]hedac_pci_add_device}(hjFNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBNubah}(h]h ](jjeh"]h$]h&]jjuh1jhj!Nhhhj3NhKubj2 )}(h-(struct edac_pci_ctl_info *pci, int edac_idx)h](j8 )}(hstruct edac_pci_ctl_info *pcih](j)}(hjyh]hstruct}(hjbNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^Nubj)}(h h]h }(hjoNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^Nubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}Nubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjNmodnameN classnameNjj)}j]j)}jjHNsbc.edac_pci_add_deviceasbuh1hhj^Nubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^Nubj )}(hjhh]h*}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^Nubj)}(hpcih]hpci}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^Nubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZNubj8 )}(h int edac_idxh](j )}(hinth]hint}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(hedac_idxh]hedac_idx}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZNubeh}(h]h ]h"]h$]h&]jjuh1j1 hj!Nhhhj3NhKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjNhhhj3NhKubah}(h]jNah ](jjeh"]h$]h&]jj)jhuh1jhj3NhKhjNhhubj)}(hhh]h)}(hzInsert the 'edac_dev' structure into the edac_pci global list and create sysfs entries associated with edac_pci structure.h]h~Insert the ‘edac_dev’ structure into the edac_pci global list and create sysfs entries associated with edac_pci structure.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjOhhubah}(h]h ]h"]h$]h&]uh1jhjNhhhj3NhKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=j2Oj>j2Oj?j@jAuh1jhhhj(HhNhNubjC)}(hX **Parameters** ``struct edac_pci_ctl_info *pci`` pointer to the edac_device structure to be added to the list ``int edac_idx`` A unique numeric identifier to be assigned to the 'edac_pci' structure. **Return** 0 on Success, or an error code on failureh](h)}(h**Parameters**h]jW)}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj:Oubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj6Oubja)}(hhh](jf)}(h_``struct edac_pci_ctl_info *pci`` pointer to the edac_device structure to be added to the list h](jl)}(h!``struct edac_pci_ctl_info *pci``h]jh)}(hj[Oh]hstruct edac_pci_ctl_info *pci}(hj]OhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjYOubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjUOubj)}(hhh]h)}(hj"Qj?j@jAuh1jhhhj(HhNhNubjC)}(hXS**Parameters** ``struct device *dev`` Pointer to 'struct device' representing edac_pci structure to remove **Description** Remove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global list **Return** Pointer to removed edac_pci structure, or ``NULL`` if device not foundh](h)}(h**Parameters**h]jW)}(hj,Qh]h Parameters}(hj.QhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj*Qubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj&Qubja)}(hhh]jf)}(h\``struct device *dev`` Pointer to 'struct device' representing edac_pci structure to remove h](jl)}(h``struct device *dev``h]jh)}(hjKQh]hstruct device *dev}(hjMQhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjIQubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjEQubj)}(hhh]h)}(hDPointer to 'struct device' representing edac_pci structure to removeh]hHPointer to ‘struct device’ representing edac_pci structure to remove}(hjdQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjaQubah}(h]h ]h"]h$]h&]uh1jhjEQubeh}(h]h ]h"]h$]h&]uh1jehj`QhKhjBQubah}(h]h ]h"]h$]h&]uh1j`hj&Qubh)}(h**Description**h]jW)}(hjQh]h Description}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjQubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj&Qubjg3)}(hjRemove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global list h]h)}(hiRemove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global listh]hiRemove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global list}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjQubah}(h]h ]h"]h$]h&]uh1jf3hjQhKhj&Qubh)}(h **Return**h]jW)}(hjQh]hReturn}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjQubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj&Qubjg3)}(hFPointer to removed edac_pci structure, or ``NULL`` if device not foundh]h)}(hFPointer to removed edac_pci structure, or ``NULL`` if device not foundh](h*Pointer to removed edac_pci structure, or }(hjQhhhNhNubjh)}(h``NULL``h]hNULL}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjQubh if device not found}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjQubah}(h]h ]h"]h$]h&]uh1jf3hjQhKhj&Qubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhj(HhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(edac_pci_create_generic_ctl (C function)c.edac_pci_create_generic_ctlhNtauh1jhj(HhhhNhNubj)}(hhh](j)}(hastruct edac_pci_ctl_info * edac_pci_create_generic_ctl (struct device *dev, const char *mod_name)h]j)}(h_struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev, const char *mod_name)h](j)}(hjyh]hstruct}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hj'RhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhhj&RhKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hj8RhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5Rubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj:RmodnameN classnameNjj)}j]j)}jedac_pci_create_generic_ctlsbc.edac_pci_create_generic_ctlasbuh1hhjRhhhj&RhKubj)}(h h]h }(hjYRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhhj&RhKubj )}(hjhh]h*}(hjgRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRhhhj&RhKubj)}(hedac_pci_create_generic_ctlh]j)}(hjVRh]hedac_pci_create_generic_ctl}(hjxRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtRubah}(h]h ](jjeh"]h$]h&]jjuh1jhjRhhhj&RhKubj2 )}(h*(struct device *dev, const char *mod_name)h](j8 )}(hstruct device *devh](j)}(hjyh]hstruct}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubh)}(hhh]j)}(hdeviceh]hdevice}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjRmodnameN classnameNjj)}j]jTRc.edac_pci_create_generic_ctlasbuh1hhjRubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj )}(hjhh]h*}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hdevh]hdev}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjRubj8 )}(hconst char *mod_nameh](j)}(hj3h]hconst}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj )}(hcharh]hchar}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(h h]h }(hj,ShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj )}(hjhh]h*}(hj:ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hmod_nameh]hmod_name}(hjGShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjRubeh}(h]h ]h"]h$]h&]jjuh1j1 hjRhhhj&RhKubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjRhhhj&RhKubah}(h]j Rah ](jjeh"]h$]h&]jj)jhuh1jhj&RhKhjRhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjRhhhj&RhKubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jzSj>jzSj?j@jAuh1jhhhj(HhNhNubjC)}(hX**Parameters** ``struct device *dev`` pointer to struct :c:type:`device`; ``const char *mod_name`` name of the PCI device **Description** A generic constructor for a PCI parity polling device Some systems have more than one domain of PCI busses. For systems with one domain, then this API will provide for a generic poller. This routine calls the edac_pci_alloc_ctl_info() for the generic device, with default values **Return** Pointer to struct :c:type:`edac_pci_ctl_info` on success, ``NULL`` on failure.h](h)}(h**Parameters**h]jW)}(hjSh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjSubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj~Subja)}(hhh](jf)}(h;``struct device *dev`` pointer to struct :c:type:`device`; h](jl)}(h``struct device *dev``h]jh)}(hjSh]hstruct device *dev}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jghjSubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubj)}(hhh]h)}(h#pointer to struct :c:type:`device`;h](hpointer to struct }(hjShhhNhNubh)}(h:c:type:`device`h]jh)}(hjSh]hdevice}(hjShhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjSubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jdeviceuh1hhjShKhjSubh;}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShKhjSubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jehjShKhjSubjf)}(h0``const char *mod_name`` name of the PCI device h](jl)}(h``const char *mod_name``h]jh)}(hjSh]hconst char *mod_name}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jghjSubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubj)}(hhh]h)}(hname of the PCI deviceh]hname of the PCI device}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKhjTubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jehjThKhjSubeh}(h]h ]h"]h$]h&]uh1j`hj~Subh)}(h**Description**h]jW)}(hj:Th]h Description}(hjjUj?j@jAuh1jhhhj(HhNhNubjC)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** The release function of a generic EDAC PCI polling deviceh](h)}(h**Parameters**h]jW)}(hjUh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjUubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjUubja)}(hhh]jf)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jl)}(h!``struct edac_pci_ctl_info *pci``h]jh)}(hjVh]hstruct edac_pci_ctl_info *pci}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjVubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj Vubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hj*VhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hj4Vh]hedac_pci_ctl_info}(hj6VhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghj2Vubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhj&VhKhj*Vubeh}(h]h ]h"]h$]h&]uh1hhj&VhKhj'Vubah}(h]h ]h"]h$]h&]uh1jhj Vubeh}(h]h ]h"]h$]h&]uh1jehj&VhKhjVubah}(h]h ]h"]h$]h&]uh1j`hjUubh)}(h**Description**h]jW)}(hjkVh]h Description}(hjmVhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjiVubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjUubjg3)}(h9The release function of a generic EDAC PCI polling deviceh]h)}(hjVh]h9The release function of a generic EDAC PCI polling device}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjVubah}(h]h ]h"]h$]h&]uh1jf3hjVhKhjUubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhj(HhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_pci_create_sysfs (C function)c.edac_pci_create_sysfshNtauh1jhj(HhhhNhNubj)}(hhh](j)}(h9int edac_pci_create_sysfs (struct edac_pci_ctl_info *pci)h]j)}(h8int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)h](j )}(hinth]hint}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhhjVhMubj)}(hedac_pci_create_sysfsh]j)}(hedac_pci_create_sysfsh]hedac_pci_create_sysfs}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubah}(h]h ](jjeh"]h$]h&]jjuh1jhjVhhhjVhMubj2 )}(h(struct edac_pci_ctl_info *pci)h]j8 )}(hstruct edac_pci_ctl_info *pcih](j)}(hjyh]hstruct}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjWmodnameN classnameNjj)}j]j)}jjVsbc.edac_pci_create_sysfsasbuh1hhjVubj)}(h h]h }(hj4WhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj )}(hjhh]h*}(hjBWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj)}(hpcih]hpci}(hjOWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjVubah}(h]h ]h"]h$]h&]jjuh1j1 hjVhhhjVhMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjVhhhjVhMubah}(h]jVah ](jjeh"]h$]h&]jj)jhuh1jhjVhMhjVhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjVhhhjVhMubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jWj>jWj?j@jAuh1jhhhj(HhNhNubjC)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** Create the controls/attributes for the specified EDAC PCI deviceh](h)}(h**Parameters**h]jW)}(hjWh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjWubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjWubja)}(hhh]jf)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jl)}(h!``struct edac_pci_ctl_info *pci``h]jh)}(hjWh]hstruct edac_pci_ctl_info *pci}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjWubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjWubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hjWhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hjWh]hedac_pci_ctl_info}(hjWhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjWubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhjWhKhjWubeh}(h]h ]h"]h$]h&]uh1hhjWhKhjWubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jehjWhKhjWubah}(h]h ]h"]h$]h&]uh1j`hjWubh)}(h**Description**h]jW)}(hjXh]h Description}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjXubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjWubjg3)}(h@Create the controls/attributes for the specified EDAC PCI deviceh]h)}(hjXh]h@Create the controls/attributes for the specified EDAC PCI device}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjXubah}(h]h ]h"]h$]h&]uh1jf3hj,XhKhjWubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhj(HhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_pci_remove_sysfs (C function)c.edac_pci_remove_sysfshNtauh1jhj(HhhhNhNubj)}(hhh](j)}(h:void edac_pci_remove_sysfs (struct edac_pci_ctl_info *pci)h]j)}(h9void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)h](j )}(hvoidh]hvoid}(hjSXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOXhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMubj)}(h h]h }(hjbXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOXhhhjaXhMubj)}(hedac_pci_remove_sysfsh]j)}(hedac_pci_remove_sysfsh]hedac_pci_remove_sysfs}(hjtXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpXubah}(h]h ](jjeh"]h$]h&]jjuh1jhjOXhhhjaXhMubj2 )}(h(struct edac_pci_ctl_info *pci)h]j8 )}(hstruct edac_pci_ctl_info *pcih](j)}(hjyh]hstruct}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjXmodnameN classnameNjj)}j]j)}jjvXsbc.edac_pci_remove_sysfsasbuh1hhjXubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj )}(hjhh]h*}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj)}(hpcih]hpci}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjXubah}(h]h ]h"]h$]h&]jjuh1j1 hjOXhhhjaXhMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjKXhhhjaXhMubah}(h]jFXah ](jjeh"]h$]h&]jj)jhuh1jhjaXhMhjHXhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjHXhhhjaXhMubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jYj>jYj?j@jAuh1jhhhj(HhNhNubjC)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** remove the controls and attributes for this EDAC PCI deviceh](h)}(h**Parameters**h]jW)}(hj&Yh]h Parameters}(hj(YhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj$Yubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhj Yubja)}(hhh]jf)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jl)}(h!``struct edac_pci_ctl_info *pci``h]jh)}(hjEYh]hstruct edac_pci_ctl_info *pci}(hjGYhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjCYubah}(h]h ]h"]h$]h&]uh1jkhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhj?Yubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hj^YhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jh)}(hjhYh]hedac_pci_ctl_info}(hjjYhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjfYubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_pci_ctl_infouh1hhjZYhMhj^Yubeh}(h]h ]h"]h$]h&]uh1hhjZYhMhj[Yubah}(h]h ]h"]h$]h&]uh1jhj?Yubeh}(h]h ]h"]h$]h&]uh1jehjZYhMhj mc/ cpu/cpu0/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count cpu/cpu1/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count ... the L1 and L2 directories would be "edac_device_block's"h]hX/sys/devices/system/edac/.. pci/ mc/ cpu/cpu0/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count cpu/cpu1/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count ... the L1 and L2 directories would be "edac_device_block's"}hjw[sbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjYhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_device_add_device (C function)c.edac_device_add_devicehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hBint edac_device_add_device (struct edac_device_ctl_info *edac_dev)h]j)}(hAint edac_device_add_device(struct edac_device_ctl_info *edac_dev)h](j )}(hinth]hint}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhj[hMubj)}(hedac_device_add_deviceh]j)}(hedac_device_add_deviceh]hedac_device_add_device}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj[hhhj[hMubj2 )}(h'(struct edac_device_ctl_info *edac_dev)h]j8 )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjyh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj[modnameN classnameNjj)}j]j)}jj[sbc.edac_device_add_deviceasbuh1hhj[ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubj )}(hjhh]h*}(hj'\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hedac_devh]hedac_dev}(hj4\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj[ubah}(h]h ]h"]h$]h&]jjuh1j1 hj[hhhj[hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj[hhhj[hMubah}(h]j[ah ](jjeh"]h$]h&]jj)jhuh1jhj[hMhj[hhubj)}(hhh]h)}(hInsert the 'edac_dev' structure into the edac_device global list and create sysfs entries associated with edac_device structure.h]hInsert the ‘edac_dev’ structure into the edac_device global list and create sysfs entries associated with edac_device structure.}(hj^\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhj[\hhubah}(h]h ]h"]h$]h&]uh1jhj[hhhj[hMubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jv\j>jv\j?j@jAuh1jhhhjYhNhNubjC)}(h**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to edac_device structure to be added to the list 'edac_device' structure. **Return** 0 on Success, or an error code on failureh](h)}(h**Parameters**h]jW)}(hj\h]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj~\ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjz\ubja)}(hhh]jf)}(h|``struct edac_device_ctl_info *edac_dev`` pointer to edac_device structure to be added to the list 'edac_device' structure. h](jl)}(h)``struct edac_device_ctl_info *edac_dev``h]jh)}(hj\h]h%struct edac_device_ctl_info *edac_dev}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj\ubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhj\ubj)}(hhh]h)}(hQpointer to edac_device structure to be added to the list 'edac_device' structure.h]hUpointer to edac_device structure to be added to the list ‘edac_device’ structure.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhj\ubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jehj\hKhj\ubah}(h]h ]h"]h$]h&]uh1j`hjz\ubh)}(h **Return**h]jW)}(hj\h]hReturn}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj\ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjz\ubjg3)}(h)0 on Success, or an error code on failureh]h)}(hj\h]h)0 on Success, or an error code on failure}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhj\ubah}(h]h ]h"]h$]h&]uh1jf3hj]hKhjz\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_device_del_device (C function)c.edac_device_del_devicehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hIstruct edac_device_ctl_info * edac_device_del_device (struct device *dev)h]j)}(hGstruct edac_device_ctl_info *edac_device_del_device(struct device *dev)h](j)}(hjyh]hstruct}(hj)]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%]hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hj7]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%]hhhj6]hMubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hjH]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE]ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjJ]modnameN classnameNjj)}j]j)}jedac_device_del_devicesbc.edac_device_del_deviceasbuh1hhj%]hhhj6]hMubj)}(h h]h }(hji]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%]hhhj6]hMubj )}(hjhh]h*}(hjw]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%]hhhj6]hMubj)}(hedac_device_del_deviceh]j)}(hjf]h]hedac_device_del_device}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj%]hhhj6]hMubj2 )}(h(struct device *dev)h]j8 )}(hstruct device *devh](j)}(hjyh]hstruct}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubh)}(hhh]j)}(hdeviceh]hdevice}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj]modnameN classnameNjj)}j]jd]c.edac_device_del_deviceasbuh1hhj]ubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj )}(hjhh]h*}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hdevh]hdev}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj]ubah}(h]h ]h"]h$]h&]jjuh1j1 hj%]hhhj6]hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj!]hhhj6]hMubah}(h]j]ah ](jjeh"]h$]h&]jj)jhuh1jhj6]hMhj]hhubj)}(hhh]h)}(hoRemove sysfs entries for specified edac_device structure and then remove edac_device structure from global listh]hoRemove sysfs entries for specified edac_device structure and then remove edac_device structure from global list}(hj$^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj!^hhubah}(h]h ]h"]h$]h&]uh1jhj]hhhj6]hMubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=j<^j>j<^j?j@jAuh1jhhhjYhNhNubjC)}(h**Parameters** ``struct device *dev`` Pointer to struct :c:type:`device` representing the edac device structure to remove. **Return** Pointer to removed edac_device structure, or ``NULL`` if device not found.h](h)}(h**Parameters**h]jW)}(hjF^h]h Parameters}(hjH^hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjD^ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj@^ubja)}(hhh]jf)}(hl``struct device *dev`` Pointer to struct :c:type:`device` representing the edac device structure to remove. h](jl)}(h``struct device *dev``h]jh)}(hje^h]hstruct device *dev}(hjg^hhhNhNubah}(h]h ]h"]h$]h&]uh1jghjc^ubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj_^ubj)}(hhh]h)}(hTPointer to struct :c:type:`device` representing the edac device structure to remove.h](hPointer to struct }(hj~^hhhNhNubh)}(h:c:type:`device`h]jh)}(hj^h]hdevice}(hj^hhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jdeviceuh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj~^ubh2 representing the edac device structure to remove.}(hj~^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMhj{^ubah}(h]h ]h"]h$]h&]uh1jhj_^ubeh}(h]h ]h"]h$]h&]uh1jehjz^hM hj\^ubah}(h]h ]h"]h$]h&]uh1j`hj@^ubh)}(h **Return**h]jW)}(hj^h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jVhj^ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj@^ubjg3)}(hJPointer to removed edac_device structure, or ``NULL`` if device not found.h]h)}(hJPointer to removed edac_device structure, or ``NULL`` if device not found.h](h-Pointer to removed edac_device structure, or }(hj^hhhNhNubjh)}(h``NULL``h]hNULL}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jghj^ubh if device not found.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj^ubah}(h]h ]h"]h$]h&]uh1jf3hj^hM hj@^ubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(edac_device_handle_ce_count (C function)c.edac_device_handle_ce_counthNtauh1jhjYhhhNhNubj)}(hhh](j)}(hvoid edac_device_handle_ce_count (struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h]j)}(hvoid edac_device_handle_ce_count(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hj%_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!_hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hj4_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!_hhhj3_hMubj)}(hedac_device_handle_ce_counth]j)}(hedac_device_handle_ce_counth]hedac_device_handle_ce_count}(hjF_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB_ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj!_hhhj3_hMubj2 )}(hg(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j8 )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjyh]hstruct}(hjb_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^_ubj)}(h h]h }(hjo_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^_ubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}_ubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetj_modnameN classnameNjj)}j]j)}jjH_sbc.edac_device_handle_ce_countasbuh1hhj^_ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^_ubj )}(hjhh]h*}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^_ubj)}(hedac_devh]hedac_dev}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^_ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZ_ubj8 )}(hunsigned int counth](j )}(hunsignedh]hunsigned}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj )}(hinth]hint}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(hcounth]hcount}(hj `hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZ_ubj8 )}(h int inst_nrh](j )}(hinth]hint}(hj%`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!`ubj)}(h h]h }(hj3`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!`ubj)}(hinst_nrh]hinst_nr}(hjA`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!`ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZ_ubj8 )}(h int block_nrh](j )}(hinth]hint}(hjZ`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV`ubj)}(h h]h }(hjh`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV`ubj)}(hblock_nrh]hblock_nr}(hjv`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV`ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZ_ubj8 )}(hconst char *msgh](j)}(hj3h]hconst}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(hcharh]hchar}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(hjhh]h*}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hmsgh]hmsg}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjZ_ubeh}(h]h ]h"]h$]h&]jjuh1j1 hj!_hhhj3_hMubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj_hhhj3_hMubah}(h]j_ah ](jjeh"]h$]h&]jj)jhuh1jhj3_hMhj_hhubj)}(hhh]h)}(hLog correctable errors.h]hLog correctable errors.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj`hhubah}(h]h ]h"]h$]h&]uh1jhj_hhhj3_hMubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jaj>jaj?j@jAuh1jhhhjYhNhNubjC)}(hXV**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``unsigned int count`` Number of errors to log. ``int inst_nr`` number of the instance where the CE error happened ``int block_nr`` number of the block where the CE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]jW)}(hjah]h Parameters}(hj!ahhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjaubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjaubja)}(hhh](jf)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](jl)}(h)``struct edac_device_ctl_info *edac_dev``h]jh)}(hj>ah]h%struct edac_device_ctl_info *edac_dev}(hj@ahhhNhNubah}(h]h ]h"]h$]h&]uh1jghjjdj?j@jAuh1jhhhjYhNhNubjC)}(hXV**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``unsigned int count`` Number of errors to log. ``int inst_nr`` number of the instance where the CE error happened ``int block_nr`` number of the block where the CE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]jW)}(hjdh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjdubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM$hjdubja)}(hhh](jf)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](jl)}(h)``struct edac_device_ctl_info *edac_dev``h]jh)}(hjdh]h%struct edac_device_ctl_info *edac_dev}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjdubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM"hjdubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hjdhhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]jh)}(hjdh]hedac_device_ctl_info}(hjdhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjdubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_device_ctl_infouh1hhjdhM"hjdubeh}(h]h ]h"]h$]h&]uh1hhjdhM"hjdubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jehjdhM"hjdubjf)}(h0``unsigned int count`` Number of errors to log. h](jl)}(h``unsigned int count``h]jh)}(hj eh]hunsigned int count}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jghj eubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM$hjeubj)}(hhh]h)}(hNumber of errors to log.h]hNumber of errors to log.}(hj%ehhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!ehM$hj"eubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jehj!ehM$hjdubjf)}(hC``int inst_nr`` number of the instance where the CE error happened h](jl)}(h``int inst_nr``h]jh)}(hjEeh]h int inst_nr}(hjGehhhNhNubah}(h]h ]h"]h$]h&]uh1jghjCeubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM#hj?eubj)}(hhh]h)}(h2number of the instance where the CE error happenedh]h2number of the instance where the CE error happened}(hj^ehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZehM#hj[eubah}(h]h ]h"]h$]h&]uh1jhj?eubeh}(h]h ]h"]h$]h&]uh1jehjZehM#hjdubjf)}(hA``int block_nr`` number of the block where the CE error happened h](jl)}(h``int block_nr``h]jh)}(hj~eh]h int block_nr}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jghj|eubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM%hjxeubj)}(hhh]h)}(h/number of the block where the CE error happenedh]h/number of the block where the CE error happened}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehM%hjeubah}(h]h ]h"]h$]h&]uh1jhjxeubeh}(h]h ]h"]h$]h&]uh1jehjehM%hjdubjf)}(h)``const char *msg`` message to be printedh](jl)}(h``const char *msg``h]jh)}(hjeh]hconst char *msg}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jghjeubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM'hjeubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM&hjeubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jehjehM'hjdubeh}(h]h ]h"]h$]h&]uh1j`hjdubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_device_handle_ce (C function)c.edac_device_handle_cehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hnvoid edac_device_handle_ce (struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h]j)}(hmvoid edac_device_handle_ce(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj fhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM4ubj)}(h h]h }(hj fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj fhhhjfhM4ubj)}(hedac_device_handle_ceh]j)}(hedac_device_handle_ceh]hedac_device_handle_ce}(hj2fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.fubah}(h]h ](jjeh"]h$]h&]jjuh1jhj fhhhjfhM4ubj2 )}(hS(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h](j8 )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjyh]hstruct}(hjNfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJfubj)}(h h]h }(hj[fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJfubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hjlfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjifubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjnfmodnameN classnameNjj)}j]j)}jj4fsbc.edac_device_handle_ceasbuh1hhjJfubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJfubj )}(hjhh]h*}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJfubj)}(hedac_devh]hedac_dev}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJfubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjFfubj8 )}(h int inst_nrh](j )}(hinth]hint}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(hinst_nrh]hinst_nr}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjFfubj8 )}(h int block_nrh](j )}(hinth]hint}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(hblock_nrh]hblock_nr}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjFfubj8 )}(hconst char *msgh](j)}(hj3h]hconst}(hj*ghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubj)}(h h]h }(hj7ghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubj )}(hcharh]hchar}(hjEghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&gubj)}(h h]h }(hjSghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubj )}(hjhh]h*}(hjaghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&gubj)}(hmsgh]hmsg}(hjnghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hjFfubeh}(h]h ]h"]h$]h&]jjuh1j1 hj fhhhjfhM4ubeh}(h]h ]h"]h$]h&]jjj uh1jjjhj fhhhjfhM4ubah}(h]jfah ](jjeh"]h$]h&]jj)jhuh1jhjfhM4hjfhhubj)}(hhh]h)}(hLog a single correctable errorh]hLog a single correctable error}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM-hjghhubah}(h]h ]h"]h$]h&]uh1jhjfhhhjfhM4ubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jgj>jgj?j@jAuh1jhhhjYhNhNubjC)}(hX#**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``int inst_nr`` number of the instance where the CE error happened ``int block_nr`` number of the block where the CE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]jW)}(hjgh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjgubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM1hjgubja)}(hhh](jf)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](jl)}(h)``struct edac_device_ctl_info *edac_dev``h]jh)}(hjgh]h%struct edac_device_ctl_info *edac_dev}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jghjgubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM/hjgubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hjghhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]jh)}(hjgh]hedac_device_ctl_info}(hjghhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjgubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_device_ctl_infouh1hhjghM/hjgubeh}(h]h ]h"]h$]h&]uh1hhjghM/hjgubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jehjghM/hjgubjf)}(hC``int inst_nr`` number of the instance where the CE error happened h](jl)}(h``int inst_nr``h]jh)}(hj1hh]h int inst_nr}(hj3hhhhNhNubah}(h]h ]h"]h$]h&]uh1jghj/hubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM0hj+hubj)}(hhh]h)}(h2number of the instance where the CE error happenedh]h2number of the instance where the CE error happened}(hjJhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhhM0hjGhubah}(h]h ]h"]h$]h&]uh1jhj+hubeh}(h]h ]h"]h$]h&]uh1jehjFhhM0hjgubjf)}(hA``int block_nr`` number of the block where the CE error happened h](jl)}(h``int block_nr``h]jh)}(hjjhh]h int block_nr}(hjlhhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjhhubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM1hjdhubj)}(hhh]h)}(h/number of the block where the CE error happenedh]h/number of the block where the CE error happened}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhM1hjhubah}(h]h ]h"]h$]h&]uh1jhjdhubeh}(h]h ]h"]h$]h&]uh1jehjhhM1hjgubjf)}(h)``const char *msg`` message to be printedh](jl)}(h``const char *msg``h]jh)}(hjhh]hconst char *msg}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjhubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM3hjhubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM2hjhubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jehjhhM3hjgubeh}(h]h ]h"]h$]h&]uh1j`hjgubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_device_handle_ue (C function)c.edac_device_handle_uehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hnvoid edac_device_handle_ue (struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h]j)}(hmvoid edac_device_handle_ue(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMCubj)}(h h]h }(hj ihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhj ihMCubj)}(hedac_device_handle_ueh]j)}(hedac_device_handle_ueh]hedac_device_handle_ue}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhhj ihMCubj2 )}(hS(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h](j8 )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjyh]hstruct}(hj:ihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6iubj)}(h h]h }(hjGihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6iubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hjXihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUiubah}(h]h ]h"]h$]h&] refdomainjsreftypej reftargetjZimodnameN classnameNjj)}j]j)}jj isbc.edac_device_handle_ueasbuh1hhj6iubj)}(h h]h }(hjxihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6iubj )}(hjhh]h*}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6iubj)}(hedac_devh]hedac_dev}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6iubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj2iubj8 )}(h int inst_nrh](j )}(hinth]hint}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(hinst_nrh]hinst_nr}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj2iubj8 )}(h int block_nrh](j )}(hinth]hint}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(hblock_nrh]hblock_nr}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj2iubj8 )}(hconst char *msgh](j)}(hj3h]hconst}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hj#jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj )}(hcharh]hchar}(hj1jhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(h h]h }(hj?jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj )}(hjhh]h*}(hjMjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(hmsgh]hmsg}(hjZjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1j7 hj2iubeh}(h]h ]h"]h$]h&]jjuh1j1 hjhhhhj ihMCubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjhhhhj ihMCubah}(h]jhah ](jjeh"]h$]h&]jj)jhuh1jhj ihMChjhhhubj)}(hhh]h)}(h Log a single uncorrectable errorh]h Log a single uncorrectable error}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM<hjjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhhj ihMCubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jjj>jjj?j@jAuh1jhhhjYhNhNubjC)}(hX#**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``int inst_nr`` number of the instance where the UE error happened ``int block_nr`` number of the block where the UE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]jW)}(hjjh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjjubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM@hjjubja)}(hhh](jf)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](jl)}(h)``struct edac_device_ctl_info *edac_dev``h]jh)}(hjjh]h%struct edac_device_ctl_info *edac_dev}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjjubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM>hjjubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hjjhhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]jh)}(hjjh]hedac_device_ctl_info}(hjjhhhNhNubah}(h]h ](jzjsc-typeeh"]h$]h&]uh1jghjjubah}(h]h ]h"]h$]h&]refdocj refdomainjsreftypetype refexplicitrefwarnjj;jedac_device_ctl_infouh1hhjjhM>hjjubeh}(h]h ]h"]h$]h&]uh1hhjjhM>hjjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jehjjhM>hjjubjf)}(hC``int inst_nr`` number of the instance where the UE error happened h](jl)}(h``int inst_nr``h]jh)}(hjkh]h int inst_nr}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjkubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM?hjkubj)}(hhh]h)}(h2number of the instance where the UE error happenedh]h2number of the instance where the UE error happened}(hj6khhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2khM?hj3kubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jehj2khM?hjjubjf)}(hA``int block_nr`` number of the block where the UE error happened h](jl)}(h``int block_nr``h]jh)}(hjVkh]h int block_nr}(hjXkhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjTkubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM@hjPkubj)}(hhh]h)}(h/number of the block where the UE error happenedh]h/number of the block where the UE error happened}(hjokhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkkhM@hjlkubah}(h]h ]h"]h$]h&]uh1jhjPkubeh}(h]h ]h"]h$]h&]uh1jehjkkhM@hjjubjf)}(h)``const char *msg`` message to be printedh](jl)}(h``const char *msg``h]jh)}(hjkh]hconst char *msg}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjkubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMBhjkubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMAhjkubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jehjkhMBhjjubeh}(h]h ]h"]h$]h&]uh1j`hjjubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$edac_device_alloc_index (C function)c.edac_device_alloc_indexhNtauh1jhjYhhhNhNubj)}(hhh](j)}(h"int edac_device_alloc_index (void)h]j)}(h!int edac_device_alloc_index(void)h](j )}(hinth]hint}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMPubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhhjkhMPubj)}(hedac_device_alloc_indexh]j)}(hedac_device_alloc_indexh]hedac_device_alloc_index}(hj lhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ](jjeh"]h$]h&]jjuh1jhjkhhhjkhMPubj2 )}(h(void)h]j8 )}(hvoidh]j )}(hvoidh]hvoid}(hj&lhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"lubah}(h]h ]h"]h$]h&]noemphjjuh1j7 hjlubah}(h]h ]h"]h$]h&]jjuh1j1 hjkhhhjkhMPubeh}(h]h ]h"]h$]h&]jjj uh1jjjhjkhhhjkhMPubah}(h]jkah ](jjeh"]h$]h&]jj)jhuh1jhjkhMPhjkhhubj)}(hhh]h)}(h%Allocate a unique device index numberh]h%Allocate a unique device index number}(hjPlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMKhjMlhhubah}(h]h ]h"]h$]h&]uh1jhjkhhhjkhMPubeh}(h]h ](jsfunctioneh"]h$]h&]j<jsj=jhlj>jhlj?j@jAuh1jhhhjYhNhNubjC)}(hP**Parameters** ``void`` no arguments **Return** allocated index numberh](h)}(h**Parameters**h]jW)}(hjrlh]h Parameters}(hjtlhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjplubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMOhjllubja)}(hhh]jf)}(h``void`` no arguments h](jl)}(h``void``h]jh)}(hjlh]hvoid}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jghjlubah}(h]h ]h"]h$]h&]uh1jkh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMRhjlubj)}(hhh]h)}(h no argumentsh]h no arguments}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMRhjlubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jehjlhMRhjlubah}(h]h ]h"]h$]h&]uh1j`hjllubh)}(h **Return**h]jW)}(hjlh]hReturn}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjlubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMThjllubjg3)}(hallocated index numberh]h)}(hjlh]hallocated index number}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMMhjlubah}(h]h ]h"]h$]h&]uh1jf3hjlhMMhjllubeh}(h]h ] kernelindentah"]h$]h&]uh1jBhjYhhhNhNubeh}(h] edac-blocksah ]h"] edac blocksah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHeterogeneous system supporth]hHeterogeneous system support}(hj mhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj mhhhhhKubh)}(hAn AMD heterogeneous system is built by connecting the data fabrics of both CPUs and GPUs via custom xGMI links. Thus, the data fabric on the GPU nodes can be accessed the same way as the data fabric on CPU nodes.h]hAn AMD heterogeneous system is built by connecting the data fabrics of both CPUs and GPUs via custom xGMI links. Thus, the data fabric on the GPU nodes can be accessed the same way as the data fabric on CPU nodes.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubh)}(hX?The MI200 accelerators are data center GPUs. They have 2 data fabrics, and each GPU data fabric contains four Unified Memory Controllers (UMC). Each UMC contains eight channels. Each UMC channel controls one 128-bit HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total of 4096-bits of DRAM data bus.h]hX?The MI200 accelerators are data center GPUs. They have 2 data fabrics, and each GPU data fabric contains four Unified Memory Controllers (UMC). Each UMC contains eight channels. Each UMC channel controls one 128-bit HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total of 4096-bits of DRAM data bus.}(hj(mhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubh)}(hWhile the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC channel is interfacing 2GB of DRAM (represented as rank).h]hWhile the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC channel is interfacing 2GB of DRAM (represented as rank).}(hj6mhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubh)}(hFMemory controllers on AMD GPU nodes can be represented in EDAC thusly:h]hFMemory controllers on AMD GPU nodes can be represented in EDAC thusly:}(hjDmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubjg3)}(h_GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNEL h]h)}(h^GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNELh]h^GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNEL}(hjVmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjRmubah}(h]h ]h"]h$]h&]uh1jf3hhhKhj mhhubh)}(hgFor example: a heterogeneous system with 1 AMD CPU is connected to 4 MI200 (Aldebaran) GPUs using xGMI.h]hgFor example: a heterogeneous system with 1 AMD CPU is connected to 4 MI200 (Aldebaran) GPUs using xGMI.}(hjjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubh)}(h)Some more heterogeneous hardware details:h]h)Some more heterogeneous hardware details:}(hjxmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubjC)}(hhh](jH)}(hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.h]h)}(hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.h]hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jGhjmhhhhhNubjH)}(hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.h]h)}(hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.h]hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jGhjmhhhhhNubjH)}(hCCPU UMCs use up to 4 chip selects, So UMC chip select = EDAC CSROW.h]h)}(hjmh]hCCPU UMCs use up to 4 chip selects, So UMC chip select = EDAC CSROW.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jGhjmhhhhhNubjH)}(h0GPU UMCs use 1 chip select, So UMC = EDAC CSROW.h]h)}(hjmh]h0GPU UMCs use 1 chip select, So UMC = EDAC CSROW.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jGhjmhhhhhNubjH)}(h8GPU UMCs use 8 channels, So UMC channel = EDAC channel. h]h)}(h7GPU UMCs use 8 channels, So UMC channel = EDAC channel.h]h7GPU UMCs use 8 channels, So UMC channel = EDAC channel.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jGhjmhhhhhNubeh}(h]h ]h"]h$]h&]jgjZ[uh1jBhhhKhj mhhubh)}(hThe EDAC subsystem provides a mechanism to handle AMD heterogeneous systems by calling system specific ops for both CPUs and GPUs.h]hThe EDAC subsystem provides a mechanism to handle AMD heterogeneous systems by calling system specific ops for both CPUs and GPUs.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubh)}(hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated::h]hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated:}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubj)}(hX[$ ls /sys/devices/system/edac/mc/ mc0 - CPU MC node 0 mc1 | mc2 |- GPU card[0] => node 0(mc1), node 1(mc2) mc3 | mc4 |- GPU card[1] => node 0(mc3), node 1(mc4) mc5 | mc6 |- GPU card[2] => node 0(mc5), node 1(mc6) mc7 | mc8 |- GPU card[3] => node 0(mc7), node 1(mc8)h]hX[$ ls /sys/devices/system/edac/mc/ mc0 - CPU MC node 0 mc1 | mc2 |- GPU card[0] => node 0(mc1), node 1(mc2) mc3 | mc4 |- GPU card[1] => node 0(mc3), node 1(mc4) mc5 | mc6 |- GPU card[2] => node 0(mc5), node 1(mc6) mc7 | mc8 |- GPU card[3] => node 0(mc7), node 1(mc8)}hj!nsbah}(h]h ]h"]h$]h&]jjuh1jhhhKhj mhhubh)}(hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries::h]hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries:}(hj/nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj mhhubj)}(hX/sys/devices/system/edac/mc/.. CPU # CPU node ├── mc 0 GPU Nodes are enumerated sequentially after CPU nodes have been populated GPU card 1 # Each MI200 GPU has 2 nodes/mcs ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs │   ├── csrow 0 # UMC 0 │   │   ├── channel 0 # Each UMC has 8 channels │   │   ├── channel 1 # size of each channel is 2 GB, so each UMC has 16 GB │   │   ├── channel 2 │   │   ├── channel 3 │   │   ├── channel 4 │   │   ├── channel 5 │   │   ├── channel 6 │   │   ├── channel 7 │   ├── csrow 1 # UMC 1 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── .. .. │   ├── csrow 3 # UMC 3 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── rank 0 │   ├── .. .. │   ├── rank 31 # total 32 ranks/dimms from 4 UMCs ├ ├── mc 2 # GPU node 1 == mc2 │   ├── .. # each GPU has total 64 GB GPU card 2 ├── mc 3 │   ├── .. ├── mc 4 │   ├── .. GPU card 3 ├── mc 5 │   ├── .. ├── mc 6 │   ├── .. GPU card 4 ├── mc 7 │   ├── .. ├── mc 8 │   ├── ..h]hX/sys/devices/system/edac/mc/.. CPU # CPU node ├── mc 0 GPU Nodes are enumerated sequentially after CPU nodes have been populated GPU card 1 # Each MI200 GPU has 2 nodes/mcs ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs │   ├── csrow 0 # UMC 0 │   │   ├── channel 0 # Each UMC has 8 channels │   │   ├── channel 1 # size of each channel is 2 GB, so each UMC has 16 GB │   │   ├── channel 2 │   │   ├── channel 3 │   │   ├── channel 4 │   │   ├── channel 5 │   │   ├── channel 6 │   │   ├── channel 7 │   ├── csrow 1 # UMC 1 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── .. .. │   ├── csrow 3 # UMC 3 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── rank 0 │   ├── .. .. │   ├── rank 31 # total 32 ranks/dimms from 4 UMCs ├ ├── mc 2 # GPU node 1 == mc2 │   ├── .. # each GPU has total 64 GB GPU card 2 ├── mc 3 │   ├── .. ├── mc 4 │   ├── .. GPU card 3 ├── mc 5 │   ├── .. ├── mc 6 │   ├── .. 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