sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget#/translations/zh_CN/driver-api/edacmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/zh_TW/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/it_IT/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ja_JP/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ko_KR/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/pt_BR/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/sp_SP/driver-api/edacmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h-Error Detection And Correction (EDAC) Devicesh]h-Error Detection And Correction (EDAC) Devices}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh=/var/lib/git/docbuild/linux/Documentation/driver-api/edac.rsthKubh)}(hhh](h)}(h(Main Concepts used at the EDAC subsystemh]h(Main Concepts used at the EDAC subsystem}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hThere are several things to be aware of that aren't at all obvious, like *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*, etc...h](hKThere are several things to be aware of that aren’t at all obvious, like }(hhhhhNhNubhemphasis)}(h*sockets, *socket sets*h]hsockets, *socket sets}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }(hhhhhNhNubh)}(h*banks*h]hbanks}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }hhsbh)}(h*rows*h]hrows}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }hhsbh)}(h*chip-select rows*h]hchip-select rows}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }hhsbh)}(h *channels*h]hchannels}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, etc...}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hThese are some of the many terms that are thrown about that don't always mean what people think they mean (Inconceivable!). In the interest of creating a common ground for discussion, terms and their definitions will be established.h]hThese are some of the many terms that are thrown about that don’t always mean what people think they mean (Inconceivable!). In the interest of creating a common ground for discussion, terms and their definitions will be established.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh bullet_list)}(hhh]h list_item)}(hMemory devices h]h)}(hMemory devicesh]hMemory devices}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj]ubah}(h]h ]h"]h$]h&]uh1j[hjXhhhhhNubah}(h]h ]h"]h$]h&]bullet*uh1jVhhhKhhhhubh)}(hXThe individual DRAM chips on a memory stick. These devices commonly output 4 and 8 bits each (x4, x8). Grouping several of these in parallel provides the number of bits that the memory controller expects: typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.h]hXThe individual DRAM chips on a memory stick. These devices commonly output 4 and 8 bits each (x4, x8). Grouping several of these in parallel provides the number of bits that the memory controller expects: typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjW)}(hhh]j\)}(h Memory Stick h]h)}(h Memory Stickh]h Memory Stick}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKhhhhubh)}(hA printed circuit board that aggregates multiple memory devices in parallel. In general, this is the Field Replaceable Unit (FRU) which gets replaced, in the case of excessive errors. Most often it is also called DIMM (Dual Inline Memory Module).h]hA printed circuit board that aggregates multiple memory devices in parallel. In general, this is the Field Replaceable Unit (FRU) which gets replaced, in the case of excessive errors. Most often it is also called DIMM (Dual Inline Memory Module).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjW)}(hhh]j\)}(hMemory Socket h]h)}(h Memory Socketh]h Memory Socket}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKhhhhubh)}(hxA physical connector on the motherboard that accepts a single memory stick. Also called as "slot" on several datasheets.h]h|A physical connector on the motherboard that accepts a single memory stick. Also called as “slot” on several datasheets.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubjW)}(hhh]j\)}(hChannel h]h)}(hChannelh]hChannel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK#hjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhK#hhhhubh)}(hA memory controller channel, responsible to communicate with a group of DIMMs. Each channel has its own independent control (command) and data bus, and can be used independently or grouped with other channels.h]hA memory controller channel, responsible to communicate with a group of DIMMs. Each channel has its own independent control (command) and data bus, and can be used independently or grouped with other channels.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hhhhubjW)}(hhh]j\)}(hBranch h]h)}(hBranchh]hBranch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhK)hhhhubh)}(hXIt is typically the highest hierarchy on a Fully-Buffered DIMM memory controller. Typically, it contains two channels. Two channels at the same branch can be used in single mode or in lockstep mode. When lockstep is enabled, the cacheline is doubled, but it generally brings some performance penalty. Also, it is generally not possible to point to just one memory stick when an error occurs, as the error correction code is calculated using two DIMMs instead of one. Due to that, it is capable of correcting more errors than on single mode.h]hXIt is typically the highest hierarchy on a Fully-Buffered DIMM memory controller. Typically, it contains two channels. Two channels at the same branch can be used in single mode or in lockstep mode. When lockstep is enabled, the cacheline is doubled, but it generally brings some performance penalty. Also, it is generally not possible to point to just one memory stick when an error occurs, as the error correction code is calculated using two DIMMs instead of one. Due to that, it is capable of correcting more errors than on single mode.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hhhhubjW)}(hhh]j\)}(hSingle-channel h]h)}(hSingle-channelh]hSingle-channel}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjJubah}(h]h ]h"]h$]h&]uh1j[hjGhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhK4hhhhubh)}(hX>The data accessed by the memory controller is contained into one dimm only. E. g. if the data is 64 bits-wide, the data flows to the CPU using one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 memories. FB-DIMM and RAMBUS use a different concept for channel, so this concept doesn't apply there.h]hX@The data accessed by the memory controller is contained into one dimm only. E. g. if the data is 64 bits-wide, the data flows to the CPU using one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 memories. FB-DIMM and RAMBUS use a different concept for channel, so this concept doesn’t apply there.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hhhhubjW)}(hhh]j\)}(hDouble-channel h]h)}(hDouble-channelh]hDouble-channel}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjW)}(hhh]j\)}(hChip-select row h]h)}(hChip-select rowh]hChip-select row}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKChhhhubh)}(hX:This is the name of the DRAM signal used to select the DRAM ranks to be accessed. Common chip-select rows for single channel are 64 bits, for dual channel 128 bits. It may not be visible by the memory controller, as some DIMM types have a memory buffer that can hide direct access to it from the Memory Controller.h]hX:This is the name of the DRAM signal used to select the DRAM ranks to be accessed. Common chip-select rows for single channel are 64 bits, for dual channel 128 bits. It may not be visible by the memory controller, as some DIMM types have a memory buffer that can hide direct access to it from the Memory Controller.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhhhhubjW)}(hhh]j\)}(hSingle-Ranked stick h]h)}(hSingle-Ranked stickh]hSingle-Ranked stick}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKKhhhhubh)}(hA Single-ranked stick has 1 chip-select row of memory. Motherboards commonly drive two chip-select pins to a memory stick. A single-ranked stick, will occupy only one of those rows. The other will be unused.h]hA Single-ranked stick has 1 chip-select row of memory. Motherboards commonly drive two chip-select pins to a memory stick. A single-ranked stick, will occupy only one of those rows. The other will be unused.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhhhhubhtarget)}(h.. _doubleranked:h]h}(h]h ]h"]h$]h&]refid doublerankeduh1jhKQhhhhhhubjW)}(hhh]j\)}(hDouble-Ranked stick h]h)}(hDouble-Ranked stickh]hDouble-Ranked stick}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]jah ]h"] doublerankedah$]h&]j{j|uh1jVhhhKShhhhexpect_referenced_by_name}j0jsexpect_referenced_by_id}jjsubh)}(hA double-ranked stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently.h]hA double-ranked stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhhhhubjW)}(hhh]j\)}(hDouble-sided stick h]h)}(hDouble-sided stickh]hDouble-sided stick}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKXhjHubah}(h]h ]h"]h$]h&]uh1j[hjEhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKXhhhhubh)}(hC**DEPRECATED TERM**, see :ref:`Double-Ranked stick `.h](hstrong)}(h**DEPRECATED TERM**h]hDEPRECATED TERM}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjfubh, see }(hjfhhhNhNubh)}(h):ref:`Double-Ranked stick `h]hinline)}(hjh]hDouble-Ranked stick}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&]refdocdriver-api/edac refdomainjreftyperef refexplicitrefwarn reftarget doublerankeduh1hhhhKZhjfubh.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKZhhhhubh)}(hA double-sided stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently. "Double-sided" is irrespective of the memory devices being mounted on both sides of the memory stick.h]hA double-sided stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently. “Double-sided” is irrespective of the memory devices being mounted on both sides of the memory stick.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hhhhubjW)}(hhh]j\)}(h Socket set h]h)}(h Socket seth]h Socket set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKahjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKahhhhubh)}(hAll of the memory sticks that are required for a single memory access or all of the memory sticks spanned by a chip-select row. A single socket set has two chip-select rows and if double-sided sticks are used these will occupy those chip-select rows.h]hAll of the memory sticks that are required for a single memory access or all of the memory sticks spanned by a chip-select row. A single socket set has two chip-select rows and if double-sided sticks are used these will occupy those chip-select rows.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchhhhubjW)}(hhh]j\)}(hBank h]h)}(hBankh]hBank}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKhhhhhubh)}(hpThis term is avoided because it is unclear when needing to distinguish between chip-select rows and socket sets.h]hpThis term is avoided because it is unclear when needing to distinguish between chip-select rows and socket sets.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhhhhubjW)}(hhh]j\)}(hHigh Bandwidth Memory (HBM) h]h)}(hHigh Bandwidth Memory (HBM)h]hHigh Bandwidth Memory (HBM)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1j[hjhhhhhNubah}(h]h ]h"]h$]h&]j{j|uh1jVhhhKmhhhhubh)}(hHBM is a new memory type with low power consumption and ultra-wide communication lanes. It uses vertically stacked memory chips (DRAM dies) interconnected by microscopic wires called "through-silicon vias," or TSVs.h]hHBM is a new memory type with low power consumption and ultra-wide communication lanes. It uses vertically stacked memory chips (DRAM dies) interconnected by microscopic wires called “through-silicon vias,” or TSVs.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohhhhubh)}(hSeveral stacks of HBM chips connect to the CPU or GPU through an ultra-fast interconnect called the "interposer". Therefore, HBM's characteristics are nearly indistinguishable from on-chip integrated RAM.h]hSeveral stacks of HBM chips connect to the CPU or GPU through an ultra-fast interconnect called the “interposer”. Therefore, HBM’s characteristics are nearly indistinguishable from on-chip integrated RAM.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthhhhubeh}(h](main-concepts-used-at-the-edac-subsystemah ]h"](main concepts used at the edac subsystemah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hMemory Controllersh]hMemory Controllers}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hhhhhKyubh)}(hXMost of the EDAC core is focused on doing Memory Controller error detection. The :c:func:`edac_mc_alloc`. It uses internally the struct ``mem_ctl_info`` to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.h](hQMost of the EDAC core is focused on doing Memory Controller error detection. The }(hjohhhNhNubh)}(h:c:func:`edac_mc_alloc`h]hliteral)}(hjyh]hedac_mc_alloc()}(hj}hhhNhNubah}(h]h ](jcc-funceh"]h$]h&]uh1j{hjwubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypefunc refexplicitrefwarnj edac_mc_allocuh1hhhhK{hjoubh . It uses internally the struct }(hjohhhNhNubj|)}(h``mem_ctl_info``h]h mem_ctl_info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjoubh~ to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK{hj^hhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singledev_type (C enum) c.dev_typehNtauh1jhj^hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhNubhdesc)}(hhh](hdesc_signature)}(hdev_typeh]hdesc_signature_line)}(h enum dev_typeh](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubh desc_name)}(hdev_typeh]h desc_sig_name)}(hjh]hdev_type}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jj add_permalinkuh1jsphinx_line_type declaratorhjhhhjhKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhjhKhjhhubh desc_content)}(hhh]h)}(h8describe the type of memory DRAM chips used at the stickh]h8describe the type of memory DRAM chips used at the stick}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhK``MEM_FPM`` FPM - Fast Page Mode, used on systems up to 1995. h](j)}(h ``MEM_FPM``h]j|)}(hj h]hMEM_FPM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h1FPM - Fast Page Mode, used on systems up to 1995.h]h1FPM - Fast Page Mode, used on systems up to 1995.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(hA``MEM_EDO`` EDO - Extended data out, used on systems up to 1998. h](j)}(h ``MEM_EDO``h]j|)}(hj h]hMEM_EDO}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h4EDO - Extended data out, used on systems up to 1998.h]h4EDO - Extended data out, used on systems up to 1998.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h=``MEM_BEDO`` BEDO - Burst Extended data out, an EDO variant. h](j)}(h ``MEM_BEDO``h]j|)}(hj h]hMEM_BEDO}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h/BEDO - Burst Extended data out, an EDO variant.h]h/BEDO - Burst Extended data out, an EDO variant.}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h``MEM_SDR`` SDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank. h](j)}(h ``MEM_SDR``h]j|)}(hjC h]hMEM_SDR}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjA ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj= ubj)}(hhh]h)}(hSDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.h](hSDR - Single data rate SDRAM }(hj\ hhhNhNubj )}(hEhttp://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memoryh]hEhttp://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory}(hjd hhhNhNubah}(h]h ]h"]h$]h&]refurijf uh1j hj\ ubhw They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.}(hj\ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjY ubah}(h]h ]h"]h$]h&]uh1jhj= ubeh}(h]h ]h"]h$]h&]uh1jyhjX hKhj ubjz)}(h!``MEM_RDR`` Registered SDR SDRAM h](j)}(h ``MEM_RDR``h]j|)}(hj h]hMEM_RDR}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hRegistered SDR SDRAMh]hRegistered SDR SDRAM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(hJ``MEM_DDR`` Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAM h](j)}(h ``MEM_DDR``h]j|)}(hj h]hMEM_DDR}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h=Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAMh](hDouble data rate SDRAM }(hj hhhNhNubj )}(h&http://en.wikipedia.org/wiki/DDR_SDRAMh]h&http://en.wikipedia.org/wiki/DDR_SDRAM}(hj hhhNhNubah}(h]h ]h"]h$]h&]refurij uh1j hj ubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h``MEM_RDDR`` Registered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller. h](j)}(h ``MEM_RDDR``h]j|)}(hj h]hMEM_RDDR}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hRegistered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller.h]hRegistered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller.}(hj+ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj( ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj' hKhj ubjz)}(hD``MEM_RMBS`` Rambus DRAM, used on a few Pentium III/IV controllers. h](j)}(h ``MEM_RMBS``h]j|)}(hjL h]hMEM_RMBS}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjJ ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjF ubj)}(hhh]h)}(h6Rambus DRAM, used on a few Pentium III/IV controllers.h]h6Rambus DRAM, used on a few Pentium III/IV controllers.}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1hhja hKhjb ubah}(h]h ]h"]h$]h&]uh1jhjF ubeh}(h]h ]h"]h$]h&]uh1jyhja hKhj ubjz)}(h``MEM_DDR2`` DDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR. h](j)}(h ``MEM_DDR2``h]j|)}(hj h]hMEM_DDR2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hzDDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR.h]hDDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as “PC2-” instead of “PC” to differentiate from DDR.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h``MEM_FB_DDR2`` Fully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal. h](j)}(h``MEM_FB_DDR2``h]j|)}(hj h]h MEM_FB_DDR2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hFully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal.h]hFully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(hJ``MEM_RDDR2`` Registered DDR2 RAM This is a variant of the DDR2 memories. h](j)}(h ``MEM_RDDR2``h]j|)}(hj h]h MEM_RDDR2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h;Registered DDR2 RAM This is a variant of the DDR2 memories.h]h;Registered DDR2 RAM This is a variant of the DDR2 memories.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h``MEM_XDR`` Rambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it. h](j)}(h ``MEM_XDR``h]j|)}(hj3 h]hMEM_XDR}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj1 ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj- ubj)}(hhh]h)}(hRambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it.h]hRambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren’t used on any x86 arch, but cell_edac PPC memory controller uses it.}(hjL hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjI ubah}(h]h ]h"]h$]h&]uh1jhj- ubeh}(h]h ]h"]h$]h&]uh1jyhjH hKhj ubjz)}(h``MEM_DDR3`` DDR3 RAM h](j)}(h ``MEM_DDR3``h]j|)}(hjm h]hMEM_DDR3}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjk ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjg ubj)}(hhh]h)}(hDDR3 RAMh]hDDR3 RAM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjg ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(hJ``MEM_RDDR3`` Registered DDR3 RAM This is a variant of the DDR3 memories. h](j)}(h ``MEM_RDDR3``h]j|)}(hj h]h MEM_RDDR3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h;Registered DDR3 RAM This is a variant of the DDR3 memories.h]h;Registered DDR3 RAM This is a variant of the DDR3 memories.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h)``MEM_LRDDR3`` Load-Reduced DDR3 memory. h](j)}(h``MEM_LRDDR3``h]j|)}(hj h]h MEM_LRDDR3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hLoad-Reduced DDR3 memory.h]hLoad-Reduced DDR3 memory.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj hKhj ubjz)}(h&``MEM_LPDDR3`` Low-Power DDR3 memory. h](j)}(h``MEM_LPDDR3``h]j|)}(hjh]h MEM_LPDDR3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLow-Power DDR3 memory.h]hLow-Power DDR3 memory.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKhj/ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhj.hKhj ubjz)}(h!``MEM_DDR4`` Unbuffered DDR4 RAM h](j)}(h ``MEM_DDR4``h]j|)}(hjRh]hMEM_DDR4}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjPubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjLubj)}(hhh]h)}(hUnbuffered DDR4 RAMh]hUnbuffered DDR4 RAM}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghKhjhubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jyhjghKhj ubjz)}(hJ``MEM_RDDR4`` Registered DDR4 RAM This is a variant of the DDR4 memories. h](j)}(h ``MEM_RDDR4``h]j|)}(hjh]h MEM_RDDR4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(h;Registered DDR4 RAM This is a variant of the DDR4 memories.h]h;Registered DDR4 RAM This is a variant of the DDR4 memories.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h)``MEM_LRDDR4`` Load-Reduced DDR4 memory. h](j)}(h``MEM_LRDDR4``h]j|)}(hjh]h MEM_LRDDR4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLoad-Reduced DDR4 memory.h]hLoad-Reduced DDR4 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h&``MEM_LPDDR4`` Low-Power DDR4 memory. h](j)}(h``MEM_LPDDR4``h]j|)}(hjh]h MEM_LPDDR4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLow-Power DDR4 memory.h]hLow-Power DDR4 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h!``MEM_DDR5`` Unbuffered DDR5 RAM h](j)}(h ``MEM_DDR5``h]j|)}(hj7h]hMEM_DDR5}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj5ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj1ubj)}(hhh]h)}(hUnbuffered DDR5 RAMh]hUnbuffered DDR5 RAM}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhKhjMubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jyhjLhKhj ubjz)}(h"``MEM_RDDR5`` Registered DDR5 RAM h](j)}(h ``MEM_RDDR5``h]j|)}(hjph]h MEM_RDDR5}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjnubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjjubj)}(hhh]h)}(hRegistered DDR5 RAMh]hRegistered DDR5 RAM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h)``MEM_LRDDR5`` Load-Reduced DDR5 memory. h](j)}(h``MEM_LRDDR5``h]j|)}(hjh]h MEM_LRDDR5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLoad-Reduced DDR5 memory.h]hLoad-Reduced DDR5 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h&``MEM_LPDDR5`` Low-Power DDR5 memory. h](j)}(h``MEM_LPDDR5``h]j|)}(hjh]h MEM_LPDDR5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLow-Power DDR5 memory.h]hLow-Power DDR5 memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h ``MEM_NVDIMM`` Non-volatile RAM h](j)}(h``MEM_NVDIMM``h]j|)}(hjh]h MEM_NVDIMM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hNon-volatile RAMh]hNon-volatile RAM}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKhj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhj0hKhj ubjz)}(h``MEM_WIO2`` Wide I/O 2. h](j)}(h ``MEM_WIO2``h]j|)}(hjTh]hMEM_WIO2}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjRubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjNubj)}(hhh]h)}(h Wide I/O 2.h]h Wide I/O 2.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKhjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jyhjihKhj ubjz)}(h*``MEM_HBM2`` High bandwidth Memory Gen 2. h](j)}(h ``MEM_HBM2``h]j|)}(hjh]hMEM_HBM2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hHigh bandwidth Memory Gen 2.h]hHigh bandwidth Memory Gen 2.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubjz)}(h)``MEM_HBM3`` High bandwidth Memory Gen 3.h](j)}(h ``MEM_HBM3``h]j|)}(hjh]hMEM_HBM3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hHigh bandwidth Memory Gen 3.h]hHigh bandwidth Memory Gen 3.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhKhj ubeh}(h]h ]h"]h$]h&]uh1jthj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_type (C enum) c.edac_typehNtauh1jhj^hhhjhNubj)}(hhh](j)}(h edac_typeh]j)}(henum edac_typeh](j)}(hjh]henum}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj-hMubj)}(h edac_typeh]j)}(hjh]h edac_type}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj<ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj-hMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjhhhj-hMubah}(h]jah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj-hMhjhhubj0)}(hhh]h)}(h4Error Detection and Correction capabilities and modeh]h4Error Detection and Correction capabilities and mode}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj_hhubah}(h]h ]h"]h$]h&]uh1j/hjhhhj-hMubeh}(h]h ](jenumeh"]h$]h&]jPjjQjzjRjzjSjTjUuh1jhhhj^hjhNubjW)}(hX**Constants** ``EDAC_UNKNOWN`` Unknown if ECC is available ``EDAC_NONE`` Doesn't support ECC ``EDAC_RESERVED`` Reserved ECC type ``EDAC_PARITY`` Detects parity errors ``EDAC_EC`` Error Checking - no correction ``EDAC_SECDED`` Single bit error correction, Double detection ``EDAC_S2ECD2ED`` Chipkill x2 devices - do these exist? ``EDAC_S4ECD4ED`` Chipkill x4 devices ``EDAC_S8ECD8ED`` Chipkill x8 devices ``EDAC_S16ECD16ED`` Chipkill x16 devicesh](h)}(h **Constants**h]jk)}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj~ubju)}(hhh](jz)}(h-``EDAC_UNKNOWN`` Unknown if ECC is available h](j)}(h``EDAC_UNKNOWN``h]j|)}(hjh]h EDAC_UNKNOWN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjubj)}(hhh]h)}(hUnknown if ECC is availableh]hUnknown if ECC is available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM hjubjz)}(h"``EDAC_NONE`` Doesn't support ECC h](j)}(h ``EDAC_NONE``h]j|)}(hjh]h EDAC_NONE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjubj)}(hhh]h)}(hDoesn't support ECCh]hDoesn’t support ECC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM hjubjz)}(h$``EDAC_RESERVED`` Reserved ECC type h](j)}(h``EDAC_RESERVED``h]j|)}(hjh]h EDAC_RESERVED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hReserved ECC typeh]hReserved ECC type}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhj*hMhjubjz)}(h&``EDAC_PARITY`` Detects parity errors h](j)}(h``EDAC_PARITY``h]j|)}(hjNh]h EDAC_PARITY}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjLubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjHubj)}(hhh]h)}(hDetects parity errorsh]hDetects parity errors}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jyhjchMhjubjz)}(h+``EDAC_EC`` Error Checking - no correction h](j)}(h ``EDAC_EC``h]j|)}(hjh]hEDAC_EC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hError Checking - no correctionh]hError Checking - no correction}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h>``EDAC_SECDED`` Single bit error correction, Double detection h](j)}(h``EDAC_SECDED``h]j|)}(hjh]h EDAC_SECDED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h-Single bit error correction, Double detectionh]h-Single bit error correction, Double detection}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h8``EDAC_S2ECD2ED`` Chipkill x2 devices - do these exist? h](j)}(h``EDAC_S2ECD2ED``h]j|)}(hjh]h EDAC_S2ECD2ED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h%Chipkill x2 devices - do these exist?h]h%Chipkill x2 devices - do these exist?}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h&``EDAC_S4ECD4ED`` Chipkill x4 devices h](j)}(h``EDAC_S4ECD4ED``h]j|)}(hj2h]h EDAC_S4ECD4ED}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj0ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(hChipkill x4 devicesh]hChipkill x4 devices}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jyhjGhMhjubjz)}(h&``EDAC_S8ECD8ED`` Chipkill x8 devices h](j)}(h``EDAC_S8ECD8ED``h]j|)}(hjkh]h EDAC_S8ECD8ED}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjiubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM"hjeubj)}(hhh]h)}(hChipkill x8 devicesh]hChipkill x8 devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM"hjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jyhjhM"hjubjz)}(h(``EDAC_S16ECD16ED`` Chipkill x16 devicesh](j)}(h``EDAC_S16ECD16ED``h]j|)}(hjh]hEDAC_S16ECD16ED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM$hjubj)}(hhh]h)}(hChipkill x16 devicesh]hChipkill x16 devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM%hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM$hjubeh}(h]h ]h"]h$]h&]uh1jthj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jscrub_type (C enum) c.scrub_typehNtauh1jhj^hhhjhNubj)}(hhh](j)}(h scrub_typeh]j)}(henum scrub_typeh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM*ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hM*ubj)}(h scrub_typeh]j)}(hjh]h scrub_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hM*ubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjhhhj hM*ubah}(h]jah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj hM*hjhhubj0)}(hhh]h)}(hscrubbing capabilitiesh]hscrubbing capabilities}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM'hj=hhubah}(h]h ]h"]h$]h&]uh1j/hjhhhj hM*ubeh}(h]h ](jenumeh"]h$]h&]jPjjQjXjRjXjSjTjUuh1jhhhj^hjhNubjW)}(hX1**Constants** ``SCRUB_UNKNOWN`` Unknown if scrubber is available ``SCRUB_NONE`` No scrubber ``SCRUB_SW_PROG`` SW progressive (sequential) scrubbing ``SCRUB_SW_SRC`` Software scrub only errors ``SCRUB_SW_PROG_SRC`` Progressive software scrub from an error ``SCRUB_SW_TUNABLE`` Software scrub frequency is tunable ``SCRUB_HW_PROG`` HW progressive (sequential) scrubbing ``SCRUB_HW_SRC`` Hardware scrub only errors ``SCRUB_HW_PROG_SRC`` Progressive hardware scrub from an error ``SCRUB_HW_TUNABLE`` Hardware scrub frequency is tunableh](h)}(h **Constants**h]jk)}(hjbh]h Constants}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj`ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM+hj\ubju)}(hhh](jz)}(h3``SCRUB_UNKNOWN`` Unknown if scrubber is available h](j)}(h``SCRUB_UNKNOWN``h]j|)}(hjh]h SCRUB_UNKNOWN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM.hj{ubj)}(hhh]h)}(h Unknown if scrubber is availableh]h Unknown if scrubber is available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM.hjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jyhjhM.hjxubjz)}(h``SCRUB_NONE`` No scrubber h](j)}(h``SCRUB_NONE``h]j|)}(hjh]h SCRUB_NONE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM1hjubj)}(hhh]h)}(h No scrubberh]h No scrubber}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM1hjxubjz)}(h8``SCRUB_SW_PROG`` SW progressive (sequential) scrubbing h](j)}(h``SCRUB_SW_PROG``h]j|)}(hjh]h SCRUB_SW_PROG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM4hjubj)}(hhh]h)}(h%SW progressive (sequential) scrubbingh]h%SW progressive (sequential) scrubbing}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM4hjxubjz)}(h,``SCRUB_SW_SRC`` Software scrub only errors h](j)}(h``SCRUB_SW_SRC``h]j|)}(hj,h]h SCRUB_SW_SRC}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj*ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM7hj&ubj)}(hhh]h)}(hSoftware scrub only errorsh]hSoftware scrub only errors}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM7hjBubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jyhjAhM7hjxubjz)}(h?``SCRUB_SW_PROG_SRC`` Progressive software scrub from an error h](j)}(h``SCRUB_SW_PROG_SRC``h]j|)}(hjeh]hSCRUB_SW_PROG_SRC}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjcubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM:hj_ubj)}(hhh]h)}(h(Progressive software scrub from an errorh]h(Progressive software scrub from an error}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhM:hj{ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jyhjzhM:hjxubjz)}(h9``SCRUB_SW_TUNABLE`` Software scrub frequency is tunable h](j)}(h``SCRUB_SW_TUNABLE``h]j|)}(hjh]hSCRUB_SW_TUNABLE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM=hjubj)}(hhh]h)}(h#Software scrub frequency is tunableh]h#Software scrub frequency is tunable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM=hjxubjz)}(h8``SCRUB_HW_PROG`` HW progressive (sequential) scrubbing h](j)}(h``SCRUB_HW_PROG``h]j|)}(hjh]h SCRUB_HW_PROG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM@hjubj)}(hhh]h)}(h%HW progressive (sequential) scrubbingh]h%HW progressive (sequential) scrubbing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM@hjxubjz)}(h,``SCRUB_HW_SRC`` Hardware scrub only errors h](j)}(h``SCRUB_HW_SRC``h]j|)}(hjh]h SCRUB_HW_SRC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMChj ubj)}(hhh]h)}(hHardware scrub only errorsh]hHardware scrub only errors}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMChj&ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jyhj%hMChjxubjz)}(h?``SCRUB_HW_PROG_SRC`` Progressive hardware scrub from an error h](j)}(h``SCRUB_HW_PROG_SRC``h]j|)}(hjIh]hSCRUB_HW_PROG_SRC}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjGubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMFhjCubj)}(hhh]h)}(h(Progressive hardware scrub from an errorh]h(Progressive hardware scrub from an error}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMFhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jyhj^hMFhjxubjz)}(h8``SCRUB_HW_TUNABLE`` Hardware scrub frequency is tunableh](j)}(h``SCRUB_HW_TUNABLE``h]j|)}(hjh]hSCRUB_HW_TUNABLE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMHhj|ubj)}(hhh]h)}(h#Hardware scrub frequency is tunableh]h#Hardware scrub frequency is tunable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMIhjubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jyhjhMHhjxubeh}(h]h ]h"]h$]h&]uh1jthj\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_layer_type (C enum)c.edac_mc_layer_typehNtauh1jhj^hhhjhNubj)}(hhh](j)}(hedac_mc_layer_typeh]j)}(henum edac_mc_layer_typeh](j)}(hjh]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMNubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMNubj)}(hedac_mc_layer_typeh]j)}(hjh]hedac_mc_layer_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMNubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjhhhjhMNubah}(h]jah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjhMNhjhhubj0)}(hhh]h)}(h!memory controller hierarchy layerh]h!memory controller hierarchy layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMShjhhubah}(h]h ]h"]h$]h&]uh1j/hjhhhjhMNubeh}(h]h ](jenumeh"]h$]h&]jPjjQj6jRj6jSjTjUuh1jhhhj^hjhNubjW)}(hX**Constants** ``EDAC_MC_LAYER_BRANCH`` memory layer is named "branch" ``EDAC_MC_LAYER_CHANNEL`` memory layer is named "channel" ``EDAC_MC_LAYER_SLOT`` memory layer is named "slot" ``EDAC_MC_LAYER_CHIP_SELECT`` memory layer is named "chip select" ``EDAC_MC_LAYER_ALL_MEM`` memory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h](h)}(h **Constants**h]jk)}(hj@h]h Constants}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj>ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMWhj:ubju)}(hhh](jz)}(h8``EDAC_MC_LAYER_BRANCH`` memory layer is named "branch" h](j)}(h``EDAC_MC_LAYER_BRANCH``h]j|)}(hj_h]hEDAC_MC_LAYER_BRANCH}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj]ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMZhjYubj)}(hhh]h)}(hmemory layer is named "branch"h]h"memory layer is named “branch”}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMZhjuubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jyhjthMZhjVubjz)}(h:``EDAC_MC_LAYER_CHANNEL`` memory layer is named "channel" h](j)}(h``EDAC_MC_LAYER_CHANNEL``h]j|)}(hjh]hEDAC_MC_LAYER_CHANNEL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM]hjubj)}(hhh]h)}(hmemory layer is named "channel"h]h#memory layer is named “channel”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM]hjVubjz)}(h4``EDAC_MC_LAYER_SLOT`` memory layer is named "slot" h](j)}(h``EDAC_MC_LAYER_SLOT``h]j|)}(hjh]hEDAC_MC_LAYER_SLOT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM`hjubj)}(hhh]h)}(hmemory layer is named "slot"h]h memory layer is named “slot”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhM`hjVubjz)}(hB``EDAC_MC_LAYER_CHIP_SELECT`` memory layer is named "chip select" h](j)}(h``EDAC_MC_LAYER_CHIP_SELECT``h]j|)}(hj h]hEDAC_MC_LAYER_CHIP_SELECT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMchjubj)}(hhh]h)}(h#memory layer is named "chip select"h]h'memory layer is named “chip select”}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMchj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMchjVubjz)}(h``EDAC_MC_LAYER_ALL_MEM`` memory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h](j)}(h``EDAC_MC_LAYER_ALL_MEM``h]j|)}(hjCh]hEDAC_MC_LAYER_ALL_MEM}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjAubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMghj=ubj)}(hhh]h)}(hmemory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h]hmemory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMfhjYubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jyhjXhMghjVubeh}(h]h ]h"]h$]h&]uh1jthj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubh)}(h**Description**h]jk)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMjhj^hhubh)}(hxThis enum is used by the drivers to tell edac_mc_sysfs what name should be used when describing a memory stick location.h]hxThis enum is used by the drivers to tell edac_mc_sysfs what name should be used when describing a memory stick location.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM\hj^hhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_layer (C struct)c.edac_mc_layerhNtauh1jhj^hhhjhNubj)}(hhh](j)}(h edac_mc_layerh]j)}(hstruct edac_mc_layerh](j)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMbubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMbubj)}(h edac_mc_layerh]j)}(hjh]h edac_mc_layer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMbubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjhhhjhMbubah}(h]jah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjhMbhjhhubj0)}(hhh]h)}(h)describes the memory controller hierarchyh]h)describes the memory controller hierarchy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMihjhhubah}(h]h ]h"]h$]h&]uh1j/hjhhhjhMbubeh}(h]h ](jstructeh"]h$]h&]jPjjQjjRjjSjTjUuh1jhhhj^hjhNubjW)}(hX**Definition**:: struct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; }; **Members** ``type`` layer type ``size`` number of components per layer. For example, if the channel layer has two channels, size = 2 ``is_virt_csrow`` This layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh](h)}(h**Definition**::h](jk)}(h**Definition**h]h Definition}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj'ubh:}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMmhj#ubh literal_block)}(hfstruct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; };h]hfstruct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; };}hjFsbah}(h]h ]h"]h$]h&]jjuh1jDhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMohj#ubh)}(h **Members**h]jk)}(hjWh]hMembers}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjUubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMuhj#ubju)}(hhh](jz)}(h``type`` layer type h](j)}(h``type``h]j|)}(hjvh]htype}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjtubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMkhjpubj)}(hhh]h)}(h layer typeh]h layer type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMkhjubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jyhjhMkhjmubjz)}(hf``size`` number of components per layer. For example, if the channel layer has two channels, size = 2 h](j)}(h``size``h]j|)}(hjh]hsize}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMmhjubj)}(hhh]h)}(h\number of components per layer. For example, if the channel layer has two channels, size = 2h]h\number of components per layer. For example, if the channel layer has two channels, size = 2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMlhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMmhjmubjz)}(hz``is_virt_csrow`` This layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh](j)}(h``is_virt_csrow``h]j|)}(hjh]h is_virt_csrow}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMohjubj)}(hhh]h)}(hhThis layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh]hlThis layer is part of the “csrow” when old API compatibility mode is enabled. Otherwise, it is a channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMnhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMohjmubeh}(h]h ]h"]h$]h&]uh1jthj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jrank_info (C struct) c.rank_infohNtauh1jhj^hhhjhNubj)}(hhh](j)}(h rank_infoh]j)}(hstruct rank_infoh](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMvubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?hhhjPhMvubj)}(h rank_infoh]j)}(hj=h]h rank_info}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj_ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj?hhhjPhMvubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj;hhhjPhMvubah}(h]j6ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjPhMvhj8hhubj0)}(hhh]h)}(h*contains the information for one DIMM rankh]h*contains the information for one DIMM rank}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j/hj8hhhjPhMvubeh}(h]h ](jstructeh"]h$]h&]jPjjQjjRjjSjTjUuh1jhhhj^hjhNubjW)}(hX**Definition**:: struct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; }; **Members** ``chan_idx`` channel number where the rank is (typically, 0 or 1) ``csrow`` A pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector. ``dimm`` A pointer to the DIMM structure, where the DIMM label information is stored. ``ce_count`` number of correctable errors for this rankh](h)}(h**Definition**::h](jk)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubjE)}(hsstruct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; };h]hsstruct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; };}hjsbah}(h]h ]h"]h$]h&]jjuh1jDhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubh)}(h **Members**h]jk)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubju)}(hhh](jz)}(hB``chan_idx`` channel number where the rank is (typically, 0 or 1) h](j)}(h ``chan_idx``h]j|)}(hjh]hchan_idx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h4channel number where the rank is (typically, 0 or 1)h]h4channel number where the rank is (typically, 0 or 1)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h``csrow`` A pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector. h](j)}(h ``csrow``h]j|)}(hj+h]hcsrow}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj)ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubj)}(hhh]h)}(hA pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector.h]hA pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jyhj@hMhjubjz)}(hV``dimm`` A pointer to the DIMM structure, where the DIMM label information is stored. h](j)}(h``dimm``h]j|)}(hjeh]hdimm}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjcubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj_ubj)}(hhh]h)}(hLA pointer to the DIMM structure, where the DIMM label information is stored.h]hLA pointer to the DIMM structure, where the DIMM label information is stored.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj{ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jyhjzhMhjubjz)}(h7``ce_count`` number of correctable errors for this rankh](j)}(h ``ce_count``h]j|)}(hjh]hce_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h*number of correctable errors for this rankh]h*number of correctable errors for this rank}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubeh}(h]h ]h"]h$]h&]uh1jthjubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubh)}(h**Description**h]jk)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj^hhubju)}(hhh]jz)}(hFIXME: Currently, the EDAC core model will assume one DIMM per rank. This is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue. h](j)}(hDFIXME: Currently, the EDAC core model will assume one DIMM per rank.h]hDFIXME: Currently, the EDAC core model will assume one DIMM per rank.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hkThis is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue.h]hkThis is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhj hMhjubah}(h]h ]h"]h$]h&]uh1jthj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_raw_error_desc (C struct)c.edac_raw_error_deschNtauh1jhj^hhhjhNubj)}(hhh](j)}(hedac_raw_error_desch]j)}(hstruct edac_raw_error_desch](j)}(hjh]hstruct}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhjXhMubj)}(hedac_raw_error_desch]j)}(hjEh]hedac_raw_error_desc}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjgubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGhhhjXhMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjChhhjXhMubah}(h]j>ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjXhMhj@hhubj0)}(hhh]h)}(hRaw error report structureh]hRaw error report structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j/hj@hhhjXhMubeh}(h]h ](jstructeh"]h$]h&]jPjjQjjRjjSjTjUuh1jhhhj^hjhNubjW)}(hX**Definition**:: struct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; }; **Members** ``location`` location of the error ``label`` label of the affected DIMM(s) ``grain`` minimum granularity for an error report, in bytes ``error_count`` number of errors of the same type ``type`` severity of the error (CE/UE/Fatal) ``top_layer`` top layer of the error (layer[0]) ``mid_layer`` middle layer of the error (layer[1]) ``low_layer`` low layer of the error (layer[2]) ``page_frame_number`` page where the error happened ``offset_in_page`` page offset ``syndrome`` syndrome of the error (or 0 if unknown or if the syndrome is not applicable) ``msg`` error message ``other_detail`` other driver-specific detail about the errorh](h)}(h**Definition**::h](jk)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubjE)}(hXstruct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; };h]hXstruct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; };}hjsbah}(h]h ]h"]h$]h&]jjuh1jDhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubh)}(h **Members**h]jk)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubju)}(hhh](jz)}(h#``location`` location of the error h](j)}(h ``location``h]j|)}(hjh]hlocation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hlocation of the errorh]hlocation of the error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h(``label`` label of the affected DIMM(s) h](j)}(h ``label``h]j|)}(hj3h]hlabel}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj1ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(hlabel of the affected DIMM(s)h]hlabel of the affected DIMM(s)}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjIubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jyhjHhMhjubjz)}(h<``grain`` minimum granularity for an error report, in bytes h](j)}(h ``grain``h]j|)}(hjlh]hgrain}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjfubj)}(hhh]h)}(h1minimum granularity for an error report, in bytesh]h1minimum granularity for an error report, in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h2``error_count`` number of errors of the same type h](j)}(h``error_count``h]j|)}(hjh]h error_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h!number of errors of the same typeh]h!number of errors of the same type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h-``type`` severity of the error (CE/UE/Fatal) h](j)}(h``type``h]j|)}(hjh]htype}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h#severity of the error (CE/UE/Fatal)h]h#severity of the error (CE/UE/Fatal)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h0``top_layer`` top layer of the error (layer[0]) h](j)}(h ``top_layer``h]j|)}(hjh]h top_layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h!top layer of the error (layer[0])h]h!top layer of the error (layer[0])}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhj,hMhjubjz)}(h3``mid_layer`` middle layer of the error (layer[1]) h](j)}(h ``mid_layer``h]j|)}(hjPh]h mid_layer}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjNubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjJubj)}(hhh]h)}(h$middle layer of the error (layer[1])h]h$middle layer of the error (layer[1])}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjfubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jyhjehMhjubjz)}(h0``low_layer`` low layer of the error (layer[2]) h](j)}(h ``low_layer``h]j|)}(hjh]h low_layer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h!low layer of the error (layer[2])h]h!low layer of the error (layer[2])}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h4``page_frame_number`` page where the error happened h](j)}(h``page_frame_number``h]j|)}(hjh]hpage_frame_number}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hpage where the error happenedh]hpage where the error happened}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h``offset_in_page`` page offset h](j)}(h``offset_in_page``h]j|)}(hjh]hoffset_in_page}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h page offseth]h page offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(hZ``syndrome`` syndrome of the error (or 0 if unknown or if the syndrome is not applicable) h](j)}(h ``syndrome``h]j|)}(hj4h]hsyndrome}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj2ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj.ubj)}(hhh]h)}(hLsyndrome of the error (or 0 if unknown or if the syndrome is not applicable)h]hLsyndrome of the error (or 0 if unknown or if the syndrome is not applicable)}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jyhjIhMhjubjz)}(h``msg`` error message h](j)}(h``msg``h]j|)}(hjnh]hmsg}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjlubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhubj)}(hhh]h)}(h error messageh]h error message}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubjz)}(h=``other_detail`` other driver-specific detail about the errorh](j)}(h``other_detail``h]j|)}(hjh]h other_detail}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h,other driver-specific detail about the errorh]h,other driver-specific detail about the error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jyhjhMhjubeh}(h]h ]h"]h$]h&]uh1jthjubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_get_dimm (C function)c.edac_get_dimmhNtauh1jhj^hhhjhNubj)}(hhh](j)}(h_struct dimm_info * edac_get_dimm (struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h]j)}(h]struct dimm_info *edac_get_dimm(struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMoubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMoubh)}(hhh]j)}(h dimm_infoh]h dimm_info}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftype identifier reftargetj" modnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j; ASTIdentifier)}j6 edac_get_dimmsbc.edac_get_dimmasbuh1hhjhhhj hMoubj)}(h h]h }(hjI hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMoubhdesc_sig_punctuation)}(hj|h]h*}(hjY hhhNhNubah}(h]h ]pah"]h$]h&]uh1jW hjhhhj hMoubj)}(h edac_get_dimmh]j)}(hjF h]h edac_get_dimm}(hjk hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjg ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMoubhdesc_parameterlist)}(h>(struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h](hdesc_parameter)}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj modnameN classnameNj: j= )}j@ ]jD c.edac_get_dimmasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubjX )}(hj|h]h*}(hj hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj ubj)}(hmcih]hmci}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj ubj )}(h int layer0h](hdesc_sig_keyword_type)}(hinth]hint}(hj hhhNhNubah}(h]h ]ktah"]h$]h&]uh1j hj ubj)}(h h]h }(hj !hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hlayer0h]hlayer0}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj ubj )}(h int layer1h](j )}(hinth]hint}(hj2!hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj.!ubj)}(h h]h }(hj@!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.!ubj)}(hlayer1h]hlayer1}(hjN!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj.!ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj ubj )}(h int layer2h](j )}(hinth]hint}(hjg!hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjc!ubj)}(h h]h }(hju!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc!ubj)}(hlayer2h]hlayer2}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjc!ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj ubeh}(h]h ]h"]h$]h&]jjuh1j~ hjhhhj hMoubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjhhhj hMoubah}(h]jah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj hMohjhhubj0)}(hhh]h)}(hOGet DIMM info from a memory controller given by [layer0,layer1,layer2] positionh]hOGet DIMM info from a memory controller given by [layer0,layer1,layer2] position}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMohj!hhubah}(h]h ]h"]h$]h&]uh1j/hjhhhj hMoubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj!jRj!jSjTjUuh1jhhhj^hjhNubjW)}(hX**Parameters** ``struct mem_ctl_info *mci`` MC descriptor struct mem_ctl_info ``int layer0`` layer0 position ``int layer1`` layer1 position. Unused if n_layers < 2 ``int layer2`` layer2 position. Unused if n_layers < 3 **Description** For 1 layer, this function returns "dimms[layer0]"; For 2 layers, this function is similar to allocating a two-dimensional array and returning "dimms[layer0][layer1]"; For 3 layers, this function is similar to allocating a tri-dimensional array and returning "dimms[layer0][layer1][layer2]";h](h)}(h**Parameters**h]jk)}(hj!h]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj!ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMshj!ubju)}(hhh](jz)}(h?``struct mem_ctl_info *mci`` MC descriptor struct mem_ctl_info h](j)}(h``struct mem_ctl_info *mci``h]j|)}(hj!h]hstruct mem_ctl_info *mci}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj!ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhj!ubj)}(hhh]h)}(h!MC descriptor struct mem_ctl_infoh]h!MC descriptor struct mem_ctl_info}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMrhj"ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jyhj"hMrhj!ubjz)}(h``int layer0`` layer0 position h](j)}(h``int layer0``h]j|)}(hj'"h]h int layer0}(hj)"hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj%"ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMshj!"ubj)}(hhh]h)}(hlayer0 positionh]hlayer0 position}(hj@"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<"hMshj="ubah}(h]h ]h"]h$]h&]uh1jhj!"ubeh}(h]h ]h"]h$]h&]uh1jyhj<"hMshj!ubjz)}(h7``int layer1`` layer1 position. Unused if n_layers < 2 h](j)}(h``int layer1``h]j|)}(hj`"h]h int layer1}(hjb"hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj^"ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMthjZ"ubj)}(hhh]h)}(h'layer1 position. Unused if n_layers < 2h]h'layer1 position. Unused if n_layers < 2}(hjy"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhju"hMthjv"ubah}(h]h ]h"]h$]h&]uh1jhjZ"ubeh}(h]h ]h"]h$]h&]uh1jyhju"hMthj!ubjz)}(h7``int layer2`` layer2 position. Unused if n_layers < 3 h](j)}(h``int layer2``h]j|)}(hj"h]h int layer2}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj"ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMuhj"ubj)}(hhh]h)}(h'layer2 position. Unused if n_layers < 3h]h'layer2 position. Unused if n_layers < 3}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMuhj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jyhj"hMuhj!ubeh}(h]h ]h"]h$]h&]uh1jthj!ubh)}(h**Description**h]jk)}(hj"h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj"ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMwhj!ubh)}(h3For 1 layer, this function returns "dimms[layer0]";h]h7For 1 layer, this function returns “dimms[layer0]”;}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMvhj!ubh)}(hsFor 2 layers, this function is similar to allocating a two-dimensional array and returning "dimms[layer0][layer1]";h]hwFor 2 layers, this function is similar to allocating a two-dimensional array and returning “dimms[layer0][layer1]”;}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMxhj!ubh)}(h{For 3 layers, this function is similar to allocating a tri-dimensional array and returning "dimms[layer0][layer1][layer2]";h]hFor 3 layers, this function is similar to allocating a tri-dimensional array and returning “dimms[layer0][layer1][layer2]”;}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM{hj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_scrub_ops (C struct)c.edac_scrub_opshNtauh1jhj^hhhjhNubj)}(hhh](j)}(hedac_scrub_opsh]j)}(hstruct edac_scrub_opsh](j)}(hjh]hstruct}(hj7#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3#hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hjE#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3#hhhjD#hMubj)}(hedac_scrub_opsh]j)}(hj1#h]hedac_scrub_ops}(hjW#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjS#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj3#hhhjD#hMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj/#hhhjD#hMubah}(h]j*#ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjD#hMhj,#hhubj0)}(hhh]h)}(h/scrub device operations (all elements optional)h]h/scrub device operations (all elements optional)}(hjy#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjv#hhubah}(h]h ]h"]h$]h&]uh1j/hj,#hhhjD#hMubeh}(h]h ](jstructeh"]h$]h&]jPjjQj#jRj#jSjTjUuh1jhhhj^hjhNubjW)}(hX**Definition**:: struct edac_scrub_ops { int (*read_addr)(struct device *dev, void *drv_data, u64 *base); int (*read_size)(struct device *dev, void *drv_data, u64 *size); int (*write_addr)(struct device *dev, void *drv_data, u64 base); int (*write_size)(struct device *dev, void *drv_data, u64 size); int (*get_enabled_bg)(struct device *dev, void *drv_data, bool *enable); int (*set_enabled_bg)(struct device *dev, void *drv_data, bool enable); int (*get_min_cycle)(struct device *dev, void *drv_data, u32 *min); int (*get_max_cycle)(struct device *dev, void *drv_data, u32 *max); int (*get_cycle_duration)(struct device *dev, void *drv_data, u32 *cycle); int (*set_cycle_duration)(struct device *dev, void *drv_data, u32 cycle); }; **Members** ``read_addr`` read base address of scrubbing range. ``read_size`` read offset of scrubbing range. ``write_addr`` set base address of the scrubbing range. ``write_size`` set offset of the scrubbing range. ``get_enabled_bg`` check if currently performing background scrub. ``set_enabled_bg`` start or stop a bg-scrub. ``get_min_cycle`` get minimum supported scrub cycle duration in seconds. ``get_max_cycle`` get maximum supported scrub cycle duration in seconds. ``get_cycle_duration`` get current scrub cycle duration in seconds. ``set_cycle_duration`` set current scrub cycle duration in seconds.h](h)}(h**Definition**::h](jk)}(h**Definition**h]h Definition}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj#ubh:}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#ubjE)}(hXstruct edac_scrub_ops { int (*read_addr)(struct device *dev, void *drv_data, u64 *base); int (*read_size)(struct device *dev, void *drv_data, u64 *size); int (*write_addr)(struct device *dev, void *drv_data, u64 base); int (*write_size)(struct device *dev, void *drv_data, u64 size); int (*get_enabled_bg)(struct device *dev, void *drv_data, bool *enable); int (*set_enabled_bg)(struct device *dev, void *drv_data, bool enable); int (*get_min_cycle)(struct device *dev, void *drv_data, u32 *min); int (*get_max_cycle)(struct device *dev, void *drv_data, u32 *max); int (*get_cycle_duration)(struct device *dev, void *drv_data, u32 *cycle); int (*set_cycle_duration)(struct device *dev, void *drv_data, u32 cycle); };h]hXstruct edac_scrub_ops { int (*read_addr)(struct device *dev, void *drv_data, u64 *base); int (*read_size)(struct device *dev, void *drv_data, u64 *size); int (*write_addr)(struct device *dev, void *drv_data, u64 base); int (*write_size)(struct device *dev, void *drv_data, u64 size); int (*get_enabled_bg)(struct device *dev, void *drv_data, bool *enable); int (*set_enabled_bg)(struct device *dev, void *drv_data, bool enable); int (*get_min_cycle)(struct device *dev, void *drv_data, u32 *min); int (*get_max_cycle)(struct device *dev, void *drv_data, u32 *max); int (*get_cycle_duration)(struct device *dev, void *drv_data, u32 *cycle); int (*set_cycle_duration)(struct device *dev, void *drv_data, u32 cycle); };}hj#sbah}(h]h ]h"]h$]h&]jjuh1jDhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#ubh)}(h **Members**h]jk)}(hj#h]hMembers}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj#ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#ubju)}(hhh](jz)}(h4``read_addr`` read base address of scrubbing range. h](j)}(h ``read_addr``h]j|)}(hj#h]h read_addr}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj#ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#ubj)}(hhh]h)}(h%read base address of scrubbing range.h]h%read base address of scrubbing range.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jyhj#hMhj#ubjz)}(h.``read_size`` read offset of scrubbing range. h](j)}(h ``read_size``h]j|)}(hj$h]h read_size}(hj!$hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj$ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(hread offset of scrubbing range.h]hread offset of scrubbing range.}(hj8$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4$hMhj5$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jyhj4$hMhj#ubjz)}(h8``write_addr`` set base address of the scrubbing range. h](j)}(h``write_addr``h]j|)}(hjX$h]h write_addr}(hjZ$hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjV$ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjR$ubj)}(hhh]h)}(h(set base address of the scrubbing range.h]h(set base address of the scrubbing range.}(hjq$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjm$hMhjn$ubah}(h]h ]h"]h$]h&]uh1jhjR$ubeh}(h]h ]h"]h$]h&]uh1jyhjm$hMhj#ubjz)}(h2``write_size`` set offset of the scrubbing range. h](j)}(h``write_size``h]j|)}(hj$h]h write_size}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj$ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(h"set offset of the scrubbing range.h]h"set offset of the scrubbing range.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jyhj$hMhj#ubjz)}(hC``get_enabled_bg`` check if currently performing background scrub. h](j)}(h``get_enabled_bg``h]j|)}(hj$h]hget_enabled_bg}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj$ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(h/check if currently performing background scrub.h]h/check if currently performing background scrub.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jyhj$hMhj#ubjz)}(h-``set_enabled_bg`` start or stop a bg-scrub. h](j)}(h``set_enabled_bg``h]j|)}(hj%h]hset_enabled_bg}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(hstart or stop a bg-scrub.h]hstart or stop a bg-scrub.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jyhj%hMhj#ubjz)}(hI``get_min_cycle`` get minimum supported scrub cycle duration in seconds. h](j)}(h``get_min_cycle``h]j|)}(hj<%h]h get_min_cycle}(hj>%hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj:%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj6%ubj)}(hhh]h)}(h6get minimum supported scrub cycle duration in seconds.h]h6get minimum supported scrub cycle duration in seconds.}(hjU%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQ%hMhjR%ubah}(h]h ]h"]h$]h&]uh1jhj6%ubeh}(h]h ]h"]h$]h&]uh1jyhjQ%hMhj#ubjz)}(hI``get_max_cycle`` get maximum supported scrub cycle duration in seconds. h](j)}(h``get_max_cycle``h]j|)}(hju%h]h get_max_cycle}(hjw%hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjs%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjo%ubj)}(hhh]h)}(h6get maximum supported scrub cycle duration in seconds.h]h6get maximum supported scrub cycle duration in seconds.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj%ubah}(h]h ]h"]h$]h&]uh1jhjo%ubeh}(h]h ]h"]h$]h&]uh1jyhj%hMhj#ubjz)}(hD``get_cycle_duration`` get current scrub cycle duration in seconds. h](j)}(h``get_cycle_duration``h]j|)}(hj%h]hget_cycle_duration}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubj)}(hhh]h)}(h,get current scrub cycle duration in seconds.h]h,get current scrub cycle duration in seconds.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jyhj%hMhj#ubjz)}(hC``set_cycle_duration`` set current scrub cycle duration in seconds.h](j)}(h``set_cycle_duration``h]j|)}(hj%h]hset_cycle_duration}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj%ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubj)}(hhh]h)}(h,set current scrub cycle duration in seconds.h]h,set current scrub cycle duration in seconds.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jyhj%hMhj#ubeh}(h]h ]h"]h$]h&]uh1jthj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_ecs_ops (C struct)c.edac_ecs_opshNtauh1jhj^hhhjhNubj)}(hhh](j)}(h edac_ecs_opsh]j)}(hstruct edac_ecs_opsh](j)}(hjh]hstruct}(hjA&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=&hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hjO&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=&hhhjN&hMubj)}(h edac_ecs_opsh]j)}(hj;&h]h edac_ecs_ops}(hja&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj]&ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=&hhhjN&hMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj9&hhhjN&hMubah}(h]j4&ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjN&hMhj6&hhubj0)}(hhh]h)}(h-ECS device operations (all elements optional)h]h-ECS device operations (all elements optional)}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&hhubah}(h]h ]h"]h$]h&]uh1j/hj6&hhhjN&hMubeh}(h]h ](jstructeh"]h$]h&]jPjjQj&jRj&jSjTjUuh1jhhhj^hjhNubjW)}(hX **Definition**:: struct edac_ecs_ops { int (*get_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_mode)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_mode)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*reset)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_threshold)(struct device *dev, void *drv_data, int fru_id, u32 *threshold); int (*set_threshold)(struct device *dev, void *drv_data, int fru_id, u32 threshold); }; **Members** ``get_log_entry_type`` read the log entry type value. ``set_log_entry_type`` set the log entry type value. ``get_mode`` read the mode value. ``set_mode`` set the mode value. ``reset`` reset the ECS counter. ``get_threshold`` read the threshold count per gigabits of memory cells. ``set_threshold`` set the threshold count per gigabits of memory cells.h](h)}(h**Definition**::h](jk)}(h**Definition**h]h Definition}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj&ubh:}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&ubjE)}(hXdstruct edac_ecs_ops { int (*get_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_mode)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_mode)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*reset)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_threshold)(struct device *dev, void *drv_data, int fru_id, u32 *threshold); int (*set_threshold)(struct device *dev, void *drv_data, int fru_id, u32 threshold); };h]hXdstruct edac_ecs_ops { int (*get_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_log_entry_type)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_mode)(struct device *dev, void *drv_data, int fru_id, u32 *val); int (*set_mode)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*reset)(struct device *dev, void *drv_data, int fru_id, u32 val); int (*get_threshold)(struct device *dev, void *drv_data, int fru_id, u32 *threshold); int (*set_threshold)(struct device *dev, void *drv_data, int fru_id, u32 threshold); };}hj&sbah}(h]h ]h"]h$]h&]jjuh1jDhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&ubh)}(h **Members**h]jk)}(hj&h]hMembers}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj&ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&ubju)}(hhh](jz)}(h6``get_log_entry_type`` read the log entry type value. h](j)}(h``get_log_entry_type``h]j|)}(hj&h]hget_log_entry_type}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj&ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj&ubj)}(hhh]h)}(hread the log entry type value.h]hread the log entry type value.}(hj 'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jyhj'hMhj&ubjz)}(h5``set_log_entry_type`` set the log entry type value. h](j)}(h``set_log_entry_type``h]j|)}(hj)'h]hset_log_entry_type}(hj+'hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj''ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj#'ubj)}(hhh]h)}(hset the log entry type value.h]hset the log entry type value.}(hjB'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>'hMhj?'ubah}(h]h ]h"]h$]h&]uh1jhj#'ubeh}(h]h ]h"]h$]h&]uh1jyhj>'hMhj&ubjz)}(h"``get_mode`` read the mode value. h](j)}(h ``get_mode``h]j|)}(hjb'h]hget_mode}(hjd'hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj`'ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj\'ubj)}(hhh]h)}(hread the mode value.h]hread the mode value.}(hj{'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjw'hMhjx'ubah}(h]h ]h"]h$]h&]uh1jhj\'ubeh}(h]h ]h"]h$]h&]uh1jyhjw'hMhj&ubjz)}(h!``set_mode`` set the mode value. h](j)}(h ``set_mode``h]j|)}(hj'h]hset_mode}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj'ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj'ubj)}(hhh]h)}(hset the mode value.h]hset the mode value.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jyhj'hMhj&ubjz)}(h!``reset`` reset the ECS counter. h](j)}(h ``reset``h]j|)}(hj'h]hreset}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj'ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj'ubj)}(hhh]h)}(hreset the ECS counter.h]hreset the ECS counter.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jyhj'hMhj&ubjz)}(hI``get_threshold`` read the threshold count per gigabits of memory cells. h](j)}(h``get_threshold``h]j|)}(hj (h]h get_threshold}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj (ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubj)}(hhh]h)}(h6read the threshold count per gigabits of memory cells.h]h6read the threshold count per gigabits of memory cells.}(hj&(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"(hMhj#(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jyhj"(hMhj&ubjz)}(hG``set_threshold`` set the threshold count per gigabits of memory cells.h](j)}(h``set_threshold``h]j|)}(hjF(h]h set_threshold}(hjH(hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjD(ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj@(ubj)}(hhh]h)}(h5set the threshold count per gigabits of memory cells.h]h5set the threshold count per gigabits of memory cells.}(hj_(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj\(ubah}(h]h ]h"]h$]h&]uh1jhj@(ubeh}(h]h ]h"]h$]h&]uh1jyhj[(hMhj&ubeh}(h]h ]h"]h$]h&]uh1jthj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mem_repair_ops (C struct)c.edac_mem_repair_opshNtauh1jhj^hhhjhNubj)}(hhh](j)}(hedac_mem_repair_opsh]j)}(hstruct edac_mem_repair_opsh](j)}(hjh]hstruct}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhj(hMubj)}(hedac_mem_repair_opsh]j)}(hj(h]hedac_mem_repair_ops}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj(ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj(hhhj(hMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj(hhhj(hMubah}(h]j(ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj(hMhj(hhubj0)}(hhh]h)}(hVmemory repair operations (all elements are optional except do_repair, set_hpa/set_dpa)h]hVmemory repair operations (all elements are optional except do_repair, set_hpa/set_dpa)}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(hhubah}(h]h ]h"]h$]h&]uh1j/hj(hhhj(hMubeh}(h]h ](jstructeh"]h$]h&]jPjjQj(jRj(jSjTjUuh1jhhhj^hjhNubjW)}(hXE**Definition**:: struct edac_mem_repair_ops { int (*get_repair_type)(struct device *dev, void *drv_data, const char **type); int (*get_persist_mode)(struct device *dev, void *drv_data, bool *persist); int (*set_persist_mode)(struct device *dev, void *drv_data, bool persist); int (*get_repair_safe_when_in_use)(struct device *dev, void *drv_data, bool *safe); int (*get_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*set_hpa)(struct device *dev, void *drv_data, u64 hpa); int (*get_min_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_max_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*set_dpa)(struct device *dev, void *drv_data, u64 dpa); int (*get_min_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_max_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_nibble_mask)(struct device *dev, void *drv_data, u32 *val); int (*set_nibble_mask)(struct device *dev, void *drv_data, u32 val); int (*get_bank_group)(struct device *dev, void *drv_data, u32 *val); int (*set_bank_group)(struct device *dev, void *drv_data, u32 val); int (*get_bank)(struct device *dev, void *drv_data, u32 *val); int (*set_bank)(struct device *dev, void *drv_data, u32 val); int (*get_rank)(struct device *dev, void *drv_data, u32 *val); int (*set_rank)(struct device *dev, void *drv_data, u32 val); int (*get_row)(struct device *dev, void *drv_data, u32 *val); int (*set_row)(struct device *dev, void *drv_data, u32 val); int (*get_column)(struct device *dev, void *drv_data, u32 *val); int (*set_column)(struct device *dev, void *drv_data, u32 val); int (*get_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_channel)(struct device *dev, void *drv_data, u32 val); int (*get_sub_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_sub_channel)(struct device *dev, void *drv_data, u32 val); int (*do_repair)(struct device *dev, void *drv_data, u32 val); }; **Members** ``get_repair_type`` get the memory repair type, listed in enum edac_mem_repair_function. ``get_persist_mode`` get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair). ``set_persist_mode`` set the persist mode of the memory repair instance. ``get_repair_safe_when_in_use`` get whether memory media is accessible and data is retained during repair operation. ``get_hpa`` get current host physical address (HPA) of memory to repair. ``set_hpa`` set host physical address (HPA) of memory to repair. ``get_min_hpa`` get the minimum supported host physical address (HPA). ``get_max_hpa`` get the maximum supported host physical address (HPA). ``get_dpa`` get current device physical address (DPA) of memory to repair. ``set_dpa`` set device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records. ``get_min_dpa`` get the minimum supported device physical address (DPA). ``get_max_dpa`` get the maximum supported device physical address (DPA). ``get_nibble_mask`` get current nibble mask of memory to repair. ``set_nibble_mask`` set nibble mask of memory to repair. ``get_bank_group`` get current bank group of memory to repair. ``set_bank_group`` set bank group of memory to repair. ``get_bank`` get current bank of memory to repair. ``set_bank`` set bank of memory to repair. ``get_rank`` get current rank of memory to repair. ``set_rank`` set rank of memory to repair. ``get_row`` get current row of memory to repair. ``set_row`` set row of memory to repair. ``get_column`` get current column of memory to repair. ``set_column`` set column of memory to repair. ``get_channel`` get current channel of memory to repair. ``set_channel`` set channel of memory to repair. ``get_sub_channel`` get current subchannel of memory to repair. ``set_sub_channel`` set subchannel of memory to repair. ``do_repair`` Issue memory repair operation for the HPA/DPA and other control attributes set for the memory to repair.h](h)}(h**Definition**::h](jk)}(h**Definition**h]h Definition}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj)ubh:}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubjE)}(hX"struct edac_mem_repair_ops { int (*get_repair_type)(struct device *dev, void *drv_data, const char **type); int (*get_persist_mode)(struct device *dev, void *drv_data, bool *persist); int (*set_persist_mode)(struct device *dev, void *drv_data, bool persist); int (*get_repair_safe_when_in_use)(struct device *dev, void *drv_data, bool *safe); int (*get_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*set_hpa)(struct device *dev, void *drv_data, u64 hpa); int (*get_min_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_max_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*set_dpa)(struct device *dev, void *drv_data, u64 dpa); int (*get_min_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_max_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_nibble_mask)(struct device *dev, void *drv_data, u32 *val); int (*set_nibble_mask)(struct device *dev, void *drv_data, u32 val); int (*get_bank_group)(struct device *dev, void *drv_data, u32 *val); int (*set_bank_group)(struct device *dev, void *drv_data, u32 val); int (*get_bank)(struct device *dev, void *drv_data, u32 *val); int (*set_bank)(struct device *dev, void *drv_data, u32 val); int (*get_rank)(struct device *dev, void *drv_data, u32 *val); int (*set_rank)(struct device *dev, void *drv_data, u32 val); int (*get_row)(struct device *dev, void *drv_data, u32 *val); int (*set_row)(struct device *dev, void *drv_data, u32 val); int (*get_column)(struct device *dev, void *drv_data, u32 *val); int (*set_column)(struct device *dev, void *drv_data, u32 val); int (*get_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_channel)(struct device *dev, void *drv_data, u32 val); int (*get_sub_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_sub_channel)(struct device *dev, void *drv_data, u32 val); int (*do_repair)(struct device *dev, void *drv_data, u32 val); };h]hX"struct edac_mem_repair_ops { int (*get_repair_type)(struct device *dev, void *drv_data, const char **type); int (*get_persist_mode)(struct device *dev, void *drv_data, bool *persist); int (*set_persist_mode)(struct device *dev, void *drv_data, bool persist); int (*get_repair_safe_when_in_use)(struct device *dev, void *drv_data, bool *safe); int (*get_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*set_hpa)(struct device *dev, void *drv_data, u64 hpa); int (*get_min_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_max_hpa)(struct device *dev, void *drv_data, u64 *hpa); int (*get_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*set_dpa)(struct device *dev, void *drv_data, u64 dpa); int (*get_min_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_max_dpa)(struct device *dev, void *drv_data, u64 *dpa); int (*get_nibble_mask)(struct device *dev, void *drv_data, u32 *val); int (*set_nibble_mask)(struct device *dev, void *drv_data, u32 val); int (*get_bank_group)(struct device *dev, void *drv_data, u32 *val); int (*set_bank_group)(struct device *dev, void *drv_data, u32 val); int (*get_bank)(struct device *dev, void *drv_data, u32 *val); int (*set_bank)(struct device *dev, void *drv_data, u32 val); int (*get_rank)(struct device *dev, void *drv_data, u32 *val); int (*set_rank)(struct device *dev, void *drv_data, u32 val); int (*get_row)(struct device *dev, void *drv_data, u32 *val); int (*set_row)(struct device *dev, void *drv_data, u32 val); int (*get_column)(struct device *dev, void *drv_data, u32 *val); int (*set_column)(struct device *dev, void *drv_data, u32 val); int (*get_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_channel)(struct device *dev, void *drv_data, u32 val); int (*get_sub_channel)(struct device *dev, void *drv_data, u32 *val); int (*set_sub_channel)(struct device *dev, void *drv_data, u32 val); int (*do_repair)(struct device *dev, void *drv_data, u32 val); };}hj)sbah}(h]h ]h"]h$]h&]jjuh1jDhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj(ubh)}(h **Members**h]jk)}(hj0)h]hMembers}(hj2)hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj.)ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM"hj(ubju)}(hhh](jz)}(hY``get_repair_type`` get the memory repair type, listed in enum edac_mem_repair_function. h](j)}(h``get_repair_type``h]j|)}(hjO)h]hget_repair_type}(hjQ)hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjM)ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjI)ubj)}(hhh]h)}(hDget the memory repair type, listed in enum edac_mem_repair_function.h]hDget the memory repair type, listed in enum edac_mem_repair_function.}(hjh)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhje)ubah}(h]h ]h"]h$]h&]uh1jhjI)ubeh}(h]h ]h"]h$]h&]uh1jyhjd)hMhjF)ubjz)}(h``get_persist_mode`` get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair). h](j)}(h``get_persist_mode``h]j|)}(hj)h]hget_persist_mode}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj)ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubj)}(hhh]h)}(h}get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair).h]h}get the current persist mode. false - Soft repair type (temporary repair). true - Hard memory repair type (permanent repair).}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jyhj)hMhjF)ubjz)}(hI``set_persist_mode`` set the persist mode of the memory repair instance. h](j)}(h``set_persist_mode``h]j|)}(hj)h]hset_persist_mode}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj)ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubj)}(hhh]h)}(h3set the persist mode of the memory repair instance.h]h3set the persist mode of the memory repair instance.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jyhj)hMhjF)ubjz)}(hu``get_repair_safe_when_in_use`` get whether memory media is accessible and data is retained during repair operation. h](j)}(h``get_repair_safe_when_in_use``h]j|)}(hj)h]hget_repair_safe_when_in_use}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj)ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj)ubj)}(hhh]h)}(hTget whether memory media is accessible and data is retained during repair operation.h]hTget whether memory media is accessible and data is retained during repair operation.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj*ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jyhj*hMhjF)ubjz)}(hI``get_hpa`` get current host physical address (HPA) of memory to repair. h](j)}(h ``get_hpa``h]j|)}(hj6*h]hget_hpa}(hj8*hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj4*ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj0*ubj)}(hhh]h)}(hget current device physical address (DPA) of memory to repair.h]h>get current device physical address (DPA) of memory to repair.}(hj3+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/+hM hj0+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jyhj/+hM hjF)ubjz)}(hX``set_dpa`` set device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records. h](j)}(h ``set_dpa``h]j|)}(hjS+h]hset_dpa}(hjU+hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjQ+ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjM+ubj)}(hhh]h)}(hXset device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records.h]hXset device physical address (DPA) of memory to repair. In some states of system configuration (e.g. before address decoders have been configured), memory devices (e.g. CXL) may not have an active mapping in the host physical address map. As such, the memory to repair must be identified by a device specific physical addressing scheme using a device physical address(DPA). The DPA and other control attributes to use for the repair operations will be presented in related error records.}(hjl+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hji+ubah}(h]h ]h"]h$]h&]uh1jhjM+ubeh}(h]h ]h"]h$]h&]uh1jyhjh+hMhjF)ubjz)}(hI``get_min_dpa`` get the minimum supported device physical address (DPA). h](j)}(h``get_min_dpa``h]j|)}(hj+h]h get_min_dpa}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj+ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj+ubj)}(hhh]h)}(h8get the minimum supported device physical address (DPA).h]h8get the minimum supported device physical address (DPA).}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jyhj+hMhjF)ubjz)}(hI``get_max_dpa`` get the maximum supported device physical address (DPA). h](j)}(h``get_max_dpa``h]j|)}(hj+h]h get_max_dpa}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj+ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj+ubj)}(hhh]h)}(h8get the maximum supported device physical address (DPA).h]h8get the maximum supported device physical address (DPA).}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jyhj+hMhjF)ubjz)}(hA``get_nibble_mask`` get current nibble mask of memory to repair. h](j)}(h``get_nibble_mask``h]j|)}(hj+h]hget_nibble_mask}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj+ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj+ubj)}(hhh]h)}(h,get current nibble mask of memory to repair.h]h,get current nibble mask of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jyhj,hMhjF)ubjz)}(h9``set_nibble_mask`` set nibble mask of memory to repair. h](j)}(h``set_nibble_mask``h]j|)}(hj8,h]hset_nibble_mask}(hj:,hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj6,ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj2,ubj)}(hhh]h)}(h$set nibble mask of memory to repair.h]h$set nibble mask of memory to repair.}(hjQ,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjM,hMhjN,ubah}(h]h ]h"]h$]h&]uh1jhj2,ubeh}(h]h ]h"]h$]h&]uh1jyhjM,hMhjF)ubjz)}(h?``get_bank_group`` get current bank group of memory to repair. h](j)}(h``get_bank_group``h]j|)}(hjq,h]hget_bank_group}(hjs,hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjo,ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjk,ubj)}(hhh]h)}(h+get current bank group of memory to repair.h]h+get current bank group of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhjk,ubeh}(h]h ]h"]h$]h&]uh1jyhj,hMhjF)ubjz)}(h7``set_bank_group`` set bank group of memory to repair. h](j)}(h``set_bank_group``h]j|)}(hj,h]hset_bank_group}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj,ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(h#set bank group of memory to repair.h]h#set bank group of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jyhj,hMhjF)ubjz)}(h3``get_bank`` get current bank of memory to repair. h](j)}(h ``get_bank``h]j|)}(hj,h]hget_bank}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj,ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(h%get current bank of memory to repair.h]h%get current bank of memory to repair.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jyhj,hMhjF)ubjz)}(h+``set_bank`` set bank of memory to repair. h](j)}(h ``set_bank``h]j|)}(hj-h]hset_bank}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(hset bank of memory to repair.h]hset bank of memory to repair.}(hj5-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1-hMhj2-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jyhj1-hMhjF)ubjz)}(h3``get_rank`` get current rank of memory to repair. h](j)}(h ``get_rank``h]j|)}(hjU-h]hget_rank}(hjW-hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjS-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjO-ubj)}(hhh]h)}(h%get current rank of memory to repair.h]h%get current rank of memory to repair.}(hjn-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjj-hMhjk-ubah}(h]h ]h"]h$]h&]uh1jhjO-ubeh}(h]h ]h"]h$]h&]uh1jyhjj-hMhjF)ubjz)}(h+``set_rank`` set rank of memory to repair. h](j)}(h ``set_rank``h]j|)}(hj-h]hset_rank}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(hset rank of memory to repair.h]hset rank of memory to repair.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jyhj-hMhjF)ubjz)}(h1``get_row`` get current row of memory to repair. h](j)}(h ``get_row``h]j|)}(hj-h]hget_row}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(h$get current row of memory to repair.h]h$get current row of memory to repair.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jyhj-hMhjF)ubjz)}(h)``set_row`` set row of memory to repair. h](j)}(h ``set_row``h]j|)}(hj.h]hset_row}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj-ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj-ubj)}(hhh]h)}(hset row of memory to repair.h]hset row of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jyhj.hMhjF)ubjz)}(h7``get_column`` get current column of memory to repair. h](j)}(h``get_column``h]j|)}(hj9.h]h get_column}(hj;.hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj7.ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hj3.ubj)}(hhh]h)}(h'get current column of memory to repair.h]h'get current column of memory to repair.}(hjR.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjN.hM hjO.ubah}(h]h ]h"]h$]h&]uh1jhj3.ubeh}(h]h ]h"]h$]h&]uh1jyhjN.hM hjF)ubjz)}(h/``set_column`` set column of memory to repair. h](j)}(h``set_column``h]j|)}(hjr.h]h set_column}(hjt.hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjp.ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM!hjl.ubj)}(hhh]h)}(hset column of memory to repair.h]hset column of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hM!hj.ubah}(h]h ]h"]h$]h&]uh1jhjl.ubeh}(h]h ]h"]h$]h&]uh1jyhj.hM!hjF)ubjz)}(h9``get_channel`` get current channel of memory to repair. h](j)}(h``get_channel``h]j|)}(hj.h]h get_channel}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj.ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM"hj.ubj)}(hhh]h)}(h(get current channel of memory to repair.h]h(get current channel of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hM"hj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jyhj.hM"hjF)ubjz)}(h1``set_channel`` set channel of memory to repair. h](j)}(h``set_channel``h]j|)}(hj.h]h set_channel}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj.ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM#hj.ubj)}(hhh]h)}(h set channel of memory to repair.h]h set channel of memory to repair.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hM#hj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jyhj.hM#hjF)ubjz)}(h@``get_sub_channel`` get current subchannel of memory to repair. h](j)}(h``get_sub_channel``h]j|)}(hj/h]hget_sub_channel}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj/ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM$hj/ubj)}(hhh]h)}(h+get current subchannel of memory to repair.h]h+get current subchannel of memory to repair.}(hj6/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2/hM$hj3/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jyhj2/hM$hjF)ubjz)}(h8``set_sub_channel`` set subchannel of memory to repair. h](j)}(h``set_sub_channel``h]j|)}(hjV/h]hset_sub_channel}(hjX/hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjT/ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM%hjP/ubj)}(hhh]h)}(h#set subchannel of memory to repair.h]h#set subchannel of memory to repair.}(hjo/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjk/hM%hjl/ubah}(h]h ]h"]h$]h&]uh1jhjP/ubeh}(h]h ]h"]h$]h&]uh1jyhjk/hM%hjF)ubjz)}(hv``do_repair`` Issue memory repair operation for the HPA/DPA and other control attributes set for the memory to repair.h](j)}(h ``do_repair``h]j|)}(hj/h]h do_repair}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj/ubah}(h]h ]h"]h$]h&]uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM&hj/ubj)}(hhh]h)}(hhIssue memory repair operation for the HPA/DPA and other control attributes set for the memory to repair.h]hhIssue memory repair operation for the HPA/DPA and other control attributes set for the memory to repair.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM&hj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jyhj/hM&hjF)ubeh}(h]h ]h"]h$]h&]uh1jthj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhjhNubh)}(h**Description**h]jk)}(hj/h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj/ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM*hj^hhubh)}(hOAll elements are optional except do_repair and at least one of set_hpa/set_dpa.h]hOAll elements are optional except do_repair and at least one of set_hpa/set_dpa.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM'hj^hhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_alloc (C function)c.edac_mc_allochNtauh1jhj^hhhNhNubj)}(hhh](j)}(hstruct mem_ctl_info * edac_mc_alloc (unsigned int mc_num, unsigned int n_layers, struct edac_mc_layer *layers, unsigned int sz_pvt)h]j)}(hstruct mem_ctl_info *edac_mc_alloc(unsigned int mc_num, unsigned int n_layers, struct edac_mc_layer *layers, unsigned int sz_pvt)h](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 0hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKcubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 0hhhj0hKcubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj.0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj+0ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj00modnameN classnameNj: j= )}j@ ]jC )}j6 edac_mc_allocsbc.edac_mc_allocasbuh1hhj 0hhhj0hKcubj)}(h h]h }(hjO0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 0hhhj0hKcubjX )}(hj|h]h*}(hj]0hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj 0hhhj0hKcubj)}(h edac_mc_alloch]j)}(hjL0h]h edac_mc_alloc}(hjn0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjj0ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj 0hhhj0hKcubj )}(h_(unsigned int mc_num, unsigned int n_layers, struct edac_mc_layer *layers, unsigned int sz_pvt)h](j )}(hunsigned int mc_numh](j )}(hunsignedh]hunsigned}(hj0hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj )}(hinth]hint}(hj0hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(hmc_numh]hmc_num}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0ubj )}(hunsigned int n_layersh](j )}(hunsignedh]hunsigned}(hj0hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj )}(hinth]hint}(hj0hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj0ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(hn_layersh]hn_layers}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0ubj )}(hstruct edac_mc_layer *layersh](j)}(hjh]hstruct}(hj+1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'1ubj)}(h h]h }(hj81hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'1ubh)}(hhh]j)}(h edac_mc_layerh]h edac_mc_layer}(hjI1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjF1ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjK1modnameN classnameNj: j= )}j@ ]jJ0c.edac_mc_allocasbuh1hhj'1ubj)}(h h]h }(hjg1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'1ubjX )}(hj|h]h*}(hju1hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj'1ubj)}(hlayersh]hlayers}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj'1ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0ubj )}(hunsigned int sz_pvth](j )}(hunsignedh]hunsigned}(hj1hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj1ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj )}(hinth]hint}(hj1hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj1ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj)}(hsz_pvth]hsz_pvt}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0ubeh}(h]h ]h"]h$]h&]jjuh1j~ hj 0hhhj0hKcubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj0hhhj0hKcubah}(h]j0ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj0hKchj0hhubj0)}(hhh]h)}(h4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj:4ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj3hhhj4hKubj )}(h(void)h]j )}(hvoidh]j )}(hvoidh]hvoid}(hjZ4hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjV4ubah}(h]h ]h"]h$]h&]noemphjjuh1j hjR4ubah}(h]h ]h"]h$]h&]jjuh1j~ hj3hhhj4hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj3hhhj4hKubah}(h]j3ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj4hKhj3hhubj0)}(hhh]h)}(h&Return the owner's mod_name of EDAC MCh]h(Return the owner’s mod_name of EDAC MC}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj4hhubah}(h]h ]h"]h$]h&]uh1j/hj3hhhj4hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj4jRj4jSjTjUuh1jhhhj^hNhNubjW)}(hv**Parameters** ``void`` no arguments **Return** Pointer to mod_name string when EDAC MC is owned. NULL otherwise.h](h)}(h**Parameters**h]jk)}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj4ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj4ubju)}(hhh]jz)}(h``void`` no arguments h](j)}(h``void``h]j|)}(hj4h]hvoid}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj4ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj4ubj)}(hhh]h)}(h no argumentsh]h no arguments}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hKhj4ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jyhj4hKhj4ubah}(h]h ]h"]h$]h&]uh1jthj4ubh)}(h **Return**h]jk)}(hj5h]hReturn}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj4ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj4ubh)}(hAPointer to mod_name string when EDAC MC is owned. NULL otherwise.h]hAPointer to mod_name string when EDAC MC is owned. NULL otherwise.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_free (C function)c.edac_mc_freehNtauh1jhj^hhhNhNubj)}(hhh](j)}(h,void edac_mc_free (struct mem_ctl_info *mci)h]j)}(h+void edac_mc_free(struct mem_ctl_info *mci)h](j )}(hvoidh]hvoid}(hjE5hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjA5hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hjT5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA5hhhjS5hKubj)}(h edac_mc_freeh]j)}(h edac_mc_freeh]h edac_mc_free}(hjf5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjb5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjA5hhhjS5hKubj )}(h(struct mem_ctl_info *mci)h]j )}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~5ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj5modnameN classnameNj: j= )}j@ ]jC )}j6 jh5sbc.edac_mc_freeasbuh1hhj~5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~5ubjX )}(hj|h]h*}(hj5hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj~5ubj)}(hmcih]hmci}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj~5ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjz5ubah}(h]h ]h"]h$]h&]jjuh1j~ hjA5hhhjS5hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj=5hhhjS5hKubah}(h]j85ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjS5hKhj:5hhubj0)}(hhh]h)}(h.Frees a previously allocated **mci** structureh](hFrees a previously allocated }(hj6hhhNhNubjk)}(h**mci**h]hmci}(hj 6hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj6ubh structure}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj6hhubah}(h]h ]h"]h$]h&]uh1j/hj:5hhhjS5hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj/6jRj/6jSjTjUuh1jhhhj^hNhNubjW)}(hY**Parameters** ``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structureh](h)}(h**Parameters**h]jk)}(hj96h]h Parameters}(hj;6hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj76ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj36ubju)}(hhh]jz)}(hG``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structureh](j)}(h``struct mem_ctl_info *mci``h]j|)}(hjX6h]hstruct mem_ctl_info *mci}(hjZ6hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjV6ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjR6ubj)}(hhh]h)}(h*pointer to a struct mem_ctl_info structureh]h*pointer to a struct mem_ctl_info structure}(hjq6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjn6ubah}(h]h ]h"]h$]h&]uh1jhjR6ubeh}(h]h ]h"]h$]h&]uh1jyhjm6hKhjO6ubah}(h]h ]h"]h$]h&]uh1jthj36ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_has_mcs (C function)c.edac_has_mcshNtauh1jhj^hhhNhNubj)}(hhh](j)}(hbool edac_has_mcs (void)h]j)}(hbool edac_has_mcs(void)h](j )}(hboolh]hbool}(hj6hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj6hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhj6hKubj)}(h edac_has_mcsh]j)}(h edac_has_mcsh]h edac_has_mcs}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj6ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj6hhhj6hKubj )}(h(void)h]j )}(hvoidh]j )}(hvoidh]hvoid}(hj6hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]noemphjjuh1j hj6ubah}(h]h ]h"]h$]h&]jjuh1j~ hj6hhhj6hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj6hhhj6hKubah}(h]j6ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj6hKhj6hhubj0)}(hhh]h)}(h%Check if any MCs have been allocated.h]h%Check if any MCs have been allocated.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj7hhubah}(h]h ]h"]h$]h&]uh1j/hj6hhhj6hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj17jRj17jSjTjUuh1jhhhj^hNhNubjW)}(h}**Parameters** ``void`` no arguments **Return** True if MC instances have been registered successfully. False otherwise.h](h)}(h**Parameters**h]jk)}(hj;7h]h Parameters}(hj=7hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj97ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj57ubju)}(hhh]jz)}(h``void`` no arguments h](j)}(h``void``h]j|)}(hjZ7h]hvoid}(hj\7hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjX7ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjT7ubj)}(hhh]h)}(h no argumentsh]h no arguments}(hjs7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjo7hKhjp7ubah}(h]h ]h"]h$]h&]uh1jhjT7ubeh}(h]h ]h"]h$]h&]uh1jyhjo7hKhjQ7ubah}(h]h ]h"]h$]h&]uh1jthj57ubh)}(h **Return**h]jk)}(hj7h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj7ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj57ubh)}(hHTrue if MC instances have been registered successfully. False otherwise.h]hHTrue if MC instances have been registered successfully. False otherwise.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj57ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_find (C function)c.edac_mc_findhNtauh1jhj^hhhNhNubj)}(hhh](j)}(h,struct mem_ctl_info * edac_mc_find (int idx)h]j)}(h*struct mem_ctl_info *edac_mc_find(int idx)h](j)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhj7hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj7modnameN classnameNj: j= )}j@ ]jC )}j6 edac_mc_findsbc.edac_mc_findasbuh1hhj7hhhj7hKubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhj7hKubjX )}(hj|h]h*}(hj(8hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj7hhhj7hKubj)}(h edac_mc_findh]j)}(hj8h]h edac_mc_find}(hj98hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj58ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj7hhhj7hKubj )}(h (int idx)h]j )}(hint idxh](j )}(hinth]hint}(hjT8hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjP8ubj)}(h h]h }(hjb8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP8ubj)}(hidxh]hidx}(hjp8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjP8ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjL8ubah}(h]h ]h"]h$]h&]jjuh1j~ hj7hhhj7hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj7hhhj7hKubah}(h]j7ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj7hKhj7hhubj0)}(hhh]h)}(h;Search for a mem_ctl_info structure whose index is **idx**.h](h3Search for a mem_ctl_info structure whose index is }(hj8hhhNhNubjk)}(h**idx**h]hidx}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj8ubh.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8hhubah}(h]h ]h"]h$]h&]uh1j/hj7hhhj7hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj8jRj8jSjTjUuh1jhhhj^hNhNubjW)}(h**Parameters** ``int idx`` index to be seek **Description** If found, return a pointer to the structure. Else return NULL.h](h)}(h**Parameters**h]jk)}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj8ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubju)}(hhh]jz)}(h``int idx`` index to be seek h](j)}(h ``int idx``h]j|)}(hj8h]hint idx}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj8ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubj)}(hhh]h)}(hindex to be seekh]hindex to be seek}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hKhj9ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jyhj9hKhj8ubah}(h]h ]h"]h$]h&]uh1jthj8ubh)}(h**Description**h]jk)}(hj(9h]h Description}(hj*9hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj&9ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubh)}(h>If found, return a pointer to the structure. Else return NULL.h]h>If found, return a pointer to the structure. Else return NULL.}(hj>9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jfind_mci_by_dev (C function)c.find_mci_by_devhNtauh1jhj^hhhNhNubj)}(hhh](j)}(h:struct mem_ctl_info * find_mci_by_dev (struct device *dev)h]j)}(h8struct mem_ctl_info *find_mci_by_dev(struct device *dev)h](j)}(hjh]hstruct}(hjm9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji9hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj{9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji9hhhjz9hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj9modnameN classnameNj: j= )}j@ ]jC )}j6 find_mci_by_devsbc.find_mci_by_devasbuh1hhji9hhhjz9hKubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji9hhhjz9hKubjX )}(hj|h]h*}(hj9hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hji9hhhjz9hKubj)}(hfind_mci_by_devh]j)}(hj9h]hfind_mci_by_dev}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj9ubah}(h]h ](jjeh"]h$]h&]jjuh1jhji9hhhjz9hKubj )}(h(struct device *dev)h]j )}(hstruct device *devh](j)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(hdeviceh]hdevice}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj:modnameN classnameNj: j= )}j@ ]j9c.find_mci_by_devasbuh1hhj9ubj)}(h h]h }(hj#:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubjX )}(hj|h]h*}(hj1:hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj9ubj)}(hdevh]hdev}(hj>:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj9ubah}(h]h ]h"]h$]h&]jjuh1j~ hji9hhhjz9hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hje9hhhjz9hKubah}(h]j`9ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjz9hKhjb9hhubj0)}(hhh]h)}(hMScan list of controllers looking for the one that manages the **dev** device.h](h>Scan list of controllers looking for the one that manages the }(hjh:hhhNhNubjk)}(h**dev**h]hdev}(hjp:hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjh:ubh device.}(hjh:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhje:hhubah}(h]h ]h"]h$]h&]uh1j/hjb9hhhjz9hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj:jRj:jSjTjUuh1jhhhj^hNhNubjW)}(h**Parameters** ``struct device *dev`` pointer to a struct device related with the MCI **Return** on success, returns a pointer to struct :c:type:`mem_ctl_info`; ``NULL`` otherwise.h](h)}(h**Parameters**h]jk)}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj:ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj:ubju)}(hhh]jz)}(hG``struct device *dev`` pointer to a struct device related with the MCI h](j)}(h``struct device *dev``h]j|)}(hj:h]hstruct device *dev}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj:ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj:ubj)}(hhh]h)}(h/pointer to a struct device related with the MCIh]h/pointer to a struct device related with the MCI}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hKhj:ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jyhj:hKhj:ubah}(h]h ]h"]h$]h&]uh1jthj:ubh)}(h **Return**h]jk)}(hj:h]hReturn}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj:ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj:ubh)}(hSon success, returns a pointer to struct :c:type:`mem_ctl_info`; ``NULL`` otherwise.h](h(on success, returns a pointer to struct }(hj ;hhhNhNubh)}(h:c:type:`mem_ctl_info`h]j|)}(hj;h]h mem_ctl_info}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j= )}j@ ]sbj mem_ctl_infouh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj ;ubh; }(hj ;hhhNhNubj|)}(h``NULL``h]hNULL}(hj;;hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj ;ubh otherwise.}(hj ;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj6;hKhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_del_mc (C function)c.edac_mc_del_mchNtauh1jhj^hhhNhNubj)}(hhh](j)}(h9struct mem_ctl_info * edac_mc_del_mc (struct device *dev)h]j)}(h7struct mem_ctl_info *edac_mc_del_mc(struct device *dev)h](j)}(hjh]hstruct}(hjs;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo;hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo;hhhj;hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj;modnameN classnameNj: j= )}j@ ]jC )}j6 edac_mc_del_mcsbc.edac_mc_del_mcasbuh1hhjo;hhhj;hKubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo;hhhj;hKubjX )}(hj|h]h*}(hj;hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjo;hhhj;hKubj)}(hedac_mc_del_mch]j)}(hj;h]hedac_mc_del_mc}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjo;hhhj;hKubj )}(h(struct device *dev)h]j )}(hstruct device *devh](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hdeviceh]hdevice}(hj <hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj <modnameN classnameNj: j= )}j@ ]j;c.edac_mc_del_mcasbuh1hhj;ubj)}(h h]h }(hj)<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubjX )}(hj|h]h*}(hj7<hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj;ubj)}(hdevh]hdev}(hjD<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj;ubah}(h]h ]h"]h$]h&]jjuh1j~ hjo;hhhj;hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjk;hhhj;hKubah}(h]jf;ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj;hKhjh;hhubj0)}(hhh]h)}(hiRemove sysfs entries for mci structure associated with **dev** and remove mci structure from global list.h](h7Remove sysfs entries for mci structure associated with }(hjn<hhhNhNubjk)}(h**dev**h]hdev}(hjv<hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjn<ubh+ and remove mci structure from global list.}(hjn<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjk<hhubah}(h]h ]h"]h$]h&]uh1j/hjh;hhhj;hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj<jRj<jSjTjUuh1jhhhj^hNhNubjW)}(h**Parameters** ``struct device *dev`` Pointer to struct :c:type:`device` representing mci structure to remove. **Return** pointer to removed mci structure, or ``NULL`` if device not found.h](h)}(h**Parameters**h]jk)}(hj<h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj<ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj<ubju)}(hhh]jz)}(h```struct device *dev`` Pointer to struct :c:type:`device` representing mci structure to remove. h](j)}(h``struct device *dev``h]j|)}(hj<h]hstruct device *dev}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj<ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj<ubj)}(hhh]h)}(hHPointer to struct :c:type:`device` representing mci structure to remove.h](hPointer to struct }(hj<hhhNhNubh)}(h:c:type:`device`h]j|)}(hj<h]hdevice}(hj<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jdeviceuh1hhj<hKhj<ubh& representing mci structure to remove.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hKhj<ubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jyhj<hKhj<ubah}(h]h ]h"]h$]h&]uh1jthj<ubh)}(h **Return**h]jk)}(hj=h]hReturn}(hj!=hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj=ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj<ubh)}(hBpointer to removed mci structure, or ``NULL`` if device not found.h](h%pointer to removed mci structure, or }(hj5=hhhNhNubj|)}(h``NULL``h]hNULL}(hj==hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj5=ubh if device not found.}(hj5=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j'edac_mc_find_csrow_by_page (C function)c.edac_mc_find_csrow_by_pagehNtauh1jhj^hhhNhNubj)}(hhh](j)}(hMint edac_mc_find_csrow_by_page (struct mem_ctl_info *mci, unsigned long page)h]j)}(hLint edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)h](j )}(hinth]hint}(hjv=hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjr=hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr=hhhj=hKubj)}(hedac_mc_find_csrow_by_pageh]j)}(hedac_mc_find_csrow_by_pageh]hedac_mc_find_csrow_by_page}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj=ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjr=hhhj=hKubj )}(h.(struct mem_ctl_info *mci, unsigned long page)h](j )}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj=modnameN classnameNj: j= )}j@ ]jC )}j6 j=sbc.edac_mc_find_csrow_by_pageasbuh1hhj=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubjX )}(hj|h]h*}(hj=hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj=ubj)}(hmcih]hmci}(hj >hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj=ubj )}(hunsigned long pageh](j )}(hunsignedh]hunsigned}(hj%>hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj!>ubj)}(h h]h }(hj3>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!>ubj )}(hlongh]hlong}(hjA>hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj!>ubj)}(h h]h }(hjO>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!>ubj)}(hpageh]hpage}(hj]>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj!>ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj=ubeh}(h]h ]h"]h$]h&]jjuh1j~ hjr=hhhj=hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjn=hhhj=hKubah}(h]ji=ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj=hKhjk=hhubj0)}(hhh]h)}(h@Ancillary routine to identify what csrow contains a memory page.h]h@Ancillary routine to identify what csrow contains a memory page.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>hhubah}(h]h ]h"]h$]h&]uh1j/hjk=hhhj=hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj>jRj>jSjTjUuh1jhhhj^hNhNubjW)}(h**Parameters** ``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structure ``unsigned long page`` memory page to find **Return** on success, returns the csrow. -1 if not found.h](h)}(h**Parameters**h]jk)}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj>ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubju)}(hhh](jz)}(hH``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structure h](j)}(h``struct mem_ctl_info *mci``h]j|)}(hj>h]hstruct mem_ctl_info *mci}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj>ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubj)}(hhh]h)}(h*pointer to a struct mem_ctl_info structureh]h*pointer to a struct mem_ctl_info structure}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj>ubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jyhj>hKhj>ubjz)}(h+``unsigned long page`` memory page to find h](j)}(h``unsigned long page``h]j|)}(hj?h]hunsigned long page}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj>ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubj)}(hhh]h)}(hmemory page to findh]hmemory page to find}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj?ubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jyhj?hKhj>ubeh}(h]h ]h"]h$]h&]uh1jthj>ubh)}(h **Return**h]jk)}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj:?ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubh)}(h/on success, returns the csrow. -1 if not found.h]h/on success, returns the csrow. -1 if not found.}(hjR?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j%edac_raw_mc_handle_error (C function)c.edac_raw_mc_handle_errorhNtauh1jhj^hhhNhNubj)}(hhh](j)}(h=void edac_raw_mc_handle_error (struct edac_raw_error_desc *e)h]j)}(h@hhubah}(h]h ]h"]h$]h&]uh1j/hjv?hhhj?hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjY@jRjY@jSjTjUuh1jhhhj^hNhNubjW)}(hX**Parameters** ``struct edac_raw_error_desc *e`` error description **Description** This raw function is used internally by edac_mc_handle_error(). It should only be called directly when the hardware error come directly from BIOS, like in the case of APEI GHES driver.h](h)}(h**Parameters**h]jk)}(hjc@h]h Parameters}(hje@hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhja@ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj]@ubju)}(hhh]jz)}(h4``struct edac_raw_error_desc *e`` error description h](j)}(h!``struct edac_raw_error_desc *e``h]j|)}(hj@h]hstruct edac_raw_error_desc *e}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj@ubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj|@ubj)}(hhh]h)}(herror descriptionh]herror description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhj@ubah}(h]h ]h"]h$]h&]uh1jhj|@ubeh}(h]h ]h"]h$]h&]uh1jyhj@hKhjy@ubah}(h]h ]h"]h$]h&]uh1jthj]@ubh)}(h**Description**h]jk)}(hj@h]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj@ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj]@ubh)}(hThis raw function is used internally by edac_mc_handle_error(). It should only be called directly when the hardware error come directly from BIOS, like in the case of APEI GHES driver.h]hThis raw function is used internally by edac_mc_handle_error(). It should only be called directly when the hardware error come directly from BIOS, like in the case of APEI GHES driver.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj]@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!edac_mc_handle_error (C function)c.edac_mc_handle_errorhNtauh1jhj^hhhNhNubj)}(hhh](j)}(hXDvoid edac_mc_handle_error (const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const u16 error_count, const unsigned long page_frame_number, const unsigned long offset_in_page, const unsigned long syndrome, const int top_layer, const int mid_layer, const int low_layer, const char *msg, const char *other_detail)h]j)}(hXCvoid edac_mc_handle_error(const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const u16 error_count, const unsigned long page_frame_number, const unsigned long offset_in_page, const unsigned long syndrome, const int top_layer, const int mid_layer, const int low_layer, const char *msg, const char *other_detail)h](j )}(hvoidh]hvoid}(hjAhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj@hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhjAhKubj)}(hedac_mc_handle_errorh]j)}(hedac_mc_handle_errorh]hedac_mc_handle_error}(hj#AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjAubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@hhhjAhKubj )}(hX*(const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const u16 error_count, const unsigned long page_frame_number, const unsigned long offset_in_page, const unsigned long syndrome, const int top_layer, const int mid_layer, const int low_layer, const char *msg, const char *other_detail)h](j )}(h$const enum hw_event_mc_err_type typeh](j)}(hj3h]hconst}(hj?AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;Aubj)}(h h]h }(hjLAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;Aubj)}(hjh]henum}(hjZAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;Aubj)}(h h]h }(hjgAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;Aubh)}(hhh]j)}(hhw_event_mc_err_typeh]hhw_event_mc_err_type}(hjxAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjuAubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjzAmodnameN classnameNj: j= )}j@ ]jC )}j6 j%Asbc.edac_mc_handle_errorasbuh1hhj;Aubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;Aubj)}(htypeh]htype}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj;Aubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj7Aubj )}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjAmodnameN classnameNj: j= )}j@ ]jAc.edac_mc_handle_errorasbuh1hhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubjX )}(hj|h]h*}(hj BhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjAubj)}(hmcih]hmci}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj7Aubj )}(hconst u16 error_counth](j)}(hj3h]hconst}(hj/BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+Bubj)}(h h]h }(hjEhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjEubj)}(h h]h }(hjLEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubjX )}(hj|h]h*}(hjZEhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjEubj)}(h other_detailh]h other_detail}(hjgEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj7Aubeh}(h]h ]h"]h$]h&]jjuh1j~ hj@hhhjAhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj@hhhjAhKubah}(h]j@ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjAhKhj@hhubj0)}(hhh]h)}(h$Reports a memory event to userspace.h]h$Reports a memory event to userspace.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjEhhubah}(h]h ]h"]h$]h&]uh1j/hj@hhhjAhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjEjRjEjSjTjUuh1jhhhj^hNhNubjW)}(hX.**Parameters** ``const enum hw_event_mc_err_type type`` severity of the error (CE/UE/Fatal) ``struct mem_ctl_info *mci`` a struct mem_ctl_info pointer ``const u16 error_count`` Number of errors of the same type ``const unsigned long page_frame_number`` mem page where the error occurred ``const unsigned long offset_in_page`` offset of the error inside the page ``const unsigned long syndrome`` ECC syndrome ``const int top_layer`` Memory layer[0] position ``const int mid_layer`` Memory layer[1] position ``const int low_layer`` Memory layer[2] position ``const char *msg`` Message meaningful to the end users that explains the event ``const char *other_detail`` Technical details about the event that may help hardware manufacturers and EDAC developers to analyse the eventh](h)}(h**Parameters**h]jk)}(hjEh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjEubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjEubju)}(hhh](jz)}(hM``const enum hw_event_mc_err_type type`` severity of the error (CE/UE/Fatal) h](j)}(h(``const enum hw_event_mc_err_type type``h]j|)}(hjEh]h$const enum hw_event_mc_err_type type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjEubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjEubj)}(hhh]h)}(h#severity of the error (CE/UE/Fatal)h]h#severity of the error (CE/UE/Fatal)}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jyhjEhKhjEubjz)}(h;``struct mem_ctl_info *mci`` a struct mem_ctl_info pointer h](j)}(h``struct mem_ctl_info *mci``h]j|)}(hj Fh]hstruct mem_ctl_info *mci}(hj FhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj Fubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(ha struct mem_ctl_info pointerh]ha struct mem_ctl_info pointer}(hj$FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj FhKhj!Fubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jyhj FhKhjEubjz)}(h<``const u16 error_count`` Number of errors of the same type h](j)}(h``const u16 error_count``h]j|)}(hjDFh]hconst u16 error_count}(hjFFhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjBFubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj>Fubj)}(hhh]h)}(h!Number of errors of the same typeh]h!Number of errors of the same type}(hj]FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYFhKhjZFubah}(h]h ]h"]h$]h&]uh1jhj>Fubeh}(h]h ]h"]h$]h&]uh1jyhjYFhKhjEubjz)}(hL``const unsigned long page_frame_number`` mem page where the error occurred h](j)}(h)``const unsigned long page_frame_number``h]j|)}(hj}Fh]h%const unsigned long page_frame_number}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj{Fubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjwFubj)}(hhh]h)}(h!mem page where the error occurredh]h!mem page where the error occurred}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKhjFubah}(h]h ]h"]h$]h&]uh1jhjwFubeh}(h]h ]h"]h$]h&]uh1jyhjFhKhjEubjz)}(hK``const unsigned long offset_in_page`` offset of the error inside the page h](j)}(h&``const unsigned long offset_in_page``h]j|)}(hjFh]h"const unsigned long offset_in_page}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjFubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(h#offset of the error inside the pageh]h#offset of the error inside the page}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKhjFubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jyhjFhKhjEubjz)}(h.``const unsigned long syndrome`` ECC syndrome h](j)}(h ``const unsigned long syndrome``h]j|)}(hjFh]hconst unsigned long syndrome}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjFubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjFubj)}(hhh]h)}(h ECC syndromeh]h ECC syndrome}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKhjGubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jyhjGhKhjEubjz)}(h1``const int top_layer`` Memory layer[0] position h](j)}(h``const int top_layer``h]j|)}(hj(Gh]hconst int top_layer}(hj*GhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj&Gubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj"Gubj)}(hhh]h)}(hMemory layer[0] positionh]hMemory layer[0] position}(hjAGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=GhKhj>Gubah}(h]h ]h"]h$]h&]uh1jhj"Gubeh}(h]h ]h"]h$]h&]uh1jyhj=GhKhjEubjz)}(h1``const int mid_layer`` Memory layer[1] position h](j)}(h``const int mid_layer``h]j|)}(hjaGh]hconst int mid_layer}(hjcGhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj_Gubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj[Gubj)}(hhh]h)}(hMemory layer[1] positionh]hMemory layer[1] position}(hjzGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvGhKhjwGubah}(h]h ]h"]h$]h&]uh1jhj[Gubeh}(h]h ]h"]h$]h&]uh1jyhjvGhKhjEubjz)}(h1``const int low_layer`` Memory layer[2] position h](j)}(h``const int low_layer``h]j|)}(hjGh]hconst int low_layer}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjGubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjGubj)}(hhh]h)}(hMemory layer[2] positionh]hMemory layer[2] position}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jyhjGhKhjEubjz)}(hP``const char *msg`` Message meaningful to the end users that explains the event h](j)}(h``const char *msg``h]j|)}(hjGh]hconst char *msg}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjGubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjGubj)}(hhh]h)}(h;Message meaningful to the end users that explains the eventh]h;Message meaningful to the end users that explains the event}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jyhjGhKhjEubjz)}(h``const char *other_detail`` Technical details about the event that may help hardware manufacturers and EDAC developers to analyse the eventh](j)}(h``const char *other_detail``h]j|)}(hj Hh]hconst char *other_detail}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj Hubah}(h]h ]h"]h$]h&]uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjHubj)}(hhh]h)}(hoTechnical details about the event that may help hardware manufacturers and EDAC developers to analyse the eventh]hoTechnical details about the event that may help hardware manufacturers and EDAC developers to analyse the event}(hj&HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj#Hubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jyhj"HhKhjEubeh}(h]h ]h"]h$]h&]uh1jthjEubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhj^hhhNhNubeh}(h]memory-controllersah ]h"]memory controllersah$]h&]uh1hhhhhhhhKyubh)}(hhh](h)}(hPCI Controllersh]hPCI Controllers}(hjYHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVHhhhhhKubh)}(hThe EDAC subsystem provides a mechanism to handle PCI controllers by calling the :c:func:`edac_pci_alloc_ctl_info`. It will use the struct :c:type:`edac_pci_ctl_info` to describe the PCI controllers.h](hQThe EDAC subsystem provides a mechanism to handle PCI controllers by calling the }(hjgHhhhNhNubh)}(h!:c:func:`edac_pci_alloc_ctl_info`h]j|)}(hjqHh]hedac_pci_alloc_ctl_info()}(hjsHhhhNhNubah}(h]h ](jjc-funceh"]h$]h&]uh1j{hjoHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypefunc refexplicitrefwarnj: j2;jedac_pci_alloc_ctl_infouh1hhhhKhjgHubh. It will use the struct }(hjgHhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hjHh]hedac_pci_ctl_info}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhhhKhjgHubh! to describe the PCI controllers.}(hjgHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjVHhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$edac_pci_alloc_ctl_info (C function)c.edac_pci_alloc_ctl_infohNtauh1jhjVHhhhNhNubj)}(hhh](j)}(hcstruct edac_pci_ctl_info * edac_pci_alloc_ctl_info (unsigned int sz_pvt, const char *edac_pci_name)h]j)}(hastruct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, const char *edac_pci_name)h](j)}(hjh]hstruct}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjHhKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjHmodnameN classnameNj: j= )}j@ ]jC )}j6 edac_pci_alloc_ctl_infosbc.edac_pci_alloc_ctl_infoasbuh1hhjHhhhjHhKubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjHhKubjX )}(hj|h]h*}(hj"IhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjHhhhjHhKubj)}(hedac_pci_alloc_ctl_infoh]j)}(hjIh]hedac_pci_alloc_ctl_info}(hj3IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj/Iubah}(h]h ](jjeh"]h$]h&]jjuh1jhjHhhhjHhKubj )}(h0(unsigned int sz_pvt, const char *edac_pci_name)h](j )}(hunsigned int sz_pvth](j )}(hunsignedh]hunsigned}(hjNIhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjJIubj)}(h h]h }(hj\IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJIubj )}(hinth]hint}(hjjIhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjJIubj)}(h h]h }(hjxIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJIubj)}(hsz_pvth]hsz_pvt}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjJIubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjFIubj )}(hconst char *edac_pci_nameh](j)}(hj3h]hconst}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj )}(hcharh]hchar}(hjIhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjIubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubjX )}(hj|h]h*}(hjIhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjIubj)}(h edac_pci_nameh]h edac_pci_name}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjFIubeh}(h]h ]h"]h$]h&]jjuh1j~ hjHhhhjHhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjHhhhjHhKubah}(h]jHah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjHhKhjHhhubj0)}(hhh]h)}(h?The alloc() function for the 'edac_pci' control info structure.h]hCThe alloc() function for the ‘edac_pci’ control info structure.}(hj JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj Jhhubah}(h]h ]h"]h$]h&]uh1j/hjHhhhjHhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj%JjRj%JjSjTjUuh1jhhhjVHhNhNubjW)}(hX**Parameters** ``unsigned int sz_pvt`` size of the private info at struct :c:type:`edac_pci_ctl_info` ``const char *edac_pci_name`` name of the PCI device **Description** The chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE. **Return** a pointer to struct :c:type:`edac_pci_ctl_info` on success; ``NULL`` otherwise.h](h)}(h**Parameters**h]jk)}(hj/Jh]h Parameters}(hj1JhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj-Jubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj)Jubju)}(hhh](jz)}(hW``unsigned int sz_pvt`` size of the private info at struct :c:type:`edac_pci_ctl_info` h](j)}(h``unsigned int sz_pvt``h]j|)}(hjNJh]hunsigned int sz_pvt}(hjPJhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjLJubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjHJubj)}(hhh]h)}(h>size of the private info at struct :c:type:`edac_pci_ctl_info`h](h#size of the private info at struct }(hjgJhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hjqJh]hedac_pci_ctl_info}(hjsJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjoJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhjcJhKhjgJubeh}(h]h ]h"]h$]h&]uh1hhjcJhKhjdJubah}(h]h ]h"]h$]h&]uh1jhjHJubeh}(h]h ]h"]h$]h&]uh1jyhjcJhKhjEJubjz)}(h5``const char *edac_pci_name`` name of the PCI device h](j)}(h``const char *edac_pci_name``h]j|)}(hjJh]hconst char *edac_pci_name}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjJubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjJubj)}(hhh]h)}(hname of the PCI deviceh]hname of the PCI device}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jyhjJhKhjEJubeh}(h]h ]h"]h$]h&]uh1jthj)Jubh)}(h**Description**h]jk)}(hjJh]h Description}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjJubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj)Jubh)}(hpThe chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE.h]hpThe chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj)Jubh)}(h **Return**h]jk)}(hjKh]hReturn}(hj KhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjKubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj)Jubh)}(hOa pointer to struct :c:type:`edac_pci_ctl_info` on success; ``NULL`` otherwise.h](ha pointer to struct }(hjKhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hj(Kh]hedac_pci_ctl_info}(hj*KhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hj&Kubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjKubh on success; }(hjKhhhNhNubj|)}(h``NULL``h]hNULL}(hjJKhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjKubh otherwise.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEKhKhj)Jubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_pci_free_ctl_info (C function)c.edac_pci_free_ctl_infohNtauh1jhjVHhhhNhNubj)}(hhh](j)}(h;void edac_pci_free_ctl_info (struct edac_pci_ctl_info *pci)h]j)}(h:void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)h](j )}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj~KhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~KhhhjKhKubj)}(hedac_pci_free_ctl_infoh]j)}(hedac_pci_free_ctl_infoh]hedac_pci_free_ctl_info}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjKubah}(h]h ](jjeh"]h$]h&]jjuh1jhj~KhhhjKhKubj )}(h(struct edac_pci_ctl_info *pci)h]j )}(hstruct edac_pci_ctl_info *pcih](j)}(hjh]hstruct}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjKmodnameN classnameNj: j= )}j@ ]jC )}j6 jKsbc.edac_pci_free_ctl_infoasbuh1hhjKubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubjX )}(hj|h]h*}(hj LhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjKubj)}(hpcih]hpci}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjKubah}(h]h ]h"]h$]h&]jjuh1j~ hj~KhhhjKhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjzKhhhjKhKubah}(h]juKah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjKhKhjwKhhubj0)}(hhh]h)}(h)Last action on the pci control structure.h]h)Last action on the pci control structure.}(hjBLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj?Lhhubah}(h]h ]h"]h$]h&]uh1j/hjwKhhhjKhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjZLjRjZLjSjTjUuh1jhhhjVHhNhNubjW)}(hX1**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** Calls the remove sysfs information, which will unregister this control struct's kobj. When that kobj's ref count goes to zero, its release function will be call and then kfree() the memory.h](h)}(h**Parameters**h]jk)}(hjdLh]h Parameters}(hjfLhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjbLubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj^Lubju)}(hhh]jz)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](j)}(h!``struct edac_pci_ctl_info *pci``h]j|)}(hjLh]hstruct edac_pci_ctl_info *pci}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjLubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj}Lubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hjLhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hjLh]hedac_pci_ctl_info}(hjLhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjLubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhjLhKhjLubeh}(h]h ]h"]h$]h&]uh1hhjLhKhjLubah}(h]h ]h"]h$]h&]uh1jhj}Lubeh}(h]h ]h"]h$]h&]uh1jyhjLhKhjzLubah}(h]h ]h"]h$]h&]uh1jthj^Lubh)}(h**Description**h]jk)}(hjLh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjLubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj^Lubh)}(hCalls the remove sysfs information, which will unregister this control struct's kobj. When that kobj's ref count goes to zero, its release function will be call and then kfree() the memory.h]hCalls the remove sysfs information, which will unregister this control struct’s kobj. When that kobj’s ref count goes to zero, its release function will be call and then kfree() the memory.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj^Lubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!edac_pci_alloc_index (C function)c.edac_pci_alloc_indexhNtauh1jhjVHhhhNhNubj)}(hhh](j)}(hint edac_pci_alloc_index (void)h]j)}(hint edac_pci_alloc_index(void)h](j )}(hinth]hint}(hj"MhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjMhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hj1MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMhhhj0MhKubj)}(hedac_pci_alloc_indexh]j)}(hedac_pci_alloc_indexh]hedac_pci_alloc_index}(hjCMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj?Mubah}(h]h ](jjeh"]h$]h&]jjuh1jhjMhhhj0MhKubj )}(h(void)h]j )}(hvoidh]j )}(hvoidh]hvoid}(hj_MhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj[Mubah}(h]h ]h"]h$]h&]noemphjjuh1j hjWMubah}(h]h ]h"]h$]h&]jjuh1j~ hjMhhhj0MhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjMhhhj0MhKubah}(h]jMah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj0MhKhjMhhubj0)}(hhh]h)}(h"Allocate a unique PCI index numberh]h"Allocate a unique PCI index number}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMhhubah}(h]h ]h"]h$]h&]uh1j/hjMhhhj0MhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjMjRjMjSjTjUuh1jhhhjVHhNhNubjW)}(hK**Parameters** ``void`` no arguments **Return** allocated index numberh](h)}(h**Parameters**h]jk)}(hjMh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjMubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMubju)}(hhh]jz)}(h``void`` no arguments h](j)}(h``void``h]j|)}(hjMh]hvoid}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjMubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMubj)}(hhh]h)}(h no argumentsh]h no arguments}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKhjMubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jyhjMhKhjMubah}(h]h ]h"]h$]h&]uh1jthjMubh)}(h **Return**h]jk)}(hjNh]hReturn}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMubh)}(hallocated index numberh]hallocated index number}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j edac_pci_add_device (C function)c.edac_pci_add_devicehNtauh1jhjVHhhhNhNubj)}(hhh](j)}(hEint edac_pci_add_device (struct edac_pci_ctl_info *pci, int edac_idx)h]j)}(hDint edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)h](j )}(hinth]hint}(hjJNhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjFNhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjYNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFNhhhjXNhKubj)}(hedac_pci_add_deviceh]j)}(hedac_pci_add_deviceh]hedac_pci_add_device}(hjkNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjgNubah}(h]h ](jjeh"]h$]h&]jjuh1jhjFNhhhjXNhKubj )}(h-(struct edac_pci_ctl_info *pci, int edac_idx)h](j )}(hstruct edac_pci_ctl_info *pcih](j)}(hjh]hstruct}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjNubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjNmodnameN classnameNj: j= )}j@ ]jC )}j6 jmNsbc.edac_pci_add_deviceasbuh1hhjNubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubjX )}(hj|h]h*}(hjNhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjNubj)}(hpcih]hpci}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjNubj )}(h int edac_idxh](j )}(hinth]hint}(hjNhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjNubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(hedac_idxh]hedac_idx}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjNubeh}(h]h ]h"]h$]h&]jjuh1j~ hjFNhhhjXNhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjBNhhhjXNhKubah}(h]j=Nah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjXNhKhj?Nhhubj0)}(hhh]h)}(hzInsert the 'edac_dev' structure into the edac_pci global list and create sysfs entries associated with edac_pci structure.h]h~Insert the ‘edac_dev’ structure into the edac_pci global list and create sysfs entries associated with edac_pci structure.}(hj?OhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjQjRj>QjSjTjUuh1jhhhjVHhNhNubjW)}(hXI**Parameters** ``struct device *dev`` Pointer to 'struct device' representing edac_pci structure to remove **Description** Remove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global list **Return** Pointer to removed edac_pci structure, or ``NULL`` if device not foundh](h)}(h**Parameters**h]jk)}(hjHQh]h Parameters}(hjJQhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjFQubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBQubju)}(hhh]jz)}(h\``struct device *dev`` Pointer to 'struct device' representing edac_pci structure to remove h](j)}(h``struct device *dev``h]j|)}(hjgQh]hstruct device *dev}(hjiQhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjeQubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjaQubj)}(hhh]h)}(hDPointer to 'struct device' representing edac_pci structure to removeh]hHPointer to ‘struct device’ representing edac_pci structure to remove}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj}Qubah}(h]h ]h"]h$]h&]uh1jhjaQubeh}(h]h ]h"]h$]h&]uh1jyhj|QhKhj^Qubah}(h]h ]h"]h$]h&]uh1jthjBQubh)}(h**Description**h]jk)}(hjQh]h Description}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjQubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBQubh block_quote)}(hjRemove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global list h]h)}(hiRemove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global listh]hiRemove sysfs entries for specified edac_pci structure and then remove edac_pci structure from global list}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjQubah}(h]h ]h"]h$]h&]uh1jQhjQhKhjBQubh)}(h **Return**h]jk)}(hjQh]hReturn}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjQubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBQubh)}(hFPointer to removed edac_pci structure, or ``NULL`` if device not foundh](h*Pointer to removed edac_pci structure, or }(hjQhhhNhNubj|)}(h``NULL``h]hNULL}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjQubh if device not found}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBQubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(edac_pci_create_generic_ctl (C function)c.edac_pci_create_generic_ctlhNtauh1jhjVHhhhNhNubj)}(hhh](j)}(hastruct edac_pci_ctl_info * edac_pci_create_generic_ctl (struct device *dev, const char *mod_name)h]j)}(h_struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev, const char *mod_name)h](j)}(hjh]hstruct}(hj-RhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)RhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hj;RhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)Rhhhj:RhKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjLRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjIRubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjNRmodnameN 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char *mod_nameh](j)}(hj3h]hconst}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hj$ShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj )}(hcharh]hchar}(hj2ShhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjSubj)}(h h]h }(hj@ShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubjX )}(hj|h]h*}(hjNShhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjSubj)}(hmod_nameh]hmod_name}(hj[ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjRubeh}(h]h ]h"]h$]h&]jjuh1j~ hj)Rhhhj:RhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj%Rhhhj:RhKubah}(h]j Rah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj:RhKhj"Rhhubj0)}(hhh]h}(h]h ]h"]h$]h&]uh1j/hj"Rhhhj:RhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjSjRjSjSjTjUuh1jhhhjVHhNhNubjW)}(hX**Parameters** ``struct device *dev`` pointer to struct :c:type:`device`; ``const char *mod_name`` name of the PCI device **Description** A generic constructor for a PCI parity polling device Some systems have more than one domain of PCI busses. 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This routine calls the edac_pci_alloc_ctl_info() for the generic device, with default values **Return** Pointer to struct :c:type:`edac_pci_ctl_info` on success, ``NULL`` on failure.h](h)}(h**Parameters**h]jk)}(hjSh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjSubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubju)}(hhh](jz)}(h;``struct device *dev`` pointer to struct :c:type:`device`; h](j)}(h``struct device *dev``h]j|)}(hjSh]hstruct device *dev}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjSubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubj)}(hhh]h)}(h#pointer to struct :c:type:`device`;h](hpointer to struct }(hjShhhNhNubh)}(h:c:type:`device`h]j|)}(hjSh]hdevice}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjSubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jdeviceuh1hhjShKhjSubh;}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShKhjSubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jyhjShKhjSubjz)}(h0``const char *mod_name`` name of the PCI device h](j)}(h``const char *mod_name``h]j|)}(hjTh]hconst char *mod_name}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjTubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj Tubj)}(hhh]h)}(hname of the PCI deviceh]hname of the PCI device}(hj,ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(ThKhj)Tubah}(h]h ]h"]h$]h&]uh1jhj Tubeh}(h]h ]h"]h$]h&]uh1jyhj(ThKhjSubeh}(h]h ]h"]h$]h&]uh1jthjSubh)}(h**Description**h]jk)}(hjNTh]h Description}(hjPThhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjLTubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubjQ)}(hA generic constructor for a PCI parity polling device Some systems have more than one domain of PCI busses. For systems with one domain, then this API will provide for a generic poller. h]h)}(hA generic constructor for a PCI parity polling device Some systems have more than one domain of PCI busses. For systems with one domain, then this API will provide for a generic poller.h]hA generic constructor for a PCI parity polling device Some systems have more than one domain of PCI busses. For systems with one domain, then this API will provide for a generic poller.}(hjhThhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjdTubah}(h]h ]h"]h$]h&]uh1jQhjvThKhjSubh)}(h\This routine calls the edac_pci_alloc_ctl_info() for the generic device, with default valuesh]h\This routine calls the edac_pci_alloc_ctl_info() for the generic device, with default values}(hj}ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubh)}(h **Return**h]jk)}(hjTh]hReturn}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjTubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjSubh)}(hNPointer to struct :c:type:`edac_pci_ctl_info` on success, ``NULL`` on failure.h](hPointer to struct }(hjThhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hjTh]hedac_pci_ctl_info}(hjThhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjTubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjTubh on success, }(hjThhhNhNubj|)}(h``NULL``h]hNULL}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjTubh on failure.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjThKhjSubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j)edac_pci_release_generic_ctl (C function)c.edac_pci_release_generic_ctlhNtauh1jhjVHhhhNhNubj)}(hhh](j)}(hAvoid edac_pci_release_generic_ctl (struct edac_pci_ctl_info *pci)h]j)}(h@void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)h](j )}(hvoidh]hvoid}(hjUhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjUhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhjUhKubj)}(hedac_pci_release_generic_ctlh]j)}(hedac_pci_release_generic_ctlh]hedac_pci_release_generic_ctl}(hj)UhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj%Uubah}(h]h ](jjeh"]h$]h&]jjuh1jhjUhhhjUhKubj )}(h(struct edac_pci_ctl_info *pci)h]j )}(hstruct edac_pci_ctl_info *pcih](j)}(hjh]hstruct}(hjEUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAUubj)}(h h]h }(hjRUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAUubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hjcUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj`Uubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjeUmodnameN classnameNj: j= )}j@ ]jC )}j6 j+Usbc.edac_pci_release_generic_ctlasbuh1hhjAUubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAUubjX )}(hj|h]h*}(hjUhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjAUubj)}(hpcih]hpci}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjAUubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj=Uubah}(h]h ]h"]h$]h&]jjuh1j~ hjUhhhjUhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjUhhhjUhKubah}(h]jTah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjUhKhjThhubj0)}(hhh]h}(h]h ]h"]h$]h&]uh1j/hjThhhjUhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjUjRjUjSjTjUuh1jhhhjVHhNhNubjW)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** The release function of a generic EDAC PCI polling deviceh](h)}(h**Parameters**h]jk)}(hjUh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjUubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjUubju)}(hhh]jz)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](j)}(h!``struct edac_pci_ctl_info *pci``h]j|)}(hjUh]hstruct edac_pci_ctl_info *pci}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjUubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjUubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hjVhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hjVh]hedac_pci_ctl_info}(hjVhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhjVhKhjVubeh}(h]h ]h"]h$]h&]uh1hhjVhKhjVubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jyhjVhKhjUubah}(h]h ]h"]h$]h&]uh1jthjUubh)}(h**Description**h]jk)}(hjTVh]h Description}(hjVVhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjRVubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjUubjQ)}(h9The release function of a generic EDAC PCI polling deviceh]h)}(hjlVh]h9The release function of a generic EDAC PCI polling device}(hjnVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjjVubah}(h]h ]h"]h$]h&]uh1jQhj{VhKhjUubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_pci_create_sysfs (C function)c.edac_pci_create_sysfshNtauh1jhjVHhhhNhNubj)}(hhh](j)}(h9int edac_pci_create_sysfs (struct edac_pci_ctl_info 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]j ah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjVubah}(h]h ]h"]h$]h&]jjuh1j~ hjVhhhjVhKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjVhhhjVhKubah}(h]jVah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjVhKhjVhhubj0)}(hhh]h}(h]h ]h"]h$]h&]uh1j/hjVhhhjVhKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjkWjRjkWjSjTjUuh1jhhhjVHhNhNubjW)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** Create the controls/attributes for the specified EDAC PCI deviceh](h)}(h**Parameters**h]jk)}(hjuWh]h Parameters}(hjwWhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjsWubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjoWubju)}(hhh]jz)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](j)}(h!``struct edac_pci_ctl_info *pci``h]j|)}(hjWh]hstruct edac_pci_ctl_info *pci}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjWubah}(h]h ]h"]h$]h&]uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjWubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hjWhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]j|)}(hjWh]hedac_pci_ctl_info}(hjWhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjWubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_pci_ctl_infouh1hhjWhKhjWubeh}(h]h ]h"]h$]h&]uh1hhjWhKhjWubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jyhjWhKhjWubah}(h]h ]h"]h$]h&]uh1jthjoWubh)}(h**Description**h]jk)}(hjWh]h Description}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjWubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjoWubjQ)}(h@Create the controls/attributes for the specified EDAC PCI deviceh]h)}(hjXh]h@Create the controls/attributes for the specified EDAC PCI device}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjXubah}(h]h ]h"]h$]h&]uh1jQhjXhKhjoWubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjVHhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_pci_remove_sysfs (C function)c.edac_pci_remove_sysfshNtauh1jhjVHhhhNhNubj)}(hhh](j)}(h:void edac_pci_remove_sysfs (struct edac_pci_ctl_info *pci)h]j)}(h9void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)h](j )}(hvoidh]hvoid}(hj mc/ cpu/cpu0/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count cpu/cpu1/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count ... the L1 and L2 directories would be "edac_device_block's"h]hX/sys/devices/system/edac/.. pci/ mc/ cpu/cpu0/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count cpu/cpu1/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count ... the L1 and L2 directories would be "edac_device_block's"}hj`[sbah}(h]h ]h"]h$]h&]jjuh1jDhhhKhjYhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_device_add_device (C function)c.edac_device_add_devicehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hBint edac_device_add_device (struct edac_device_ctl_info *edac_dev)h]j)}(hAint edac_device_add_device(struct edac_device_ctl_info *edac_dev)h](j )}(hinth]hint}(hj[hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj[hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhj[hKubj)}(hedac_device_add_deviceh]j)}(hedac_device_add_deviceh]hedac_device_add_device}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj[ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj[hhhj[hKubj )}(h'(struct edac_device_ctl_info *edac_dev)h]j )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj[modnameN classnameNj: j= )}j@ ]jC )}j6 j[sbc.edac_device_add_deviceasbuh1hhj[ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubjX )}(hj|h]h*}(hj\hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj[ubj)}(hedac_devh]hedac_dev}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj[ubah}(h]h ]h"]h$]h&]jjuh1j~ hj[hhhj[hKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj[hhhj[hKubah}(h]jz[ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj[hKhj|[hhubj0)}(hhh]h)}(hInsert the 'edac_dev' structure into the edac_device global list and create sysfs entries associated with edac_device structure.h]hInsert the ‘edac_dev’ structure into the edac_device global list and create sysfs entries associated with edac_device structure.}(hjG\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjD\hhubah}(h]h ]h"]h$]h&]uh1j/hj|[hhhj[hKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj_\jRj_\jSjTjUuh1jhhhjYhNhNubjW)}(h**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to edac_device structure to be added to the list 'edac_device' structure. **Return** 0 on Success, or an error code on failureh](h)}(h**Parameters**h]jk)}(hji\h]h Parameters}(hjk\hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjg\ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjc\ubju)}(hhh]jz)}(h|``struct edac_device_ctl_info *edac_dev`` pointer to edac_device structure to be added to the list 'edac_device' structure. h](j)}(h)``struct edac_device_ctl_info *edac_dev``h]j|)}(hj\h]h%struct edac_device_ctl_info *edac_dev}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj\ubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhj\ubj)}(hhh]h)}(hQpointer to edac_device structure to be added to the list 'edac_device' structure.h]hUpointer to edac_device structure to be added to the list ‘edac_device’ structure.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhj\ubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jyhj\hKhj\ubah}(h]h ]h"]h$]h&]uh1jthjc\ubh)}(h **Return**h]jk)}(hj\h]hReturn}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj\ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjc\ubh)}(h)0 on Success, or an error code on failureh]h)0 on Success, or an error code on failure}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjc\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_device_del_device (C function)c.edac_device_del_devicehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hIstruct edac_device_ctl_info * edac_device_del_device (struct device *dev)h]j)}(hGstruct edac_device_ctl_info *edac_device_del_device(struct device *dev)h](j)}(hjh]hstruct}(hj ]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhhj]hMubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hj(]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj%]ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj*]modnameN classnameNj: j= )}j@ ]jC )}j6 edac_device_del_devicesbc.edac_device_del_deviceasbuh1hhj]hhhj]hMubj)}(h h]h }(hjI]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhhj]hMubjX )}(hj|h]h*}(hjW]hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj]hhhj]hMubj)}(hedac_device_del_deviceh]j)}(hjF]h]hedac_device_del_device}(hjh]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjd]ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj]hhhj]hMubj )}(h(struct device *dev)h]j )}(hstruct device *devh](j)}(hjh]hstruct}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubh)}(hhh]j)}(hdeviceh]hdevice}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj]modnameN classnameNj: j= )}j@ ]jD]c.edac_device_del_deviceasbuh1hhj]ubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubjX )}(hj|h]h*}(hj]hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj]ubj)}(hdevh]hdev}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj{]ubah}(h]h ]h"]h$]h&]jjuh1j~ hj]hhhj]hMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj]hhhj]hMubah}(h]j\ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj]hMhj\hhubj0)}(hhh]h)}(hoRemove sysfs entries for specified edac_device structure and then remove edac_device structure from global listh]hoRemove sysfs entries for specified edac_device structure and then remove edac_device structure from global list}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj^hhubah}(h]h ]h"]h$]h&]uh1j/hj\hhhj]hMubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj^jRj^jSjTjUuh1jhhhjYhNhNubjW)}(h**Parameters** ``struct device *dev`` Pointer to struct :c:type:`device` representing the edac device structure to remove. **Return** Pointer to removed edac_device structure, or ``NULL`` if device not found.h](h)}(h**Parameters**h]jk)}(hj&^h]h Parameters}(hj(^hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj$^ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj ^ubju)}(hhh]jz)}(hl``struct device *dev`` Pointer to struct :c:type:`device` representing the edac device structure to remove. h](j)}(h``struct device *dev``h]j|)}(hjE^h]hstruct device *dev}(hjG^hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjC^ubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj?^ubj)}(hhh]h)}(hTPointer to struct :c:type:`device` representing the edac device structure to remove.h](hPointer to struct }(hj^^hhhNhNubh)}(h:c:type:`device`h]j|)}(hjh^h]hdevice}(hjj^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjf^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jdeviceuh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj^^ubh2 representing the edac device structure to remove.}(hj^^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMhj[^ubah}(h]h ]h"]h$]h&]uh1jhj?^ubeh}(h]h ]h"]h$]h&]uh1jyhjZ^hM hj<^ubah}(h]h ]h"]h$]h&]uh1jthj ^ubh)}(h **Return**h]jk)}(hj^h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj^ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj ^ubh)}(hJPointer to removed edac_device structure, or ``NULL`` if device not found.h](h-Pointer to removed edac_device structure, or }(hj^hhhNhNubj|)}(h``NULL``h]hNULL}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj^ubh if device not found.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hj ^ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(edac_device_handle_ce_count (C function)c.edac_device_handle_ce_counthNtauh1jhjYhhhNhNubj)}(hhh](j)}(hvoid edac_device_handle_ce_count (struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h]j)}(hvoid edac_device_handle_ce_count(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hj^hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj^hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hj _hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhj _hMubj)}(hedac_device_handle_ce_counth]j)}(hedac_device_handle_ce_counth]hedac_device_handle_ce_count}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj_ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj^hhhj _hMubj )}(hg(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjh]hstruct}(hj8_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4_ubj)}(h h]h }(hjE_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4_ubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hjV_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjS_ubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjX_modnameN classnameNj: j= )}j@ ]jC )}j6 j_sbc.edac_device_handle_ce_countasbuh1hhj4_ubj)}(h h]h }(hjv_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4_ubjX )}(hj|h]h*}(hj_hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj4_ubj)}(hedac_devh]hedac_dev}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj4_ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0_ubj )}(hunsigned int counth](j )}(hunsignedh]hunsigned}(hj_hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj_ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj )}(hinth]hint}(hj_hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj_ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(hcounth]hcount}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0_ubj )}(h int inst_nrh](j )}(hinth]hint}(hj_hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj_ubj)}(h h]h }(hj `hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(hinst_nrh]hinst_nr}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0_ubj )}(h int block_nrh](j )}(hinth]hint}(hj0`hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj,`ubj)}(h h]h }(hj>`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,`ubj)}(hblock_nrh]hblock_nr}(hjL`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj,`ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0_ubj )}(hconst char *msgh](j)}(hj3h]hconst}(hje`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja`ubj)}(h h]h }(hjr`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja`ubj )}(hcharh]hchar}(hj`hhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hja`ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja`ubjX )}(hj|h]h*}(hj`hhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hja`ubj)}(hmsgh]hmsg}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhja`ubeh}(h]h ]h"]h$]h&]noemphjjuh1j hj0_ubeh}(h]h ]h"]h$]h&]jjuh1j~ hj^hhhj _hMubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hj^hhhj _hMubah}(h]j^ah ](j'j(eh"]h$]h&]j,j-)j.huh1jhj _hMhj^hhubj0)}(hhh]h)}(hLog correctable errors.h]hLog correctable errors.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj`hhubah}(h]h ]h"]h$]h&]uh1j/hj^hhhj _hMubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj`jRj`jSjTjUuh1jhhhjYhNhNubjW)}(hXV**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``unsigned int count`` Number of errors to log. ``int inst_nr`` number of the instance where the CE error happened ``int block_nr`` number of the block where the CE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]jk)}(hj`h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jjhj`ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj`ubju)}(hhh](jz)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](j)}(h)``struct edac_device_ctl_info *edac_dev``h]j|)}(hjah]h%struct edac_device_ctl_info *edac_dev}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjaubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjaubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hj-ahhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]j|)}(hj7ah]hedac_device_ctl_info}(hj9ahhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hj5aubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_device_ctl_infouh1hhj)ahMhj-aubeh}(h]h ]h"]h$]h&]uh1hhj)ahMhj*aubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jyhj)ahMhj aubjz)}(h0``unsigned int count`` Number of errors to log. h](j)}(h``unsigned int count``h]j|)}(hjlah]hunsigned int count}(hjnahhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjjaubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjfaubj)}(hhh]h)}(hNumber of errors to log.h]hNumber of errors to log.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjaubah}(h]h ]h"]h$]h&]uh1jhjfaubeh}(h]h ]h"]h$]h&]uh1jyhjahMhj aubjz)}(hC``int inst_nr`` number of the instance where the CE error happened h](j)}(h``int inst_nr``h]j|)}(hjah]h int inst_nr}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjaubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjaubj)}(hhh]h)}(h2number of the instance where the CE error happenedh]h2number of the instance where the CE error happened}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjaubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jyhjahMhj aubjz)}(hA``int block_nr`` number of the block where the CE error happened h](j)}(h``int block_nr``h]j|)}(hjah]h int block_nr}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjaubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjaubj)}(hhh]h)}(h/number of the block where the CE error happenedh]h/number of the block where the CE error happened}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjaubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jyhjahMhj aubjz)}(h)``const char *msg`` message to be printedh](j)}(h``const char *msg``h]j|)}(hjbh]hconst char *msg}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjbubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjbubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hj0bhhhϪNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj-bubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jyhj,bhMhj aubeh}(h]h ]h"]h$]h&]uh1jthj`ubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(edac_device_handle_ue_count (C function)c.edac_device_handle_ue_counthNtauh1jhjYhhhNhNubj)}(hhh](j)}(hvoid edac_device_handle_ue_count (struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h]j)}(hvoid edac_device_handle_ue_count(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hjqbhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjmbhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmbhhhjbhM ubj)}(hedac_device_handle_ue_counth]j)}(hedac_device_handle_ue_counth]hedac_device_handle_ue_count}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjbubah}(h]h ](jjeh"]h$]h&]jjuh1jhjmbhhhjbhM ubj )}(hg(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjh]hstruct}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetjbmodnameN classnameNj: j= )}j@ ]jC )}j6 jbsbc.edac_device_handle_ue_countasbuh1hhjbubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubjX )}(hj|h]h*}(hjbhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjbubj)}(hedac_devh]hedac_dev}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjbubj )}(hunsigned int counth](j )}(hunsignedh]hunsigned}(hj chhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjcubj)}(h h]h }(hj.chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj )}(hinth]hint}(hjhubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM1hj:hubj)}(hhh]h)}(h/number of the block where the CE error happenedh]h/number of the block where the CE error happened}(hjYhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhhM1hjVhubah}(h]h ]h"]h$]h&]uh1jhj:hubeh}(h]h ]h"]h$]h&]uh1jyhjUhhM1hjgubjz)}(h)``const char *msg`` message to be printedh](j)}(h``const char *msg``h]j|)}(hjyhh]hconst char *msg}(hj{hhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjwhubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM3hjshubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM2hjhubah}(h]h ]h"]h$]h&]uh1jhjshubeh}(h]h ]h"]h$]h&]uh1jyhjhhM3hjgubeh}(h]h ]h"]h$]h&]uh1jthjgubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_device_handle_ue (C function)c.edac_device_handle_uehNtauh1jhjYhhhNhNubj)}(hhh](j)}(hnvoid edac_device_handle_ue (struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h]j)}(hmvoid edac_device_handle_ue(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hjhhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjhhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM<ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhjhhM<ubj)}(hedac_device_handle_ueh]j)}(hedac_device_handle_ueh]hedac_device_handle_ue}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjhubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhhjhhM<ubj )}(hS(struct edac_device_ctl_info *edac_dev, int inst_nr, int block_nr, const char *msg)h](j )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj iubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj iubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hj.ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj+iubah}(h]h ]h"]h$]h&] refdomainjreftypej6 reftargetj0imodnameN classnameNj: j= )}j@ ]jC )}j6 jhsbc.edac_device_handle_ueasbuh1hhj iubj)}(h h]h }(hjNihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj iubjX )}(hj|h]h*}(hj\ihhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hj iubj)}(hedac_devh]hedac_dev}(hjiihhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj iubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjiubj )}(h int inst_nrh](j )}(hinth]hint}(hjihhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hj~iubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~iubj)}(hinst_nrh]hinst_nr}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj~iubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjiubj )}(h int block_nrh](j )}(hinth]hint}(hjihhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjiubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(hblock_nrh]hblock_nr}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjiubj )}(hconst char *msgh](j)}(hj3h]hconst}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj )}(hcharh]hchar}(hjjhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjiubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubjX )}(hj|h]h*}(hj#jhhhNhNubah}(h]h ]jc ah"]h$]h&]uh1jW hjiubj)}(hmsgh]hmsg}(hj0jhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1j hjiubeh}(h]h ]h"]h$]h&]jjuh1j~ hjhhhhjhhM<ubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjhhhhjhhM<ubah}(h]jhah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjhhM<hjhhhubj0)}(hhh]h)}(h Log a single uncorrectable errorh]h Log a single uncorrectable error}(hjZjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM<hjWjhhubah}(h]h ]h"]h$]h&]uh1j/hjhhhhjhhM<ubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQjrjjRjrjjSjTjUuh1jhhhjYhNhNubjW)}(hX#**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``int inst_nr`` number of the instance where the UE error happened ``int block_nr`` number of the block where the UE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]jk)}(hj|jh]h Parameters}(hj~jhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjzjubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM@hjvjubju)}(hhh](jz)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](j)}(h)``struct edac_device_ctl_info *edac_dev``h]j|)}(hjjh]h%struct edac_device_ctl_info *edac_dev}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjjubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM>hjjubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hjjhhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]j|)}(hjjh]hedac_device_ctl_info}(hjjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j{hjjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj: j2;jedac_device_ctl_infouh1hhjjhM>hjjubeh}(h]h ]h"]h$]h&]uh1hhjjhM>hjjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jyhjjhM>hjjubjz)}(hC``int inst_nr`` number of the instance where the UE error happened h](j)}(h``int inst_nr``h]j|)}(hjjh]h int inst_nr}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjjubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM?hjjubj)}(hhh]h)}(h2number of the instance where the UE error happenedh]h2number of the instance where the UE error happened}(hj khhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhM?hj kubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jyhjkhM?hjjubjz)}(hA``int block_nr`` number of the block where the UE error happened h](j)}(h``int block_nr``h]j|)}(hj,kh]h int block_nr}(hj.khhhNhNubah}(h]h ]h"]h$]h&]uh1j{hj*kubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM@hj&kubj)}(hhh]h)}(h/number of the block where the UE error happenedh]h/number of the block where the UE error happened}(hjEkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAkhM@hjBkubah}(h]h ]h"]h$]h&]uh1jhj&kubeh}(h]h ]h"]h$]h&]uh1jyhjAkhM@hjjubjz)}(h)``const char *msg`` message to be printedh](j)}(h``const char *msg``h]j|)}(hjekh]hconst char *msg}(hjgkhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjckubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMBhj_kubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hj~khhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMAhj{kubah}(h]h ]h"]h$]h&]uh1jhj_kubeh}(h]h ]h"]h$]h&]uh1jyhjzkhMBhjjubeh}(h]h ]h"]h$]h&]uh1jthjvjubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjYhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$edac_device_alloc_index (C function)c.edac_device_alloc_indexhNtauh1jhjYhhhNhNubj)}(hhh](j)}(h"int edac_device_alloc_index (void)h]j)}(h!int edac_device_alloc_index(void)h](j )}(hinth]hint}(hjkhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjkhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMKubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhhjkhMKubj)}(hedac_device_alloc_indexh]j)}(hedac_device_alloc_indexh]hedac_device_alloc_index}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhjkubah}(h]h ](jjeh"]h$]h&]jjuh1jhjkhhhjkhMKubj )}(h(void)h]j )}(hvoidh]j )}(hvoidh]hvoid}(hjkhhhNhNubah}(h]h ]j!ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]noemphjjuh1j hjkubah}(h]h ]h"]h$]h&]jjuh1j~ hjkhhhjkhMKubeh}(h]h ]h"]h$]h&]jjj!uh1jj"j#hjkhhhjkhMKubah}(h]jkah ](j'j(eh"]h$]h&]j,j-)j.huh1jhjkhMKhjkhhubj0)}(hhh]h)}(h%Allocate a unique device index numberh]h%Allocate a unique device index number}(hj&lhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMKhj#lhhubah}(h]h ]h"]h$]h&]uh1j/hjkhhhjkhMKubeh}(h]h ](jfunctioneh"]h$]h&]jPjjQj>ljRj>ljSjTjUuh1jhhhjYhNhNubjW)}(hK**Parameters** ``void`` no arguments **Return** allocated index numberh](h)}(h**Parameters**h]jk)}(hjHlh]h Parameters}(hjJlhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjFlubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMOhjBlubju)}(hhh]jz)}(h``void`` no arguments h](j)}(h``void``h]j|)}(hjglh]hvoid}(hjilhhhNhNubah}(h]h ]h"]h$]h&]uh1j{hjelubah}(h]h ]h"]h$]h&]uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjalubj)}(hhh]h)}(h no argumentsh]h no arguments}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|lhKhj}lubah}(h]h ]h"]h$]h&]uh1jhjalubeh}(h]h ]h"]h$]h&]uh1jyhj|lhKhj^lubah}(h]h ]h"]h$]h&]uh1jthjBlubh)}(h **Return**h]jk)}(hjlh]hReturn}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jjhjlubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjBlubh)}(hallocated index numberh]hallocated index number}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMMhjBlubeh}(h]h ] kernelindentah"]h$]h&]uh1jVhjYhhhNhNubeh}(h] edac-blocksah ]h"] edac blocksah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHeterogeneous system supporth]hHeterogeneous system support}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhhhhhKubh)}(hAn AMD heterogeneous system is built by connecting the data fabrics of both CPUs and GPUs via custom xGMI links. Thus, the data fabric on the GPU nodes can be accessed the same way as the data fabric on CPU nodes.h]hAn AMD heterogeneous system is built by connecting the data fabrics of both CPUs and GPUs via custom xGMI links. Thus, the data fabric on the GPU nodes can be accessed the same way as the data fabric on CPU nodes.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubh)}(hX?The MI200 accelerators are data center GPUs. They have 2 data fabrics, and each GPU data fabric contains four Unified Memory Controllers (UMC). Each UMC contains eight channels. Each UMC channel controls one 128-bit HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total of 4096-bits of DRAM data bus.h]hX?The MI200 accelerators are data center GPUs. They have 2 data fabrics, and each GPU data fabric contains four Unified Memory Controllers (UMC). Each UMC contains eight channels. Each UMC channel controls one 128-bit HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total of 4096-bits of DRAM data bus.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubh)}(hWhile the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC channel is interfacing 2GB of DRAM (represented as rank).h]hWhile the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC channel is interfacing 2GB of DRAM (represented as rank).}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubh)}(hFMemory controllers on AMD GPU nodes can be represented in EDAC thusly:h]hFMemory controllers on AMD GPU nodes can be represented in EDAC thusly:}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubjQ)}(h_GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNEL h]h)}(h^GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNELh]h^GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNEL}(hj#mhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1jQhhhKhjlhhubh)}(hgFor example: a heterogeneous system with 1 AMD CPU is connected to 4 MI200 (Aldebaran) GPUs using xGMI.h]hgFor example: a heterogeneous system with 1 AMD CPU is connected to 4 MI200 (Aldebaran) GPUs using xGMI.}(hj7mhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubh)}(h)Some more heterogeneous hardware details:h]h)Some more heterogeneous hardware details:}(hjEmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubjW)}(hhh](j\)}(hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.h]h)}(hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.h]hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.}(hjZmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjVmubah}(h]h ]h"]h$]h&]uh1j[hjSmhhhhhNubj\)}(hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.h]h)}(hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.h]hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.}(hjrmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjnmubah}(h]h ]h"]h$]h&]uh1j[hjSmhhhhhNubj\)}(hCCPU UMCs use up to 4 chip selects, So UMC chip select = EDAC CSROW.h]h)}(hjmh]hCCPU UMCs use up to 4 chip selects, So UMC chip select = EDAC CSROW.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1j[hjSmhhhhhNubj\)}(h0GPU UMCs use 1 chip select, So UMC = EDAC CSROW.h]h)}(hjmh]h0GPU UMCs use 1 chip select, So UMC = EDAC CSROW.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1j[hjSmhhhhhNubj\)}(h8GPU UMCs use 8 channels, So UMC channel = EDAC channel. h]h)}(h7GPU UMCs use 8 channels, So UMC channel = EDAC channel.h]h7GPU UMCs use 8 channels, So UMC channel = EDAC channel.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjmubah}(h]h ]h"]h$]h&]uh1j[hjSmhhhhhNubeh}(h]h ]h"]h$]h&]j{jC[uh1jVhhhKhjlhhubh)}(hThe EDAC subsystem provides a mechanism to handle AMD heterogeneous systems by calling system specific ops for both CPUs and GPUs.h]hThe EDAC subsystem provides a mechanism to handle AMD heterogeneous systems by calling system specific ops for both CPUs and GPUs.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubh)}(hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated::h]hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated:}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubjE)}(hX[$ ls /sys/devices/system/edac/mc/ mc0 - CPU MC node 0 mc1 | mc2 |- GPU card[0] => node 0(mc1), node 1(mc2) mc3 | mc4 |- GPU card[1] => node 0(mc3), node 1(mc4) mc5 | mc6 |- GPU card[2] => node 0(mc5), node 1(mc6) mc7 | mc8 |- GPU card[3] => node 0(mc7), node 1(mc8)h]hX[$ ls /sys/devices/system/edac/mc/ mc0 - CPU MC node 0 mc1 | mc2 |- GPU card[0] => node 0(mc1), node 1(mc2) mc3 | mc4 |- GPU card[1] => node 0(mc3), node 1(mc4) mc5 | mc6 |- GPU card[2] => node 0(mc5), node 1(mc6) mc7 | mc8 |- GPU card[3] => node 0(mc7), node 1(mc8)}hjmsbah}(h]h ]h"]h$]h&]jjuh1jDhhhKhjlhhubh)}(hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries::h]hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries:}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlhhubjE)}(hX/sys/devices/system/edac/mc/.. CPU # CPU node ├── mc 0 GPU Nodes are enumerated sequentially after CPU nodes have been populated GPU card 1 # Each MI200 GPU has 2 nodes/mcs ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs │   ├── csrow 0 # UMC 0 │   │   ├── channel 0 # Each UMC has 8 channels │   │   ├── channel 1 # size of each channel is 2 GB, so each UMC has 16 GB │   │   ├── channel 2 │   │   ├── channel 3 │   │   ├── channel 4 │   │   ├── channel 5 │   │   ├── channel 6 │   │   ├── channel 7 │   ├── csrow 1 # UMC 1 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── .. .. │   ├── csrow 3 # UMC 3 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── rank 0 │   ├── .. .. │   ├── rank 31 # total 32 ranks/dimms from 4 UMCs ├ ├── mc 2 # GPU node 1 == mc2 │   ├── .. # each GPU has total 64 GB GPU card 2 ├── mc 3 │   ├── .. ├── mc 4 │   ├── .. GPU card 3 ├── mc 5 │   ├── .. ├── mc 6 │   ├── .. GPU card 4 ├── mc 7 │   ├── .. ├── mc 8 │   ├── ..h]hX/sys/devices/system/edac/mc/.. CPU # CPU node ├── mc 0 GPU Nodes are enumerated sequentially after CPU nodes have been populated GPU card 1 # Each MI200 GPU has 2 nodes/mcs ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs │   ├── csrow 0 # UMC 0 │   │   ├── channel 0 # Each UMC has 8 channels │   │   ├── channel 1 # size of each channel is 2 GB, so each UMC has 16 GB │   │   ├── channel 2 │   │   ├── channel 3 │   │   ├── channel 4 │   │   ├── channel 5 │   │   ├── channel 6 │   │   ├── channel 7 │   ├── csrow 1 # UMC 1 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── .. .. │   ├── csrow 3 # UMC 3 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── rank 0 │   ├── .. .. │   ├── rank 31 # total 32 ranks/dimms from 4 UMCs ├ ├── mc 2 # GPU node 1 == mc2 │   ├── .. # each GPU has total 64 GB GPU card 2 ├── mc 3 │   ├── .. ├── mc 4 │   ├── .. GPU card 3 ├── mc 5 │   ├── .. ├── mc 6 │   ├── .. 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