sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}(hhparenthuba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget#/translations/zh_CN/driver-api/edacmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}(hhhh2ubah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/zh_TW/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}(hhhhFubah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/it_IT/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}(hhhhZubah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ja_JP/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}(hhhhnubah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ko_KR/driver-api/edacmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}(hhhhubah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/sp_SP/driver-api/edacmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h-Error Detection And Correction (EDAC) Devicesh]h-Error Detection And Correction (EDAC) Devices}(hhhhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh=/var/lib/git/docbuild/linux/Documentation/driver-api/edac.rsthKubh)}(hhh](h)}(h(Main Concepts used at the EDAC subsystemh]h(Main Concepts used at the EDAC subsystem}(hhhhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hThere are several things to be aware of that aren't at all obvious, like *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*, etc...h](hKThere are several things to be aware of that aren’t at all obvious, like }(hIThere are several things to be aware of that aren't at all obvious, like hhhhhNhNubhemphasis)}(h*sockets, *socket sets*h]hsockets, *socket sets}(hhhhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }(h, hhhhhNhNubh)}(h*banks*h]hbanks}(hhhhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }(h, hhubh)}(h*rows*h]hrows}(hhhhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }(h, hhubh)}(h*chip-select rows*h]hchip-select rows}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, }(hhhhubh)}(h *channels*h]hchannels}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhubh, etc...}(h, etc...hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hThese are some of the many terms that are thrown about that don't always mean what people think they mean (Inconceivable!). In the interest of creating a common ground for discussion, terms and their definitions will be established.h]hThese are some of the many terms that are thrown about that don’t always mean what people think they mean (Inconceivable!). In the interest of creating a common ground for discussion, terms and their definitions will be established.}(hj;hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh bullet_list)}(hhh]h list_item)}(hMemory devices h]h)}(hMemory devicesh]hMemory devices}(hjThjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjNubah}(h]h ]h"]h$]h&]uh1jLhjIhhhhhNubah}(h]h ]h"]h$]h&]bullet*uh1jGhhhKhhhhubh)}(hXThe individual DRAM chips on a memory stick. These devices commonly output 4 and 8 bits each (x4, x8). Grouping several of these in parallel provides the number of bits that the memory controller expects: typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.h]hXThe individual DRAM chips on a memory stick. These devices commonly output 4 and 8 bits each (x4, x8). Grouping several of these in parallel provides the number of bits that the memory controller expects: typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.}(hjphjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjH)}(hhh]jM)}(h Memory Stick h]h)}(h Memory Stickh]h Memory Stick}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jLhj|hhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKhhhhubh)}(hA printed circuit board that aggregates multiple memory devices in parallel. In general, this is the Field Replaceable Unit (FRU) which gets replaced, in the case of excessive errors. Most often it is also called DIMM (Dual Inline Memory Module).h]hA printed circuit board that aggregates multiple memory devices in parallel. In general, this is the Field Replaceable Unit (FRU) which gets replaced, in the case of excessive errors. Most often it is also called DIMM (Dual Inline Memory Module).}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjH)}(hhh]jM)}(hMemory Socket h]h)}(h Memory Socketh]h Memory Socket}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKhhhhubh)}(hxA physical connector on the motherboard that accepts a single memory stick. Also called as "slot" on several datasheets.h]h|A physical connector on the motherboard that accepts a single memory stick. Also called as “slot” on several datasheets.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubjH)}(hhh]jM)}(hChannel h]h)}(hChannelh]hChannel}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK#hjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhK#hhhhubh)}(hA memory controller channel, responsible to communicate with a group of DIMMs. Each channel has its own independent control (command) and data bus, and can be used independently or grouped with other channels.h]hA memory controller channel, responsible to communicate with a group of DIMMs. Each channel has its own independent control (command) and data bus, and can be used independently or grouped with other channels.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hhhhubjH)}(hhh]jM)}(hBranch h]h)}(hBranchh]hBranch}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hj ubah}(h]h ]h"]h$]h&]uh1jLhj hhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhK)hhhhubh)}(hXIt is typically the highest hierarchy on a Fully-Buffered DIMM memory controller. Typically, it contains two channels. Two channels at the same branch can be used in single mode or in lockstep mode. When lockstep is enabled, the cacheline is doubled, but it generally brings some performance penalty. Also, it is generally not possible to point to just one memory stick when an error occurs, as the error correction code is calculated using two DIMMs instead of one. Due to that, it is capable of correcting more errors than on single mode.h]hXIt is typically the highest hierarchy on a Fully-Buffered DIMM memory controller. Typically, it contains two channels. Two channels at the same branch can be used in single mode or in lockstep mode. When lockstep is enabled, the cacheline is doubled, but it generally brings some performance penalty. Also, it is generally not possible to point to just one memory stick when an error occurs, as the error correction code is calculated using two DIMMs instead of one. Due to that, it is capable of correcting more errors than on single mode.}(hj,hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hhhhubjH)}(hhh]jM)}(hSingle-channel h]h)}(hSingle-channelh]hSingle-channel}(hjAhj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hj;ubah}(h]h ]h"]h$]h&]uh1jLhj8hhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhK4hhhhubh)}(hX>The data accessed by the memory controller is contained into one dimm only. E. g. if the data is 64 bits-wide, the data flows to the CPU using one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 memories. FB-DIMM and RAMBUS use a different concept for channel, so this concept doesn't apply there.h]hX@The data accessed by the memory controller is contained into one dimm only. E. g. if the data is 64 bits-wide, the data flows to the CPU using one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3 memories. FB-DIMM and RAMBUS use a different concept for channel, so this concept doesn’t apply there.}(hj[hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK6hhhhubjH)}(hhh]jM)}(hDouble-channel h]h)}(hDouble-channelh]hDouble-channel}(hjphjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjH)}(hhh]jM)}(hChip-select row h]h)}(hChip-select rowh]hChip-select row}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKChhhhubh)}(hX:This is the name of the DRAM signal used to select the DRAM ranks to be accessed. Common chip-select rows for single channel are 64 bits, for dual channel 128 bits. It may not be visible by the memory controller, as some DIMM types have a memory buffer that can hide direct access to it from the Memory Controller.h]hX:This is the name of the DRAM signal used to select the DRAM ranks to be accessed. Common chip-select rows for single channel are 64 bits, for dual channel 128 bits. It may not be visible by the memory controller, as some DIMM types have a memory buffer that can hide direct access to it from the Memory Controller.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhhhhubjH)}(hhh]jM)}(hSingle-Ranked stick h]h)}(hSingle-Ranked stickh]hSingle-Ranked stick}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKKhhhhubh)}(hA Single-ranked stick has 1 chip-select row of memory. Motherboards commonly drive two chip-select pins to a memory stick. A single-ranked stick, will occupy only one of those rows. The other will be unused.h]hA Single-ranked stick has 1 chip-select row of memory. Motherboards commonly drive two chip-select pins to a memory stick. A single-ranked stick, will occupy only one of those rows. The other will be unused.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhhhhubhtarget)}(h.. _doubleranked:h]h}(h]h ]h"]h$]h&]refid doublerankeduh1jhKQhhhhhhubjH)}(hhh]jM)}(hDouble-Ranked stick h]h)}(hDouble-Ranked stickh]hDouble-Ranked stick}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]jah ]h"] doublerankedah$]h&]jljmuh1jGhhhKShhhhexpect_referenced_by_name}j!jsexpect_referenced_by_id}jjsubh)}(hA double-ranked stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently.h]hA double-ranked stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently.}(hj*hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhhhhubjH)}(hhh]jM)}(hDouble-sided stick h]h)}(hDouble-sided stickh]hDouble-sided stick}(hj?hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKXhj9ubah}(h]h ]h"]h$]h&]uh1jLhj6hhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKXhhhhubh)}(hC**DEPRECATED TERM**, see :ref:`Double-Ranked stick `.h](hstrong)}(h**DEPRECATED TERM**h]hDEPRECATED TERM}(hhhj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjWubh, see }(h, see hjWhhhNhNubh)}(h):ref:`Double-Ranked stick `h]hinline)}(hjrh]hDouble-Ranked stick}(hhhjvhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jthjpubah}(h]h ]h"]h$]h&]refdocdriver-api/edac refdomainjreftyperef refexplicitrefwarn reftarget doublerankeduh1hhhhKZhjWubh.}(h.hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKZhhhhubh)}(hA double-sided stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently. "Double-sided" is irrespective of the memory devices being mounted on both sides of the memory stick.h]hA double-sided stick has two chip-select rows which access different sets of memory devices. The two rows cannot be accessed concurrently. “Double-sided” is irrespective of the memory devices being mounted on both sides of the memory stick.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hhhhubjH)}(hhh]jM)}(h Socket set h]h)}(h Socket seth]h Socket set}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKahjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKahhhhubh)}(hAll of the memory sticks that are required for a single memory access or all of the memory sticks spanned by a chip-select row. A single socket set has two chip-select rows and if double-sided sticks are used these will occupy those chip-select rows.h]hAll of the memory sticks that are required for a single memory access or all of the memory sticks spanned by a chip-select row. A single socket set has two chip-select rows and if double-sided sticks are used these will occupy those chip-select rows.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchhhhubjH)}(hhh]jM)}(hBank h]h)}(hBankh]hBank}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhjubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKhhhhhubh)}(hpThis term is avoided because it is unclear when needing to distinguish between chip-select rows and socket sets.h]hpThis term is avoided because it is unclear when needing to distinguish between chip-select rows and socket sets.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhhhhubjH)}(hhh]jM)}(hHigh Bandwidth Memory (HBM) h]h)}(hHigh Bandwidth Memory (HBM)h]hHigh Bandwidth Memory (HBM)}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1jLhj hhhhhNubah}(h]h ]h"]h$]h&]jljmuh1jGhhhKmhhhhubh)}(hHBM is a new memory type with low power consumption and ultra-wide communication lanes. It uses vertically stacked memory chips (DRAM dies) interconnected by microscopic wires called "through-silicon vias," or TSVs.h]hHBM is a new memory type with low power consumption and ultra-wide communication lanes. It uses vertically stacked memory chips (DRAM dies) interconnected by microscopic wires called “through-silicon vias,” or TSVs.}(hj/hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohhhhubh)}(hSeveral stacks of HBM chips connect to the CPU or GPU through an ultra-fast interconnect called the "interposer". Therefore, HBM's characteristics are nearly indistinguishable from on-chip integrated RAM.h]hSeveral stacks of HBM chips connect to the CPU or GPU through an ultra-fast interconnect called the “interposer”. Therefore, HBM’s characteristics are nearly indistinguishable from on-chip integrated RAM.}(hj=hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthhhhubeh}(h](main-concepts-used-at-the-edac-subsystemah ]h"](main concepts used at the edac subsystemah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hMemory Controllersh]hMemory Controllers}(hjVhjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhhhhhKyubh)}(hXMost of the EDAC core is focused on doing Memory Controller error detection. The :c:func:`edac_mc_alloc`. It uses internally the struct ``mem_ctl_info`` to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.h](hQMost of the EDAC core is focused on doing Memory Controller error detection. The }(hQMost of the EDAC core is focused on doing Memory Controller error detection. The hjbhhhNhNubh)}(h:c:func:`edac_mc_alloc`h]hliteral)}(hjmh]hedac_mc_alloc()}(hhhjqhhhNhNubah}(h]h ](jcc-funceh"]h$]h&]uh1johjkubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypefunc refexplicitrefwarnj edac_mc_allocuh1hhhhK{hjbubh . It uses internally the struct }(h . It uses internally the struct hjbhhhNhNubjp)}(h``mem_ctl_info``h]h mem_ctl_info}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjbubh~ to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.}(h~ to describe the memory controllers, with is an opaque struct for the EDAC drivers. Only the EDAC core is allowed to touch it.hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK{hjQhhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singledev_type (C enum) c.dev_typehNtauh1jhjQhhhNhNubhdesc)}(hhh](hdesc_signature)}(hdev_typeh]hdesc_signature_line)}(h enum dev_typeh](hdesc_sig_keyword)}(henumh]henum}(hhhjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhK=ubhdesc_sig_space)}(h h]h }(hhhjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhK=ubh desc_name)}(hdev_typeh]h desc_sig_name)}(hjh]hdev_type}(hhhjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1jhjhhhjhK=ubeh}(h]h ]h"]h$]h&]jj add_permalinkuh1jsphinx_line_type declaratorhjhhhjhK=ubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multilineuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjhhubh desc_content)}(hhh]h)}(h8describe the type of memory DRAM chips used at the stickh]h8describe the type of memory DRAM chips used at the stick}(hj*hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhK``MEM_FPM`` FPM - Fast Page Mode, used on systems up to 1995. h](jr)}(h ``MEM_FPM``h]jp)}(hj h]hMEM_FPM}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h1FPM - Fast Page Mode, used on systems up to 1995.h]h1FPM - Fast Page Mode, used on systems up to 1995.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(hA``MEM_EDO`` EDO - Extended data out, used on systems up to 1998. h](jr)}(h ``MEM_EDO``h]jp)}(hj h]hMEM_EDO}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h4EDO - Extended data out, used on systems up to 1998.h]h4EDO - Extended data out, used on systems up to 1998.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h=``MEM_BEDO`` BEDO - Burst Extended data out, an EDO variant. h](jr)}(h ``MEM_BEDO``h]jp)}(hj h]hMEM_BEDO}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h/BEDO - Burst Extended data out, an EDO variant.h]h/BEDO - Burst Extended data out, an EDO variant.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h``MEM_SDR`` SDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank. h](jr)}(h ``MEM_SDR``h]jp)}(hj8 h]hMEM_SDR}(hhhj: hhhNhNubah}(h]h ]h"]h$]h&]uh1johj6 ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj2 ubj)}(hhh]h)}(hSDR - Single data rate SDRAM http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.h](hSDR - Single data rate SDRAM }(hSDR - Single data rate SDRAM hjQ hhhNhNubj )}(hEhttp://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memoryh]hEhttp://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory}(hhhjZ hhhNhNubah}(h]h ]h"]h$]h&]refurij\ uh1j hjQ ubhw They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.}(hw They use 3 pins for chip select: Pins 0 and 2 are for rank 0; pins 1 and 3 are for rank 1, if the memory is dual-rank.hjQ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjN ubah}(h]h ]h"]h$]h&]uh1jhj2 ubeh}(h]h ]h"]h$]h&]uh1jkhjM hKhj ubjl)}(h!``MEM_RDR`` Registered SDR SDRAM h](jr)}(h ``MEM_RDR``h]jp)}(hj h]hMEM_RDR}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hRegistered SDR SDRAMh]hRegistered SDR SDRAM}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(hJ``MEM_DDR`` Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAM h](jr)}(h ``MEM_DDR``h]jp)}(hj h]hMEM_DDR}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h=Double data rate SDRAM http://en.wikipedia.org/wiki/DDR_SDRAMh](hDouble data rate SDRAM }(hDouble data rate SDRAM hj hhhNhNubj )}(h&http://en.wikipedia.org/wiki/DDR_SDRAMh]h&http://en.wikipedia.org/wiki/DDR_SDRAM}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]refurij uh1j hj ubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h``MEM_RDDR`` Registered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller. h](jr)}(h ``MEM_RDDR``h]jp)}(hj h]hMEM_RDDR}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hRegistered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller.h]hRegistered Double data rate SDRAM This is a variant of the DDR memories. A registered memory has a buffer inside it, hiding part of the memory details to the memory controller.}(hj% hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(hD``MEM_RMBS`` Rambus DRAM, used on a few Pentium III/IV controllers. h](jr)}(h ``MEM_RMBS``h]jp)}(hjD h]hMEM_RMBS}(hhhjF hhhNhNubah}(h]h ]h"]h$]h&]uh1johjB ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj> ubj)}(hhh]h)}(h6Rambus DRAM, used on a few Pentium III/IV controllers.h]h6Rambus DRAM, used on a few Pentium III/IV controllers.}(hj_ hj] hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY hKhjZ ubah}(h]h ]h"]h$]h&]uh1jhj> ubeh}(h]h ]h"]h$]h&]uh1jkhjY hKhj ubjl)}(h``MEM_DDR2`` DDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR. h](jr)}(h ``MEM_DDR2``h]jp)}(hj} h]hMEM_DDR2}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj{ ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjw ubj)}(hhh]h)}(hzDDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as "PC2-" instead of "PC" to differentiate from DDR.h]hDDR2 RAM, as described at JEDEC JESD79-2F. Those memories are labeled as “PC2-” instead of “PC” to differentiate from DDR.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhjw ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h``MEM_FB_DDR2`` Fully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal. h](jr)}(h``MEM_FB_DDR2``h]jp)}(hj h]h MEM_FB_DDR2}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hFully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal.h]hFully-Buffered DDR2, as described at JEDEC Std No. 205 and JESD206. Those memories are accessed per DIMM slot, and not by a chip select signal.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(hJ``MEM_RDDR2`` Registered DDR2 RAM This is a variant of the DDR2 memories. h](jr)}(h ``MEM_RDDR2``h]jp)}(hj h]h MEM_RDDR2}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h;Registered DDR2 RAM This is a variant of the DDR2 memories.h]h;Registered DDR2 RAM This is a variant of the DDR2 memories.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h``MEM_XDR`` Rambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it. h](jr)}(h ``MEM_XDR``h]jp)}(hj+ h]hMEM_XDR}(hhhj- hhhNhNubah}(h]h ]h"]h$]h&]uh1johj) ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj% ubj)}(hhh]h)}(hRambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren't used on any x86 arch, but cell_edac PPC memory controller uses it.h]hRambus XDR It is an evolution of the original RAMBUS memories, created to compete with DDR2. Weren’t used on any x86 arch, but cell_edac PPC memory controller uses it.}(hjF hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjA ubah}(h]h ]h"]h$]h&]uh1jhj% ubeh}(h]h ]h"]h$]h&]uh1jkhj@ hKhj ubjl)}(h``MEM_DDR3`` DDR3 RAM h](jr)}(h ``MEM_DDR3``h]jp)}(hje h]hMEM_DDR3}(hhhjg hhhNhNubah}(h]h ]h"]h$]h&]uh1johjc ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj_ ubj)}(hhh]h)}(hDDR3 RAMh]hDDR3 RAM}(hj hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz hKhj{ ubah}(h]h ]h"]h$]h&]uh1jhj_ ubeh}(h]h ]h"]h$]h&]uh1jkhjz hKhj ubjl)}(hJ``MEM_RDDR3`` Registered DDR3 RAM This is a variant of the DDR3 memories. h](jr)}(h ``MEM_RDDR3``h]jp)}(hj h]h MEM_RDDR3}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h;Registered DDR3 RAM This is a variant of the DDR3 memories.h]h;Registered DDR3 RAM This is a variant of the DDR3 memories.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h)``MEM_LRDDR3`` Load-Reduced DDR3 memory. h](jr)}(h``MEM_LRDDR3``h]jp)}(hj h]h MEM_LRDDR3}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hLoad-Reduced DDR3 memory.h]hLoad-Reduced DDR3 memory.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h&``MEM_LPDDR3`` Low-Power DDR3 memory. h](jr)}(h``MEM_LPDDR3``h]jp)}(hjh]h MEM_LPDDR3}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(hLow-Power DDR3 memory.h]hLow-Power DDR3 memory.}(hj,hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj&hKhj ubjl)}(h!``MEM_DDR4`` Unbuffered DDR4 RAM h](jr)}(h ``MEM_DDR4``h]jp)}(hjJh]hMEM_DDR4}(hhhjLhhhNhNubah}(h]h ]h"]h$]h&]uh1johjHubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjDubj)}(hhh]h)}(hUnbuffered DDR4 RAMh]hUnbuffered DDR4 RAM}(hjehjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hKhj`ubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jkhj_hKhj ubjl)}(hJ``MEM_RDDR4`` Registered DDR4 RAM This is a variant of the DDR4 memories. h](jr)}(h ``MEM_RDDR4``h]jp)}(hjh]h MEM_RDDR4}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj}ubj)}(hhh]h)}(h;Registered DDR4 RAM This is a variant of the DDR4 memories.h]h;Registered DDR4 RAM This is a variant of the DDR4 memories.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jkhjhKhj ubjl)}(h)``MEM_LRDDR4`` Load-Reduced DDR4 memory. h](jr)}(h``MEM_LRDDR4``h]jp)}(hjh]h MEM_LRDDR4}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLoad-Reduced DDR4 memory.h]hLoad-Reduced DDR4 memory.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhKhj ubjl)}(h&``MEM_LPDDR4`` Low-Power DDR4 memory. h](jr)}(h``MEM_LPDDR4``h]jp)}(hjh]h MEM_LPDDR4}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLow-Power DDR4 memory.h]hLow-Power DDR4 memory.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhj hKhj ubjl)}(h!``MEM_DDR5`` Unbuffered DDR5 RAM h](jr)}(h ``MEM_DDR5``h]jp)}(hj/h]hMEM_DDR5}(hhhj1hhhNhNubah}(h]h ]h"]h$]h&]uh1johj-ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj)ubj)}(hhh]h)}(hUnbuffered DDR5 RAMh]hUnbuffered DDR5 RAM}(hjJhjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhKhjEubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jkhjDhKhj ubjl)}(h"``MEM_RDDR5`` Registered DDR5 RAM h](jr)}(h ``MEM_RDDR5``h]jp)}(hjhh]h MEM_RDDR5}(hhhjjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjfubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjbubj)}(hhh]h)}(hRegistered DDR5 RAMh]hRegistered DDR5 RAM}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hKhj~ubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jkhj}hKhj ubjl)}(h)``MEM_LRDDR5`` Load-Reduced DDR5 memory. h](jr)}(h``MEM_LRDDR5``h]jp)}(hjh]h MEM_LRDDR5}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hLoad-Reduced DDR5 memory.h]hLoad-Reduced DDR5 memory.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhKhj ubjl)}(h ``MEM_NVDIMM`` Non-volatile RAM h](jr)}(h``MEM_NVDIMM``h]jp)}(hjh]h MEM_NVDIMM}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hNon-volatile RAMh]hNon-volatile RAM}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhKhj ubjl)}(h``MEM_WIO2`` Wide I/O 2. h](jr)}(h ``MEM_WIO2``h]jp)}(hjh]hMEM_WIO2}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhj ubj)}(hhh]h)}(h Wide I/O 2.h]h Wide I/O 2.}(hj.hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hKhj)ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj(hKhj ubjl)}(h*``MEM_HBM2`` High bandwidth Memory Gen 2. h](jr)}(h ``MEM_HBM2``h]jp)}(hjLh]hMEM_HBM2}(hhhjNhhhNhNubah}(h]h ]h"]h$]h&]uh1johjJubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjFubj)}(hhh]h)}(hHigh bandwidth Memory Gen 2.h]hHigh bandwidth Memory Gen 2.}(hjghjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahKhjbubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jkhjahKhj ubjl)}(h)``MEM_HBM3`` High bandwidth Memory Gen 3.h](jr)}(h ``MEM_HBM3``h]jp)}(hjh]hMEM_HBM3}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubj)}(hhh]h)}(hHigh bandwidth Memory Gen 3.h]hHigh bandwidth Memory Gen 3.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhKhj ubeh}(h]h ]h"]h$]h&]uh1jfhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_type (C enum) c.edac_typehNtauh1jhjQhhhNhNubj)}(hhh](j)}(h edac_typeh]j)}(henum edac_typeh](j)}(hjh]henum}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h edac_typeh]j)}(hjh]h edac_type}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j j eh"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhhubj$)}(hhh]h)}(h4Error Detection and Correction capabilities and modeh]h4Error Detection and Correction capabilities and mode}(hj$hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j#hjhhhjhMubeh}(h]h ](j{enumeh"]h$]h&]jDj{jEj:jFj:jGuh1jhhhjQhNhNubjI)}(hX**Constants** ``EDAC_UNKNOWN`` Unknown if ECC is available ``EDAC_NONE`` Doesn't support ECC ``EDAC_RESERVED`` Reserved ECC type ``EDAC_PARITY`` Detects parity errors ``EDAC_EC`` Error Checking - no correction ``EDAC_SECDED`` Single bit error correction, Double detection ``EDAC_S2ECD2ED`` Chipkill x2 devices - do these exist? ``EDAC_S4ECD4ED`` Chipkill x4 devices ``EDAC_S8ECD8ED`` Chipkill x8 devices ``EDAC_S16ECD16ED`` Chipkill x16 devicesh](h)}(h **Constants**h]j\)}(hjDh]h Constants}(hhhjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjBubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj>ubjg)}(hhh](jl)}(h-``EDAC_UNKNOWN`` Unknown if ECC is available h](jr)}(h``EDAC_UNKNOWN``h]jp)}(hjch]h EDAC_UNKNOWN}(hhhjehhhNhNubah}(h]h ]h"]h$]h&]uh1johjaubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj]ubj)}(hhh]h)}(hUnknown if ECC is availableh]hUnknown if ECC is available}(hj~hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jkhjxhMhjZubjl)}(h"``EDAC_NONE`` Doesn't support ECC h](jr)}(h ``EDAC_NONE``h]jp)}(hjh]h EDAC_NONE}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjubj)}(hhh]h)}(hDoesn't support ECCh]hDoesn’t support ECC}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM hjZubjl)}(h$``EDAC_RESERVED`` Reserved ECC type h](jr)}(h``EDAC_RESERVED``h]jp)}(hjh]h EDAC_RESERVED}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM hjubj)}(hhh]h)}(hReserved ECC typeh]hReserved ECC type}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM hjZubjl)}(h&``EDAC_PARITY`` Detects parity errors h](jr)}(h``EDAC_PARITY``h]jp)}(hjh]h EDAC_PARITY}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johj ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hDetects parity errorsh]hDetects parity errors}(hj)hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj$ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhj#hMhjZubjl)}(h+``EDAC_EC`` Error Checking - no correction h](jr)}(h ``EDAC_EC``h]jp)}(hjGh]hEDAC_EC}(hhhjIhhhNhNubah}(h]h ]h"]h$]h&]uh1johjEubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjAubj)}(hhh]h)}(hError Checking - no correctionh]hError Checking - no correction}(hjbhj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj]ubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jkhj\hMhjZubjl)}(h>``EDAC_SECDED`` Single bit error correction, Double detection h](jr)}(h``EDAC_SECDED``h]jp)}(hjh]h EDAC_SECDED}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johj~ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjzubj)}(hhh]h)}(h-Single bit error correction, Double detectionh]h-Single bit error correction, Double detection}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjZubjl)}(h8``EDAC_S2ECD2ED`` Chipkill x2 devices - do these exist? h](jr)}(h``EDAC_S2ECD2ED``h]jp)}(hjh]h EDAC_S2ECD2ED}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h%Chipkill x2 devices - do these exist?h]h%Chipkill x2 devices - do these exist?}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjZubjl)}(h&``EDAC_S4ECD4ED`` Chipkill x4 devices h](jr)}(h``EDAC_S4ECD4ED``h]jp)}(hjh]h EDAC_S4ECD4ED}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hChipkill x4 devicesh]hChipkill x4 devices}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjZubjl)}(h&``EDAC_S8ECD8ED`` Chipkill x8 devices h](jr)}(h``EDAC_S8ECD8ED``h]jp)}(hj+h]h EDAC_S8ECD8ED}(hhhj-hhhNhNubah}(h]h ]h"]h$]h&]uh1johj)ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj%ubj)}(hhh]h)}(hChipkill x8 devicesh]hChipkill x8 devices}(hjFhjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jkhj@hMhjZubjl)}(h(``EDAC_S16ECD16ED`` Chipkill x16 devicesh](jr)}(h``EDAC_S16ECD16ED``h]jp)}(hjdh]hEDAC_S16ECD16ED}(hhhjfhhhNhNubah}(h]h ]h"]h$]h&]uh1johjbubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM!hj^ubj)}(hhh]h)}(hChipkill x16 devicesh]hChipkill x16 devices}(hjhj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM"hjzubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jkhjyhM!hjZubeh}(h]h ]h"]h$]h&]uh1jfhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jscrub_type (C enum) c.scrub_typehNtauh1jhjQhhhNhNubj)}(hhh](j)}(h scrub_typeh]j)}(henum scrub_typeh](j)}(hjh]henum}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM%ubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM%ubj)}(h scrub_typeh]j)}(hjh]h scrub_type}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j j eh"]h$]h&]jjuh1jhjhhhjhM%ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM%ubah}(h]jah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM(hjhhubj$)}(hhh]h)}(hscrubbing capabilitiesh]hscrubbing capabilities}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM$hjhhubah}(h]h ]h"]h$]h&]uh1j#hjhhhjhM%ubeh}(h]h ](j{enumeh"]h$]h&]jDj{jEjjFjjGuh1jhhhjQhNhNubjI)}(hX1**Constants** ``SCRUB_UNKNOWN`` Unknown if scrubber is available ``SCRUB_NONE`` No scrubber ``SCRUB_SW_PROG`` SW progressive (sequential) scrubbing ``SCRUB_SW_SRC`` Software scrub only errors ``SCRUB_SW_PROG_SRC`` Progressive software scrub from an error ``SCRUB_SW_TUNABLE`` Software scrub frequency is tunable ``SCRUB_HW_PROG`` HW progressive (sequential) scrubbing ``SCRUB_HW_SRC`` Hardware scrub only errors ``SCRUB_HW_PROG_SRC`` Progressive hardware scrub from an error ``SCRUB_HW_TUNABLE`` Hardware scrub frequency is tunableh](h)}(h **Constants**h]j\)}(hj#h]h Constants}(hhhj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj!ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM(hjubjg)}(hhh](jl)}(h3``SCRUB_UNKNOWN`` Unknown if scrubber is available h](jr)}(h``SCRUB_UNKNOWN``h]jp)}(hjBh]h SCRUB_UNKNOWN}(hhhjDhhhNhNubah}(h]h ]h"]h$]h&]uh1johj@ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM+hj<ubj)}(hhh]h)}(h Unknown if scrubber is availableh]h Unknown if scrubber is available}(hj]hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM+hjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jkhjWhM+hj9ubjl)}(h``SCRUB_NONE`` No scrubber h](jr)}(h``SCRUB_NONE``h]jp)}(hj{h]h SCRUB_NONE}(hhhj}hhhNhNubah}(h]h ]h"]h$]h&]uh1johjyubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM.hjuubj)}(hhh]h)}(h No scrubberh]h No scrubber}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM.hjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jkhjhM.hj9ubjl)}(h8``SCRUB_SW_PROG`` SW progressive (sequential) scrubbing h](jr)}(h``SCRUB_SW_PROG``h]jp)}(hjh]h SCRUB_SW_PROG}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM1hjubj)}(hhh]h)}(h%SW progressive (sequential) scrubbingh]h%SW progressive (sequential) scrubbing}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM1hj9ubjl)}(h,``SCRUB_SW_SRC`` Software scrub only errors h](jr)}(h``SCRUB_SW_SRC``h]jp)}(hjh]h SCRUB_SW_SRC}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM4hjubj)}(hhh]h)}(hSoftware scrub only errorsh]hSoftware scrub only errors}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM4hj9ubjl)}(h?``SCRUB_SW_PROG_SRC`` Progressive software scrub from an error h](jr)}(h``SCRUB_SW_PROG_SRC``h]jp)}(hj&h]hSCRUB_SW_PROG_SRC}(hhhj(hhhNhNubah}(h]h ]h"]h$]h&]uh1johj$ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM7hj ubj)}(hhh]h)}(h(Progressive software scrub from an errorh]h(Progressive software scrub from an error}(hjAhj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM7hj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jkhj;hM7hj9ubjl)}(h9``SCRUB_SW_TUNABLE`` Software scrub frequency is tunable h](jr)}(h``SCRUB_SW_TUNABLE``h]jp)}(hj_h]hSCRUB_SW_TUNABLE}(hhhjahhhNhNubah}(h]h ]h"]h$]h&]uh1johj]ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM:hjYubj)}(hhh]h)}(h#Software scrub frequency is tunableh]h#Software scrub frequency is tunable}(hjzhjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM:hjuubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jkhjthM:hj9ubjl)}(h8``SCRUB_HW_PROG`` HW progressive (sequential) scrubbing h](jr)}(h``SCRUB_HW_PROG``h]jp)}(hjh]h SCRUB_HW_PROG}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM=hjubj)}(hhh]h)}(h%HW progressive (sequential) scrubbingh]h%HW progressive (sequential) scrubbing}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM=hj9ubjl)}(h,``SCRUB_HW_SRC`` Hardware scrub only errors h](jr)}(h``SCRUB_HW_SRC``h]jp)}(hjh]h SCRUB_HW_SRC}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM@hjubj)}(hhh]h)}(hHardware scrub only errorsh]hHardware scrub only errors}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM@hj9ubjl)}(h?``SCRUB_HW_PROG_SRC`` Progressive hardware scrub from an error h](jr)}(h``SCRUB_HW_PROG_SRC``h]jp)}(hj h]hSCRUB_HW_PROG_SRC}(hhhj hhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMChjubj)}(hhh]h)}(h(Progressive hardware scrub from an errorh]h(Progressive hardware scrub from an error}(hj%hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMChj9ubjl)}(h8``SCRUB_HW_TUNABLE`` Hardware scrub frequency is tunableh](jr)}(h``SCRUB_HW_TUNABLE``h]jp)}(hjCh]hSCRUB_HW_TUNABLE}(hhhjEhhhNhNubah}(h]h ]h"]h$]h&]uh1johjAubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMEhj=ubj)}(hhh]h)}(h#Hardware scrub frequency is tunableh]h#Hardware scrub frequency is tunable}(hj^hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMFhjYubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jkhjXhMEhj9ubeh}(h]h ]h"]h$]h&]uh1jfhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_layer_type (C enum)c.edac_mc_layer_typehNtauh1jhjQhhhNhNubj)}(hhh](j)}(hedac_mc_layer_typeh]j)}(henum edac_mc_layer_typeh](j)}(hjh]henum}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMQubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMQubj)}(hedac_mc_layer_typeh]j)}(hjh]hedac_mc_layer_type}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j j eh"]h$]h&]jjuh1jhjhhhjhMQubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMQubah}(h]jah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMLhjhhubj$)}(hhh]h)}(h!memory controller hierarchy layerh]h!memory controller hierarchy layer}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMPhjhhubah}(h]h ]h"]h$]h&]uh1j#hjhhhjhMQubeh}(h]h ](j{enumeh"]h$]h&]jDj{jEjjFjjGuh1jhhhjQhNhNubjI)}(hX**Constants** ``EDAC_MC_LAYER_BRANCH`` memory layer is named "branch" ``EDAC_MC_LAYER_CHANNEL`` memory layer is named "channel" ``EDAC_MC_LAYER_SLOT`` memory layer is named "slot" ``EDAC_MC_LAYER_CHIP_SELECT`` memory layer is named "chip select" ``EDAC_MC_LAYER_ALL_MEM`` memory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h](h)}(h **Constants**h]j\)}(hjh]h Constants}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMThjubjg)}(hhh](jl)}(h8``EDAC_MC_LAYER_BRANCH`` memory layer is named "branch" h](jr)}(h``EDAC_MC_LAYER_BRANCH``h]jp)}(hj!h]hEDAC_MC_LAYER_BRANCH}(hhhj#hhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMWhjubj)}(hhh]h)}(hmemory layer is named "branch"h]h"memory layer is named “branch”}(hj<hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMWhj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhj6hMWhjubjl)}(h:``EDAC_MC_LAYER_CHANNEL`` memory layer is named "channel" h](jr)}(h``EDAC_MC_LAYER_CHANNEL``h]jp)}(hjZh]hEDAC_MC_LAYER_CHANNEL}(hhhj\hhhNhNubah}(h]h ]h"]h$]h&]uh1johjXubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMZhjTubj)}(hhh]h)}(hmemory layer is named "channel"h]h#memory layer is named “channel”}(hjuhjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMZhjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jkhjohMZhjubjl)}(h4``EDAC_MC_LAYER_SLOT`` memory layer is named "slot" h](jr)}(h``EDAC_MC_LAYER_SLOT``h]jp)}(hjh]hEDAC_MC_LAYER_SLOT}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM]hjubj)}(hhh]h)}(hmemory layer is named "slot"h]h memory layer is named “slot”}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM]hjubjl)}(hB``EDAC_MC_LAYER_CHIP_SELECT`` memory layer is named "chip select" h](jr)}(h``EDAC_MC_LAYER_CHIP_SELECT``h]jp)}(hjh]hEDAC_MC_LAYER_CHIP_SELECT}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM`hjubj)}(hhh]h)}(h#memory layer is named "chip select"h]h'memory layer is named “chip select”}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhM`hjubjl)}(h``EDAC_MC_LAYER_ALL_MEM`` memory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h](jr)}(h``EDAC_MC_LAYER_ALL_MEM``h]jp)}(hjh]hEDAC_MC_LAYER_ALL_MEM}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMdhjubj)}(hhh]h)}(hmemory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.h]hmemory layout is unknown. All memory is mapped as a single memory area. This is used when retrieving errors from a firmware driven driver.}(hj hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMchjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMdhjubeh}(h]h ]h"]h$]h&]uh1jfhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubh)}(h**Description**h]j\)}(hjHh]h Description}(hhhjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjFubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhhjQhhubh)}(hxThis enum is used by the drivers to tell edac_mc_sysfs what name should be used when describing a memory stick location.h]hxThis enum is used by the drivers to tell edac_mc_sysfs what name should be used when describing a memory stick location.}(hj`hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMZhjQhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_layer (C struct)c.edac_mc_layerhNtauh1jhjQhhhNhNubj)}(hhh](j)}(h edac_mc_layerh]j)}(hstruct edac_mc_layerh](j)}(hstructh]hstruct}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMgubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMgubj)}(h edac_mc_layerh]j)}(hjh]h edac_mc_layer}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](j j eh"]h$]h&]jjuh1jhjhhhjhMgubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj~hhhjhMgubah}(h]jyah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM`hj{hhubj$)}(hhh]h)}(h)describes the memory controller hierarchyh]h)describes the memory controller hierarchy}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMfhjhhubah}(h]h ]h"]h$]h&]uh1j#hj{hhhjhMgubeh}(h]h ](j{structeh"]h$]h&]jDj{jEjjFjjGuh1jhhhjQhNhNubjI)}(hX**Definition**:: struct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; }; **Members** ``type`` layer type ``size`` number of components per layer. For example, if the channel layer has two channels, size = 2 ``is_virt_csrow`` This layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh](h)}(h**Definition**::h](j\)}(h**Definition**h]h Definition}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjubh:}(h:hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMjhjubh literal_block)}(hfstruct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; };h]hfstruct edac_mc_layer { enum edac_mc_layer_type type; unsigned size; bool is_virt_csrow; };}(hhhj ubah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMlhjubh)}(h **Members**h]j\)}(hjh]hMembers}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhjubjg)}(hhh](jl)}(h``type`` layer type h](jr)}(h``type``h]jp)}(hj:h]htype}(hhhj<hhhNhNubah}(h]h ]h"]h$]h&]uh1johj8ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhhj4ubj)}(hhh]h)}(h layer typeh]h layer type}(hjUhjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jkhjOhMhhj1ubjl)}(hf``size`` number of components per layer. For example, if the channel layer has two channels, size = 2 h](jr)}(h``size``h]jp)}(hjsh]hsize}(hhhjuhhhNhNubah}(h]h ]h"]h$]h&]uh1johjqubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMjhjmubj)}(hhh]h)}(h\number of components per layer. For example, if the channel layer has two channels, size = 2h]h\number of components per layer. For example, if the channel layer has two channels, size = 2}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMihjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jkhjhMjhj1ubjl)}(hz``is_virt_csrow`` This layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh](jr)}(h``is_virt_csrow``h]jp)}(hjh]h is_virt_csrow}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMlhjubj)}(hhh]h)}(hhThis layer is part of the "csrow" when old API compatibility mode is enabled. Otherwise, it is a channelh]hlThis layer is part of the “csrow” when old API compatibility mode is enabled. Otherwise, it is a channel}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMkhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMlhj1ubeh}(h]h ]h"]h$]h&]uh1jfhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jrank_info (C struct) c.rank_infohNtauh1jhjQhhhNhNubj)}(hhh](j)}(h rank_infoh]j)}(hstruct rank_infoh](j)}(hjh]hstruct}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h rank_infoh]j)}(hjh]h rank_info}(hhhj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ](j j eh"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMshjhhubj$)}(hhh]h)}(h*contains the information for one DIMM rankh]h*contains the information for one DIMM rank}(hjLhjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjGhhubah}(h]h ]h"]h$]h&]uh1j#hjhhhjhMubeh}(h]h ](j{structeh"]h$]h&]jDj{jEjbjFjbjGuh1jhhhjQhNhNubjI)}(hX**Definition**:: struct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; }; **Members** ``chan_idx`` channel number where the rank is (typically, 0 or 1) ``csrow`` A pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector. ``dimm`` A pointer to the DIMM structure, where the DIMM label information is stored. ``ce_count`` number of correctable errors for this rankh](h)}(h**Definition**::h](j\)}(h**Definition**h]h Definition}(hhhjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjjubh:}(hjhjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjfubj )}(hsstruct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; };h]hsstruct rank_info { int chan_idx; struct csrow_info *csrow; struct dimm_info *dimm; u32 ce_count; };}(hhhjubah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjfubh)}(h **Members**h]j\)}(hjh]hMembers}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjfubjg)}(hhh](jl)}(hB``chan_idx`` channel number where the rank is (typically, 0 or 1) h](jr)}(h ``chan_idx``h]jp)}(hjh]hchan_idx}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h4channel number where the rank is (typically, 0 or 1)h]h4channel number where the rank is (typically, 0 or 1)}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h``csrow`` A pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector. h](jr)}(h ``csrow``h]jp)}(hjh]hcsrow}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hA pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector.h]hA pointer to the chip select row structure (the parent structure). The location of the rank is given by the (csrow->csrow_idx, chan_idx) vector.}(hj hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(hV``dimm`` A pointer to the DIMM structure, where the DIMM label information is stored. h](jr)}(h``dimm``h]jp)}(hj*h]hdimm}(hhhj,hhhNhNubah}(h]h ]h"]h$]h&]uh1johj(ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj$ubj)}(hhh]h)}(hLA pointer to the DIMM structure, where the DIMM label information is stored.h]hLA pointer to the DIMM structure, where the DIMM label information is stored.}(hjEhjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj@ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jkhj?hMhjubjl)}(h7``ce_count`` number of correctable errors for this rankh](jr)}(h ``ce_count``h]jp)}(hjdh]hce_count}(hhhjfhhhNhNubah}(h]h ]h"]h$]h&]uh1johjbubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj^ubj)}(hhh]h)}(h*number of correctable errors for this rankh]h*number of correctable errors for this rank}(hjhj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjzubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jkhjyhMhjubeh}(h]h ]h"]h$]h&]uh1jfhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubh)}(h**Description**h]j\)}(hjh]h Description}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjQhhubjg)}(hhh]jl)}(hFIXME: Currently, the EDAC core model will assume one DIMM per rank. This is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue. h](jr)}(hDFIXME: Currently, the EDAC core model will assume one DIMM per rank.h]hDFIXME: Currently, the EDAC core model will assume one DIMM per rank.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hkThis is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue.h]hkThis is a bad assumption, but it makes this patch easier. Later patches in this series will fix this issue.}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubah}(h]h ]h"]h$]h&]uh1jfhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_raw_error_desc (C struct)c.edac_raw_error_deschNtauh1jhjQhhhNhNubj)}(hhh](j)}(hedac_raw_error_desch]j)}(hstruct edac_raw_error_desch](j)}(hjh]hstruct}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhjhMubj)}(hedac_raw_error_desch]j)}(hj h]hedac_raw_error_desc}(hhhj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjhhubj$)}(hhh]h)}(hRaw error report structureh]hRaw error report structure}(hjUhjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjPhhubah}(h]h ]h"]h$]h&]uh1j#hjhhhjhMubeh}(h]h ](j{structeh"]h$]h&]jDj{jEjkjFjkjGuh1jhhhjQhNhNubjI)}(hX**Definition**:: struct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; }; **Members** ``location`` location of the error ``label`` label of the affected DIMM(s) ``grain`` minimum granularity for an error report, in bytes ``error_count`` number of errors of the same type ``type`` severity of the error (CE/UE/Fatal) ``top_layer`` top layer of the error (layer[0]) ``mid_layer`` middle layer of the error (layer[1]) ``low_layer`` low layer of the error (layer[2]) ``page_frame_number`` page where the error happened ``offset_in_page`` page offset ``syndrome`` syndrome of the error (or 0 if unknown or if the syndrome is not applicable) ``msg`` error message ``other_detail`` other driver-specific detail about the errorh](h)}(h**Definition**::h](j\)}(h**Definition**h]h Definition}(hhhjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjsubh:}(hjhjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjoubj )}(hXstruct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; };h]hXstruct edac_raw_error_desc { char location[LOCATION_SIZE]; char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * EDAC_MAX_LABELS]; long grain; u16 error_count; enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; unsigned long page_frame_number; unsigned long offset_in_page; unsigned long syndrome; const char *msg; const char *other_detail; };}(hhhjubah}(h]h ]h"]h$]h&]jjuh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjoubh)}(h **Members**h]j\)}(hjh]hMembers}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjoubjg)}(hhh](jl)}(h#``location`` location of the error h](jr)}(h ``location``h]jp)}(hjh]hlocation}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hlocation of the errorh]hlocation of the error}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h(``label`` label of the affected DIMM(s) h](jr)}(h ``label``h]jp)}(hjh]hlabel}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hlabel of the affected DIMM(s)h]hlabel of the affected DIMM(s)}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h<``grain`` minimum granularity for an error report, in bytes h](jr)}(h ``grain``h]jp)}(hj2h]hgrain}(hhhj4hhhNhNubah}(h]h ]h"]h$]h&]uh1johj0ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj,ubj)}(hhh]h)}(h1minimum granularity for an error report, in bytesh]h1minimum granularity for an error report, in bytes}(hjMhjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jkhjGhMhjubjl)}(h2``error_count`` number of errors of the same type h](jr)}(h``error_count``h]jp)}(hjkh]h error_count}(hhhjmhhhNhNubah}(h]h ]h"]h$]h&]uh1johjiubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjeubj)}(hhh]h)}(h!number of errors of the same typeh]h!number of errors of the same type}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h-``type`` severity of the error (CE/UE/Fatal) h](jr)}(h``type``h]jp)}(hjh]htype}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h#severity of the error (CE/UE/Fatal)h]h#severity of the error (CE/UE/Fatal)}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h0``top_layer`` top layer of the error (layer[0]) h](jr)}(h ``top_layer``h]jp)}(hjh]h top_layer}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h!top layer of the error (layer[0])h]h!top layer of the error (layer[0])}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h3``mid_layer`` middle layer of the error (layer[1]) h](jr)}(h ``mid_layer``h]jp)}(hjh]h mid_layer}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h$middle layer of the error (layer[1])h]h$middle layer of the error (layer[1])}(hj1hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhj+hMhjubjl)}(h0``low_layer`` low layer of the error (layer[2]) h](jr)}(h ``low_layer``h]jp)}(hjOh]h low_layer}(hhhjQhhhNhNubah}(h]h ]h"]h$]h&]uh1johjMubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjIubj)}(hhh]h)}(h!low layer of the error (layer[2])h]h!low layer of the error (layer[2])}(hjjhjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jkhjdhMhjubjl)}(h4``page_frame_number`` page where the error happened h](jr)}(h``page_frame_number``h]jp)}(hjh]hpage_frame_number}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hpage where the error happenedh]hpage where the error happened}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h``offset_in_page`` page offset h](jr)}(h``offset_in_page``h]jp)}(hjh]hoffset_in_page}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(h page offseth]h page offset}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(hZ``syndrome`` syndrome of the error (or 0 if unknown or if the syndrome is not applicable) h](jr)}(h ``syndrome``h]jp)}(hjh]hsyndrome}(hhhjhhhNhNubah}(h]h ]h"]h$]h&]uh1johjubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubj)}(hhh]h)}(hLsyndrome of the error (or 0 if unknown or if the syndrome is not applicable)h]hLsyndrome of the error (or 0 if unknown or if the syndrome is not applicable)}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubjl)}(h``msg`` error message h](jr)}(h``msg``h]jp)}(hj4h]hmsg}(hhhj6hhhNhNubah}(h]h ]h"]h$]h&]uh1johj2ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhj.ubj)}(hhh]h)}(h error messageh]h error message}(hjOhjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jkhjIhMhjubjl)}(h=``other_detail`` other driver-specific detail about the errorh](jr)}(h``other_detail``h]jp)}(hjmh]h other_detail}(hhhjohhhNhNubah}(h]h ]h"]h$]h&]uh1johjkubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjgubj)}(hhh]h)}(h,other driver-specific detail about the errorh]h,other driver-specific detail about the error}(hjhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jkhjhMhjubeh}(h]h ]h"]h$]h&]uh1jfhjoubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_get_dimm (C function)c.edac_get_dimmhNtauh1jhjQhhhNhNubj)}(hhh](j)}(h_struct dimm_info * edac_get_dimm (struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h]j)}(h]struct dimm_info *edac_get_dimm(struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h](j)}(hjh]hstruct}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMoubj)}(h h]h }(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMoubh)}(hhh]j)}(h dimm_infoh]h dimm_info}(hhhjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainj{reftype identifier reftargetjmodnameN classnameN c:parent_keysphinx.domains.c LookupKey)}data]j ASTIdentifier)}j edac_get_dimmsbc.edac_get_dimmasbuh1hhjhhhjhMoubj)}(h h]h }(hhhj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMoubhdesc_sig_punctuation)}(hjmh]h*}(hhhj hhhNhNubah}(h]h ]pah"]h$]h&]uh1j hjhhhjhMoubj)}(h edac_get_dimmh]j)}(hj h]h edac_get_dimm}(hhhj1 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj- ubah}(h]h ](j j eh"]h$]h&]jjuh1jhjhhhjhMoubhdesc_parameterlist)}(h>(struct mem_ctl_info *mci, int layer0, int layer1, int layer2)h](hdesc_parameter)}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hhhjP hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL ubj)}(h h]h }(hhhj] hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhjn hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetjp modnameN classnameNj j )}j ]j c.edac_get_dimmasbuh1hhjL ubj)}(h h]h }(hhhj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL ubj )}(hjmh]h*}(hhhj hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjL ubj)}(hmcih]hmci}(hhhj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjF ubjK )}(h int layer0h](hdesc_sig_keyword_type)}(hinth]hint}(hhhj hhhNhNubah}(h]h ]ktah"]h$]h&]uh1j hj ubj)}(h h]h }(hhhj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hlayer0h]hlayer0}(hhhj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjF ubjK )}(h int layer1h](j )}(hinth]hint}(hhhj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(h h]h }(hhhj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hlayer1h]hlayer1}(hhhj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjF ubjK )}(h int layer2h](j )}(hinth]hint}(hhhj-!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)!ubj)}(h h]h }(hhhj;!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)!ubj)}(hlayer2h]hlayer2}(hhhjI!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjF ubeh}(h]h ]h"]h$]h&]jjuh1jD hjhhhjhMoubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMoubah}(h]jah ](jjeh"]h$]h&]j!uh1jhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM~hjhhubj$)}(hhh]h)}(hOGet DIMM info from a memory controller given by [layer0,layer1,layer2] positionh]hOGet DIMM info from a memory controller given by [layer0,layer1,layer2] position}(hjv!hjt!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMnhjq!hhubah}(h]h ]h"]h$]h&]uh1j#hjhhhjhMoubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj!jFj!jGuh1jhhhjQhNhNubjI)}(hX**Parameters** ``struct mem_ctl_info *mci`` MC descriptor struct mem_ctl_info ``int layer0`` layer0 position ``int layer1`` layer1 position. Unused if n_layers < 2 ``int layer2`` layer2 position. Unused if n_layers < 3 **Description** For 1 layer, this function returns "dimms[layer0]"; For 2 layers, this function is similar to allocating a two-dimensional array and returning "dimms[layer0][layer1]"; For 3 layers, this function is similar to allocating a tri-dimensional array and returning "dimms[layer0][layer1][layer2]";h](h)}(h**Parameters**h]j\)}(hj!h]h Parameters}(hhhj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj!ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhj!ubjg)}(hhh](jl)}(h?``struct mem_ctl_info *mci`` MC descriptor struct mem_ctl_info h](jr)}(h``struct mem_ctl_info *mci``h]jp)}(hj!h]hstruct mem_ctl_info *mci}(hhhj!hhhNhNubah}(h]h ]h"]h$]h&]uh1johj!ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMqhj!ubj)}(hhh]h)}(h!MC descriptor struct mem_ctl_infoh]h!MC descriptor struct mem_ctl_info}(hj!hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMqhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jkhj!hMqhj!ubjl)}(h``int layer0`` layer0 position h](jr)}(h``int layer0``h]jp)}(hj!h]h int layer0}(hhhj!hhhNhNubah}(h]h ]h"]h$]h&]uh1johj!ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMrhj!ubj)}(hhh]h)}(hlayer0 positionh]hlayer0 position}(hj "hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMrhj"ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jkhj"hMrhj!ubjl)}(h7``int layer1`` layer1 position. Unused if n_layers < 2 h](jr)}(h``int layer1``h]jp)}(hj'"h]h int layer1}(hhhj)"hhhNhNubah}(h]h ]h"]h$]h&]uh1johj%"ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMshj!"ubj)}(hhh]h)}(h'layer1 position. Unused if n_layers < 2h]h'layer1 position. Unused if n_layers < 2}(hjB"hj@"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<"hMshj="ubah}(h]h ]h"]h$]h&]uh1jhj!"ubeh}(h]h ]h"]h$]h&]uh1jkhj<"hMshj!ubjl)}(h7``int layer2`` layer2 position. Unused if n_layers < 3 h](jr)}(h``int layer2``h]jp)}(hj`"h]h int layer2}(hhhjb"hhhNhNubah}(h]h ]h"]h$]h&]uh1johj^"ubah}(h]h ]h"]h$]h&]uh1jqhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMthjZ"ubj)}(hhh]h)}(h'layer2 position. Unused if n_layers < 3h]h'layer2 position. Unused if n_layers < 3}(hj{"hjy"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhju"hMthjv"ubah}(h]h ]h"]h$]h&]uh1jhjZ"ubeh}(h]h ]h"]h$]h&]uh1jkhju"hMthj!ubeh}(h]h ]h"]h$]h&]uh1jfhj!ubh)}(h**Description**h]j\)}(hj"h]h Description}(hhhj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj"ubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMvhj!ubh)}(h3For 1 layer, this function returns "dimms[layer0]";h]h7For 1 layer, this function returns “dimms[layer0]”;}(hj"hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMvhj!ubh)}(hsFor 2 layers, this function is similar to allocating a two-dimensional array and returning "dimms[layer0][layer1]";h]hwFor 2 layers, this function is similar to allocating a two-dimensional array and returning “dimms[layer0][layer1]”;}(hj"hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhMxhj!ubh)}(h{For 3 layers, this function is similar to allocating a tri-dimensional array and returning "dimms[layer0][layer1][layer2]";h]hFor 3 layers, this function is similar to allocating a tri-dimensional array and returning “dimms[layer0][layer1][layer2]”;}(hj"hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhU/var/lib/git/docbuild/linux/Documentation/driver-api/edac:128: ./include/linux/edac.hhM{hj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_alloc (C function)c.edac_mc_allochNtauh1jhjQhhhNhNubj)}(hhh](j)}(hstruct mem_ctl_info * edac_mc_alloc (unsigned int mc_num, unsigned int n_layers, struct edac_mc_layer *layers, unsigned int sz_pvt)h]j)}(hstruct mem_ctl_info *edac_mc_alloc(unsigned int mc_num, unsigned int n_layers, struct edac_mc_layer *layers, unsigned int sz_pvt)h](j)}(hjh]hstruct}(hhhj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKdubj)}(h h]h }(hhhj #hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhj #hKdubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj#modnameN classnameNj j )}j ]j )}j edac_mc_allocsbc.edac_mc_allocasbuh1hhj"hhhj #hKdubj)}(h h]h }(hhhj>#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhj #hKdubj )}(hjmh]h*}(hhhjL#hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj"hhhj #hKdubj)}(h edac_mc_alloch]j)}(hj;#h]h edac_mc_alloc}(hhhj]#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjY#ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj"hhhj #hKdubjE )}(h_(unsigned int mc_num, unsigned int n_layers, struct edac_mc_layer *layers, unsigned int sz_pvt)h](jK )}(hunsigned int mc_numh](j )}(hunsignedh]hunsigned}(hhhjx#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt#ubj)}(h h]h }(hhhj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjt#ubj )}(hinth]hint}(hhhj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt#ubj)}(h h]h }(hhhj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjt#ubj)}(hmc_numh]hmc_num}(hhhj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjt#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjp#ubjK )}(hunsigned int n_layersh](j )}(hunsignedh]hunsigned}(hhhj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(h h]h }(hhhj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj )}(hinth]hint}(hhhj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(h h]h }(hhhj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(hn_layersh]hn_layers}(hhhj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjp#ubjK )}(hstruct edac_mc_layer *layersh](j)}(hjh]hstruct}(hhhj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hhhj'$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(h edac_mc_layerh]h edac_mc_layer}(hhhj8$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5$ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj:$modnameN classnameNj j )}j ]j9#c.edac_mc_allocasbuh1hhj$ubj)}(h h]h }(hhhjV$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj )}(hjmh]h*}(hhhjd$hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj$ubj)}(hlayersh]hlayers}(hhhjq$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjp#ubjK )}(hunsigned int sz_pvth](j )}(hunsignedh]hunsigned}(hhhj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(h h]h }(hhhj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj )}(hinth]hint}(hhhj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(h h]h }(hhhj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(hsz_pvth]hsz_pvt}(hhhj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjp#ubeh}(h]h ]h"]h$]h&]jjuh1jD hj"hhhj #hKdubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj"hhhj #hKdubah}(h]j"ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhK}hj"hhubj$)}(hhh]h)}(h&h]h Description}(hhhj@&hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj<&ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKjhj3%ubh)}(hEverything is kmalloc'ed as one big chunk - more efficient. Only can be used if all structures have the same lifetime - otherwise you have to allocate and initialize your own structures.h]hEverything is kmalloc’ed as one big chunk - more efficient. Only can be used if all structures have the same lifetime - otherwise you have to allocate and initialize your own structures.}(hjV&hjT&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKkhj3%ubh)}(hDUse edac_mc_free() to free mc structures allocated by this function.h]hDUse edac_mc_free() to free mc structures allocated by this function.}(hje&hjc&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKohj3%ubhnote)}(hX^drivers handle multi-rank memories in different ways: in some drivers, one multi-rank memory stick is mapped as one entry, while, in others, a single multi-rank memory stick would be mapped into several entries. Currently, this function will allocate multiple struct dimm_info on such scenarios, as grouping the multiple ranks require drivers change.h]h)}(hX^drivers handle multi-rank memories in different ways: in some drivers, one multi-rank memory stick is mapped as one entry, while, in others, a single multi-rank memory stick would be mapped into several entries. Currently, this function will allocate multiple struct dimm_info on such scenarios, as grouping the multiple ranks require drivers change.h]hX^drivers handle multi-rank memories in different ways: in some drivers, one multi-rank memory stick is mapped as one entry, while, in others, a single multi-rank memory stick would be mapped into several entries. Currently, this function will allocate multiple struct dimm_info on such scenarios, as grouping the multiple ranks require drivers change.}(hjz&hjx&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKshjt&ubah}(h]h ]h"]h$]h&]uh1jr&hj3%ubh)}(h **Return**h]j\)}(hj&h]hReturn}(hhhj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj&ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKyhj3%ubh block_quote)}(hhh]h)}(hOOn success, return a pointer to struct mem_ctl_info pointer; ``NULL`` otherwiseh](h=On success, return a pointer to struct mem_ctl_info pointer; }(h=On success, return a pointer to struct mem_ctl_info pointer; hj&hhhNhNubjp)}(h``NULL``h]hNULL}(hhhj&hhhNhNubah}(h]h ]h"]h$]h&]uh1johj&ubh otherwise}(h otherwisehj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhK{hj&ubah}(h]h ]h"]h$]h&]uh1j&hj3%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_get_owner (C function)c.edac_get_ownerhNtauh1jhjQhhhNhNubj)}(hhh](j)}(h"const char * edac_get_owner (void)h]j)}(h const char *edac_get_owner(void)h](j)}(hconsth]hconst}(hhhj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhj'hKubj )}(hcharh]hchar}(hhhj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&hhhj'hKubj)}(h h]h }(hhhj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhj'hKubj )}(hjmh]h*}(hhhj,'hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj&hhhj'hKubj)}(hedac_get_ownerh]j)}(hedac_get_ownerh]hedac_get_owner}(hhhj='hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9'ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj&hhhj'hKubjE )}(h(void)h]jK )}(hvoidh]j )}(hvoidh]hvoid}(hhhjY'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU'ubah}(h]h ]h"]h$]h&]noemphjjuh1jJ hjQ'ubah}(h]h ]h"]h$]h&]jjuh1jD hj&hhhj'hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj&hhhj'hKubah}(h]j&ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj&hhubj$)}(hhh]h)}(h&Return the owner's mod_name of EDAC MCh]h(Return the owner’s mod_name of EDAC MC}(hj'hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj'hhubah}(h]h ]h"]h$]h&]uh1j#hj&hhhj'hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj'jFj'jGuh1jhhhjQhNhNubjI)}(h}**Parameters** ``void`` no arguments **Return** Pointer to mod_name string when EDAC MC is owned. NULL otherwise.h](h)}(h**Parameters**h]j\)}(hj'h]h Parameters}(hhhj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj'ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj'ubjg)}(hhh]jl)}(h``void`` no arguments h](jr)}(h``void``h]jp)}(hj'h]hvoid}(hhhj'hhhNhNubah}(h]h ]h"]h$]h&]uh1johj'ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj'ubj)}(hhh]h)}(h no argumentsh]h no arguments}(hj'hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hKhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jkhj'hKhj'ubah}(h]h ]h"]h$]h&]uh1jfhj'ubh)}(h **Return**h]j\)}(hj(h]hReturn}(hhhj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj'ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj'ubj&)}(hhh]h)}(hAPointer to mod_name string when EDAC MC is owned. NULL otherwise.h]hAPointer to mod_name string when EDAC MC is owned. NULL otherwise.}(hj(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj(ubah}(h]h ]h"]h$]h&]uh1j&hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_free (C function)c.edac_mc_freehNtauh1jhjQhhhNhNubj)}(hhh](j)}(h,void edac_mc_free (struct mem_ctl_info *mci)h]j)}(h+void edac_mc_free(struct mem_ctl_info *mci)h](j )}(hvoidh]hvoid}(hhhjN(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ(hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj](hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ(hhhj\(hKubj)}(h edac_mc_freeh]j)}(h edac_mc_freeh]h edac_mc_free}(hhhjo(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk(ubah}(h]h ](j j eh"]h$]h&]jjuh1jhjJ(hhhj\(hKubjE )}(h(struct mem_ctl_info *mci)h]jK )}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hhhj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(h h]h }(hhhj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj(modnameN classnameNj j )}j ]j )}jjq(sbc.edac_mc_freeasbuh1hhj(ubj)}(h h]h }(hhhj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj )}(hjmh]h*}(hhhj(hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj(ubj)}(hmcih]hmci}(hhhj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj(ubah}(h]h ]h"]h$]h&]jjuh1jD hjJ(hhhj\(hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjF(hhhj\(hKubah}(h]jA(ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjC(hhubj$)}(hhh]h)}(h.Frees a previously allocated **mci** structureh](hFrees a previously allocated }(hFrees a previously allocated hj)hhhNhNubj\)}(h**mci**h]hmci}(hhhj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj)ubh structure}(h structurehj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj )hhubah}(h]h ]h"]h$]h&]uh1j#hjC(hhhj\(hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj;)jFj;)jGuh1jhhhjQhNhNubjI)}(hY**Parameters** ``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structureh](h)}(h**Parameters**h]j\)}(hjE)h]h Parameters}(hhhjG)hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjC)ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj?)ubjg)}(hhh]jl)}(hG``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structureh](jr)}(h``struct mem_ctl_info *mci``h]jp)}(hjd)h]hstruct mem_ctl_info *mci}(hhhjf)hhhNhNubah}(h]h ]h"]h$]h&]uh1johjb)ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj^)ubj)}(hhh]h)}(h*pointer to a struct mem_ctl_info structureh]h*pointer to a struct mem_ctl_info structure}(hj)hj})hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjz)ubah}(h]h ]h"]h$]h&]uh1jhj^)ubeh}(h]h ]h"]h$]h&]uh1jkhjy)hKhj[)ubah}(h]h ]h"]h$]h&]uh1jfhj?)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_has_mcs (C function)c.edac_has_mcshNtauh1jhjQhhhNhNubj)}(hhh](j)}(hbool edac_has_mcs (void)h]j)}(hbool edac_has_mcs(void)h](j )}(hboolh]hbool}(hhhj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhj)hKubj)}(h edac_has_mcsh]j)}(h edac_has_mcsh]h edac_has_mcs}(hhhj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj)hhhj)hKubjE )}(h(void)h]jK )}(hvoidh]j )}(hvoidh]hvoid}(hhhj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]noemphjjuh1jJ hj)ubah}(h]h ]h"]h$]h&]jjuh1jD hj)hhhj)hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj)hhhj)hKubah}(h]j)ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj)hhubj$)}(hhh]h)}(h%Check if any MCs have been allocated.h]h%Check if any MCs have been allocated.}(hj(*hj&*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj#*hhubah}(h]h ]h"]h$]h&]uh1j#hj)hhhj)hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj>*jFj>*jGuh1jhhhjQhNhNubjI)}(h**Parameters** ``void`` no arguments **Return** True if MC instances have been registered successfully. False otherwise.h](h)}(h**Parameters**h]j\)}(hjH*h]h Parameters}(hhhjJ*hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjF*ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjB*ubjg)}(hhh]jl)}(h``void`` no arguments h](jr)}(h``void``h]jp)}(hjg*h]hvoid}(hhhji*hhhNhNubah}(h]h ]h"]h$]h&]uh1johje*ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhja*ubj)}(hhh]h)}(h no argumentsh]h no arguments}(hj*hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|*hKhj}*ubah}(h]h ]h"]h$]h&]uh1jhja*ubeh}(h]h ]h"]h$]h&]uh1jkhj|*hKhj^*ubah}(h]h ]h"]h$]h&]uh1jfhjB*ubh)}(h **Return**h]j\)}(hj*h]hReturn}(hhhj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj*ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjB*ubj&)}(hhh]h)}(hHTrue if MC instances have been registered successfully. False otherwise.h]hHTrue if MC instances have been registered successfully. False otherwise.}(hj*hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj*ubah}(h]h ]h"]h$]h&]uh1j&hjB*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_find (C function)c.edac_mc_findhNtauh1jhjQhhhNhNubj)}(hhh](j)}(h,struct mem_ctl_info * edac_mc_find (int idx)h]j)}(h*struct mem_ctl_info *edac_mc_find(int idx)h](j)}(hjh]hstruct}(hhhj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhj*hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj +ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj+modnameN classnameNj j )}j ]j )}j edac_mc_findsbc.edac_mc_findasbuh1hhj*hhhj*hKubj)}(h h]h }(hhhj0+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhj*hKubj )}(hjmh]h*}(hhhj>+hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj*hhhj*hKubj)}(h edac_mc_findh]j)}(hj-+h]h edac_mc_find}(hhhjO+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjK+ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj*hhhj*hKubjE )}(h (int idx)h]jK )}(hint idxh](j )}(hinth]hint}(hhhjj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf+ubj)}(h h]h }(hhhjx+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf+ubj)}(hidxh]hidx}(hhhj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjb+ubah}(h]h ]h"]h$]h&]jjuh1jD hj*hhhj*hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj*hhhj*hKubah}(h]j*ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj*hhubj$)}(hhh]h)}(h;Search for a mem_ctl_info structure whose index is **idx**.h](h3Search for a mem_ctl_info structure whose index is }(h3Search for a mem_ctl_info structure whose index is hj+hhhNhNubj\)}(h**idx**h]hidx}(hhhj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj+ubh.}(hjhj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj+hhubah}(h]h ]h"]h$]h&]uh1j#hj*hhhj*hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj+jFj+jGuh1jhhhjQhNhNubjI)}(h**Parameters** ``int idx`` index to be seek **Description** If found, return a pointer to the structure. Else return NULL.h](h)}(h**Parameters**h]j\)}(hj+h]h Parameters}(hhhj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj+ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj+ubjg)}(hhh]jl)}(h``int idx`` index to be seek h](jr)}(h ``int idx``h]jp)}(hj,h]hint idx}(hhhj,hhhNhNubah}(h]h ]h"]h$]h&]uh1johj,ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj+ubj)}(hhh]h)}(hindex to be seekh]hindex to be seek}(hj ,hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jkhj,hKhj+ubah}(h]h ]h"]h$]h&]uh1jfhj+ubh)}(h**Description**h]j\)}(hj@,h]h Description}(hhhjB,hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj>,ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj+ubh)}(h>If found, return a pointer to the structure. Else return NULL.h]h>If found, return a pointer to the structure. Else return NULL.}(hjX,hjV,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jfind_mci_by_dev (C function)c.find_mci_by_devhNtauh1jhjQhhhNhNubj)}(hhh](j)}(h:struct mem_ctl_info * find_mci_by_dev (struct device *dev)h]j)}(h8struct mem_ctl_info *find_mci_by_dev(struct device *dev)h](j)}(hjh]hstruct}(hhhj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj,modnameN classnameNj j )}j ]j )}jfind_mci_by_devsbc.find_mci_by_devasbuh1hhj,hhhj,hKubj)}(h h]h }(hhhj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hKubj )}(hjmh]h*}(hhhj,hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj,hhhj,hKubj)}(hfind_mci_by_devh]j)}(hj,h]hfind_mci_by_dev}(hhhj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj,hhhj,hKubjE )}(h(struct device *dev)h]jK )}(hstruct device *devh](j)}(hjh]hstruct}(hhhj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hhhj -hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(hdeviceh]hdevice}(hhhj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj-modnameN classnameNj j )}j ]j,c.find_mci_by_devasbuh1hhj,ubj)}(h h]h }(hhhj;-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj )}(hjmh]h*}(hhhjI-hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj,ubj)}(hdevh]hdev}(hhhjV-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj,ubah}(h]h ]h"]h$]h&]jjuh1jD hj,hhhj,hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj},hhhj,hKubah}(h]jx,ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhjz,hhubj$)}(hhh]h)}(hMScan list of controllers looking for the one that manages the **dev** device.h](h>Scan list of controllers looking for the one that manages the }(h>Scan list of controllers looking for the one that manages the hj-hhhNhNubj\)}(h**dev**h]hdev}(hhhj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj-ubh device.}(h device.hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj~-hhubah}(h]h ]h"]h$]h&]uh1j#hjz,hhhj,hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj-jFj-jGuh1jhhhjQhNhNubjI)}(h**Parameters** ``struct device *dev`` pointer to a struct device related with the MCI **Return** on success, returns a pointer to struct :c:type:`mem_ctl_info`; ``NULL`` otherwise.h](h)}(h**Parameters**h]j\)}(hj-h]h Parameters}(hhhj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj-ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj-ubjg)}(hhh]jl)}(hG``struct device *dev`` pointer to a struct device related with the MCI h](jr)}(h``struct device *dev``h]jp)}(hj-h]hstruct device *dev}(hhhj-hhhNhNubah}(h]h ]h"]h$]h&]uh1johj-ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj-ubj)}(hhh]h)}(h/pointer to a struct device related with the MCIh]h/pointer to a struct device related with the MCI}(hj-hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jkhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jfhj-ubh)}(h **Return**h]j\)}(hj.h]hReturn}(hhhj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj.ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj-ubh)}(hSon success, returns a pointer to struct :c:type:`mem_ctl_info`; ``NULL`` otherwise.h](h(on success, returns a pointer to struct }(h(on success, returns a pointer to struct hj'.hhhNhNubh)}(h:c:type:`mem_ctl_info`h]jp)}(hj2.h]h mem_ctl_info}(hhhj4.hhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johj0.ubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%j )}j ]sbj mem_ctl_infouh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj'.ubh; }(h; hj'.hhhNhNubjp)}(h``NULL``h]hNULL}(hhhjX.hhhNhNubah}(h]h ]h"]h$]h&]uh1johj'.ubh otherwise.}(h otherwise.hj'.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjR.hKhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](jedac_mc_del_mc (C function)c.edac_mc_del_mchNtauh1jhjQhhhNhNubj)}(hhh](j)}(h9struct mem_ctl_info * edac_mc_del_mc (struct device *dev)h]j)}(h7struct mem_ctl_info *edac_mc_del_mc(struct device *dev)h](j)}(hjh]hstruct}(hhhj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhj.hKubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj.modnameN classnameNj j )}j ]j )}jedac_mc_del_mcsbc.edac_mc_del_mcasbuh1hhj.hhhj.hKubj)}(h h]h }(hhhj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhj.hKubj )}(hjmh]h*}(hhhj.hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj.hhhj.hKubj)}(hedac_mc_del_mch]j)}(hj.h]hedac_mc_del_mc}(hhhj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj.hhhj.hKubjE )}(h(struct device *dev)h]jK )}(hstruct device *devh](j)}(hjh]hstruct}(hhhj /hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hhhj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(hdeviceh]hdevice}(hhhj)/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&/ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj+/modnameN classnameNj j )}j ]j.c.edac_mc_del_mcasbuh1hhj/ubj)}(h h]h }(hhhjG/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj )}(hjmh]h*}(hhhjU/hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj/ubj)}(hdevh]hdev}(hhhjb/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj/ubah}(h]h ]h"]h$]h&]jjuh1jD hj.hhhj.hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj.hhhj.hKubah}(h]j.ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj.hhubj$)}(hhh]h)}(hiRemove sysfs entries for mci structure associated with **dev** and remove mci structure from global list.h](h7Remove sysfs entries for mci structure associated with }(h7Remove sysfs entries for mci structure associated with hj/hhhNhNubj\)}(h**dev**h]hdev}(hhhj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj/ubh+ and remove mci structure from global list.}(h+ and remove mci structure from global list.hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj/hhubah}(h]h ]h"]h$]h&]uh1j#hj.hhhj.hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj/jFj/jGuh1jhhhjQhNhNubjI)}(h**Parameters** ``struct device *dev`` Pointer to struct :c:type:`device` representing mci structure to remove. **Return** pointer to removed mci structure, or ``NULL`` if device not found.h](h)}(h**Parameters**h]j\)}(hj/h]h Parameters}(hhhj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj/ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj/ubjg)}(hhh]jl)}(h```struct device *dev`` Pointer to struct :c:type:`device` representing mci structure to remove. h](jr)}(h``struct device *dev``h]jp)}(hj/h]hstruct device *dev}(hhhj/hhhNhNubah}(h]h ]h"]h$]h&]uh1johj/ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj/ubj)}(hhh]h)}(hHPointer to struct :c:type:`device` representing mci structure to remove.h](hPointer to struct }(hPointer to struct hj/hhhNhNubh)}(h:c:type:`device`h]jp)}(hj0h]hdevice}(hhhj0hhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jdeviceuh1hhj/hKhj/ubh& representing mci structure to remove.}(h& representing mci structure to remove.hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hKhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jkhj/hKhj/ubah}(h]h ]h"]h$]h&]uh1jfhj/ubh)}(h **Return**h]j\)}(hjB0h]hReturn}(hhhjD0hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj@0ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj/ubh)}(hBpointer to removed mci structure, or ``NULL`` if device not found.h](h%pointer to removed mci structure, or }(h%pointer to removed mci structure, or hjX0hhhNhNubjp)}(h``NULL``h]hNULL}(hhhja0hhhNhNubah}(h]h ]h"]h$]h&]uh1johjX0ubh if device not found.}(h if device not found.hjX0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j'edac_mc_find_csrow_by_page (C function)c.edac_mc_find_csrow_by_pagehNtauh1jhjQhhhNhNubj)}(hhh](j)}(hMint edac_mc_find_csrow_by_page (struct mem_ctl_info *mci, unsigned long page)h]j)}(hLint edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)h](j )}(hinth]hint}(hhhj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKubj)}(h h]h }(hhhj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhj0hKubj)}(hedac_mc_find_csrow_by_pageh]j)}(hedac_mc_find_csrow_by_pageh]hedac_mc_find_csrow_by_page}(hhhj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj0hhhj0hKubjE )}(h.(struct mem_ctl_info *mci, unsigned long page)h](jK )}(hstruct mem_ctl_info *mcih](j)}(hjh]hstruct}(hhhj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hhhj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubh)}(hhh]j)}(h mem_ctl_infoh]h mem_ctl_info}(hhhj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj0modnameN classnameNj j )}j ]j )}jj0sbc.edac_mc_find_csrow_by_pageasbuh1hhj0ubj)}(h h]h }(hhhj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj )}(hjmh]h*}(hhhj$1hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj0ubj)}(hmcih]hmci}(hhhj11hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj0ubjK )}(hunsigned long pageh](j )}(hunsignedh]hunsigned}(hhhjJ1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjF1ubj)}(h h]h }(hhhjX1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF1ubj )}(hlongh]hlong}(hhhjf1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjF1ubj)}(h h]h }(hhhjt1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF1ubj)}(hpageh]hpage}(hhhj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF1ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj0ubeh}(h]h ]h"]h$]h&]jjuh1jD hj0hhhj0hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj0hhhj0hKubah}(h]j0ah ](jjeh"]h$]h&]j!uh1jhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj0hhubj$)}(hhh]h)}(h@Ancillary routine to identify what csrow contains a memory page.h]h@Ancillary routine to identify what csrow contains a memory page.}(hj1hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj1hhubah}(h]h ]h"]h$]h&]uh1j#hj0hhhj0hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj1jFj1jGuh1jhhhjQhNhNubjI)}(h**Parameters** ``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structure ``unsigned long page`` memory page to find **Return** on success, returns the csrow. -1 if not found.h](h)}(h**Parameters**h]j\)}(hj1h]h Parameters}(hhhj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj1ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj1ubjg)}(hhh](jl)}(hH``struct mem_ctl_info *mci`` pointer to a struct mem_ctl_info structure h](jr)}(h``struct mem_ctl_info *mci``h]jp)}(hj1h]hstruct mem_ctl_info *mci}(hhhj1hhhNhNubah}(h]h ]h"]h$]h&]uh1johj1ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj1ubj)}(hhh]h)}(h*pointer to a struct mem_ctl_info structureh]h*pointer to a struct mem_ctl_info structure}(hj 2hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hKhj2ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jkhj2hKhj1ubjl)}(h+``unsigned long page`` memory page to find h](jr)}(h``unsigned long page``h]jp)}(hj'2h]hunsigned long page}(hhhj)2hhhNhNubah}(h]h ]h"]h$]h&]uh1johj%2ubah}(h]h ]h"]h$]h&]uh1jqhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj!2ubj)}(hhh]h)}(hmemory page to findh]hmemory page to find}(hjB2hj@2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<2hKhj=2ubah}(h]h ]h"]h$]h&]uh1jhj!2ubeh}(h]h ]h"]h$]h&]uh1jkhj<2hKhj1ubeh}(h]h ]h"]h$]h&]uh1jfhj1ubh)}(h **Return**h]j\)}(hjb2h]hReturn}(hhhjd2hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj`2ubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj1ubh)}(h/on success, returns the csrow. -1 if not found.h]h/on success, returns the csrow. -1 if not found.}(hjz2hjx2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhW/var/lib/git/docbuild/linux/Documentation/driver-api/edac:130: ./drivers/edac/edac_mc.hhKhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhjQhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j%edac_raw_mc_handle_error (C function)c.edac_raw_mc_handle_errorhNtauh1jhjQhhhNhNubj)}(hhh](j)}(h=void edac_raw_mc_handle_error (struct edac_raw_error_desc *e)h]j)}(hsize of the private info at struct :c:type:`edac_pci_ctl_info`h](h#size of the private info at struct }(h#size of the private info at struct hj=hhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jp)}(hj=h]hedac_pci_ctl_info}(hhhj=hhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_pci_ctl_infouh1hhj=hKhj=ubeh}(h]h ]h"]h$]h&]uh1hhj=hKhj=ubah}(h]h ]h"]h$]h&]uh1jhjt=ubeh}(h]h ]h"]h$]h&]uh1jkhj=hKhjq=ubjl)}(h5``const char *edac_pci_name`` name of the PCI device h](jr)}(h``const char *edac_pci_name``h]jp)}(hj=h]hconst char *edac_pci_name}(hhhj=hhhNhNubah}(h]h ]h"]h$]h&]uh1johj=ubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj=ubj)}(hhh]h)}(hname of the PCI deviceh]hname of the PCI device}(hj=hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hKhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jkhj=hKhjq=ubeh}(h]h ]h"]h$]h&]uh1jfhjU=ubh)}(h**Description**h]j\)}(hj>h]h Description}(hhhj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj >ubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjU=ubh)}(hpThe chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE.h]hpThe chip driver will allocate one of these for each edac_pci it is going to control/register with the EDAC CORE.}(hj&>hj$>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjU=ubh)}(h **Return**h]j\)}(hj5>h]hReturn}(hhhj7>hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj3>ubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjU=ubh)}(hOa pointer to struct :c:type:`edac_pci_ctl_info` on success; ``NULL`` otherwise.h](ha pointer to struct }(ha pointer to struct hjK>hhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jp)}(hjV>h]hedac_pci_ctl_info}(hhhjX>hhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johjT>ubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_pci_ctl_infouh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjK>ubh on success; }(h on success; hjK>hhhNhNubjp)}(h``NULL``h]hNULL}(hhhjy>hhhNhNubah}(h]h ]h"]h$]h&]uh1johjK>ubh otherwise.}(h otherwise.hjK>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjs>hKhjU=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj~;hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_pci_free_ctl_info (C function)c.edac_pci_free_ctl_infohNtauh1jhj~;hhhNhNubj)}(hhh](j)}(h;void edac_pci_free_ctl_info (struct edac_pci_ctl_info *pci)h]j)}(h:void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)h](j )}(hvoidh]hvoid}(hhhj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hhhj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhj>hKubj)}(hedac_pci_free_ctl_infoh]j)}(hedac_pci_free_ctl_infoh]hedac_pci_free_ctl_info}(hhhj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ](j j eh"]h$]h&]jjuh1jhj>hhhj>hKubjE )}(h(struct edac_pci_ctl_info *pci)h]jK )}(hstruct edac_pci_ctl_info *pcih](j)}(hjh]hstruct}(hhhj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hhhj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hhhj ?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?ubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj?modnameN classnameNj j )}j ]j )}jj>sbc.edac_pci_free_ctl_infoasbuh1hhj>ubj)}(h h]h }(hhhj-?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj )}(hjmh]h*}(hhhj;?hhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj>ubj)}(hpcih]hpci}(hhhjH?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj>ubah}(h]h ]h"]h$]h&]jjuh1jD hj>hhhj>hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>hhhj>hKubah}(h]j>ah ](jjeh"]h$]h&]j!uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj>hhubj$)}(hhh]h)}(h)Last action on the pci control structure.h]h)Last action on the pci control structure.}(hju?hjs?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjp?hhubah}(h]h ]h"]h$]h&]uh1j#hj>hhhj>hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj?jFj?jGuh1jhhhj~;hNhNubjI)}(hX1**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** Calls the remove sysfs information, which will unregister this control struct's kobj. When that kobj's ref count goes to zero, its release function will be call and then kfree() the memory.h](h)}(h**Parameters**h]j\)}(hj?h]h Parameters}(hhhj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj?ubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj?ubjg)}(hhh]jl)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jr)}(h!``struct edac_pci_ctl_info *pci``h]jp)}(hj?h]hstruct edac_pci_ctl_info *pci}(hhhj?hhhNhNubah}(h]h ]h"]h$]h&]uh1johj?ubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj?ubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hpointer to struct hj?hhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jp)}(hj?h]hedac_pci_ctl_info}(hhhj?hhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_pci_ctl_infouh1hhj?hKhj?ubeh}(h]h ]h"]h$]h&]uh1hhj?hKhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jkhj?hKhj?ubah}(h]h ]h"]h$]h&]uh1jfhj?ubh)}(h**Description**h]j\)}(hj@h]h Description}(hhhj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj @ubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj?ubh)}(hCalls the remove sysfs information, which will unregister this control struct's kobj. When that kobj's ref count goes to zero, its release function will be call and then kfree() the memory.h]hCalls the remove sysfs information, which will unregister this control struct’s kobj. When that kobj’s ref count goes to zero, its release function will be call and then kfree() the memory.}(hj'@hj%@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj~;hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j!edac_pci_alloc_index (C function)c.edac_pci_alloc_indexhNtauh1jhj~;hhhNhNubj)}(hhh](j)}(hint edac_pci_alloc_index (void)h]j)}(hint edac_pci_alloc_index(void)h](j )}(hinth]hint}(hhhjT@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjP@hhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hhhjc@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP@hhhjb@hKubj)}(hedac_pci_alloc_indexh]j)}(hedac_pci_alloc_indexh]hedac_pci_alloc_index}(hhhju@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq@ubah}(h]h ](j j eh"]h$]h&]jjuh1jhjP@hhhjb@hKubjE )}(h(void)h]jK )}(hvoidh]j )}(hvoidh]hvoid}(hhhj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]noemphjjuh1jJ hj@ubah}(h]h ]h"]h$]h&]jjuh1jD hjP@hhhjb@hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjL@hhhjb@hKubah}(h]jG@ah ](jjeh"]h$]h&]j!uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjI@hhubj$)}(hhh]h)}(h"Allocate a unique PCI index numberh]h"Allocate a unique PCI index number}(hj@hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj@hhubah}(h]h ]h"]h$]h&]uh1j#hjI@hhhjb@hKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj@jFj@jGuh1jhhhj~;hNhNubjI)}(hR**Parameters** ``void`` no arguments **Return** allocated index numberh](h)}(h**Parameters**h]j\)}(hj@h]h Parameters}(hhhj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj@ubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj@ubjg)}(hhh]jl)}(h``void`` no arguments h](jr)}(h``void``h]jp)}(hj@h]hvoid}(hhhj@hhhNhNubah}(h]h ]h"]h$]h&]uh1johj@ubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj@ubj)}(hhh]h)}(h no argumentsh]h no arguments}(hjAhjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKhjAubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jkhjAhKhj@ubah}(h]h ]h"]h$]h&]uh1jfhj@ubh)}(h **Return**h]j\)}(hj8Ah]hReturn}(hhhj:AhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj6Aubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj@ubj&)}(hhh]h)}(hallocated index numberh]hallocated index number}(hjSAhjQAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjNAubah}(h]h ]h"]h$]h&]uh1j&hj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj~;hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j edac_pci_add_device (C function)c.edac_pci_add_devicehNtauh1jhj~;hhhNhNubj)}(hhh](j)}(hEint edac_pci_add_device (struct edac_pci_ctl_info *pci, int edac_idx)h]j)}(hDint edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)h](j )}(hinth]hint}(hhhjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hhhjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhjAhKubj)}(hedac_pci_add_deviceh]j)}(hedac_pci_add_deviceh]hedac_pci_add_device}(hhhjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ](j j eh"]h$]h&]jjuh1jhjAhhhjAhKubjE )}(h-(struct edac_pci_ctl_info *pci, int edac_idx)h](jK )}(hstruct edac_pci_ctl_info *pcih](j)}(hjh]hstruct}(hhhjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hhhjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hhhjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetjAmodnameN classnameNj j )}j ]j )}jjAsbc.edac_pci_add_deviceasbuh1hhjAubj)}(h h]h }(hhhjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj )}(hjmh]h*}(hhhjBhhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjAubj)}(hpcih]hpci}(hhhjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjAubjK )}(h int edac_idxh](j )}(hinth]hint}(hhhj5BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1Bubj)}(h h]h }(hhhjCBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Bubj)}(hedac_idxh]hedac_idx}(hhhjQBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Bubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjAubeh}(h]h ]h"]h$]h&]jjuh1jD hjAhhhjAhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj~AhhhjAhKubah}(h]jyAah ](jjeh"]h$]h&]j!uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhj{Ahhubj$)}(hhh]h)}(hzInsert the 'edac_dev' structure into the edac_pci global list and create sysfs entries associated with edac_pci structure.h]h~Insert the ‘edac_dev’ structure into the edac_pci global list and create sysfs entries associated with edac_pci structure.}(hj~Bhj|BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjyBhhubah}(h]h ]h"]h$]h&]uh1j#hj{AhhhjAhKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEjBjFjBjGuh1jhhhj~;hNhNubjI)}(hX **Parameters** ``struct edac_pci_ctl_info *pci`` pointer to the edac_device structure to be added to the list ``int edac_idx`` A unique numeric identifier to be assigned to the 'edac_pci' structure. **Return** 0 on Success, or an error code on failureh](h)}(h**Parameters**h]j\)}(hjBh]h Parameters}(hhhjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjBubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBubjg)}(hhh](jl)}(h_``struct edac_pci_ctl_info *pci`` pointer to the edac_device structure to be added to the list h](jr)}(h!``struct edac_pci_ctl_info *pci``h]jp)}(hjBh]hstruct edac_pci_ctl_info *pci}(hhhjBhhhNhNubah}(h]h ]h"]h$]h&]uh1johjBubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBubj)}(hhh]h)}(hIjFj>IjGuh1jhhhj~;hNhNubjI)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** The release function of a generic EDAC PCI polling deviceh](h)}(h**Parameters**h]j\)}(hjHIh]h Parameters}(hhhjJIhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjFIubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBIubjg)}(hhh]jl)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jr)}(h!``struct edac_pci_ctl_info *pci``h]jp)}(hjgIh]hstruct edac_pci_ctl_info *pci}(hhhjiIhhhNhNubah}(h]h ]h"]h$]h&]uh1johjeIubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjaIubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hpointer to struct hjIhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jp)}(hjIh]hedac_pci_ctl_info}(hhhjIhhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johjIubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_pci_ctl_infouh1hhj|IhKhjIubeh}(h]h ]h"]h$]h&]uh1hhj|IhKhj}Iubah}(h]h ]h"]h$]h&]uh1jhjaIubeh}(h]h ]h"]h$]h&]uh1jkhj|IhKhj^Iubah}(h]h ]h"]h$]h&]uh1jfhjBIubh)}(h**Description**h]j\)}(hjIh]h Description}(hhhjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjIubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjBIubj&)}(hhh]h)}(h9The release function of a generic EDAC PCI polling deviceh]h9The release function of a generic EDAC PCI polling device}(hjIhjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjIubah}(h]h ]h"]h$]h&]uh1j&hjBIubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj~;hhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j"edac_pci_create_sysfs (C function)c.edac_pci_create_sysfshNtauh1jhj~;hhhNhNubj)}(hhh](j)}(h9int edac_pci_create_sysfs (struct edac_pci_ctl_info *pci)h]j)}(h8int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)h](j )}(hinth]hint}(hhhjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj JhhhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKubj)}(h h]h }(hhhjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj JhhhjJhKubj)}(hedac_pci_create_sysfsh]j)}(hedac_pci_create_sysfsh]hedac_pci_create_sysfs}(hhhj1JhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-Jubah}(h]h ](j j eh"]h$]h&]jjuh1jhj JhhhjJhKubjE )}(h(struct edac_pci_ctl_info *pci)h]jK )}(hstruct edac_pci_ctl_info *pcih](j)}(hjh]hstruct}(hhhjMJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIJubj)}(h h]h }(hhhjZJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIJubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hhhjkJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhJubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetjmJmodnameN classnameNj j )}j ]j )}jj3Jsbc.edac_pci_create_sysfsasbuh1hhjIJubj)}(h h]h }(hhhjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIJubj )}(hjmh]h*}(hhhjJhhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjIJubj)}(hpcih]hpci}(hhhjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIJubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjEJubah}(h]h ]h"]h$]h&]jjuh1jD hj JhhhjJhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjJhhhjJhKubah}(h]jJah ](jjeh"]h$]h&]j!uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjJhhubj$)}(hhh]h}(h]h ]h"]h$]h&]uh1j#hjJhhhjJhKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEjJjFjJjGuh1jhhhj~;hNhNubjI)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** Create the controls/attributes for the specified EDAC PCI deviceh](h)}(h**Parameters**h]j\)}(hjJh]h Parameters}(hhhjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjJubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjJubjg)}(hhh]jl)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jr)}(h!``struct edac_pci_ctl_info *pci``h]jp)}(hjKh]hstruct edac_pci_ctl_info *pci}(hhhjKhhhNhNubah}(h]h ]h"]h$]h&]uh1johjKubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhKhjJubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hpointer to struct hjKhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jp)}(hj'Kh]hedac_pci_ctl_info}(hhhj)KhhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johj%Kubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_pci_ctl_infouh1hhjKhKhjKubeh}(h]h ]h"]h$]h&]uh1hhjKhKhjKubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jkhjKhKhjJubah}(h]h ]h"]h$]h&]uh1jfhjJubh)}(h**Description**h]j\)}(hj^Kh]h Description}(hhhj`KhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj\Kubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjJubj&)}(hhh]h)}(h@Create the controls/attributes for the specified EDAC PCI deviceh]h@Create the controls/attributes for the specified EDAC PCI device}(hjyKhjwKhhhNhNubah}(h]h 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]jah"]h$]h&]uh1jhjKubh)}(hhh]j)}(hedac_pci_ctl_infoh]hedac_pci_ctl_info}(hhhjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj LmodnameN classnameNj j )}j ]j )}jjKsbc.edac_pci_remove_sysfsasbuh1hhjKubj)}(h h]h }(hhhj'LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj )}(hjmh]h*}(hhhj5LhhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjKubj)}(hpcih]hpci}(hhhjBLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjKubah}(h]h ]h"]h$]h&]jjuh1jD hjKhhhjKhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjKhhhjKhMubah}(h]jKah ](jjeh"]h$]h&]j!uh1jhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjKhhubj$)}(hhh]h}(h]h ]h"]h$]h&]uh1j#hjKhhhjKhMubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEjvLjFjvLjGuh1jhhhj~;hNhNubjI)}(h**Parameters** ``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` **Description** remove the controls and attributes for this EDAC PCI deviceh](h)}(h**Parameters**h]j\)}(hjLh]h Parameters}(hhhjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj~Lubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjzLubjg)}(hhh]jl)}(hP``struct edac_pci_ctl_info *pci`` pointer to struct :c:type:`edac_pci_ctl_info` h](jr)}(h!``struct edac_pci_ctl_info *pci``h]jp)}(hjLh]hstruct edac_pci_ctl_info *pci}(hhhjLhhhNhNubah}(h]h ]h"]h$]h&]uh1johjLubah}(h]h ]h"]h$]h&]uh1jqhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjLubj)}(hhh]h)}(h-pointer to struct :c:type:`edac_pci_ctl_info`h](hpointer to struct }(hpointer to struct hjLhhhNhNubh)}(h:c:type:`edac_pci_ctl_info`h]jp)}(hjLh]hedac_pci_ctl_info}(hhhjLhhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johjLubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_pci_ctl_infouh1hhjLhMhjLubeh}(h]h ]h"]h$]h&]uh1hhjLhMhjLubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jkhjLhMhjLubah}(h]h ]h"]h$]h&]uh1jfhjzLubh)}(h**Description**h]j\)}(hjLh]h Description}(hhhjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjLubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjzLubj&)}(hhh]h)}(h;remove the controls and attributes for this EDAC PCI deviceh]h;remove the controls and attributes for this EDAC PCI device}(hjMhjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhX/var/lib/git/docbuild/linux/Documentation/driver-api/edac:139: ./drivers/edac/edac_pci.hhMhjMubah}(h]h ]h"]h$]h&]uh1j&hjzLubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj~;hhhNhNubeh}(h]pci-controllersah ]h"]pci controllersah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h EDAC Blocksh]h EDAC Blocks}(hj mc/ cpu/cpu0/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count cpu/cpu1/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count ... the L1 and L2 directories would be "edac_device_block's"h]hX/sys/devices/system/edac/.. pci/ mc/ cpu/cpu0/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count cpu/cpu1/.. /L1-cache/ce_count /ue_count /L2-cache/ce_count /ue_count ... the L1 and L2 directories would be "edac_device_block's"}(hhhjNubah}(h]h ]h"]h$]h&]jjuh1jhhhKhj7Mhhubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_device_add_device (C function)c.edac_device_add_devicehNtauh1jhj7MhhhNhNubj)}(hhh](j)}(hBint edac_device_add_device (struct edac_device_ctl_info *edac_dev)h]j)}(hAint edac_device_add_device(struct edac_device_ctl_info *edac_dev)h](j )}(hinth]hint}(hhhjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKubj)}(h h]h }(hhhjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhjOhKubj)}(hedac_device_add_deviceh]j)}(hedac_device_add_deviceh]hedac_device_add_device}(hhhj"OhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ](j j eh"]h$]h&]jjuh1jhjNhhhjOhKubjE )}(h'(struct edac_device_ctl_info *edac_dev)h]jK )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjh]hstruct}(hhhj>OhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:Oubj)}(h h]h }(hhhjKOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:Oubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hhhj\OhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYOubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj^OmodnameN classnameNj j )}j ]j )}jj$Osbc.edac_device_add_deviceasbuh1hhj:Oubj)}(h h]h }(hhhj|OhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:Oubj )}(hjmh]h*}(hhhjOhhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hj:Oubj)}(hedac_devh]hedac_dev}(hhhjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:Oubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hj6Oubah}(h]h ]h"]h$]h&]jjuh1jD hjNhhhjOhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjNhhhjOhKubah}(h]jNah ](jjeh"]h$]h&]j!uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjNhhubj$)}(hhh]h)}(hInsert the 'edac_dev' structure into the edac_device global list and create sysfs entries associated with edac_device structure.h]hInsert the ‘edac_dev’ structure into the edac_device global list and create sysfs entries associated with edac_device structure.}(hjOhjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjOhhubah}(h]h ]h"]h$]h&]uh1j#hjNhhhjOhKubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEjOjFjOjGuh1jhhhj7MhNhNubjI)}(h**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to edac_device structure to be added to the list 'edac_device' structure. **Return** 0 on Success, or an error code on failureh](h)}(h**Parameters**h]j\)}(hjOh]h Parameters}(hhhjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjOubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjOubjg)}(hhh]jl)}(h|``struct edac_device_ctl_info *edac_dev`` pointer to edac_device structure to be added to the list 'edac_device' structure. h](jr)}(h)``struct edac_device_ctl_info *edac_dev``h]jp)}(hjPh]h%struct edac_device_ctl_info *edac_dev}(hhhjPhhhNhNubah}(h]h ]h"]h$]h&]uh1johjPubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjOubj)}(hhh]h)}(hQpointer to edac_device structure to be added to the list 'edac_device' structure.h]hUpointer to edac_device structure to be added to the list ‘edac_device’ structure.}(hjPhjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjPubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jkhjPhKhjOubah}(h]h ]h"]h$]h&]uh1jfhjOubh)}(h **Return**h]j\)}(hj?Ph]hReturn}(hhhjAPhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj=Pubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhKhjOubj&)}(hhh]h)}(h)0 on Success, or an error code on failureh]h)0 on Success, or an error code on failure}(hjZPhjXPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjUPubah}(h]h ]h"]h$]h&]uh1j&hjOubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj7MhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j#edac_device_del_device (C function)c.edac_device_del_devicehNtauh1jhj7MhhhNhNubj)}(hhh](j)}(hIstruct edac_device_ctl_info * edac_device_del_device (struct device *dev)h]j)}(hGstruct edac_device_ctl_info *edac_device_del_device(struct device *dev)h](j)}(hjh]hstruct}(hhhjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hhhjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhjPhMubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hhhjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetjPmodnameN classnameNj j )}j ]j )}jedac_device_del_devicesbc.edac_device_del_deviceasbuh1hhjPhhhjPhMubj)}(h h]h }(hhhjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhjPhMubj )}(hjmh]h*}(hhhjPhhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjPhhhjPhMubj)}(hedac_device_del_deviceh]j)}(hjPh]hedac_device_del_device}(hhhjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ](j j eh"]h$]h&]jjuh1jhjPhhhjPhMubjE )}(h(struct device *dev)h]jK )}(hstruct device *devh](j)}(hjh]hstruct}(hhhjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hhhjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubh)}(hhh]j)}(hdeviceh]hdevice}(hhhj%QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"Qubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetj'QmodnameN classnameNj j )}j ]jPc.edac_device_del_deviceasbuh1hhjQubj)}(h h]h }(hhhjCQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj )}(hjmh]h*}(hhhjQQhhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjQubj)}(hdevh]hdev}(hhhj^QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjPubah}(h]h ]h"]h$]h&]jjuh1jD hjPhhhjPhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjPhhhjPhMubah}(h]jPah ](jjeh"]h$]h&]j!uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjPhhubj$)}(hhh]h)}(hoRemove sysfs entries for specified edac_device structure and then remove edac_device structure from global listh]hoRemove sysfs entries for specified edac_device structure and then remove edac_device structure from global list}(hjQhjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjQhhubah}(h]h ]h"]h$]h&]uh1j#hjPhhhjPhMubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEjQjFjQjGuh1jhhhj7MhNhNubjI)}(h**Parameters** ``struct device *dev`` Pointer to struct :c:type:`device` representing the edac device structure to remove. **Return** Pointer to removed edac_device structure, or ``NULL`` if device not found.h](h)}(h**Parameters**h]j\)}(hjQh]h Parameters}(hhhjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjQubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hjQubh)}(h``struct device *dev``h]jp)}(hjQh]hstruct device *dev}(hhhjQhhhNhNubah}(h]h ]h"]h$]h&]uh1johjQubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hjQubj&)}(hhh]h)}(hTPointer to struct :c:type:`device` representing the edac device structure to remove.h](hPointer to struct }(hPointer to struct hjQhhhNhNubh)}(h:c:type:`device`h]jp)}(hjQh]hdevice}(hhhjQhhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johjQubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jdeviceuh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hjQubh2 representing the edac device structure to remove.}(h2 representing the edac device structure to remove.hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhM hjQubah}(h]h ]h"]h$]h&]uh1j&hjQubh)}(h **Return**h]j\)}(hjRh]hReturn}(hhhjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjRubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM hjQubj&)}(hhh]h)}(hJPointer to removed edac_device structure, or ``NULL`` if device not found.h](h-Pointer to removed edac_device structure, or }(h-Pointer to removed edac_device structure, or hj1RhhhNhNubjp)}(h``NULL``h]hNULL}(hhhj:RhhhNhNubah}(h]h ]h"]h$]h&]uh1johj1Rubh if device not found.}(h if device not found.hj1RhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj.Rubah}(h]h ]h"]h$]h&]uh1j&hjQubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj7MhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j(edac_device_handle_ce_count (C function)c.edac_device_handle_ce_counthNtauh1jhj7MhhhNhNubj)}(hhh](j)}(hvoid edac_device_handle_ce_count (struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h]j)}(hvoid edac_device_handle_ce_count(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](j )}(hvoidh]hvoid}(hhhjzRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvRhhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMubj)}(h h]h }(hhhjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvRhhhjRhMubj)}(hedac_device_handle_ce_counth]j)}(hedac_device_handle_ce_counth]hedac_device_handle_ce_count}(hhhjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ](j j eh"]h$]h&]jjuh1jhjvRhhhjRhMubjE )}(hg(struct edac_device_ctl_info *edac_dev, unsigned int count, int inst_nr, int block_nr, const char *msg)h](jK )}(h%struct edac_device_ctl_info *edac_devh](j)}(hjh]hstruct}(hhhjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hhhjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubh)}(hhh]j)}(hedac_device_ctl_infoh]hedac_device_ctl_info}(hhhjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&] refdomainj{reftypej reftargetjRmodnameN classnameNj j )}j ]j )}jjRsbc.edac_device_handle_ce_countasbuh1hhjRubj)}(h h]h }(hhhjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj )}(hjmh]h*}(hhhjShhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjRubj)}(hedac_devh]hedac_dev}(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjRubjK )}(hunsigned int counth](j )}(hunsignedh]hunsigned}(hhhj)ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%Subj)}(h h]h }(hhhj7ShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%Subj )}(hinth]hint}(hhhjEShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%Subj)}(h h]h }(hhhjSShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%Subj)}(hcounth]hcount}(hhhjaShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%Subeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjRubjK )}(h int inst_nrh](j )}(hinth]hint}(hhhjzShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvSubj)}(h h]h }(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvSubj)}(hinst_nrh]hinst_nr}(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvSubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjRubjK )}(h int block_nrh](j )}(hinth]hint}(hhhjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj)}(h h]h }(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(hblock_nrh]hblock_nr}(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjRubjK )}(hconst char *msgh](j)}(hj&h]hconst}(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hhhjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj )}(hcharh]hchar}(hhhjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj)}(h h]h }(hhhj ThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj )}(hjmh]h*}(hhhjThhhNhNubah}(h]h ]j) ah"]h$]h&]uh1j hjSubj)}(hmsgh]hmsg}(hhhj(ThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jJ hjRubeh}(h]h ]h"]h$]h&]jjuh1jD hjvRhhhjRhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjrRhhhjRhMubah}(h]jmRah ](jjeh"]h$]h&]j!uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjoRhhubj$)}(hhh]h)}(hLog correctable errors.h]hLog correctable errors.}(hjUThjSThhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjPThhubah}(h]h ]h"]h$]h&]uh1j#hjoRhhhjRhMubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEjkTjFjkTjGuh1jhhhj7MhNhNubjI)}(hXV**Parameters** ``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` ``unsigned int count`` Number of errors to log. ``int inst_nr`` number of the instance where the CE error happened ``int block_nr`` number of the block where the CE error happened ``const char *msg`` message to be printedh](h)}(h**Parameters**h]j\)}(hjuTh]h Parameters}(hhhjwThhhNhNubah}(h]h ]h"]h$]h&]uh1j[hjsTubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjoTubjg)}(hhh](jl)}(h[``struct edac_device_ctl_info *edac_dev`` pointer to struct :c:type:`edac_device_ctl_info` h](jr)}(h)``struct edac_device_ctl_info *edac_dev``h]jp)}(hjTh]h%struct edac_device_ctl_info *edac_dev}(hhhjThhhNhNubah}(h]h ]h"]h$]h&]uh1johjTubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjTubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hpointer to struct hjThhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]jp)}(hjTh]hedac_device_ctl_info}(hhhjThhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johjTubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_device_ctl_infouh1hhjThMhjTubeh}(h]h ]h"]h$]h&]uh1hhjThMhjTubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jkhjThMhjTubjl)}(h0``unsigned int count`` Number of errors to log. h](jr)}(h``unsigned int count``h]jp)}(hjTh]hunsigned int count}(hhhjThhhNhNubah}(h]h ]h"]h$]h&]uh1johjTubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhjTubj)}(hhh]h)}(hNumber of errors to log.h]hNumber of errors to log.}(hjUhjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjUubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jkhjUhMhjTubjl)}(hC``int inst_nr`` number of the instance where the CE error happened h](jr)}(h``int inst_nr``h]jp)}(hj&Uh]h int inst_nr}(hhhj(UhhhNhNubah}(h]h ]h"]h$]h&]uh1johj$Uubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMhj Uubj)}(hhh]h)}(h2number of the instance where the CE error happenedh]h2number of the instance where the CE error happened}(hjAUhj?UhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;UhMhjhj^ubj)}(hhh]h)}(h0pointer to struct :c:type:`edac_device_ctl_info`h](hpointer to struct }(hpointer to struct hj:^hhhNhNubh)}(h:c:type:`edac_device_ctl_info`h]jp)}(hjE^h]hedac_device_ctl_info}(hhhjG^hhhNhNubah}(h]h ](jj{c-typeeh"]h$]h&]uh1johjC^ubah}(h]h ]h"]h$]h&]refdocj refdomainj{reftypetype refexplicitrefwarnj%jN.jedac_device_ctl_infouh1hhj6^hM>hj:^ubeh}(h]h ]h"]h$]h&]uh1hhj6^hM>hj7^ubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jkhj6^hM>hj^ubjl)}(hC``int inst_nr`` number of the instance where the UE error happened h](jr)}(h``int inst_nr``h]jp)}(hjz^h]h int inst_nr}(hhhj|^hhhNhNubah}(h]h ]h"]h$]h&]uh1johjx^ubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM?hjt^ubj)}(hhh]h)}(h2number of the instance where the UE error happenedh]h2number of the instance where the UE error happened}(hj^hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hM?hj^ubah}(h]h ]h"]h$]h&]uh1jhjt^ubeh}(h]h ]h"]h$]h&]uh1jkhj^hM?hj^ubjl)}(hA``int block_nr`` number of the block where the UE error happened h](jr)}(h``int block_nr``h]jp)}(hj^h]h int block_nr}(hhhj^hhhNhNubah}(h]h ]h"]h$]h&]uh1johj^ubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhM@hj^ubj)}(hhh]h)}(h/number of the block where the UE error happenedh]h/number of the block where the UE error happened}(hj^hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hM@hj^ubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jkhj^hM@hj^ubjl)}(h)``const char *msg`` message to be printedh](jr)}(h``const char *msg``h]jp)}(hj^h]hconst char *msg}(hhhj^hhhNhNubah}(h]h ]h"]h$]h&]uh1johj^ubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMBhj^ubj)}(hhh]h)}(hmessage to be printedh]hmessage to be printed}(hj_hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMAhj_ubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jkhj_hMBhj^ubeh}(h]h ]h"]h$]h&]uh1jfhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj7MhhhNhNubj)}(hhh]h}(h]h ]h"]h$]h&]entries](j$edac_device_alloc_index (C function)c.edac_device_alloc_indexhNtauh1jhj7MhhhNhNubj)}(hhh](j)}(h"int edac_device_alloc_index (void)h]j)}(h!int edac_device_alloc_index(void)h](j )}(hinth]hint}(hhhjF_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB_hhh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMLubj)}(h h]h }(hhhjU_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB_hhhjT_hMLubj)}(hedac_device_alloc_indexh]j)}(hedac_device_alloc_indexh]hedac_device_alloc_index}(hhhjg_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc_ubah}(h]h ](j j eh"]h$]h&]jjuh1jhjB_hhhjT_hMLubjE )}(h(void)h]jK )}(hvoidh]j )}(hvoidh]hvoid}(hhhj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]noemphjjuh1jJ hj{_ubah}(h]h ]h"]h$]h&]jjuh1jD hjB_hhhjT_hMLubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>_hhhjT_hMLubah}(h]j9_ah ](jjeh"]h$]h&]j!uh1jh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMPhj;_hhubj$)}(hhh]h)}(h%Allocate a unique device index numberh]h%Allocate a unique device index number}(hj_hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMKhj_hhubah}(h]h ]h"]h$]h&]uh1j#hj;_hhhjT_hMLubeh}(h]h ](j{functioneh"]h$]h&]jDj{jEj_jFj_jGuh1jhhhj7MhNhNubjI)}(hR**Parameters** ``void`` no arguments **Return** allocated index numberh](h)}(h**Parameters**h]j\)}(hj_h]h Parameters}(hhhj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj_ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMOhj_ubjg)}(hhh]jl)}(h``void`` no arguments h](jr)}(h``void``h]jp)}(hj_h]hvoid}(hhhj_hhhNhNubah}(h]h ]h"]h$]h&]uh1johj_ubah}(h]h ]h"]h$]h&]uh1jqh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMRhj_ubj)}(hhh]h)}(h no argumentsh]h no arguments}(hj `hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMRhj`ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jkhj`hMRhj_ubah}(h]h ]h"]h$]h&]uh1jfhj_ubh)}(h **Return**h]j\)}(hj*`h]hReturn}(hhhj,`hhhNhNubah}(h]h ]h"]h$]h&]uh1j[hj(`ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMThj_ubj&)}(hhh]h)}(hallocated index numberh]hallocated index number}(hjE`hjC`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/driver-api/edac:188: ./drivers/edac/edac_device.hhMOhj@`ubah}(h]h ]h"]h$]h&]uh1j&hj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jHhj7MhhhNhNubeh}(h] edac-blocksah ]h"] edac blocksah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHeterogeneous system supporth]hHeterogeneous system support}(hjl`hjj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjg`hhhhhKubh)}(hAn AMD heterogeneous system is built by connecting the data fabrics of both CPUs and GPUs via custom xGMI links. Thus, the data fabric on the GPU nodes can be accessed the same way as the data fabric on CPU nodes.h]hAn AMD heterogeneous system is built by connecting the data fabrics of both CPUs and GPUs via custom xGMI links. Thus, the data fabric on the GPU nodes can be accessed the same way as the data fabric on CPU nodes.}(hjz`hjx`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubh)}(hX?The MI200 accelerators are data center GPUs. They have 2 data fabrics, and each GPU data fabric contains four Unified Memory Controllers (UMC). Each UMC contains eight channels. Each UMC channel controls one 128-bit HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total of 4096-bits of DRAM data bus.h]hX?The MI200 accelerators are data center GPUs. They have 2 data fabrics, and each GPU data fabric contains four Unified Memory Controllers (UMC). Each UMC contains eight channels. Each UMC channel controls one 128-bit HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total of 4096-bits of DRAM data bus.}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubh)}(hWhile the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC channel is interfacing 2GB of DRAM (represented as rank).h]hWhile the UMC is interfacing a 16GB (8high X 2GB DRAM) HBM stack, each UMC channel is interfacing 2GB of DRAM (represented as rank).}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubh)}(hFMemory controllers on AMD GPU nodes can be represented in EDAC thusly:h]hFMemory controllers on AMD GPU nodes can be represented in EDAC thusly:}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubj&)}(hhh]h)}(h^GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNELh]h^GPU DF / GPU Node -> EDAC MC GPU UMC -> EDAC CSROW GPU UMC channel -> EDAC CHANNEL}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj`ubah}(h]h ]h"]h$]h&]uh1j&hjg`hhhhhNubh)}(hgFor example: a heterogeneous system with 1 AMD CPU is connected to 4 MI200 (Aldebaran) GPUs using xGMI.h]hgFor example: a heterogeneous system with 1 AMD CPU is connected to 4 MI200 (Aldebaran) GPUs using xGMI.}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubh)}(h)Some more heterogeneous hardware details:h]h)Some more heterogeneous hardware details:}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubjH)}(hhh](jM)}(hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.h]h)}(hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.h]hThe CPU UMC (Unified Memory Controller) is mostly the same as the GPU UMC. They have chip selects (csrows) and channels. However, the layouts are different for performance, physical layout, or other reasons.}(hj`hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj`ubah}(h]h ]h"]h$]h&]uh1jLhj`hhhhhNubjM)}(hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.h]h)}(hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.h]hzCPU UMCs use 1 channel, In this case UMC = EDAC channel. This follows the marketing speak. CPU has X memory channels, etc.}(hjahjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj`ubah}(h]h ]h"]h$]h&]uh1jLhj`hhhhhNubjM)}(hCCPU UMCs use up to 4 chip selects, So UMC chip select = EDAC CSROW.h]h)}(hjah]hCCPU UMCs use up to 4 chip selects, So UMC chip select = EDAC CSROW.}(hjahjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjaubah}(h]h ]h"]h$]h&]uh1jLhj`hhhhhNubjM)}(h0GPU UMCs use 1 chip select, So UMC = EDAC CSROW.h]h)}(hj/ah]h0GPU UMCs use 1 chip select, So UMC = EDAC CSROW.}(hj/ahj1ahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj-aubah}(h]h ]h"]h$]h&]uh1jLhj`hhhhhNubjM)}(h8GPU UMCs use 8 channels, So UMC channel = EDAC channel. h]h)}(h7GPU UMCs use 8 channels, So UMC channel = EDAC channel.h]h7GPU UMCs use 8 channels, So UMC channel = EDAC channel.}(hjJahjHahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjDaubah}(h]h ]h"]h$]h&]uh1jLhj`hhhhhNubeh}(h]h ]h"]h$]h&]jljNuh1jGhhhKhjg`hhubh)}(hThe EDAC subsystem provides a mechanism to handle AMD heterogeneous systems by calling system specific ops for both CPUs and GPUs.h]hThe EDAC subsystem provides a mechanism to handle AMD heterogeneous systems by calling system specific ops for both CPUs and GPUs.}(hjdahjbahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubh)}(hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated::h]hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated:}(hAMD GPU nodes are enumerated in sequential order based on the PCI hierarchy, and the first GPU node is assumed to have a Node ID value following those of the CPU nodes after latter are fully populated:hjpahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubj )}(hX[$ ls /sys/devices/system/edac/mc/ mc0 - CPU MC node 0 mc1 | mc2 |- GPU card[0] => node 0(mc1), node 1(mc2) mc3 | mc4 |- GPU card[1] => node 0(mc3), node 1(mc4) mc5 | mc6 |- GPU card[2] => node 0(mc5), node 1(mc6) mc7 | mc8 |- GPU card[3] => node 0(mc7), node 1(mc8)h]hX[$ ls /sys/devices/system/edac/mc/ mc0 - CPU MC node 0 mc1 | mc2 |- GPU card[0] => node 0(mc1), node 1(mc2) mc3 | mc4 |- GPU card[1] => node 0(mc3), node 1(mc4) mc5 | mc6 |- GPU card[2] => node 0(mc5), node 1(mc6) mc7 | mc8 |- GPU card[3] => node 0(mc7), node 1(mc8)}(hhhjaubah}(h]h ]h"]h$]h&]jjuh1jhhhKhjg`hhubh)}(hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries::h]hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries:}(hFor example, a heterogeneous system with one AMD CPU is connected to four MI200 (Aldebaran) GPUs using xGMI. This topology can be represented via the following sysfs entries:hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg`hhubj )}(hX/sys/devices/system/edac/mc/.. CPU # CPU node ├── mc 0 GPU Nodes are enumerated sequentially after CPU nodes have been populated GPU card 1 # Each MI200 GPU has 2 nodes/mcs ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs │   ├── csrow 0 # UMC 0 │   │   ├── channel 0 # Each UMC has 8 channels │   │   ├── channel 1 # size of each channel is 2 GB, so each UMC has 16 GB │   │   ├── channel 2 │   │   ├── channel 3 │   │   ├── channel 4 │   │   ├── channel 5 │   │   ├── channel 6 │   │   ├── channel 7 │   ├── csrow 1 # UMC 1 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── .. .. │   ├── csrow 3 # UMC 3 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── rank 0 │   ├── .. .. │   ├── rank 31 # total 32 ranks/dimms from 4 UMCs ├ ├── mc 2 # GPU node 1 == mc2 │   ├── .. # each GPU has total 64 GB GPU card 2 ├── mc 3 │   ├── .. ├── mc 4 │   ├── .. GPU card 3 ├── mc 5 │   ├── .. ├── mc 6 │   ├── .. GPU card 4 ├── mc 7 │   ├── .. ├── mc 8 │   ├── ..h]hX/sys/devices/system/edac/mc/.. CPU # CPU node ├── mc 0 GPU Nodes are enumerated sequentially after CPU nodes have been populated GPU card 1 # Each MI200 GPU has 2 nodes/mcs ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs │   ├── csrow 0 # UMC 0 │   │   ├── channel 0 # Each UMC has 8 channels │   │   ├── channel 1 # size of each channel is 2 GB, so each UMC has 16 GB │   │   ├── channel 2 │   │   ├── channel 3 │   │   ├── channel 4 │   │   ├── channel 5 │   │   ├── channel 6 │   │   ├── channel 7 │   ├── csrow 1 # UMC 1 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── .. .. │   ├── csrow 3 # UMC 3 │   │   ├── channel 0 │   │   ├── .. │   │   ├── channel 7 │   ├── rank 0 │   ├── .. .. │   ├── rank 31 # total 32 ranks/dimms from 4 UMCs ├ ├── mc 2 # GPU node 1 == mc2 │   ├── .. # each GPU has total 64 GB GPU card 2 ├── mc 3 │   ├── .. ├── mc 4 │   ├── .. GPU card 3 ├── mc 5 │   ├── .. ├── mc 6 │   ├── .. GPU card 4 ├── mc 7 │   ├── .. ├── mc 8 │   ├── ..}(hhhjaubah}(h]h ]h"]h$]h&]jjuh1jhhhKhjg`hhubeh}(h]heterogeneous-system-supportah ]h"]heterogeneous system supportah$]h&]uh1hhhhhhhhKubeh}(h]+error-detection-and-correction-edac-devicesah ]h"]-error detection and correction (edac) devicesah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjaerror_encodingUTF-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confapep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacefile_insertion_enabled raw_enabledKline_length_limitM'syntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_link embed_imagesenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}j]jasnameids}(jajajNjKj!jj{;jx;j4Mj1Mjd`ja`jajau nametypes}(jaNjNNj!j{;Nj4MNjd`NjaNuh}(jahjKhjjjx;jQjjjzjj? jD jjjjjjjyj~jjjjjjj"j"j&j&jA(jF(j)j)j*j*jx,j},j.j.j0j0j2j2j4j!4j1Mj~;j;j;j>j>jG@jL@jyAj~AjsCjxCj\EjaEjgHjlHjJjJjKjKja`j7MjNjNjPjPjmRjrRjUjUj]YjbYjK\jP\j9_j>_jajg`u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages]hsystem_message)}(hhh]h)}(hhh]h2Hyperlink target "doubleranked" is not referenced.}(hhhjHbubah}(h]h ]h"]h$]h&]uh1hhjEbubah}(h]h ]h"]h$]h&]levelKtypeINFOsourcehlineKQuh1jCbuba transformerN include_log] decorationNhhub.