hsphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget2/translations/zh_CN/driver-api/driver-model/devresmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/zh_TW/driver-api/driver-model/devresmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/it_IT/driver-api/driver-model/devresmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/ja_JP/driver-api/driver-model/devresmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/ko_KR/driver-api/driver-model/devresmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/pt_BR/driver-api/driver-model/devresmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/sp_SP/driver-api/driver-model/devresmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h Devres - Managed Device Resourceh]h Devres - Managed Device Resource}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhL/var/lib/git/docbuild/linux/Documentation/driver-api/driver-model/devres.rsthKubh paragraph)}(hTejun Heo h](hTejun Heo <}(hhhhhNhNubh reference)}(h teheo@suse.deh]h teheo@suse.de}(hhhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:teheo@suse.deuh1hhhubh>}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hFirst draft 10 January 2007h]hFirst draft 10 January 2007}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubhcomment)}(hXcontents 1. Intro : Huh? Devres? 2. Devres : Devres in a nutshell 3. Devres Group : Group devres'es and release them together 4. Details : Life time rules, calling context, ... 5. Overhead : How much do we have to pay for this? 6. List of managed interfaces: Currently implemented managed interfacesh]hXcontents 1. Intro : Huh? Devres? 2. Devres : Devres in a nutshell 3. Devres Group : Group devres'es and release them together 4. Details : Life time rules, calling context, ... 5. Overhead : How much do we have to pay for this? 6. List of managed interfaces: Currently implemented managed interfaces}hjsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhhhKubh)}(hhh](h)}(h1. Introh]h1. Intro}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXdevres came up while trying to convert libata to use iomap. Each iomapped address should be kept and unmapped on driver detach. For example, a plain SFF ATA controller (that is, good old PCI IDE) in native mode makes use of 5 PCI BARs and all of them should be maintained.h]hXdevres came up while trying to convert libata to use iomap. Each iomapped address should be kept and unmapped on driver detach. For example, a plain SFF ATA controller (that is, good old PCI IDE) in native mode makes use of 5 PCI BARs and all of them should be maintained.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXAs with many other device drivers, libata low level drivers have sufficient bugs in ->remove and ->probe failure path. Well, yes, that's probably because libata low level driver developers are lazy bunch, but aren't all low level driver developers? After spending a day fiddling with braindamaged hardware with no document or braindamaged document, if it's finally working, well, it's working.h]hXAs with many other device drivers, libata low level drivers have sufficient bugs in ->remove and ->probe failure path. Well, yes, that’s probably because libata low level driver developers are lazy bunch, but aren’t all low level driver developers? After spending a day fiddling with braindamaged hardware with no document or braindamaged document, if it’s finally working, well, it’s working.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hX.For one reason or another, low level drivers don't receive as much attention or testing as core code, and bugs on driver detach or initialization failure don't happen often enough to be noticeable. Init failure path is worse because it's much less travelled while needs to handle multiple entry points.h]hX4For one reason or another, low level drivers don’t receive as much attention or testing as core code, and bugs on driver detach or initialization failure don’t happen often enough to be noticeable. Init failure path is worse because it’s much less travelled while needs to handle multiple entry points.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK#hjhhubh)}(hSo, many low level drivers end up leaking resources on driver detach and having half broken failure path implementation in ->probe() which would leak resources or even cause oops when failure occurs. iomap adds more to this mix. So do msi and msix.h]hSo, many low level drivers end up leaking resources on driver detach and having half broken failure path implementation in ->probe() which would leak resources or even cause oops when failure occurs. iomap adds more to this mix. So do msi and msix.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjhhubeh}(h]introah ]h"]1. introah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h 2. Devresh]h 2. Devres}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhhhhhK0ubh)}(hXfdevres is basically linked list of arbitrarily sized memory areas associated with a struct device. Each devres entry is associated with a release function. A devres can be released in several ways. No matter what, all devres entries are released on driver detach. On release, the associated release function is invoked and then the devres entry is freed.h]hXfdevres is basically linked list of arbitrarily sized memory areas associated with a struct device. Each devres entry is associated with a release function. A devres can be released in several ways. No matter what, all devres entries are released on driver detach. On release, the associated release function is invoked and then the devres entry is freed.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjbhhubh)}(hXManaged interface is created for resources commonly used by device drivers using devres. For example, coherent DMA memory is acquired using dma_alloc_coherent(). The managed version is called dmam_alloc_coherent(). It is identical to dma_alloc_coherent() except for the DMA memory allocated using it is managed and will be automatically released on driver detach. Implementation looks like the following::h]hXManaged interface is created for resources commonly used by device drivers using devres. For example, coherent DMA memory is acquired using dma_alloc_coherent(). The managed version is called dmam_alloc_coherent(). It is identical to dma_alloc_coherent() except for the DMA memory allocated using it is managed and will be automatically released on driver detach. Implementation looks like the following:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK9hjbhhubh literal_block)}(hXstruct dma_devres { size_t size; void *vaddr; dma_addr_t dma_handle; }; static void dmam_coherent_release(struct device *dev, void *res) { struct dma_devres *this = res; dma_free_coherent(dev, this->size, this->vaddr, this->dma_handle); } dmam_alloc_coherent(dev, size, dma_handle, gfp) { struct dma_devres *dr; void *vaddr; dr = devres_alloc(dmam_coherent_release, sizeof(*dr), gfp); ... /* alloc DMA memory as usual */ vaddr = dma_alloc_coherent(...); ... /* record size, vaddr, dma_handle in dr */ dr->vaddr = vaddr; ... devres_add(dev, dr); return vaddr; }h]hXstruct dma_devres { size_t size; void *vaddr; dma_addr_t dma_handle; }; static void dmam_coherent_release(struct device *dev, void *res) { struct dma_devres *this = res; dma_free_coherent(dev, this->size, this->vaddr, this->dma_handle); } dmam_alloc_coherent(dev, size, dma_handle, gfp) { struct dma_devres *dr; void *vaddr; dr = devres_alloc(dmam_coherent_release, sizeof(*dr), gfp); ... /* alloc DMA memory as usual */ vaddr = dma_alloc_coherent(...); ... /* record size, vaddr, dma_handle in dr */ dr->vaddr = vaddr; ... devres_add(dev, dr); return vaddr; }}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhKAhjbhhubh)}(hX)If a driver uses dmam_alloc_coherent(), the area is guaranteed to be freed whether initialization fails half-way or the device gets detached. If most resources are acquired using managed interface, a driver can have much simpler init and exit code. Init path basically looks like the following::h]hX(If a driver uses dmam_alloc_coherent(), the area is guaranteed to be freed whether initialization fails half-way or the device gets detached. If most resources are acquired using managed interface, a driver can have much simpler init and exit code. Init path basically looks like the following:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjbhhubj)}(hXUmy_init_one() { struct mydev *d; d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL); if (!d) return -ENOMEM; d->ring = dmam_alloc_coherent(...); if (!d->ring) return -ENOMEM; if (check something) return -EINVAL; ... return register_to_upper_layer(d); }h]hXUmy_init_one() { struct mydev *d; d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL); if (!d) return -ENOMEM; d->ring = dmam_alloc_coherent(...); if (!d->ring) return -ENOMEM; if (check something) return -EINVAL; ... return register_to_upper_layer(d); }}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhKihjbhhubh)}(hAnd exit path::h]hAnd exit path:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjbhhubj)}(hWmy_remove_one() { unregister_from_upper_layer(d); shutdown_my_hardware(); }h]hWmy_remove_one() { unregister_from_upper_layer(d); shutdown_my_hardware(); }}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhK~hjbhhubh)}(hAs shown above, low level drivers can be simplified a lot by using devres. Complexity is shifted from less maintained low level drivers to better maintained higher layer. Also, as init failure path is shared with exit path, both can get more testing.h]hAs shown above, low level drivers can be simplified a lot by using devres. Complexity is shifted from less maintained low level drivers to better maintained higher layer. Also, as init failure path is shared with exit path, both can get more testing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjbhhubh)}(hXNote though that when converting current calls or assignments to managed devm_* versions it is up to you to check if internal operations like allocating memory, have failed. Managed resources pertains to the freeing of these resources *only* - all other checks needed are still on you. In some cases this may mean introducing checks that were not necessary before moving to the managed devm_* calls.h](hNote though that when converting current calls or assignments to managed devm_* versions it is up to you to check if internal operations like allocating memory, have failed. Managed resources pertains to the freeing of these resources }(hjhhhNhNubhemphasis)}(h*only*h]honly}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh - all other checks needed are still on you. In some cases this may mean introducing checks that were not necessary before moving to the managed devm_* calls.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjbhhubeh}(h]devresah ]h"] 2. devresah$]h&]uh1hhhhhhhhK0ubh)}(hhh](h)}(h3. Devres grouph]h3. Devres group}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hDevres entries can be grouped using devres group. When a group is released, all contained normal devres entries and properly nested groups are released. One usage is to rollback series of acquired resources on failure. For example::h]hDevres entries can be grouped using devres group. When a group is released, all contained normal devres entries and properly nested groups are released. One usage is to rollback series of acquired resources on failure. For example:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(hX if (!devres_open_group(dev, NULL, GFP_KERNEL)) return -ENOMEM; acquire A; if (failed) goto err; acquire B; if (failed) goto err; ... devres_remove_group(dev, NULL); return 0; err: devres_release_group(dev, NULL); return err_code;h]hX if (!devres_open_group(dev, NULL, GFP_KERNEL)) return -ENOMEM; acquire A; if (failed) goto err; acquire B; if (failed) goto err; ... devres_remove_group(dev, NULL); return 0; err: devres_release_group(dev, NULL); return err_code;}hj.sbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjhhubh)}(hX As resource acquisition failure usually means probe failure, constructs like above are usually useful in midlayer driver (e.g. libata core layer) where interface function shouldn't have side effect on failure. For LLDs, just returning error code suffices in most cases.h]hXAs resource acquisition failure usually means probe failure, constructs like above are usually useful in midlayer driver (e.g. libata core layer) where interface function shouldn’t have side effect on failure. For LLDs, just returning error code suffices in most cases.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXEach group is identified by `void *id`. It can either be explicitly specified by @id argument to devres_open_group() or automatically created by passing NULL as @id as in the above example. In both cases, devres_open_group() returns the group's id. The returned id can be passed to other devres functions to select the target group. If NULL is given to those functions, the latest open group is selected.h](hEach group is identified by }(hjJhhhNhNubhtitle_reference)}(h `void *id`h]hvoid *id}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jRhjJubhXs. It can either be explicitly specified by @id argument to devres_open_group() or automatically created by passing NULL as @id as in the above example. In both cases, devres_open_group() returns the group’s id. The returned id can be passed to other devres functions to select the target group. If NULL is given to those functions, the latest open group is selected.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(h6For example, you can do something like the following::h]h5For example, you can do something like the following:}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(hXSint my_midlayer_create_something() { if (!devres_open_group(dev, my_midlayer_create_something, GFP_KERNEL)) return -ENOMEM; ... devres_close_group(dev, my_midlayer_create_something); return 0; } void my_midlayer_destroy_something() { devres_release_group(dev, my_midlayer_create_something); }h]hXSint my_midlayer_create_something() { if (!devres_open_group(dev, my_midlayer_create_something, GFP_KERNEL)) return -ENOMEM; ... devres_close_group(dev, my_midlayer_create_something); return 0; } void my_midlayer_destroy_something() { devres_release_group(dev, my_midlayer_create_something); }}hjzsbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjhhubeh}(h] devres-groupah ]h"]3. devres groupah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h 4. Detailsh]h 4. Details}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hLifetime of a devres entry begins on devres allocation and finishes when it is released or destroyed (removed and freed) - no reference counting.h]hLifetime of a devres entry begins on devres allocation and finishes when it is released or destroyed (removed and freed) - no reference counting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXWdevres core guarantees atomicity to all basic devres operations and has support for single-instance devres types (atomic lookup-and-add-if-not-found). Other than that, synchronizing concurrent accesses to allocated devres data is caller's responsibility. This is usually non-issue because bus ops and resource allocations already do the job.h]hXYdevres core guarantees atomicity to all basic devres operations and has support for single-instance devres types (atomic lookup-and-add-if-not-found). Other than that, synchronizing concurrent accesses to allocated devres data is caller’s responsibility. This is usually non-issue because bus ops and resource allocations already do the job.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hWFor an example of single-instance devres type, read pcim_iomap_table() in lib/devres.c.h]hWFor an example of single-instance devres type, read pcim_iomap_table() in lib/devres.c.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(h\All devres interface functions can be called without context if the right gfp mask is given.h]h\All devres interface functions can be called without context if the right gfp mask is given.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]detailsah ]h"] 4. detailsah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h 5. Overheadh]h 5. Overhead}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXMEach devres bookkeeping info is allocated together with requested data area. With debug option turned off, bookkeeping info occupies 16 bytes on 32bit machines and 24 bytes on 64bit (three pointers rounded up to ull alignment). If singly linked list is used, it can be reduced to two pointers (8 bytes on 32bit, 16 bytes on 64bit).h]hXMEach devres bookkeeping info is allocated together with requested data area. With debug option turned off, bookkeeping info occupies 16 bytes on 32bit machines and 24 bytes on 64bit (three pointers rounded up to ull alignment). If singly linked list is used, it can be reduced to two pointers (8 bytes on 32bit, 16 bytes on 64bit).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(h]Each devres group occupies 8 pointers. It can be reduced to 6 if singly linked list is used.h]h]Each devres group occupies 8 pointers. It can be reduced to 6 if singly linked list is used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hMemory space overhead on ahci controller with two ports is between 300 and 400 bytes on 32bit machine after naive conversion (we can certainly invest a bit more effort into libata core layer).h]hMemory space overhead on ahci controller with two ports is between 300 and 400 bytes on 32bit machine after naive conversion (we can certainly invest a bit more effort into libata core layer).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]overheadah ]h"] 5. overheadah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h6. List of managed interfacesh]h6. List of managed interfaces}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hhhhhKubhdefinition_list)}(hhh](hdefinition_list_item)}(hX CLOCK devm_clk_get() devm_clk_get_optional() devm_clk_put() devm_clk_bulk_get() devm_clk_bulk_get_all() devm_clk_bulk_get_enable() devm_clk_bulk_get_optional() devm_get_clk_from_child() devm_clk_hw_register() devm_of_clk_add_hw_provider() devm_clk_hw_register_clkdev() h](hterm)}(hCLOCKh]hCLOCK}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhj<ubh definition)}(hhh]h)}(hXdevm_clk_get() devm_clk_get_optional() devm_clk_put() devm_clk_bulk_get() devm_clk_bulk_get_all() devm_clk_bulk_get_enable() devm_clk_bulk_get_optional() devm_get_clk_from_child() devm_clk_hw_register() devm_of_clk_add_hw_provider() devm_clk_hw_register_clkdev()h]hXdevm_clk_get() devm_clk_get_optional() devm_clk_put() devm_clk_bulk_get() devm_clk_bulk_get_all() devm_clk_bulk_get_enable() devm_clk_bulk_get_optional() devm_get_clk_from_child() devm_clk_hw_register() devm_of_clk_add_hw_provider() devm_clk_hw_register_clkdev()}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjRubah}(h]h ]h"]h$]h&]uh1jPhj<ubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7ubj;)}(hDMA dmaenginem_async_device_register() dmam_alloc_coherent() dmam_alloc_attrs() dmam_free_coherent() dmam_pool_create() dmam_pool_destroy() h](jA)}(hDMAh]hDMA}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjoubjQ)}(hhh]h)}(hdmaenginem_async_device_register() dmam_alloc_coherent() dmam_alloc_attrs() dmam_free_coherent() dmam_pool_create() dmam_pool_destroy()h]hdmaenginem_async_device_register() dmam_alloc_coherent() dmam_alloc_attrs() dmam_free_coherent() dmam_pool_create() dmam_pool_destroy()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjoubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hDRM devm_drm_dev_alloc() h](jA)}(hDRMh]hDRM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhM hjubjQ)}(hhh]h)}(hdevm_drm_dev_alloc()h]hdevm_drm_dev_alloc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhM hj7hhubj;)}(hGPIO devm_gpiod_get() devm_gpiod_get_array() devm_gpiod_get_array_optional() devm_gpiod_get_index() devm_gpiod_get_index_optional() devm_gpiod_get_optional() devm_gpiod_put() devm_gpiod_unhinge() devm_gpiochip_add_data() devm_gpio_request_one() h](jA)}(hGPIOh]hGPIO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hdevm_gpiod_get() devm_gpiod_get_array() devm_gpiod_get_array_optional() devm_gpiod_get_index() devm_gpiod_get_index_optional() devm_gpiod_get_optional() devm_gpiod_put() devm_gpiod_unhinge() devm_gpiochip_add_data() devm_gpio_request_one()h]hdevm_gpiod_get() devm_gpiod_get_array() devm_gpiod_get_array_optional() devm_gpiod_get_index() devm_gpiod_get_index_optional() devm_gpiod_get_optional() devm_gpiod_put() devm_gpiod_unhinge() devm_gpiochip_add_data() devm_gpio_request_one()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h7I2C devm_i2c_add_adapter() devm_i2c_new_dummy_device() h](jA)}(hI2Ch]hI2C}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(h2devm_i2c_add_adapter() devm_i2c_new_dummy_device()h]h2devm_i2c_add_adapter() devm_i2c_new_dummy_device()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hXIIO devm_iio_device_alloc() devm_iio_device_register() devm_iio_dmaengine_buffer_setup() devm_iio_kfifo_buffer_setup() devm_iio_kfifo_buffer_setup_ext() devm_iio_map_array_register() devm_iio_triggered_buffer_setup() devm_iio_triggered_buffer_setup_ext() devm_iio_trigger_alloc() devm_iio_trigger_register() devm_iio_channel_get() devm_iio_channel_get_all() devm_iio_hw_consumer_alloc() devm_fwnode_iio_channel_get_by_name() h](jA)}(hIIOh]hIIO}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhM+hj+ubjQ)}(hhh]h)}(hXdevm_iio_device_alloc() devm_iio_device_register() devm_iio_dmaengine_buffer_setup() devm_iio_kfifo_buffer_setup() devm_iio_kfifo_buffer_setup_ext() devm_iio_map_array_register() devm_iio_triggered_buffer_setup() devm_iio_triggered_buffer_setup_ext() devm_iio_trigger_alloc() devm_iio_trigger_register() devm_iio_channel_get() devm_iio_channel_get_all() devm_iio_hw_consumer_alloc() devm_fwnode_iio_channel_get_by_name()h]hXdevm_iio_device_alloc() devm_iio_device_register() devm_iio_dmaengine_buffer_setup() devm_iio_kfifo_buffer_setup() devm_iio_kfifo_buffer_setup_ext() devm_iio_map_array_register() devm_iio_triggered_buffer_setup() devm_iio_triggered_buffer_setup_ext() devm_iio_trigger_alloc() devm_iio_trigger_register() devm_iio_channel_get() devm_iio_channel_get_all() devm_iio_hw_consumer_alloc() devm_fwnode_iio_channel_get_by_name()}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj=ubah}(h]h ]h"]h$]h&]uh1jPhj+ubeh}(h]h ]h"]h$]h&]uh1j:hhhM+hj7hhubj;)}(h#INPUT devm_input_allocate_device() h](jA)}(hINPUTh]hINPUT}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhM.hjZubjQ)}(hhh]h)}(hdevm_input_allocate_device()h]hdevm_input_allocate_device()}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM.hjlubah}(h]h ]h"]h$]h&]uh1jPhjZubeh}(h]h ]h"]h$]h&]uh1j:hhhM.hj7hhubj;)}(hIO region devm_release_mem_region() devm_release_region() devm_release_resource() devm_request_mem_region() devm_request_free_mem_region() devm_request_region() devm_request_resource() h](jA)}(h IO regionh]h IO region}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhM7hjubjQ)}(hhh]h)}(hdevm_release_mem_region() devm_release_region() devm_release_resource() devm_request_mem_region() devm_request_free_mem_region() devm_request_region() devm_request_resource()h]hdevm_release_mem_region() devm_release_region() devm_release_resource() devm_request_mem_region() devm_request_free_mem_region() devm_request_region() devm_request_resource()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM1hjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhM7hj7hhubj;)}(hXIOMAP devm_ioport_map() devm_ioport_unmap() devm_ioremap() devm_ioremap_uc() devm_ioremap_wc() devm_ioremap_resource() : checks resource, requests memory region, ioremaps devm_ioremap_resource_wc() devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device devm_platform_ioremap_resource_byname() devm_platform_get_and_ioremap_resource() devm_iounmap() Note: For the PCI devices the specific pcim_*() functions may be used, see below. h](jA)}(hIOMAPh]hIOMAP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMFhjubjQ)}(hhh](h)}(hXtdevm_ioport_map() devm_ioport_unmap() devm_ioremap() devm_ioremap_uc() devm_ioremap_wc() devm_ioremap_resource() : checks resource, requests memory region, ioremaps devm_ioremap_resource_wc() devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device devm_platform_ioremap_resource_byname() devm_platform_get_and_ioremap_resource() devm_iounmap()h]hXtdevm_ioport_map() devm_ioport_unmap() devm_ioremap() devm_ioremap_uc() devm_ioremap_wc() devm_ioremap_resource() : checks resource, requests memory region, ioremaps devm_ioremap_resource_wc() devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device devm_platform_ioremap_resource_byname() devm_platform_get_and_ioremap_resource() devm_iounmap()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM:hjubh)}(hQNote: For the PCI devices the specific pcim_*() functions may be used, see below.h]hQNote: For the PCI devices the specific pcim_*() functions may be used, see below.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMFhjubeh}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMFhj7hhubj;)}(hX8IRQ devm_free_irq() devm_request_any_context_irq() devm_request_irq() devm_request_threaded_irq() devm_irq_alloc_descs() devm_irq_alloc_desc() devm_irq_alloc_desc_at() devm_irq_alloc_desc_from() devm_irq_alloc_descs_from() devm_irq_alloc_generic_chip() devm_irq_setup_generic_chip() devm_irq_domain_create_sim() h](jA)}(hIRQh]hIRQ}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMThjubjQ)}(hhh]h)}(hX3devm_free_irq() devm_request_any_context_irq() devm_request_irq() devm_request_threaded_irq() devm_irq_alloc_descs() devm_irq_alloc_desc() devm_irq_alloc_desc_at() devm_irq_alloc_desc_from() devm_irq_alloc_descs_from() devm_irq_alloc_generic_chip() devm_irq_setup_generic_chip() devm_irq_domain_create_sim()h]hX3devm_free_irq() devm_request_any_context_irq() devm_request_irq() devm_request_threaded_irq() devm_irq_alloc_descs() devm_irq_alloc_desc() devm_irq_alloc_desc_at() devm_irq_alloc_desc_from() devm_irq_alloc_descs_from() devm_irq_alloc_generic_chip() devm_irq_setup_generic_chip() devm_irq_domain_create_sim()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMIhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMThj7hhubj;)}(hLED devm_led_classdev_register() devm_led_classdev_register_ext() devm_led_classdev_unregister() devm_led_trigger_register() devm_of_led_get() h](jA)}(hLEDh]hLED}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhM[hj$ubjQ)}(hhh]h)}(hdevm_led_classdev_register() devm_led_classdev_register_ext() devm_led_classdev_unregister() devm_led_trigger_register() devm_of_led_get()h]hdevm_led_classdev_register() devm_led_classdev_register_ext() devm_led_classdev_unregister() devm_led_trigger_register() devm_of_led_get()}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMWhj6ubah}(h]h ]h"]h$]h&]uh1jPhj$ubeh}(h]h ]h"]h$]h&]uh1j:hhhM[hj7hhubj;)}(hgMDIO devm_mdiobus_alloc() devm_mdiobus_alloc_size() devm_mdiobus_register() devm_of_mdiobus_register() h](jA)}(hMDIOh]hMDIO}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMahjSubjQ)}(hhh]h)}(hadevm_mdiobus_alloc() devm_mdiobus_alloc_size() devm_mdiobus_register() devm_of_mdiobus_register()h]hadevm_mdiobus_alloc() devm_mdiobus_alloc_size() devm_mdiobus_register() devm_of_mdiobus_register()}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM^hjeubah}(h]h ]h"]h$]h&]uh1jPhjSubeh}(h]h ]h"]h$]h&]uh1j:hhhMahj7hhubj;)}(hMEM devm_free_pages() devm_get_free_pages() devm_kasprintf() devm_kcalloc() devm_kfree() devm_kmalloc() devm_kmalloc_array() devm_kmemdup() devm_krealloc() devm_krealloc_array() devm_kstrdup() devm_kstrdup_const() devm_kvasprintf() devm_kzalloc() h](jA)}(hMEMh]hMEM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMqhjubjQ)}(hhh]h)}(hdevm_free_pages() devm_get_free_pages() devm_kasprintf() devm_kcalloc() devm_kfree() devm_kmalloc() devm_kmalloc_array() devm_kmemdup() devm_krealloc() devm_krealloc_array() devm_kstrdup() devm_kstrdup_const() devm_kvasprintf() devm_kzalloc()h]hdevm_free_pages() devm_get_free_pages() devm_kasprintf() devm_kcalloc() devm_kfree() devm_kmalloc() devm_kmalloc_array() devm_kmemdup() devm_krealloc() devm_krealloc_array() devm_kstrdup() devm_kstrdup_const() devm_kvasprintf() devm_kzalloc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMdhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMqhj7hhubj;)}(hMFD devm_mfd_add_devices() h](jA)}(hMFDh]hMFD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMthjubjQ)}(hhh]h)}(hdevm_mfd_add_devices()h]hdevm_mfd_add_devices()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMthjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMthj7hhubj;)}(h_MUX devm_mux_chip_alloc() devm_mux_chip_register() devm_mux_control_get() devm_mux_state_get() h](jA)}(hMUXh]hMUX}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMzhjubjQ)}(hhh]h)}(hZdevm_mux_chip_alloc() devm_mux_chip_register() devm_mux_control_get() devm_mux_state_get()h]hZdevm_mux_chip_alloc() devm_mux_chip_register() devm_mux_control_get() devm_mux_state_get()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMwhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMzhj7hhubj;)}(hKNET devm_alloc_etherdev() devm_alloc_etherdev_mqs() devm_register_netdev() h](jA)}(hNETh]hNET}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hFdevm_alloc_etherdev() devm_alloc_etherdev_mqs() devm_register_netdev()h]hFdevm_alloc_etherdev() devm_alloc_etherdev_mqs() devm_register_netdev()}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM}hj!ubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h PER-CPU MEM devm_alloc_percpu() h](jA)}(h PER-CPU MEMh]h PER-CPU MEM}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhj>ubjQ)}(hhh]h)}(hdevm_alloc_percpu()h]hdevm_alloc_percpu()}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjPubah}(h]h ]h"]h$]h&]uh1jPhj>ubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hXPCI devm_pci_alloc_host_bridge() : managed PCI host bridge allocation devm_pci_remap_cfgspace() : ioremap PCI configuration space devm_pci_remap_cfg_resource() : ioremap PCI configuration space resource pcim_enable_device() : after success, the PCI device gets disabled automatically on driver detach pcim_iomap() : do iomap() on a single BAR pcim_iomap_regions() : do request_region() and iomap() on multiple BARs pcim_iomap_table() : array of mapped addresses indexed by BAR pcim_iounmap() : do iounmap() on a single BAR pcim_pin_device() : keep PCI device enabled after release pcim_set_mwi() : enable Memory-Write-Invalidate PCI transaction h](jA)}(hPCIh]hPCI}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjmubjQ)}(hhh](h)}(hdevm_pci_alloc_host_bridge() : managed PCI host bridge allocation devm_pci_remap_cfgspace() : ioremap PCI configuration space devm_pci_remap_cfg_resource() : ioremap PCI configuration space resourceh]hdevm_pci_alloc_host_bridge() : managed PCI host bridge allocation devm_pci_remap_cfgspace() : ioremap PCI configuration space devm_pci_remap_cfg_resource() : ioremap PCI configuration space resource}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hXpcim_enable_device() : after success, the PCI device gets disabled automatically on driver detach pcim_iomap() : do iomap() on a single BAR pcim_iomap_regions() : do request_region() and iomap() on multiple BARs pcim_iomap_table() : array of mapped addresses indexed by BAR pcim_iounmap() : do iounmap() on a single BAR pcim_pin_device() : keep PCI device enabled after release pcim_set_mwi() : enable Memory-Write-Invalidate PCI transactionh]hXpcim_enable_device() : after success, the PCI device gets disabled automatically on driver detach pcim_iomap() : do iomap() on a single BAR pcim_iomap_regions() : do request_region() and iomap() on multiple BARs pcim_iomap_table() : array of mapped addresses indexed by BAR pcim_iounmap() : do iounmap() on a single BAR pcim_pin_device() : keep PCI device enabled after release pcim_set_mwi() : enable Memory-Write-Invalidate PCI transaction}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jPhjmubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hPPHY devm_usb_get_phy() devm_usb_get_phy_by_node() devm_usb_get_phy_by_phandle() h](jA)}(hPHYh]hPHY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hKdevm_usb_get_phy() devm_usb_get_phy_by_node() devm_usb_get_phy_by_phandle()h]hKdevm_usb_get_phy() devm_usb_get_phy_by_node() devm_usb_get_phy_by_phandle()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hPINCTRL devm_pinctrl_get() devm_pinctrl_put() devm_pinctrl_get_select() devm_pinctrl_register() devm_pinctrl_register_and_init() h](jA)}(hPINCTRLh]hPINCTRL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hxdevm_pinctrl_get() devm_pinctrl_put() devm_pinctrl_get_select() devm_pinctrl_register() devm_pinctrl_register_and_init()h]hxdevm_pinctrl_get() devm_pinctrl_put() devm_pinctrl_get_select() devm_pinctrl_register() devm_pinctrl_register_and_init()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h@POWER devm_reboot_mode_register() devm_reboot_mode_unregister() h](jA)}(hPOWERh]hPOWER}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(h9devm_reboot_mode_register() devm_reboot_mode_unregister()h]h9devm_reboot_mode_register() devm_reboot_mode_unregister()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hQPWM devm_pwmchip_alloc() devm_pwmchip_add() devm_pwm_get() devm_fwnode_pwm_get() h](jA)}(hPWMh]hPWM}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhj7ubjQ)}(hhh]h)}(hLdevm_pwmchip_alloc() devm_pwmchip_add() devm_pwm_get() devm_fwnode_pwm_get()h]hLdevm_pwmchip_alloc() devm_pwmchip_add() devm_pwm_get() devm_fwnode_pwm_get()}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjIubah}(h]h ]h"]h$]h&]uh1jPhj7ubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hX!REGULATOR devm_regulator_bulk_register_supply_alias() devm_regulator_bulk_get() devm_regulator_bulk_get_const() devm_regulator_bulk_get_enable() devm_regulator_bulk_put() devm_regulator_get() devm_regulator_get_enable() devm_regulator_get_enable_read_voltage() devm_regulator_get_enable_optional() devm_regulator_get_exclusive() devm_regulator_get_optional() devm_regulator_irq_helper() devm_regulator_put() devm_regulator_register() devm_regulator_register_notifier() devm_regulator_register_supply_alias() devm_regulator_unregister_notifier() h](jA)}(h REGULATORh]h REGULATOR}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjfubjQ)}(hhh]h)}(hXdevm_regulator_bulk_register_supply_alias() devm_regulator_bulk_get() devm_regulator_bulk_get_const() devm_regulator_bulk_get_enable() devm_regulator_bulk_put() devm_regulator_get() devm_regulator_get_enable() devm_regulator_get_enable_read_voltage() devm_regulator_get_enable_optional() devm_regulator_get_exclusive() devm_regulator_get_optional() devm_regulator_irq_helper() devm_regulator_put() devm_regulator_register() devm_regulator_register_notifier() devm_regulator_register_supply_alias() devm_regulator_unregister_notifier()h]hXdevm_regulator_bulk_register_supply_alias() devm_regulator_bulk_get() devm_regulator_bulk_get_const() devm_regulator_bulk_get_enable() devm_regulator_bulk_put() devm_regulator_get() devm_regulator_get_enable() devm_regulator_get_enable_read_voltage() devm_regulator_get_enable_optional() devm_regulator_get_exclusive() devm_regulator_get_optional() devm_regulator_irq_helper() devm_regulator_put() devm_regulator_register() devm_regulator_register_notifier() devm_regulator_register_supply_alias() devm_regulator_unregister_notifier()}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjxubah}(h]h ]h"]h$]h&]uh1jPhjfubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h@RESET devm_reset_control_get() devm_reset_controller_register() h](jA)}(hRESETh]hRESET}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(h9devm_reset_control_get() devm_reset_controller_register()h]h9devm_reset_control_get() devm_reset_controller_register()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hoRTC devm_rtc_device_register() devm_rtc_allocate_device() devm_rtc_register_device() devm_rtc_nvmem_register() h](jA)}(hRTCh]hRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hjdevm_rtc_device_register() devm_rtc_allocate_device() devm_rtc_register_device() devm_rtc_nvmem_register()h]hjdevm_rtc_device_register() devm_rtc_allocate_device() devm_rtc_register_device() devm_rtc_nvmem_register()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h!SERDEV devm_serdev_device_open() h](jA)}(hSERDEVh]hSERDEV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hdevm_serdev_device_open()h]hdevm_serdev_device_open()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h5SLAVE DMA ENGINE devm_acpi_dma_controller_register() h](jA)}(hSLAVE DMA ENGINEh]hSLAVE DMA ENGINE}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhj"ubjQ)}(hhh]h)}(h#devm_acpi_dma_controller_register()h]h#devm_acpi_dma_controller_register()}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj4ubah}(h]h ]h"]h$]h&]uh1jPhj"ubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(hSPI devm_spi_alloc_host() devm_spi_alloc_target() devm_spi_optimize_message() devm_spi_register_controller() devm_spi_register_host() devm_spi_register_target() h](jA)}(hSPIh]hSPI}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjQubjQ)}(hhh]h)}(hdevm_spi_alloc_host() devm_spi_alloc_target() devm_spi_optimize_message() devm_spi_register_controller() devm_spi_register_host() devm_spi_register_target()h]hdevm_spi_alloc_host() devm_spi_alloc_target() devm_spi_optimize_message() devm_spi_register_controller() devm_spi_register_host() devm_spi_register_target()}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjcubah}(h]h ]h"]h$]h&]uh1jPhjQubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h)WATCHDOG devm_watchdog_register_device() h](jA)}(hWATCHDOGh]hWATCHDOG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(hdevm_watchdog_register_device()h]hdevm_watchdog_register_device()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubj;)}(h?WORKQUEUE devm_alloc_workqueue() devm_alloc_ordered_workqueue()h](jA)}(h WORKQUEUEh]h WORKQUEUE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j@hhhMhjubjQ)}(hhh]h)}(h5devm_alloc_workqueue() devm_alloc_ordered_workqueue()h]h5devm_alloc_workqueue() devm_alloc_ordered_workqueue()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jPhjubeh}(h]h ]h"]h$]h&]uh1j:hhhMhj7hhubeh}(h]h ]h"]h$]h&]uh1j5hj$hhhhhNubeh}(h]list-of-managed-interfacesah ]h"]6. list of managed interfacesah$]h&]uh1hhhhhhhhKubeh}(h]devres-managed-device-resourceah ]h"] devres - managed device resourceah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehʌ _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(jjj_j\j j jjjjj!jjju nametypes}(jj_j jjj!juh}(jhj\jj jbjjjjjjjj$u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.