sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget(/translations/zh_CN/driver-api/device-iomodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/zh_TW/driver-api/device-iomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/it_IT/driver-api/device-iomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ja_JP/driver-api/device-iomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/ko_KR/driver-api/device-iomodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget(/translations/sp_SP/driver-api/device-iomodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(hCopyright 2001 Matthew Wilcoxh]hCopyright 2001 Matthew Wilcox}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhB/var/lib/git/docbuild/linux/Documentation/driver-api/device-io.rsthKubh)}(hhh]h}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubh)}(h9This documentation is free software; you can redistributeh]h9This documentation is free software; you can redistribute}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubh)}(h=it and/or modify it under the terms of the GNU General Publich]h=it and/or modify it under the terms of the GNU General Public}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubh)}(hhjhhubj9)}(hThe read and write functions are defined to be ordered. That is the compiler is not permitted to reorder the I/O sequence. When the ordering can be compiler optimised, you can use __readb() and friends to indicate the relaxed ordering. Use this with care.h]hThe read and write functions are defined to be ordered. That is the compiler is not permitted to reorder the I/O sequence. When the ordering can be compiler optimised, you can use __readb() and friends to indicate the relaxed ordering. Use this with care.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKDhjhhubj9)}(hXWhile the basic functions are defined to be synchronous with respect to each other and ordered with respect to each other the busses the devices sit on may themselves have asynchronicity. In particular many authors are burned by the fact that PCI bus writes are posted asynchronously. A driver author must issue a read from the same device to ensure that writes have occurred in the specific cases the author cares. This kind of property cannot be hidden from driver writers in the API. In some cases, the read used to flush the device may be expected to fail (if the card is resetting, for example). In that case, the read should be done from config space, which is guaranteed to soft-fail if the card doesn't respond.h]hXWhile the basic functions are defined to be synchronous with respect to each other and ordered with respect to each other the busses the devices sit on may themselves have asynchronicity. In particular many authors are burned by the fact that PCI bus writes are posted asynchronously. A driver author must issue a read from the same device to ensure that writes have occurred in the specific cases the author cares. This kind of property cannot be hidden from driver writers in the API. In some cases, the read used to flush the device may be expected to fail (if the card is resetting, for example). In that case, the read should be done from config space, which is guaranteed to soft-fail if the card doesn’t respond.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKIhjhhubj9)}(hThe following is an example of flushing a write to a device when the driver would like to ensure the write's effects are visible prior to continuing execution::h]hThe following is an example of flushing a write to a device when the driver would like to ensure the write’s effects are visible prior to continuing execution:}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKUhjhhubh literal_block)}(hXstatic inline void qla1280_disable_intrs(struct scsi_qla_host *ha) { struct device_reg *reg; reg = ha->iobase; /* disable risc and host interrupts */ WRT_REG_WORD(®->ictrl, 0); /* * The following read will ensure that the above write * has been received by the device before we return from this * function. */ RD_REG_WORD(®->ictrl); ha->flags.ints_enabled = 0; }h]hXstatic inline void qla1280_disable_intrs(struct scsi_qla_host *ha) { struct device_reg *reg; reg = ha->iobase; /* disable risc and host interrupts */ WRT_REG_WORD(®->ictrl, 0); /* * The following read will ensure that the above write * has been received by the device before we return from this * function. */ RD_REG_WORD(®->ictrl); ha->flags.ints_enabled = 0; }}hjjsbah}(h]h ]h"]h$]h&]hhuh1jhhhhKYhjhhubj9)}(hXBPCI ordering rules also guarantee that PIO read responses arrive after any outstanding DMA writes from that bus, since for some devices the result of a readb() call may signal to the driver that a DMA transaction is complete. In many cases, however, the driver may want to indicate that the next readb() call has no relation to any previous DMA writes performed by the device. The driver can use readb_relaxed() for these cases, although only some platforms will honor the relaxed semantics. Using the relaxed read functions will provide significant performance benefits on platforms that support it. The qla2xxx driver provides examples of how to use readX_relaxed(). In many cases, a majority of the driver's readX() calls can safely be converted to readX_relaxed() calls, since only a few will indicate or depend on DMA completion.h]hXDPCI ordering rules also guarantee that PIO read responses arrive after any outstanding DMA writes from that bus, since for some devices the result of a readb() call may signal to the driver that a DMA transaction is complete. In many cases, however, the driver may want to indicate that the next readb() call has no relation to any previous DMA writes performed by the device. The driver can use readb_relaxed() for these cases, although only some platforms will honor the relaxed semantics. Using the relaxed read functions will provide significant performance benefits on platforms that support it. The qla2xxx driver provides examples of how to use readX_relaxed(). In many cases, a majority of the driver’s readX() calls can safely be converted to readX_relaxed() calls, since only a few will indicate or depend on DMA completion.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKjhjhhubeh}(h]accessing-the-deviceah ]h"]accessing the deviceah$]h&]uh1jhjhhhhhK1 referencedKubeh}(h]memory-mapped-ioah ]h"]memory mapped ioah$]h&]uh1jhjhhhhhKubj)}(hhh](j )}(hPort Space Accessesh]hPort Space Accesses}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhKxubj)}(hhh](j )}(hPort Space Explainedh]hPort Space Explained}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhK{ubj9)}(hXAnother form of IO commonly supported is Port Space. This is a range of addresses separate to the normal memory address space. Access to these addresses is generally not as fast as accesses to the memory mapped addresses, and it also has a potentially smaller address space.h]hXAnother form of IO commonly supported is Port Space. This is a range of addresses separate to the normal memory address space. Access to these addresses is generally not as fast as accesses to the memory mapped addresses, and it also has a potentially smaller address space.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhK}hjhhubj9)}(hIUnlike memory mapped IO, no preparation is required to access port space.h]hIUnlike memory mapped IO, no preparation is required to access port space.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubeh}(h]port-space-explainedah ]h"]port space explainedah$]h&]uh1jhjhhhhhK{ubj)}(hhh](j )}(hAccessing Port Spaceh]hAccessing Port Space}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhKubj9)}(hAccesses to this space are provided through a set of functions which allow 8-bit, 16-bit and 32-bit accesses; also known as byte, word and long. These functions are inb(), inw(), inl(), outb(), outw() and outl().h]hAccesses to this space are provided through a set of functions which allow 8-bit, 16-bit and 32-bit accesses; also known as byte, word and long. These functions are inb(), inw(), inl(), outb(), outw() and outl().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj9)}(hX6Some variants are provided for these functions. Some devices require that accesses to their ports are slowed down. This functionality is provided by appending a ``_p`` to the end of the function. There are also equivalents to memcpy. The ins() and outs() functions copy bytes, words or longs to the given port.h](hSome variants are provided for these functions. Some devices require that accesses to their ports are slowed down. This functionality is provided by appending a }(hjhhhNhNubhliteral)}(h``_p``h]h_p}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh to the end of the function. There are also equivalents to memcpy. The ins() and outs() functions copy bytes, words or longs to the given port.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubeh}(h]accessing-port-spaceah ]h"]accessing port spaceah$]h&]uh1jhjhhhhhKubeh}(h]port-space-accessesah ]h"]port space accessesah$]h&]uh1jhjhhhhhKxubj)}(hhh](j )}(h__iomem pointer tokensh]h__iomem pointer tokens}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.hhhhhKubj9)}(hXThe data type for an MMIO address is an ``__iomem`` qualified pointer, such as ``void __iomem *reg``. On most architectures it is a regular pointer that points to a virtual memory address and can be offset or dereferenced, but in portable code, it must only be passed from and to functions that explicitly operated on an ``__iomem`` token, in particular the ioremap() and readl()/writel() functions. The 'sparse' semantic code checker can be used to verify that this is done correctly.h](h(The data type for an MMIO address is an }(hj?hhhNhNubj)}(h ``__iomem``h]h__iomem}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubh qualified pointer, such as }(hj?hhhNhNubj)}(h``void __iomem *reg``h]hvoid __iomem *reg}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubh. On most architectures it is a regular pointer that points to a virtual memory address and can be offset or dereferenced, but in portable code, it must only be passed from and to functions that explicitly operated on an }(hj?hhhNhNubj)}(h ``__iomem``h]h__iomem}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?ubh token, in particular the ioremap() and readl()/writel() functions. The ‘sparse’ semantic code checker can be used to verify that this is done correctly.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhKhj.hhubj9)}(hXBWhile on most architectures, ioremap() creates a page table entry for an uncached virtual address pointing to the physical MMIO address, some architectures require special instructions for MMIO, and the ``__iomem`` pointer just encodes the physical address or an offsettable cookie that is interpreted by readl()/writel().h](hWhile on most architectures, ioremap() creates a page table entry for an uncached virtual address pointing to the physical MMIO address, some architectures require special instructions for MMIO, and the }(hjhhhNhNubj)}(h ``__iomem``h]h__iomem}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhl pointer just encodes the physical address or an offsettable cookie that is interpreted by readl()/writel().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhKhj.hhubeh}(h]iomem-pointer-tokensah ]h"]__iomem pointer tokensah$]h&]uh1jhjhhhhhKubj)}(hhh](j )}(h(Differences between I/O access functionsh]h(Differences between I/O access functions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhKubj9)}(hJreadq(), readl(), readw(), readb(), writeq(), writel(), writew(), writeb()h]hJreadq(), readl(), readw(), readb(), writeq(), writel(), writew(), writeb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubh block_quote)}(hXThese are the most generic accessors, providing serialization against other MMIO accesses and DMA accesses as well as fixed endianness for accessing little-endian PCI devices and on-chip peripherals. Portable device drivers should generally use these for any access to ``__iomem`` pointers. Note that posted writes are not strictly ordered against a spinlock, see Documentation/driver-api/io_ordering.rst. h](j9)}(hX"These are the most generic accessors, providing serialization against other MMIO accesses and DMA accesses as well as fixed endianness for accessing little-endian PCI devices and on-chip peripherals. Portable device drivers should generally use these for any access to ``__iomem`` pointers.h](hX These are the most generic accessors, providing serialization against other MMIO accesses and DMA accesses as well as fixed endianness for accessing little-endian PCI devices and on-chip peripherals. Portable device drivers should generally use these for any access to }(hjhhhNhNubj)}(h ``__iomem``h]h__iomem}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh pointers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhKhjubj9)}(hrNote that posted writes are not strictly ordered against a spinlock, see Documentation/driver-api/io_ordering.rst.h]hrNote that posted writes are not strictly ordered against a spinlock, see Documentation/driver-api/io_ordering.rst.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(hreadq_relaxed(), readl_relaxed(), readw_relaxed(), readb_relaxed(), writeq_relaxed(), writel_relaxed(), writew_relaxed(), writeb_relaxed()h]hreadq_relaxed(), readl_relaxed(), readw_relaxed(), readb_relaxed(), writeq_relaxed(), writel_relaxed(), writew_relaxed(), writeb_relaxed()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj)}(hXOn architectures that require an expensive barrier for serializing against DMA, these "relaxed" versions of the MMIO accessors only serialize against each other, but contain a less expensive barrier operation. A device driver might use these in a particularly performance sensitive fast path, with a comment that explains why the usage in a specific location is safe without the extra barriers. See memory-barriers.txt for a more detailed discussion on the precise ordering guarantees of the non-relaxed and relaxed versions. h](j9)}(hXOn architectures that require an expensive barrier for serializing against DMA, these "relaxed" versions of the MMIO accessors only serialize against each other, but contain a less expensive barrier operation. A device driver might use these in a particularly performance sensitive fast path, with a comment that explains why the usage in a specific location is safe without the extra barriers.h]hXOn architectures that require an expensive barrier for serializing against DMA, these “relaxed” versions of the MMIO accessors only serialize against each other, but contain a less expensive barrier operation. A device driver might use these in a particularly performance sensitive fast path, with a comment that explains why the usage in a specific location is safe without the extra barriers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjubj9)}(hSee memory-barriers.txt for a more detailed discussion on the precise ordering guarantees of the non-relaxed and relaxed versions.h]hSee memory-barriers.txt for a more detailed discussion on the precise ordering guarantees of the non-relaxed and relaxed versions.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(h`ioread64(), ioread32(), ioread16(), ioread8(), iowrite64(), iowrite32(), iowrite16(), iowrite8()h]h`ioread64(), ioread32(), ioread16(), ioread8(), iowrite64(), iowrite32(), iowrite16(), iowrite8()}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj)}(hXThese are an alternative to the normal readl()/writel() functions, with almost identical behavior, but they can also operate on ``__iomem`` tokens returned for mapping PCI I/O space with pci_iomap() or ioport_map(). On architectures that require special instructions for I/O port access, this adds a small overhead for an indirect function call implemented in lib/iomap.c, while on other architectures, these are simply aliases. h]j9)}(hXThese are an alternative to the normal readl()/writel() functions, with almost identical behavior, but they can also operate on ``__iomem`` tokens returned for mapping PCI I/O space with pci_iomap() or ioport_map(). On architectures that require special instructions for I/O port access, this adds a small overhead for an indirect function call implemented in lib/iomap.c, while on other architectures, these are simply aliases.h](hThese are an alternative to the normal readl()/writel() functions, with almost identical behavior, but they can also operate on }(hjJhhhNhNubj)}(h ``__iomem``h]h__iomem}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjJubhX! tokens returned for mapping PCI I/O space with pci_iomap() or ioport_map(). On architectures that require special instructions for I/O port access, this adds a small overhead for an indirect function call implemented in lib/iomap.c, while on other architectures, these are simply aliases.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhKhjFubah}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(hTioread64be(), ioread32be(), ioread16be() iowrite64be(), iowrite32be(), iowrite16be()h]hTioread64be(), ioread32be(), ioread16be() iowrite64be(), iowrite32be(), iowrite16be()}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj)}(hXThese behave in the same way as the ioread32()/iowrite32() family, but with reversed byte order, for accessing devices with big-endian MMIO registers. Device drivers that can operate on either big-endian or little-endian registers may have to implement a custom wrapper function that picks one or the other depending on which device was found. Note: On some architectures, the normal readl()/writel() functions traditionally assume that devices are the same endianness as the CPU, while using a hardware byte-reverse on the PCI bus when running a big-endian kernel. Drivers that use readl()/writel() this way are generally not portable, but tend to be limited to a particular SoC. h](j9)}(hXWThese behave in the same way as the ioread32()/iowrite32() family, but with reversed byte order, for accessing devices with big-endian MMIO registers. Device drivers that can operate on either big-endian or little-endian registers may have to implement a custom wrapper function that picks one or the other depending on which device was found.h]hXWThese behave in the same way as the ioread32()/iowrite32() family, but with reversed byte order, for accessing devices with big-endian MMIO registers. Device drivers that can operate on either big-endian or little-endian registers may have to implement a custom wrapper function that picks one or the other depending on which device was found.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhj~ubj9)}(hXPNote: On some architectures, the normal readl()/writel() functions traditionally assume that devices are the same endianness as the CPU, while using a hardware byte-reverse on the PCI bus when running a big-endian kernel. Drivers that use readl()/writel() this way are generally not portable, but tend to be limited to a particular SoC.h]hXPNote: On some architectures, the normal readl()/writel() functions traditionally assume that devices are the same endianness as the CPU, while using a hardware byte-reverse on the PCI bus when running a big-endian kernel. Drivers that use readl()/writel() this way are generally not portable, but tend to be limited to a particular SoC.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhj~ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(hX6hi_lo_readq(), lo_hi_readq(), hi_lo_readq_relaxed(), lo_hi_readq_relaxed(), ioread64_lo_hi(), ioread64_hi_lo(), ioread64be_lo_hi(), ioread64be_hi_lo(), hi_lo_writeq(), lo_hi_writeq(), hi_lo_writeq_relaxed(), lo_hi_writeq_relaxed(), iowrite64_lo_hi(), iowrite64_hi_lo(), iowrite64be_lo_hi(), iowrite64be_hi_lo()h]hX6hi_lo_readq(), lo_hi_readq(), hi_lo_readq_relaxed(), lo_hi_readq_relaxed(), ioread64_lo_hi(), ioread64_hi_lo(), ioread64be_lo_hi(), ioread64be_hi_lo(), hi_lo_writeq(), lo_hi_writeq(), hi_lo_writeq_relaxed(), lo_hi_writeq_relaxed(), iowrite64_lo_hi(), iowrite64_hi_lo(), iowrite64be_lo_hi(), iowrite64be_hi_lo()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj)}(hXkSome device drivers have 64-bit registers that cannot be accessed atomically on 32-bit architectures but allow two consecutive 32-bit accesses instead. Since it depends on the particular device which of the two halves has to be accessed first, a helper is provided for each combination of 64-bit accessors with either low/high or high/low word ordering. A device driver must include either or to get the function definitions along with helpers that redirect the normal readq()/writeq() to them on architectures that do not provide 64-bit access natively. h]j9)}(hXjSome device drivers have 64-bit registers that cannot be accessed atomically on 32-bit architectures but allow two consecutive 32-bit accesses instead. Since it depends on the particular device which of the two halves has to be accessed first, a helper is provided for each combination of 64-bit accessors with either low/high or high/low word ordering. A device driver must include either or to get the function definitions along with helpers that redirect the normal readq()/writeq() to them on architectures that do not provide 64-bit access natively.h]hXjSome device drivers have 64-bit registers that cannot be accessed atomically on 32-bit architectures but allow two consecutive 32-bit accesses instead. Since it depends on the particular device which of the two halves has to be accessed first, a helper is provided for each combination of 64-bit accessors with either low/high or high/low word ordering. A device driver must include either or to get the function definitions along with helpers that redirect the normal readq()/writeq() to them on architectures that do not provide 64-bit access natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(hz__raw_readq(), __raw_readl(), __raw_readw(), __raw_readb(), __raw_writeq(), __raw_writel(), __raw_writew(), __raw_writeb()h]hz__raw_readq(), __raw_readl(), __raw_readw(), __raw_readb(), __raw_writeq(), __raw_writel(), __raw_writew(), __raw_writeb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj)}(hXThese are low-level MMIO accessors without barriers or byteorder changes and architecture specific behavior. Accesses are usually atomic in the sense that a four-byte __raw_readl() does not get split into individual byte loads, but multiple consecutive accesses can be combined on the bus. In portable code, it is only safe to use these to access memory behind a device bus but not MMIO registers, as there are no ordering guarantees with regard to other MMIO accesses or even spinlocks. The byte order is generally the same as for normal memory, so unlike the other functions, these can be used to copy data between kernel memory and device memory. h]j9)}(hXThese are low-level MMIO accessors without barriers or byteorder changes and architecture specific behavior. Accesses are usually atomic in the sense that a four-byte __raw_readl() does not get split into individual byte loads, but multiple consecutive accesses can be combined on the bus. In portable code, it is only safe to use these to access memory behind a device bus but not MMIO registers, as there are no ordering guarantees with regard to other MMIO accesses or even spinlocks. The byte order is generally the same as for normal memory, so unlike the other functions, these can be used to copy data between kernel memory and device memory.h]hXThese are low-level MMIO accessors without barriers or byteorder changes and architecture specific behavior. Accesses are usually atomic in the sense that a four-byte __raw_readl() does not get split into individual byte loads, but multiple consecutive accesses can be combined on the bus. In portable code, it is only safe to use these to access memory behind a device bus but not MMIO registers, as there are no ordering guarantees with regard to other MMIO accesses or even spinlocks. The byte order is generally the same as for normal memory, so unlike the other functions, these can be used to copy data between kernel memory and device memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(h+inl(), inw(), inb(), outl(), outw(), outb()h]h+inl(), inw(), inb(), outl(), outw(), outb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhKhjhhubj)}(hXRPCI I/O port resources traditionally require separate helpers as they are implemented using special instructions on the x86 architecture. On most other architectures, these are mapped to readl()/writel() style accessors internally, usually pointing to a fixed area in virtual memory. Instead of an ``__iomem`` pointer, the address is a 32-bit integer token to identify a port number. PCI requires I/O port access to be non-posted, meaning that an outb() must complete before the following code executes, while a normal writeb() may still be in progress. On architectures that correctly implement this, I/O port access is therefore ordered against spinlocks. Many non-x86 PCI host bridge implementations and CPU architectures however fail to implement non-posted I/O space on PCI, so they can end up being posted on such hardware. In some architectures, the I/O port number space has a 1:1 mapping to ``__iomem`` pointers, but this is not recommended and device drivers should not rely on that for portability. Similarly, an I/O port number as described in a PCI base address register may not correspond to the port number as seen by a device driver. Portable drivers need to read the port number for the resource provided by the kernel. There are no direct 64-bit I/O port accessors, but pci_iomap() in combination with ioread64/iowrite64 can be used instead. h](j9)}(hX=PCI I/O port resources traditionally require separate helpers as they are implemented using special instructions on the x86 architecture. On most other architectures, these are mapped to readl()/writel() style accessors internally, usually pointing to a fixed area in virtual memory. Instead of an ``__iomem`` pointer, the address is a 32-bit integer token to identify a port number. PCI requires I/O port access to be non-posted, meaning that an outb() must complete before the following code executes, while a normal writeb() may still be in progress. On architectures that correctly implement this, I/O port access is therefore ordered against spinlocks. Many non-x86 PCI host bridge implementations and CPU architectures however fail to implement non-posted I/O space on PCI, so they can end up being posted on such hardware.h](hX*PCI I/O port resources traditionally require separate helpers as they are implemented using special instructions on the x86 architecture. On most other architectures, these are mapped to readl()/writel() style accessors internally, usually pointing to a fixed area in virtual memory. Instead of an }(hjhhhNhNubj)}(h ``__iomem``h]h__iomem}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhX pointer, the address is a 32-bit integer token to identify a port number. PCI requires I/O port access to be non-posted, meaning that an outb() must complete before the following code executes, while a normal writeb() may still be in progress. On architectures that correctly implement this, I/O port access is therefore ordered against spinlocks. Many non-x86 PCI host bridge implementations and CPU architectures however fail to implement non-posted I/O space on PCI, so they can end up being posted on such hardware.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhKhjubj9)}(hXIn some architectures, the I/O port number space has a 1:1 mapping to ``__iomem`` pointers, but this is not recommended and device drivers should not rely on that for portability. Similarly, an I/O port number as described in a PCI base address register may not correspond to the port number as seen by a device driver. Portable drivers need to read the port number for the resource provided by the kernel.h](hFIn some architectures, the I/O port number space has a 1:1 mapping to }(hj"hhhNhNubj)}(h ``__iomem``h]h__iomem}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"ubhXE pointers, but this is not recommended and device drivers should not rely on that for portability. Similarly, an I/O port number as described in a PCI base address register may not correspond to the port number as seen by a device driver. Portable drivers need to read the port number for the resource provided by the kernel.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhjubj9)}(hzThere are no direct 64-bit I/O port accessors, but pci_iomap() in combination with ioread64/iowrite64 can be used instead.h]hzThere are no direct 64-bit I/O port accessors, but pci_iomap() in combination with ioread64/iowrite64 can be used instead.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM hjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj9)}(h7inl_p(), inw_p(), inb_p(), outl_p(), outw_p(), outb_p()h]h7inl_p(), inw_p(), inb_p(), outl_p(), outw_p(), outb_p()}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM hjhhubj)}(hOn ISA devices that require specific timing, the _p versions of the I/O accessors add a small delay. On architectures that do not have ISA buses, these are aliases to the normal inb/outb helpers. h]j9)}(hOn ISA devices that require specific timing, the _p versions of the I/O accessors add a small delay. On architectures that do not have ISA buses, these are aliases to the normal inb/outb helpers.h]hOn ISA devices that require specific timing, the _p versions of the I/O accessors add a small delay. On architectures that do not have ISA buses, these are aliases to the normal inb/outb helpers.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjdubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj9)}(hreadsq, readsl, readsw, readsb writesq, writesl, writesw, writesb ioread64_rep, ioread32_rep, ioread16_rep, ioread8_rep iowrite64_rep, iowrite32_rep, iowrite16_rep, iowrite8_rep insl, insw, insb, outsl, outsw, outsbh]hreadsq, readsl, readsw, readsb writesq, writesl, writesw, writesb ioread64_rep, ioread32_rep, ioread16_rep, ioread8_rep iowrite64_rep, iowrite32_rep, iowrite16_rep, iowrite8_rep insl, insw, insb, outsl, outsw, outsb}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubj)}(hX\These are helpers that access the same address multiple times, usually to copy data between kernel memory byte stream and a FIFO buffer. Unlike the normal MMIO accessors, these do not perform a byteswap on big-endian kernels, so the first byte in the FIFO register corresponds to the first byte in the memory buffer regardless of the architecture. h]j9)}(hX[These are helpers that access the same address multiple times, usually to copy data between kernel memory byte stream and a FIFO buffer. Unlike the normal MMIO accessors, these do not perform a byteswap on big-endian kernels, so the first byte in the FIFO register corresponds to the first byte in the memory buffer regardless of the architecture.h]hX[These are helpers that access the same address multiple times, usually to copy data between kernel memory byte stream and a FIFO buffer. Unlike the normal MMIO accessors, these do not perform a byteswap on big-endian kernels, so the first byte in the FIFO register corresponds to the first byte in the memory buffer regardless of the architecture.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubeh}(h](differences-between-i-o-access-functionsah ]h"](differences between i/o access functionsah$]h&]uh1jhjhhhhhKubj)}(hhh](j )}(hDevice memory mapping modesh]hDevice memory mapping modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhM ubj9)}(hSome architectures support multiple modes for mapping device memory. ioremap_*() variants provide a common abstraction around these architecture-specific modes, with a shared set of semantics.h]hSome architectures support multiple modes for mapping device memory. ioremap_*() variants provide a common abstraction around these architecture-specific modes, with a shared set of semantics.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM"hjhhubj9)}(hioremap() is the most common mapping type, and is applicable to typical device memory (e.g. I/O registers). Other modes can offer weaker or stronger guarantees, if supported by the architecture. From most to least common, they are as follows:h]hioremap() is the most common mapping type, and is applicable to typical device memory (e.g. I/O registers). Other modes can offer weaker or stronger guarantees, if supported by the architecture. From most to least common, they are as follows:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM&hjhhubj)}(hhh](j )}(h ioremap()h]h ioremap()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhM,ubj9)}(hThe default mode, suitable for most memory-mapped devices, e.g. control registers. Memory mapped using ioremap() has the following characteristics:h]hThe default mode, suitable for most memory-mapped devices, e.g. control registers. Memory mapped using ioremap() has the following characteristics:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM.hjhhubh bullet_list)}(hhh](h list_item)}(hdUncached - CPU-side caches are bypassed, and all reads and writes are handled directly by the deviceh]j9)}(hdUncached - CPU-side caches are bypassed, and all reads and writes are handled directly by the deviceh]hdUncached - CPU-side caches are bypassed, and all reads and writes are handled directly by the device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM1hjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hNo speculative operations - the CPU may not issue a read or write to this memory, unless the instruction that does so has been reached in committed program flow.h]j9)}(hNo speculative operations - the CPU may not issue a read or write to this memory, unless the instruction that does so has been reached in committed program flow.h]hNo speculative operations - the CPU may not issue a read or write to this memory, unless the instruction that does so has been reached in committed program flow.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM3hjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hNo reordering - The CPU may not reorder accesses to this memory mapping with respect to each other. On some architectures, this relies on barriers in readl_relaxed()/writel_relaxed().h]j9)}(hNo reordering - The CPU may not reorder accesses to this memory mapping with respect to each other. On some architectures, this relies on barriers in readl_relaxed()/writel_relaxed().h]hNo reordering - The CPU may not reorder accesses to this memory mapping with respect to each other. On some architectures, this relies on barriers in readl_relaxed()/writel_relaxed().}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM6hj-ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h`No repetition - The CPU may not issue multiple reads or writes for a single program instruction.h]j9)}(h`No repetition - The CPU may not issue multiple reads or writes for a single program instruction.h]h`No repetition - The CPU may not issue multiple reads or writes for a single program instruction.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM9hjEubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hNo write-combining - Each I/O operation results in one discrete read or write being issued to the device, and multiple writes are not combined into larger writes. This may or may not be enforced when using __raw I/O accessors or pointer dereferences.h]j9)}(hNo write-combining - Each I/O operation results in one discrete read or write being issued to the device, and multiple writes are not combined into larger writes. This may or may not be enforced when using __raw I/O accessors or pointer dereferences.h]hNo write-combining - Each I/O operation results in one discrete read or write being issued to the device, and multiple writes are not combined into larger writes. This may or may not be enforced when using __raw I/O accessors or pointer dereferences.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM;hj]ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hNon-executable - The CPU is not allowed to speculate instruction execution from this memory (it probably goes without saying, but you're also not allowed to jump into device memory). h]j9)}(hNon-executable - The CPU is not allowed to speculate instruction execution from this memory (it probably goes without saying, but you're also not allowed to jump into device memory).h]hNon-executable - The CPU is not allowed to speculate instruction execution from this memory (it probably goes without saying, but you’re also not allowed to jump into device memory).}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhM?hjuubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]bullet*uh1jhhhM1hjhhubj9)}(hOn many platforms and buses (e.g. PCI), writes issued through ioremap() mappings are posted, which means that the CPU does not wait for the write to actually reach the target device before retiring the write instruction.h]hOn many platforms and buses (e.g. PCI), writes issued through ioremap() mappings are posted, which means that the CPU does not wait for the write to actually reach the target device before retiring the write instruction.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMChjhhubj9)}(hOn many platforms, I/O accesses must be aligned with respect to the access size; failure to do so will result in an exception or unpredictable results.h]hOn many platforms, I/O accesses must be aligned with respect to the access size; failure to do so will result in an exception or unpredictable results.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMGhjhhubeh}(h]ioremapah ]h"] ioremap()ah$]h&]uh1jhjhhhhhM,ubj)}(hhh](j )}(h ioremap_wc()h]h ioremap_wc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhMKubj9)}(hHMaps I/O memory as normal memory with write combining. Unlike ioremap(),h]hHMaps I/O memory as normal memory with write combining. Unlike ioremap(),}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMMhjhhubj)}(hhh](j)}(hThe CPU may speculatively issue reads from the device that the program didn't actually execute, and may choose to basically read whatever it wants.h]j9)}(hThe CPU may speculatively issue reads from the device that the program didn't actually execute, and may choose to basically read whatever it wants.h]hThe CPU may speculatively issue reads from the device that the program didn’t actually execute, and may choose to basically read whatever it wants.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMOhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hdThe CPU may reorder operations as long as the result is consistent from the program's point of view.h]j9)}(hdThe CPU may reorder operations as long as the result is consistent from the program's point of view.h]hfThe CPU may reorder operations as long as the result is consistent from the program’s point of view.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMQhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hcThe CPU may write to the same location multiple times, even when the program issued a single write.h]j9)}(hcThe CPU may write to the same location multiple times, even when the program issued a single write.h]hcThe CPU may write to the same location multiple times, even when the program issued a single write.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMShj ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h?The CPU may combine several writes into a single larger write. h]j9)}(h>The CPU may combine several writes into a single larger write.h]h>The CPU may combine several writes into a single larger write.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMUhj#ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]jjuh1jhhhMOhjhhubj9)}(hXRThis mode is typically used for video framebuffers, where it can increase performance of writes. It can also be used for other blocks of memory in devices (e.g. buffers or shared memory), but care must be taken as accesses are not guaranteed to be ordered with respect to normal ioremap() MMIO register accesses without explicit barriers.h]hXRThis mode is typically used for video framebuffers, where it can increase performance of writes. It can also be used for other blocks of memory in devices (e.g. buffers or shared memory), but care must be taken as accesses are not guaranteed to be ordered with respect to normal ioremap() MMIO register accesses without explicit barriers.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMWhjhhubj9)}(hXOn a PCI bus, it is usually safe to use ioremap_wc() on MMIO areas marked as ``IORESOURCE_PREFETCH``, but it may not be used on those without the flag. For on-chip devices, there is no corresponding flag, but a driver can use ioremap_wc() on a device that is known to be safe.h](hMOn a PCI bus, it is usually safe to use ioremap_wc() on MMIO areas marked as }(hjOhhhNhNubj)}(h``IORESOURCE_PREFETCH``h]hIORESOURCE_PREFETCH}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjOubh, but it may not be used on those without the flag. For on-chip devices, there is no corresponding flag, but a driver can use ioremap_wc() on a device that is known to be safe.}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhM]hjhhubeh}(h] ioremap-wcah ]h"] ioremap_wc()ah$]h&]uh1jhjhhhhhMKubj)}(hhh](j )}(h ioremap_wt()h]h ioremap_wt()}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjwhhhhhMcubj9)}(hYMaps I/O memory as normal memory with write-through caching. Like ioremap_wc(), but also,h]hYMaps I/O memory as normal memory with write-through caching. Like ioremap_wc(), but also,}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMehjwhhubj)}(hhh]j)}(h_The CPU may cache writes issued to and reads from the device, and serve reads from that cache. h]j9)}(h^The CPU may cache writes issued to and reads from the device, and serve reads from that cache.h]h^The CPU may cache writes issued to and reads from the device, and serve reads from that cache.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubah}(h]h ]h"]h$]h&]jjuh1jhhhMhhjwhhubj9)}(hXThis mode is sometimes used for video framebuffers, where drivers still expect writes to reach the device in a timely manner (and not be stuck in the CPU cache), but reads may be served from the cache for efficiency. However, it is rarely useful these days, as framebuffer drivers usually perform writes only, for which ioremap_wc() is more efficient (as it doesn't needlessly trash the cache). Most drivers should not use this.h]hXThis mode is sometimes used for video framebuffers, where drivers still expect writes to reach the device in a timely manner (and not be stuck in the CPU cache), but reads may be served from the cache for efficiency. However, it is rarely useful these days, as framebuffer drivers usually perform writes only, for which ioremap_wc() is more efficient (as it doesn’t needlessly trash the cache). Most drivers should not use this.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMkhjwhhubeh}(h] ioremap-wtah ]h"] ioremap_wt()ah$]h&]uh1jhjhhhhhMcubj)}(hhh](j )}(h ioremap_np()h]h ioremap_np()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhMsubj9)}(hXLike ioremap(), but explicitly requests non-posted write semantics. On some architectures and buses, ioremap() mappings have posted write semantics, which means that writes can appear to "complete" from the point of view of the CPU before the written data actually arrives at the target device. Writes are still ordered with respect to other writes and reads from the same device, but due to the posted write semantics, this is not the case with respect to other devices. ioremap_np() explicitly requests non-posted semantics, which means that the write instruction will not appear to complete until the device has received (and to some platform-specific extent acknowledged) the written data.h]hXLike ioremap(), but explicitly requests non-posted write semantics. On some architectures and buses, ioremap() mappings have posted write semantics, which means that writes can appear to “complete” from the point of view of the CPU before the written data actually arrives at the target device. Writes are still ordered with respect to other writes and reads from the same device, but due to the posted write semantics, this is not the case with respect to other devices. ioremap_np() explicitly requests non-posted semantics, which means that the write instruction will not appear to complete until the device has received (and to some platform-specific extent acknowledged) the written data.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMuhjhhubj9)}(hXThis mapping mode primarily exists to cater for platforms with bus fabrics that require this particular mapping mode to work correctly. These platforms set the ``IORESOURCE_MEM_NONPOSTED`` flag for a resource that requires ioremap_np() semantics and portable drivers should use an abstraction that automatically selects it where appropriate (see the `Higher-level ioremap abstractions`_ section below).h](hThis mapping mode primarily exists to cater for platforms with bus fabrics that require this particular mapping mode to work correctly. These platforms set the }(hjhhhNhNubj)}(h``IORESOURCE_MEM_NONPOSTED``h]hIORESOURCE_MEM_NONPOSTED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh flag for a resource that requires ioremap_np() semantics and portable drivers should use an abstraction that automatically selects it where appropriate (see the }(hjhhhNhNubh reference)}(h$`Higher-level ioremap abstractions`_h]h!Higher-level ioremap abstractions}(hjhhhNhNubah}(h]h ]h"]h$]h&]name!Higher-level ioremap abstractionsrefid!higher-level-ioremap-abstractionsuh1jhjresolvedKubh section below).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubj9)}(hXThe bare ioremap_np() is only available on some architectures; on others, it always returns NULL. Drivers should not normally use it, unless they are platform-specific or they derive benefit from non-posted writes where supported, and can fall back to ioremap() otherwise. The normal approach to ensure posted write completion is to do a dummy read after a write as explained in `Accessing the device`_, which works with ioremap() on all platforms.h](hX{The bare ioremap_np() is only available on some architectures; on others, it always returns NULL. Drivers should not normally use it, unless they are platform-specific or they derive benefit from non-posted writes where supported, and can fall back to ioremap() otherwise. The normal approach to ensure posted write completion is to do a dummy read after a write as explained in }(hj%hhhNhNubj)}(h`Accessing the device`_h]hAccessing the device}(hj-hhhNhNubah}(h]h ]h"]h$]h&]nameAccessing the devicejjuh1jhj%jKubh., which works with ioremap() on all platforms.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubj9)}(hXioremap_np() should never be used for PCI drivers. PCI memory space writes are always posted, even on architectures that otherwise implement ioremap_np(). Using ioremap_np() for PCI BARs will at best result in posted write semantics, and at worst result in complete breakage.h]hXioremap_np() should never be used for PCI drivers. PCI memory space writes are always posted, even on architectures that otherwise implement ioremap_np(). Using ioremap_np() for PCI BARs will at best result in posted write semantics, and at worst result in complete breakage.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubj9)}(hXNote that non-posted write semantics are orthogonal to CPU-side ordering guarantees. A CPU may still choose to issue other reads or writes before a non-posted write instruction retires. See the previous section on MMIO access functions for details on the CPU side of things.h]hXNote that non-posted write semantics are orthogonal to CPU-side ordering guarantees. A CPU may still choose to issue other reads or writes before a non-posted write instruction retires. See the previous section on MMIO access functions for details on the CPU side of things.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubeh}(h] ioremap-npah ]h"] ioremap_np()ah$]h&]uh1jhjhhhhhMsubj)}(hhh](j )}(h ioremap_uc()h]h ioremap_uc()}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjkhhhhhMubj9)}(hioremap_uc() is only meaningful on old x86-32 systems with the PAT extension, and on ia64 with its slightly unconventional ioremap() behavior, everywhere elss ioremap_uc() defaults to return NULL.h]hioremap_uc() is only meaningful on old x86-32 systems with the PAT extension, and on ia64 with its slightly unconventional ioremap() behavior, everywhere elss ioremap_uc() defaults to return NULL.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjkhhubj9)}(hMPortable drivers should avoid the use of ioremap_uc(), use ioremap() instead.h]hMPortable drivers should avoid the use of ioremap_uc(), use ioremap() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjkhhubeh}(h] ioremap-ucah ]h"] ioremap_uc()ah$]h&]uh1jhjhhhhhMubj)}(hhh](j )}(hioremap_cache()h]hioremap_cache()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhMubj9)}(hX1ioremap_cache() effectively maps I/O memory as normal RAM. CPU write-back caches can be used, and the CPU is free to treat the device as if it were a block of RAM. This should never be used for device memory which has side effects of any kind, or which does not return the data previously written on read.h]hX1ioremap_cache() effectively maps I/O memory as normal RAM. CPU write-back caches can be used, and the CPU is free to treat the device as if it were a block of RAM. This should never be used for device memory which has side effects of any kind, or which does not return the data previously written on read.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubj9)}(hIt should also not be used for actual RAM, as the returned pointer is an ``__iomem`` token. memremap() can be used for mapping normal RAM that is outside of the linear kernel memory area to a regular pointer.h](hIIt should also not be used for actual RAM, as the returned pointer is an }(hjhhhNhNubj)}(h ``__iomem``h]h__iomem}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh| token. memremap() can be used for mapping normal RAM that is outside of the linear kernel memory area to a regular pointer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubj9)}(h9Portable drivers should avoid the use of ioremap_cache().h]h9Portable drivers should avoid the use of ioremap_cache().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubeh}(h] ioremap-cacheah ]h"]ioremap_cache()ah$]h&]uh1jhjhhhhhMubj)}(hhh](j )}(hArchitecture exampleh]hArchitecture example}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhhhMubj9)}(hWHere is how the above modes map to memory attribute settings on the ARM64 architecture:h]hWHere is how the above modes map to memory attribute settings on the ARM64 architecture:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjhhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1j hj ubj )}(hhh]h}(h]h ]h"]h$]h&]colwidthK,uh1j hj ubhtbody)}(hhh](hrow)}(hhh](hentry)}(hhh]j9)}(hAPIh]hAPI}(hjC hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj@ ubah}(h]h ]h"]h$]h&]uh1j> hj; ubj? )}(hhh]j9)}(h#Memory region type and cacheabilityh]h#Memory region type and cacheability}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjW ubah}(h]h ]h"]h$]h&]uh1j> hj; ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubj: )}(hhh](j? )}(hhh]j9)}(h ioremap_np()h]h ioremap_np()}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjw ubah}(h]h ]h"]h$]h&]uh1j> hjt ubj? )}(hhh]j9)}(h Device-nGnRnEh]h Device-nGnRnE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hjt ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubj: )}(hhh](j? )}(hhh]j9)}(h ioremap()h]h ioremap()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubj? )}(hhh]j9)}(h Device-nGnREh]h Device-nGnRE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubj: )}(hhh](j? )}(hhh]j9)}(h ioremap_uc()h]h ioremap_uc()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubj? )}(hhh]j9)}(h(not implemented)h]h(not implemented)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubj: )}(hhh](j? )}(hhh]j9)}(h ioremap_wc()h]h ioremap_wc()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubj? )}(hhh]j9)}(hNormal-Non Cacheableh]hNormal-Non Cacheable}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj3 ubah}(h]h ]h"]h$]h&]uh1j> hj ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubj: )}(hhh](j? )}(hhh]j9)}(h ioremap_wt()h]h ioremap_wt()}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjS ubah}(h]h ]h"]h$]h&]uh1j> hjP ubj? )}(hhh]j9)}(h&(not implemented; fallback to ioremap)h]h&(not implemented; fallback to ioremap)}(hjm hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhjj ubah}(h]h ]h"]h$]h&]uh1j> hjP ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubj: )}(hhh](j? )}(hhh]j9)}(hioremap_cache()h]hioremap_cache()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubj? )}(hhh]j9)}(hNormal-Write-Back Cacheableh]hNormal-Write-Back Cacheable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1j> hj ubeh}(h]h ]h"]h$]h&]uh1j9 hj6 ubeh}(h]h ]h"]h$]h&]uh1j4 hj ubeh}(h]h ]h"]h$]h&]colsKuh1j hj ubah}(h]h ]h"]h$]h&]uh1j hjhhhhhNubeh}(h]architecture-exampleah ]h"]architecture exampleah$]h&]uh1jhjhhhhhMubeh}(h]device-memory-mapping-modesah ]h"]device memory mapping modesah$]h&]uh1jhjhhhhhM ubj)}(hhh](j )}(h!Higher-level ioremap abstractionsh]h!Higher-level ioremap abstractions}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj hhhhhMubj9)}(hXInstead of using the above raw ioremap() modes, drivers are encouraged to use higher-level APIs. These APIs may implement platform-specific logic to automatically choose an appropriate ioremap mode on any given bus, allowing for a platform-agnostic driver to work on those platforms without any special cases. At the time of this writing, the following ioremap() wrappers have such logic:h]hXInstead of using the above raw ioremap() modes, drivers are encouraged to use higher-level APIs. These APIs may implement platform-specific logic to automatically choose an appropriate ioremap mode on any given bus, allowing for a platform-agnostic driver to work on those platforms without any special cases. At the time of this writing, the following ioremap() wrappers have such logic:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj9)}(hdevm_ioremap_resource()h]hdevm_ioremap_resource()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj)}(hXaCan automatically select ioremap_np() over ioremap() according to platform requirements, if the ``IORESOURCE_MEM_NONPOSTED`` flag is set on the struct resource. Uses devres to automatically unmap the resource when the driver probe() function fails or a device in unbound from its driver. Documented in Documentation/driver-api/driver-model/devres.rst. h](j9)}(hXCan automatically select ioremap_np() over ioremap() according to platform requirements, if the ``IORESOURCE_MEM_NONPOSTED`` flag is set on the struct resource. Uses devres to automatically unmap the resource when the driver probe() function fails or a device in unbound from its driver.h](h`Can automatically select ioremap_np() over ioremap() according to platform requirements, if the }(hj hhhNhNubj)}(h``IORESOURCE_MEM_NONPOSTED``h]hIORESOURCE_MEM_NONPOSTED}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh flag is set on the struct resource. Uses devres to automatically unmap the resource when the driver probe() function fails or a device in unbound from its driver.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhj ubj9)}(h?Documented in Documentation/driver-api/driver-model/devres.rst.h]h?Documented in Documentation/driver-api/driver-model/devres.rst.}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj9)}(hof_address_to_resource()h]hof_address_to_resource()}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj)}(hAutomatically sets the ``IORESOURCE_MEM_NONPOSTED`` flag for platforms that require non-posted writes for certain buses (see the nonposted-mmio and posted-mmio device tree properties). h]j9)}(hAutomatically sets the ``IORESOURCE_MEM_NONPOSTED`` flag for platforms that require non-posted writes for certain buses (see the nonposted-mmio and posted-mmio device tree properties).h](hAutomatically sets the }(hjX hhhNhNubj)}(h``IORESOURCE_MEM_NONPOSTED``h]hIORESOURCE_MEM_NONPOSTED}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjX ubh flag for platforms that require non-posted writes for certain buses (see the nonposted-mmio and posted-mmio device tree properties).}(hjX hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhjT ubah}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj9)}(h of_iomap()h]h of_iomap()}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj)}(hMaps the resource described in a ``reg`` property in the device tree, doing all required translations. Automatically selects ioremap_np() according to platform requirements, as above. h]j9)}(hMaps the resource described in a ``reg`` property in the device tree, doing all required translations. Automatically selects ioremap_np() according to platform requirements, as above.h](h!Maps the resource described in a }(hj hhhNhNubj)}(h``reg``h]hreg}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh property in the device tree, doing all required translations. Automatically selects ioremap_np() according to platform requirements, as above.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj9)}(h'pci_ioremap_bar(), pci_ioremap_wc_bar()h]h'pci_ioremap_bar(), pci_ioremap_wc_bar()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj)}(hhMaps the resource described in a PCI base address without having to extract the physical address first. h]j9)}(hgMaps the resource described in a PCI base address without having to extract the physical address first.h]hgMaps the resource described in a PCI base address without having to extract the physical address first.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj9)}(hpci_iomap(), pci_iomap_wc()h]hpci_iomap(), pci_iomap_wc()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj)}(hLike pci_ioremap_bar()/pci_ioremap_bar(), but also works on I/O space when used together with ioread32()/iowrite32() and similar accessors h]j9)}(hLike pci_ioremap_bar()/pci_ioremap_bar(), but also works on I/O space when used together with ioread32()/iowrite32() and similar accessorsh]hLike pci_ioremap_bar()/pci_ioremap_bar(), but also works on I/O space when used together with ioread32()/iowrite32() and similar accessors}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubah}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj9)}(h pcim_iomap()h]h pcim_iomap()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubj)}(hLike pci_iomap(), but uses devres to automatically unmap the resource when the driver probe() function fails or a device in unbound from its driver Documented in Documentation/driver-api/driver-model/devres.rst. h](j9)}(hLike pci_iomap(), but uses devres to automatically unmap the resource when the driver probe() function fails or a device in unbound from its driverh]hLike pci_iomap(), but uses devres to automatically unmap the resource when the driver probe() function fails or a device in unbound from its driver}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubj9)}(h?Documented in Documentation/driver-api/driver-model/devres.rst.h]h?Documented in Documentation/driver-api/driver-model/devres.rst.}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj9)}(hsNot using these wrappers may make drivers unusable on certain platforms with stricter rules for mapping I/O memory.h]hsNot using these wrappers may make drivers unusable on certain platforms with stricter rules for mapping I/O memory.}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hhhMhj hhubeh}(h]jah ]h"]!higher-level ioremap abstractionsah$]h&]uh1jhjhhhhhMjKubj)}(hhh](j )}(h,Generalizing Access to System and I/O Memoryh]h,Generalizing Access to System and I/O Memory}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjK hhhhhMubj9)}(hXWhen accessing a memory region, depending on its location, users may have to access it with I/O operations or memory load/store operations. For example, copying to system memory could be done with memcpy(), copying to I/O memory would be done with memcpy_toio().h]hXWhen accessing a memory region, depending on its location, users may have to access it with I/O operations or memory load/store operations. For example, copying to system memory could be done with memcpy(), copying to I/O memory would be done with memcpy_toio().}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhKhjK hhubji)}(hvoid *vaddr = ...; // pointer to system memory memcpy(vaddr, src, len); void *vaddr_iomem = ...; // pointer to I/O memory memcpy_toio(vaddr_iomem, src, len);h]hvoid *vaddr = ...; // pointer to system memory memcpy(vaddr, src, len); void *vaddr_iomem = ...; // pointer to I/O memory memcpy_toio(vaddr_iomem, src, len);}hjk sbah}(h]h ]h"]h$]h&]hhforcelanguagechighlight_args}uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhKhjK hhubj9)}(hXThe user of such pointer may not have information about the mapping of that region or may want to have a single code path to handle operations on that buffer, regardless if it's located in system or IO memory. The type :c:type:`struct iosys_map ` and its helpers abstract that so the buffer can be passed around to other drivers or have separate duties inside the same driver for allocation, read and write operations.h](hThe user of such pointer may not have information about the mapping of that region or may want to have a single code path to handle operations on that buffer, regardless if it’s located in system or IO memory. The type }(hj hhhNhNubh)}(h&:c:type:`struct iosys_map `h]j)}(hj h]hstruct iosys_map}(hj hhhNhNubah}(h]h ](xrefj{ c-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocdriver-api/device-io refdomainj{ reftypetype refexplicitrefwarn reftarget iosys_mapuh1hh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhKhj ubh and its helpers abstract that so the buffer can be passed around to other drivers or have separate duties inside the same driver for allocation, read and write operations.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hj hKhjK hhubj9)}(hXOpen-coding access to :c:type:`struct iosys_map ` is considered bad style. Rather than accessing its fields directly, use one of the provided helper functions, or implement your own. For example, instances of :c:type:`struct iosys_map ` can be initialized statically with IOSYS_MAP_INIT_VADDR(), or at runtime with iosys_map_set_vaddr(). These helpers will set an address in system memory.h](hOpen-coding access to }(hj hhhNhNubh)}(h&:c:type:`struct iosys_map `h]j)}(hj h]hstruct iosys_map}(hj hhhNhNubah}(h]h ](j j{ c-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainj{ reftypetype refexplicitrefwarnj iosys_mapuh1hh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK"hj ubh is considered bad style. Rather than accessing its fields directly, use one of the provided helper functions, or implement your own. For example, instances of }(hj hhhNhNubh)}(h&:c:type:`struct iosys_map `h]j)}(hj h]hstruct iosys_map}(hj hhhNhNubah}(h]h ](j j{ c-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainj{ reftypetype refexplicitrefwarnj iosys_mapuh1hhj hK"hj ubh can be initialized statically with IOSYS_MAP_INIT_VADDR(), or at runtime with iosys_map_set_vaddr(). These helpers will set an address in system memory.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hj hK"hjK hhubji)}(h`struct iosys_map map = IOSYS_MAP_INIT_VADDR(0xdeadbeaf); iosys_map_set_vaddr(&map, 0xdeadbeaf);h]h`struct iosys_map map = IOSYS_MAP_INIT_VADDR(0xdeadbeaf); iosys_map_set_vaddr(&map, 0xdeadbeaf);}hj sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK)hjK hhubj9)}(haTo set an address in I/O memory, use IOSYS_MAP_INIT_VADDR_IOMEM() or iosys_map_set_vaddr_iomem().h]haTo set an address in I/O memory, use IOSYS_MAP_INIT_VADDR_IOMEM() or iosys_map_set_vaddr_iomem().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK/hjK hhubji)}(hlstruct iosys_map map = IOSYS_MAP_INIT_VADDR_IOMEM(0xdeadbeaf); iosys_map_set_vaddr_iomem(&map, 0xdeadbeaf);h]hlstruct iosys_map map = IOSYS_MAP_INIT_VADDR_IOMEM(0xdeadbeaf); iosys_map_set_vaddr_iomem(&map, 0xdeadbeaf);}hj( sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK2hjK hhubj9)}(hInstances of struct iosys_map do not have to be cleaned up, but can be cleared to NULL with iosys_map_clear(). Cleared mappings always refer to system memory.h]hInstances of struct iosys_map do not have to be cleaned up, but can be cleared to NULL with iosys_map_clear(). Cleared mappings always refer to system memory.}(hj8 hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK8hjK hhubji)}(hiosys_map_clear(&map);h]hiosys_map_clear(&map);}hjG sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK` can be compared for equality with iosys_map_is_equal(). Mappings that point to different memory spaces, system or I/O, are never equal. That's even true if both spaces are located in the same address space, both mappings contain the same address value, or both mappings refer to NULL.h](h Instances of }(hjv hhhNhNubh)}(h&:c:type:`struct iosys_map `h]j)}(hj h]hstruct iosys_map}(hj hhhNhNubah}(h]h ](j j{ c-typeeh"]h$]h&]uh1jhj~ ubah}(h]h ]h"]h$]h&]refdocj refdomainj{ reftypetype refexplicitrefwarnj iosys_mapuh1hh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhKHhjv ubhX can be compared for equality with iosys_map_is_equal(). Mappings that point to different memory spaces, system or I/O, are never equal. That’s even true if both spaces are located in the same address space, both mappings contain the same address value, or both mappings refer to NULL.}(hjv hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8hj hKHhjK hhubji)}(hstruct iosys_map sys_map; // refers to system memory struct iosys_map io_map; // refers to I/O memory if (iosys_map_is_equal(&sys_map, &io_map)) // always falseh]hstruct iosys_map sys_map; // refers to system memory struct iosys_map io_map; // refers to I/O memory if (iosys_map_is_equal(&sys_map, &io_map)) // always false}hj sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhKNhjK hhubj9)}(hX1A set up instance of struct iosys_map can be used to access or manipulate the buffer memory. Depending on the location of the memory, the provided helpers will pick the correct operations. Data can be copied into the memory with iosys_map_memcpy_to(). The address can be manipulated with iosys_map_incr().h]hX1A set up instance of struct iosys_map can be used to access or manipulate the buffer memory. Depending on the location of the memory, the provided helpers will pick the correct operations. Data can be copied into the memory with iosys_map_memcpy_to(). The address can be manipulated with iosys_map_incr().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhKVhjK hhubji)}(hconst void *src = ...; // source buffer size_t len = ...; // length of src iosys_map_memcpy_to(&map, src, len); iosys_map_incr(&map, len); // go to first byte after the memcpyh]hconst void *src = ...; // source buffer size_t len = ...; // length of src iosys_map_memcpy_to(&map, src, len); iosys_map_incr(&map, len); // go to first byte after the memcpy}hj sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:509: ./include/linux/iosys-map.hhK[hjK hhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](singleiosys_map (C struct) c.iosys_maphNtauh1j hjK hhhNhNubhdesc)}(hhh](hdesc_signature)}(h iosys_maph]hdesc_signature_line)}(hstruct iosys_maph](hdesc_sig_keyword)}(hstructh]hstruct}(hj hhhNhNubah}(h]h ]kah"]h$]h&]uh1j hj hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKubhdesc_sig_space)}(h h]h }(hj hhhNhNubah}(h]h ]wah"]h$]h&]uh1j hj hhhj hKubh desc_name)}(h iosys_maph]h desc_sig_name)}(hj h]h iosys_map}(hj$hhhNhNubah}(h]h ]nah"]h$]h&]uh1j"hjubah}(h]h ](sig-namedescnameeh"]h$]h&]hhuh1jhj hhhj hKubeh}(h]h ]h"]h$]h&]hh add_permalinkuh1j sphinx_line_type declaratorhj hhhj hKubah}(h]j ah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j hj hKhj hhubh desc_content)}(hhh]j9)}(hPointer to IO/system memoryh]hPointer to IO/system memory}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKghjPhhubah}(h]h ]h"]h$]h&]uh1jNhj hhhj hKubeh}(h]h ](j{ structeh"]h$]h&]domainj{ objtypejkdesctypejknoindex noindexentrynocontentsentryuh1j hhhjK hNhNubh container)}(hX**Definition**:: struct iosys_map { union { void __iomem *vaddr_iomem; void *vaddr; }; bool is_iomem; }; **Members** ``{unnamed_union}`` anonymous ``vaddr_iomem`` The buffer's address if in I/O memory ``vaddr`` The buffer's address if in system memory ``is_iomem`` True if the buffer is located in I/O memory, or false otherwise.h](j9)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{ubh:}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKkhjwubji)}(hsstruct iosys_map { union { void __iomem *vaddr_iomem; void *vaddr; }; bool is_iomem; };h]hsstruct iosys_map { union { void __iomem *vaddr_iomem; void *vaddr; }; bool is_iomem; };}hjsbah}(h]h ]h"]h$]h&]hhuh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKmhjwubj9)}(h **Members**h]j)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKuhjwubhdefinition_list)}(hhh](hdefinition_list_item)}(h``{unnamed_union}`` anonymous h](hterm)}(h``{unnamed_union}``h]j)}(hjh]h{unnamed_union}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKxhjubh definition)}(hhh]j9)}(h anonymoush]h anonymous}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKxhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKxhjubj)}(h6``vaddr_iomem`` The buffer's address if in I/O memory h](j)}(h``vaddr_iomem``h]j)}(hj h]h vaddr_iomem}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKihjubj)}(hhh]j9)}(h%The buffer's address if in I/O memoryh]h'The buffer’s address if in I/O memory}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj hKihj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj hKihjubj)}(h3``vaddr`` The buffer's address if in system memory h](j)}(h ``vaddr``h]j)}(hjDh]hvaddr}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKjhj>ubj)}(hhh]j9)}(h(The buffer's address if in system memoryh]h*The buffer’s address if in system memory}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjYhKjhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhjYhKjhjubj)}(hM``is_iomem`` True if the buffer is located in I/O memory, or false otherwise.h](j)}(h ``is_iomem``h]j)}(hj}h]his_iomem}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKkhjwubj)}(hhh]j9)}(h@True if the buffer is located in I/O memory, or false otherwise.h]h@True if the buffer is located in I/O memory, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKkhjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jhjhKkhjubeh}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j IOSYS_MAP_INIT_VADDR (C macro)c.IOSYS_MAP_INIT_VADDRhNtauh1j hjK hhhNhNubj )}(hhh](j )}(hIOSYS_MAP_INIT_VADDRh]j )}(hIOSYS_MAP_INIT_VADDRh]j)}(hIOSYS_MAP_INIT_VADDRh]j#)}(hjh]hIOSYS_MAP_INIT_VADDR}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKyubah}(h]h ]h"]h$]h&]hhj@uh1j jAjBhjhhhjhKyubah}(h]jah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjhKyhjhhubjO)}(hhh]h}(h]h ]h"]h$]h&]uh1jNhjhhhjhKyubeh}(h]h ](j{ macroeh"]h$]h&]joj{ jpjjqjjrjsjtuh1j hhhjK hNhNubj9)}(h!``IOSYS_MAP_INIT_VADDR (vaddr_)``h]j)}(hj h]hIOSYS_MAP_INIT_VADDR (vaddr_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhK{hjK hhubj)}(hubj)}(hhh]j9)}(hAn I/O-memory addressh]hAn I/O-memory address}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhjYhKhj;ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j IOSYS_MAP_INIT_OFFSET (C macro)c.IOSYS_MAP_INIT_OFFSEThNtauh1j hjK hhhNhNubj )}(hhh](j )}(hIOSYS_MAP_INIT_OFFSETh]j )}(hIOSYS_MAP_INIT_OFFSETh]j)}(hIOSYS_MAP_INIT_OFFSETh]j#)}(hjh]hIOSYS_MAP_INIT_OFFSET}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKubah}(h]h ]h"]h$]h&]hhj@uh1j jAjBhjhhhjhKubah}(h]jah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjhKhjhhubjO)}(hhh]h}(h]h ]h"]h$]h&]uh1jNhjhhhjhKubeh}(h]h ](j{ macroeh"]h$]h&]joj{ jpjjqjjrjsjtuh1j hhhjK hNhNubj9)}(h)``IOSYS_MAP_INIT_OFFSET (map_, offset_)``h]j)}(hjh]h%IOSYS_MAP_INIT_OFFSET (map_, offset_)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjK hhubj)}(h4Initializes struct iosys_map from another iosys_map h]j9)}(h3Initializes struct iosys_map from another iosys_maph]h3Initializes struct iosys_map from another iosys_map}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjhKhjK hhubjv)}(hXU**Parameters** ``map_`` The dma-buf mapping structure to copy from ``offset_`` Offset to add to the other mapping **Description** Initializes a new iosys_map struct based on another passed as argument. It does a shallow copy of the struct so it's possible to update the back storage without changing where the original map points to. It is the equivalent of doing: .. code-block:: c iosys_map map = other_map; iosys_map_incr(&map, &offset); Example usage: .. code-block:: c void foo(struct device *dev, struct iosys_map *base_map) { ... struct iosys_map map = IOSYS_MAP_INIT_OFFSET(base_map, FIELD_OFFSET); ... } The advantage of using the initializer over just increasing the offset with iosys_map_incr() like above is that the new map will always point to the right place of the buffer during its scope. It reduces the risk of updating the wrong part of the buffer and having no compiler warning about that. If the assignment to IOSYS_MAP_INIT_OFFSET() is forgotten, the compiler can warn about the use of uninitialized variable.h](j9)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh](j)}(h4``map_`` The dma-buf mapping structure to copy from h](j)}(h``map_``h]j)}(hj(h]hmap_}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj"ubj)}(hhh]j9)}(h*The dma-buf mapping structure to copy fromh]h*The dma-buf mapping structure to copy from}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj=hKhj>ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jhj=hKhjubj)}(h/``offset_`` Offset to add to the other mapping h](j)}(h ``offset_``h]j)}(hjah]hoffset_}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj[ubj)}(hhh]j9)}(h"Offset to add to the other mappingh]h"Offset to add to the other mapping}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjvhKhjwubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jhjvhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubj9)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(hInitializes a new iosys_map struct based on another passed as argument. It does a shallow copy of the struct so it's possible to update the back storage without changing where the original map points to. It is the equivalent of doing:h]hInitializes a new iosys_map struct based on another passed as argument. It does a shallow copy of the struct so it’s possible to update the back storage without changing where the original map points to. It is the equivalent of doing:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubji)}(h9iosys_map map = other_map; iosys_map_incr(&map, &offset);h]h9iosys_map map = other_map; iosys_map_incr(&map, &offset);}hjsbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(hExample usage:h]hExample usage:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubji)}(hvoid foo(struct device *dev, struct iosys_map *base_map) { ... struct iosys_map map = IOSYS_MAP_INIT_OFFSET(base_map, FIELD_OFFSET); ... }h]hvoid foo(struct device *dev, struct iosys_map *base_map) { ... struct iosys_map map = IOSYS_MAP_INIT_OFFSET(base_map, FIELD_OFFSET); ... }}hjsbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(hXThe advantage of using the initializer over just increasing the offset with iosys_map_incr() like above is that the new map will always point to the right place of the buffer during its scope. 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If the assignment to IOSYS_MAP_INIT_OFFSET() is forgotten, the compiler can warn about the use of uninitialized variable.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_set_vaddr (C function)c.iosys_map_set_vaddrhNtauh1j hjK hhhNhNubj )}(hhh](j )}(h=void iosys_map_set_vaddr (struct iosys_map *map, void *vaddr)h]j )}(hhhubah}(h]h ]h"]h$]h&]uh1jNhj"hhhj;hKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpjYjqjYjrjsjtuh1j hhhjK hNhNubjv)}(h**Parameters** ``struct iosys_map *map`` The iosys_map structure ``void __iomem *vaddr_iomem`` An I/O-memory address **Description** Sets the address and the I/O-memory flag.h](j9)}(h**Parameters**h]j)}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj]ubj)}(hhh](j)}(h2``struct iosys_map *map`` The iosys_map structure h](j)}(h``struct iosys_map *map``h]j)}(hjh]hstruct iosys_map *map}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj|ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKhjubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jhjhKhjyubj)}(h4``void __iomem *vaddr_iomem`` An I/O-memory address h](j)}(h``void __iomem *vaddr_iomem``h]j)}(hjh]hvoid __iomem *vaddr_iomem}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh]j9)}(hAn I/O-memory addressh]hAn I/O-memory address}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjyubeh}(h]h ]h"]h$]h&]uh1jhj]ubj9)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj]ubj9)}(h)Sets the address and the I/O-memory flag.h]h)Sets the address and the I/O-memory flag.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_is_equal (C function)c.iosys_map_is_equalhNtauh1j hjK hhhNhNubj )}(hhh](j )}(hRbool iosys_map_is_equal (const struct iosys_map *lhs, const struct iosys_map *rhs)h]j )}(hQbool iosys_map_is_equal(const struct iosys_map *lhs, const struct iosys_map *rhs)h](j )}(hboolh]hbool}(hj;hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj7hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKubj )}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj7hhhjIhKubj)}(hiosys_map_is_equalh]j#)}(hiosys_map_is_equalh]hiosys_map_is_equal}(hj\hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjXubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj7hhhjIhKubjX)}(h:(const struct iosys_map *lhs, const struct iosys_map *rhs)h](j^)}(hconst struct iosys_map *lhsh](j )}(hconsth]hconst}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjtubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjtubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetjmodnameN classnameNjj)}j]j)}jj^sbc.iosys_map_is_equalasbuh1hhjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjtubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj#)}(hlhsh]hlhs}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjtubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjpubj^)}(hconst struct iosys_map *rhsh](j )}(hjzh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hj?hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj<ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetjAmodnameN classnameNjj)}j]jc.iosys_map_is_equalasbuh1hhjubj )}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj#)}(hrhsh]hrhs}(hjxhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjpubeh}(h]h ]h"]h$]h&]hhuh1jWhj7hhhjIhKubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj3hhhjIhKubah}(h]j.ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjIhKhj0hhubjO)}(hhh]j9)}(h2Compares two iosys mapping structures for equalityh]h2Compares two iosys mapping structures for equality}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjhhubah}(h]h ]h"]h$]h&]uh1jNhj0hhhjIhKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpjjqjjrjsjtuh1j hhhjK hNhNubjv)}(hXi**Parameters** ``const struct iosys_map *lhs`` The iosys_map structure ``const struct iosys_map *rhs`` A iosys_map structure to compare with **Description** Two iosys mapping structures are equal if they both refer to the same type of memory and to the same address within that memory. **Return** True is both structures are equal, or false otherwise.h](j9)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh](j)}(h8``const struct iosys_map *lhs`` The iosys_map structure h](j)}(h``const struct iosys_map *lhs``h]j)}(hjh]hconst struct iosys_map *lhs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubj)}(hF``const struct iosys_map *rhs`` A iosys_map structure to compare with h](j)}(h``const struct iosys_map *rhs``h]j)}(hjh]hconst struct iosys_map *rhs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh]j9)}(h%A iosys_map structure to compare withh]h%A iosys_map structure to compare with}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj1hKhj2ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj1hKhjubeh}(h]h ]h"]h$]h&]uh1jhjubj9)}(h**Description**h]j)}(hjWh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(hTwo iosys mapping structures are equal if they both refer to the same type of memory and to the same address within that memory.h]hTwo iosys mapping structures are equal if they both refer to the same type of memory and to the same address within that memory.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(h **Return**h]j)}(hj~h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(h6True is both structures are equal, or false otherwise.h]h6True is both structures are equal, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_is_null (C function)c.iosys_map_is_nullhNtauh1j hjK hhhNhNubj )}(hhh](j )}(h4bool iosys_map_is_null (const struct iosys_map *map)h]j )}(h3bool iosys_map_is_null(const struct iosys_map *map)h](j )}(hj=h]hbool}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjhhhjhKubj)}(hiosys_map_is_nullh]j#)}(hiosys_map_is_nullh]hiosys_map_is_null}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjhhhjhKubjX)}(h(const struct iosys_map *map)h]j^)}(hconst struct iosys_map *maph](j )}(hjzh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hj8hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj5ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj:modnameN classnameNjj)}j]j)}jjsbc.iosys_map_is_nullasbuh1hhjubj )}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj#)}(hmaph]hmap}(hjshhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjubah}(h]h ]h"]h$]h&]hhuh1jWhjhhhjhKubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhjhhhjhKubah}(h]jah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjhKhjhhubjO)}(hhh]j9)}(h$Tests for a iosys mapping to be NULLh]h$Tests for a iosys mapping to be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjhhubah}(h]h ]h"]h$]h&]uh1jNhjhhhjhKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpjjqjjrjsjtuh1j hhhjK hNhNubjv)}(h**Parameters** ``const struct iosys_map *map`` The iosys_map structure **Description** Depending on the state of struct iosys_map.is_iomem, tests if the mapping is NULL. **Return** True if the mapping is NULL, or false otherwise.h](j9)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh]j)}(h8``const struct iosys_map *map`` The iosys_map structure h](j)}(h``const struct iosys_map *map``h]j)}(hjh]hconst struct iosys_map *map}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj9)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(hRDepending on the state of struct iosys_map.is_iomem, tests if the mapping is NULL.h]hRDepending on the state of struct iosys_map.is_iomem, tests if the mapping is NULL.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(h **Return**h]j)}(hj@h]hReturn}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj9)}(h0True if the mapping is NULL, or false otherwise.h]h0True if the mapping is NULL, or false otherwise.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_is_set (C function)c.iosys_map_is_sethNtauh1j hjK hhhNhNubj )}(hhh](j )}(h3bool iosys_map_is_set (const struct iosys_map *map)h]j )}(h2bool iosys_map_is_set(const struct iosys_map *map)h](j )}(hj=h]hbool}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjhhhjhKubj)}(hiosys_map_is_seth]j#)}(hiosys_map_is_seth]hiosys_map_is_set}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjhhhjhKubjX)}(h(const struct iosys_map *map)h]j^)}(hconst struct iosys_map *maph](j )}(hjzh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.iosys_map_is_setasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj#)}(hmaph]hmap}(hj5hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjubah}(h]h ]h"]h$]h&]hhuh1jWhjhhhjhKubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj}hhhjhKubah}(h]jxah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjhKhjzhhubjO)}(hhh]j9)}(h'Tests if the iosys mapping has been seth]h'Tests if the iosys mapping has been set}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj\hhubah}(h]h ]h"]h$]h&]uh1jNhjzhhhjhKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpjwjqjwjrjsjtuh1j hhhjK hNhNubjv)}(h**Parameters** ``const struct iosys_map *map`` The iosys_map structure **Description** Depending on the state of struct iosys_map.is_iomem, tests if the mapping has been set. **Return** True if the mapping is been set, or false otherwise.h](j9)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj{ubj)}(hhh]j)}(h8``const struct iosys_map *map`` The iosys_map structure h](j)}(h``const struct iosys_map *map``h]j)}(hjh]hconst struct iosys_map *map}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhjubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhKhjubah}(h]h ]h"]h$]h&]uh1jhj{ubj9)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj{ubj9)}(hWDepending on the state of struct iosys_map.is_iomem, tests if the mapping has been set.h]hWDepending on the state of struct iosys_map.is_iomem, tests if the mapping has been set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj{ubj9)}(h **Return**h]j)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj{ubj9)}(h4True if the mapping is been set, or false otherwise.h]h4True if the mapping is been set, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhKhj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_clear (C function)c.iosys_map_clearhNtauh1j hjK hhhNhNubj )}(hhh](j )}(h,void iosys_map_clear (struct iosys_map *map)h]j )}(h+void iosys_map_clear(struct iosys_map *map)h](j )}(hvoidh]hvoid}(hjGhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjChhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM ubj )}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjChhhjUhM ubj)}(hiosys_map_clearh]j#)}(hiosys_map_clearh]hiosys_map_clear}(hjhhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjdubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjChhhjUhM ubjX)}(h(struct iosys_map *map)h]j^)}(hstruct iosys_map *maph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetjmodnameN classnameNjj)}j]j)}jjjsbc.iosys_map_clearasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj#)}(hmaph]hmap}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj|ubah}(h]h ]h"]h$]h&]hhuh1jWhjChhhjUhM ubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj?hhhjUhM ubah}(h]j:ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjUhM hj<hhubjO)}(hhh]j9)}(h Clears a iosys mapping structureh]h Clears a iosys mapping structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjhhubah}(h]h ]h"]h$]h&]uh1jNhj<hhhjUhM ubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpjjqjjrjsjtuh1j hhhjK hNhNubjv)}(hX **Parameters** ``struct iosys_map *map`` The iosys_map structure **Description** Clears all fields to zero, including struct iosys_map.is_iomem, so mapping structures that were set to point to I/O memory are reset for system memory. Pointers are cleared to NULL. This is the default.h](j9)}(h**Parameters**h]j)}(hj)h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj#ubj)}(hhh]j)}(h2``struct iosys_map *map`` The iosys_map structure h](j)}(h``struct iosys_map *map``h]j)}(hjHh]hstruct iosys_map *map}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjBubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj]hMhj^ubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jhj]hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubj9)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj#ubj9)}(hClears all fields to zero, including struct iosys_map.is_iomem, so mapping structures that were set to point to I/O memory are reset for system memory. Pointers are cleared to NULL. This is the default.h]hClears all fields to zero, including struct iosys_map.is_iomem, so mapping structures that were set to point to I/O memory are reset for system memory. Pointers are cleared to NULL. This is the default.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_memcpy_to (C function)c.iosys_map_memcpy_tohNtauh1j hjK hhhNhNubj )}(hhh](j )}(h`void iosys_map_memcpy_to (struct iosys_map *dst, size_t dst_offset, const void *src, size_t len)h]j )}(h_void iosys_map_memcpy_to(struct iosys_map *dst, size_t dst_offset, const void *src, size_t len)h](j )}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjhhhjhMubj)}(hiosys_map_memcpy_toh]j#)}(hiosys_map_memcpy_toh]hiosys_map_memcpy_to}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjhhhjhMubjX)}(hG(struct iosys_map *dst, size_t dst_offset, const void *src, size_t len)h](j^)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hj#hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj%modnameN classnameNjj)}j]j)}jjsbc.iosys_map_memcpy_toasbuh1hhjubj )}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj#)}(hdsth]hdst}(hj^hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjubj^)}(hsize_t dst_offseth](h)}(hhh]j#)}(hsize_th]hsize_t}(hjzhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjwubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj|modnameN classnameNjj)}j]j?c.iosys_map_memcpy_toasbuh1hhjsubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjsubj#)}(h dst_offseth]h dst_offset}(hjhhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjsubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjubj^)}(hconst void *srch](j )}(hjzh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj )}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj)}(hjh]h*}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj#)}(hsrch]hsrc}(hj hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjubj^)}(h size_t lenh](h)}(hhh]j#)}(hsize_th]hsize_t}(hj hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj! modnameN classnameNjj)}j]j?c.iosys_map_memcpy_toasbuh1hhj ubj )}(h h]h }(hj= hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj ubj#)}(hlenh]hlen}(hjK hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hjubeh}(h]h ]h"]h$]h&]hhuh1jWhjhhhjhMubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhjhhhjhMubah}(h]jah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjhMhjhhubjO)}(hhh]j9)}(hMemcpy into offset of iosys_maph]hMemcpy into offset of iosys_map}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjr hhubah}(h]h ]h"]h$]h&]uh1jNhjhhhjhMubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj jqj jrjsjtuh1j hhhjK hNhNubjv)}(hX**Parameters** ``struct iosys_map *dst`` The iosys_map structure ``size_t dst_offset`` The offset from which to copy ``const void *src`` The source buffer ``size_t len`` The number of byte in src **Description** Copies data into a iosys_map with an offset. The source buffer is in system memory. Depending on the buffer's location, the helper picks the correct method of accessing the memory.h](j9)}(h**Parameters**h]j)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj ubj)}(hhh](j)}(h2``struct iosys_map *dst`` The iosys_map structure h](j)}(h``struct iosys_map *dst``h]j)}(hj h]hstruct iosys_map *dst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hMhj ubj)}(h4``size_t dst_offset`` The offset from which to copy h](j)}(h``size_t dst_offset``h]j)}(hj h]hsize_t dst_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj ubj)}(hhh]j9)}(hThe offset from which to copyh]hThe offset from which to copy}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj!hMhj!ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj!hMhj ubj)}(h&``const void *src`` The source buffer h](j)}(h``const void *src``h]j)}(hj(!h]hconst void *src}(hj*!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&!ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj"!ubj)}(hhh]j9)}(hThe source bufferh]hThe source buffer}(hjA!hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj=!hMhj>!ubah}(h]h ]h"]h$]h&]uh1jhj"!ubeh}(h]h ]h"]h$]h&]uh1jhj=!hMhj ubj)}(h)``size_t len`` The number of byte in src h](j)}(h``size_t len``h]j)}(hja!h]h size_t len}(hjc!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj_!ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj[!ubj)}(hhh]j9)}(hThe number of byte in srch]hThe number of byte in src}(hjz!hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjv!hMhjw!ubah}(h]h ]h"]h$]h&]uh1jhj[!ubeh}(h]h ]h"]h$]h&]uh1jhjv!hMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubj9)}(h**Description**h]j)}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj ubj9)}(hCopies data into a iosys_map with an offset. The source buffer is in system memory. Depending on the buffer's location, the helper picks the correct method of accessing the memory.h]hCopies data into a iosys_map with an offset. The source buffer is in system memory. Depending on the buffer’s location, the helper picks the correct method of accessing the memory.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "iosys_map_memcpy_from (C function)c.iosys_map_memcpy_fromhNtauh1j hjK hhhNhNubj )}(hhh](j )}(hbvoid iosys_map_memcpy_from (void *dst, const struct iosys_map *src, size_t src_offset, size_t len)h]j )}(havoid iosys_map_memcpy_from(void *dst, const struct iosys_map *src, size_t src_offset, size_t len)h](j )}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj!hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM2ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj!hhhj!hM2ubj)}(hiosys_map_memcpy_fromh]j#)}(hiosys_map_memcpy_fromh]hiosys_map_memcpy_from}(hj"hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj!ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj!hhhj!hM2ubjX)}(hG(void *dst, const struct iosys_map *src, size_t src_offset, size_t len)h](j^)}(h void *dsth](j )}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj"ubj )}(h h]h }(hj,"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj"ubj)}(hjh]h*}(hj:"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj#)}(hdsth]hdst}(hjG"hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj"ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj"ubj^)}(hconst struct iosys_map *srch](j )}(hjzh]hconst}(hj`"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\"ubj )}(h h]h }(hjm"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\"ubj )}(hj h]hstruct}(hj{"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\"ubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hj"hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj"ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj"modnameN classnameNjj)}j]j)}jj"sbc.iosys_map_memcpy_fromasbuh1hhj\"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\"ubj)}(hjh]h*}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\"ubj#)}(hsrch]hsrc}(hj"hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj\"ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj"ubj^)}(hsize_t src_offseth](h)}(hhh]j#)}(hsize_th]hsize_t}(hj"hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj"ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj"modnameN classnameNjj)}j]j"c.iosys_map_memcpy_fromasbuh1hhj"ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj"ubj#)}(h src_offseth]h src_offset}(hj#hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj"ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj"ubj^)}(h size_t lenh](h)}(hhh]j#)}(hsize_th]hsize_t}(hj8#hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj5#ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj:#modnameN classnameNjj)}j]j"c.iosys_map_memcpy_fromasbuh1hhj1#ubj )}(h h]h }(hjV#hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj1#ubj#)}(hlenh]hlen}(hjd#hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj1#ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj"ubeh}(h]h ]h"]h$]h&]hhuh1jWhj!hhhj!hM2ubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj!hhhj!hM2ubah}(h]j!ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj!hM2hj!hhubjO)}(hhh]j9)}(h(Memcpy from iosys_map into system memoryh]h(Memcpy from iosys_map into system memory}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM(hj#hhubah}(h]h ]h"]h$]h&]uh1jNhj!hhhj!hM2ubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj#jqj#jrjsjtuh1j hhhjK hNhNubjv)}(hX**Parameters** ``void *dst`` Destination in system memory ``const struct iosys_map *src`` The iosys_map structure ``size_t src_offset`` The offset from which to copy ``size_t len`` The number of byte in src **Description** Copies data from a iosys_map with an offset. The dest buffer is in system memory. Depending on the mapping location, the helper picks the correct method of accessing the memory.h](j9)}(h**Parameters**h]j)}(hj#h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM,hj#ubj)}(hhh](j)}(h+``void *dst`` Destination in system memory h](j)}(h ``void *dst``h]j)}(hj#h]h void *dst}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM)hj#ubj)}(hhh]j9)}(hDestination in system memoryh]hDestination in system memory}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj#hM)hj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jhj#hM)hj#ubj)}(h8``const struct iosys_map *src`` The iosys_map structure h](j)}(h``const struct iosys_map *src``h]j)}(hj$h]hconst struct iosys_map *src}(hj $hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM*hj$ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj!$hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj$hM*hj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jhj$hM*hj#ubj)}(h4``size_t src_offset`` The offset from which to copy h](j)}(h``size_t src_offset``h]j)}(hjA$h]hsize_t src_offset}(hjC$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?$ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM+hj;$ubj)}(hhh]j9)}(hThe offset from which to copyh]hThe offset from which to copy}(hjZ$hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjV$hM+hjW$ubah}(h]h ]h"]h$]h&]uh1jhj;$ubeh}(h]h ]h"]h$]h&]uh1jhjV$hM+hj#ubj)}(h)``size_t len`` The number of byte in src h](j)}(h``size_t len``h]j)}(hjz$h]h size_t len}(hj|$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjx$ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM,hjt$ubj)}(hhh]j9)}(hThe number of byte in srch]hThe number of byte in src}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj$hM,hj$ubah}(h]h ]h"]h$]h&]uh1jhjt$ubeh}(h]h ]h"]h$]h&]uh1jhj$hM,hj#ubeh}(h]h ]h"]h$]h&]uh1jhj#ubj9)}(h**Description**h]j)}(hj$h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM.hj#ubj9)}(hCopies data from a iosys_map with an offset. The dest buffer is in system memory. Depending on the mapping location, the helper picks the correct method of accessing the memory.h]hCopies data from a iosys_map with an offset. The dest buffer is in system memory. Depending on the mapping location, the helper picks the correct method of accessing the memory.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM.hj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_incr (C function)c.iosys_map_incrhNtauh1j hjK hhhNhNubj )}(hhh](j )}(h8void iosys_map_incr (struct iosys_map *map, size_t incr)h]j )}(h7void iosys_map_incr(struct iosys_map *map, size_t incr)h](j )}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj$hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMCubj )}(h h]h }(hj %hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj$hhhj%hMCubj)}(hiosys_map_incrh]j#)}(hiosys_map_incrh]hiosys_map_incr}(hj%hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj%ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj$hhhj%hMCubjX)}(h$(struct iosys_map *map, size_t incr)h](j^)}(hstruct iosys_map *maph](j )}(hj h]hstruct}(hj7%hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj3%ubj )}(h h]h }(hjD%hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj3%ubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hjU%hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjR%ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetjW%modnameN classnameNjj)}j]j)}jj%sbc.iosys_map_incrasbuh1hhj3%ubj )}(h h]h }(hju%hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj3%ubj)}(hjh]h*}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3%ubj#)}(hmaph]hmap}(hj%hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj3%ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj/%ubj^)}(h size_t incrh](h)}(hhh]j#)}(hsize_th]hsize_t}(hj%hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj%ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj%modnameN classnameNjj)}j]jq%c.iosys_map_incrasbuh1hhj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj%ubj#)}(hincrh]hincr}(hj%hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj%ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj/%ubeh}(h]h ]h"]h$]h&]hhuh1jWhj$hhhj%hMCubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj$hhhj%hMCubah}(h]j$ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj%hMChj$hhubjO)}(hhh]j9)}(h0Increments the address stored in a iosys mappingh]h0Increments the address stored in a iosys mapping}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM<hj%hhubah}(h]h ]h"]h$]h&]uh1jNhj$hhhj%hMCubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj&jqj&jrjsjtuh1j hhhjK hNhNubjv)}(hX**Parameters** ``struct iosys_map *map`` The iosys_map structure ``size_t incr`` The number of bytes to increment **Description** Increments the address stored in a iosys mapping. Depending on the buffer's location, the correct value will be updated.h](j9)}(h**Parameters**h]j)}(hj$&h]h Parameters}(hj&&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"&ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM@hj&ubj)}(hhh](j)}(h2``struct iosys_map *map`` The iosys_map structure h](j)}(h``struct iosys_map *map``h]j)}(hjC&h]hstruct iosys_map *map}(hjE&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjA&ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM=hj=&ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj\&hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjX&hM=hjY&ubah}(h]h ]h"]h$]h&]uh1jhj=&ubeh}(h]h ]h"]h$]h&]uh1jhjX&hM=hj:&ubj)}(h1``size_t incr`` The number of bytes to increment h](j)}(h``size_t incr``h]j)}(hj|&h]h size_t incr}(hj~&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjz&ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM>hjv&ubj)}(hhh]j9)}(h The number of bytes to incrementh]h The number of bytes to increment}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj&hM>hj&ubah}(h]h ]h"]h$]h&]uh1jhjv&ubeh}(h]h ]h"]h$]h&]uh1jhj&hM>hj:&ubeh}(h]h ]h"]h$]h&]uh1jhj&ubj9)}(h**Description**h]j)}(hj&h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM@hj&ubj9)}(hxIncrements the address stored in a iosys mapping. Depending on the buffer's location, the correct value will be updated.h]hzIncrements the address stored in a iosys mapping. Depending on the buffer’s location, the correct value will be updated.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM@hj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_memset (C function)c.iosys_map_memsethNtauh1j hjK hhhNhNubj )}(hhh](j )}(hSvoid iosys_map_memset (struct iosys_map *dst, size_t offset, int value, size_t len)h]j )}(hRvoid iosys_map_memset(struct iosys_map *dst, size_t offset, int value, size_t len)h](j )}(hvoidh]hvoid}(hj&hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj&hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMUubj )}(h h]h }(hj 'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj&hhhj 'hMUubj)}(hiosys_map_memseth]j#)}(hiosys_map_memseth]hiosys_map_memset}(hj'hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj'ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj&hhhj 'hMUubjX)}(h=(struct iosys_map *dst, size_t offset, int value, size_t len)h](j^)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj9'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj5'ubj )}(h h]h }(hjF'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj5'ubh)}(hhh]j#)}(h iosys_maph]h iosys_map}(hjW'hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjT'ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetjY'modnameN classnameNjj)}j]j)}jj'sbc.iosys_map_memsetasbuh1hhj5'ubj )}(h h]h }(hjw'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj5'ubj)}(hjh]h*}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5'ubj#)}(hdsth]hdst}(hj'hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj5'ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj1'ubj^)}(h size_t offseth](h)}(hhh]j#)}(hsize_th]hsize_t}(hj'hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj'ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj'modnameN classnameNjj)}j]js'c.iosys_map_memsetasbuh1hhj'ubj )}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj'ubj#)}(hoffseth]hoffset}(hj'hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj'ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj1'ubj^)}(h int valueh](j )}(hinth]hint}(hj'hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj'ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj'ubj#)}(hvalueh]hvalue}(hj(hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj'ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj1'ubj^)}(h size_t lenh](h)}(hhh]j#)}(hsize_th]hsize_t}(hj+(hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj((ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj-(modnameN classnameNjj)}j]js'c.iosys_map_memsetasbuh1hhj$(ubj )}(h h]h }(hjI(hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj$(ubj#)}(hlenh]hlen}(hjW(hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj$(ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj1'ubeh}(h]h ]h"]h$]h&]hhuh1jWhj&hhhj 'hMUubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj&hhhj 'hMUubah}(h]j&ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj 'hMUhj&hhubjO)}(hhh]j9)}(hMemset iosys_maph]hMemset iosys_map}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMLhj~(hhubah}(h]h ]h"]h$]h&]uh1jNhj&hhhj 'hMUubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj(jqj(jrjsjtuh1j hhhjK hNhNubjv)}(hXf**Parameters** ``struct iosys_map *dst`` The iosys_map structure ``size_t offset`` Offset from dst where to start setting value ``int value`` The value to set ``size_t len`` The number of bytes to set in dst **Description** Set value in iosys_map. Depending on the buffer's location, the helper picks the correct method of accessing the memory.h](j9)}(h**Parameters**h]j)}(hj(h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMPhj(ubj)}(hhh](j)}(h2``struct iosys_map *dst`` The iosys_map structure h](j)}(h``struct iosys_map *dst``h]j)}(hj(h]hstruct iosys_map *dst}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMMhj(ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj(hMMhj(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhj(hMMhj(ubj)}(h?``size_t offset`` Offset from dst where to start setting value h](j)}(h``size_t offset``h]j)}(hj(h]h size_t offset}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMNhj(ubj)}(hhh]j9)}(h,Offset from dst where to start setting valueh]h,Offset from dst where to start setting value}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj)hMNhj)ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhj)hMNhj(ubj)}(h``int value`` The value to set h](j)}(h ``int value``h]j)}(hj4)h]h int value}(hj6)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2)ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMOhj.)ubj)}(hhh]j9)}(hThe value to seth]hThe value to set}(hjM)hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjI)hMOhjJ)ubah}(h]h ]h"]h$]h&]uh1jhj.)ubeh}(h]h ]h"]h$]h&]uh1jhjI)hMOhj(ubj)}(h1``size_t len`` The number of bytes to set in dst h](j)}(h``size_t len``h]j)}(hjm)h]h size_t len}(hjo)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjk)ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMPhjg)ubj)}(hhh]j9)}(h!The number of bytes to set in dsth]h!The number of bytes to set in dst}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj)hMPhj)ubah}(h]h ]h"]h$]h&]uh1jhjg)ubeh}(h]h ]h"]h$]h&]uh1jhj)hMPhj(ubeh}(h]h ]h"]h$]h&]uh1jhj(ubj9)}(h**Description**h]j)}(hj)h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMRhj(ubj9)}(hxSet value in iosys_map. Depending on the buffer's location, the helper picks the correct method of accessing the memory.h]hzSet value in iosys_map. Depending on the buffer’s location, the helper picks the correct method of accessing the memory.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMRhj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_rd (C macro)c.iosys_map_rdhNtauh1j hjK hhhNhNubj )}(hhh](j )}(h iosys_map_rdh]j )}(h iosys_map_rdh]j)}(h iosys_map_rdh]j#)}(hj)h]h iosys_map_rd}(hj)hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj)ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj)hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMubah}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj)hhhj*hMubah}(h]j)ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj*hMhj)hhubjO)}(hhh]h}(h]h ]h"]h$]h&]uh1jNhj)hhhj*hMubeh}(h]h ](j{ macroeh"]h$]h&]joj{ jpj*jqj*jrjsjtuh1j hhhjK hNhNubj9)}(h*``iosys_map_rd (map__, offset__, type__)``h]j)}(hj#*h]h&iosys_map_rd (map__, offset__, type__)}(hj%*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!*ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjK hhubj)}(h'Read a C-type value from the iosys_map h]j9)}(h&Read a C-type value from the iosys_maph]h&Read a C-type value from the iosys_map}(hj=*hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhM}hj9*ubah}(h]h ]h"]h$]h&]uh1jhjK*hM}hjK hhubjv)}(hX**Parameters** ``map__`` The iosys_map structure ``offset__`` The offset from which to read ``type__`` Type of the value being read **Description** Read a C type value (u8, u16, u32 and u64) from iosys_map. For other types or if pointer may be unaligned (and problematic for the architecture supported), use iosys_map_memcpy_from(). **Return** The value read from the mapping.h](j9)}(h**Parameters**h]j)}(hjX*h]h Parameters}(hjZ*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjV*ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjR*ubj)}(hhh](j)}(h"``map__`` The iosys_map structure h](j)}(h ``map__``h]j)}(hjw*h]hmap__}(hjy*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhju*ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjq*ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhjq*ubeh}(h]h ]h"]h$]h&]uh1jhj*hMhjn*ubj)}(h+``offset__`` The offset from which to read h](j)}(h ``offset__``h]j)}(hj*h]hoffset__}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj*ubj)}(hhh]j9)}(hThe offset from which to readh]hThe offset from which to read}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhj*hMhjn*ubj)}(h(``type__`` Type of the value being read h](j)}(h ``type__``h]j)}(hj*h]htype__}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj*ubj)}(hhh]j9)}(hType of the value being readh]hType of the value being read}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhj*hMhjn*ubeh}(h]h ]h"]h$]h&]uh1jhjR*ubj9)}(h**Description**h]j)}(hj$+h]h Description}(hj&+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj"+ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjR*ubj9)}(hRead a C type value (u8, u16, u32 and u64) from iosys_map. For other types or if pointer may be unaligned (and problematic for the architecture supported), use iosys_map_memcpy_from().h]hRead a C type value (u8, u16, u32 and u64) from iosys_map. For other types or if pointer may be unaligned (and problematic for the architecture supported), use iosys_map_memcpy_from().}(hj:+hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjR*ubj9)}(h **Return**h]j)}(hjK+h]hReturn}(hjM+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjI+ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjR*ubj9)}(h The value read from the mapping.h]h The value read from the mapping.}(hja+hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjR*ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_wr (C macro)c.iosys_map_wrhNtauh1j hjK hhhNhNubj )}(hhh](j )}(h iosys_map_wrh]j )}(h iosys_map_wrh]j)}(h iosys_map_wrh]j#)}(hj+h]h iosys_map_wr}(hj+hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj+ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj+hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMubah}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj+hhhj+hMubah}(h]j+ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj+hMhj+hhubjO)}(hhh]h}(h]h ]h"]h$]h&]uh1jNhj+hhhj+hMubeh}(h]h ](j{ macroeh"]h$]h&]joj{ jpj+jqj+jrjsjtuh1j hhhjK hNhNubj9)}(h1``iosys_map_wr (map__, offset__, type__, val__)``h]j)}(hj+h]h-iosys_map_wr (map__, offset__, type__, val__)}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjK hhubj)}(h&Write a C-type value to the iosys_map h]j9)}(h%Write a C-type value to the iosys_maph]h%Write a C-type value to the iosys_map}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+hMhjK hhubjv)}(hX**Parameters** ``map__`` The iosys_map structure ``offset__`` The offset from the mapping to write to ``type__`` Type of the value being written ``val__`` Value to write **Description** Write a C type value (u8, u16, u32 and u64) to the iosys_map. For other types or if pointer may be unaligned (and problematic for the architecture supported), use iosys_map_memcpy_to()h](j9)}(h**Parameters**h]j)}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj+ubj)}(hhh](j)}(h"``map__`` The iosys_map structure h](j)}(h ``map__``h]j)}(hj,h]hmap__}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj,ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj3,hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj/,hMhj0,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj/,hMhj,ubj)}(h5``offset__`` The offset from the mapping to write to h](j)}(h ``offset__``h]j)}(hjS,h]hoffset__}(hjU,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjQ,ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjM,ubj)}(hhh]j9)}(h'The offset from the mapping to write toh]h'The offset from the mapping to write to}(hjl,hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjh,hMhji,ubah}(h]h ]h"]h$]h&]uh1jhjM,ubeh}(h]h ]h"]h$]h&]uh1jhjh,hMhj,ubj)}(h+``type__`` Type of the value being written h](j)}(h ``type__``h]j)}(hj,h]htype__}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj,ubj)}(hhh]j9)}(hType of the value being writtenh]hType of the value being written}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hMhj,ubj)}(h``val__`` Value to write h](j)}(h ``val__``h]j)}(hj,h]hval__}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj,ubj)}(hhh]j9)}(hValue to writeh]hValue to write}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hMhj,ubeh}(h]h ]h"]h$]h&]uh1jhj+ubj9)}(h**Description**h]j)}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj+ubj9)}(hWrite a C type value (u8, u16, u32 and u64) to the iosys_map. For other types or if pointer may be unaligned (and problematic for the architecture supported), use iosys_map_memcpy_to()h]hWrite a C type value (u8, u16, u32 and u64) to the iosys_map. For other types or if pointer may be unaligned (and problematic for the architecture supported), use iosys_map_memcpy_to()}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_rd_field (C macro)c.iosys_map_rd_fieldhNtauh1j hjK hhhNhNubj )}(hhh](j )}(hiosys_map_rd_fieldh]j )}(hiosys_map_rd_fieldh]j)}(hiosys_map_rd_fieldh]j#)}(hj?-h]hiosys_map_rd_field}(hjI-hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjE-ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjA-hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMubah}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj=-hhhj\-hMubah}(h]j8-ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj\-hMhj:-hhubjO)}(hhh]h}(h]h ]h"]h$]h&]uh1jNhj:-hhhj\-hMubeh}(h]h ](j{ macroeh"]h$]h&]joj{ jpju-jqju-jrjsjtuh1j hhhjK hNhNubj9)}(hG``iosys_map_rd_field (map__, struct_offset__, struct_type__, field__)``h]j)}(hj{-h]hCiosys_map_rd_field (map__, struct_offset__, struct_type__, field__)}(hj}-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjy-ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjK hhubj)}(h-Read a member from a struct in the iosys_map h]j9)}(h,Read a member from a struct in the iosys_maph]h,Read a member from a struct in the iosys_map}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-hMhjK hhubjv)}(hX0 **Parameters** ``map__`` The iosys_map structure ``struct_offset__`` Offset from the beginning of the map, where the struct is located ``struct_type__`` The struct describing the layout of the mapping ``field__`` Member of the struct to read **Description** Read a value from iosys_map considering its layout is described by a C struct starting at **struct_offset__**. The field offset and size is calculated and its value read. If the field access would incur in un-aligned access, then either iosys_map_memcpy_from() needs to be used or the architecture must support it. For example: suppose there is a **struct** foo defined as below and the value ``foo.field2.inner2`` needs to be read from the iosys_map: .. code-block:: c struct foo { int field1; struct { int inner1; int inner2; } field2; int field3; } __packed; This is the expected memory layout of a buffer using iosys_map_rd_field(): +------------------------------+--------------------------+ | Address | Content | +==============================+==========================+ | buffer + 0000 | start of mmapped buffer | | | pointed by iosys_map | +------------------------------+--------------------------+ | ... | ... | +------------------------------+--------------------------+ | buffer + ``struct_offset__`` | start of ``struct foo`` | +------------------------------+--------------------------+ | ... | ... | +------------------------------+--------------------------+ | buffer + wwww | ``foo.field2.inner2`` | +------------------------------+--------------------------+ | ... | ... | +------------------------------+--------------------------+ | buffer + yyyy | end of ``struct foo`` | +------------------------------+--------------------------+ | ... | ... | +------------------------------+--------------------------+ | buffer + zzzz | end of mmaped buffer | +------------------------------+--------------------------+ Values automatically calculated by this macro or not needed are denoted by wwww, yyyy and zzzz. This is the code to read that value: .. code-block:: c x = iosys_map_rd_field(&map, offset, struct foo, field2.inner2); **Return** The value read from the mapping.h](j9)}(h**Parameters**h]j)}(hj-h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj)}(hhh](j)}(h"``map__`` The iosys_map structure h](j)}(h ``map__``h]j)}(hj-h]hmap__}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hMhj-ubj)}(hV``struct_offset__`` Offset from the beginning of the map, where the struct is located h](j)}(h``struct_offset__``h]j)}(hj.h]hstruct_offset__}(hj .hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj.ubj)}(hhh]j9)}(hAOffset from the beginning of the map, where the struct is locatedh]hAOffset from the beginning of the map, where the struct is located}(hj!.hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhj.hMhj-ubj)}(hB``struct_type__`` The struct describing the layout of the mapping h](j)}(h``struct_type__``h]j)}(hjB.h]h struct_type__}(hjD.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj@.ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj<.ubj)}(hhh]j9)}(h/The struct describing the layout of the mappingh]h/The struct describing the layout of the mapping}(hj[.hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjW.hMhjX.ubah}(h]h ]h"]h$]h&]uh1jhj<.ubeh}(h]h ]h"]h$]h&]uh1jhjW.hMhj-ubj)}(h)``field__`` Member of the struct to read h](j)}(h ``field__``h]j)}(hj{.h]hfield__}(hj}.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjy.ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhju.ubj)}(hhh]j9)}(hMember of the struct to readh]hMember of the struct to read}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj.hMhj.ubah}(h]h ]h"]h$]h&]uh1jhju.ubeh}(h]h ]h"]h$]h&]uh1jhj.hMhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-ubj9)}(h**Description**h]j)}(hj.h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj9)}(hXRead a value from iosys_map considering its layout is described by a C struct starting at **struct_offset__**. The field offset and size is calculated and its value read. If the field access would incur in un-aligned access, then either iosys_map_memcpy_from() needs to be used or the architecture must support it. For example: suppose there is a **struct** foo defined as below and the value ``foo.field2.inner2`` needs to be read from the iosys_map:h](hZRead a value from iosys_map considering its layout is described by a C struct starting at }(hj.hhhNhNubj)}(h**struct_offset__**h]hstruct_offset__}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubh. The field offset and size is calculated and its value read. If the field access would incur in un-aligned access, then either iosys_map_memcpy_from() needs to be used or the architecture must support it. For example: suppose there is a }(hj.hhhNhNubj)}(h **struct**h]hstruct}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubh$ foo defined as below and the value }(hj.hhhNhNubj)}(h``foo.field2.inner2``h]hfoo.field2.inner2}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubh% needs to be read from the iosys_map:}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubji)}(hstruct foo { int field1; struct { int inner1; int inner2; } field2; int field3; } __packed;h]hstruct foo { int field1; struct { int inner1; int inner2; } field2; int field3; } __packed;}hj/sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj9)}(hJThis is the expected memory layout of a buffer using iosys_map_rd_field():h]hJThis is the expected memory layout of a buffer using iosys_map_rd_field():}(hj!/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj )}(hhh]j )}(hhh](j )}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1j hj3/ubj )}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1j hj3/ubhthead)}(hhh]j: )}(hhh](j? )}(hhh]j9)}(hAddressh]hAddress}(hjU/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjR/ubah}(h]h ]h"]h$]h&]uh1j> hjO/ubj? )}(hhh]j9)}(hContenth]hContent}(hjm/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjc/hMhjj/ubah}(h]h ]h"]h$]h&]uh1j> hjO/ubeh}(h]h ]h"]h$]h&]uh1j9 hjL/ubah}(h]h ]h"]h$]h&]uh1jJ/hj3/ubj5 )}(hhh](j: )}(hhh](j? )}(hhh]j9)}(h buffer + 0000h]h buffer + 0000}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj/ubah}(h]h ]h"]h$]h&]uh1j> hj/ubj? )}(hhh]j9)}(h,start of mmapped buffer pointed by iosys_maph]h,start of mmapped buffer pointed by iosys_map}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j> hj/ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h...h]h...}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj/ubah}(h]h ]h"]h$]h&]uh1j> hj/ubj? )}(hhh]j9)}(h...h]h...}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j> hj/ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(hbuffer + ``struct_offset__``h](h buffer + }(hj0hhhNhNubj)}(h``struct_offset__``h]hstruct_offset__}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj0ubah}(h]h ]h"]h$]h&]uh1j> hj0ubj? )}(hhh]j9)}(hstart of ``struct foo``h](h start of }(hj,0hhhNhNubj)}(h``struct foo``h]h struct foo}(hj40hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,0ubeh}(h]h ]h"]h$]h&]uh1j8hj"0hMhj)0ubah}(h]h ]h"]h$]h&]uh1j> hj0ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h...h]h...}(hjZ0hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjW0ubah}(h]h ]h"]h$]h&]uh1j> hjT0ubj? )}(hhh]j9)}(h...h]h...}(hjr0hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjh0hMhjo0ubah}(h]h ]h"]h$]h&]uh1j> hjT0ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h buffer + wwwwh]h buffer + wwww}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj0ubah}(h]h ]h"]h$]h&]uh1j> hj0ubj? )}(hhh]j9)}(h``foo.field2.inner2``h]j)}(hj0h]hfoo.field2.inner2}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]uh1j8hj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j> hj0ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h...h]h...}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj0ubah}(h]h ]h"]h$]h&]uh1j> hj0ubj? )}(hhh]j9)}(h...h]h...}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j> hj0ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h buffer + yyyyh]h buffer + yyyy}(hj 1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj1ubah}(h]h ]h"]h$]h&]uh1j> hj1ubj? )}(hhh]j9)}(hend of ``struct foo``h](hend of }(hj#1hhhNhNubj)}(h``struct foo``h]h struct foo}(hj+1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#1ubeh}(h]h ]h"]h$]h&]uh1j8hj1hMhj 1ubah}(h]h ]h"]h$]h&]uh1j> hj1ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h...h]h...}(hjQ1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjN1ubah}(h]h ]h"]h$]h&]uh1j> hjK1ubj? )}(hhh]j9)}(h...h]h...}(hji1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj_1hMhjf1ubah}(h]h ]h"]h$]h&]uh1j> hjK1ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubj: )}(hhh](j? )}(hhh]j9)}(h buffer + zzzzh]h buffer + zzzz}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj1ubah}(h]h ]h"]h$]h&]uh1j> hj1ubj? )}(hhh]j9)}(hend of mmaped bufferh]hend of mmaped buffer}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj1hMhj1ubah}(h]h ]h"]h$]h&]uh1j> hj1ubeh}(h]h ]h"]h$]h&]uh1j9 hj/ubeh}(h]h ]h"]h$]h&]uh1j4 hj3/ubeh}(h]h ]h"]h$]h&]colsKuh1j hj0/ubah}(h]h ]h"]h$]h&]uh1j hj-ubj9)}(hValues automatically calculated by this macro or not needed are denoted by wwww, yyyy and zzzz. This is the code to read that value:h]hValues automatically calculated by this macro or not needed are denoted by wwww, yyyy and zzzz. This is the code to read that value:}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubji)}(h@x = iosys_map_rd_field(&map, offset, struct foo, field2.inner2);h]h@x = iosys_map_rd_field(&map, offset, struct foo, field2.inner2);}hj1sbah}(h]h ]h"]h$]h&]hhjy jz j{ j| }uh1jhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj9)}(h **Return**h]j)}(hj1h]hReturn}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubj9)}(h The value read from the mapping.h]h The value read from the mapping.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosys_map_wr_field (C macro)c.iosys_map_wr_fieldhNtauh1j hjK hhhNhNubj )}(hhh](j )}(hiosys_map_wr_fieldh]j )}(hiosys_map_wr_fieldh]j)}(hiosys_map_wr_fieldh]j#)}(hj.2h]hiosys_map_wr_field}(hj82hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj42ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj02hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMubah}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj,2hhhjK2hMubah}(h]j'2ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjK2hMhj)2hhubjO)}(hhh]h}(h]h ]h"]h$]h&]uh1jNhj)2hhhjK2hMubeh}(h]h ](j{ macroeh"]h$]h&]joj{ jpjd2jqjd2jrjsjtuh1j hhhjK hNhNubj9)}(hN``iosys_map_wr_field (map__, struct_offset__, struct_type__, field__, val__)``h]j)}(hjj2h]hJiosys_map_wr_field (map__, struct_offset__, struct_type__, field__, val__)}(hjl2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjh2ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjK hhubj)}(h/Write to a member of a struct in the iosys_map h]j9)}(h.Write to a member of a struct in the iosys_maph]h.Write to a member of a struct in the iosys_map}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj2ubah}(h]h ]h"]h$]h&]uh1jhj2hMhjK hhubjv)}(hX**Parameters** ``map__`` The iosys_map structure ``struct_offset__`` Offset from the beginning of the map, where the struct is located ``struct_type__`` The struct describing the layout of the mapping ``field__`` Member of the struct to read ``val__`` Value to write **Description** Write a value to the iosys_map considering its layout is described by a C struct starting at **struct_offset__**. The field offset and size is calculated and the **val__** is written. If the field access would incur in un-aligned access, then either iosys_map_memcpy_to() needs to be used or the architecture must support it. Refer to iosys_map_rd_field() for expected usage and memory layout.h](j9)}(h**Parameters**h]j)}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj2ubj)}(hhh](j)}(h"``map__`` The iosys_map structure h](j)}(h ``map__``h]j)}(hj2h]hmap__}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj2ubj)}(hhh]j9)}(hThe iosys_map structureh]hThe iosys_map structure}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj2hMhj2ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj2hMhj2ubj)}(hV``struct_offset__`` Offset from the beginning of the map, where the struct is located h](j)}(h``struct_offset__``h]j)}(hj2h]hstruct_offset__}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj2ubj)}(hhh]j9)}(hAOffset from the beginning of the map, where the struct is locatedh]hAOffset from the beginning of the map, where the struct is located}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj 3ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj 3hMhj2ubj)}(hB``struct_type__`` The struct describing the layout of the mapping h](j)}(h``struct_type__``h]j)}(hj13h]h struct_type__}(hj33hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/3ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj+3ubj)}(hhh]j9)}(h/The struct describing the layout of the mappingh]h/The struct describing the layout of the mapping}(hjJ3hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjF3hMhjG3ubah}(h]h ]h"]h$]h&]uh1jhj+3ubeh}(h]h ]h"]h$]h&]uh1jhjF3hMhj2ubj)}(h)``field__`` Member of the struct to read h](j)}(h ``field__``h]j)}(hjj3h]hfield__}(hjl3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjh3ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhjd3ubj)}(hhh]j9)}(hMember of the struct to readh]hMember of the struct to read}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj3hMhj3ubah}(h]h ]h"]h$]h&]uh1jhjd3ubeh}(h]h ]h"]h$]h&]uh1jhj3hMhj2ubj)}(h``val__`` Value to write h](j)}(h ``val__``h]j)}(hj3h]hval__}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj3ubj)}(hhh]j9)}(hValue to writeh]hValue to write}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj3hMhj3ubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jhj3hMhj2ubeh}(h]h ]h"]h$]h&]uh1jhj2ubj9)}(h**Description**h]j)}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj2ubj9)}(hXWrite a value to the iosys_map considering its layout is described by a C struct starting at **struct_offset__**. The field offset and size is calculated and the **val__** is written. If the field access would incur in un-aligned access, then either iosys_map_memcpy_to() needs to be used or the architecture must support it. Refer to iosys_map_rd_field() for expected usage and memory layout.h](h]Write a value to the iosys_map considering its layout is described by a C struct starting at }(hj3hhhNhNubj)}(h**struct_offset__**h]hstruct_offset__}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh2. The field offset and size is calculated and the }(hj3hhhNhNubj)}(h **val__**h]hval__}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh is written. If the field access would incur in un-aligned access, then either iosys_map_memcpy_to() needs to be used or the architecture must support it. Refer to iosys_map_rd_field() for expected usage and memory layout.}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.hhMhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhjK hhhNhNubeh}(h],generalizing-access-to-system-and-i-o-memoryah ]h"],generalizing access to system and i/o memoryah$]h&]uh1jhjhhhhhMubj)}(hhh](j )}(hPublic Functions Providedh]hPublic Functions Provided}(hj94hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj64hhhhhMubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j virt_to_phys (C function)c.virt_to_physhNtauh1j hj64hhhNhNubj )}(hhh](j )}(h1phys_addr_t virt_to_phys (volatile void *address)h]j )}(h0phys_addr_t virt_to_phys(volatile void *address)h](h)}(hhh]j#)}(h phys_addr_th]h phys_addr_t}(hjc4hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj`4ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetje4modnameN classnameNjj)}j]j)}j virt_to_physsbc.virt_to_physasbuh1hhj\4hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKubj )}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj\4hhhj4hKubj)}(h virt_to_physh]j#)}(hj4h]h virt_to_phys}(hj4hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj4ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj\4hhhj4hKubjX)}(h(volatile void *address)h]j^)}(hvolatile void *addressh](j )}(hvolatileh]hvolatile}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj4ubj )}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj4ubj)}(hjh]h*}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj#)}(haddressh]haddress}(hj4hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj4ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj4ubah}(h]h ]h"]h$]h&]hhuh1jWhj\4hhhj4hKubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhjX4hhhj4hKubah}(h]jS4ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj4hKhjU4hhubjO)}(hhh]j9)}(h!map virtual addresses to physicalh]h!map virtual addresses to physical}(hj!5hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKuhj5hhubah}(h]h ]h"]h$]h&]uh1jNhjU4hhhj4hKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj95jqj95jrjsjtuh1j hhhj64hNhNubjv)}(hX**Parameters** ``volatile void *address`` address to remap The returned physical address is the physical (CPU) mapping for the memory address given. It is only valid to use this function on addresses directly mapped or allocated via kmalloc. This function does not give bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this functionh](j9)}(h**Parameters**h]j)}(hjC5h]h Parameters}(hjE5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjA5ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKyhj=5ubj)}(hhh]j)}(hXr``volatile void *address`` address to remap The returned physical address is the physical (CPU) mapping for the memory address given. It is only valid to use this function on addresses directly mapped or allocated via kmalloc. This function does not give bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this functionh](j)}(h``volatile void *address``h]j)}(hjb5h]hvolatile void *address}(hjd5hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`5ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhK}hj\5ubj)}(hhh](j9)}(haddress to remaph]haddress to remap}(hj{5hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKvhjx5ubj9)}(hThe returned physical address is the physical (CPU) mapping for the memory address given. It is only valid to use this function on addresses directly mapped or allocated via kmalloc.h]hThe returned physical address is the physical (CPU) mapping for the memory address given. It is only valid to use this function on addresses directly mapped or allocated via kmalloc.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKxhjx5ubj9)}(hThis function does not give bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this functionh]hThis function does not give bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this function}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhK|hjx5ubeh}(h]h ]h"]h$]h&]uh1jhj\5ubeh}(h]h ]h"]h$]h&]uh1jhjw5hK}hjY5ubah}(h]h ]h"]h$]h&]uh1jhj=5ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhj64hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j phys_to_virt (C function)c.phys_to_virthNtauh1j hj64hhhNhNubj )}(hhh](j )}(h)void * phys_to_virt (phys_addr_t address)h]j )}(h'void *phys_to_virt(phys_addr_t address)h](j )}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj5hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKubj )}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj5hhhj5hKubj)}(hjh]h*}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhj5hKubj)}(h phys_to_virth]j#)}(h phys_to_virth]h phys_to_virt}(hj6hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj6ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj5hhhj5hKubjX)}(h(phys_addr_t address)h]j^)}(hphys_addr_t addressh](h)}(hhh]j#)}(h phys_addr_th]h phys_addr_t}(hj'6hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj$6ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj)6modnameN classnameNjj)}j]j)}jj 6sbc.phys_to_virtasbuh1hhj 6ubj )}(h h]h }(hjG6hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj 6ubj#)}(haddressh]haddress}(hjU6hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj 6ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj6ubah}(h]h ]h"]h$]h&]hhuh1jWhj5hhhj5hKubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj5hhhj5hKubah}(h]j5ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hj5hKhj5hhubjO)}(hhh]j9)}(hmap physical address to virtualh]hmap physical address to virtual}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj|6hhubah}(h]h ]h"]h$]h&]uh1jNhj5hhhj5hKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj6jqj6jrjsjtuh1j hhhj64hNhNubjv)}(hXz**Parameters** ``phys_addr_t address`` address to remap The returned virtual address is a current CPU mapping for the memory address given. It is only valid to use this function on addresses that have a kernel mapping This function does not handle bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this functionh](j9)}(h**Parameters**h]j)}(hj6h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj6ubj)}(hhh]j)}(hX\``phys_addr_t address`` address to remap The returned virtual address is a current CPU mapping for the memory address given. It is only valid to use this function on addresses that have a kernel mapping This function does not handle bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this functionh](j)}(h``phys_addr_t address``h]j)}(hj6h]hphys_addr_t address}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj6ubj)}(hhh](j9)}(haddress to remaph]haddress to remap}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj6ubj9)}(hThe returned virtual address is a current CPU mapping for the memory address given. It is only valid to use this function on addresses that have a kernel mappingh]hThe returned virtual address is a current CPU mapping for the memory address given. It is only valid to use this function on addresses that have a kernel mapping}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj6ubj9)}(hThis function does not handle bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this functionh]hThis function does not handle bus mappings for DMA transfers. In almost all conceivable cases a device driver should not be using this function}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj6ubeh}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jhj6hKhj6ubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhj64hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ioremap (C function) c.ioremaphNtauh1j hj64hhhNhNubj )}(hhh](j )}(hCvoid __iomem * ioremap (resource_size_t offset, unsigned long size)h]j )}(hAvoid __iomem *ioremap(resource_size_t offset, unsigned long size)h](j )}(hvoidh]hvoid}(hj87hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj47hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKubj )}(h h]h }(hjG7hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj47hhhjF7hKubh__iomem}(hj47hhhNhNubj )}(h h]h }(hjY7hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj47hhhjF7hKubj)}(hjh]h*}(hjg7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj47hhhjF7hKubj)}(hioremaph]j#)}(hioremaph]hioremap}(hjx7hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjt7ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhj47hhhjF7hKubjX)}(h,(resource_size_t offset, unsigned long size)h](j^)}(hresource_size_t offseth](h)}(hhh]j#)}(hresource_size_th]hresource_size_t}(hj7hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj7ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj7modnameN classnameNjj)}j]j)}jjz7sb c.ioremapasbuh1hhj7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj7ubj#)}(hoffseth]hoffset}(hj7hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj7ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj7ubj^)}(hunsigned long sizeh](j )}(hunsignedh]hunsigned}(hj7hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj7ubj )}(hlongh]hlong}(hj7hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj7ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj7ubj#)}(hsizeh]hsize}(hj8hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj7ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj7ubeh}(h]h ]h"]h$]h&]hhuh1jWhj47hhhjF7hKubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhj07hhhjF7hKubah}(h]j+7ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjF7hKhj-7hhubjO)}(hhh]j9)}(hmap bus memory into CPU spaceh]hmap bus memory into CPU space}(hj@8hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj=8hhubah}(h]h ]h"]h$]h&]uh1jNhj-7hhhjF7hKubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpjX8jqjX8jrjsjtuh1j hhhj64hNhNubjv)}(hX**Parameters** ``resource_size_t offset`` bus address of the memory ``unsigned long size`` size of the resource to map **Description** ioremap performs a platform specific sequence of operations to make bus memory CPU accessible via the readb/readw/readl/writeb/ writew/writel functions and the other mmio helpers. The returned address is not guaranteed to be usable directly as a virtual address. If the area you are trying to map is a PCI BAR you should have a look at pci_iomap().h](j9)}(h**Parameters**h]j)}(hjb8h]h Parameters}(hjd8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`8ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj\8ubj)}(hhh](j)}(h5``resource_size_t offset`` bus address of the memory h](j)}(h``resource_size_t offset``h]j)}(hj8h]hresource_size_t offset}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj{8ubj)}(hhh]j9)}(hbus address of the memoryh]hbus address of the memory}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj8hKhj8ubah}(h]h ]h"]h$]h&]uh1jhj{8ubeh}(h]h ]h"]h$]h&]uh1jhj8hKhjx8ubj)}(h3``unsigned long size`` size of the resource to map h](j)}(h``unsigned long size``h]j)}(hj8h]hunsigned long size}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj8ubj)}(hhh]j9)}(hsize of the resource to maph]hsize of the resource to map}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj8hKhj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jhj8hKhjx8ubeh}(h]h ]h"]h$]h&]uh1jhj\8ubj9)}(h**Description**h]j)}(hj8h]h Description}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj\8ubj9)}(hXioremap performs a platform specific sequence of operations to make bus memory CPU accessible via the readb/readw/readl/writeb/ writew/writel functions and the other mmio helpers. The returned address is not guaranteed to be usable directly as a virtual address.h]hXioremap performs a platform specific sequence of operations to make bus memory CPU accessible via the readb/readw/readl/writeb/ writew/writel functions and the other mmio helpers. The returned address is not guaranteed to be usable directly as a virtual address.}(hj 9hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj\8ubj9)}(hUIf the area you are trying to map is a PCI BAR you should have a look at pci_iomap().h]hUIf the area you are trying to map is a PCI BAR you should have a look at pci_iomap().}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhKhj\8ubeh}(h]h ] kernelindentah"]h$]h&]uh1juhj64hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j iosubmit_cmds512 (C function)c.iosubmit_cmds512hNtauh1j hj64hhhNhNubj )}(hhh](j )}(hHvoid iosubmit_cmds512 (void __iomem *dst, const void *src, size_t count)h]j )}(hGvoid iosubmit_cmds512(void __iomem *dst, const void *src, size_t count)h](j )}(hvoidh]hvoid}(hjI9hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhjE9hhh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhMubj )}(h h]h }(hjX9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjE9hhhjW9hMubj)}(hiosubmit_cmds512h]j#)}(hiosubmit_cmds512h]hiosubmit_cmds512}(hjj9hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hjf9ubah}(h]h ](j5j6eh"]h$]h&]hhuh1jhjE9hhhjW9hMubjX)}(h2(void __iomem *dst, const void *src, size_t count)h](j^)}(hvoid __iomem *dsth](j )}(hvoidh]hvoid}(hj9hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj9ubh__iomem}(hj9hhhNhNubj )}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj9ubj)}(hjh]h*}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj#)}(hdsth]hdst}(hj9hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj9ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj~9ubj^)}(hconst void *srch](j )}(hjzh]hconst}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj9ubj )}(hvoidh]hvoid}(hj9hhhNhNubah}(h]h ]j,ah"]h$]h&]uh1jhj9ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj9ubj)}(hjh]h*}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj#)}(hsrch]hsrc}(hj:hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj9ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj~9ubj^)}(h size_t counth](h)}(hhh]j#)}(hsize_th]hsize_t}(hj::hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj7:ubah}(h]h ]h"]h$]h&] refdomainj{ reftypej reftargetj<:modnameN classnameNjj)}j]j)}jjl9sbc.iosubmit_cmds512asbuh1hhj3:ubj )}(h h]h }(hjZ:hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj3:ubj#)}(hcounth]hcount}(hjh:hhhNhNubah}(h]h ]j.ah"]h$]h&]uh1j"hj3:ubeh}(h]h ]h"]h$]h&]noemphhhuh1j]hj~9ubeh}(h]h ]h"]h$]h&]hhuh1jWhjE9hhhjW9hMubeh}(h]h ]h"]h$]h&]hhj@uh1j jAjBhjA9hhhjW9hMubah}(h]j<9ah ](jFjGeh"]h$]h&]jKjL)jMhuh1j hjW9hMhj>9hhubjO)}(hhh]j9)}(h3copy data to single MMIO location, in 512-bit unitsh]h3copy data to single MMIO location, in 512-bit units}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhM{hj:hhubah}(h]h ]h"]h$]h&]uh1jNhj>9hhhjW9hMubeh}(h]h ](j{ functioneh"]h$]h&]joj{ jpj:jqj:jrjsjtuh1j hhhj64hNhNubjv)}(hX**Parameters** ``void __iomem *dst`` destination, in MMIO space (must be 512-bit aligned) ``const void *src`` source ``size_t count`` number of 512 bits quantities to submit **Description** Submit data from kernel space to MMIO space, in units of 512 bits at a time. Order of access is not guaranteed, nor is a memory barrier performed afterwards. Warning: Do not use this helper unless your driver has checked that the CPU instruction is supported on the platform.h](j9)}(h**Parameters**h]j)}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhMhj:ubj)}(hhh](j)}(hK``void __iomem *dst`` destination, in MMIO space (must be 512-bit aligned) h](j)}(h``void __iomem *dst``h]j)}(hj:h]hvoid __iomem *dst}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhM|hj:ubj)}(hhh]j9)}(h4destination, in MMIO space (must be 512-bit aligned)h]h4destination, in MMIO space (must be 512-bit aligned)}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj:hM|hj:ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jhj:hM|hj:ubj)}(h``const void *src`` source h](j)}(h``const void *src``h]j)}(hj ;h]hconst void *src}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ;ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhM}hj;ubj)}(hhh]j9)}(hsourceh]hsource}(hj%;hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj!;hM}hj";ubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jhj!;hM}hj:ubj)}(h9``size_t count`` number of 512 bits quantities to submit h](j)}(h``size_t count``h]j)}(hjE;h]h size_t count}(hjG;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjC;ubah}(h]h ]h"]h$]h&]uh1jh_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhM~hj?;ubj)}(hhh]j9)}(h'number of 512 bits quantities to submith]h'number of 512 bits quantities to submit}(hj^;hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hjZ;hM~hj[;ubah}(h]h ]h"]h$]h&]uh1jhj?;ubeh}(h]h ]h"]h$]h&]uh1jhjZ;hM~hj:ubeh}(h]h ]h"]h$]h&]uh1jhj:ubj9)}(h**Description**h]j)}(hj;h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~;ubah}(h]h ]h"]h$]h&]uh1j8h_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:518: ./arch/x86/include/asm/io.hhMhj:ubj9)}(hSubmit data from kernel space to MMIO space, in units of 512 bits at a time. Order of access is not guaranteed, nor is a memory barrier performed afterwards.h]hSubmit data from kernel space to MMIO space, in units of 512 bits at a time. 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Treating it as ordinary text because it’s so short.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj<ubah}(h]h ]h"]h$]h&]levelKtypejn<lineMsource_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.huh1jS<hjW0ubjT<)}(hhh]j9)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj<ubah}(h]h ]h"]h$]h&]levelKtypejn<lineMsourcej<uh1jS<hjo0ubjT<)}(hhh]j9)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj<ubah}(h]h ]h"]h$]h&]levelKtypejn<lineMsource_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.huh1jS<hj0ubjT<)}(hhh]j9)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj<ubah}(h]h ]h"]h$]h&]levelKtypejn<lineMsourcej<uh1jS<hj0ubjT<)}(hhh]j9)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj<ubah}(h]h ]h"]h$]h&]levelKtypejn<lineMsource_/var/lib/git/docbuild/linux/Documentation/driver-api/device-io:512: ./include/linux/iosys-map.huh1jS<hjN1ubjT<)}(hhh]j9)}(heUnexpected possible title overline or transition. Treating it as ordinary text because it's so short.h]hgUnexpected possible title overline or transition. Treating it as ordinary text because it’s so short.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j8hj=ubah}(h]h ]h"]h$]h&]levelKtypejn<lineMsourcej=uh1jS<hjf1ubetransform_messages] transformerN include_log] decorationNhhub.