€•ãšŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ8/translations/zh_CN/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ8/translations/zh_TW/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ8/translations/it_IT/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ8/translations/ja_JP/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ8/translations/ko_KR/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ8/translations/pt_BR/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ8/translations/sp_SP/driver-api/cxl/platform/bios-and-efi”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hµhhh²hh³ŒR/var/lib/git/docbuild/linux/Documentation/driver-api/cxl/platform/bios-and-efi.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒBIOS/EFI Configuration”h]”hŒBIOS/EFI Configuration”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhŒ paragraph”“”)”}”(hŒÇBIOS and EFI are largely responsible for configuring static information about devices (or potential future devices) such that Linux can build the appropriate logical representations of these devices.”h]”hŒÇBIOS and EFI are largely responsible for configuring static information about devices (or potential future devices) such that Linux can build the appropriate logical representations of these devices.”…””}”(hhßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhhÊh²hubhÞ)”}”(hŒHAt a high level, this is what occurs during this phase of configuration.”h]”hŒHAt a high level, this is what occurs during this phase of configuration.”…””}”(hhíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K hhÊh²hubhŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒ$The bootloader starts the BIOS/EFI. ”h]”hÞ)”}”(hŒ#The bootloader starts the BIOS/EFI.”h]”hŒ#The bootloader starts the BIOS/EFI.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhhýh²hh³hÇh´Nubj)”}”(hŒABIOS/EFI do early device probe to determine static configuration ”h]”hÞ)”}”(hŒ@BIOS/EFI do early device probe to determine static configuration”h]”hŒ@BIOS/EFI do early device probe to determine static configuration”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhhýh²hh³hÇh´Nubj)”}”(hŒDBIOS/EFI creates ACPI Tables that describe static config for the OS ”h]”hÞ)”}”(hŒCBIOS/EFI creates ACPI Tables that describe static config for the OS”h]”hŒCBIOS/EFI creates ACPI Tables that describe static config for the OS”…””}”(hj6h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khj2ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhhýh²hh³hÇh´Nubj)”}”(hŒBBIOS/EFI create the system memory map (EFI Memory Map, E820, etc) ”h]”hÞ)”}”(hŒABIOS/EFI create the system memory map (EFI Memory Map, E820, etc)”h]”hŒABIOS/EFI create the system memory map (EFI Memory Map, E820, etc)”…””}”(hjNh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhjJubah}”(h]”h ]”h"]”h$]”h&]”uh1jhhýh²hh³hÇh´Nubj)”}”(hŒMBIOS/EFI calls :code:`start_kernel` and begins the Linux Early Boot process. ”h]”hÞ)”}”(hŒLBIOS/EFI calls :code:`start_kernel` and begins the Linux Early Boot process.”h]”(hŒBIOS/EFI calls ”…””}”(hjfh²hh³Nh´NubhŒliteral”“”)”}”(hŒ:code:`start_kernel`”h]”hŒ start_kernel”…””}”(hjph²hh³Nh´Nubah}”(h]”h ]”Œcode”ah"]”h$]”h&]”Œlanguage”huh1jnhjfubhŒ) and begins the Linux Early Boot process.”…””}”(hjfh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khjbubah}”(h]”h ]”h"]”h$]”h&]”uh1jhhýh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hûh³hÇh´K hhÊh²hubhÞ)”}”(hŒ°Much of what this section is concerned with is ACPI Table production and static memory map configuration. More detail on these tables can be found at :doc:`ACPI Tables `.”h]”(hŒ–Much of what this section is concerned with is ACPI Table production and static memory map configuration. More detail on these tables can be found at ”…””}”(hj˜h²hh³Nh´Nubh)”}”(hŒ:doc:`ACPI Tables `”h]”hŒinline”“”)”}”(hj¢h]”hŒ ACPI Tables”…””}”(hj¦h²hh³Nh´Nubah}”(h]”h ]”(Œxref”Œstd”Œstd-doc”eh"]”h$]”h&]”uh1j¤hj ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”Œ$driver-api/cxl/platform/bios-and-efi”Œ refdomain”j±Œreftype”Œdoc”Œ refexplicit”ˆŒrefwarn”ˆŒ reftarget”Œacpi”uh1hh³hÇh´Khj˜ubhŒ.”…””}”(hj˜h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhhÊh²hubhŒnote”“”)”}”(hŒãPlatform Vendors should read carefully, as this sections has recommendations on physical memory region size and alignment, memory holes, HDM interleave, and what linux expects of HDM decoders trying to work with these features.”h]”hÞ)”}”(hŒãPlatform Vendors should read carefully, as this sections has recommendations on physical memory region size and alignment, memory holes, HDM interleave, and what linux expects of HDM decoders trying to work with these features.”h]”hŒãPlatform Vendors should read carefully, as this sections has recommendations on physical memory region size and alignment, memory holes, HDM interleave, and what linux expects of HDM decoders trying to work with these features.”…””}”(hjÕh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhjÑubah}”(h]”h ]”h"]”h$]”h&]”uh1jÏhhÊh²hh³hÇh´NubhÉ)”}”(hhh]”(hÎ)”}”(hŒ'Linux Expectations of BIOS/EFI Software”h]”hŒ'Linux Expectations of BIOS/EFI Software”…””}”(hjìh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjéh²hh³hÇh´K"ubhÞ)”}”(hX%Linux expects BIOS/EFI software to construct sufficient ACPI tables (such as CEDT, SRAT, HMAT, etc) and platform-specific configurations (such as HPA spaces and host-bridge interleave configurations) to allow the Linux driver to subsequently configure the devices in the CXL fabric at runtime.”h]”hX%Linux expects BIOS/EFI software to construct sufficient ACPI tables (such as CEDT, SRAT, HMAT, etc) and platform-specific configurations (such as HPA spaces and host-bridge interleave configurations) to allow the Linux driver to subsequently configure the devices in the CXL fabric at runtime.”…””}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K#hjéh²hubhÞ)”}”(hŒŒProgramming of HDM decoders and switch ports is not required, and may be deferred to the CXL driver based on admin policy (e.g. udev rules).”h]”hŒŒProgramming of HDM decoders and switch ports is not required, and may be deferred to the CXL driver based on admin policy (e.g. udev rules).”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K(hjéh²hubhÞ)”}”(hŒ×Some platforms may require pre-programming HDM decoders and locking them due to quirks (see: Zen5 address translation), but this is not the normal, "expected" configuration path. This should be avoided if possible.”h]”hŒÛSome platforms may require pre-programming HDM decoders and locking them due to quirks (see: Zen5 address translation), but this is not the normal, “expected†configuration path. This should be avoided if possible.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K+hjéh²hubhÞ)”}”(hX#Some platforms may wish to pre-configure these resources to bring memory up without requiring CXL driver support. These platform vendors should test their configurations with the existing CXL driver and provide driver support for their auto-configurations if features like RAS are required.”h]”hX#Some platforms may wish to pre-configure these resources to bring memory up without requiring CXL driver support. These platform vendors should test their configurations with the existing CXL driver and provide driver support for their auto-configurations if features like RAS are required.”…””}”(hj$h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K/hjéh²hubhÞ)”}”(hŒŽPlatforms requiring boot-time programming and/or locking of CXL fabric components may prevent features, such as device hot-plug, from working.”h]”hŒŽPlatforms requiring boot-time programming and/or locking of CXL fabric components may prevent features, such as device hot-plug, from working.”…””}”(hj2h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K4hjéh²hubeh}”(h]”Œ'linux-expectations-of-bios-efi-software”ah ]”h"]”Œ'linux expectations of bios/efi software”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K"ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ UEFI Settings”h]”hŒ UEFI Settings”…””}”(hjKh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjHh²hh³hÇh´K8ubhÞ)”}”(hŒ¶If your platform supports it, the :code:`uefisettings` command can be used to read/write EFI settings. Changes will be reflected on the next reboot. Kexec is not a sufficient reboot.”h]”(hŒ"If your platform supports it, the ”…””}”(hjYh²hh³Nh´Nubjo)”}”(hŒ:code:`uefisettings`”h]”hŒ uefisettings”…””}”(hjah²hh³Nh´Nubah}”(h]”h ]”j{ah"]”h$]”h&]”Œlanguage”huh1jnhjYubhŒ€ command can be used to read/write EFI settings. Changes will be reflected on the next reboot. Kexec is not a sufficient reboot.”…””}”(hjYh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K9hjHh²hubhÞ)”}”(hX:One notable configuration here is the EFI_MEMORY_SP (Specific Purpose) bit. When this is enabled, this bit tells linux to defer management of a memory region to a driver (in this case, the CXL driver). Otherwise, the memory is treated as "normal memory", and is exposed to the page allocator during :code:`__init`.”h]”(hX/One notable configuration here is the EFI_MEMORY_SP (Specific Purpose) bit. When this is enabled, this bit tells linux to defer management of a memory region to a driver (in this case, the CXL driver). Otherwise, the memory is treated as “normal memoryâ€, and is exposed to the page allocator during ”…””}”(hjzh²hh³Nh´Nubjo)”}”(hŒ:code:`__init`”h]”hŒ__init”…””}”(hj‚h²hh³Nh´Nubah}”(h]”h ]”j{ah"]”h$]”h&]”Œlanguage”huh1jnhjzubhŒ.”…””}”(hjzh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K=hjHh²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒuefisettings examples”h]”hŒuefisettings examples”…””}”(hjžh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj›h²hh³hÇh´KDubhÞ)”}”(hŒ :code:`uefisettings identify` ::”h]”jo)”}”(hŒ:code:`uefisettings identify`”h]”hŒuefisettings identify”…””}”(hj°h²hh³Nh´Nubah}”(h]”h ]”j{ah"]”h$]”h&]”Œlanguage”huh1jnhj¬ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KFhj›h²hubhŒ literal_block”“”)”}”(hŒ•uefisettings identify bios_vendor: xxx bios_version: xxx bios_release: xxx bios_date: xxx product_name: xxx product_family: xxx product_version: xxx”h]”hŒ•uefisettings identify bios_vendor: xxx bios_version: xxx bios_release: xxx bios_date: xxx product_name: xxx product_family: xxx product_version: xxx”…””}”hjÇsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jÅh³hÇh´KHhj›h²hubhÞ)”}”(hŒœOn some AMD platforms, the :code:`EFI_MEMORY_SP` bit is set via the :code:`CXL Memory Attribute` field. This may be called something else on your platform.”h]”(hŒOn some AMD platforms, the ”…””}”(hjÕh²hh³Nh´Nubjo)”}”(hŒ:code:`EFI_MEMORY_SP`”h]”hŒ EFI_MEMORY_SP”…””}”(hjÝh²hh³Nh´Nubah}”(h]”h ]”j{ah"]”h$]”h&]”Œlanguage”huh1jnhjÕubhŒ bit is set via the ”…””}”(hjÕh²hh³Nh´Nubjo)”}”(hŒ:code:`CXL Memory Attribute`”h]”hŒCXL Memory Attribute”…””}”(hjðh²hh³Nh´Nubah}”(h]”h ]”j{ah"]”h$]”h&]”Œlanguage”huh1jnhjÕubhŒ< field. This may be called something else on your platform.”…””}”(hjÕh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KRhj›h²hubhÞ)”}”(hŒ2:code:`uefisettings get "CXL Memory Attribute"` ::”h]”jo)”}”(hŒ/:code:`uefisettings get "CXL Memory Attribute"`”h]”hŒ'uefisettings get "CXL Memory Attribute"”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”j{ah"]”h$]”h&]”Œlanguage”huh1jnhj ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KUhj›h²hubjÆ)”}”(hŒiselector: xxx ... question: Question { name: "CXL Memory Attribute", answer: "Enabled", ... }”h]”hŒiselector: xxx ... question: Question { name: "CXL Memory Attribute", answer: "Enabled", ... }”…””}”hj"sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jÅh³hÇh´KWhj›h²hubeh}”(h]”Œuefisettings-examples”ah ]”h"]”Œuefisettings examples”ah$]”h&]”uh1hÈhjHh²hh³hÇh´KDubeh}”(h]”Œ uefi-settings”ah ]”h"]”Œ uefi settings”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K8ubhÉ)”}”(hhh]”(hÎ)”}”(hŒPhysical Memory Map”h]”hŒPhysical Memory Map”…””}”(hjCh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj@h²hh³hÇh´K`ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ!Physical Address Region Alignment”h]”hŒ!Physical Address Region Alignment”…””}”(hjTh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjQh²hh³hÇh´KcubhÞ)”}”(hXAs of Linux v6.14, the hotplug memory system requires memory regions to be uniform in size and alignment. While the CXL specification allows for memory regions as small as 256MB, the supported memory block size and alignment for hotplugged memory is architecture-defined.”h]”hXAs of Linux v6.14, the hotplug memory system requires memory regions to be uniform in size and alignment. While the CXL specification allows for memory regions as small as 256MB, the supported memory block size and alignment for hotplugged memory is architecture-defined.”…””}”(hjbh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KehjQh²hubhÞ)”}”(hŒMA Linux memory blocks may be as small as 128MB and increase in powers of two.”h]”hŒMA Linux memory blocks may be as small as 128MB and increase in powers of two.”…””}”(hjph²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KjhjQh²hubhü)”}”(hhh]”(j)”}”(hŒGOn ARM, the default block size and alignment is either 128MB or 256MB. ”h]”hÞ)”}”(hŒFOn ARM, the default block size and alignment is either 128MB or 256MB.”h]”hŒFOn ARM, the default block size and alignment is either 128MB or 256MB.”…””}”(hj…h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Klhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj~h²hh³hÇh´Nubj)”}”(hŒrOn x86, the default block size is 256MB, and increases to 2GB as the capacity of the system increases up to 64GB. ”h]”hÞ)”}”(hŒqOn x86, the default block size is 256MB, and increases to 2GB as the capacity of the system increases up to 64GB.”h]”hŒqOn x86, the default block size is 256MB, and increases to 2GB as the capacity of the system increases up to 64GB.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Knhj™ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj~h²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j–j—uh1hûh³hÇh´KlhjQh²hubhÞ)”}”(hŒßFor best support across versions, platform vendors should place CXL memory at a 2GB aligned base address, and regions should be 2GB aligned. This also helps prevent the creating thousands of memory devices (one per block).”h]”hŒßFor best support across versions, platform vendors should place CXL memory at a 2GB aligned base address, and regions should be 2GB aligned. This also helps prevent the creating thousands of memory devices (one per block).”…””}”(hj·h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KqhjQh²hubeh}”(h]”Œ!physical-address-region-alignment”ah ]”h"]”Œ!physical address region alignment”ah$]”h&]”uh1hÈhj@h²hh³hÇh´KcubhÉ)”}”(hhh]”(hÎ)”}”(hŒ Memory Holes”h]”hŒ Memory Holes”…””}”(hjÐh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjÍh²hh³hÇh´KvubhÞ)”}”(hŒ„Holes in the memory map are tricky. Consider a 4GB device located at base address 0x100000000, but with the following memory map ::”h]”hŒHoles in the memory map are tricky. Consider a 4GB device located at base address 0x100000000, but with the following memory map”…””}”(hjÞh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KxhjÍh²hubjÆ)”}”(hX--------------------- | 0x100000000 | | CXL | | 0x1BFFFFFFF | --------------------- | 0x1C0000000 | | MEMORY HOLE | | 0x1FFFFFFFF | --------------------- | 0x200000000 | | CXL CONT. | | 0x23FFFFFFF | ---------------------”h]”hX--------------------- | 0x100000000 | | CXL | | 0x1BFFFFFFF | --------------------- | 0x1C0000000 | | MEMORY HOLE | | 0x1FFFFFFFF | --------------------- | 0x200000000 | | CXL CONT. | | 0x23FFFFFFF | ---------------------”…””}”hjìsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jÅh³hÇh´K{hjÍh²hubhÞ)”}”(hŒ!There are two issues to consider:”h]”hŒ!There are two issues to consider:”…””}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K‰hjÍh²hubhü)”}”(hhh]”(j)”}”(hŒdecoder programming, and”h]”hÞ)”}”(hj h]”hŒdecoder programming, and”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K‹hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubj)”}”(hŒmemory block alignment. ”h]”hÞ)”}”(hŒmemory block alignment.”h]”hŒmemory block alignment.”…””}”(hj&h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KŒhj"ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j–j—uh1hûh³hÇh´K‹hjÍh²hubhÞ)”}”(hX If your architecture requires 2GB uniform size and aligned memory blocks, the only capacity Linux is capable of mapping (as of v6.14) would be the capacity from `0x100000000-0x180000000`. The remaining capacity will be stranded, as they are not of 2GB aligned length.”h]”(hŒ¡If your architecture requires 2GB uniform size and aligned memory blocks, the only capacity Linux is capable of mapping (as of v6.14) would be the capacity from ”…””}”(hj@h²hh³Nh´NubhŒtitle_reference”“”)”}”(hŒ`0x100000000-0x180000000`”h]”hŒ0x100000000-0x180000000”…””}”(hjJh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jHhj@ubhŒR. The remaining capacity will be stranded, as they are not of 2GB aligned length.”…””}”(hj@h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KŽhjÍh²hubhÞ)”}”(hŒûAssuming your architecture and memory configuration allows 1GB memory blocks, this memory map is supported and this should be presented as multiple CFMWS in the CEDT that describe each side of the memory hole separately - along with matching decoders.”h]”hŒûAssuming your architecture and memory configuration allows 1GB memory blocks, this memory map is supported and this should be presented as multiple CFMWS in the CEDT that describe each side of the memory hole separately - along with matching decoders.”…””}”(hjbh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K“hjÍh²hubhÞ)”}”(hXEMultiple decoders can (and should) be used to manage such a memory hole (see below), but each chunk of a memory hole should be aligned to a reasonable block size (larger alignment is always better). If you intend to have memory holes in the memory map, expect to use one decoder per contiguous chunk of host physical memory.”h]”hXEMultiple decoders can (and should) be used to manage such a memory hole (see below), but each chunk of a memory hole should be aligned to a reasonable block size (larger alignment is always better). If you intend to have memory holes in the memory map, expect to use one decoder per contiguous chunk of host physical memory.”…””}”(hjph²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K˜hjÍh²hubhÞ)”}”(hŒœAs of v6.14, Linux does provide support for memory hotplug of multiple physical memory regions separated by a memory hole described by a single HDM decoder.”h]”hŒœAs of v6.14, Linux does provide support for memory hotplug of multiple physical memory regions separated by a memory hole described by a single HDM decoder.”…””}”(hj~h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KžhjÍh²hubeh}”(h]”Œ memory-holes”ah ]”h"]”h$]”Œ memory holes”ah&]”uh1hÈhj@h²hh³hÇh´KvŒ referenced”Kubeh}”(h]”Œphysical-memory-map”ah ]”h"]”Œphysical memory map”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K`ubhÉ)”}”(hhh]”(hÎ)”}”(hŒDecoder Programming”h]”hŒDecoder Programming”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjh²hh³hÇh´K¤ubhÞ)”}”(hX'If BIOS/EFI intends to program the decoders to be statically configured, there are a few things to consider to avoid major pitfalls that will prevent Linux compatibility. Some of these recommendations are not required "per the specification", but Linux makes no guarantees of support otherwise.”h]”hX+If BIOS/EFI intends to program the decoders to be statically configured, there are a few things to consider to avoid major pitfalls that will prevent Linux compatibility. Some of these recommendations are not required “per the specificationâ€, but Linux makes no guarantees of support otherwise.”…””}”(hj®h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K¥hjh²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒTranslation Point”h]”hŒTranslation Point”…””}”(hj¿h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj¼h²hh³hÇh´K­ubhÞ)”}”(hŒûPer the specification, the only decoders which **TRANSLATE** Host Physical Address (HPA) to Device Physical Address (DPA) are the **Endpoint Decoders**. All other decoders in the fabric are intended to route accesses without translating the addresses.”h]”(hŒ/Per the specification, the only decoders which ”…””}”(hjÍh²hh³Nh´NubhŒstrong”“”)”}”(hŒ **TRANSLATE**”h]”hŒ TRANSLATE”…””}”(hj×h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÍubhŒF Host Physical Address (HPA) to Device Physical Address (DPA) are the ”…””}”(hjÍh²hh³Nh´NubjÖ)”}”(hŒ**Endpoint Decoders**”h]”hŒEndpoint Decoders”…””}”(hjéh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÍubhŒd. All other decoders in the fabric are intended to route accesses without translating the addresses.”…””}”(hjÍh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K®hj¼h²hubhÞ)”}”(hŒ5This is heavily implied by the specification, see: ::”h]”hŒ2This is heavily implied by the specification, see:”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K³hj¼h²hubjÆ)”}”(hŒ½CXL Specification 3.1 8.2.4.20: CXL HDM Decoder Capability Structure - Implementation Note: CXL Host Bridge and Upstream Switch Port Decoder Flow - Implementation Note: Device Decoder Logic”h]”hŒ½CXL Specification 3.1 8.2.4.20: CXL HDM Decoder Capability Structure - Implementation Note: CXL Host Bridge and Upstream Switch Port Decoder Flow - Implementation Note: Device Decoder Logic”…””}”hjsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jÅh³hÇh´Kµhj¼h²hubhÞ)”}”(hŒ©Given this, Linux makes a strong assumption that decoders between CPU and endpoint will all be programmed with addresses ranges that are subsets of their parent decoder.”h]”hŒ©Given this, Linux makes a strong assumption that decoders between CPU and endpoint will all be programmed with addresses ranges that are subsets of their parent decoder.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kºhj¼h²hubhÞ)”}”(hXiDue to some ambiguity in how Architecture, ACPI, PCI, and CXL specifications "hand off" responsibility between domains, some early adopting platforms attempted to do translation at the originating memory controller or host bridge. This configuration requires a platform specific extension to the driver and is not officially endorsed - despite being supported.”h]”hXmDue to some ambiguity in how Architecture, ACPI, PCI, and CXL specifications “hand off†responsibility between domains, some early adopting platforms attempted to do translation at the originating memory controller or host bridge. This configuration requires a platform specific extension to the driver and is not officially endorsed - despite being supported.”…””}”(hj+h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K¾hj¼h²hubhÞ)”}”(hŒ|It is *highly recommended* **NOT** to do this; otherwise, you are on your own to implement driver support for your platform.”h]”(hŒIt is ”…””}”(hj9h²hh³Nh´NubhŒemphasis”“”)”}”(hŒ*highly recommended*”h]”hŒhighly recommended”…””}”(hjCh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jAhj9ubhŒ ”…””}”(hj9h²hh³Nh´NubjÖ)”}”(hŒ**NOT**”h]”hŒNOT”…””}”(hjUh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj9ubhŒZ to do this; otherwise, you are on your own to implement driver support for your platform.”…””}”(hj9h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÄhj¼h²hubeh}”(h]”Œtranslation-point”ah ]”h"]”Œtranslation point”ah$]”h&]”uh1hÈhjh²hh³hÇh´K­ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ(Interleave and Configuration Flexibility”h]”hŒ(Interleave and Configuration Flexibility”…””}”(hjxh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjuh²hh³hÇh´KÈubhÞ)”}”(hŒÓIf providing cross-host-bridge interleave, a CFMWS entry in the :doc:`CEDT ` must be presented with target host-bridges for the interleaved device sets (there may be multiple behind each host bridge).”h]”(hŒ@If providing cross-host-bridge interleave, a CFMWS entry in the ”…””}”(hj†h²hh³Nh´Nubh)”}”(hŒ:doc:`CEDT `”h]”j¥)”}”(hjh]”hŒCEDT”…””}”(hj’h²hh³Nh´Nubah}”(h]”h ]”(j°Œstd”Œstd-doc”eh"]”h$]”h&]”uh1j¤hjŽubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”j½Œ refdomain”jœŒreftype”Œdoc”Œ refexplicit”ˆŒrefwarn”ˆjÃŒ acpi/cedt”uh1hh³hÇh´KÉhj†ubhŒ| must be presented with target host-bridges for the interleaved device sets (there may be multiple behind each host bridge).”…””}”(hj†h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÉhjuh²hubhÞ)”}”(hŒ¶If providing intra-host-bridge interleaving, only 1 CFMWS entry in the CEDT is required for that host bridge - if it covers the entire capacity of the devices behind the host bridge.”h]”hŒ¶If providing intra-host-bridge interleaving, only 1 CFMWS entry in the CEDT is required for that host bridge - if it covers the entire capacity of the devices behind the host bridge.”…””}”(hj¸h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÍhjuh²hubhÞ)”}”(hŒÝIf intending to provide users flexibility in programming decoders beyond the root, you may want to provide multiple CFMWS entries in the CEDT intended for different purposes. For example, you may want to consider adding:”h]”hŒÝIf intending to provide users flexibility in programming decoders beyond the root, you may want to provide multiple CFMWS entries in the CEDT intended for different purposes. For example, you may want to consider adding:”…””}”(hjÆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÑhjuh²hubhŒenumerated_list”“”)”}”(hhh]”(j)”}”(hŒ6A CFMWS entry to cover all interleavable host bridges.”h]”hÞ)”}”(hjÛh]”hŒ6A CFMWS entry to cover all interleavable host bridges.”…””}”(hjÝh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÕhjÙubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjÖh²hh³hÇh´Nubj)”}”(hŒ;A CFMWS entry to cover all devices on a single host bridge.”h]”hÞ)”}”(hjòh]”hŒ;A CFMWS entry to cover all devices on a single host bridge.”…””}”(hjôh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÖhjðubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjÖh²hh³hÇh´Nubj)”}”(hŒ$A CFMWS entry to cover each device. ”h]”hÞ)”}”(hŒ#A CFMWS entry to cover each device.”h]”hŒ#A CFMWS entry to cover each device.”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K×hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjÖh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ)”uh1jÔhjuh²hh³hÇh´KÕubhÞ)”}”(hXA platform may choose to add all of these, or change the mode based on a BIOS setting. For each CFMWS entry, Linux expects descriptions of the described memory regions in the :doc:`SRAT ` to determine the number of NUMA nodes it should reserve during early boot / init.”h]”(hŒ°A platform may choose to add all of these, or change the mode based on a BIOS setting. For each CFMWS entry, Linux expects descriptions of the described memory regions in the ”…””}”(hj*h²hh³Nh´Nubh)”}”(hŒ:doc:`SRAT `”h]”j¥)”}”(hj4h]”hŒSRAT”…””}”(hj6h²hh³Nh´Nubah}”(h]”h ]”(j°Œstd”Œstd-doc”eh"]”h$]”h&]”uh1j¤hj2ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”j½Œ refdomain”j@Œreftype”Œdoc”Œ refexplicit”ˆŒrefwarn”ˆjÃŒ acpi/srat”uh1hh³hÇh´KÙhj*ubhŒR to determine the number of NUMA nodes it should reserve during early boot / init.”…””}”(hj*h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÙhjuh²hubhÞ)”}”(hŒÍAs of v6.14, Linux will create a NUMA node for each CEDT CFMWS entry, even if a matching SRAT entry does not exist; however, this is not guaranteed in the future and such a configuration should be avoided.”h]”hŒÍAs of v6.14, Linux will create a NUMA node for each CEDT CFMWS entry, even if a matching SRAT entry does not exist; however, this is not guaranteed in the future and such a configuration should be avoided.”…””}”(hj\h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÞhjuh²hubeh}”(h]”Œ(interleave-and-configuration-flexibility”ah ]”h"]”Œ(interleave and configuration flexibility”ah$]”h&]”uh1hÈhjh²hh³hÇh´KÈubhÉ)”}”(hhh]”(hÎ)”}”(hŒ Memory Holes”h]”hŒ Memory Holes”…””}”(hjuh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjrh²hh³hÇh´KãubhÞ)”}”(hXIf your platform includes memory holes interspersed between your CXL memory, it is recommended to utilize multiple decoders to cover these regions of memory, rather than try to program the decoders to accept the entire range and expect Linux to manage the overlap.”h]”hXIf your platform includes memory holes interspersed between your CXL memory, it is recommended to utilize multiple decoders to cover these regions of memory, rather than try to program the decoders to accept the entire range and expect Linux to manage the overlap.”…””}”(hjƒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kähjrh²hubhÞ)”}”(hŒ8For example, consider the Memory Hole described above ::”h]”hŒ5For example, consider the Memory Hole described above”…””}”(hj‘h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kéhjrh²hubjÆ)”}”(hX--------------------- | 0x100000000 | | CXL | | 0x1BFFFFFFF | --------------------- | 0x1C0000000 | | MEMORY HOLE | | 0x1FFFFFFFF | --------------------- | 0x200000000 | | CXL CONT. | | 0x23FFFFFFF | ---------------------”h]”hX--------------------- | 0x100000000 | | CXL | | 0x1BFFFFFFF | --------------------- | 0x1C0000000 | | MEMORY HOLE | | 0x1FFFFFFFF | --------------------- | 0x200000000 | | CXL CONT. | | 0x23FFFFFFF | ---------------------”…””}”hjŸsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jÅh³hÇh´Këhjrh²hubhÞ)”}”(hŒˆAssuming this is provided by a single device attached directly to a host bridge, Linux would expect the following decoder programming ::”h]”hŒ…Assuming this is provided by a single device attached directly to a host bridge, Linux would expect the following decoder programming”…””}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kùhjrh²hubjÆ)”}”(hX;----------------------- ----------------------- | root-decoder-0 | | root-decoder-1 | | base: 0x100000000 | | base: 0x200000000 | | size: 0xC0000000 | | size: 0x40000000 | ----------------------- ----------------------- | | ----------------------- ----------------------- | HB-decoder-0 | | HB-decoder-1 | | base: 0x100000000 | | base: 0x200000000 | | size: 0xC0000000 | | size: 0x40000000 | ----------------------- ----------------------- | | ----------------------- ----------------------- | ep-decoder-0 | | ep-decoder-1 | | base: 0x100000000 | | base: 0x200000000 | | size: 0xC0000000 | | size: 0x40000000 | ----------------------- -----------------------”h]”hX;----------------------- ----------------------- | root-decoder-0 | | root-decoder-1 | | base: 0x100000000 | | base: 0x200000000 | | size: 0xC0000000 | | size: 0x40000000 | ----------------------- ----------------------- | | ----------------------- ----------------------- | HB-decoder-0 | | HB-decoder-1 | | base: 0x100000000 | | base: 0x200000000 | | size: 0xC0000000 | | size: 0x40000000 | ----------------------- ----------------------- | | ----------------------- ----------------------- | ep-decoder-0 | | ep-decoder-1 | | base: 0x100000000 | | base: 0x200000000 | | size: 0xC0000000 | | size: 0x40000000 | ----------------------- -----------------------”…””}”hj»sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1jÅh³hÇh´Kühjrh²hubhÞ)”}”(hŒLWith a CEDT configuration with two CFMWS describing the above root decoders.”h]”hŒLWith a CEDT configuration with two CFMWS describing the above root decoders.”…””}”(hjÉh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Mhjrh²hubhÞ)”}”(hŒGLinux makes no guarantee of support for strange memory hole situations.”h]”hŒGLinux makes no guarantee of support for strange memory hole situations.”…””}”(hj×h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Mhjrh²hubeh}”(h]”Œid1”ah ]”h"]”h$]”j’ah&]”uh1hÈhjh²hh³hÇh´Kãj”KubhÉ)”}”(hhh]”(hÎ)”}”(hŒMulti-Media Devices”h]”hŒMulti-Media Devices”…””}”(hjïh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjìh²hh³hÇh´MubhÞ)”}”(hŒÆThe CFMWS field of the CEDT has special restriction bits which describe whether the described memory region allows volatile or persistent memory (or both). If the platform intends to support either:”h]”hŒÆThe CFMWS field of the CEDT has special restriction bits which describe whether the described memory region allows volatile or persistent memory (or both). If the platform intends to support either:”…””}”(hjýh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Mhjìh²hubjÕ)”}”(hhh]”(j)”}”(hŒ A device with multiple media, or”h]”hÞ)”}”(hjh]”hŒ A device with multiple media, or”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Mhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÇh´Nubj)”}”(hŒ2Using a persistent memory device as normal memory ”h]”hÞ)”}”(hŒ1Using a persistent memory device as normal memory”h]”hŒ1Using a persistent memory device as normal memory”…””}”(hj)h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Mhj%ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj h²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j%j&j'hj(j)uh1jÔhjìh²hh³hÇh´MubhÞ)”}”(hŒíA platform may wish to create multiple CEDT CFMWS entries to describe the same memory, with the intent of allowing the end user flexibility in how that memory is configured. Linux does not presently have strong requirements in this area.”h]”hŒíA platform may wish to create multiple CEDT CFMWS entries to describe the same memory, with the intent of allowing the end user flexibility in how that memory is configured. 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