€•Z…      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”ŒP/translations/zh_CN/driver-api/cxl/linux/example-configurations/multi-interleave”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”ŒP/translations/zh_TW/driver-api/cxl/linux/example-configurations/multi-interleave”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”ŒP/translations/it_IT/driver-api/cxl/linux/example-configurations/multi-interleave”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”ŒP/translations/ja_JP/driver-api/cxl/linux/example-configurations/multi-interleave”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”ŒP/translations/ko_KR/driver-api/cxl/linux/example-configurations/multi-interleave”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”ŒP/translations/sp_SP/driver-api/cxl/linux/example-configurations/multi-interleave”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒj/var/lib/git/docbuild/linux/Documentation/driver-api/cxl/linux/example-configurations/multi-interleave.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒMulti-Level Interleave”h]”hŒMulti-Level Interleave”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hŒGThis cxl-cli configuration dump shows the following host configuration:”h]”hŒGThis cxl-cli configuration dump shows the following host configuration:”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ(A single socket system with one CXL root”h]”hÊ)”}”(hhâh]”hŒ(A single socket system with one CXL root”…””}”(hhähžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhàubah}”(h]”h ]”h"]”h$]”h&]”uh1hÞhhÛhžhhŸh³h Nubhß)”}”(hŒ&CXL Root has Four (4) CXL Host Bridges”h]”hÊ)”}”(hhùh]”hŒ&CXL Root has Four (4) CXL Host Bridges”…””}”(hhûhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K	hh÷ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÞhhÛhžhhŸh³h Nubhß)”}”(hŒCTwo CXL Host Bridges have a two CXL Memory Expanders Attached each.”h]”hÊ)”}”(hj  h]”hŒCTwo CXL Host Bridges have a two CXL Memory Expanders Attached each.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K
hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÞhhÛhžhhŸh³h Nubhß)”}”(hŒEThe CXL root is configured to interleave across the two host bridges.”h]”hÊ)”}”(hj'  h]”hŒEThe CXL root is configured to interleave across the two host bridges.”…””}”(hj)  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj%  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÞhhÛhžhhŸh³h Nubhß)”}”(hŒBEach host bridge with expanders interleaves across two endpoints.
”h]”hÊ)”}”(hŒAEach host bridge with expanders interleaves across two endpoints.”h]”hŒAEach host bridge with expanders interleaves across two endpoints.”…””}”(hj@  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj<  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÞhhÛhžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hÙhŸh³h Khh¶hžhubhÊ)”}”(hŒ‰This output is generated by :code:`cxl list -v` and describes the relationships
between objects exposed in :code:`/sys/bus/cxl/devices/`.”h]”(hŒThis output is generated by ”…””}”(hj\  hžhhŸNh NubhŒliteral”“”)”}”(hŒ:code:`cxl list -v`”h]”hŒcxl list -v”…””}”(hjf  hžhhŸNh Nubah}”(h]”h ]”Œcode”ah"]”h$]”h&]”Œlanguage”huh1jd  hj\  ubhŒ< and describes the relationships
between objects exposed in ”…””}”(hj\  hžhhŸNh Nubje  )”}”(hŒ:code:`/sys/bus/cxl/devices/`”h]”hŒ/sys/bus/cxl/devices/”…””}”(hjz  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj\  ubhŒ.”…””}”(hj\  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒliteral_block”“”)”}”(hXA  [
  {
      "bus":"root0",
      "provider":"ACPI.CXL",
      "nr_dports":4,
      "dports":[
          {
              "dport":"pci0000:00",
              "alias":"ACPI0016:01",
              "id":0
          },
          {
              "dport":"pci0000:a8",
              "alias":"ACPI0016:02",
              "id":4
          },
          {
              "dport":"pci0000:2a",
              "alias":"ACPI0016:03",
              "id":1
          },
          {
              "dport":"pci0000:d2",
              "alias":"ACPI0016:00",
              "id":5
          }
      ],”h]”hXA  [
  {
      "bus":"root0",
      "provider":"ACPI.CXL",
      "nr_dports":4,
      "dports":[
          {
              "dport":"pci0000:00",
              "alias":"ACPI0016:01",
              "id":0
          },
          {
              "dport":"pci0000:a8",
              "alias":"ACPI0016:02",
              "id":4
          },
          {
              "dport":"pci0000:2a",
              "alias":"ACPI0016:03",
              "id":1
          },
          {
              "dport":"pci0000:d2",
              "alias":"ACPI0016:00",
              "id":5
          }
      ],”…””}”hj•  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h Khh¶hžhubhÊ)”}”(hŒçThis chunk shows the CXL "bus" (root0) has 4 downstream ports attached to CXL
Host Bridges.  The `Root` can be considered the singular upstream port attached
to the platform's memory controller - which routes memory requests to it.”h]”(hŒeThis chunk shows the CXL â€œbusâ€ (root0) has 4 downstream ports attached to CXL
Host Bridges.  The ”…””}”(hj£  hžhhŸNh NubhŒtitle_reference”“”)”}”(hŒ`Root`”h]”hŒRoot”…””}”(hj­  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j«  hj£  ubhŒ‚ can be considered the singular upstream port attached
to the platformâ€™s memory controller - which routes memory requests to it.”…””}”(hj£  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K/hh¶hžhubhÊ)”}”(hŒ”The `ports:root0` section lays out how each of these downstream ports are
configured.  If a port is not configured (id's 0 and 1), they are omitted.”h]”(hŒThe ”…””}”(hjÅ  hžhhŸNh Nubj¬  )”}”(hŒ`ports:root0`”h]”hŒports:root0”…””}”(hjÍ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j«  hjÅ  ubhŒ… section lays out how each of these downstream ports are
configured.  If a port is not configured (idâ€™s 0 and 1), they are omitted.”…””}”(hjÅ  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K3hh¶hžhubj”  )”}”(hX  "ports:root0":[
    {
        "port":"port1",
        "host":"pci0000:d2",
        "depth":1,
        "nr_dports":3,
        "dports":[
            {
                "dport":"0000:d2:01.1",
                "alias":"device:02",
                "id":0
            },
            {
                "dport":"0000:d2:01.3",
                "alias":"device:05",
                "id":2
            },
            {
                "dport":"0000:d2:07.1",
                "alias":"device:0d",
                "id":113
            }
        ],”h]”hX  "ports:root0":[
    {
        "port":"port1",
        "host":"pci0000:d2",
        "depth":1,
        "nr_dports":3,
        "dports":[
            {
                "dport":"0000:d2:01.1",
                "alias":"device:02",
                "id":0
            },
            {
                "dport":"0000:d2:01.3",
                "alias":"device:05",
                "id":2
            },
            {
                "dport":"0000:d2:07.1",
                "alias":"device:0d",
                "id":113
            }
        ],”…””}”hjå  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h K8hh¶hžhubhÊ)”}”(hŒ×This chunk shows the available downstream ports associated with the CXL Host
Bridge :code:`port1`.  In this case, :code:`port1` has 3 available downstream
ports: :code:`dport0`, :code:`dport2`, and :code:`dport113`.”h]”(hŒTThis chunk shows the available downstream ports associated with the CXL Host
Bridge ”…””}”(hjó  hžhhŸNh Nubje  )”}”(hŒ:code:`port1`”h]”hŒport1”…””}”(hjû  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjó  ubhŒ.  In this case, ”…””}”(hjó  hžhhŸNh Nubje  )”}”(hŒ:code:`port1`”h]”hŒport1”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjó  ubhŒ# has 3 available downstream
ports: ”…””}”(hjó  hžhhŸNh Nubje  )”}”(hŒ:code:`dport0`”h]”hŒdport0”…””}”(hj!  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjó  ubhŒ, ”…””}”(hjó  hžhhŸNh Nubje  )”}”(hŒ:code:`dport2`”h]”hŒdport2”…””}”(hj4  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjó  ubhŒ, and ”…””}”(hjó  hžhhŸNh Nubje  )”}”(hŒ:code:`dport113`”h]”hŒdport113”…””}”(hjG  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjó  ubhŒ.”…””}”(hjó  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KPhh¶hžhubj”  )”}”(hX¯  "endpoints:port1":[
    {
        "endpoint":"endpoint5",
        "host":"mem0",
        "parent_dport":"0000:d2:01.1",
        "depth":2,
        "memdev":{
            "memdev":"mem0",
            "ram_size":137438953472,
            "serial":0,
            "numa_node":0,
            "host":"0000:d3:00.0"
        },
        "decoders:endpoint5":[
            {
                "decoder":"decoder5.0",
                "resource":825975898112,
                "size":549755813888,
                "interleave_ways":4,
                "interleave_granularity":256,
                "region":"region0",
                "dpa_resource":0,
                "dpa_size":137438953472,
                "mode":"ram"
            }
        ]
    },
    {
        "endpoint":"endpoint6",
        "host":"mem1",
        "parent_dport":"0000:d2:01.3",
        "depth":2,
        "memdev":{
            "memdev":"mem1",
            "ram_size":137438953472,
            "serial":0,
            "numa_node":0,
            "host":"0000:d3:00.0"
        },
        "decoders:endpoint6":[
            {
                "decoder":"decoder6.0",
                "resource":825975898112,
                "size":549755813888,
                "interleave_ways":4,
                "interleave_granularity":256,
                "region":"region0",
                "dpa_resource":0,
                "dpa_size":137438953472,
                "mode":"ram"
            }
        ]
    }
],”h]”hX¯  "endpoints:port1":[
    {
        "endpoint":"endpoint5",
        "host":"mem0",
        "parent_dport":"0000:d2:01.1",
        "depth":2,
        "memdev":{
            "memdev":"mem0",
            "ram_size":137438953472,
            "serial":0,
            "numa_node":0,
            "host":"0000:d3:00.0"
        },
        "decoders:endpoint5":[
            {
                "decoder":"decoder5.0",
                "resource":825975898112,
                "size":549755813888,
                "interleave_ways":4,
                "interleave_granularity":256,
                "region":"region0",
                "dpa_resource":0,
                "dpa_size":137438953472,
                "mode":"ram"
            }
        ]
    },
    {
        "endpoint":"endpoint6",
        "host":"mem1",
        "parent_dport":"0000:d2:01.3",
        "depth":2,
        "memdev":{
            "memdev":"mem1",
            "ram_size":137438953472,
            "serial":0,
            "numa_node":0,
            "host":"0000:d3:00.0"
        },
        "decoders:endpoint6":[
            {
                "decoder":"decoder6.0",
                "resource":825975898112,
                "size":549755813888,
                "interleave_ways":4,
                "interleave_granularity":256,
                "region":"region0",
                "dpa_resource":0,
                "dpa_size":137438953472,
                "mode":"ram"
            }
        ]
    }
],”…””}”hj`  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h KVhh¶hžhubhÊ)”}”(hŒIThis chunk shows the endpoints attached to the host bridge :code:`port1`.”h]”(hŒ;This chunk shows the endpoints attached to the host bridge ”…””}”(hjn  hžhhŸNh Nubje  )”}”(hŒ:code:`port1`”h]”hŒport1”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjn  ubhŒ.”…””}”(hjn  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒ—:code:`endpoint5` contains a single configured decoder :code:`decoder5.0`
which has the same interleave configuration as :code:`region0` (shown later).”h]”(je  )”}”(hŒ:code:`endpoint5`”h]”hŒ	endpoint5”…””}”(hj“  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj  ubhŒ& contains a single configured decoder ”…””}”(hj  hžhhŸNh Nubje  )”}”(hŒ:code:`decoder5.0`”h]”hŒ
decoder5.0”…””}”(hj¦  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj  ubhŒ0
which has the same interleave configuration as ”…””}”(hj  hžhhŸNh Nubje  )”}”(hŒ:code:`region0`”h]”hŒregion0”…””}”(hj¹  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj  ubhŒ (shown later).”…””}”(hj  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒ—:code:`endpoint6` contains a single configured decoder :code:`decoder5.0`
which has the same interleave configuration as :code:`region0` (shown later).”h]”(je  )”}”(hŒ:code:`endpoint6`”h]”hŒ	endpoint6”…””}”(hjÖ  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjÒ  ubhŒ& contains a single configured decoder ”…””}”(hjÒ  hžhhŸNh Nubje  )”}”(hŒ:code:`decoder5.0`”h]”hŒ
decoder5.0”…””}”(hjé  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjÒ  ubhŒ0
which has the same interleave configuration as ”…””}”(hjÒ  hžhhŸNh Nubje  )”}”(hŒ:code:`region0`”h]”hŒregion0”…””}”(hjü  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjÒ  ubhŒ (shown later).”…””}”(hjÒ  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K’hh¶hžhubhÊ)”}”(hŒ7Next we have the decoders belonging to the host bridge:”h]”hŒ7Next we have the decoders belonging to the host bridge:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K•hh¶hžhubj”  )”}”(hX¹      "decoders:port1":[
        {
            "decoder":"decoder1.0",
            "resource":825975898112,
            "size":549755813888,
            "interleave_ways":2,
            "interleave_granularity":512,
            "region":"region0",
            "nr_targets":2,
            "targets":[
                {
                    "target":"0000:d2:01.1",
                    "alias":"device:02",
                    "position":0,
                    "id":0
                },
                {
                    "target":"0000:d2:01.3",
                    "alias":"device:05",
                    "position":2,
                    "id":0
                }
            ]
        }
    ]
},”h]”hX¹      "decoders:port1":[
        {
            "decoder":"decoder1.0",
            "resource":825975898112,
            "size":549755813888,
            "interleave_ways":2,
            "interleave_granularity":512,
            "region":"region0",
            "nr_targets":2,
            "targets":[
                {
                    "target":"0000:d2:01.1",
                    "alias":"device:02",
                    "position":0,
                    "id":0
                },
                {
                    "target":"0000:d2:01.3",
                    "alias":"device:05",
                    "position":2,
                    "id":0
                }
            ]
        }
    ]
},”…””}”hj#  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h K™hh¶hžhubhÊ)”}”(hŒÆHost Bridge :code:`port1` has a single decoder (:code:`decoder1.0`), whose
targets are :code:`dport0` and :code:`dport2` - which are attached to
:code:`endpoint5` and :code:`endpoint6` respectively.”h]”(hŒHost Bridge ”…””}”(hj1  hžhhŸNh Nubje  )”}”(hŒ:code:`port1`”h]”hŒport1”…””}”(hj9  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj1  ubhŒ has a single decoder (”…””}”(hj1  hžhhŸNh Nubje  )”}”(hŒ:code:`decoder1.0`”h]”hŒ
decoder1.0”…””}”(hjL  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj1  ubhŒ), whose
targets are ”…””}”(hj1  hžhhŸNh Nubje  )”}”(hŒ:code:`dport0`”h]”hŒdport0”…””}”(hj_  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj1  ubhŒ and ”…””}”(hj1  hžhhŸNh Nubje  )”}”(hŒ:code:`dport2`”h]”hŒdport2”…””}”(hjr  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj1  ubhŒ - which are attached to
”…””}”(hj1  hžhhŸNh Nubje  )”}”(hŒ:code:`endpoint5`”h]”hŒ	endpoint5”…””}”(hj…  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj1  ubhŒ and ”…””}”hj1  sbje  )”}”(hŒ:code:`endpoint6`”h]”hŒ	endpoint6”…””}”(hj˜  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj1  ubhŒ respectively.”…””}”(hj1  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K´hh¶hžhubhÊ)”}”(hŒ†The following chunk shows a similar configuration for Host Bridge :code:`port3`,
the second host bridge with a memory device attached.”h]”(hŒBThe following chunk shows a similar configuration for Host Bridge ”…””}”(hj±  hžhhŸNh Nubje  )”}”(hŒ:code:`port3`”h]”hŒport3”…””}”(hj¹  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hj±  ubhŒ7,
the second host bridge with a memory device attached.”…””}”(hj±  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¸hh¶hžhubj”  )”}”(hX
  {
    "port":"port3",
    "host":"pci0000:a8",
    "depth":1,
    "nr_dports":1,
    "dports":[
        {
            "dport":"0000:a8:01.1",
            "alias":"device:c3",
            "id":0
        },
        {
            "dport":"0000:a8:01.3",
            "alias":"device:c5",
            "id":0
        }
    ],
    "endpoints:port3":[
        {
            "endpoint":"endpoint7",
            "host":"mem2",
            "parent_dport":"0000:a8:01.1",
            "depth":2,
            "memdev":{
                "memdev":"mem2",
                "ram_size":137438953472,
                "serial":0,
                "numa_node":0,
                "host":"0000:a9:00.0"
            },
            "decoders:endpoint7":[
                {
                    "decoder":"decoder7.0",
                    "resource":825975898112,
                    "size":549755813888,
                    "interleave_ways":4,
                    "interleave_granularity":256,
                    "region":"region0",
                    "dpa_resource":0,
                    "dpa_size":137438953472,
                    "mode":"ram"
                }
            ]
        },
        {
            "endpoint":"endpoint8",
            "host":"mem3",
            "parent_dport":"0000:a8:01.3",
            "depth":2,
            "memdev":{
                "memdev":"mem3",
                "ram_size":137438953472,
                "serial":0,
                "numa_node":0,
                "host":"0000:a9:00.0"
            },
            "decoders:endpoint8":[
                {
                    "decoder":"decoder8.0",
                    "resource":825975898112,
                    "size":549755813888,
                    "interleave_ways":4,
                    "interleave_granularity":256,
                    "region":"region0",
                    "dpa_resource":0,
                    "dpa_size":137438953472,
                    "mode":"ram"
                }
            ]
        }
    ],
    "decoders:port3":[
        {
            "decoder":"decoder3.0",
            "resource":825975898112,
            "size":549755813888,
            "interleave_ways":2,
            "interleave_granularity":512,
            "region":"region0",
            "nr_targets":1,
            "targets":[
                {
                    "target":"0000:a8:01.1",
                    "alias":"device:c3",
                    "position":1,
                    "id":0
                },
                {
                    "target":"0000:a8:01.3",
                    "alias":"device:c5",
                    "position":3,
                    "id":0
                }
            ]
        }
    ]
},”h]”hX
  {
    "port":"port3",
    "host":"pci0000:a8",
    "depth":1,
    "nr_dports":1,
    "dports":[
        {
            "dport":"0000:a8:01.1",
            "alias":"device:c3",
            "id":0
        },
        {
            "dport":"0000:a8:01.3",
            "alias":"device:c5",
            "id":0
        }
    ],
    "endpoints:port3":[
        {
            "endpoint":"endpoint7",
            "host":"mem2",
            "parent_dport":"0000:a8:01.1",
            "depth":2,
            "memdev":{
                "memdev":"mem2",
                "ram_size":137438953472,
                "serial":0,
                "numa_node":0,
                "host":"0000:a9:00.0"
            },
            "decoders:endpoint7":[
                {
                    "decoder":"decoder7.0",
                    "resource":825975898112,
                    "size":549755813888,
                    "interleave_ways":4,
                    "interleave_granularity":256,
                    "region":"region0",
                    "dpa_resource":0,
                    "dpa_size":137438953472,
                    "mode":"ram"
                }
            ]
        },
        {
            "endpoint":"endpoint8",
            "host":"mem3",
            "parent_dport":"0000:a8:01.3",
            "depth":2,
            "memdev":{
                "memdev":"mem3",
                "ram_size":137438953472,
                "serial":0,
                "numa_node":0,
                "host":"0000:a9:00.0"
            },
            "decoders:endpoint8":[
                {
                    "decoder":"decoder8.0",
                    "resource":825975898112,
                    "size":549755813888,
                    "interleave_ways":4,
                    "interleave_granularity":256,
                    "region":"region0",
                    "dpa_resource":0,
                    "dpa_size":137438953472,
                    "mode":"ram"
                }
            ]
        }
    ],
    "decoders:port3":[
        {
            "decoder":"decoder3.0",
            "resource":825975898112,
            "size":549755813888,
            "interleave_ways":2,
            "interleave_granularity":512,
            "region":"region0",
            "nr_targets":1,
            "targets":[
                {
                    "target":"0000:a8:01.1",
                    "alias":"device:c3",
                    "position":1,
                    "id":0
                },
                {
                    "target":"0000:a8:01.3",
                    "alias":"device:c5",
                    "position":3,
                    "id":0
                }
            ]
        }
    ]
},”…””}”hjÒ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h K½hh¶hžhubhÊ)”}”(hŒIThe next chunk shows the two CXL host bridges without attached endpoints.”h]”hŒIThe next chunk shows the two CXL host bridges without attached endpoints.”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M hh¶hžhubj”  )”}”(hX–      {
        "port":"port2",
        "host":"pci0000:00",
        "depth":1,
        "nr_dports":2,
        "dports":[
            {
                "dport":"0000:00:01.3",
                "alias":"device:55",
                "id":2
            },
            {
                "dport":"0000:00:07.1",
                "alias":"device:5d",
                "id":113
            }
        ]
    },
    {
        "port":"port4",
        "host":"pci0000:2a",
        "depth":1,
        "nr_dports":1,
        "dports":[
            {
                "dport":"0000:2a:01.1",
                "alias":"device:d0",
                "id":0
            }
        ]
    }
],”h]”hX–      {
        "port":"port2",
        "host":"pci0000:00",
        "depth":1,
        "nr_dports":2,
        "dports":[
            {
                "dport":"0000:00:01.3",
                "alias":"device:55",
                "id":2
            },
            {
                "dport":"0000:00:07.1",
                "alias":"device:5d",
                "id":113
            }
        ]
    },
    {
        "port":"port4",
        "host":"pci0000:2a",
        "depth":1,
        "nr_dports":1,
        "dports":[
            {
                "dport":"0000:2a:01.1",
                "alias":"device:d0",
                "id":0
            }
        ]
    }
],”…””}”hjî  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h M$hh¶hžhubhÊ)”}”(hŒÅNext we have the `Root Decoders` belonging to :code:`root0`.  This root decoder
applies the interleave across the downstream ports :code:`port1` and
:code:`port3` - with a granularity of 256 bytes.”h]”(hŒNext we have the ”…””}”(hjü  hžhhŸNh Nubj¬  )”}”(hŒ`Root Decoders`”h]”hŒRoot Decoders”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j«  hjü  ubhŒ belonging to ”…””}”(hjü  hžhhŸNh Nubje  )”}”(hŒ:code:`root0`”h]”hŒroot0”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjü  ubhŒH.  This root decoder
applies the interleave across the downstream ports ”…””}”(hjü  hžhhŸNh Nubje  )”}”(hŒ:code:`port1`”h]”hŒport1”…””}”(hj)  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjü  ubhŒ and
”…””}”(hjü  hžhhŸNh Nubje  )”}”(hŒ:code:`port3`”h]”hŒport3”…””}”(hj<  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjü  ubhŒ# - with a granularity of 256 bytes.”…””}”(hjü  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MEhh¶hžhubhÊ)”}”(hŒLThis information is generated by the CXL driver reading the ACPI CEDT CMFWS.”h]”hŒLThis information is generated by the CXL driver reading the ACPI CEDT CMFWS.”…””}”(hjU  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MIhh¶hžhubj”  )”}”(hXr  "decoders:root0":[
    {
        "decoder":"decoder0.0",
        "resource":825975898112,
        "size":549755813888,
        "interleave_ways":2,
        "interleave_granularity":256,
        "max_available_extent":0,
        "volatile_capable":true,
        "nr_targets":2,
        "targets":[
            {
                "target":"pci0000:a8",
                "alias":"ACPI0016:02",
                "position":1,
                "id":4
            },
            {
                "target":"pci0000:d2",
                "alias":"ACPI0016:00",
                "position":0,
                "id":5
            }
        ],”h]”hXr  "decoders:root0":[
    {
        "decoder":"decoder0.0",
        "resource":825975898112,
        "size":549755813888,
        "interleave_ways":2,
        "interleave_granularity":256,
        "max_available_extent":0,
        "volatile_capable":true,
        "nr_targets":2,
        "targets":[
            {
                "target":"pci0000:a8",
                "alias":"ACPI0016:02",
                "position":1,
                "id":4
            },
            {
                "target":"pci0000:d2",
                "alias":"ACPI0016:00",
                "position":0,
                "id":5
            }
        ],”…””}”hjc  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h MMhh¶hžhubhÊ)”}”(hX  Finally we have the `Memory Region` associated with the `Root Decoder`
:code:`decoder0.0`.  This region describes the overall interleave configuration
of the interleave set.  So we see there are a total of :code:`4` interleave
targets across 4 endpoint decoders.”h]”(hŒFinally we have the ”…””}”(hjq  hžhhŸNh Nubj¬  )”}”(hŒ`Memory Region`”h]”hŒMemory Region”…””}”(hjy  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j«  hjq  ubhŒ associated with the ”…””}”(hjq  hžhhŸNh Nubj¬  )”}”(hŒ`Root Decoder`”h]”hŒRoot Decoder”…””}”(hj‹  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j«  hjq  ubhŒ
”…””}”(hjq  hžhhŸNh Nubje  )”}”(hŒ:code:`decoder0.0`”h]”hŒ
decoder0.0”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjq  ubhŒu.  This region describes the overall interleave configuration
of the interleave set.  So we see there are a total of ”…””}”(hjq  hžhhŸNh Nubje  )”}”(hŒ	:code:`4`”h]”hŒ4”…””}”(hj°  hžhhŸNh Nubah}”(h]”h ]”jq  ah"]”h$]”h&]”Œlanguage”huh1jd  hjq  ubhŒ/ interleave
targets across 4 endpoint decoders.”…””}”(hjq  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mfhh¶hžhubj”  )”}”(hX	                "regions:decoder0.0":[
                  {
                      "region":"region0",
                      "resource":825975898112,
                      "size":549755813888,
                      "type":"ram",
                      "interleave_ways":4,
                      "interleave_granularity":256,
                      "decode_state":"commit",
                      "mappings":[
                          {
                              "position":3,
                              "memdev":"mem3",
                              "decoder":"decoder8.0"
                          },
                          {
                              "position":2,
                              "memdev":"mem1",
                              "decoder":"decoder6.0"
                          }
                          {
                              "position":1,
                              "memdev":"mem2",
                              "decoder":"decoder7.0"
                          },
                          {
                              "position":0,
                              "memdev":"mem0",
                              "decoder":"decoder5.0"
                          }
                      ]
                  }
              ]
          }
      ]
  }
]”h]”hX	                "regions:decoder0.0":[
                  {
                      "region":"region0",
                      "resource":825975898112,
                      "size":549755813888,
                      "type":"ram",
                      "interleave_ways":4,
                      "interleave_granularity":256,
                      "decode_state":"commit",
                      "mappings":[
                          {
                              "position":3,
                              "memdev":"mem3",
                              "decoder":"decoder8.0"
                          },
                          {
                              "position":2,
                              "memdev":"mem1",
                              "decoder":"decoder6.0"
                          }
                          {
                              "position":1,
                              "memdev":"mem2",
                              "decoder":"decoder7.0"
                          },
                          {
                              "position":0,
                              "memdev":"mem0",
                              "decoder":"decoder5.0"
                          }
                      ]
                  }
              ]
          }
      ]
  }
]”…””}”hjÉ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h Mmhh¶hžhubeh}”(h]”Œmulti-level-interleave”ah ]”h"]”Œmulti-level interleave”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”jÜ  jÙ  sŒ	nametypes”}”jÜ  ‰sh}”jÙ  h¶sŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.