€•t      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ)/translations/zh_CN/core-api/this_cpu_ops”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/zh_TW/core-api/this_cpu_ops”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/it_IT/core-api/this_cpu_ops”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/ja_JP/core-api/this_cpu_ops”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/ko_KR/core-api/this_cpu_ops”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/sp_SP/core-api/this_cpu_ops”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒthis_cpu operations”h]”hŒthis_cpu operations”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒC/var/lib/git/docbuild/linux/Documentation/core-api/this_cpu_ops.rst”h KubhŒ
field_list”“”)”}”(hhh]”(hŒfield”“”)”}”(hhh]”(hŒ
field_name”“”)”}”(hŒAuthor”h]”hŒAuthor”…””}”(hhÃhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÁhh¾hŸh¶h K ubhŒ
field_body”“”)”}”(hŒ#Christoph Lameter, August 4th, 2014”h]”hŒ	paragraph”“”)”}”(hhÕh]”hŒ#Christoph Lameter, August 4th, 2014”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhhÓubah}”(h]”h ]”h"]”h$]”h&]”uh1hÑhh¾ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Khh¹hžhubh½)”}”(hhh]”(hÂ)”}”(hŒAuthor”h]”hŒAuthor”…””}”(hhõhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÁhhòhŸh¶h K ubhÒ)”}”(hŒPranith Kumar, Aug 2nd, 2014
”h]”hØ)”}”(hŒPranith Kumar, Aug 2nd, 2014”h]”hŒPranith Kumar, Aug 2nd, 2014”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÑhhòubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Khh¹hžhubeh}”(h]”h ]”h"]”h$]”h&]”uh1h·hh£hžhhŸh¶h KubhØ)”}”(hX%  this_cpu operations are a way of optimizing access to per cpu
variables associated with the *currently* executing processor. This is
done through the use of segment registers (or a dedicated register where
the cpu permanently stored the beginning of the per cpu area for a
specific processor).”h]”(hŒ\this_cpu operations are a way of optimizing access to per cpu
variables associated with the ”…””}”(hj'  hžhhŸNh NubhŒemphasis”“”)”}”(hŒ*currently*”h]”hŒ	currently”…””}”(hj1  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j/  hj'  ubhŒ¾ executing processor. This is
done through the use of segment registers (or a dedicated register where
the cpu permanently stored the beginning of the per cpu area for a
specific processor).”…””}”(hj'  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hŒ¨this_cpu operations add a per cpu variable offset to the processor
specific per cpu base and encode that operation in the instruction
operating on the per cpu variable.”h]”hŒ¨this_cpu operations add a per cpu variable offset to the processor
specific per cpu base and encode that operation in the instruction
operating on the per cpu variable.”…””}”(hjI  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hX&  This means that there are no atomicity issues between the calculation of
the offset and the operation on the data. Therefore it is not
necessary to disable preemption or interrupts to ensure that the
processor is not changed between the calculation of the address and
the operation on the data.”h]”hX&  This means that there are no atomicity issues between the calculation of
the offset and the operation on the data. Therefore it is not
necessary to disable preemption or interrupts to ensure that the
processor is not changed between the calculation of the address and
the operation on the data.”…””}”(hjW  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hXŠ  Read-modify-write operations are of particular interest. Frequently
processors have special lower latency instructions that can operate
without the typical synchronization overhead, but still provide some
sort of relaxed atomicity guarantees. The x86, for example, can execute
RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
lock prefix and the associated latency penalty.”h]”hXŠ  Read-modify-write operations are of particular interest. Frequently
processors have special lower latency instructions that can operate
without the typical synchronization overhead, but still provide some
sort of relaxed atomicity guarantees. The x86, for example, can execute
RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
lock prefix and the associated latency penalty.”…””}”(hje  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hXM  Access to the variable without the lock prefix is not synchronized but
synchronization is not necessary since we are dealing with per cpu
data specific to the currently executing processor. Only the current
processor should be accessing that variable and therefore there are no
concurrency issues with other processors in the system.”h]”hXM  Access to the variable without the lock prefix is not synchronized but
synchronization is not necessary since we are dealing with per cpu
data specific to the currently executing processor. Only the current
processor should be accessing that variable and therefore there are no
concurrency issues with other processors in the system.”…””}”(hjs  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hŒËPlease note that accesses by remote processors to a per cpu area are
exceptional situations and may impact performance and/or correctness
(remote write operations) of local RMW operations via this_cpu_*.”h]”hŒËPlease note that accesses by remote processors to a per cpu area are
exceptional situations and may impact performance and/or correctness
(remote write operations) of local RMW operations via this_cpu_*.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K%hh£hžhubhØ)”}”(hŒPThe main use of the this_cpu operations has been to optimize counter
operations.”h]”hŒPThe main use of the this_cpu operations has been to optimize counter
operations.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K)hh£hžhubhØ)”}”(hŒ£The following this_cpu() operations with implied preemption protection
are defined. These operations can be used without worrying about
preemption and interrupts::”h]”hŒ¢The following this_cpu() operations with implied preemption protection
are defined. These operations can be used without worrying about
preemption and interrupts:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K,hh£hžhubhŒliteral_block”“”)”}”(hXS  this_cpu_read(pcp)
this_cpu_write(pcp, val)
this_cpu_add(pcp, val)
this_cpu_and(pcp, val)
this_cpu_or(pcp, val)
this_cpu_add_return(pcp, val)
this_cpu_xchg(pcp, nval)
this_cpu_cmpxchg(pcp, oval, nval)
this_cpu_sub(pcp, val)
this_cpu_inc(pcp)
this_cpu_dec(pcp)
this_cpu_sub_return(pcp, val)
this_cpu_inc_return(pcp)
this_cpu_dec_return(pcp)”h]”hXS  this_cpu_read(pcp)
this_cpu_write(pcp, val)
this_cpu_add(pcp, val)
this_cpu_and(pcp, val)
this_cpu_or(pcp, val)
this_cpu_add_return(pcp, val)
this_cpu_xchg(pcp, nval)
this_cpu_cmpxchg(pcp, oval, nval)
this_cpu_sub(pcp, val)
this_cpu_inc(pcp)
this_cpu_dec(pcp)
this_cpu_sub_return(pcp, val)
this_cpu_inc_return(pcp)
this_cpu_dec_return(pcp)”…””}”hj­  sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1j«  hŸh¶h K0hh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒ$Inner working of this_cpu operations”h]”hŒ$Inner working of this_cpu operations”…””}”(hjÀ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj½  hžhhŸh¶h KAubhØ)”}”(hX@  On x86 the fs: or the gs: segment registers contain the base of the
per cpu area. It is then possible to simply use the segment override
to relocate a per cpu relative address to the proper per cpu area for
the processor. So the relocation to the per cpu base is encoded in the
instruction via a segment register prefix.”h]”hX@  On x86 the fs: or the gs: segment registers contain the base of the
per cpu area. It is then possible to simply use the segment override
to relocate a per cpu relative address to the proper per cpu area for
the processor. So the relocation to the per cpu base is encoded in the
instruction via a segment register prefix.”…””}”(hjÎ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KChj½  hžhubhØ)”}”(hŒFor example::”h]”hŒFor example:”…””}”(hjÜ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KIhj½  hžhubj¬  )”}”(hŒ5DEFINE_PER_CPU(int, x);
int z;

z = this_cpu_read(x);”h]”hŒ5DEFINE_PER_CPU(int, x);
int z;

z = this_cpu_read(x);”…””}”hjê  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h KKhj½  hžhubhØ)”}”(hŒ!results in a single instruction::”h]”hŒ results in a single instruction:”…””}”(hjø  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KPhj½  hžhubj¬  )”}”(hŒmov ax, gs:[x]”h]”hŒmov ax, gs:[x]”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h KRhj½  hžhubhØ)”}”(hX1  instead of a sequence of calculation of the address and then a fetch
from that address which occurs with the per cpu operations. Before
this_cpu_ops such sequence also required preempt disable/enable to
prevent the kernel from moving the thread to a different processor
while the calculation is performed.”h]”hX1  instead of a sequence of calculation of the address and then a fetch
from that address which occurs with the per cpu operations. Before
this_cpu_ops such sequence also required preempt disable/enable to
prevent the kernel from moving the thread to a different processor
while the calculation is performed.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KThj½  hžhubhØ)”}”(hŒ+Consider the following this_cpu operation::”h]”hŒ*Consider the following this_cpu operation:”…””}”(hj"  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KZhj½  hžhubj¬  )”}”(hŒthis_cpu_inc(x)”h]”hŒthis_cpu_inc(x)”…””}”hj0  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h K\hj½  hžhubhØ)”}”(hŒIThe above results in the following single instruction (no lock prefix!)::”h]”hŒHThe above results in the following single instruction (no lock prefix!):”…””}”(hj>  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K^hj½  hžhubj¬  )”}”(hŒ
inc gs:[x]”h]”hŒ
inc gs:[x]”…””}”hjL  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h K`hj½  hžhubhØ)”}”(hŒNinstead of the following operations required if there is no segment
register::”h]”hŒMinstead of the following operations required if there is no segment
register:”…””}”(hjZ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kbhj½  hžhubj¬  )”}”(hŒOint *y;
int cpu;

cpu = get_cpu();
y = per_cpu_ptr(&x, cpu);
(*y)++;
put_cpu();”h]”hŒOint *y;
int cpu;

cpu = get_cpu();
y = per_cpu_ptr(&x, cpu);
(*y)++;
put_cpu();”…””}”hjh  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h Kehj½  hžhubhØ)”}”(hX,  Note that these operations can only be used on per cpu data that is
reserved for a specific processor. Without disabling preemption in the
surrounding code this_cpu_inc() will only guarantee that one of the
per cpu counters is correctly incremented. However, there is no
guarantee that the OS will not move the process directly before or
after the this_cpu instruction is executed. In general this means that
the value of the individual counters for each processor are
meaningless. The sum of all the per cpu counters is the only value
that is of interest.”h]”hX,  Note that these operations can only be used on per cpu data that is
reserved for a specific processor. Without disabling preemption in the
surrounding code this_cpu_inc() will only guarantee that one of the
per cpu counters is correctly incremented. However, there is no
guarantee that the OS will not move the process directly before or
after the this_cpu instruction is executed. In general this means that
the value of the individual counters for each processor are
meaningless. The sum of all the per cpu counters is the only value
that is of interest.”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kmhj½  hžhubhØ)”}”(hX‚  Per cpu variables are used for performance reasons. Bouncing cache
lines can be avoided if multiple processors concurrently go through
the same code paths.  Since each processor has its own per cpu
variables no concurrent cache line updates take place. The price that
has to be paid for this optimization is the need to add up the per cpu
counters when the value of a counter is needed.”h]”hX‚  Per cpu variables are used for performance reasons. Bouncing cache
lines can be avoided if multiple processors concurrently go through
the same code paths.  Since each processor has its own per cpu
variables no concurrent cache line updates take place. The price that
has to be paid for this optimization is the need to add up the per cpu
counters when the value of a counter is needed.”…””}”(hj„  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kwhj½  hžhubeh}”(h]”Œ$inner-working-of-this-cpu-operations”ah ]”h"]”Œ$inner working of this_cpu operations”ah$]”h&]”uh1h¡hh£hžhhŸh¶h KAubh¢)”}”(hhh]”(h§)”}”(hŒSpecial operations”h]”hŒSpecial operations”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjš  hžhhŸh¶h K€ubj¬  )”}”(hŒy = this_cpu_ptr(&x)”h]”hŒy = this_cpu_ptr(&x)”…””}”hj«  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h K„hjš  hžhubhØ)”}”(hX^  Takes the offset of a per cpu variable (&x !) and returns the address
of the per cpu variable that belongs to the currently executing
processor.  this_cpu_ptr avoids multiple steps that the common
get_cpu/put_cpu sequence requires. No processor number is
available. Instead, the offset of the local per cpu area is simply
added to the per cpu offset.”h]”hX^  Takes the offset of a per cpu variable (&x !) and returns the address
of the per cpu variable that belongs to the currently executing
processor.  this_cpu_ptr avoids multiple steps that the common
get_cpu/put_cpu sequence requires. No processor number is
available. Instead, the offset of the local per cpu area is simply
added to the per cpu offset.”…””}”(hj¹  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K†hjš  hžhubhØ)”}”(hXl  Note that this operation can only be used in code segments where
smp_processor_id() may be used, for example, where preemption has been
disabled. The pointer is then used to access local per cpu data in a
critical section. When preemption is re-enabled this pointer is usually
no longer useful since it may no longer point to per cpu data of the
current processor.”h]”hXl  Note that this operation can only be used in code segments where
smp_processor_id() may be used, for example, where preemption has been
disabled. The pointer is then used to access local per cpu data in a
critical section. When preemption is re-enabled this pointer is usually
no longer useful since it may no longer point to per cpu data of the
current processor.”…””}”(hjÇ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khjš  hžhubhØ)”}”(hXO  The special cases where it makes sense to obtain a per-CPU pointer in
preemptible code are addressed by raw_cpu_ptr(), but such use cases need
to handle cases where two different CPUs are accessing the same per cpu
variable, which might well be that of a third CPU.  These use cases are
typically performance optimizations.  For example, SRCU implements a pair
of counters as a pair of per-CPU variables, and rcu_read_lock_nmisafe()
uses raw_cpu_ptr() to get a pointer to some CPU's counter, and uses
atomic_inc_long() to handle migration between the raw_cpu_ptr() and
the atomic_inc_long().”h]”hXQ  The special cases where it makes sense to obtain a per-CPU pointer in
preemptible code are addressed by raw_cpu_ptr(), but such use cases need
to handle cases where two different CPUs are accessing the same per cpu
variable, which might well be that of a third CPU.  These use cases are
typically performance optimizations.  For example, SRCU implements a pair
of counters as a pair of per-CPU variables, and rcu_read_lock_nmisafe()
uses raw_cpu_ptr() to get a pointer to some CPUâ€™s counter, and uses
atomic_inc_long() to handle migration between the raw_cpu_ptr() and
the atomic_inc_long().”…””}”(hjÕ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K”hjš  hžhubeh}”(h]”Œspecial-operations”ah ]”h"]”Œspecial operations”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K€ubh¢)”}”(hhh]”(h§)”}”(hŒPer cpu variables and offsets”h]”hŒPer cpu variables and offsets”…””}”(hjî  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjë  hžhhŸh¶h KŸubhØ)”}”(hX"  Per cpu variables have *offsets* to the beginning of the per cpu
area. They do not have addresses although they look like that in the
code. Offsets cannot be directly dereferenced. The offset must be
added to a base pointer of a per cpu area of a processor in order to
form a valid address.”h]”(hŒPer cpu variables have ”…””}”(hjü  hžhhŸNh Nubj0  )”}”(hŒ	*offsets*”h]”hŒoffsets”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j/  hjü  ubhX   to the beginning of the per cpu
area. They do not have addresses although they look like that in the
code. Offsets cannot be directly dereferenced. The offset must be
added to a base pointer of a per cpu area of a processor in order to
form a valid address.”…””}”(hjü  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K¡hjë  hžhubhØ)”}”(hŒ“Therefore the use of x or &x outside of the context of per cpu
operations is invalid and will generally be treated like a NULL
pointer dereference.”h]”hŒ“Therefore the use of x or &x outside of the context of per cpu
operations is invalid and will generally be treated like a NULL
pointer dereference.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K§hjë  hžhubj¬  )”}”(hŒDEFINE_PER_CPU(int, x);”h]”hŒDEFINE_PER_CPU(int, x);”…””}”hj*  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h K­hjë  hžhubhØ)”}”(hŒ‚In the context of per cpu operations the above implies that x is a per
cpu variable. Most this_cpu operations take a cpu variable.”h]”hŒ‚In the context of per cpu operations the above implies that x is a per
cpu variable. Most this_cpu operations take a cpu variable.”…””}”(hj8  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K¯hjë  hžhubj¬  )”}”(hŒint __percpu *p = &x;”h]”hŒint __percpu *p = &x;”…””}”hjF  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h K´hjë  hžhubhØ)”}”(hŒ&x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
takes the offset of a per cpu variable which makes this look a bit
strange.”h]”(hŒ&x and hence p is the ”…””}”(hjT  hžhhŸNh Nubj0  )”}”(hŒ*offset*”h]”hŒoffset”…””}”(hj\  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j/  hjT  ubhŒr of a per cpu variable. this_cpu_ptr()
takes the offset of a per cpu variable which makes this look a bit
strange.”…””}”(hjT  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K¶hjë  hžhubeh}”(h]”Œper-cpu-variables-and-offsets”ah ]”h"]”Œper cpu variables and offsets”ah$]”h&]”uh1h¡hh£hžhhŸh¶h KŸubh¢)”}”(hhh]”(h§)”}”(hŒ,Operations on a field of a per cpu structure”h]”hŒ,Operations on a field of a per cpu structure”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj|  hžhhŸh¶h K¼ubhØ)”}”(hŒ&Let's say we have a percpu structure::”h]”hŒ'Letâ€™s say we have a percpu structure:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K¾hj|  hžhubj¬  )”}”(hŒ<struct s {
        int n,m;
};

DEFINE_PER_CPU(struct s, p);”h]”hŒ<struct s {
        int n,m;
};

DEFINE_PER_CPU(struct s, p);”…””}”hj›  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h KÀhj|  hžhubhØ)”}”(hŒ0Operations on these fields are straightforward::”h]”hŒ/Operations on these fields are straightforward:”…””}”(hj©  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KÇhj|  hžhubj¬  )”}”(hŒ3this_cpu_inc(p.m)

z = this_cpu_cmpxchg(p.m, 0, 1);”h]”hŒ3this_cpu_inc(p.m)

z = this_cpu_cmpxchg(p.m, 0, 1);”…””}”hj·  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h KÉhj|  hžhubhØ)”}”(hŒ"If we have an offset to struct s::”h]”hŒ!If we have an offset to struct s:”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KÎhj|  hžhubj¬  )”}”(hŒRstruct s __percpu *ps = &p;

this_cpu_dec(ps->m);

z = this_cpu_inc_return(ps->n);”h]”hŒRstruct s __percpu *ps = &p;

this_cpu_dec(ps->m);

z = this_cpu_inc_return(ps->n);”…””}”hjÓ  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h KÐhj|  hžhubhØ)”}”(hŒ‡The calculation of the pointer may require the use of this_cpu_ptr()
if we do not make use of this_cpu ops later to manipulate fields::”h]”hŒ†The calculation of the pointer may require the use of this_cpu_ptr()
if we do not make use of this_cpu ops later to manipulate fields:”…””}”(hjá  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K×hj|  hžhubj¬  )”}”(hŒ=struct s *pp;

pp = this_cpu_ptr(&p);

pp->m--;

z = pp->n++;”h]”hŒ=struct s *pp;

pp = this_cpu_ptr(&p);

pp->m--;

z = pp->n++;”…””}”hjï  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h KÚhj|  hžhubeh}”(h]”Œ,operations-on-a-field-of-a-per-cpu-structure”ah ]”h"]”Œ,operations on a field of a per cpu structure”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K¼ubh¢)”}”(hhh]”(h§)”}”(hŒVariants of this_cpu ops”h]”hŒVariants of this_cpu ops”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj  hžhhŸh¶h KäubhØ)”}”(hXï  this_cpu ops are interrupt safe. Some architectures do not support
these per cpu local operations. In that case the operation must be
replaced by code that disables interrupts, then does the operations
that are guaranteed to be atomic and then re-enable interrupts. Doing
so is expensive. If there are other reasons why the scheduler cannot
change the processor we are executing on then there is no reason to
disable interrupts. For that purpose the following __this_cpu operations
are provided.”h]”hXï  this_cpu ops are interrupt safe. Some architectures do not support
these per cpu local operations. In that case the operation must be
replaced by code that disables interrupts, then does the operations
that are guaranteed to be atomic and then re-enable interrupts. Doing
so is expensive. If there are other reasons why the scheduler cannot
change the processor we are executing on then there is no reason to
disable interrupts. For that purpose the following __this_cpu operations
are provided.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kæhj  hžhubhØ)”}”(hXc  These operations have no guarantee against concurrent interrupts or
preemption. If a per cpu variable is not used in an interrupt context
and the scheduler cannot preempt, then they are safe. If any interrupts
still occur while an operation is in progress and if the interrupt too
modifies the variable, then RMW actions can not be guaranteed to be
safe::”h]”hXb  These operations have no guarantee against concurrent interrupts or
preemption. If a per cpu variable is not used in an interrupt context
and the scheduler cannot preempt, then they are safe. If any interrupts
still occur while an operation is in progress and if the interrupt too
modifies the variable, then RMW actions can not be guaranteed to be
safe:”…””}”(hj$  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kïhj  hžhubj¬  )”}”(hXo  __this_cpu_read(pcp)
__this_cpu_write(pcp, val)
__this_cpu_add(pcp, val)
__this_cpu_and(pcp, val)
__this_cpu_or(pcp, val)
__this_cpu_add_return(pcp, val)
__this_cpu_xchg(pcp, nval)
__this_cpu_cmpxchg(pcp, oval, nval)
__this_cpu_sub(pcp, val)
__this_cpu_inc(pcp)
__this_cpu_dec(pcp)
__this_cpu_sub_return(pcp, val)
__this_cpu_inc_return(pcp)
__this_cpu_dec_return(pcp)”h]”hXo  __this_cpu_read(pcp)
__this_cpu_write(pcp, val)
__this_cpu_add(pcp, val)
__this_cpu_and(pcp, val)
__this_cpu_or(pcp, val)
__this_cpu_add_return(pcp, val)
__this_cpu_xchg(pcp, nval)
__this_cpu_cmpxchg(pcp, oval, nval)
__this_cpu_sub(pcp, val)
__this_cpu_inc(pcp)
__this_cpu_dec(pcp)
__this_cpu_sub_return(pcp, val)
__this_cpu_inc_return(pcp)
__this_cpu_dec_return(pcp)”…””}”hj2  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h Köhj  hžhubhØ)”}”(hŒÌWill increment x and will not fall-back to code that disables
interrupts on platforms that cannot accomplish atomicity through
address relocation and a Read-Modify-Write operation in the same
instruction.”h]”hŒÌWill increment x and will not fall-back to code that disables
interrupts on platforms that cannot accomplish atomicity through
address relocation and a Read-Modify-Write operation in the same
instruction.”…””}”(hj@  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Mhj  hžhubeh}”(h]”Œvariants-of-this-cpu-ops”ah ]”h"]”Œvariants of this_cpu ops”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Käubh¢)”}”(hhh]”(h§)”}”(hŒ,&this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)”h]”hŒ,&this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)”…””}”(hjY  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjV  hžhhŸh¶h MubhØ)”}”(hŒ£The first operation takes the offset and forms an address and then
adds the offset of the n field. This may result in two add
instructions emitted by the compiler.”h]”hŒ£The first operation takes the offset and forms an address and then
adds the offset of the n field. This may result in two add
instructions emitted by the compiler.”…””}”(hjg  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h MhjV  hžhubhØ)”}”(hŒáThe second one first adds the two offsets and then does the
relocation.  IMHO the second form looks cleaner and has an easier time
with (). The second form also is consistent with the way
this_cpu_read() and friends are used.”h]”hŒáThe second one first adds the two offsets and then does the
relocation.  IMHO the second form looks cleaner and has an easier time
with (). The second form also is consistent with the way
this_cpu_read() and friends are used.”…””}”(hju  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h MhjV  hžhubeh}”(h]”Œ&this-cpu-ptr-pp-n-vs-this-cpu-ptr-pp-n”ah ]”h"]”Œ,&this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Mubh¢)”}”(hhh]”(h§)”}”(hŒRemote access to per cpu data”h]”hŒRemote access to per cpu data”…””}”(hjŽ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj‹  hžhhŸh¶h MubhØ)”}”(hŒÏPer cpu data structures are designed to be used by one cpu exclusively.
If you use the variables as intended, this_cpu_ops() are guaranteed to
be "atomic" as no other CPU has access to these data structures.”h]”hŒÓPer cpu data structures are designed to be used by one cpu exclusively.
If you use the variables as intended, this_cpu_ops() are guaranteed to
be â€œatomicâ€ as no other CPU has access to these data structures.”…””}”(hjœ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Mhj‹  hžhubhØ)”}”(hX_  There are special cases where you might need to access per cpu data
structures remotely. It is usually safe to do a remote read access
and that is frequently done to summarize counters. Remote write access
something which could be problematic because this_cpu ops do not
have lock semantics. A remote write may interfere with a this_cpu
RMW operation.”h]”hX_  There are special cases where you might need to access per cpu data
structures remotely. It is usually safe to do a remote read access
and that is frequently done to summarize counters. Remote write access
something which could be problematic because this_cpu ops do not
have lock semantics. A remote write may interfere with a this_cpu
RMW operation.”…””}”(hjª  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M hj‹  hžhubhØ)”}”(hŒÆRemote write accesses to percpu data structures are highly discouraged
unless absolutely necessary. Please consider using an IPI to wake up
the remote CPU and perform the update to its per cpu area.”h]”hŒÆRemote write accesses to percpu data structures are highly discouraged
unless absolutely necessary. Please consider using an IPI to wake up
the remote CPU and perform the update to its per cpu area.”…””}”(hj¸  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M'hj‹  hžhubhØ)”}”(hŒYTo access per-cpu data structure remotely, typically the per_cpu_ptr()
function is used::”h]”hŒXTo access per-cpu data structure remotely, typically the per_cpu_ptr()
function is used:”…””}”(hjÆ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M+hj‹  hžhubj¬  )”}”(hŒODEFINE_PER_CPU(struct data, datap);

struct data *p = per_cpu_ptr(&datap, cpu);”h]”hŒODEFINE_PER_CPU(struct data, datap);

struct data *p = per_cpu_ptr(&datap, cpu);”…””}”hjÔ  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h M/hj‹  hžhubhØ)”}”(hŒRThis makes it explicit that we are getting ready to access a percpu
area remotely.”h]”hŒRThis makes it explicit that we are getting ready to access a percpu
area remotely.”…””}”(hjâ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M3hj‹  hžhubhØ)”}”(hŒIYou can also do the following to convert the datap offset to an address::”h]”hŒHYou can also do the following to convert the datap offset to an address:”…””}”(hjð  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M6hj‹  hžhubj¬  )”}”(hŒ&struct data *p = this_cpu_ptr(&datap);”h]”hŒ&struct data *p = this_cpu_ptr(&datap);”…””}”hjþ  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h M8hj‹  hžhubhØ)”}”(hŒdbut, passing of pointers calculated via this_cpu_ptr to other cpus is
unusual and should be avoided.”h]”hŒdbut, passing of pointers calculated via this_cpu_ptr to other cpus is
unusual and should be avoided.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M:hj‹  hžhubhØ)”}”(hŒÇRemote access are typically only for reading the status of another cpus
per cpu data. Write accesses can cause unique problems due to the
relaxed synchronization requirements for this_cpu operations.”h]”hŒÇRemote access are typically only for reading the status of another cpus
per cpu data. Write accesses can cause unique problems due to the
relaxed synchronization requirements for this_cpu operations.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h M=hj‹  hžhubhØ)”}”(hŒïOne example that illustrates some concerns with write operations is
the following scenario that occurs because two per cpu variables
share a cache-line but the relaxed synchronization is applied to
only one process updating the cache-line.”h]”hŒïOne example that illustrates some concerns with write operations is
the following scenario that occurs because two per cpu variables
share a cache-line but the relaxed synchronization is applied to
only one process updating the cache-line.”…””}”(hj(  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h MAhj‹  hžhubhØ)”}”(hŒ Consider the following example::”h]”hŒConsider the following example:”…””}”(hj6  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h MFhj‹  hžhubj¬  )”}”(hŒ_struct test {
        atomic_t a;
        int b;
};

DEFINE_PER_CPU(struct test, onecacheline);”h]”hŒ_struct test {
        atomic_t a;
        int b;
};

DEFINE_PER_CPU(struct test, onecacheline);”…””}”hjD  sbah}”(h]”h ]”h"]”h$]”h&]”j»  j¼  uh1j«  hŸh¶h MIhj‹  hžhubhØ)”}”(hX¯  There is some concern about what would happen if the field 'a' is updated
remotely from one processor and the local processor would use this_cpu ops
to update field b. Care should be taken that such simultaneous accesses to
data within the same cache line are avoided. Also costly synchronization
may be necessary. IPIs are generally recommended in such scenarios instead
of a remote write to the per cpu area of another processor.”h]”hX³  There is some concern about what would happen if the field â€˜aâ€™ is updated
remotely from one processor and the local processor would use this_cpu ops
to update field b. Care should be taken that such simultaneous accesses to
data within the same cache line are avoided. Also costly synchronization
may be necessary. IPIs are generally recommended in such scenarios instead
of a remote write to the per cpu area of another processor.”…””}”(hjR  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h MPhj‹  hžhubhØ)”}”(hX5  Even in cases where the remote writes are rare, please bear in
mind that a remote write will evict the cache line from the processor
that most likely will access it. If the processor wakes up and finds a
missing local cache line of a per cpu area, its performance and hence
the wake up times will be affected.”h]”hX5  Even in cases where the remote writes are rare, please bear in
mind that a remote write will evict the cache line from the processor
that most likely will access it. If the processor wakes up and finds a
missing local cache line of a per cpu area, its performance and hence
the wake up times will be affected.”…””}”(hj`  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h MWhj‹  hžhubeh}”(h]”Œremote-access-to-per-cpu-data”ah ]”h"]”Œremote access to per cpu data”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Mubeh}”(h]”Œthis-cpu-operations”ah ]”h"]”Œthis_cpu operations”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
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