€•}JŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”(hhŒparent”hubaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ(/translations/zh_CN/core-api/dma-isa-lpc”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”(hhhh2ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/zh_TW/core-api/dma-isa-lpc”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”(hhhhFubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/it_IT/core-api/dma-isa-lpc”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”(hhhhZubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/ja_JP/core-api/dma-isa-lpc”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”(hhhhnubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/ko_KR/core-api/dma-isa-lpc”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”(hhhh‚ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/sp_SP/core-api/dma-isa-lpc”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒDMA with ISA and LPC devices”h]”hŒDMA with ISA and LPC devices”…””}”(hhªhh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒB/var/lib/git/docbuild/linux/Documentation/core-api/dma-isa-lpc.rst”h KubhŒ field_list”“”)”}”(hhh]”hŒfield”“”)”}”(hhh]”(hŒ field_name”“”)”}”(hŒAuthor”h]”hŒAuthor”…””}”(hhÅhhÃhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÁhh¾hŸh¶h KubhŒ field_body”“”)”}”(hŒ!Pierre Ossman ”h]”hŒ paragraph”“”)”}”(hŒ Pierre Ossman ”h]”(hŒPierre Ossman <”…””}”(hŒPierre Ossman <”hhÙhžhhŸNh NubhŒ reference”“”)”}”(hŒdrzeus@drzeus.cx”h]”hŒdrzeus@drzeus.cx”…””}”(hhhhähžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:drzeus@drzeus.cx”uh1hâhhÙubhŒ>”…””}”(hŒ>”hhÙhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhhÓubah}”(h]”h ]”h"]”h$]”h&]”uh1hÑhh¾ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Khh¹hžhubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hh£hžhhŸh¶h KubhØ)”}”(hŒËThis document describes how to do DMA transfers using the old ISA DMA controller. Even though ISA is more or less dead today the LPC bus uses the same DMA system so it will be around for quite some time.”h]”hŒËThis document describes how to do DMA transfers using the old ISA DMA controller. Even though ISA is more or less dead today the LPC bus uses the same DMA system so it will be around for quite some time.”…””}”(hjhjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒHeaders and dependencies”h]”hŒHeaders and dependencies”…””}”(hj$hj"hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjhžhhŸh¶h K ubhØ)”}”(hŒ5To do ISA style DMA you need to include two headers::”h]”hŒ4To do ISA style DMA you need to include two headers:”…””}”(hŒ4To do ISA style DMA you need to include two headers:”hj0hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhjhžhubhŒ literal_block”“”)”}”(hŒ3#include #include ”h]”hŒ3#include #include ”…””}”(hhhjAubah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1j?hŸh¶h KhjhžhubhØ)”}”(hŒ‰The first is the generic DMA API used to convert virtual addresses to bus addresses (see Documentation/core-api/dma-api.rst for details).”h]”hŒ‰The first is the generic DMA API used to convert virtual addresses to bus addresses (see Documentation/core-api/dma-api.rst for details).”…””}”(hjShjQhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhjhžhubhØ)”}”(hŒüThe second contains the routines specific to ISA DMA transfers. Since this is not present on all platforms make sure you construct your Kconfig to be dependent on ISA_DMA_API (not ISA) so that nobody tries to build your driver on unsupported platforms.”h]”hŒüThe second contains the routines specific to ISA DMA transfers. Since this is not present on all platforms make sure you construct your Kconfig to be dependent on ISA_DMA_API (not ISA) so that nobody tries to build your driver on unsupported platforms.”…””}”(hjahj_hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khjhžhubeh}”(h]”Œheaders-and-dependencies”ah ]”h"]”Œheaders and dependencies”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K ubh¢)”}”(hhh]”(h§)”}”(hŒBuffer allocation”h]”hŒBuffer allocation”…””}”(hjzhjxhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjuhžhhŸh¶h KubhØ)”}”(hŒ‹The ISA DMA controller has some very strict requirements on which memory it can access so extra care must be taken when allocating buffers.”h]”hŒ‹The ISA DMA controller has some very strict requirements on which memory it can access so extra care must be taken when allocating buffers.”…””}”(hjˆhj†hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhjuhžhubhØ)”}”(hŒ(You usually need a special buffer for DMA transfers instead of transferring directly to and from your normal data structures.)”h]”hŒ(You usually need a special buffer for DMA transfers instead of transferring directly to and from your normal data structures.)”…””}”(hj–hj”hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K"hjuhžhubhØ)”}”(hŒ¸The DMA-able address space is the lowest 16 MB of _physical_ memory. Also the transfer block may not cross page boundaries (which are 64 or 128 KiB depending on which channel you use).”h]”hŒ¸The DMA-able address space is the lowest 16 MB of _physical_ memory. Also the transfer block may not cross page boundaries (which are 64 or 128 KiB depending on which channel you use).”…””}”(hj¤hj¢hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K%hjuhžhubhØ)”}”(hŒrIn order to allocate a piece of memory that satisfies all these requirements you pass the flag GFP_DMA to kmalloc.”h]”hŒrIn order to allocate a piece of memory that satisfies all these requirements you pass the flag GFP_DMA to kmalloc.”…””}”(hj²hj°hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K)hjuhžhubhØ)”}”(hŒÔUnfortunately the memory available for ISA DMA is scarce so unless you allocate the memory during boot-up it's a good idea to also pass __GFP_RETRY_MAYFAIL and __GFP_NOWARN to make the allocator try a bit harder.”h]”hŒÖUnfortunately the memory available for ISA DMA is scarce so unless you allocate the memory during boot-up it’s a good idea to also pass __GFP_RETRY_MAYFAIL and __GFP_NOWARN to make the allocator try a bit harder.”…””}”(hjÀhj¾hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K,hjuhžhubhØ)”}”(hŒ„(This scarcity also means that you should allocate the buffer as early as possible and not release it until the driver is unloaded.)”h]”hŒ„(This scarcity also means that you should allocate the buffer as early as possible and not release it until the driver is unloaded.)”…””}”(hjÎhjÌhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K0hjuhžhubeh}”(h]”Œbuffer-allocation”ah ]”h"]”Œbuffer allocation”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒAddress translation”h]”hŒAddress translation”…””}”(hjçhjåhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjâhžhhŸh¶h K4ubhØ)”}”(hXTo translate the virtual address to a bus address, use the normal DMA API. Do _not_ use isa_virt_to_bus() even though it does the same thing. The reason for this is that the function isa_virt_to_bus() will require a Kconfig dependency to ISA, not just ISA_DMA_API which is really all you need. Remember that even though the DMA controller has its origins in ISA it is used elsewhere.”h]”hXTo translate the virtual address to a bus address, use the normal DMA API. Do _not_ use isa_virt_to_bus() even though it does the same thing. The reason for this is that the function isa_virt_to_bus() will require a Kconfig dependency to ISA, not just ISA_DMA_API which is really all you need. Remember that even though the DMA controller has its origins in ISA it is used elsewhere.”…””}”(hjõhjóhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K6hjâhžhubhØ)”}”(hŒ©Note: x86_64 had a broken DMA API when it came to ISA but has since been fixed. If your arch has problems then fix the DMA API instead of reverting to the ISA functions.”h]”hŒ©Note: x86_64 had a broken DMA API when it came to ISA but has since been fixed. If your arch has problems then fix the DMA API instead of reverting to the ISA functions.”…””}”(hjhjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K=hjâhžhubeh}”(h]”Œaddress-translation”ah ]”h"]”Œaddress translation”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K4ubh¢)”}”(hhh]”(h§)”}”(hŒChannels”h]”hŒChannels”…””}”(hjhjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjhžhhŸh¶h KBubhØ)”}”(hŒA normal ISA DMA controller has 8 channels. The lower four are for 8-bit transfers and the upper four are for 16-bit transfers.”h]”hŒA normal ISA DMA controller has 8 channels. The lower four are for 8-bit transfers and the upper four are for 16-bit transfers.”…””}”(hj*hj(hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KDhjhžhubhØ)”}”(hŒÐ(Actually the DMA controller is really two separate controllers where channel 4 is used to give DMA access for the second controller (0-3). This means that of the four 16-bits channels only three are usable.)”h]”hŒÐ(Actually the DMA controller is really two separate controllers where channel 4 is used to give DMA access for the second controller (0-3). This means that of the four 16-bits channels only three are usable.)”…””}”(hj8hj6hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KGhjhžhubhØ)”}”(hŒ?You allocate these in a similar fashion as all basic resources:”h]”hŒ?You allocate these in a similar fashion as all basic resources:”…””}”(hjFhjDhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KKhjhžhubhØ)”}”(hŒmextern int request_dma(unsigned int dmanr, const char * device_id); extern void free_dma(unsigned int dmanr);”h]”hŒmextern int request_dma(unsigned int dmanr, const char * device_id); extern void free_dma(unsigned int dmanr);”…””}”(hjThjRhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KMhjhžhubhØ)”}”(hŒªThe ability to use 16-bit or 8-bit transfers is _not_ up to you as a driver author but depends on what the hardware supports. Check your specs or test different channels.”h]”hŒªThe ability to use 16-bit or 8-bit transfers is _not_ up to you as a driver author but depends on what the hardware supports. Check your specs or test different channels.”…””}”(hjbhj`hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KPhjhžhubeh}”(h]”Œchannels”ah ]”h"]”Œchannels”ah$]”h&]”uh1h¡hh£hžhhŸh¶h KBubh¢)”}”(hhh]”(h§)”}”(hŒ Transfer data”h]”hŒ Transfer data”…””}”(hj{hjyhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjvhžhhŸh¶h KUubhØ)”}”(hŒ3Now for the good stuff, the actual DMA transfer. :)”h]”hŒ3Now for the good stuff, the actual DMA transfer. :)”…””}”(hj‰hj‡hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KWhjvhžhubhØ)”}”(hŒÌBefore you use any ISA DMA routines you need to claim the DMA lock using claim_dma_lock(). The reason is that some DMA operations are not atomic so only one driver may fiddle with the registers at a time.”h]”hŒÌBefore you use any ISA DMA routines you need to claim the DMA lock using claim_dma_lock(). The reason is that some DMA operations are not atomic so only one driver may fiddle with the registers at a time.”…””}”(hj—hj•hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KYhjvhžhubhØ)”}”(hXThe first time you use the DMA controller you should call clear_dma_ff(). This clears an internal register in the DMA controller that is used for the non-atomic operations. As long as you (and everyone else) uses the locking functions then you only need to reset this once.”h]”hXThe first time you use the DMA controller you should call clear_dma_ff(). This clears an internal register in the DMA controller that is used for the non-atomic operations. As long as you (and everyone else) uses the locking functions then you only need to reset this once.”…””}”(hj¥hj£hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K^hjvhžhubhØ)”}”(hŒ¥Next, you tell the controller in which direction you intend to do the transfer using set_dma_mode(). Currently you have the options DMA_MODE_READ and DMA_MODE_WRITE.”h]”hŒ¥Next, you tell the controller in which direction you intend to do the transfer using set_dma_mode(). Currently you have the options DMA_MODE_READ and DMA_MODE_WRITE.”…””}”(hj³hj±hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KdhjvhžhubhØ)”}”(hXSet the address from where the transfer should start (this needs to be 16-bit aligned for 16-bit transfers) and how many bytes to transfer. Note that it's _bytes_. The DMA routines will do all the required translation to values that the DMA controller understands.”h]”hX Set the address from where the transfer should start (this needs to be 16-bit aligned for 16-bit transfers) and how many bytes to transfer. Note that it’s _bytes_. The DMA routines will do all the required translation to values that the DMA controller understands.”…””}”(hjÁhj¿hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhhjvhžhubhØ)”}”(hŒFThe final step is enabling the DMA channel and releasing the DMA lock.”h]”hŒFThe final step is enabling the DMA channel and releasing the DMA lock.”…””}”(hjÏhjÍhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KmhjvhžhubhØ)”}”(hŒ¯Once the DMA transfer is finished (or timed out) you should disable the channel again. You should also check get_dma_residue() to make sure that all data has been transferred.”h]”hŒ¯Once the DMA transfer is finished (or timed out) you should disable the channel again. You should also check get_dma_residue() to make sure that all data has been transferred.”…””}”(hjÝhjÛhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KphjvhžhubhØ)”}”(hŒ Example::”h]”hŒExample:”…””}”(hŒExample:”hjéhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kthjvhžhubj@)”}”(hXâint flags, residue; flags = claim_dma_lock(); clear_dma_ff(); set_dma_mode(channel, DMA_MODE_WRITE); set_dma_addr(channel, phys_addr); set_dma_count(channel, num_bytes); dma_enable(channel); release_dma_lock(flags); while (!device_done()); flags = claim_dma_lock(); dma_disable(channel); residue = dma_get_residue(channel); if (residue != 0) printk(KERN_ERR "driver: Incomplete DMA transfer!" " %d bytes left!\n", residue); release_dma_lock(flags);”h]”hXâint flags, residue; flags = claim_dma_lock(); clear_dma_ff(); set_dma_mode(channel, DMA_MODE_WRITE); set_dma_addr(channel, phys_addr); set_dma_count(channel, num_bytes); dma_enable(channel); release_dma_lock(flags); while (!device_done()); flags = claim_dma_lock(); dma_disable(channel); residue = dma_get_residue(channel); if (residue != 0) printk(KERN_ERR "driver: Incomplete DMA transfer!" " %d bytes left!\n", residue); release_dma_lock(flags);”…””}”(hhhjøubah}”(h]”h ]”h"]”h$]”h&]”jOjPuh1j?hŸh¶h Kvhjvhžhubeh}”(h]”Œ transfer-data”ah ]”h"]”Œ transfer data”ah$]”h&]”uh1h¡hh£hžhhŸh¶h KUubh¢)”}”(hhh]”(h§)”}”(hŒSuspend/resume”h]”hŒSuspend/resume”…””}”(hjhjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjhžhhŸh¶h K’ubhØ)”}”(hX+It is the driver's responsibility to make sure that the machine isn't suspended while a DMA transfer is in progress. Also, all DMA settings are lost when the system suspends so if your driver relies on the DMA controller being in a certain state then you have to restore these registers upon resume.”h]”hX/It is the driver’s responsibility to make sure that the machine isn’t suspended while a DMA transfer is in progress. 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