€•Ö7Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ'/translations/zh_CN/arch/xtensa/atomctl”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/zh_TW/arch/xtensa/atomctl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/it_IT/arch/xtensa/atomctl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ja_JP/arch/xtensa/atomctl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ko_KR/arch/xtensa/atomctl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/sp_SP/arch/xtensa/atomctl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ+Atomic Operation Control (ATOMCTL) Register”h]”hŒ+Atomic Operation Control (ATOMCTL) Register”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒA/var/lib/git/docbuild/linux/Documentation/arch/xtensa/atomctl.rst”h KubhŒ paragraph”“”)”}”(hŒ”We Have Atomic Operation Control (ATOMCTL) Register. This register determines the effect of using a S32C1I instruction with various combinations of:”h]”hŒ”We Have Atomic Operation Control (ATOMCTL) Register. This register determines the effect of using a S32C1I instruction with various combinations of:”…””}”(hh¹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒ block_quote”“”)”}”(hŒÑ1. With and without an Coherent Cache Controller which can do Atomic Transactions to the memory internally. 2. With and without An Intelligent Memory Controller which can do Atomic Transactions itself. ”h]”hŒenumerated_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒiWith and without an Coherent Cache Controller which can do Atomic Transactions to the memory internally. ”h]”h¸)”}”(hŒhWith and without an Coherent Cache Controller which can do Atomic Transactions to the memory internally.”h]”hŒhWith and without an Coherent Cache Controller which can do Atomic Transactions to the memory internally.”…””}”(hhØhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K hhÔubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhhÏubhÓ)”}”(hŒ[With and without An Intelligent Memory Controller which can do Atomic Transactions itself. ”h]”h¸)”}”(hŒZWith and without An Intelligent Memory Controller which can do Atomic Transactions itself.”h]”hŒZWith and without An Intelligent Memory Controller which can do Atomic Transactions itself.”…””}”(hhðhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K hhìubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhhÏubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1hÍhhÉubah}”(h]”h ]”h"]”h$]”h&]”uh1hÇhŸh¶h K hh£hžhubh¸)”}”(hŒLThe Core comes up with a default value of for the three types of cache ops::”h]”hŒKThe Core comes up with a default value of for the three types of cache ops:”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒ literal_block”“”)”}”(hŒ00x28: (WB: Internal, WT: Internal, BY:Exception)”h]”hŒ00x28: (WB: Internal, WT: Internal, BY:Exception)”…””}”hj%sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1j#hŸh¶h Khh£hžhubh¸)”}”(hX&On the FPGA Cards we typically simulate an Intelligent Memory controller which can implement RCW transactions. For FPGA cards with an External Memory controller we let it to the atomic operations internally while doing a Cached (WB) transaction and use the Memory RCW for un-cached operations.”h]”hX&On the FPGA Cards we typically simulate an Intelligent Memory controller which can implement RCW transactions. For FPGA cards with an External Memory controller we let it to the atomic operations internally while doing a Cached (WB) transaction and use the Memory RCW for un-cached operations.”…””}”(hj5hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¸)”}”(hŒ¤For systems without an coherent cache controller, non-MX, we always use the memory controllers RCW, though non-MX controllers likely support the Internal Operation.”h]”hŒ¤For systems without an coherent cache controller, non-MX, we always use the memory controllers RCW, though non-MX controllers likely support the Internal Operation.”…””}”(hjChžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hŒÆCUSTOMER-WARNING: Virtually all customers buy their memory controllers from vendors that don't support atomic RCW memory transactions and will likely want to configure this register to not use RCW. ”h]”(hŒterm”“”)”}”(hŒCUSTOMER-WARNING:”h]”hŒCUSTOMER-WARNING:”…””}”(hj^hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j\hŸh¶h K hjXubhŒ definition”“”)”}”(hhh]”h¸)”}”(hŒ³Virtually all customers buy their memory controllers from vendors that don't support atomic RCW memory transactions and will likely want to configure this register to not use RCW.”h]”hŒµVirtually all customers buy their memory controllers from vendors that don’t support atomic RCW memory transactions and will likely want to configure this register to not use RCW.”…””}”(hjqhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khjnubah}”(h]”h ]”h"]”h$]”h&]”uh1jlhjXubeh}”(h]”h ]”h"]”h$]”h&]”uh1jVhŸh¶h K hjSubah}”(h]”h ]”h"]”h$]”h&]”uh1jQhh£hžhhŸh¶h Nubh¸)”}”(hŒDevelopers might find using RCW in Bypass mode convenient when testing with the cache being bypassed; for example studying cache alias problems.”h]”hŒDevelopers might find using RCW in Bypass mode convenient when testing with the cache being bypassed; for example studying cache alias problems.”…””}”(hj‘hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K"hh£hžhubh¸)”}”(hŒ#See Section 4.3.12.4 of ISA; Bits::”h]”hŒ"See Section 4.3.12.4 of ISA; Bits:”…””}”(hjŸhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K%hh£hžhubj$)”}”(hŒ) WB WT BY 5 4 | 3 2 | 1 0”h]”hŒ) WB WT BY 5 4 | 3 2 | 1 0”…””}”hj­sbah}”(h]”h ]”h"]”h$]”h&]”j3j4uh1j#hŸh¶h K'hh£hžhubhŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”K uh1jÅhjÂubjÆ)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1jÅhjÂubjÆ)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1jÅhjÂubjÆ)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1jÅhjÂubhŒthead”“”)”}”(hhh]”(hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”h¸)”}”(hŒ2 Bit”h]”hŒ2 Bit”…””}”(hjþhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K+hjûubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjöubjú)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1jùhjöubjú)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1jùhjöubjú)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1jùhjöubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjñubjõ)”}”(hhh]”(jú)”}”(hhh]”h¸)”}”(hŒField”h]”hŒField”…””}”(hj9hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K,hj6ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj3ubjú)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1jùhj3ubjú)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1jùhj3ubjú)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1jùhj3ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjñubjõ)”}”(hhh]”(jú)”}”(hhh]”h¸)”}”(hŒValues”h]”hŒValues”…””}”(hjthžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K-hjqubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjnubjú)”}”(hhh]”h¸)”}”(hŒWB - Write Back”h]”hŒWB - Write Back”…””}”(hj‹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K-hjˆubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjnubjú)”}”(hhh]”h¸)”}”(hŒWT - Write Thru”h]”hŒWT - Write Thru”…””}”(hj¢hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K-hjŸubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjnubjú)”}”(hhh]”h¸)”}”(hŒ BY - Bypass”h]”hŒ BY - Bypass”…””}”(hj¹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K-hj¶ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjnubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjñubeh}”(h]”h ]”h"]”h$]”h&]”uh1jïhjÂubhŒtbody”“”)”}”(hhh]”(jõ)”}”(hhh]”(jú)”}”(hhh]”h¸)”}”(hŒ0”h]”hŒ0”…””}”(hjähžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K/hjáubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjÞubjú)”}”(hhh]”h¸)”}”(hŒ Exception”h]”hŒ Exception”…””}”(hjûhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K/hjøubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjÞubjú)”}”(hhh]”h¸)”}”(hŒ Exception”h]”hŒ Exception”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K/hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjÞubjú)”}”(hhh]”h¸)”}”(hŒ Exception”h]”hŒ Exception”…””}”(hj)hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K/hj&ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjÞubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjÛubjõ)”}”(hhh]”(jú)”}”(hhh]”h¸)”}”(hŒ1”h]”hŒ1”…””}”(hjIhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K0hjFubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjCubjú)”}”(hhh]”h¸)”}”(hŒRCW Transaction”h]”hŒRCW Transaction”…””}”(hj`hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K0hj]ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjCubjú)”}”(hhh]”h¸)”}”(hŒRCW Transaction”h]”hŒRCW Transaction”…””}”(hjwhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K0hjtubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjCubjú)”}”(hhh]”h¸)”}”(hŒRCW Transaction”h]”hŒRCW Transaction”…””}”(hjŽhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K0hj‹ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhjCubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjÛubjõ)”}”(hhh]”(jú)”}”(hhh]”h¸)”}”(hŒ2”h]”hŒ2”…””}”(hj®hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K1hj«ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj¨ubjú)”}”(hhh]”h¸)”}”(hŒInternal Operation”h]”hŒInternal Operation”…””}”(hjÅhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K1hjÂubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj¨ubjú)”}”(hhh]”h¸)”}”(hŒInternal Operation”h]”hŒInternal Operation”…””}”(hjÜhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K1hjÙubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj¨ubjú)”}”(hhh]”h¸)”}”(hŒReserved”h]”hŒReserved”…””}”(hjóhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K1hjðubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj¨ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjÛubjõ)”}”(hhh]”(jú)”}”(hhh]”h¸)”}”(hŒ3”h]”hŒ3”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K2hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj ubjú)”}”(hhh]”h¸)”}”(hŒReserved”h]”hŒReserved”…””}”(hj*hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K2hj'ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj ubjú)”}”(hhh]”h¸)”}”(hŒReserved”h]”hŒReserved”…””}”(hjAhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K2hj>ubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj ubjú)”}”(hhh]”h¸)”}”(hŒReserved”h]”hŒReserved”…””}”(hjXhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K2hjUubah}”(h]”h ]”h"]”h$]”h&]”uh1jùhj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jôhjÛubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÙhjÂubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1jÀhj½ubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hh£hžhhŸh¶h Nubeh}”(h]”Œ)atomic-operation-control-atomctl-register”ah ]”h"]”Œ+atomic operation control (atomctl) register”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”jùŒfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j¯Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¶Œ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”jŠj‡sŒ nametypes”}”jЉsh}”j‡h£sŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nhžhub.