€•¶D      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ%/translations/zh_CN/arch/x86/entry_64”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ%/translations/zh_TW/arch/x86/entry_64”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ%/translations/it_IT/arch/x86/entry_64”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ%/translations/ja_JP/arch/x86/entry_64”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ%/translations/ko_KR/arch/x86/entry_64”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ%/translations/sp_SP/arch/x86/entry_64”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒ?/var/lib/git/docbuild/linux/Documentation/arch/x86/entry_64.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒKernel Entries”h]”hŒKernel Entries”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hŒ’This file documents some of the kernel entries in
arch/x86/entry/entry_64.S.  A lot of this explanation is adapted from
an email from Ingo Molnar:”h]”hŒ’This file documents some of the kernel entries in
arch/x86/entry/entry_64.S.  A lot of this explanation is adapted from
an email from Ingo Molnar:”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒ9https://lore.kernel.org/r/20110529191055.GC9835%40elte.hu”h]”hŒ	reference”“”)”}”(hhÛh]”hŒ9https://lore.kernel.org/r/20110529191055.GC9835%40elte.hu”…””}”(hhßhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”hÛuh1hÝhhÙubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hXÄ  The x86 architecture has quite a few different ways to jump into
kernel code.  Most of these entry points are registered in
arch/x86/kernel/traps.c and implemented in arch/x86/entry/entry_64.S
for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
syscall entry points and thus provides for 32-bit processes the
ability to execute syscalls when running on 64-bit kernels.”h]”hXÄ  The x86 architecture has quite a few different ways to jump into
kernel code.  Most of these entry points are registered in
arch/x86/kernel/traps.c and implemented in arch/x86/entry/entry_64.S
for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
syscall entry points and thus provides for 32-bit processes the
ability to execute syscalls when running on 64-bit kernels.”…””}”(hhóhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒLThe IDT vector assignments are listed in arch/x86/include/asm/irq_vectors.h.”h]”hŒLThe IDT vector assignments are listed in arch/x86/include/asm/irq_vectors.h.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒSome of these entries are:”h]”hŒSome of these entries are:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒblock_quote”“”)”}”(hX  - system_call: syscall instruction from 64-bit code.

- entry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
  either way.

- entry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
  code

- interrupt: An array of entries.  Every IDT vector that doesn't
  explicitly point somewhere else gets set to the corresponding
  value in interrupts.  These point to a whole array of
  magically-generated functions that make their way to common_interrupt()
  with the interrupt number as a parameter.

- APIC interrupts: Various special-purpose interrupts for things
  like TLB shootdown.

- Architecturally-defined exceptions like divide_error.
”h]”hŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ3system_call: syscall instruction from 64-bit code.
”h]”hÊ)”}”(hŒ2system_call: syscall instruction from 64-bit code.”h]”hŒ2system_call: syscall instruction from 64-bit code.”…””}”(hj.  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj*  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj%  ubj)  )”}”(hŒTentry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
either way.
”h]”hÊ)”}”(hŒSentry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
either way.”h]”hŒSentry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
either way.”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjB  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj%  ubj)  )”}”(hŒIentry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
code
”h]”hÊ)”}”(hŒHentry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
code”h]”hŒHentry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
code”…””}”(hj^  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjZ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj%  ubj)  )”}”(hX%  interrupt: An array of entries.  Every IDT vector that doesn't
explicitly point somewhere else gets set to the corresponding
value in interrupts.  These point to a whole array of
magically-generated functions that make their way to common_interrupt()
with the interrupt number as a parameter.
”h]”hÊ)”}”(hX$  interrupt: An array of entries.  Every IDT vector that doesn't
explicitly point somewhere else gets set to the corresponding
value in interrupts.  These point to a whole array of
magically-generated functions that make their way to common_interrupt()
with the interrupt number as a parameter.”h]”hX&  interrupt: An array of entries.  Every IDT vector that doesnâ€™t
explicitly point somewhere else gets set to the corresponding
value in interrupts.  These point to a whole array of
magically-generated functions that make their way to common_interrupt()
with the interrupt number as a parameter.”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K!hjr  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj%  ubj)  )”}”(hŒSAPIC interrupts: Various special-purpose interrupts for things
like TLB shootdown.
”h]”hÊ)”}”(hŒRAPIC interrupts: Various special-purpose interrupts for things
like TLB shootdown.”h]”hŒRAPIC interrupts: Various special-purpose interrupts for things
like TLB shootdown.”…””}”(hjŽ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K'hjŠ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj%  ubj)  )”}”(hŒ6Architecturally-defined exceptions like divide_error.
”h]”hÊ)”}”(hŒ5Architecturally-defined exceptions like divide_error.”h]”hŒ5Architecturally-defined exceptions like divide_error.”…””}”(hj¦  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K*hj¢  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj%  ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j#  hŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hŸh³h Khh¶hžhubhÊ)”}”(hXÛ  There are a few complexities here.  The different x86-64 entries
have different calling conventions.  The syscall and sysenter
instructions have their own peculiar calling conventions.  Some of
the IDT entries push an error code onto the stack; others don't.
IDT entries using the IST alternative stack mechanism need their own
magic to get the stack frames right.  (You can find some
documentation in the AMD APM, Volume 2, Chapter 8 and the Intel SDM,
Volume 3, Chapter 6.)”h]”hXÝ  There are a few complexities here.  The different x86-64 entries
have different calling conventions.  The syscall and sysenter
instructions have their own peculiar calling conventions.  Some of
the IDT entries push an error code onto the stack; others donâ€™t.
IDT entries using the IST alternative stack mechanism need their own
magic to get the stack frames right.  (You can find some
documentation in the AMD APM, Volume 2, Chapter 8 and the Intel SDM,
Volume 3, Chapter 6.)”…””}”(hjÈ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K,hh¶hžhubhÊ)”}”(hXw  Dealing with the swapgs instruction is especially tricky.  Swapgs
toggles whether gs is the kernel gs or the user gs.  The swapgs
instruction is rather fragile: it must nest perfectly and only in
single depth, it should only be used if entering from user mode to
kernel mode and then when returning to user-space, and precisely
so. If we mess that up even slightly, we crash.”h]”hXw  Dealing with the swapgs instruction is especially tricky.  Swapgs
toggles whether gs is the kernel gs or the user gs.  The swapgs
instruction is rather fragile: it must nest perfectly and only in
single depth, it should only be used if entering from user mode to
kernel mode and then when returning to user-space, and precisely
so. If we mess that up even slightly, we crash.”…””}”(hjÖ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K5hh¶hžhubhÊ)”}”(hŒ£So when we have a secondary entry, already in kernel mode, we *must
not* use SWAPGS blindly - nor must we forget doing a SWAPGS when it's
not switched/swapped yet.”h]”(hŒ>So when we have a secondary entry, already in kernel mode, we ”…””}”(hjä  hžhhŸNh NubhŒemphasis”“”)”}”(hŒ
*must
not*”h]”hŒmust
not”…””}”(hjî  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jì  hjä  ubhŒ] use SWAPGS blindly - nor must we forget doing a SWAPGS when itâ€™s
not switched/swapped yet.”…””}”(hjä  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K<hh¶hžhubhÊ)”}”(hŒqNow, there's a secondary complication: there's a cheap way to test
which mode the CPU is in and an expensive way.”h]”hŒuNow, thereâ€™s a secondary complication: thereâ€™s a cheap way to test
which mode the CPU is in and an expensive way.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K@hh¶hžhubhÊ)”}”(hŒ€The cheap way is to pick this info off the entry frame on the kernel
stack, from the CS of the ptregs area of the kernel stack::”h]”hŒThe cheap way is to pick this info off the entry frame on the kernel
stack, from the CS of the ptregs area of the kernel stack:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KChh¶hžhubhŒliteral_block”“”)”}”(hŒ>xorl %ebx,%ebx
testl $3,CS+8(%rsp)
je error_kernelspace
SWAPGS”h]”hŒ>xorl %ebx,%ebx
testl $3,CS+8(%rsp)
je error_kernelspace
SWAPGS”…””}”hj$  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j"  hŸh³h KFhh¶hžhubhÊ)”}”(hŒdThe expensive (paranoid) way is to read back the MSR_GS_BASE value
(which is what SWAPGS modifies)::”h]”hŒcThe expensive (paranoid) way is to read back the MSR_GS_BASE value
(which is what SWAPGS modifies):”…””}”(hj2  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KKhh¶hžhubj#  )”}”(hŒ§      movl $1,%ebx
      movl $MSR_GS_BASE,%ecx
      rdmsr
      testl %edx,%edx
      js 1f   /* negative -> in kernel */
      SWAPGS
      xorl %ebx,%ebx
1:    ret”h]”hŒ§      movl $1,%ebx
      movl $MSR_GS_BASE,%ecx
      rdmsr
      testl %edx,%edx
      js 1f   /* negative -> in kernel */
      SWAPGS
      xorl %ebx,%ebx
1:    ret”…””}”hj@  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j"  hŸh³h KNhh¶hžhubhÊ)”}”(hX|  If we are at an interrupt or user-trap/gate-alike boundary then we can
use the faster check: the stack will be a reliable indicator of
whether SWAPGS was already done: if we see that we are a secondary
entry interrupting kernel mode execution, then we know that the GS
base has already been switched. If it says that we interrupted
user-space execution then we must do the SWAPGS.”h]”hX|  If we are at an interrupt or user-trap/gate-alike boundary then we can
use the faster check: the stack will be a reliable indicator of
whether SWAPGS was already done: if we see that we are a secondary
entry interrupting kernel mode execution, then we know that the GS
base has already been switched. If it says that we interrupted
user-space execution then we must do the SWAPGS.”…””}”(hjN  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KWhh¶hžhubhÊ)”}”(hŒùBut if we are in an NMI/MCE/DEBUG/whatever super-atomic entry context,
which might have triggered right after a normal entry wrote CS to the
stack but before we executed SWAPGS, then the only safe way to check
for GS is the slower method: the RDMSR.”h]”hŒùBut if we are in an NMI/MCE/DEBUG/whatever super-atomic entry context,
which might have triggered right after a normal entry wrote CS to the
stack but before we executed SWAPGS, then the only safe way to check
for GS is the slower method: the RDMSR.”…””}”(hj\  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K^hh¶hžhubhÊ)”}”(hŒ³Therefore, super-atomic entries (except NMI, which is handled separately)
must use idtentry with paranoid=1 to handle gsbase correctly.  This
triggers three main behavior changes:”h]”hŒ³Therefore, super-atomic entries (except NMI, which is handled separately)
must use idtentry with paranoid=1 to handle gsbase correctly.  This
triggers three main behavior changes:”…””}”(hjj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kchh¶hžhubj  )”}”(hŒ´- Interrupt entry will use the slower gsbase check.
- Interrupt entry from user mode will switch off the IST stack.
- Interrupt exit to kernel mode will not attempt to reschedule.
”h]”j$  )”}”(hhh]”(j)  )”}”(hŒ1Interrupt entry will use the slower gsbase check.”h]”hÊ)”}”(hj  h]”hŒ1Interrupt entry will use the slower gsbase check.”…””}”(hjƒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kghj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj|  ubj)  )”}”(hŒ=Interrupt entry from user mode will switch off the IST stack.”h]”hÊ)”}”(hj˜  h]”hŒ=Interrupt entry from user mode will switch off the IST stack.”…””}”(hjš  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhj–  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj|  ubj)  )”}”(hŒ>Interrupt exit to kernel mode will not attempt to reschedule.
”h]”hÊ)”}”(hŒ=Interrupt exit to kernel mode will not attempt to reschedule.”h]”hŒ=Interrupt exit to kernel mode will not attempt to reschedule.”…””}”(hj±  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kihj­  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j(  hj|  ubeh}”(h]”h ]”h"]”h$]”h&]”jÀ  jÁ  uh1j#  hŸh³h Kghjx  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hŸh³h Kghh¶hžhubhÊ)”}”(hŒÞWe try to only use IST entries and the paranoid entry code for vectors
that absolutely need the more expensive check for the GS base - and we
generate all 'normal' entry points with the regular (faster) paranoid=0
variant.”h]”hŒâWe try to only use IST entries and the paranoid entry code for vectors
that absolutely need the more expensive check for the GS base - and we
generate all â€˜normalâ€™ entry points with the regular (faster) paranoid=0
variant.”…””}”(hjÑ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kkhh¶hžhubeh}”(h]”Œkernel-entries”ah ]”h"]”Œkernel entries”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j
  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”jä  já  sŒ	nametypes”}”jä  ‰sh}”já  h¶sŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.