€•†      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ"/translations/zh_CN/arch/sparc/adi”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/zh_TW/arch/sparc/adi”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/it_IT/arch/sparc/adi”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/ja_JP/arch/sparc/adi”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/ko_KR/arch/sparc/adi”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/sp_SP/arch/sparc/adi”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ Application Data Integrity (ADI)”h]”hŒ Application Data Integrity (ADI)”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒ</var/lib/git/docbuild/linux/Documentation/arch/sparc/adi.rst”h KubhŒ	paragraph”“”)”}”(hX÷  SPARC M7 processor adds the Application Data Integrity (ADI) feature.
ADI allows a task to set version tags on any subset of its address
space. Once ADI is enabled and version tags are set for ranges of
address space of a task, the processor will compare the tag in pointers
to memory in these ranges to the version set by the application
previously. Access to memory is granted only if the tag in given pointer
matches the tag set by the application. In case of mismatch, processor
raises an exception.”h]”hX÷  SPARC M7 processor adds the Application Data Integrity (ADI) feature.
ADI allows a task to set version tags on any subset of its address
space. Once ADI is enabled and version tags are set for ranges of
address space of a task, the processor will compare the tag in pointers
to memory in these ranges to the version set by the application
previously. Access to memory is granted only if the tag in given pointer
matches the tag set by the application. In case of mismatch, processor
raises an exception.”…””}”(hh¹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¸)”}”(hŒ<Following steps must be taken by a task to enable ADI fully:”h]”hŒ<Following steps must be taken by a task to enable ADI fully:”…””}”(hhÇhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒenumerated_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ†Set the user mode PSTATE.mcde bit. This acts as master switch for
the task's entire address space to enable/disable ADI for the task.
”h]”h¸)”}”(hŒ…Set the user mode PSTATE.mcde bit. This acts as master switch for
the task's entire address space to enable/disable ADI for the task.”h]”hŒ‡Set the user mode PSTATE.mcde bit. This acts as master switch for
the taskâ€™s entire address space to enable/disable ADI for the task.”…””}”(hhàhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KhhÜubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhh×hžhhŸh¶h NubhÛ)”}”(hŒ®Set TTE.mcd bit on any TLB entries that correspond to the range of
addresses ADI is being enabled on. MMU checks the version tag only
on the pages that have TTE.mcd bit set.
”h]”h¸)”}”(hŒ­Set TTE.mcd bit on any TLB entries that correspond to the range of
addresses ADI is being enabled on. MMU checks the version tag only
on the pages that have TTE.mcd bit set.”h]”hŒ­Set TTE.mcd bit on any TLB entries that correspond to the range of
addresses ADI is being enabled on. MMU checks the version tag only
on the pages that have TTE.mcd bit set.”…””}”(hhøhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khhôubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhh×hžhhŸh¶h NubhÛ)”}”(hŒüSet the version tag for virtual addresses using stxa instruction
and one of the MCD specific ASIs. Each stxa instruction sets the
given tag for one ADI block size number of bytes. This step must
be repeated for entire page to set tags for entire page.
”h]”h¸)”}”(hŒûSet the version tag for virtual addresses using stxa instruction
and one of the MCD specific ASIs. Each stxa instruction sets the
given tag for one ADI block size number of bytes. This step must
be repeated for entire page to set tags for entire page.”h]”hŒûSet the version tag for virtual addresses using stxa instruction
and one of the MCD specific ASIs. Each stxa instruction sets the
given tag for one ADI block size number of bytes. This step must
be repeated for entire page to set tags for entire page.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhh×hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1hÕhh£hžhhŸh¶h Kubh¸)”}”(hX±  ADI block size for the platform is provided by the hypervisor to kernel
in machine description tables. Hypervisor also provides the number of
top bits in the virtual address that specify the version tag.  Once
version tag has been set for a memory location, the tag is stored in the
physical memory and the same tag must be present in the ADI version tag
bits of the virtual address being presented to the MMU. For example on
SPARC M7 processor, MMU uses bits 63-60 for version tags and ADI block
size is same as cacheline size which is 64 bytes. A task that sets ADI
version to, say 10, on a range of memory, must access that memory using
virtual addresses that contain 0xa in bits 63-60.”h]”hX±  ADI block size for the platform is provided by the hypervisor to kernel
in machine description tables. Hypervisor also provides the number of
top bits in the virtual address that specify the version tag.  Once
version tag has been set for a memory location, the tag is stored in the
physical memory and the same tag must be present in the ADI version tag
bits of the virtual address being presented to the MMU. For example on
SPARC M7 processor, MMU uses bits 63-60 for version tags and ADI block
size is same as cacheline size which is 64 bytes. A task that sets ADI
version to, say 10, on a range of memory, must access that memory using
virtual addresses that contain 0xa in bits 63-60.”…””}”(hj/  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¸)”}”(hX  ADI is enabled on a set of pages using mprotect() with PROT_ADI flag.
When ADI is enabled on a set of pages by a task for the first time,
kernel sets the PSTATE.mcde bit for the task. Version tags for memory
addresses are set with an stxa instruction on the addresses using
ASI_MCD_PRIMARY or ASI_MCD_ST_BLKINIT_PRIMARY. ADI block size is
provided by the hypervisor to the kernel.  Kernel returns the value of
ADI block size to userspace using auxiliary vector along with other ADI
info. Following auxiliary vectors are provided by the kernel:”h]”hX  ADI is enabled on a set of pages using mprotect() with PROT_ADI flag.
When ADI is enabled on a set of pages by a task for the first time,
kernel sets the PSTATE.mcde bit for the task. Version tags for memory
addresses are set with an stxa instruction on the addresses using
ASI_MCD_PRIMARY or ASI_MCD_ST_BLKINIT_PRIMARY. ADI block size is
provided by the hypervisor to the kernel.  Kernel returns the value of
ADI block size to userspace using auxiliary vector along with other ADI
info. Following auxiliary vectors are provided by the kernel:”…””}”(hj=  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K'hh£hžhubhŒblock_quote”“”)”}”(hX"  ============    ===========================================
AT_ADI_BLKSZ    ADI block size. This is the granularity and
                alignment, in bytes, of ADI versioning.
AT_ADI_NBITS    Number of ADI version bits in the VA
============    ===========================================

”h]”hŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j[  hjX  ubj\  )”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”K+uh1j[  hjX  ubhŒtbody”“”)”}”(hhh]”(hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”h¸)”}”(hŒAT_ADI_BLKSZ”h]”hŒAT_ADI_BLKSZ”…””}”(hj€  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K1hj}  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j{  hjx  ubj|  )”}”(hhh]”h¸)”}”(hŒSADI block size. This is the granularity and
alignment, in bytes, of ADI versioning.”h]”hŒSADI block size. This is the granularity and
alignment, in bytes, of ADI versioning.”…””}”(hj—  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K1hj”  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j{  hjx  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jv  hjs  ubjw  )”}”(hhh]”(j|  )”}”(hhh]”h¸)”}”(hŒAT_ADI_NBITS”h]”hŒAT_ADI_NBITS”…””}”(hj·  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K3hj´  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j{  hj±  ubj|  )”}”(hhh]”h¸)”}”(hŒ$Number of ADI version bits in the VA”h]”hŒ$Number of ADI version bits in the VA”…””}”(hjÎ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K3hjË  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j{  hj±  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jv  hjs  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jq  hjX  ubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1jV  hjS  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jQ  hjM  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jK  hŸh¶h K0hh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒIMPORTANT NOTES”h]”hŒIMPORTANT NOTES”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj  hžhhŸh¶h K8ubhŒbullet_list”“”)”}”(hhh]”(hÛ)”}”(hŒ‡Version tag values of 0x0 and 0xf are reserved. These values match any
tag in virtual address and never generate a mismatch exception.
”h]”h¸)”}”(hŒ†Version tag values of 0x0 and 0xf are reserved. These values match any
tag in virtual address and never generate a mismatch exception.”h]”hŒ†Version tag values of 0x0 and 0xf are reserved. These values match any
tag in virtual address and never generate a mismatch exception.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K:hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h NubhÛ)”}”(hŒÒVersion tags are set on virtual addresses from userspace even though
tags are stored in physical memory. Tags are set on a physical page
after it has been allocated to a task and a pte has been created for
it.
”h]”h¸)”}”(hŒÑVersion tags are set on virtual addresses from userspace even though
tags are stored in physical memory. Tags are set on a physical page
after it has been allocated to a task and a pte has been created for
it.”h]”hŒÑVersion tags are set on virtual addresses from userspace even though
tags are stored in physical memory. Tags are set on a physical page
after it has been allocated to a task and a pte has been created for
it.”…””}”(hj3  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K=hj/  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h NubhÛ)”}”(hX‹  When a task frees a memory page it had set version tags on, the page
goes back to free page pool. When this page is re-allocated to a task,
kernel clears the page using block initialization ASI which clears the
version tags as well for the page. If a page allocated to a task is
freed and allocated back to the same task, old version tags set by the
task on that page will no longer be present.
”h]”h¸)”}”(hXŠ  When a task frees a memory page it had set version tags on, the page
goes back to free page pool. When this page is re-allocated to a task,
kernel clears the page using block initialization ASI which clears the
version tags as well for the page. If a page allocated to a task is
freed and allocated back to the same task, old version tags set by the
task on that page will no longer be present.”h]”hXŠ  When a task frees a memory page it had set version tags on, the page
goes back to free page pool. When this page is re-allocated to a task,
kernel clears the page using block initialization ASI which clears the
version tags as well for the page. If a page allocated to a task is
freed and allocated back to the same task, old version tags set by the
task on that page will no longer be present.”…””}”(hjK  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KBhjG  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h NubhÛ)”}”(hŒ<ADI tag mismatches are not detected for non-faulting loads.
”h]”h¸)”}”(hŒ;ADI tag mismatches are not detected for non-faulting loads.”h]”hŒ;ADI tag mismatches are not detected for non-faulting loads.”…””}”(hjc  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KIhj_  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h NubhÛ)”}”(hX  Kernel does not set any tags for user pages and it is entirely a
task's responsibility to set any version tags. Kernel does ensure the
version tags are preserved if a page is swapped out to the disk and
swapped back in. It also preserves that version tags if a page is
migrated.
”h]”h¸)”}”(hX  Kernel does not set any tags for user pages and it is entirely a
task's responsibility to set any version tags. Kernel does ensure the
version tags are preserved if a page is swapped out to the disk and
swapped back in. It also preserves that version tags if a page is
migrated.”h]”hX  Kernel does not set any tags for user pages and it is entirely a
taskâ€™s responsibility to set any version tags. Kernel does ensure the
version tags are preserved if a page is swapped out to the disk and
swapped back in. It also preserves that version tags if a page is
migrated.”…””}”(hj{  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KKhjw  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h NubhÛ)”}”(hX1  ADI works for any size pages. A userspace task need not be aware of
page size when using ADI. It can simply select a virtual address
range, enable ADI on the range using mprotect() and set version tags
for the entire range. mprotect() ensures range is aligned to page size
and is a multiple of page size.
”h]”h¸)”}”(hX0  ADI works for any size pages. A userspace task need not be aware of
page size when using ADI. It can simply select a virtual address
range, enable ADI on the range using mprotect() and set version tags
for the entire range. mprotect() ensures range is aligned to page size
and is a multiple of page size.”h]”hX0  ADI works for any size pages. A userspace task need not be aware of
page size when using ADI. It can simply select a virtual address
range, enable ADI on the range using mprotect() and set version tags
for the entire range. mprotect() ensures range is aligned to page size
and is a multiple of page size.”…””}”(hj“  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KQhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h NubhÛ)”}”(hŒkADI tags can only be set on writable memory. For example, ADI tags can
not be set on read-only mappings.


”h]”h¸)”}”(hŒhADI tags can only be set on writable memory. For example, ADI tags can
not be set on read-only mappings.”h]”hŒhADI tags can only be set on writable memory. For example, ADI tags can
not be set on read-only mappings.”…””}”(hj«  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KWhj§  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhj  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j  hŸh¶h K:hj  hžhubeh}”(h]”Œimportant-notes”ah ]”h"]”Œimportant notes”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K8ubh¢)”}”(hhh]”(h§)”}”(hŒADI related traps”h]”hŒADI related traps”…””}”(hjÒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjÏ  hžhhŸh¶h K]ubh¸)”}”(hŒ0With ADI enabled, following new traps may occur:”h]”hŒ0With ADI enabled, following new traps may occur:”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K_hjÏ  hžhubh¢)”}”(hhh]”(h§)”}”(hŒDisrupting memory corruption”h]”hŒDisrupting memory corruption”…””}”(hjñ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjî  hžhhŸh¶h KbubjL  )”}”(hXÕ  When a store accesses a memory location that has TTE.mcd=1,
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
tag in the address used (bits 63:60) does not match the tag set on
the corresponding cacheline, a memory corruption trap occurs. By
default, it is a disrupting trap and is sent to the hypervisor
first. Hypervisor creates a sun4v error report and sends a
resumable error (TT=0x7e) trap to the kernel. The kernel sends
a SIGSEGV to the task that resulted in this trap with the following
info::

        siginfo.si_signo = SIGSEGV;
        siginfo.errno = 0;
        siginfo.si_code = SEGV_ADIDERR;
        siginfo.si_addr = addr; /* PC where first mismatch occurred */
        siginfo.si_trapno = 0;

”h]”(h¸)”}”(hX  When a store accesses a memory location that has TTE.mcd=1,
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
tag in the address used (bits 63:60) does not match the tag set on
the corresponding cacheline, a memory corruption trap occurs. By
default, it is a disrupting trap and is sent to the hypervisor
first. Hypervisor creates a sun4v error report and sends a
resumable error (TT=0x7e) trap to the kernel. The kernel sends
a SIGSEGV to the task that resulted in this trap with the following
info::”h]”hX  When a store accesses a memory location that has TTE.mcd=1,
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
tag in the address used (bits 63:60) does not match the tag set on
the corresponding cacheline, a memory corruption trap occurs. By
default, it is a disrupting trap and is sent to the hypervisor
first. Hypervisor creates a sun4v error report and sends a
resumable error (TT=0x7e) trap to the kernel. The kernel sends
a SIGSEGV to the task that resulted in this trap with the following
info:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kdhjÿ  ubhŒliteral_block”“”)”}”(hŒ¤siginfo.si_signo = SIGSEGV;
siginfo.errno = 0;
siginfo.si_code = SEGV_ADIDERR;
siginfo.si_addr = addr; /* PC where first mismatch occurred */
siginfo.si_trapno = 0;”h]”hŒ¤siginfo.si_signo = SIGSEGV;
siginfo.errno = 0;
siginfo.si_code = SEGV_ADIDERR;
siginfo.si_addr = addr; /* PC where first mismatch occurred */
siginfo.si_trapno = 0;”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1j  hŸh¶h Knhjÿ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jK  hŸh¶h Kdhjî  hžhubeh}”(h]”Œdisrupting-memory-corruption”ah ]”h"]”Œdisrupting memory corruption”ah$]”h&]”uh1h¡hjÏ  hžhhŸh¶h Kbubh¢)”}”(hhh]”(h§)”}”(hŒPrecise memory corruption”h]”hŒPrecise memory corruption”…””}”(hj4  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj1  hžhhŸh¶h KvubjL  )”}”(hXÕ  When a store accesses a memory location that has TTE.mcd=1,
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
tag in the address used (bits 63:60) does not match the tag set on
the corresponding cacheline, a memory corruption trap occurs. If
MCD precise exception is enabled (MCDPERR=1), a precise
exception is sent to the kernel with TT=0x1a. The kernel sends
a SIGSEGV to the task that resulted in this trap with the following
info::

        siginfo.si_signo = SIGSEGV;
        siginfo.errno = 0;
        siginfo.si_code = SEGV_ADIPERR;
        siginfo.si_addr = addr; /* address that caused trap */
        siginfo.si_trapno = 0;

NOTE:
        ADI tag mismatch on a load always results in precise trap.

”h]”(h¸)”}”(hXÃ  When a store accesses a memory location that has TTE.mcd=1,
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
tag in the address used (bits 63:60) does not match the tag set on
the corresponding cacheline, a memory corruption trap occurs. If
MCD precise exception is enabled (MCDPERR=1), a precise
exception is sent to the kernel with TT=0x1a. The kernel sends
a SIGSEGV to the task that resulted in this trap with the following
info::”h]”hXÂ  When a store accesses a memory location that has TTE.mcd=1,
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
tag in the address used (bits 63:60) does not match the tag set on
the corresponding cacheline, a memory corruption trap occurs. If
MCD precise exception is enabled (MCDPERR=1), a precise
exception is sent to the kernel with TT=0x1a. The kernel sends
a SIGSEGV to the task that resulted in this trap with the following
info:”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KxhjB  ubj  )”}”(hŒœsiginfo.si_signo = SIGSEGV;
siginfo.errno = 0;
siginfo.si_code = SEGV_ADIPERR;
siginfo.si_addr = addr; /* address that caused trap */
siginfo.si_trapno = 0;”h]”hŒœsiginfo.si_signo = SIGSEGV;
siginfo.errno = 0;
siginfo.si_code = SEGV_ADIPERR;
siginfo.si_addr = addr; /* address that caused trap */
siginfo.si_trapno = 0;”…””}”hjT  sbah}”(h]”h ]”h"]”h$]”h&]”j!  j"  uh1j  hŸh¶h KhjB  ubhŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hŒBNOTE:
ADI tag mismatch on a load always results in precise trap.

”h]”(hŒterm”“”)”}”(hŒNOTE:”h]”hŒNOTE:”…””}”(hjo  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jm  hŸh¶h K‰hji  ubhŒ
definition”“”)”}”(hhh]”h¸)”}”(hŒ:ADI tag mismatch on a load always results in precise trap.”h]”hŒ:ADI tag mismatch on a load always results in precise trap.”…””}”(hj‚  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kˆhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j}  hji  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jg  hŸh¶h K‰hjd  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jb  hjB  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jK  hŸh¶h Kxhj1  hžhubeh}”(h]”Œprecise-memory-corruption”ah ]”h"]”Œprecise memory corruption”ah$]”h&]”uh1h¡hjÏ  hžhhŸh¶h Kvubh¢)”}”(hhh]”(h§)”}”(hŒMCD disabled”h]”hŒMCD disabled”…””}”(hj³  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj°  hžhhŸh¶h KŒubjL  )”}”(hX>  When a task has not enabled ADI and attempts to set ADI version
on a memory address, processor sends an MCD disabled trap. This
trap is handled by hypervisor first and the hypervisor vectors this
trap through to the kernel as Data Access Exception trap with
fault type set to 0xa (invalid ASI). When this occurs, the kernel
sends the task SIGSEGV signal with following info::

        siginfo.si_signo = SIGSEGV;
        siginfo.errno = 0;
        siginfo.si_code = SEGV_ACCADI;
        siginfo.si_addr = addr; /* address that caused trap */
        siginfo.si_trapno = 0;

”h]”(h¸)”}”(hXw  When a task has not enabled ADI and attempts to set ADI version
on a memory address, processor sends an MCD disabled trap. This
trap is handled by hypervisor first and the hypervisor vectors this
trap through to the kernel as Data Access Exception trap with
fault type set to 0xa (invalid ASI). When this occurs, the kernel
sends the task SIGSEGV signal with following info::”h]”hXv  When a task has not enabled ADI and attempts to set ADI version
on a memory address, processor sends an MCD disabled trap. This
trap is handled by hypervisor first and the hypervisor vectors this
trap through to the kernel as Data Access Exception trap with
fault type set to 0xa (invalid ASI). When this occurs, the kernel
sends the task SIGSEGV signal with following info:”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KŽhjÁ  ubj  )”}”(hŒ›siginfo.si_signo = SIGSEGV;
siginfo.errno = 0;
siginfo.si_code = SEGV_ACCADI;
siginfo.si_addr = addr; /* address that caused trap */
siginfo.si_trapno = 0;”h]”hŒ›siginfo.si_signo = SIGSEGV;
siginfo.errno = 0;
siginfo.si_code = SEGV_ACCADI;
siginfo.si_addr = addr; /* address that caused trap */
siginfo.si_trapno = 0;”…””}”hjÓ  sbah}”(h]”h ]”h"]”h$]”h&]”j!  j"  uh1j  hŸh¶h K•hjÁ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jK  hŸh¶h KŽhj°  hžhubeh}”(h]”Œmcd-disabled”ah ]”h"]”Œmcd disabled”ah$]”h&]”uh1h¡hjÏ  hžhhŸh¶h KŒubh¢)”}”(hhh]”(h§)”}”(hŒSample program to use ADI”h]”hŒSample program to use ADI”…””}”(hjò  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjï  hžhhŸh¶h Kubh¸)”}”(hŒRFollowing sample program is meant to illustrate how to use the ADI
functionality::”h]”hŒQFollowing sample program is meant to illustrate how to use the ADI
functionality:”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KŸhjï  hžhubj  )”}”(hX  #include <unistd.h>
#include <stdio.h>
#include <stdlib.h>
#include <elf.h>
#include <sys/ipc.h>
#include <sys/shm.h>
#include <sys/mman.h>
#include <asm/asi.h>

#ifndef AT_ADI_BLKSZ
#define AT_ADI_BLKSZ  48
#endif
#ifndef AT_ADI_NBITS
#define AT_ADI_NBITS  49
#endif

#ifndef PROT_ADI
#define PROT_ADI      0x10
#endif

#define BUFFER_SIZE     32*1024*1024UL

main(int argc, char* argv[], char* envp[])
{
        unsigned long i, mcde, adi_blksz, adi_nbits;
        char *shmaddr, *tmp_addr, *end, *veraddr, *clraddr;
        int shmid, version;
      Elf64_auxv_t *auxv;

      adi_blksz = 0;

      while(*envp++ != NULL);
      for (auxv = (Elf64_auxv_t *)envp; auxv->a_type != AT_NULL; auxv++) {
              switch (auxv->a_type) {
              case AT_ADI_BLKSZ:
                      adi_blksz = auxv->a_un.a_val;
                      break;
              case AT_ADI_NBITS:
                      adi_nbits = auxv->a_un.a_val;
                      break;
              }
      }
      if (adi_blksz == 0) {
              fprintf(stderr, "Oops! ADI is not supported\n");
              exit(1);
      }

      printf("ADI capabilities:\n");
      printf("\tBlock size = %ld\n", adi_blksz);
      printf("\tNumber of bits = %ld\n", adi_nbits);

        if ((shmid = shmget(2, BUFFER_SIZE,
                                IPC_CREAT | SHM_R | SHM_W)) < 0) {
                perror("shmget failed");
                exit(1);
        }

        shmaddr = shmat(shmid, NULL, 0);
        if (shmaddr == (char *)-1) {
                perror("shm attach failed");
                shmctl(shmid, IPC_RMID, NULL);
                exit(1);
        }

      if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE|PROT_ADI)) {
              perror("mprotect failed");
              goto err_out;
      }

        /* Set the ADI version tag on the shm segment
         */
        version = 10;
        tmp_addr = shmaddr;
        end = shmaddr + BUFFER_SIZE;
        while (tmp_addr < end) {
                asm volatile(
                        "stxa %1, [%0]0x90\n\t"
                        :
                        : "r" (tmp_addr), "r" (version));
                tmp_addr += adi_blksz;
        }
      asm volatile("membar #Sync\n\t");

        /* Create a versioned address from the normal address by placing
       * version tag in the upper adi_nbits bits
         */
        tmp_addr = (void *) ((unsigned long)shmaddr << adi_nbits);
        tmp_addr = (void *) ((unsigned long)tmp_addr >> adi_nbits);
        veraddr = (void *) (((unsigned long)version << (64-adi_nbits))
                        | (unsigned long)tmp_addr);

        printf("Starting the writes:\n");
        for (i = 0; i < BUFFER_SIZE; i++) {
                veraddr[i] = (char)(i);
                if (!(i % (1024 * 1024)))
                        printf(".");
        }
        printf("\n");

        printf("Verifying data...");
      fflush(stdout);
        for (i = 0; i < BUFFER_SIZE; i++)
                if (veraddr[i] != (char)i)
                        printf("\nIndex %lu mismatched\n", i);
        printf("Done.\n");

        /* Disable ADI and clean up
         */
      if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE)) {
              perror("mprotect failed");
              goto err_out;
      }

        if (shmdt((const void *)shmaddr) != 0)
                perror("Detach failure");
        shmctl(shmid, IPC_RMID, NULL);

        exit(0);

err_out:
        if (shmdt((const void *)shmaddr) != 0)
                perror("Detach failure");
        shmctl(shmid, IPC_RMID, NULL);
        exit(1);
}”h]”hX  #include <unistd.h>
#include <stdio.h>
#include <stdlib.h>
#include <elf.h>
#include <sys/ipc.h>
#include <sys/shm.h>
#include <sys/mman.h>
#include <asm/asi.h>

#ifndef AT_ADI_BLKSZ
#define AT_ADI_BLKSZ  48
#endif
#ifndef AT_ADI_NBITS
#define AT_ADI_NBITS  49
#endif

#ifndef PROT_ADI
#define PROT_ADI      0x10
#endif

#define BUFFER_SIZE     32*1024*1024UL

main(int argc, char* argv[], char* envp[])
{
        unsigned long i, mcde, adi_blksz, adi_nbits;
        char *shmaddr, *tmp_addr, *end, *veraddr, *clraddr;
        int shmid, version;
      Elf64_auxv_t *auxv;

      adi_blksz = 0;

      while(*envp++ != NULL);
      for (auxv = (Elf64_auxv_t *)envp; auxv->a_type != AT_NULL; auxv++) {
              switch (auxv->a_type) {
              case AT_ADI_BLKSZ:
                      adi_blksz = auxv->a_un.a_val;
                      break;
              case AT_ADI_NBITS:
                      adi_nbits = auxv->a_un.a_val;
                      break;
              }
      }
      if (adi_blksz == 0) {
              fprintf(stderr, "Oops! ADI is not supported\n");
              exit(1);
      }

      printf("ADI capabilities:\n");
      printf("\tBlock size = %ld\n", adi_blksz);
      printf("\tNumber of bits = %ld\n", adi_nbits);

        if ((shmid = shmget(2, BUFFER_SIZE,
                                IPC_CREAT | SHM_R | SHM_W)) < 0) {
                perror("shmget failed");
                exit(1);
        }

        shmaddr = shmat(shmid, NULL, 0);
        if (shmaddr == (char *)-1) {
                perror("shm attach failed");
                shmctl(shmid, IPC_RMID, NULL);
                exit(1);
        }

      if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE|PROT_ADI)) {
              perror("mprotect failed");
              goto err_out;
      }

        /* Set the ADI version tag on the shm segment
         */
        version = 10;
        tmp_addr = shmaddr;
        end = shmaddr + BUFFER_SIZE;
        while (tmp_addr < end) {
                asm volatile(
                        "stxa %1, [%0]0x90\n\t"
                        :
                        : "r" (tmp_addr), "r" (version));
                tmp_addr += adi_blksz;
        }
      asm volatile("membar #Sync\n\t");

        /* Create a versioned address from the normal address by placing
       * version tag in the upper adi_nbits bits
         */
        tmp_addr = (void *) ((unsigned long)shmaddr << adi_nbits);
        tmp_addr = (void *) ((unsigned long)tmp_addr >> adi_nbits);
        veraddr = (void *) (((unsigned long)version << (64-adi_nbits))
                        | (unsigned long)tmp_addr);

        printf("Starting the writes:\n");
        for (i = 0; i < BUFFER_SIZE; i++) {
                veraddr[i] = (char)(i);
                if (!(i % (1024 * 1024)))
                        printf(".");
        }
        printf("\n");

        printf("Verifying data...");
      fflush(stdout);
        for (i = 0; i < BUFFER_SIZE; i++)
                if (veraddr[i] != (char)i)
                        printf("\nIndex %lu mismatched\n", i);
        printf("Done.\n");

        /* Disable ADI and clean up
         */
      if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE)) {
              perror("mprotect failed");
              goto err_out;
      }

        if (shmdt((const void *)shmaddr) != 0)
                perror("Detach failure");
        shmctl(shmid, IPC_RMID, NULL);

        exit(0);

err_out:
        if (shmdt((const void *)shmaddr) != 0)
                perror("Detach failure");
        shmctl(shmid, IPC_RMID, NULL);
        exit(1);
}”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”j!  j"  uh1j  hŸh¶h K¢hjï  hžhubeh}”(h]”Œsample-program-to-use-adi”ah ]”h"]”Œsample program to use adi”ah$]”h&]”uh1h¡hjÏ  hžhhŸh¶h Kubeh}”(h]”Œadi-related-traps”ah ]”h"]”Œadi related traps”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K]ubeh}”(h]”Œapplication-data-integrity-adi”ah ]”h"]”Œ application data integrity (adi)”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”j{  Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jV  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¶Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j1  j.  jÌ  jÉ  j)  j&  j.  j+  j­  jª  jì  jé  j!  j  uŒ	nametypes”}”(j1  ‰jÌ  ‰j)  ‰j.  ‰j­  ‰jì  ‰j!  ‰uh}”(j.  h£jÉ  j  j&  jÏ  j+  jî  jª  j1  jé  j°  j  jï  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.