sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget)/translations/zh_CN/arch/arm64/elf_hwcapsmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget)/translations/zh_TW/arch/arm64/elf_hwcapsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget)/translations/it_IT/arch/arm64/elf_hwcapsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget)/translations/ja_JP/arch/arm64/elf_hwcapsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget)/translations/ko_KR/arch/arm64/elf_hwcapsmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget)/translations/sp_SP/arch/arm64/elf_hwcapsmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhtarget)}(h.. _elf_hwcaps_index:h]h}(h]h ]h"]h$]h&]refidelf-hwcaps-indexuh1hhKhhhhhC/var/lib/git/docbuild/linux/Documentation/arch/arm64/elf_hwcaps.rstubhsection)}(hhh](htitle)}(hARM64 ELF hwcapsh]hARM64 ELF hwcaps}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hHThis document describes the usage and semantics of the arm64 ELF hwcaps.h]hHThis document describes the usage and semantics of the arm64 ELF hwcaps.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(h1. Introductionh]h1. Introduction}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubh)}(hXSSome hardware or software features are only available on some CPU implementations, and/or with certain kernel configurations, but have no architected discovery mechanism available to userspace code at EL0. The kernel exposes the presence of these features to userspace through a set of flags called hwcaps, exposed in the auxiliary vector.h]hXSSome hardware or software features are only available on some CPU implementations, and/or with certain kernel configurations, but have no architected discovery mechanism available to userspace code at EL0. The kernel exposes the presence of these features to userspace through a set of flags called hwcaps, exposed in the auxiliary vector.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hUserspace software can test for features by acquiring the AT_HWCAP, AT_HWCAP2 or AT_HWCAP3 entry of the auxiliary vector, and testing whether the relevant flags are set, e.g.::h]hUserspace software can test for features by acquiring the AT_HWCAP, AT_HWCAP2 or AT_HWCAP3 entry of the auxiliary vector, and testing whether the relevant flags are set, e.g.:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh literal_block)}(hbool floating_point_is_present(void) { unsigned long hwcaps = getauxval(AT_HWCAP); if (hwcaps & HWCAP_FP) return true; return false; }h]hbool floating_point_is_present(void) { unsigned long hwcaps = getauxval(AT_HWCAP); if (hwcaps & HWCAP_FP) return true; return false; }}hjsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1jhhhKhhhhubh)}(hWhere software relies on a feature described by a hwcap, it should check the relevant hwcap flag to verify that the feature is present before attempting to make use of the feature.h]hWhere software relies on a feature described by a hwcap, it should check the relevant hwcap flag to verify that the feature is present before attempting to make use of the feature.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hXFeatures cannot be probed reliably through other means. When a feature is not available, attempting to use it may result in unpredictable behaviour, and is not guaranteed to result in any reliable indication that the feature is unavailable, such as a SIGILL.h]hXFeatures cannot be probed reliably through other means. When a feature is not available, attempting to use it may result in unpredictable behaviour, and is not guaranteed to result in any reliable indication that the feature is unavailable, such as a SIGILL.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK$hhhhubeh}(h] introductionah ]h"]1. introductionah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(h2. Interpretation of hwcapsh]h2. Interpretation of hwcaps}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hhhhhK+ubh)}(hXWThe majority of hwcaps are intended to indicate the presence of features which are described by architected ID registers inaccessible to userspace code at EL0. These hwcaps are defined in terms of ID register fields, and should be interpreted with reference to the definition of these fields in the ARM Architecture Reference Manual (ARM ARM).h]hXWThe majority of hwcaps are intended to indicate the presence of features which are described by architected ID registers inaccessible to userspace code at EL0. These hwcaps are defined in terms of ID register fields, and should be interpreted with reference to the definition of these fields in the ARM Architecture Reference Manual (ARM ARM).}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hj8hhubh)}(h-Such hwcaps are described below in the form::h]h,Such hwcaps are described below in the form:}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hj8hhubj)}(h,Functionality implied by idreg.field == val.h]h,Functionality implied by idreg.field == val.}hjesbah}(h]h ]h"]h$]h&]jjuh1jhhhK5hj8hhubh)}(hXSuch hwcaps indicate the availability of functionality that the ARM ARM defines as being present when idreg.field has value val, but do not indicate that idreg.field is precisely equal to val, nor do they indicate the absence of functionality implied by other values of idreg.field.h]hXSuch hwcaps indicate the availability of functionality that the ARM ARM defines as being present when idreg.field has value val, but do not indicate that idreg.field is precisely equal to val, nor do they indicate the absence of functionality implied by other values of idreg.field.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hj8hhubh)}(hOther hwcaps may indicate the presence of features which cannot be described by ID registers alone. These may be described without reference to ID registers, and may refer to other documentation.h]hOther hwcaps may indicate the presence of features which cannot be described by ID registers alone. These may be described without reference to ID registers, and may refer to other documentation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj8hhubeh}(h]interpretation-of-hwcapsah ]h"]2. interpretation of hwcapsah$]h&]uh1hhhhhhhhK+ubh)}(hhh](h)}(h!3. The hwcaps exposed in AT_HWCAPh]h!3. The hwcaps exposed in AT_HWCAP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKCubhdefinition_list)}(hhh](hdefinition_list_item)}(h@HWCAP_FP Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000. h](hterm)}(hHWCAP_FPh]hHWCAP_FP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKFhjubh definition)}(hhh]h)}(h6Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000.h]h6Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKFhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKFhjubj)}(hHHWCAP_ASIMD Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000. h](j)}(h HWCAP_ASIMDh]h HWCAP_ASIMD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKIhjubj)}(hhh]h)}(h;Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000.h]h;Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKIhjhhubj)}(hhHWCAP_EVTSTRM The generic timer is configured to generate events at a frequency of approximately 10KHz. h](j)}(h HWCAP_EVTSTRMh]h HWCAP_EVTSTRM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKMhjubj)}(hhh]h)}(hYThe generic timer is configured to generate events at a frequency of approximately 10KHz.h]hYThe generic timer is configured to generate events at a frequency of approximately 10KHz.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhj#ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKMhjhhubj)}(hCHWCAP_AES Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001. h](j)}(h HWCAP_AESh]h HWCAP_AES}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKPhj@ubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.h]h8Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKPhjRubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jhhhKPhjhhubj)}(hEHWCAP_PMULL Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010. h](j)}(h HWCAP_PMULLh]h HWCAP_PMULL}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKShjoubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.h]h8Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jhhhKShjhhubj)}(hEHWCAP_SHA1 Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001. h](j)}(h HWCAP_SHA1h]h HWCAP_SHA1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKVhjubj)}(hhh]h)}(h9Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001.h]h9Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKVhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKVhjhhubj)}(hEHWCAP_SHA2 Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0001. h](j)}(h HWCAP_SHA2h]h HWCAP_SHA2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKYhjubj)}(hhh]h)}(h9Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0001.h]h9Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKYhjhhubj)}(hGHWCAP_CRC32 Functionality implied by ID_AA64ISAR0_EL1.CRC32 == 0b0001. h](j)}(h HWCAP_CRC32h]h HWCAP_CRC32}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK\hjubj)}(hhh]h)}(h:Functionality implied by ID_AA64ISAR0_EL1.CRC32 == 0b0001.h]h:Functionality implied by ID_AA64ISAR0_EL1.CRC32 == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK\hjhhubj)}(hJHWCAP_ATOMICS Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0010. h](j)}(h HWCAP_ATOMICSh]h HWCAP_ATOMICS}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK_hj+ubj)}(hhh]h)}(h;Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0010.h]h;Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0010.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK_hj=ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhhhK_hjhhubj)}(hBHWCAP_FPHP Functionality implied by ID_AA64PFR0_EL1.FP == 0b0001. h](j)}(h HWCAP_FPHPh]h HWCAP_FPHP}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKbhjZubj)}(hhh]h)}(h6Functionality implied by ID_AA64PFR0_EL1.FP == 0b0001.h]h6Functionality implied by ID_AA64PFR0_EL1.FP == 0b0001.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjlubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jhhhKbhjhhubj)}(hJHWCAP_ASIMDHP Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0001. h](j)}(h HWCAP_ASIMDHPh]h HWCAP_ASIMDHP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKehjubj)}(hhh]h)}(h;Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0001.h]h;Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKehjhhubj)}(hHWCAP_CPUID EL0 access to certain ID registers is available, to the extent described by Documentation/arch/arm64/cpu-feature-registers.rst. These ID registers may imply the availability of features. h](j)}(h HWCAP_CPUIDh]h HWCAP_CPUID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKkhjubj)}(hhh](h)}(hEL0 access to certain ID registers is available, to the extent described by Documentation/arch/arm64/cpu-feature-registers.rst.h]hEL0 access to certain ID registers is available, to the extent described by Documentation/arch/arm64/cpu-feature-registers.rst.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhjubh)}(h:These ID registers may imply the availability of features.h]h:These ID registers may imply the availability of features.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKkhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKkhjhhubj)}(hHHWCAP_ASIMDRDM Functionality implied by ID_AA64ISAR0_EL1.RDM == 0b0001. h](j)}(hHWCAP_ASIMDRDMh]hHWCAP_ASIMDRDM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKnhjubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR0_EL1.RDM == 0b0001.h]h8Functionality implied by ID_AA64ISAR0_EL1.RDM == 0b0001.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKnhjhhubj)}(hGHWCAP_JSCVT Functionality implied by ID_AA64ISAR1_EL1.JSCVT == 0b0001. h](j)}(h HWCAP_JSCVTh]h HWCAP_JSCVT}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKqhj$ubj)}(hhh]h)}(h:Functionality implied by ID_AA64ISAR1_EL1.JSCVT == 0b0001.h]h:Functionality implied by ID_AA64ISAR1_EL1.JSCVT == 0b0001.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKqhj6ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jhhhKqhjhhubj)}(hEHWCAP_FCMA Functionality implied by ID_AA64ISAR1_EL1.FCMA == 0b0001. h](j)}(h HWCAP_FCMAh]h HWCAP_FCMA}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKthjSubj)}(hhh]h)}(h9Functionality implied by ID_AA64ISAR1_EL1.FCMA == 0b0001.h]h9Functionality implied by ID_AA64ISAR1_EL1.FCMA == 0b0001.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthjeubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jhhhKthjhhubj)}(hGHWCAP_LRCPC Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001. h](j)}(h HWCAP_LRCPCh]h HWCAP_LRCPC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKwhjubj)}(hhh]h)}(h:Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001.h]h:Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKwhjhhubj)}(hEHWCAP_DCPOP Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001. h](j)}(h HWCAP_DCPOPh]h HWCAP_DCPOP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKzhjubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001.h]h8Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKzhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKzhjhhubj)}(hEHWCAP_SHA3 Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001. h](j)}(h HWCAP_SHA3h]h HWCAP_SHA3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK}hjubj)}(hhh]h)}(h9Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001.h]h9Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK}hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK}hjhhubj)}(hCHWCAP_SM3 Functionality implied by ID_AA64ISAR0_EL1.SM3 == 0b0001. h](j)}(h HWCAP_SM3h]h HWCAP_SM3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR0_EL1.SM3 == 0b0001.h]h8Functionality implied by ID_AA64ISAR0_EL1.SM3 == 0b0001.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hCHWCAP_SM4 Functionality implied by ID_AA64ISAR0_EL1.SM4 == 0b0001. h](j)}(h HWCAP_SM4h]h HWCAP_SM4}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj>ubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR0_EL1.SM4 == 0b0001.h]h8Functionality implied by ID_AA64ISAR0_EL1.SM4 == 0b0001.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjPubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hFHWCAP_ASIMDDP Functionality implied by ID_AA64ISAR0_EL1.DP == 0b0001. h](j)}(h HWCAP_ASIMDDPh]h HWCAP_ASIMDDP}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjmubj)}(hhh]h)}(h7Functionality implied by ID_AA64ISAR0_EL1.DP == 0b0001.h]h7Functionality implied by ID_AA64ISAR0_EL1.DP == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hGHWCAP_SHA512 Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010. h](j)}(h HWCAP_SHA512h]h HWCAP_SHA512}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h9Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.h]h9Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hBHWCAP_SVE Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001. h](j)}(h HWCAP_SVEh]h HWCAP_SVE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h7Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001.h]h7Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hHHWCAP_ASIMDFHM Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001. h](j)}(hHWCAP_ASIMDFHMh]hHWCAP_ASIMDFHM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001.h]h8Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hBHWCAP_DIT Functionality implied by ID_AA64PFR0_EL1.DIT == 0b0001. h](j)}(h HWCAP_DITh]h HWCAP_DIT}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj)ubj)}(hhh]h)}(h7Functionality implied by ID_AA64PFR0_EL1.DIT == 0b0001.h]h7Functionality implied by ID_AA64PFR0_EL1.DIT == 0b0001.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj;ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hDHWCAP_USCAT Functionality implied by ID_AA64MMFR2_EL1.AT == 0b0001. h](j)}(h HWCAP_USCATh]h HWCAP_USCAT}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjXubj)}(hhh]h)}(h7Functionality implied by ID_AA64MMFR2_EL1.AT == 0b0001.h]h7Functionality implied by ID_AA64MMFR2_EL1.AT == 0b0001.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjjubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hHHWCAP_ILRCPC Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010. h](j)}(h HWCAP_ILRCPCh]h HWCAP_ILRCPC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h:Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.h]h:Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hDHWCAP_FLAGM Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001. h](j)}(h HWCAP_FLAGMh]h HWCAP_FLAGM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h7Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.h]h7Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hDHWCAP_SSBS Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010. h](j)}(h HWCAP_SSBSh]h HWCAP_SSBS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h8Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.h]h8Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hAHWCAP_SB Functionality implied by ID_AA64ISAR1_EL1.SB == 0b0001. h](j)}(hHWCAP_SBh]hHWCAP_SB}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h7Functionality implied by ID_AA64ISAR1_EL1.SB == 0b0001.h]h7Functionality implied by ID_AA64ISAR1_EL1.SB == 0b0001.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj&ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hHWCAP_PACA Functionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or ID_AA64ISAR1_EL1.API == 0b0001, as described by Documentation/arch/arm64/pointer-authentication.rst. h](j)}(h HWCAP_PACAh]h HWCAP_PACA}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjCubj)}(hhh]h)}(hFunctionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or ID_AA64ISAR1_EL1.API == 0b0001, as described by Documentation/arch/arm64/pointer-authentication.rst.h]hFunctionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or ID_AA64ISAR1_EL1.API == 0b0001, as described by Documentation/arch/arm64/pointer-authentication.rst.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjUubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hHWCAP_PACG Functionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or ID_AA64ISAR1_EL1.GPI == 0b0001, as described by Documentation/arch/arm64/pointer-authentication.rst. h](j)}(h HWCAP_PACGh]h HWCAP_PACG}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjrubj)}(hhh]h)}(hFunctionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or ID_AA64ISAR1_EL1.GPI == 0b0001, as described by Documentation/arch/arm64/pointer-authentication.rst.h]hFunctionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or ID_AA64ISAR1_EL1.GPI == 0b0001, as described by Documentation/arch/arm64/pointer-authentication.rst.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hqHWCAP_GCS Functionality implied by ID_AA64PFR1_EL1.GCS == 0b1, as described by Documentation/arch/arm64/gcs.rst. h](j)}(h HWCAP_GCSh]h HWCAP_GCS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(hfFunctionality implied by ID_AA64PFR1_EL1.GCS == 0b1, as described by Documentation/arch/arm64/gcs.rst.h]hfFunctionality implied by ID_AA64PFR1_EL1.GCS == 0b1, as described by Documentation/arch/arm64/gcs.rst.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hFHWCAP_CMPBR Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0010. h](j)}(h HWCAP_CMPBRh]h HWCAP_CMPBR}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h9Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0010.h]h9Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0010.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hIHWCAP_FPRCVT Functionality implied by ID_AA64ISAR3_EL1.FPRCVT == 0b0001. h](j)}(h HWCAP_FPRCVTh]h HWCAP_FPRCVT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h;Functionality implied by ID_AA64ISAR3_EL1.FPRCVT == 0b0001.h]h;Functionality implied by ID_AA64ISAR3_EL1.FPRCVT == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hGHWCAP_F8MM8 Functionality implied by ID_AA64FPFR0_EL1.F8MM8 == 0b0001. h](j)}(h HWCAP_F8MM8h]h HWCAP_F8MM8}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj.ubj)}(hhh]h)}(h:Functionality implied by ID_AA64FPFR0_EL1.F8MM8 == 0b0001.h]h:Functionality implied by ID_AA64FPFR0_EL1.F8MM8 == 0b0001.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj@ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hGHWCAP_F8MM4 Functionality implied by ID_AA64FPFR0_EL1.F8MM4 == 0b0001. h](j)}(h HWCAP_F8MM4h]h HWCAP_F8MM4}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj]ubj)}(hhh]h)}(h:Functionality implied by ID_AA64FPFR0_EL1.F8MM4 == 0b0001.h]h:Functionality implied by ID_AA64FPFR0_EL1.F8MM4 == 0b0001.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjoubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hlHWCAP_SVE_F16MM Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.F16MM == 0b0001. h](j)}(hHWCAP_SVE_F16MMh]hHWCAP_SVE_F16MM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h[Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.F16MM == 0b0001.h]h[Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.F16MM == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hpHWCAP_SVE_ELTPERM Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.ELTPERM == 0b0001. h](j)}(hHWCAP_SVE_ELTPERMh]hHWCAP_SVE_ELTPERM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h]Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.ELTPERM == 0b0001.h]h]Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.ELTPERM == 0b0001.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hiHWCAP_SVE_AES2 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0011. h](j)}(hHWCAP_SVE_AES2h]hHWCAP_SVE_AES2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0011.h]hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0011.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hoHWCAP_SVE_BFSCALE Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.B16B16 == 0b0010. h](j)}(hHWCAP_SVE_BFSCALEh]hHWCAP_SVE_BFSCALE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h\Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.B16B16 == 0b0010.h]h\Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.B16B16 == 0b0010.}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj+ ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hjHWCAP_SVE2P2 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SVEver == 0b0011. h](j)}(h HWCAP_SVE2P2h]h HWCAP_SVE2P2}(hjL hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjH ubj)}(hhh]h)}(h\Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SVEver == 0b0011.h]h\Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SVEver == 0b0011.}(hj] hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjZ ubah}(h]h ]h"]h$]h&]uh1jhjH ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hIHWCAP_SME2P2 Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0011. h](j)}(h HWCAP_SME2P2h]h HWCAP_SME2P2}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjw ubj)}(hhh]h)}(h;Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0011.h]h;Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0011.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjw ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hNHWCAP_SME_SBITPERM Functionality implied by ID_AA64SMFR0_EL1.SBitPerm == 0b1. h](j)}(hHWCAP_SME_SBITPERMh]hHWCAP_SME_SBITPERM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h:Functionality implied by ID_AA64SMFR0_EL1.SBitPerm == 0b1.h]h:Functionality implied by ID_AA64SMFR0_EL1.SBitPerm == 0b1.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hDHWCAP_SME_AES Functionality implied by ID_AA64SMFR0_EL1.AES == 0b1. h](j)}(h HWCAP_SME_AESh]h HWCAP_SME_AES}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h5Functionality implied by ID_AA64SMFR0_EL1.AES == 0b1.h]h5Functionality implied by ID_AA64SMFR0_EL1.AES == 0b1.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hJHWCAP_SME_SFEXPA Functionality implied by ID_AA64SMFR0_EL1.SFEXPA == 0b1. h](j)}(hHWCAP_SME_SFEXPAh]hHWCAP_SME_SFEXPA}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h8Functionality implied by ID_AA64SMFR0_EL1.SFEXPA == 0b1.h]h8Functionality implied by ID_AA64SMFR0_EL1.SFEXPA == 0b1.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hHHWCAP_SME_STMOP Functionality implied by ID_AA64SMFR0_EL1.STMOP == 0b1. h](j)}(hHWCAP_SME_STMOPh]hHWCAP_SME_STMOP}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj3 ubj)}(hhh]h)}(h7Functionality implied by ID_AA64SMFR0_EL1.STMOP == 0b1.h]h7Functionality implied by ID_AA64SMFR0_EL1.STMOP == 0b1.}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjE ubah}(h]h ]h"]h$]h&]uh1jhj3 ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hHHWCAP_SME_SMOP4 Functionality implied by ID_AA64SMFR0_EL1.SMOP4 == 0b1. h](j)}(hHWCAP_SME_SMOP4h]hHWCAP_SME_SMOP4}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjb ubj)}(hhh]h)}(h7Functionality implied by ID_AA64SMFR0_EL1.SMOP4 == 0b1.h]h7Functionality implied by ID_AA64SMFR0_EL1.SMOP4 == 0b1.}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjt ubah}(h]h ]h"]h$]h&]uh1jhjb ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hGHWCAP2_DCPODP Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. h](j)}(h HWCAP2_DCPODPh]h HWCAP2_DCPODP}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h8Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.h]h8Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hiHWCAP2_SVE2 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SVEver == 0b0001. h](j)}(h HWCAP2_SVE2h]h HWCAP2_SVE2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h\Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SVEver == 0b0001.h]h\Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SVEver == 0b0001.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hhHWCAP2_SVEAES Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0001. h](j)}(h HWCAP2_SVEAESh]h HWCAP2_SVEAES}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0001.h]hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0001.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hjHWCAP2_SVEPMULL Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0010. h](j)}(hHWCAP2_SVEPMULLh]hHWCAP2_SVEPMULL}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0010.h]hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.AES == 0b0010.}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj0 ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hpHWCAP2_SVEBITPERM Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.BitPerm == 0b0001. h](j)}(hHWCAP2_SVEBITPERMh]hHWCAP2_SVEBITPERM}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjM ubj)}(hhh]h)}(h]Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.BitPerm == 0b0001.h]h]Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.BitPerm == 0b0001.}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj_ ubah}(h]h ]h"]h$]h&]uh1jhjM ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hjHWCAP2_SVESHA3 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SHA3 == 0b0001. h](j)}(hHWCAP2_SVESHA3h]hHWCAP2_SVESHA3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj| ubj)}(hhh]h)}(hZFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SHA3 == 0b0001.h]hZFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SHA3 == 0b0001.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj| ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hhHWCAP2_SVESM4 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SM4 == 0b0001. h](j)}(h HWCAP2_SVESM4h]h HWCAP2_SVESM4}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SM4 == 0b0001.h]hYFunctionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and ID_AA64ZFR0_EL1.SM4 == 0b0001.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hFHWCAP2_FLAGM2 Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. h](j)}(h HWCAP2_FLAGM2h]h HWCAP2_FLAGM2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubj)}(hhh]h)}(h7Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.h]h7Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hJHWCAP2_FRINT Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. h](j)}(h HWCAP2_FRINTh]h HWCAP2_FRINT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhj ubj)}(hhh]h)}(h