Fsphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget0/translations/zh_CN/arch/arm64/acpi_object_usagemodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/zh_TW/arch/arm64/acpi_object_usagemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/it_IT/arch/arm64/acpi_object_usagemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/ja_JP/arch/arm64/acpi_object_usagemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/ko_KR/arch/arm64/acpi_object_usagemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/pt_BR/arch/arm64/acpi_object_usagemodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget0/translations/sp_SP/arch/arm64/acpi_object_usagemodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h ACPI Tablesh]h ACPI Tables}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhJ/var/lib/git/docbuild/linux/Documentation/arch/arm64/acpi_object_usage.rsthKubh paragraph)}(hRThe expectations of individual ACPI tables are discussed in the list that follows.h]hRThe expectations of individual ACPI tables are discussed in the list that follows.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXqIf a section number is used, it refers to a section number in the ACPI specification where the object is defined. If "Signature Reserved" is used, the table signature (the first four bytes of the table) is the only portion of the table recognized by the specification, and the actual table is defined outside of the UEFI Forum (see Section 5.2.6 of the specification).h]hXuIf a section number is used, it refers to a section number in the ACPI specification where the object is defined. If “Signature Reserved” is used, the table signature (the first four bytes of the table) is the only portion of the table recognized by the specification, and the actual table is defined outside of the UEFI Forum (see Section 5.2.6 of the specification).}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hBFor ACPI on arm64, tables also fall into the following categories:h]hBFor ACPI on arm64, tables also fall into the following categories:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(hX- Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT - Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT - Optional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, HMAT, IBFT, IORT, MCHI, MPAM, MPST, MSCT, NFIT, PMTT, PPTT, RASF, SBST, SDEI, SLIT, SPMI, SRAT, STAO, TCPA, TPM2, UEFI, XENV - Not supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, MSDM, OEMx, PDTT, PSDT, RAS2, RSDT, SLIC, WAET, WDAT, WDRT, WPBT h]h bullet_list)}(hhh](h list_item)}(h9Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT h]h)}(h8Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDTh]h8Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhhubj)}(h0Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT h]h)}(h/Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDTh]h/Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhhubj)}(hOptional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, HMAT, IBFT, IORT, MCHI, MPAM, MPST, MSCT, NFIT, PMTT, PPTT, RASF, SBST, SDEI, SLIT, SPMI, SRAT, STAO, TCPA, TPM2, UEFI, XENV h]h)}(hOptional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, HMAT, IBFT, IORT, MCHI, MPAM, MPST, MSCT, NFIT, PMTT, PPTT, RASF, SBST, SDEI, SLIT, SPMI, SRAT, STAO, TCPA, TPM2, UEFI, XENVh]hOptional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, HMAT, IBFT, IORT, MCHI, MPAM, MPST, MSCT, NFIT, PMTT, PPTT, RASF, SBST, SDEI, SLIT, SPMI, SRAT, STAO, TCPA, TPM2, UEFI, XENV}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj4ubah}(h]h ]h"]h$]h&]uh1jhhubj)}(hNot supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, MSDM, OEMx, PDTT, PSDT, RAS2, RSDT, SLIC, WAET, WDAT, WDRT, WPBT h]h)}(hNot supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, MSDM, OEMx, PDTT, PSDT, RAS2, RSDT, SLIC, WAET, WDAT, WDRT, WPBTh]hNot supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, MSDM, OEMx, PDTT, PSDT, RAS2, RSDT, SLIC, WAET, WDAT, WDRT, WPBT}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjLubah}(h]h ]h"]h$]h&]uh1jhhubeh}(h]h ]h"]h$]h&]bullet-uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1j|hjyubj})}(hhh]h}(h]h ]h"]h$]h&]colwidthKOuh1j|hjyubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hTableh]hTable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hUsage for ARMv8 Linuxh]hUsage for ARMv8 Linux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjyubhtbody)}(hhh](j)}(hhh](j)}(hhh]h)}(hAESTh]hAEST}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "AEST")h]h,Signature Reserved (signature == “AEST”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(h**Arm Error Source Table**h]hstrong)}(hj h]hArm Error Source Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhK hjubh)}(hlThis table informs the OS of any error nodes in the system that are compliant with the Arm RAS architecture.h]hlThis table informs the OS of any error nodes in the system that are compliant with the Arm RAS architecture.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK"hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hAGDIh]hAGDI}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hj>ubah}(h]h ]h"]h$]h&]uh1jhj;ubj)}(hhh](h)}(h(Signature Reserved (signature == "AGDI")h]h,Signature Reserved (signature == “AGDI”)}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK%hjUubh)}(h@**Arm Generic diagnostic Dump and Reset Device Interface Table**h]j )}(hjhh]hhjiubeh}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hBGRTh]hBGRT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.22 (signature == "BGRT")h]h(Section 5.2.22 (signature == “BGRT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hjubh)}(h **Boot Graphics Resource Table**h]j )}(hjh]hBoot Graphics Resource Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubh)}(hKOptional, not currently supported, with no real use-case for an ARM server.h]hKOptional, not currently supported, with no real use-case for an ARM server.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hCEDTh]hCEDT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "CEDT")h]h,Signature Reserved (signature == “CEDT”)}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhj!ubh)}(h**CXL Early Discovery Table**h]j )}(hj4h]hCXL Early Discovery Table}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhhhKIhj!ubh)}(hXThis table allows the OS to discover any CXL Host Bridges and the Host Bridge registers.h]hXThis table allows the OS to discover any CXL Host Bridges and the Host Bridge registers.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhj!ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hCPEPh]hCPEP}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjfubah}(h]h ]h"]h$]h&]uh1jhjcubj)}(hhh](h)}(h$Section 5.2.18 (signature == "CPEP")h]h(Section 5.2.18 (signature == “CPEP”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhj}ubh)}(h***Corrected Platform Error Polling table**h]j )}(hjh]h&Corrected Platform Error Polling table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKPhj}ubh)}(hOptional, not currently supported, and not recommended until such time as ARM-compatible hardware is available, and the specification suitably modified.h]hOptional, not currently supported, and not recommended until such time as ARM-compatible hardware is available, and the specification suitably modified.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKRhj}ubeh}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hCSRTh]hCSRT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKVhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "CSRT")h]h,Signature Reserved (signature == “CSRT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKVhjubh)}(h**Core System Resources Table**h]j )}(hjh]hCore System Resources Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKXhjubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKZhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hDBG2h]hDBG2}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "DBG2")h]h,Signature Reserved (signature == “DBG2”)}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK\hj5ubh)}(h**DeBuG port table 2**h]j )}(hjHh]hDeBuG port table 2}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hhhhK^hj5ubh)}(hmLicense has changed and should be usable. Optional if used instead of earlycon= on the command line.h]hmLicense has changed and should be usable. Optional if used instead of earlycon= on the command line.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hj5ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hDBGPh]hDBGP}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjzubah}(h]h ]h"]h$]h&]uh1jhjwubj)}(hhh](h)}(h(Signature Reserved (signature == "DBGP")h]h,Signature Reserved (signature == “DBGP”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubh)}(h**DeBuG Port table**h]j )}(hjh]hDeBuG Port table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKehjubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghjubeh}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hDSDTh]hDSDT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h&Section 5.2.11.1 (signature == "DSDT")h]h*Section 5.2.11.1 (signature == “DSDT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihjubh)}(h+**Differentiated System Description Table**h]j )}(hjh]h'Differentiated System Description Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKkhjubh)}(h"A DSDT is required; see also SSDT.h]h"A DSDT is required; see also SSDT.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubh)}(hACPI tables contain only one DSDT but can contain one or more SSDTs, which are optional. Each SSDT can only add to the ACPI namespace, but cannot modify or replace anything in the DSDT.h]hACPI tables contain only one DSDT but can contain one or more SSDTs, which are optional. Each SSDT can only add to the ACPI namespace, but cannot modify or replace anything in the DSDT.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hDMARh]hDMAR}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshj@ubah}(h]h ]h"]h$]h&]uh1jhj=ubj)}(hhh](h)}(h(Signature Reserved (signature == "DMAR")h]h,Signature Reserved (signature == “DMAR”)}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjWubh)}(h**DMA Remapping table**h]j )}(hjjh]hDMA Remapping table}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1hhhhKuhjWubh)}(h&x86 only table, will not be supported.h]h&x86 only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhjWubeh}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hDRTMh]hDRTM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKyhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "DRTM")h]h,Signature Reserved (signature == “DRTM”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKyhjubh)}(h/**Dynamic Root of Trust for Measurement table**h]j )}(hjh]h+Dynamic Root of Trust for Measurement table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhK{hjubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK}hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hECDTh]hECDT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.16 (signature == "ECDT")h]h(Section 5.2.16 (signature == “ECDT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(h)**Embedded Controller Description Table**h]j )}(hj"h]h%Embedded Controller Description Table}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hOptional, not currently supported, but could be used on ARM if and only if one uses the GPE_BIT field to represent an IRQ number, since there are no GPE blocks defined in hardware reduced mode. This would need to be modified in the ACPI specification.h]hOptional, not currently supported, but could be used on ARM if and only if one uses the GPE_BIT field to represent an IRQ number, since there are no GPE blocks defined in hardware reduced mode. This would need to be modified in the ACPI specification.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hEINJh]hEINJ}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjTubah}(h]h ]h"]h$]h&]uh1jhjQubj)}(hhh](h)}(h"Section 18.6 (signature == "EINJ")h]h&Section 18.6 (signature == “EINJ”)}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjkubh)}(h**Error Injection table**h]j )}(hj~h]hError Injection table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhhhKhjkubh)}(hX:This table is very useful for testing platform response to error conditions; it allows one to inject an error into the system as if it had actually occurred. However, this table should not be shipped with a production system; it should be dynamically loaded and executed with the ACPICA tools only during testing.h]hX:This table is very useful for testing platform response to error conditions; it allows one to inject an error into the system as if it had actually occurred. However, this table should not be shipped with a production system; it should be dynamically loaded and executed with the ACPICA tools only during testing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjkubeh}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hERSTh]hERST}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h"Section 18.5 (signature == "ERST")h]h&Section 18.5 (signature == “ERST”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(h$**Error Record Serialization Table**h]j )}(hjh]h Error Record Serialization Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hXOn a platform supports RAS, this table must be supplied if it is not UEFI-based; if it is UEFI-based, this table may be supplied. When this table is not present, UEFI run time service will be utilized to save and retrieve hardware error information to and from a persistent store.h]hXOn a platform supports RAS, this table must be supplied if it is not UEFI-based; if it is UEFI-based, this table may be supplied. When this table is not present, UEFI run time service will be utilized to save and retrieve hardware error information to and from a persistent store.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hETDTh]hETDT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "ETDT")h]h,Signature Reserved (signature == “ETDT”)}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj#ubh)}(h!**Event Timer Description Table**h]j )}(hj6h]hEvent Timer Description Table}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1hhhhKhj#ubh)}(h&Obsolete table, will not be supported.h]h&Obsolete table, will not be supported.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj#ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hFACSh]hFACS}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhubah}(h]h ]h"]h$]h&]uh1jhjeubj)}(hhh](h)}(h$Section 5.2.10 (signature == "FACS")h]h(Section 5.2.10 (signature == “FACS”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(h#**Firmware ACPI Control Structure**h]j )}(hjh]hFirmware ACPI Control Structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hIt is unlikely that this table will be terribly useful. If it is provided, the Global Lock will NOT be used since it is not part of the hardware reduced profile, and only 64-bit address fields will be considered valid.h]hIt is unlikely that this table will be terribly useful. If it is provided, the Global Lock will NOT be used since it is not part of the hardware reduced profile, and only 64-bit address fields will be considered valid.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hFADTh]hFADT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h#Section 5.2.9 (signature == "FACP")h]h'Section 5.2.9 (signature == “FACP”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(h4**Fixed ACPI Description Table** Required for arm64.h](j )}(h **Fixed ACPI Description Table**h]hFixed ACPI Description Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh Required for arm64.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hThe HW_REDUCED_ACPI flag must be set. All of the fields that are to be ignored when HW_REDUCED_ACPI is set are expected to be set to zero.h]hThe HW_REDUCED_ACPI flag must be set. All of the fields that are to be ignored when HW_REDUCED_ACPI is set are expected to be set to zero.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hYIf an FACS table is provided, the X_FIRMWARE_CTRL field is to be used, not FIRMWARE_CTRL.h]hYIf an FACS table is provided, the X_FIRMWARE_CTRL field is to be used, not FIRMWARE_CTRL.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hIf PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is filled in properly - that the PSCI_COMPLIANT flag is set and that PSCI_USE_HVC is set or unset as needed (see table 5-37).h]hIf PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is filled in properly - that the PSCI_COMPLIANT flag is set and that PSCI_USE_HVC is set or unset as needed (see table 5-37).}(hj$ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hWFor the DSDT that is also required, the X_DSDT field is to be used, not the DSDT field.h]hWFor the DSDT that is also required, the X_DSDT field is to be used, not the DSDT field.}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hFPDTh]hFPDT}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjO ubah}(h]h ]h"]h$]h&]uh1jhjL ubj)}(hhh](h)}(h$Section 5.2.23 (signature == "FPDT")h]h(Section 5.2.23 (signature == “FPDT”)}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjf ubh)}(h#**Firmware Performance Data Table**h]j )}(hjy h]hFirmware Performance Data Table}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjw ubah}(h]h ]h"]h$]h&]uh1hhhhKhjf ubh)}(h0Optional, useful for boot performance profiling.h]h0Optional, useful for boot performance profiling.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjf ubeh}(h]h ]h"]h$]h&]uh1jhjL ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hGTDTh]hGTDT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h$Section 5.2.24 (signature == "GTDT")h]h(Section 5.2.24 (signature == “GTDT”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h#**Generic Timer Description Table**h]j )}(hj h]hGeneric Timer Description Table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hRequired for arm64.h]hRequired for arm64.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hHESTh]hHEST}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h$Section 18.3.2 (signature == "HEST")h]h(Section 18.3.2 (signature == “HEST”)}(hj! hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h**Hardware Error Source Table**h]j )}(hj1 h]hHardware Error Source Table}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ ubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hX&ARM-specific error sources have been defined; please use those or the PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER Bridge), or use type 9 (Generic Hardware Error Source). Firmware first error handling is possible if and only if Trusted Firmware is being used on arm64.h]hX&ARM-specific error sources have been defined; please use those or the PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER Bridge), or use type 9 (Generic Hardware Error Source). Firmware first error handling is possible if and only if Trusted Firmware is being used on arm64.}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hgMust be supplied if RAS support is provided by the platform. It is recommended this table be supplied.h]hgMust be supplied if RAS support is provided by the platform. It is recommended this table be supplied.}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hHMATh]hHMAT}(hjt hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjq ubah}(h]h ]h"]h$]h&]uh1jhjn ubj)}(hhh](h)}(h$Section 5.2.28 (signature == "HMAT")h]h(Section 5.2.28 (signature == “HMAT”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h(**Heterogeneous Memory Attribute Table**h]j )}(hj h]h$Heterogeneous Memory Attribute Table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hThis table describes the memory attributes, such as memory side cache attributes and bandwidth and latency details, related to Memory Proximity Domains. The OS uses this information to optimize the system memory configuration.h]hThis table describes the memory attributes, such as memory side cache attributes and bandwidth and latency details, related to Memory Proximity Domains. The OS uses this information to optimize the system memory configuration.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhjn ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hHPETh]hHPET}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "HPET")h]h,Signature Reserved (signature == “HPET”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h$**High Precision Event timer Table**h]j )}(hj h]h High Precision Event timer Table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h&x86 only table, will not be supported.h]h&x86 only table, will not be supported.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hIBFTh]hIBFT}(hj, hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj) ubah}(h]h ]h"]h$]h&]uh1jhj& ubj)}(hhh](h)}(h(Signature Reserved (signature == "IBFT")h]h,Signature Reserved (signature == “IBFT”)}(hjC hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj@ ubh)}(h**iSCSI Boot Firmware Table**h]j )}(hjS h]hiSCSI Boot Firmware Table}(hjU hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQ ubah}(h]h ]h"]h$]h&]uh1hhhhKhj@ ubh)}(h%Microsoft defined table, support TBD.h]h%Microsoft defined table, support TBD.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj@ ubeh}(h]h ]h"]h$]h&]uh1jhj& ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hIORTh]hIORT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "IORT")h]h,Signature Reserved (signature == “IORT”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h **Input Output Remapping Table**h]j )}(hj h]hInput Output Remapping Table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(hXaarm64 only table, required in order to describe IO topology, SMMUs, and GIC ITSs, and how those various components are connected together, such as identifying which components are behind which SMMUs/ITSs. This table will only be required on certain SBSA platforms (e.g., when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it remains optional.h]hXaarm64 only table, required in order to describe IO topology, SMMUs, and GIC ITSs, and how those various components are connected together, such as identifying which components are behind which SMMUs/ITSs. This table will only be required on certain SBSA platforms (e.g., when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it remains optional.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hIVRSh]hIVRS}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "IVRS")h]h,Signature Reserved (signature == “IVRS”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h***I/O Virtualization Reporting Structure**h]j )}(hj h]h&I/O Virtualization Reporting Structure}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubh)}(h/x86_64 (AMD) only table, will not be supported.h]h/x86_64 (AMD) only table, will not be supported.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hLPITh]hLPIT}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj= ubah}(h]h ]h"]h$]h&]uh1jhj: ubj)}(hhh](h)}(h(Signature Reserved (signature == "LPIT")h]h,Signature Reserved (signature == “LPIT”)}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjT ubh)}(h**Low Power Idle Table**h]j )}(hjg h]hLow Power Idle Table}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1j hje ubah}(h]h ]h"]h$]h&]uh1hhhhKhjT ubh)}(hx86 only table as of ACPI 5.1; starting with ACPI 6.0, processor descriptions and power states on ARM platforms should use the DSDT and define processor container devices (_HID ACPI0010, Section 8.4, and more specifically 8.4.3 and 8.4.4).h]hx86 only table as of ACPI 5.1; starting with ACPI 6.0, processor descriptions and power states on ARM platforms should use the DSDT and define processor container devices (_HID ACPI0010, Section 8.4, and more specifically 8.4.3 and 8.4.4).}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjT ubeh}(h]h ]h"]h$]h&]uh1jhj: ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMADTh]hMADT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h$Section 5.2.12 (signature == "APIC")h]h(Section 5.2.12 (signature == “APIC”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubh)}(h#**Multiple APIC Description Table**h]j )}(hj h]hMultiple APIC Description Table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubh)}(hcRequired for arm64. Only the GIC interrupt controller structures should be used (types 0xA - 0xF).h]hcRequired for arm64. Only the GIC interrupt controller structures should be used (types 0xA - 0xF).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMCFGh]hMCFG}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "MCFG")h]h,Signature Reserved (signature == “MCFG”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj ubh)}(h%**Memory-mapped ConFiGuration space**h]j )}(hj h]h!Memory-mapped ConFiGuration space}(hj! hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubh)}(h=If the platform supports PCI/PCIe, an MCFG table is required.h]h=If the platform supports PCI/PCIe, an MCFG table is required.}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMCHIh]hMCHI}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjQ ubah}(h]h ]h"]h$]h&]uh1jhjN ubj)}(hhh](h)}(h(Signature Reserved (signature == "MCHI")h]h,Signature Reserved (signature == “MCHI”)}(hjk hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjh ubh)}(h.**Management Controller Host Interface table**h]j )}(hj{ h]h*Management Controller Host Interface table}(hj} hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjy ubah}(h]h ]h"]h$]h&]uh1hhhhMhjh ubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjh ubeh}(h]h ]h"]h$]h&]uh1jhjN ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMPAMh]hMPAM}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "MPAM")h]h,Signature Reserved (signature == “MPAM”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubh)}(h,**Memory Partitioning And Monitoring table**h]j )}(hj h]h(Memory Partitioning And Monitoring table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubh)}(hUThis table allows the OS to discover the MPAM controls implemented by the subsystems.h]hUThis table allows the OS to discover the MPAM controls implemented by the subsystems.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMPSTh]hMPST}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.21 (signature == "MPST")h]h(Section 5.2.21 (signature == “MPST”)}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj ubh)}(h**Memory Power State Table**h]j )}(hj3h]hMemory Power State Table}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhhhM"hj ubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM$hj ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMSCTh]hMSCT}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM&hjeubah}(h]h ]h"]h$]h&]uh1jhjbubj)}(hhh](h)}(h$Section 5.2.19 (signature == "MSCT")h]h(Section 5.2.19 (signature == “MSCT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM&hj|ubh)}(h'**Maximum System Characteristic Table**h]j )}(hjh]h#Maximum System Characteristic Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhM(hj|ubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM*hj|ubeh}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hMSDMh]hMSDM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM,hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "MSDM")h]h,Signature Reserved (signature == “MSDM”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM,hjubh)}(h#**Microsoft Data Management table**h]j )}(hjh]hMicrosoft Data Management table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhM.hjubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM0hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hNFITh]hNFIT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM2hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.25 (signature == "NFIT")h]h(Section 5.2.25 (signature == “NFIT”)}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM2hj4ubh)}(h#**NVDIMM Firmware Interface Table**h]j )}(hjGh]hNVDIMM Firmware Interface Table}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhhhM4hj4ubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM6hj4ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hOEMxh]hOEMx}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM8hjyubah}(h]h ]h"]h$]h&]uh1jhjvubj)}(hhh](h)}(hSignature of "OEMx" onlyh]hSignature of “OEMx” only}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM8hjubh)}(h**OEM Specific Tables**h]j )}(hjh]hOEM Specific Tables}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhM:hjubh)}(hAll tables starting with a signature of "OEM" are reserved for OEM use. Since these are not meant to be of general use but are limited to very specific end users, they are not recommended for use and are not supported by the kernel for arm64.h]hAll tables starting with a signature of “OEM” are reserved for OEM use. Since these are not meant to be of general use but are limited to very specific end users, they are not recommended for use and are not supported by the kernel for arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM<hjubeh}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPCCTh]hPCCT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h!Section 14.1 (signature == "PCCT)h]h#Section 14.1 (signature == “PCCT)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjubh)}(h)**Platform Communications Channel Table**h]j )}(hjh]h%Platform Communications Channel Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMChjubh)}(hRecommend for use on arm64; use of PCC is recommended when using CPPC to control performance and power for platform processors.h]hRecommend for use on arm64; use of PCC is recommended when using CPPC to control performance and power for platform processors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPDTTh]hPDTT}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhj1ubah}(h]h ]h"]h$]h&]uh1jhj.ubj)}(hhh](h)}(h$Section 5.2.29 (signature == "PDTT")h]h(Section 5.2.29 (signature == “PDTT”)}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjHubh)}(h **Platform Debug Trigger Table**h]j )}(hj[h]hPlatform Debug Trigger Table}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhhhMJhjHubh)}(hZThis table describes PCC channels used to gather debug logs of non-architectural features.h]hZThis table describes PCC channels used to gather debug logs of non-architectural features.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMLhjHubeh}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPMTTh]hPMTT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h'Section 5.2.21.12 (signature == "PMTT")h]h+Section 5.2.21.12 (signature == “PMTT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhjubh)}(h"**Platform Memory Topology Table**h]j )}(hjh]hPlatform Memory Topology Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMRhjubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMThjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPPTTh]hPPTT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMVhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.30 (signature == "PPTT")h]h(Section 5.2.30 (signature == “PPTT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMVhjubh)}(h'**Processor Properties Topology Table**h]j )}(hjh]h#Processor Properties Topology Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMXhjubh)}(h5This table provides the processor and cache topology.h]h5This table provides the processor and cache topology.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMZhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hPSDTh]hPSDT}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM\hjEubah}(h]h ]h"]h$]h&]uh1jhjBubj)}(hhh](h)}(h&Section 5.2.11.3 (signature == "PSDT")h]h*Section 5.2.11.3 (signature == “PSDT”)}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM\hj\ubh)}(h'**Persistent System Description Table**h]j )}(hjoh]h#Persistent System Description Table}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hhhhM^hj\ubh)}(h&Obsolete table, will not be supported.h]h&Obsolete table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM`hj\ubeh}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hRAS2h]hRAS2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMbhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.21 (signature == "RAS2")h]h(Section 5.2.21 (signature == “RAS2”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMbhjubh)}(h**RAS Features 2 table**h]j )}(hjh]hRAS Features 2 table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMdhjubh)}(hTThis table provides interfaces for the RAS capabilities implemented in the platform.h]hTThis table provides interfaces for the RAS capabilities implemented in the platform.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMfhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hRASFh]hRASF}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMihjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.20 (signature == "RASF")h]h(Section 5.2.20 (signature == “RASF”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMihjubh)}(h**RAS Feature table**h]j )}(hj'h]hRAS Feature table}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhhhMkhjubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMmhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hRSDPh]hRSDP}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMohjYubah}(h]h ]h"]h$]h&]uh1jhjVubj)}(hhh](h)}(h&Section 5.2.5 (signature == "RSD PTR")h]h*Section 5.2.5 (signature == “RSD PTR”)}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMohjpubh)}(h#**Root System Description PoinTeR**h]j )}(hjh]hRoot System Description PoinTeR}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMqhjpubh)}(hRequired for arm64.h]hRequired for arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMshjpubeh}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hRSDTh]hRSDT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMuhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h#Section 5.2.7 (signature == "RSDT")h]h'Section 5.2.7 (signature == “RSDT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMuhjubh)}(h!**Root System Description Table**h]j )}(hjh]hRoot System Description Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMwhjubh)}(hSince this table can only provide 32-bit addresses, it is deprecated on arm64, and will not be used. If provided, it will be ignored.h]hSince this table can only provide 32-bit addresses, it is deprecated on arm64, and will not be used. If provided, it will be ignored.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMyhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSBSTh]hSBST}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM|hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h$Section 5.2.14 (signature == "SBST")h]h(Section 5.2.14 (signature == “SBST”)}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM|hj(ubh)}(h!**Smart Battery Subsystem Table**h]j )}(hj;h]hSmart Battery Subsystem Table}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhhhM~hj(ubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj(ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSDEIh]hSDEI}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjmubah}(h]h ]h"]h$]h&]uh1jhjjubj)}(hhh](h)}(h(Signature Reserved (signature == "SDEI")h]h,Signature Reserved (signature == “SDEI”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h0**Software Delegated Exception Interface table**h]j )}(hjh]h,Software Delegated Exception Interface table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h9This table advertises the presence of the SDEI interface.h]h9This table advertises the presence of the SDEI interface.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSLICh]hSLIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "SLIC")h]h,Signature Reserved (signature == “SLIC”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h**Software LIcensing table**h]j )}(hjh]hSoftware LIcensing table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSLITh]hSLIT}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj%ubah}(h]h ]h"]h$]h&]uh1jhj"ubj)}(hhh](h)}(h$Section 5.2.17 (signature == "SLIT")h]h(Section 5.2.17 (signature == “SLIT”)}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj<ubh)}(h.**System Locality distance Information Table**h]j )}(hjOh]h*System Locality distance Information Table}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhhhMhj<ubh)}(h3Optional in general, but required for NUMA systems.h]h3Optional in general, but required for NUMA systems.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj<ubeh}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSPCRh]hSPCR}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhj~ubj)}(hhh](h)}(h(Signature Reserved (signature == "SPCR")h]h,Signature Reserved (signature == “SPCR”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h)**Serial Port Console Redirection table**h]j )}(hjh]h%Serial Port Console Redirection table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hRequired for arm64.h]hRequired for arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSPMIh]hSPMI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "SPMI")h]h,Signature Reserved (signature == “SPMI”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h.**Server Platform Management Interface table**h]j )}(hjh]h*Server Platform Management Interface table}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h"Optional, not currently supported.h]h"Optional, not currently supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSRATh]hSRAT}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj9ubah}(h]h ]h"]h$]h&]uh1jhj6ubj)}(hhh](h)}(h$Section 5.2.16 (signature == "SRAT")h]h(Section 5.2.16 (signature == “SRAT”)}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjPubh)}(h"**System Resource Affinity Table**h]j )}(hjch]hSystem Resource Affinity Table}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhhhMhjPubh)}(hqOptional, but if used, only the GICC Affinity structures are read. To support arm64 NUMA, this table is required.h]hqOptional, but if used, only the GICC Affinity structures are read. To support arm64 NUMA, this table is required.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjPubeh}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSSDTh]hSSDT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h&Section 5.2.11.2 (signature == "SSDT")h]h*Section 5.2.11.2 (signature == “SSDT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h&**Secondary System Description Table**h]j )}(hjh]h"Secondary System Description Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hThese tables are a continuation of the DSDT; these are recommended for use with devices that can be added to a running system, but can also serve the purpose of dividing up device descriptions into more manageable pieces.h]hThese tables are a continuation of the DSDT; these are recommended for use with devices that can be added to a running system, but can also serve the purpose of dividing up device descriptions into more manageable pieces.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hAn SSDT can only ADD to the ACPI namespace. It cannot modify or replace existing device descriptions already in the namespace.h]hAn SSDT can only ADD to the ACPI namespace. It cannot modify or replace existing device descriptions already in the namespace.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hiThese tables are optional, however. ACPI tables should contain only one DSDT but can contain many SSDTs.h]hiThese tables are optional, however. ACPI tables should contain only one DSDT but can contain many SSDTs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hSTAOh]hSTAO}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](h)}(h(Signature Reserved (signature == "STAO")h]h,Signature Reserved (signature == “STAO”)}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj$ubh)}(h**_STA Override table**h]j )}(hj7h]h_STA Override table}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]uh1hhhhMhj$ubh)}(haOptional, but only necessary in virtualized environments in order to hide devices from guest OSs.h]haOptional, but only necessary in virtualized environments in order to hide devices from guest OSs.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj$ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTCPAh]hTCPA}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjiubah}(h]h ]h"]h$]h&]uh1jhjfubj)}(hhh](h)}(h(Signature Reserved (signature == "TCPA")h]h,Signature Reserved (signature == “TCPA”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h-**Trusted Computing Platform Alliance table**h]j )}(hjh]h)Trusted Computing Platform Alliance table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hYOptional, not currently supported, and may need changes to fully interoperate with arm64.h]hYOptional, not currently supported, and may need changes to fully interoperate with arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTPM2h]hTPM2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "TPM2")h]h,Signature Reserved (signature == “TPM2”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h#**Trusted Platform Module 2 table**h]j )}(hjh]hTrusted Platform Module 2 table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hYOptional, not currently supported, and may need changes to fully interoperate with arm64.h]hYOptional, not currently supported, and may need changes to fully interoperate with arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hUEFIh]hUEFI}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj!ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "UEFI")h]h,Signature Reserved (signature == “UEFI”)}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj8ubh)}(h**UEFI ACPI data table**h]j )}(hjKh]hUEFI ACPI data table}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhhhMhj8ubh)}(hLOptional, not currently supported. No known use case for arm64, at present.h]hLOptional, not currently supported. No known use case for arm64, at present.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj8ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hWAETh]hWAET}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}ubah}(h]h ]h"]h$]h&]uh1jhjzubj)}(hhh](h)}(h(Signature Reserved (signature == "WAET")h]h,Signature Reserved (signature == “WAET”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h'**Windows ACPI Emulated devices Table**h]j )}(hjh]h#Windows ACPI Emulated devices Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hWDATh]hWDAT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "WDAT")h]h,Signature Reserved (signature == “WDAT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h**Watch Dog Action Table**h]j )}(hjh]hWatch Dog Action Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hWDRTh]hWDRT}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj5ubah}(h]h ]h"]h$]h&]uh1jhj2ubj)}(hhh](h)}(h(Signature Reserved (signature == "WDRT")h]h,Signature Reserved (signature == “WDRT”)}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjLubh)}(h**Watch Dog Resource Table**h]j )}(hj_h]hWatch Dog Resource Table}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhhhMhjLubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjLubeh}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hWPBTh]hWPBT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "WPBT")h]h,Signature Reserved (signature == “WPBT”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h!**Windows Platform Binary Table**h]j )}(hjh]hWindows Platform Binary Table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h,Microsoft only table, will not be supported.h]h,Microsoft only table, will not be supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hXENVh]hXENV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(h(Signature Reserved (signature == "XENV")h]h,Signature Reserved (signature == “XENV”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h**Xen project table**h]j )}(hjh]hXen project table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(h&Optional, used only by Xen at present.h]h&Optional, used only by Xen at present.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hXSDTh]hXSDT}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjIubah}(h]h ]h"]h$]h&]uh1jhjFubj)}(hhh](h)}(h#Section 5.2.8 (signature == "XSDT")h]h'Section 5.2.8 (signature == “XSDT”)}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj`ubh)}(h%**eXtended System Description Table**h]j )}(hjsh]h!eXtended System Description Table}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hhhhMhj`ubh)}(hRequired for arm64.h]hRequired for arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj`ubeh}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]colsKuh1jwhjtubah}(h]h ]h"]h$]h&]uh1jrhhhhhhhNubh)}(hhh](h)}(h ACPI Objectsh]h ACPI Objects}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXThe expectations on individual ACPI objects that are likely to be used are shown in the list that follows; any object not explicitly mentioned below should be used as needed for a particular platform or particular subsystem, such as power management or PCI.h]hXThe expectations on individual ACPI objects that are likely to be used are shown in the list that follows; any object not explicitly mentioned below should be used as needed for a particular platform or particular subsystem, such as power management or PCI.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubjs)}(hhh]jx)}(hhh](j})}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1j|hjubj})}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1j|hjubj})}(hhh]h}(h]h ]h"]h$]h&]colwidthK8uh1j|hjubj)}(hhh]j)}(hhh](j)}(hhh]h)}(hNameh]hName}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hSectionh]hSection}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hUsage for ARMv8 Linuxh]hUsage for ARMv8 Linux}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]h)}(h_CCAh]h_CCA}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjUubah}(h]h ]h"]h$]h&]uh1jhjRubj)}(hhh]h)}(h6.2.17h]h6.2.17}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjlubah}(h]h ]h"]h$]h&]uh1jhjRubj)}(hhh](h)}(hXRThis method must be defined for all bus masters on arm64 - there are no assumptions made about whether such devices are cache coherent or not. The _CCA value is inherited by all descendants of these devices so it does not need to be repeated. Without _CCA on arm64, the kernel does not know what to do about setting up DMA for the device.h]hXRThis method must be defined for all bus masters on arm64 - there are no assumptions made about whether such devices are cache coherent or not. The _CCA value is inherited by all descendants of these devices so it does not need to be repeated. Without _CCA on arm64, the kernel does not know what to do about setting up DMA for the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubh)}(hX.NB: this method provides default cache coherency attributes; the presence of an SMMU can be used to modify that, however. For example, a master could default to non-coherent, but be made coherent with the appropriate SMMU configuration (see Table 17 of the IORT specification, ARM Document DEN 0049B).h]hX.NB: this method provides default cache coherency attributes; the presence of an SMMU can be used to modify that, however. For example, a master could default to non-coherent, but be made coherent with the appropriate SMMU configuration (see Table 17 of the IORT specification, ARM Document DEN 0049B).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubeh}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_CIDh]h_CID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.1.2h]h6.1.2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hUse as needed, see also _HID.h]hUse as needed, see also _HID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_CLSh]h_CLS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.1.3h]h6.1.3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hUse as needed, see also _HID.h]hUse as needed, see also _HID.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_CPCh]h_CPC}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjMubah}(h]h ]h"]h$]h&]uh1jhjJubj)}(hhh]h)}(h8.4.7.1h]h8.4.7.1}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjdubah}(h]h ]h"]h$]h&]uh1jhjJubj)}(hhh]h)}(hHUse as needed, power management specific. CPPC is recommended on arm64.h]hHUse as needed, power management specific. CPPC is recommended on arm64.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj{ubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_CRSh]h_CRS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.2.2h]h6.2.2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hRequired on arm64.h]hRequired on arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_CSDh]h_CSD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h8.4.2.2h]h8.4.2.2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h2Use as needed, used only in conjunction with _CST.h]h2Use as needed, used only in conjunction with _CST.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_CSTh]h_CST}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj7ubah}(h]h ]h"]h$]h&]uh1jhj4ubj)}(hhh]h)}(h8.4.2.1h]h8.4.2.1}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjNubah}(h]h ]h"]h$]h&]uh1jhj4ubj)}(hhh]h)}(hBLow power idle states (8.4.4) are recommended instead of C-states.h]hBLow power idle states (8.4.4) are recommended instead of C-states.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjeubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_DDNh]h_DDN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.1.4h]h6.1.4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hThis field can be used for a device name. However, it is meant for DOS device names (e.g., COM1), so be careful of its use across OSes.h]hThis field can be used for a device name. However, it is meant for DOS device names (e.g., COM1), so be careful of its use across OSes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_DSDh]h_DSD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM"hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.2.5h]h6.2.5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM"hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](h)}(hTo be used with caution. If this object is used, try to use it within the constraints already defined by the Device Properties UUID. Only in rare circumstances should it be necessary to create a new _DSD UUID.h]hTo be used with caution. If this object is used, try to use it within the constraints already defined by the Device Properties UUID. Only in rare circumstances should it be necessary to create a new _DSD UUID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM"hjubh)}(hXIn either case, submit the _DSD definition along with any driver patches for discussion, especially when device properties are used. A driver will not be considered complete without a corresponding _DSD description. Once approved by kernel maintainers, the UUID or device properties must then be registered with the UEFI Forum; this may cause some iteration as more than one OS will be registering entries.h]hXIn either case, submit the _DSD definition along with any driver patches for discussion, especially when device properties are used. A driver will not be considered complete without a corresponding _DSD description. Once approved by kernel maintainers, the UUID or device properties must then be registered with the UEFI Forum; this may cause some iteration as more than one OS will be registering entries.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM'hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_DSMh]h_DSM}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM0hj/ubah}(h]h ]h"]h$]h&]uh1jhj,ubj)}(hhh]h)}(h9.1.1h]h9.1.1}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM0hjFubah}(h]h ]h"]h$]h&]uh1jhj,ubj)}(hhh]h)}(hDo not use this method. It is not standardized, the return values are not well documented, and it is currently a frequent source of error.h]hDo not use this method. It is not standardized, the return values are not well documented, and it is currently a frequent source of error.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM0hj]ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h\_GLh]h_GL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hj}ubah}(h]h ]h"]h$]h&]uh1jhjzubj)}(hhh]h)}(h5.7.1h]h5.7.1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hjubah}(h]h ]h"]h$]h&]uh1jhjzubj)}(hhh]h)}(hbThis object is not to be used in hardware reduced mode, and therefore should not be used on arm64.h]hbThis object is not to be used in hardware reduced mode, and therefore should not be used on arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_GLKh]h_GLK}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM7hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.5.7h]h6.5.7}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM7hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hThis object requires a global lock be defined; there is no global lock on arm64 since it runs in hardware reduced mode. Hence, do not use this object on arm64.h]hThis object requires a global lock be defined; there is no global lock on arm64 since it runs in hardware reduced mode. Hence, do not use this object on arm64.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM7hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h\_GPEh]h_GPE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM;hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h5.3.1h]h5.3.1}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM;hj0ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hhjgubah}(h]h ]h"]h$]h&]uh1jhjdubj)}(hhh]h)}(h6.1.5h]h6.1.5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM>hj~ubah}(h]h ]h"]h$]h&]uh1jhjdubj)}(hhh]h)}(h[This is the primary object to use in device probing, though _CID and _CLS may also be used.h]h[This is the primary object to use in device probing, though _CID and _CLS may also be used.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM>hjubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_INIh]h_INI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6.5.1h]h6.5.1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hNot required, but can be useful in setting up devices when UEFI leaves them in a state that may not be what the driver expects before it starts probing.h]hNot required, but can be useful in setting up devices when UEFI leaves them in a state that may not be what the driver expects before it starts probing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_LPIh]h_LPI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h8.4.4.3h]h8.4.4.3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hXRecommended for use with processor definitions (_HID ACPI0010) on arm64. See also _RDI.h]hXRecommended for use with processor definitions (_HID ACPI0010) on arm64. See also _RDI.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_MLSh]h_MLS}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjQubah}(h]h ]h"]h$]h&]uh1jhjNubj)}(hhh]h)}(h6.1.7h]h6.1.7}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjhubah}(h]h ]h"]h$]h&]uh1jhjNubj)}(hhh]h)}(h3Highly recommended for use in internationalization.h]h3Highly recommended for use in internationalization.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_OFFh]h_OFF}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMJhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h7.2.2h]h7.2.2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMJhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hTIt is recommended to define this method for any device that can be turned on or off.h]hTIt is recommended to define this method for any device that can be turned on or off.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMJhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_ONh]h_ON}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h7.2.3h]h7.2.3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMMhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hTIt is recommended to define this method for any device that can be turned on or off.h]hTIt is recommended to define this method for any device that can be turned on or off.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h\_OSh]h_OS}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhj; ubah}(h]h ]h"]h$]h&]uh1jhj8 ubj)}(hhh]h)}(h5.7.3h]h5.7.3}(hjU hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhjR ubah}(h]h ]h"]h$]h&]uh1jhj8 ubj)}(hhh]h)}(hThis method will return "Linux" by default (this is the value of the macro ACPI_OS_NAME on Linux). The command line parameter acpi_os= can be used to set it to some other value.h]hThis method will return “Linux” by default (this is the value of the macro ACPI_OS_NAME on Linux). The command line parameter acpi_os= can be used to set it to some other value.}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMPhji ubah}(h]h ]h"]h$]h&]uh1jhj8 ubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_OSCh]h_OSC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMUhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h6.2.11h]h6.2.11}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMUhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hXFThis method can be a global method in ACPI (i.e., \_SB._OSC), or it may be associated with a specific device (e.g., \_SB.DEV0._OSC), or both. When used as a global method, only capabilities published in the ACPI specification are allowed. When used as a device-specific method, the process described for using _DSD MUST be used to create an _OSC definition; out-of-process use of _OSC is not allowed. That is, submit the device-specific _OSC usage description as part of the kernel driver submission, get it approved by the kernel community, then register it with the UEFI Forum.h]hXFThis method can be a global method in ACPI (i.e., _SB._OSC), or it may be associated with a specific device (e.g., _SB.DEV0._OSC), or both. When used as a global method, only capabilities published in the ACPI specification are allowed. When used as a device-specific method, the process described for using _DSD MUST be used to create an _OSC definition; out-of-process use of _OSC is not allowed. That is, submit the device-specific _OSC usage description as part of the kernel driver submission, get it approved by the kernel community, then register it with the UEFI Forum.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMUhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h\_OSIh]h_OSI}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMbhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h5.7.2h]h5.7.2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMbhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hDeprecated on ARM64. As far as ACPI firmware is concerned, _OSI is not to be used to determine what sort of system is being used or what functionality is provided. The _OSC method is to be used instead.h]hDeprecated on ARM64. As far as ACPI firmware is concerned, _OSI is not to be used to determine what sort of system is being used or what functionality is provided. The _OSC method is to be used instead.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMbhj!ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh](j)}(hhh]h)}(h_PDCh]h_PDC}(hj(!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMghj%!ubah}(h]h ]h"]h$]h&]uh1jhj"!ubj)}(hhh]h)}(h8.4.1h]h8.4.1}(hj?!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMghj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj;)ubah}(h]h ]h"]h$]h&]uh1jhj8)ubj)}(hhh]h)}(hSectionh]hSection}(hjU)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjR)ubah}(h]h ]h"]h$]h&]uh1jhj8)ubj)}(hhh]h)}(hNameh]hName}(hjl)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhji)ubah}(h]h ]h"]h$]h&]uh1jhj8)ubj)}(hhh]h)}(hSectionh]hSection}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj)ubah}(h]h ]h"]h$]h&]uh1jhj8)ubeh}(h]h ]h"]h$]h&]uh1jhj5)ubah}(h]h ]h"]h$]h&]uh1jhj )ubj)}(hhh](j)}(hhh](j)}(hhh]h)}(h_ALCh]h_ALC}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubj)}(hhh]h)}(h9.3.4h]h9.3.4}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubj)}(hhh]h)}(h_FDMh]h_FDM}(hj)hhhNhNubah}(h]h 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