€•QŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ0/translations/zh_CN/arch/arm/nwfpe/netwinder-fpe”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ0/translations/zh_TW/arch/arm/nwfpe/netwinder-fpe”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ0/translations/it_IT/arch/arm/nwfpe/netwinder-fpe”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ0/translations/ja_JP/arch/arm/nwfpe/netwinder-fpe”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ0/translations/ko_KR/arch/arm/nwfpe/netwinder-fpe”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ0/translations/sp_SP/arch/arm/nwfpe/netwinder-fpe”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ Current State”h]”hŒ Current State”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒJ/var/lib/git/docbuild/linux/Documentation/arch/arm/nwfpe/netwinder-fpe.rst”h KubhŒ paragraph”“”)”}”(hŒUThe following describes the current state of the NetWinder's floating point emulator.”h]”hŒWThe following describes the current state of the NetWinder’s floating point emulator.”…””}”(hh¹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¸)”}”(hŒIn the following nomenclature is used to describe the floating point instructions. It follows the conventions in the ARM manual.”h]”hŒIn the following nomenclature is used to describe the floating point instructions. It follows the conventions in the ARM manual.”…””}”(hhÇhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒ literal_block”“”)”}”(hŒ” = , no default {P|M|Z} = {round to +infinity,round to -infinity,round to zero}, default = round to nearest”h]”hŒ” = , no default {P|M|Z} = {round to +infinity,round to -infinity,round to zero}, default = round to nearest”…””}”hh×sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hÕhŸh¶h K hh£hžhubh¸)”}”(hŒ(Note: items enclosed in {} are optional.”h]”hŒ(Note: items enclosed in {} are optional.”…””}”(hhçhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒ{cond} Fd, Rn {cond} Fd, [Rn, #]{!} {cond} Fd, [Rn], #”h]”hŒ~{cond} Fd, Rn {cond} Fd, [Rn, #]{!} {cond} Fd, [Rn], #”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khhõhžhubh¸)”}”(hŒ)These instructions are fully implemented.”h]”hŒ)These instructions are fully implemented.”…””}”(hj"hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khhõhžhubh¸)”}”(hŒ*LFM/SFM - load and store multiple floating”h]”hŒ*LFM/SFM - load and store multiple floating”…””}”(hj0hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khhõhžhubh¸)”}”(hŒªForm 1 syntax: {cond} Fd, , [Rn] {cond} Fd, , [Rn, #]{!} {cond} Fd, , [Rn], #”h]”hŒªForm 1 syntax: {cond} Fd, , [Rn] {cond} Fd, , [Rn, #]{!} {cond} Fd, , [Rn], #”…””}”(hj>hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K hhõhžhubh¸)”}”(hŒ:Form 2 syntax: {cond} Fd, , [Rn]{!}”h]”hŒ:Form 2 syntax: {cond} Fd, , [Rn]{!}”…””}”(hjLhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K%hhõhžhubh¸)”}”(hXBThese instructions are fully implemented. They store/load three words for each floating point register into the memory location given in the instruction. The format in memory is unlikely to be compatible with other implementations, in particular the actual hardware. Specific mention of this is made in the ARM manuals.”h]”hXBThese instructions are fully implemented. They store/load three words for each floating point register into the memory location given in the instruction. The format in memory is unlikely to be compatible with other implementations, in particular the actual hardware. Specific mention of this is made in the ARM manuals.”…””}”(hjZhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K(hhõhžhubeh}”(h]”Œ:floating-point-coprocessor-data-transfer-instructions-cpdt”ah ]”h"]”Œ{P,M,Z} Fn, Rd Convert integer to floating point FIX{cond}{P,M,Z} Rd, Fn Convert floating point to integer WFS{cond} Rd Write floating point status register RFS{cond} Rd Read floating point status register WFC{cond} Rd Write floating point control register RFC{cond} Rd Read floating point control register”h]”hXÇFLT{cond}{P,M,Z} Fn, Rd Convert integer to floating point FIX{cond}{P,M,Z} Rd, Fn Convert floating point to integer WFS{cond} Rd Write floating point status register RFS{cond} Rd Read floating point status register WFC{cond} Rd Write floating point control register RFC{cond} Rd Read floating point control register”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K3hjphžhubh¸)”}”(hŒFLT/FIX are fully implemented.”h]”hŒFLT/FIX are fully implemented.”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K:hjphžhubh¸)”}”(hŒRFS/WFS are fully implemented.”h]”hŒRFS/WFS are fully implemented.”…””}”(hj«hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khjphžhubh¸)”}”(hŒCompare instructions”h]”hŒCompare instructions”…””}”(hjÇhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KBhjphžhubh¸)”}”(hŒÑCMF{cond} Fn, Fm Compare floating CMFE{cond} Fn, Fm Compare floating with exception CNF{cond} Fn, Fm Compare negated floating CNFE{cond} Fn, Fm Compare negated floating with exception”h]”hŒÑCMF{cond} Fn, Fm Compare floating CMFE{cond} Fn, Fm Compare floating with exception CNF{cond} Fn, Fm Compare negated floating CNFE{cond} Fn, Fm Compare negated floating with exception”…””}”(hjÕhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KDhjphžhubh¸)”}”(hŒThese are fully implemented.”h]”hŒThese are fully implemented.”…””}”(hjãhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KIhjphžhubeh}”(h]”Œ>floating-point-coprocessor-register-transfer-instructions-cprt”ah ]”h"]”Œ@floating point coprocessor register transfer instructions (cprt)”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K/ubh¢)”}”(hhh]”(h§)”}”(hŒ3Floating Point Coprocessor Data Instructions (CPDT)”h]”hŒ3Floating Point Coprocessor Data Instructions (CPDT)”…””}”(hjühžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjùhžhhŸh¶h KLubh¸)”}”(hŒDyadic operations:”h]”hŒDyadic operations:”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KNhjùhžhubh¸)”}”(hXPADF{cond}{P,M,Z} Fd, Fn, - add SUF{cond}{P,M,Z} Fd, Fn, - subtract RSF{cond}{P,M,Z} Fd, Fn, - reverse subtract MUF{cond}{P,M,Z} Fd, Fn, - multiply DVF{cond}{P,M,Z} Fd, Fn, - divide RDV{cond}{P,M,Z} Fd, Fn, - reverse divide”h]”hXPADF{cond}{P,M,Z} Fd, Fn, - add SUF{cond}{P,M,Z} Fd, Fn, - subtract RSF{cond}{P,M,Z} Fd, Fn, - reverse subtract MUF{cond}{P,M,Z} Fd, Fn, - multiply DVF{cond}{P,M,Z} Fd, Fn, - divide RDV{cond}{P,M,Z} Fd, Fn, - reverse divide”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KPhjùhžhubh¸)”}”(hŒThese are fully implemented.”h]”hŒThese are fully implemented.”…””}”(hj&hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KWhjùhžhubh¸)”}”(hŒ·FML{cond}{P,M,Z} Fd, Fn, - fast multiply FDV{cond}{P,M,Z} Fd, Fn, - fast divide FRD{cond}{P,M,Z} Fd, Fn, - fast reverse divide”h]”hŒ·FML{cond}{P,M,Z} Fd, Fn, - fast multiply FDV{cond}{P,M,Z} Fd, Fn, - fast divide FRD{cond}{P,M,Z} Fd, Fn, - fast reverse divide”…””}”(hj4hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KYhjùhžhubh¸)”}”(hXöThese are fully implemented as well. They use the same algorithm as the non-fast versions. Hence, in this implementation their performance is equivalent to the MUF/DVF/RDV instructions. This is acceptable according to the ARM manual. The manual notes these are defined only for single operands, on the actual FPA11 hardware they do not work for double or extended precision operands. The emulator currently does not check the requested permissions conditions, and performs the requested operation.”h]”hXöThese are fully implemented as well. They use the same algorithm as the non-fast versions. Hence, in this implementation their performance is equivalent to the MUF/DVF/RDV instructions. This is acceptable according to the ARM manual. The manual notes these are defined only for single operands, on the actual FPA11 hardware they do not work for double or extended precision operands. The emulator currently does not check the requested permissions conditions, and performs the requested operation.”…””}”(hjBhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K]hjùhžhubh¸)”}”(hŒ{P,M,Z} Fd, Fn, - IEEE remainder”h]”hŒ{P,M,Z} Fd, Fn, - IEEE remainder”…””}”(hjPhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kehjùhžhubh¸)”}”(hŒThis is fully implemented.”h]”hŒThis is fully implemented.”…””}”(hj^hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kghjùhžhubh¸)”}”(hŒMonadic operations:”h]”hŒMonadic operations:”…””}”(hjlhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kihjùhžhubh¸)”}”(hŒeMVF{cond}{P,M,Z} Fd, - move MNF{cond}{P,M,Z} Fd, - move negated”h]”hŒeMVF{cond}{P,M,Z} Fd, - move MNF{cond}{P,M,Z} Fd, - move negated”…””}”(hjzhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kkhjùhžhubh¸)”}”(hŒThese are fully implemented.”h]”hŒThese are fully implemented.”…””}”(hjˆhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Knhjùhžhubh¸)”}”(hŒžABS{cond}{P,M,Z} Fd, - absolute value SQT{cond}{P,M,Z} Fd, - square root RND{cond}{P,M,Z} Fd, - round”h]”hŒžABS{cond}{P,M,Z} Fd, - absolute value SQT{cond}{P,M,Z} Fd, - square root RND{cond}{P,M,Z} Fd, - round”…””}”(hj–hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kphjùhžhubh¸)”}”(hŒThese are fully implemented.”h]”hŒThese are fully implemented.”…””}”(hj¤hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kthjùhžhubh¸)”}”(hŒpURD{cond}{P,M,Z} Fd, - unnormalized round NRM{cond}{P,M,Z} Fd, - normalize”h]”hŒpURD{cond}{P,M,Z} Fd, - unnormalized round NRM{cond}{P,M,Z} Fd, - normalize”…””}”(hj²hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kvhjùhžhubh¸)”}”(hŒ™These are implemented. URD is implemented using the same code as the RND instruction. Since URD cannot return a unnormalized number, NRM becomes a NOP.”h]”hŒ™These are implemented. URD is implemented using the same code as the RND instruction. Since URD cannot return a unnormalized number, NRM becomes a NOP.”…””}”(hjÀhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kyhjùhžhubh¸)”}”(hŒLibrary calls:”h]”hŒLibrary calls:”…””}”(hjÎhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K}hjùhžhubh¸)”}”(hŒ³POW{cond}{P,M,Z} Fd, Fn, - power RPW{cond}{P,M,Z} Fd, Fn, - reverse power POL{cond}{P,M,Z} Fd, Fn, - polar angle (arctan2)”h]”hŒ³POW{cond}{P,M,Z} Fd, Fn, - power RPW{cond}{P,M,Z} Fd, Fn, - reverse power POL{cond}{P,M,Z} Fd, Fn, - polar angle (arctan2)”…””}”(hjÜhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khjùhžhubh¸)”}”(hXÜLOG{cond}{P,M,Z} Fd, - logarithm to base 10 LGN{cond}{P,M,Z} Fd, - logarithm to base e EXP{cond}{P,M,Z} Fd, - exponent SIN{cond}{P,M,Z} Fd, - sine COS{cond}{P,M,Z} Fd, - cosine TAN{cond}{P,M,Z} Fd, - tangent ASN{cond}{P,M,Z} Fd, - arcsine ACS{cond}{P,M,Z} Fd, - arccosine ATN{cond}{P,M,Z} Fd, - arctangent”h]”hXÜLOG{cond}{P,M,Z} Fd, - logarithm to base 10 LGN{cond}{P,M,Z} Fd, - logarithm to base e EXP{cond}{P,M,Z} Fd, - exponent SIN{cond}{P,M,Z} Fd, - sine COS{cond}{P,M,Z} Fd, - cosine TAN{cond}{P,M,Z} Fd, - tangent ASN{cond}{P,M,Z} Fd, - arcsine ACS{cond}{P,M,Z} Fd, - arccosine ATN{cond}{P,M,Z} Fd, - arctangent”…””}”(hjêhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kƒhjùhžhubh¸)”}”(hXThese are not implemented. They are not currently issued by the compiler, and are handled by routines in libc. These are not implemented by the FPA11 hardware, but are handled by the floating point support code. They should be implemented in future versions.”h]”hXThese are not implemented. They are not currently issued by the compiler, and are handled by routines in libc. These are not implemented by the FPA11 hardware, but are handled by the floating point support code. They should be implemented in future versions.”…””}”(hjøhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khjùhžhubh¸)”}”(hŒ Signalling:”h]”hŒ Signalling:”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K’hjùhžhubh¸)”}”(hŒóSignals are implemented. However current ELF kernels produced by Rebel.com have a bug in them that prevents the module from generating a SIGFPE. This is caused by a failure to alias fp_current to the kernel variable current_set[0] correctly.”h]”hŒóSignals are implemented. However current ELF kernels produced by Rebel.com have a bug in them that prevents the module from generating a SIGFPE. This is caused by a failure to alias fp_current to the kernel variable current_set[0] correctly.”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K”hjùhžhubh¸)”}”(hX¡The kernel provided with this distribution (vmlinux-nwfpe-0.93) contains a fix for this problem and also incorporates the current version of the emulator directly. It is possible to run with no floating point module loaded with this kernel. It is provided as a demonstration of the technology and for those who want to do floating point work that depends on signals. It is not strictly necessary to use the module.”h]”hX¡The kernel provided with this distribution (vmlinux-nwfpe-0.93) contains a fix for this problem and also incorporates the current version of the emulator directly. It is possible to run with no floating point module loaded with this kernel. It is provided as a demonstration of the technology and for those who want to do floating point work that depends on signals. It is not strictly necessary to use the module.”…””}”(hj"hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K™hjùhžhubh¸)”}”(hŒ¥A module (either the one provided by Russell King, or the one in this distribution) can be loaded to replace the functionality of the emulator built into the kernel.”h]”hŒ¥A module (either the one provided by Russell King, or the one in this distribution) can be loaded to replace the functionality of the emulator built into the kernel.”…””}”(hj0hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K hjùhžhubeh}”(h]”Œ1floating-point-coprocessor-data-instructions-cpdt”ah ]”h"]”Œ3floating point coprocessor data instructions (cpdt)”ah$]”h&]”uh1h¡hh£hžhhŸh¶h KLubeh}”(h]”Œ current-state”ah ]”h"]”Œ current state”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jqŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¶Œ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jKjHjmjjjöjójCj@uŒ nametypes”}”(jK‰jm‰jö‰jC‰uh}”(jHh£jjhõjójpj@jùuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nhžhub.