}sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget#/translations/zh_CN/arch/arm/ixp4xxmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/zh_TW/arch/arm/ixp4xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/it_IT/arch/arm/ixp4xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ja_JP/arch/arm/ixp4xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/ko_KR/arch/arm/ixp4xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget#/translations/sp_SP/arch/arm/ixp4xxmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(h;Release Notes for Linux on Intel's IXP4xx Network Processorh]h=Release Notes for Linux on Intel’s IXP4xx Network Processor}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh=/var/lib/git/docbuild/linux/Documentation/arch/arm/ixp4xx.rsthKubh)}(hhh](h)}(h1Maintained by Deepak Saxena h](hMaintained by Deepak Saxena <}(hhhhhNhNubh reference)}(hdsaxena@plexity.neth]hdsaxena@plexity.net}(hhhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:dsaxena@plexity.netuh1hhhubh>}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhhhhhKubhenumerated_list)}(hhh]h list_item)}(h Overview h]h paragraph)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhhhhhNubah}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1hhhhhhhhKubh)}(hXIntel's IXP4xx network processor is a highly integrated SOC that is targeted for network applications, though it has become popular in industrial control and other areas due to low cost and power consumption. The IXP4xx family currently consists of several processors that support different network offload functions such as encryption, routing, firewalling, etc. The IXP46x family is an updated version which supports faster speeds, new memory and flash configurations, and more integration such as an on-chip I2C controller.h]hXIntel’s IXP4xx network processor is a highly integrated SOC that is targeted for network applications, though it has become popular in industrial control and other areas due to low cost and power consumption. The IXP4xx family currently consists of several processors that support different network offload functions such as encryption, routing, firewalling, etc. The IXP46x family is an updated version which supports faster speeds, new memory and flash configurations, and more integration such as an on-chip I2C controller.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h=For more information on the various versions of the CPU, see:h]h=For more information on the various versions of the CPU, see:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(hGhttp://developer.intel.com/design/network/products/npfamily/ixp4xx.htm h]h)}(hFhttp://developer.intel.com/design/network/products/npfamily/ixp4xx.htmh]h)}(hj.h]hFhttp://developer.intel.com/design/network/products/npfamily/ixp4xx.htm}(hj0hhhNhNubah}(h]h ]h"]h$]h&]refurij.uh1hhj,ubah}(h]h ]h"]h$]h&]uh1hhhhKhj(ubah}(h]h ]h"]h$]h&]uh1j&hhhKhhhhubh)}(hnIntel also made the IXCP1100 CPU for sometime which is an IXP4xx stripped of much of the network intelligence.h]hnIntel also made the IXCP1100 CPU for sometime which is an IXP4xx stripped of much of the network intelligence.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh]h)}(hLinux Support h]h)}(h Linux Supporth]h Linux Support}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj[ubah}(h]h ]h"]h$]h&]uh1hhjXhhhhhNubah}(h]h ]h"]h$]h&]jjjhjj startKuh1hhhhhhhhKubh)}(hDLinux currently supports the following features on the IXP4xx chips:h]hDLinux currently supports the following features on the IXP4xx chips:}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh bullet_list)}(hhh](h)}(hDual serial portsh]h)}(hjh]hDual serial ports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(h PCI interfaceh]h)}(hjh]h PCI interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(hFlash access (MTD/JFFS)h]h)}(hjh]hFlash access (MTD/JFFS)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(hI2C through GPIO on IXP42xh]h)}(hjh]hI2C through GPIO on IXP42x}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK!hjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(hgGPIO for input/output/interrupts See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.h]h)}(hgGPIO for input/output/interrupts See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.h]hgGPIO for input/output/interrupts See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK"hjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(hTimers (watchdog, OS) h]h)}(hTimers (watchdog, OS)h]hTimers (watchdog, OS)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK$hjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubeh}(h]h ]h"]h$]h&]bullet-uh1jhhhKhhhhubh)}(hyThe following components of the chips are not supported by Linux and require the use of Intel's proprietary CSR software:h]h{The following components of the chips are not supported by Linux and require the use of Intel’s proprietary CSR software:}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK&hhhhubj)}(hhh](h)}(hUSB device interfaceh]h)}(hj4h]hUSB device interface}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hj2ubah}(h]h ]h"]h$]h&]uh1hhj/hhhhhNubh)}(h+Network interfaces (HSS, Utopia, NPEs, etc)h]h)}(hjKh]h+Network interfaces (HSS, Utopia, NPEs, etc)}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjIubah}(h]h ]h"]h$]h&]uh1hhj/hhhhhNubh)}(hNetwork offload functionality h]h)}(hNetwork offload functionalityh]hNetwork offload functionality}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hj`ubah}(h]h ]h"]h$]h&]uh1hhj/hhhhhNubeh}(h]h ]h"]h$]h&]jj uh1jhhhK)hhhhubh)}(hPIf you need to use any of the above, you need to download Intel's software from:h]hRIf you need to use any of the above, you need to download Intel’s software from:}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hhhhubj')}(hGhttp://developer.intel.com/design/network/products/npfamily/ixp425.htm h]h)}(hFhttp://developer.intel.com/design/network/products/npfamily/ixp425.htmh]h)}(hjh]hFhttp://developer.intel.com/design/network/products/npfamily/ixp425.htm}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1j&hhhK0hhhhubh)}(hTDO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPRIETARY SOFTWARE.h]hTDO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPRIETARY SOFTWARE.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hhhhubh)}(hVThere are several websites that provide directions/pointers on using Intel's software:h]hXThere are several websites that provide directions/pointers on using Intel’s software:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK5hhhhubj')}(hXM- http://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel libraries - http://gatewaymaker.sourceforge.net/ Simple one page summary of building a gateway using an IXP425 and Linux - http://ixp425.sourceforge.net/ ATM device driver for IXP425 that relies on Intel's libraries h]j)}(hhh](h)}(huhttp://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel libraries h]h)}(hthttp://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel librariesh](h)}(h,http://sourceforge.net/projects/ixp4xx-osdg/h]h,http://sourceforge.net/projects/ixp4xx-osdg/}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubhJ Open Source Developer’s Guide for using uClinux and the Intel libraries}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK8hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hmhttp://gatewaymaker.sourceforge.net/ Simple one page summary of building a gateway using an IXP425 and Linux h]h)}(hlhttp://gatewaymaker.sourceforge.net/ Simple one page summary of building a gateway using an IXP425 and Linuxh](h)}(h$http://gatewaymaker.sourceforge.net/h]h$http://gatewaymaker.sourceforge.net/}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubhH Simple one page summary of building a gateway using an IXP425 and Linux}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK;hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h]http://ixp425.sourceforge.net/ ATM device driver for IXP425 that relies on Intel's libraries h]h)}(h\http://ixp425.sourceforge.net/ ATM device driver for IXP425 that relies on Intel's librariesh](h)}(hhttp://ixp425.sourceforge.net/h]hhttp://ixp425.sourceforge.net/}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij)uh1hhj#ubh@ ATM device driver for IXP425 that relies on Intel’s libraries}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK>hjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jj uh1jhhhK8hjubah}(h]h ]h"]h$]h&]uh1j&hhhK8hhhhubh)}(hhh]h)}(hKnown Issues/Limitations h]h)}(hKnown Issues/Limitationsh]hKnown Issues/Limitations}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjUubah}(h]h ]h"]h$]h&]uh1hhjRhhhhhNubah}(h]h ]h"]h$]h&]jjjhjj jyKuh1hhhhhhhhKAubh)}(h3a. Limited inbound PCI windowh]h3a. Limited inbound PCI window}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChhhhubh)}(hXThe IXP4xx family allows for up to 256MB of memory but the PCI interface can only expose 64MB of that memory to the PCI bus. This means that if you are running with > 64MB, all PCI buffers outside of the accessible range will be bounced using the routines in arch/arm/common/dmabounce.c.h]hXThe IXP4xx family allows for up to 256MB of memory but the PCI interface can only expose 64MB of that memory to the PCI bus. This means that if you are running with > 64MB, all PCI buffers outside of the accessible range will be bounced using the routines in arch/arm/common/dmabounce.c.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhhhhubh)}(h3b. Limited outbound PCI windowh]h3b. Limited outbound PCI window}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhhhhubh)}(h:IXP4xx provides two methods of accessing PCI memory space:h]h:IXP4xx provides two methods of accessing PCI memory space:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhhhhubh)}(hhh](h)}(hXlA direct mapped window from 0x48000000 to 0x4bffffff (64MB). To access PCI via this space, we simply ioremap() the BAR into the kernel and we can use the standard read[bwl]/write[bwl] macros. This is the preferred method due to speed but it limits the system to just 64MB of PCI memory. This can be problematic if using video cards and other memory-heavy devices. h]h)}(hXkA direct mapped window from 0x48000000 to 0x4bffffff (64MB). To access PCI via this space, we simply ioremap() the BAR into the kernel and we can use the standard read[bwl]/write[bwl] macros. This is the preferred method due to speed but it limits the system to just 64MB of PCI memory. This can be problematic if using video cards and other memory-heavy devices.h]hXkA direct mapped window from 0x48000000 to 0x4bffffff (64MB). To access PCI via this space, we simply ioremap() the BAR into the kernel and we can use the standard read[bwl]/write[bwl] macros. This is the preferred method due to speed but it limits the system to just 64MB of PCI memory. This can be problematic if using video cards and other memory-heavy devices.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(hXIf > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature of the PCI window. h]h)}(hXIf > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature of the PCI window.h]hXIf > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature of the PCI window.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubeh}(h]h ]h"]h$]h&]jjjhj)uh1hhhhhhhhKNubh)}(hBy default, the direct method is used for performance reasons. If you need more PCI memory, enable the IXP4XX_INDIRECT_PCI config option.h]hBy default, the direct method is used for performance reasons. If you need more PCI memory, enable the IXP4XX_INDIRECT_PCI config option.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK^hhhhubh)}(h3c. GPIO as Interruptsh]h3c. GPIO as Interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKahhhhubh)}(h?Currently the code only handles level-sensitive GPIO interruptsh]h?Currently the code only handles level-sensitive GPIO interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchhhhubh)}(hhh]h)}(hSupported platforms h]h)}(hSupported platformsh]hSupported platforms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubah}(h]h ]h"]h$]h&]jjjhjj jyKuh1hhhhhhhhKeubh)}(hcADI Engineering Coyote Gateway Reference Platform http://www.adiengineering.com/productsCoyote.htmlh](h2ADI Engineering Coyote Gateway Reference Platform }(hj0hhhNhNubh)}(h1http://www.adiengineering.com/productsCoyote.htmlh]h1http://www.adiengineering.com/productsCoyote.html}(hj8hhhNhNubah}(h]h ]h"]h$]h&]refurij:uh1hhj0ubeh}(h]h ]h"]h$]h&]uh1hhhhKghhhhubj')}(hXThe ADI Coyote platform is reference design for those building small residential/office gateways. One NPE is connected to a 10/100 interface, one to 4-port 10/100 switch, and the third to and ADSL interface. In addition, it also supports to POTs interfaces connected via SLICs. Note that those are not supported by Linux ATM. Finally, the platform has two mini-PCI slots used for 802.11[bga] cards. Finally, there is an IDE port hanging off the expansion bus. h]h)}(hXThe ADI Coyote platform is reference design for those building small residential/office gateways. One NPE is connected to a 10/100 interface, one to 4-port 10/100 switch, and the third to and ADSL interface. In addition, it also supports to POTs interfaces connected via SLICs. Note that those are not supported by Linux ATM. Finally, the platform has two mini-PCI slots used for 802.11[bga] cards. Finally, there is an IDE port hanging off the expansion bus.h]hXThe ADI Coyote platform is reference design for those building small residential/office gateways. One NPE is connected to a 10/100 interface, one to 4-port 10/100 switch, and the third to and ADSL interface. In addition, it also supports to POTs interfaces connected via SLICs. Note that those are not supported by Linux ATM. Finally, the platform has two mini-PCI slots used for 802.11[bga] cards. Finally, there is an IDE port hanging off the expansion bus.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjMubah}(h]h ]h"]h$]h&]uh1j&hhhKjhhhhubh)}(hNGateworks Avila Network Platform http://www.gateworks.com/support/overview.phph](h!Gateworks Avila Network Platform }(hjehhhNhNubh)}(h-http://www.gateworks.com/support/overview.phph]h-http://www.gateworks.com/support/overview.php}(hjmhhhNhNubah}(h]h ]h"]h$]h&]refurijouh1hhjeubeh}(h]h ]h"]h$]h&]uh1hhhhKrhhhhubj')}(hThe Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus. h]h)}(hThe Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus.h]hThe Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKuhjubah}(h]h ]h"]h$]h&]uh1j&hhhKuhhhhubh)}(heIntel IXDP425 Development Platform http://www.intel.com/design/network/products/npfamily/ixdpg425.htmh](h#Intel IXDP425 Development Platform }(hjhhhNhNubh)}(hBhttp://www.intel.com/design/network/products/npfamily/ixdpg425.htmh]hBhttp://www.intel.com/design/network/products/npfamily/ixdpg425.htm}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubeh}(h]h ]h"]h$]h&]uh1hhhhKyhhhhubj')}(hThis is Intel's standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port. h]h)}(hThis is Intel's standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port.h]hThis is Intel’s standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjubah}(h]h ]h"]h$]h&]uh1j&hhhK|hhhhubh)}(hdIntel IXDP465 Development Platform http://www.intel.com/design/network/products/npfamily/ixdp465.htmh](h#Intel IXDP465 Development Platform }(hjhhhNhNubh)}(hAhttp://www.intel.com/design/network/products/npfamily/ixdp465.htmh]hAhttp://www.intel.com/design/network/products/npfamily/ixdp465.htm}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurijuh1hhjubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubj')}(hQThis is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16. h]h)}(hPThis is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16.h]hPThis is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j&hhhKhhhhubh)}(h#Intel IXDPG425 Development Platformh]h#Intel IXDPG425 Development Platform}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubj')}(hXYThis is basically and ADI Coyote board with a NEC EHCI controller added. One issue with this board is that the mini-PCI slots only have the 3.3v line connected, so you can't use a PCI to mini-PCI adapter with an E100 card. So to NFS root you need to use either the CSR or a WiFi card and a ramdisk that BOOTPs and then does a pivot_root to NFS. h]h)}(hXXThis is basically and ADI Coyote board with a NEC EHCI controller added. One issue with this board is that the mini-PCI slots only have the 3.3v line connected, so you can't use a PCI to mini-PCI adapter with an E100 card. So to NFS root you need to use either the CSR or a WiFi card and a ramdisk that BOOTPs and then does a pivot_root to NFS.h]hXZThis is basically and ADI Coyote board with a NEC EHCI controller added. One issue with this board is that the mini-PCI slots only have the 3.3v line connected, so you can’t use a PCI to mini-PCI adapter with an E100 card. So to NFS root you need to use either the CSR or a WiFi card and a ramdisk that BOOTPs and then does a pivot_root to NFS.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j&hhhKhhhhubh)}(hEMotorola PrPMC1100 Processor Mezanine Card http://www.fountainsys.comh](h+Motorola PrPMC1100 Processor Mezanine Card }(hj*hhhNhNubh)}(hhttp://www.fountainsys.comh]hhttp://www.fountainsys.com}(hj2hhhNhNubah}(h]h ]h"]h$]h&]refurij4uh1hhj*ubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubj')}(hX>The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform. h]h)}(hX=The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform.h]hX=The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjGubah}(h]h ]h"]h$]h&]uh1j&hhhKhhhhubh)}(hhh]h)}(h TODO LIST h]h)}(h TODO LISTh]h TODO LIST}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjbubah}(h]h ]h"]h$]h&]uh1hhj_hhhhhNubah}(h]h ]h"]h$]h&]jjjhjj jyKuh1hhhhhhhhKubj)}(hhh](h)}(hAdd support for Coyote IDEh]h)}(hjh]hAdd support for Coyote IDE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(h*Add support for edge-based GPIO interruptsh]h)}(hjh]h*Add support for edge-based GPIO interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(h(Add support for CF IDE on expansion bus h]h)}(h'Add support for CF IDE on expansion bush]h'Add support for CF IDE on expansion bus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubeh}(h]h ]h"]h$]h&]jj uh1jhhhKhhhhubh)}(hhh]h)}(hThanks h]h)}(hThanksh]hThanks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubah}(h]h ]h"]h$]h&]jjjhjj jyKuh1hhhhhhhhKubh)}(hLThe IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc.h]hLThe IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h;The following people have contributed patches/comments/etc:h]h;The following people have contributed patches/comments/etc:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubj)}(hhh](h)}(hLennerty Buytenhekh]h)}(hjh]hLennerty Buytenhek}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj hhhhhNubh)}(h Lutz Jaenickeh]h)}(hj(h]h Lutz Jaenicke}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj&ubah}(h]h ]h"]h$]h&]uh1hhj hhhhhNubh)}(hJustin Mayfieldh]h)}(hj?h]hJustin Mayfield}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj=ubah}(h]h ]h"]h$]h&]uh1hhj hhhhhNubh)}(hRobert E. Ranslam h]h)}(hRobert E. Ranslamh]hRobert E. Ranslam}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjTubah}(h]h ]h"]h$]h&]uh1hhj hhhhhNubeh}(h]h ]h"]h$]h&]jj uh1jhhhKhhhhubh)}(h;[I know I've forgotten others, please email me to be added]h]h=[I know I’ve forgotten others, please email me to be added]}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh transition)}(hI-------------------------------------------------------------------------h]h}(h]h ]h"]h$]h&]uh1jhhhKhhhhubh)}(hLast Update: 01/04/2005h]hLast Update: 01/04/2005}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubeh}(h]/maintained-by-deepak-saxena-dsaxena-plexity-netah ]h"]1maintained by deepak saxena ah$]h&]uh1hhhhhhhhKubeh}(h];release-notes-for-linux-on-intel-s-ixp4xx-network-processorah ]h"];release notes for linux on intel's ixp4xx network processorah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(jjjju nametypes}(jjuh}(jhjhu footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages](hsystem_message)}(hhh]h)}(h:Enumerated list start value not ordinal-1: "2" (ordinal 2)h]h>Enumerated list start value not ordinal-1: “2” (ordinal 2)}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1ubah}(h]h ]h"]h$]h&]levelKtypeINFOsourcehlineKuh1j/hhhhhhhKubj0)}(hhh]h)}(h:Enumerated list start value not ordinal-1: "3" (ordinal 3)h]h>Enumerated list start value not ordinal-1: “3” (ordinal 3)}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMubah}(h]h ]h"]h$]h&]levelKtypejJsourcehlineKuh1j/hhhhhhhKAubj0)}(hhh]h)}(h:Enumerated list start value not ordinal-1: "4" (ordinal 4)h]h>Enumerated list start value not ordinal-1: “4” (ordinal 4)}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhubah}(h]h ]h"]h$]h&]levelKtypejJsourcehlineKuh1j/hhhhhhhKeubj0)}(hhh]h)}(h:Enumerated list start value not ordinal-1: "5" (ordinal 5)h]h>Enumerated list start value not ordinal-1: “5” (ordinal 5)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejJsourcehlineKuh1j/hhhhhhhKubj0)}(hhh]h)}(h:Enumerated list start value not ordinal-1: "6" (ordinal 6)h]h>Enumerated list start value not ordinal-1: “6” (ordinal 6)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejJsourcehlineKuh1j/hhhhhhhKubetransform_messages] transformerN include_log] decorationNhhub.