€•‚~Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ#/translations/zh_CN/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ#/translations/zh_TW/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ#/translations/it_IT/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ#/translations/ja_JP/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ#/translations/ko_KR/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ#/translations/pt_BR/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ#/translations/sp_SP/arch/arm/ixp4xx”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ;Release Notes for Linux on Intel's IXP4xx Network Processor”h]”hŒ=Release Notes for Linux on Intel’s IXP4xx Network Processor”…””}”(hh¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hºhh·h²hh³Œ=/var/lib/git/docbuild/linux/Documentation/arch/arm/ixp4xx.rst”h´Kubh¶)”}”(hhh]”(h»)”}”(hŒ1Maintained by Deepak Saxena ”h]”(hŒMaintained by Deepak Saxena <”…””}”(hhÎh²hh³Nh´NubhŒ reference”“”)”}”(hŒdsaxena@plexity.net”h]”hŒdsaxena@plexity.net”…””}”(hhØh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:dsaxena@plexity.net”uh1hÖhhÎubhŒ>”…””}”(hhÎh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hºhhËh²hh³hÊh´KubhŒenumerated_list”“”)”}”(hhh]”hŒ list_item”“”)”}”(hŒ Overview ”h]”hŒ paragraph”“”)”}”(hŒOverview”h]”hŒOverview”…””}”(hhÿh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Khhùubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hhôh²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1hòhhËh²hh³hÊh´Kubhþ)”}”(hXIntel's IXP4xx network processor is a highly integrated SOC that is targeted for network applications, though it has become popular in industrial control and other areas due to low cost and power consumption. The IXP4xx family currently consists of several processors that support different network offload functions such as encryption, routing, firewalling, etc. The IXP46x family is an updated version which supports faster speeds, new memory and flash configurations, and more integration such as an on-chip I2C controller.”h]”hXIntel’s IXP4xx network processor is a highly integrated SOC that is targeted for network applications, though it has become popular in industrial control and other areas due to low cost and power consumption. The IXP4xx family currently consists of several processors that support different network offload functions such as encryption, routing, firewalling, etc. The IXP46x family is an updated version which supports faster speeds, new memory and flash configurations, and more integration such as an on-chip I2C controller.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K hhËh²hubhþ)”}”(hŒ=For more information on the various versions of the CPU, see:”h]”hŒ=For more information on the various versions of the CPU, see:”…””}”(hj,h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KhhËh²hubhŒ block_quote”“”)”}”(hŒGhttp://developer.intel.com/design/network/products/npfamily/ixp4xx.htm ”h]”hþ)”}”(hŒFhttp://developer.intel.com/design/network/products/npfamily/ixp4xx.htm”h]”h×)”}”(hjBh]”hŒFhttp://developer.intel.com/design/network/products/npfamily/ixp4xx.htm”…””}”(hjDh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jBuh1hÖhj@ubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Khj<ubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´KhhËh²hubhþ)”}”(hŒnIntel also made the IXCP1100 CPU for sometime which is an IXP4xx stripped of much of the network intelligence.”h]”hŒnIntel also made the IXCP1100 CPU for sometime which is an IXP4xx stripped of much of the network intelligence.”…””}”(hj^h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KhhËh²hubhó)”}”(hhh]”hø)”}”(hŒLinux Support ”h]”hþ)”}”(hŒ Linux Support”h]”hŒ Linux Support”…””}”(hjsh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Khjoubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjlh²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”jjjhjjŒstart”Kuh1hòhhËh²hh³hÊh´Kubhþ)”}”(hŒDLinux currently supports the following features on the IXP4xx chips:”h]”hŒDLinux currently supports the following features on the IXP4xx chips:”…””}”(hjŽh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KhhËh²hubhŒ bullet_list”“”)”}”(hhh]”(hø)”}”(hŒDual serial ports”h]”hþ)”}”(hj£h]”hŒDual serial ports”…””}”(hj¥h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Khj¡ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjžh²hh³hÊh´Nubhø)”}”(hŒ PCI interface”h]”hþ)”}”(hjºh]”hŒ PCI interface”…””}”(hj¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Khj¸ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjžh²hh³hÊh´Nubhø)”}”(hŒFlash access (MTD/JFFS)”h]”hþ)”}”(hjÑh]”hŒFlash access (MTD/JFFS)”…””}”(hjÓh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K hjÏubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjžh²hh³hÊh´Nubhø)”}”(hŒI2C through GPIO on IXP42x”h]”hþ)”}”(hjèh]”hŒI2C through GPIO on IXP42x”…””}”(hjêh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K!hjæubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjžh²hh³hÊh´Nubhø)”}”(hŒgGPIO for input/output/interrupts See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.”h]”hþ)”}”(hŒgGPIO for input/output/interrupts See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.”h]”hŒgGPIO for input/output/interrupts See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K"hjýubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjžh²hh³hÊh´Nubhø)”}”(hŒTimers (watchdog, OS) ”h]”hþ)”}”(hŒTimers (watchdog, OS)”h]”hŒTimers (watchdog, OS)”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K$hjubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjžh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1jœh³hÊh´KhhËh²hubhþ)”}”(hŒyThe following components of the chips are not supported by Linux and require the use of Intel's proprietary CSR software:”h]”hŒ{The following components of the chips are not supported by Linux and require the use of Intel’s proprietary CSR software:”…””}”(hj5h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K&hhËh²hubj)”}”(hhh]”(hø)”}”(hŒUSB device interface”h]”hþ)”}”(hjHh]”hŒUSB device interface”…””}”(hjJh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K)hjFubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjCh²hh³hÊh´Nubhø)”}”(hŒ+Network interfaces (HSS, Utopia, NPEs, etc)”h]”hþ)”}”(hj_h]”hŒ+Network interfaces (HSS, Utopia, NPEs, etc)”…””}”(hjah²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K*hj]ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjCh²hh³hÊh´Nubhø)”}”(hŒNetwork offload functionality ”h]”hþ)”}”(hŒNetwork offload functionality”h]”hŒNetwork offload functionality”…””}”(hjxh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K+hjtubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjCh²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j3j4uh1jœh³hÊh´K)hhËh²hubhþ)”}”(hŒPIf you need to use any of the above, you need to download Intel's software from:”h]”hŒRIf you need to use any of the above, you need to download Intel’s software from:”…””}”(hj’h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K-hhËh²hubj;)”}”(hŒGhttp://developer.intel.com/design/network/products/npfamily/ixp425.htm ”h]”hþ)”}”(hŒFhttp://developer.intel.com/design/network/products/npfamily/ixp425.htm”h]”h×)”}”(hj¦h]”hŒFhttp://developer.intel.com/design/network/products/npfamily/ixp425.htm”…””}”(hj¨h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j¦uh1hÖhj¤ubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K0hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´K0hhËh²hubhþ)”}”(hŒTDO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPRIETARY SOFTWARE.”h]”hŒTDO NOT POST QUESTIONS TO THE LINUX MAILING LISTS REGARDING THE PROPRIETARY SOFTWARE.”…””}”(hjÂh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K2hhËh²hubhþ)”}”(hŒVThere are several websites that provide directions/pointers on using Intel's software:”h]”hŒXThere are several websites that provide directions/pointers on using Intel’s software:”…””}”(hjÐh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K5hhËh²hubj;)”}”(hXM- http://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel libraries - http://gatewaymaker.sourceforge.net/ Simple one page summary of building a gateway using an IXP425 and Linux - http://ixp425.sourceforge.net/ ATM device driver for IXP425 that relies on Intel's libraries ”h]”j)”}”(hhh]”(hø)”}”(hŒuhttp://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel libraries ”h]”hþ)”}”(hŒthttp://sourceforge.net/projects/ixp4xx-osdg/ Open Source Developer's Guide for using uClinux and the Intel libraries”h]”(h×)”}”(hŒ,http://sourceforge.net/projects/ixp4xx-osdg/”h]”hŒ,http://sourceforge.net/projects/ixp4xx-osdg/”…””}”(hjíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jïuh1hÖhjéubhŒJ Open Source Developer’s Guide for using uClinux and the Intel libraries”…””}”(hjéh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K8hjåubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjâubhø)”}”(hŒmhttp://gatewaymaker.sourceforge.net/ Simple one page summary of building a gateway using an IXP425 and Linux ”h]”hþ)”}”(hŒlhttp://gatewaymaker.sourceforge.net/ Simple one page summary of building a gateway using an IXP425 and Linux”h]”(h×)”}”(hŒ$http://gatewaymaker.sourceforge.net/”h]”hŒ$http://gatewaymaker.sourceforge.net/”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”juh1hÖhjubhŒH Simple one page summary of building a gateway using an IXP425 and Linux”…””}”(hjh²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K;hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjâubhø)”}”(hŒ]http://ixp425.sourceforge.net/ ATM device driver for IXP425 that relies on Intel's libraries ”h]”hþ)”}”(hŒ\http://ixp425.sourceforge.net/ ATM device driver for IXP425 that relies on Intel's libraries”h]”(h×)”}”(hŒhttp://ixp425.sourceforge.net/”h]”hŒhttp://ixp425.sourceforge.net/”…””}”(hj;h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j=uh1hÖhj7ubhŒ@ ATM device driver for IXP425 that relies on Intel’s libraries”…””}”(hj7h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K>hj3ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjâubeh}”(h]”h ]”h"]”h$]”h&]”j3j4uh1jœh³hÊh´K8hjÞubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´K8hhËh²hubhó)”}”(hhh]”hø)”}”(hŒKnown Issues/Limitations ”h]”hþ)”}”(hŒKnown Issues/Limitations”h]”hŒKnown Issues/Limitations”…””}”(hjmh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KAhjiubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjfh²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”jjjhjjjKuh1hòhhËh²hh³hÊh´KAubhþ)”}”(hŒ3a. Limited inbound PCI window”h]”hŒ3a. Limited inbound PCI window”…””}”(hj‡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KChhËh²hubhþ)”}”(hXThe IXP4xx family allows for up to 256MB of memory but the PCI interface can only expose 64MB of that memory to the PCI bus. This means that if you are running with > 64MB, all PCI buffers outside of the accessible range will be bounced using the routines in arch/arm/common/dmabounce.c.”h]”hXThe IXP4xx family allows for up to 256MB of memory but the PCI interface can only expose 64MB of that memory to the PCI bus. This means that if you are running with > 64MB, all PCI buffers outside of the accessible range will be bounced using the routines in arch/arm/common/dmabounce.c.”…””}”(hj•h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KEhhËh²hubhþ)”}”(hŒ3b. Limited outbound PCI window”h]”hŒ3b. Limited outbound PCI window”…””}”(hj£h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KJhhËh²hubhþ)”}”(hŒ:IXP4xx provides two methods of accessing PCI memory space:”h]”hŒ:IXP4xx provides two methods of accessing PCI memory space:”…””}”(hj±h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KLhhËh²hubhó)”}”(hhh]”(hø)”}”(hXlA direct mapped window from 0x48000000 to 0x4bffffff (64MB). To access PCI via this space, we simply ioremap() the BAR into the kernel and we can use the standard read[bwl]/write[bwl] macros. This is the preferred method due to speed but it limits the system to just 64MB of PCI memory. This can be problematic if using video cards and other memory-heavy devices. ”h]”hþ)”}”(hXkA direct mapped window from 0x48000000 to 0x4bffffff (64MB). To access PCI via this space, we simply ioremap() the BAR into the kernel and we can use the standard read[bwl]/write[bwl] macros. This is the preferred method due to speed but it limits the system to just 64MB of PCI memory. This can be problematic if using video cards and other memory-heavy devices.”h]”hXkA direct mapped window from 0x48000000 to 0x4bffffff (64MB). To access PCI via this space, we simply ioremap() the BAR into the kernel and we can use the standard read[bwl]/write[bwl] macros. This is the preferred method due to speed but it limits the system to just 64MB of PCI memory. This can be problematic if using video cards and other memory-heavy devices.”…””}”(hjÆh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KNhjÂubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj¿h²hh³hÊh´Nubhø)”}”(hX¾If > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature of the PCI window. ”h]”hþ)”}”(hX½If > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature of the PCI window.”h]”hX½If > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature of the PCI window.”…””}”(hjÞh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KUhjÚubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj¿h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”jjjhjŒ)”uh1hòhhËh²hh³hÊh´KNubhþ)”}”(hŒ‰By default, the direct method is used for performance reasons. If you need more PCI memory, enable the IXP4XX_INDIRECT_PCI config option.”h]”hŒ‰By default, the direct method is used for performance reasons. If you need more PCI memory, enable the IXP4XX_INDIRECT_PCI config option.”…””}”(hjùh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K^hhËh²hubhþ)”}”(hŒ3c. GPIO as Interrupts”h]”hŒ3c. GPIO as Interrupts”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KahhËh²hubhþ)”}”(hŒ?Currently the code only handles level-sensitive GPIO interrupts”h]”hŒ?Currently the code only handles level-sensitive GPIO interrupts”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KchhËh²hubhó)”}”(hhh]”hø)”}”(hŒSupported platforms ”h]”hþ)”}”(hŒSupported platforms”h]”hŒSupported platforms”…””}”(hj*h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kehj&ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj#h²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”jjjhjjjKuh1hòhhËh²hh³hÊh´Keubhþ)”}”(hŒcADI Engineering Coyote Gateway Reference Platform http://www.adiengineering.com/productsCoyote.html”h]”(hŒ2ADI Engineering Coyote Gateway Reference Platform ”…””}”(hjDh²hh³Nh´Nubh×)”}”(hŒ1http://www.adiengineering.com/productsCoyote.html”h]”hŒ1http://www.adiengineering.com/productsCoyote.html”…””}”(hjLh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jNuh1hÖhjDubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KghhËh²hubj;)”}”(hXÌThe ADI Coyote platform is reference design for those building small residential/office gateways. One NPE is connected to a 10/100 interface, one to 4-port 10/100 switch, and the third to and ADSL interface. In addition, it also supports to POTs interfaces connected via SLICs. Note that those are not supported by Linux ATM. Finally, the platform has two mini-PCI slots used for 802.11[bga] cards. Finally, there is an IDE port hanging off the expansion bus. ”h]”hþ)”}”(hXËThe ADI Coyote platform is reference design for those building small residential/office gateways. One NPE is connected to a 10/100 interface, one to 4-port 10/100 switch, and the third to and ADSL interface. In addition, it also supports to POTs interfaces connected via SLICs. Note that those are not supported by Linux ATM. Finally, the platform has two mini-PCI slots used for 802.11[bga] cards. Finally, there is an IDE port hanging off the expansion bus.”h]”hXËThe ADI Coyote platform is reference design for those building small residential/office gateways. One NPE is connected to a 10/100 interface, one to 4-port 10/100 switch, and the third to and ADSL interface. In addition, it also supports to POTs interfaces connected via SLICs. Note that those are not supported by Linux ATM. Finally, the platform has two mini-PCI slots used for 802.11[bga] cards. Finally, there is an IDE port hanging off the expansion bus.”…””}”(hjeh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kjhjaubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´KjhhËh²hubhþ)”}”(hŒNGateworks Avila Network Platform http://www.gateworks.com/support/overview.php”h]”(hŒ!Gateworks Avila Network Platform ”…””}”(hjyh²hh³Nh´Nubh×)”}”(hŒ-http://www.gateworks.com/support/overview.php”h]”hŒ-http://www.gateworks.com/support/overview.php”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jƒuh1hÖhjyubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KrhhËh²hubj;)”}”(hŒ”The Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus. ”h]”hþ)”}”(hŒ“The Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus.”h]”hŒ“The Avila platform is basically and IXDP425 with the 4 PCI slots replaced with mini-PCI slots and a CF IDE interface hanging off the expansion bus.”…””}”(hjšh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kuhj–ubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´KuhhËh²hubhþ)”}”(hŒeIntel IXDP425 Development Platform http://www.intel.com/design/network/products/npfamily/ixdpg425.htm”h]”(hŒ#Intel IXDP425 Development Platform ”…””}”(hj®h²hh³Nh´Nubh×)”}”(hŒBhttp://www.intel.com/design/network/products/npfamily/ixdpg425.htm”h]”hŒBhttp://www.intel.com/design/network/products/npfamily/ixdpg425.htm”…””}”(hj¶h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j¸uh1hÖhj®ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KyhhËh²hubj;)”}”(hŒ²This is Intel's standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port. ”h]”hþ)”}”(hŒ±This is Intel's standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port.”h]”hŒ³This is Intel’s standard reference platform for the IXDP425 and is also known as the Richfield board. It contains 4 PCI slots, 16MB of flash, two 10/100 ports and one ADSL port.”…””}”(hjÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K|hjËubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´K|hhËh²hubhþ)”}”(hŒdIntel IXDP465 Development Platform http://www.intel.com/design/network/products/npfamily/ixdp465.htm”h]”(hŒ#Intel IXDP465 Development Platform ”…””}”(hjãh²hh³Nh´Nubh×)”}”(hŒAhttp://www.intel.com/design/network/products/npfamily/ixdp465.htm”h]”hŒAhttp://www.intel.com/design/network/products/npfamily/ixdp465.htm”…””}”(hjëh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jíuh1hÖhjãubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K€hhËh²hubj;)”}”(hŒQThis is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16. ”h]”hþ)”}”(hŒPThis is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16.”h]”hŒPThis is basically an IXDP425 with an IXP465 and 32M of flash instead of just 16.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kƒhjubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´KƒhhËh²hubhþ)”}”(hŒ#Intel IXDPG425 Development Platform”h]”hŒ#Intel IXDPG425 Development Platform”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K†hhËh²hubj;)”}”(hXYThis is basically and ADI Coyote board with a NEC EHCI controller added. One issue with this board is that the mini-PCI slots only have the 3.3v line connected, so you can't use a PCI to mini-PCI adapter with an E100 card. So to NFS root you need to use either the CSR or a WiFi card and a ramdisk that BOOTPs and then does a pivot_root to NFS. ”h]”hþ)”}”(hXXThis is basically and ADI Coyote board with a NEC EHCI controller added. One issue with this board is that the mini-PCI slots only have the 3.3v line connected, so you can't use a PCI to mini-PCI adapter with an E100 card. So to NFS root you need to use either the CSR or a WiFi card and a ramdisk that BOOTPs and then does a pivot_root to NFS.”h]”hXZThis is basically and ADI Coyote board with a NEC EHCI controller added. One issue with this board is that the mini-PCI slots only have the 3.3v line connected, so you can’t use a PCI to mini-PCI adapter with an E100 card. So to NFS root you need to use either the CSR or a WiFi card and a ramdisk that BOOTPs and then does a pivot_root to NFS.”…””}”(hj*h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kˆhj&ubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´KˆhhËh²hubhþ)”}”(hŒEMotorola PrPMC1100 Processor Mezanine Card http://www.fountainsys.com”h]”(hŒ+Motorola PrPMC1100 Processor Mezanine Card ”…””}”(hj>h²hh³Nh´Nubh×)”}”(hŒhttp://www.fountainsys.com”h]”hŒhttp://www.fountainsys.com”…””}”(hjFh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jHuh1hÖhj>ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KhhËh²hubj;)”}”(hX>The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform. ”h]”hþ)”}”(hX=The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform.”h]”hX=The PrPMC1100 is based on the IXCP1100 and is meant to plug into and IXP2400/2800 system to act as the system controller. It simply contains a CPU and 16MB of flash on the board and needs to be plugged into a carrier board to function. Currently Linux only supports the Motorola PrPMC carrier board for this platform.”…””}”(hj_h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K’hj[ubah}”(h]”h ]”h"]”h$]”h&]”uh1j:h³hÊh´K’hhËh²hubhó)”}”(hhh]”hø)”}”(hŒ TODO LIST ”h]”hþ)”}”(hŒ TODO LIST”h]”hŒ TODO LIST”…””}”(hjzh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K˜hjvubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjsh²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”jjjhjjjKuh1hòhhËh²hh³hÊh´K˜ubj)”}”(hhh]”(hø)”}”(hŒAdd support for Coyote IDE”h]”hþ)”}”(hj™h]”hŒAdd support for Coyote IDE”…””}”(hj›h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kšhj—ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj”h²hh³hÊh´Nubhø)”}”(hŒ*Add support for edge-based GPIO interrupts”h]”hþ)”}”(hj°h]”hŒ*Add support for edge-based GPIO interrupts”…””}”(hj²h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K›hj®ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj”h²hh³hÊh´Nubhø)”}”(hŒ(Add support for CF IDE on expansion bus ”h]”hþ)”}”(hŒ'Add support for CF IDE on expansion bus”h]”hŒ'Add support for CF IDE on expansion bus”…””}”(hjÉh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´KœhjÅubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj”h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j3j4uh1jœh³hÊh´KšhhËh²hubhó)”}”(hhh]”hø)”}”(hŒThanks ”h]”hþ)”}”(hŒThanks”h]”hŒThanks”…””}”(hjêh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´Kžhjæubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hjãh²hh³hÊh´Nubah}”(h]”h ]”h"]”h$]”h&]”jjjhjjjKuh1hòhhËh²hh³hÊh´Kžubhþ)”}”(hŒLThe IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc.”h]”hŒLThe IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K hhËh²hubhþ)”}”(hŒ;The following people have contributed patches/comments/etc:”h]”hŒ;The following people have contributed patches/comments/etc:”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K¢hhËh²hubj)”}”(hhh]”(hø)”}”(hŒLennerty Buytenhek”h]”hþ)”}”(hj%h]”hŒLennerty Buytenhek”…””}”(hj'h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K¤hj#ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj h²hh³hÊh´Nubhø)”}”(hŒ Lutz Jaenicke”h]”hþ)”}”(hj<h]”hŒ Lutz Jaenicke”…””}”(hj>h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K¥hj:ubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj h²hh³hÊh´Nubhø)”}”(hŒJustin Mayfield”h]”hþ)”}”(hjSh]”hŒJustin Mayfield”…””}”(hjUh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K¦hjQubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj h²hh³hÊh´Nubhø)”}”(hŒRobert E. Ranslam ”h]”hþ)”}”(hŒRobert E. Ranslam”h]”hŒRobert E. Ranslam”…””}”(hjlh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K§hjhubah}”(h]”h ]”h"]”h$]”h&]”uh1h÷hj h²hh³hÊh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j3j4uh1jœh³hÊh´K¤hhËh²hubhþ)”}”(hŒ;[I know I've forgotten others, please email me to be added]”h]”hŒ=[I know I’ve forgotten others, please email me to be added]”…””}”(hj†h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K©hhËh²hubhŒ transition”“”)”}”(hŒI-------------------------------------------------------------------------”h]”h}”(h]”h ]”h"]”h$]”h&]”uh1j”h³hÊh´K«hhËh²hubhþ)”}”(hŒLast Update: 01/04/2005”h]”hŒLast Update: 01/04/2005”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýh³hÊh´K­hhËh²hubeh}”(h]”Œ/maintained-by-deepak-saxena-dsaxena-plexity-net”ah ]”h"]”Œ1maintained by deepak saxena ”ah$]”h&]”uh1hµhh·h²hh³hÊh´Kubeh}”(h]”Œ;release-notes-for-linux-on-intel-s-ixp4xx-network-processor”ah ]”h"]”Œ;release notes for linux on intel's ixp4xx network processor”ah$]”h&]”uh1hµhhh²hh³hÊh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÊuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hºNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jáŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÊŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j»j¸j³j°uŒ nametypes”}”(j»‰j³‰uh}”(j¸h·j°hËuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”(hŒsystem_message”“”)”}”(hhh]”hþ)”}”(hŒ:Enumerated list start value not ordinal-1: "2" (ordinal 2)”h]”hŒ>Enumerated list start value not ordinal-1: “2†(ordinal 2)”…””}”(hjHh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýhjEubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”hÊŒline”Kuh1jChhËh²hh³hÊh´KubjD)”}”(hhh]”hþ)”}”(hŒ:Enumerated list start value not ordinal-1: "3" (ordinal 3)”h]”hŒ>Enumerated list start value not ordinal-1: “3†(ordinal 3)”…””}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýhjaubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”j^Œsource”hÊŒline”Kuh1jChhËh²hh³hÊh´KAubjD)”}”(hhh]”hþ)”}”(hŒ:Enumerated list start value not ordinal-1: "4" (ordinal 4)”h]”hŒ>Enumerated list start value not ordinal-1: “4†(ordinal 4)”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýhj|ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”j^Œsource”hÊŒline”Kuh1jChhËh²hh³hÊh´KeubjD)”}”(hhh]”hþ)”}”(hŒ:Enumerated list start value not ordinal-1: "5" (ordinal 5)”h]”hŒ>Enumerated list start value not ordinal-1: “5†(ordinal 5)”…””}”(hjšh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýhj—ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”j^Œsource”hÊŒline”Kuh1jChhËh²hh³hÊh´K˜ubjD)”}”(hhh]”hþ)”}”(hŒ:Enumerated list start value not ordinal-1: "6" (ordinal 6)”h]”hŒ>Enumerated list start value not ordinal-1: “6†(ordinal 6)”…””}”(hjµh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hýhj²ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”j^Œsource”hÊŒline”Kuh1jChhËh²hh³hÊh´KžubeŒtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.