€•,t      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ'/translations/zh_CN/arch/arm/interrupts”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/zh_TW/arch/arm/interrupts”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/it_IT/arch/arm/interrupts”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/ja_JP/arch/arm/interrupts”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/ko_KR/arch/arm/interrupts”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ'/translations/sp_SP/arch/arm/interrupts”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ
Interrupts”h]”hŒ
Interrupts”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒA/var/lib/git/docbuild/linux/Documentation/arch/arm/interrupts.rst”h KubhŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hŒ{2.5.2-rmk5:
This is the first kernel that contains a major shake up of some of the
major architecture-specific subsystems.
”h]”(hŒterm”“”)”}”(hŒ2.5.2-rmk5:”h]”hŒ2.5.2-rmk5:”…””}”(hhÄhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h Khh¾ubhŒ
definition”“”)”}”(hhh]”hŒ	paragraph”“”)”}”(hŒnThis is the first kernel that contains a major shake up of some of the
major architecture-specific subsystems.”h]”hŒnThis is the first kernel that contains a major shake up of some of the
major architecture-specific subsystems.”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhhÔubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhh¾ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Khh¹ubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hh£hžhhŸh¶h NubhØ)”}”(hX”  Firstly, it contains some pretty major changes to the way we handle the
MMU TLB.  Each MMU TLB variant is now handled completely separately -
we have TLB v3, TLB v4 (without write buffer), TLB v4 (with write buffer),
and finally TLB v4 (with write buffer, with I TLB invalidate entry).
There is more assembly code inside each of these functions, mainly to
allow more flexible TLB handling for the future.”h]”hX”  Firstly, it contains some pretty major changes to the way we handle the
MMU TLB.  Each MMU TLB variant is now handled completely separately -
we have TLB v3, TLB v4 (without write buffer), TLB v4 (with write buffer),
and finally TLB v4 (with write buffer, with I TLB invalidate entry).
There is more assembly code inside each of these functions, mainly to
allow more flexible TLB handling for the future.”…””}”(hhùhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K	hh£hžhubhØ)”}”(hŒSecondly, the IRQ subsystem.”h]”hŒSecondly, the IRQ subsystem.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hŒúThe 2.5 kernels will be having major changes to the way IRQs are handled.
Unfortunately, this means that machine types that touch the irq_desc[]
array (basically all machine types) will break, and this means every
machine type that we currently have.”h]”hŒúThe 2.5 kernels will be having major changes to the way IRQs are handled.
Unfortunately, this means that machine types that touch the irq_desc[]
array (basically all machine types) will break, and this means every
machine type that we currently have.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhØ)”}”(hŒ>Lets take an example.  On the Assabet with Neponset, we have::”h]”hŒ=Lets take an example.  On the Assabet with Neponset, we have:”…””}”(hj#  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khh£hžhubhŒliteral_block”“”)”}”(hX	            GPIO25                 IRR:2
SA1100 ------------> Neponset -----------> SA1111
                                 IIR:1
                              -----------> USAR
                                 IIR:0
                              -----------> SMC9196”h]”hX	            GPIO25                 IRR:2
SA1100 ------------> Neponset -----------> SA1111
                                 IIR:1
                              -----------> USAR
                                 IIR:0
                              -----------> SMC9196”…””}”hj3  sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1j1  hŸh¶h Khh£hžhubhØ)”}”(hX'  The way stuff currently works, all SA1111 interrupts are mutually
exclusive of each other - if you're processing one interrupt from the
SA1111 and another comes in, you have to wait for that interrupt to
finish processing before you can service the new interrupt.  Eg, an
IDE PIO-based interrupt on the SA1111 excludes all other SA1111 and
SMC9196 interrupts until it has finished transferring its multi-sector
data, which can be a long time.  Note also that since we loop in the
SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.”h]”hX)  The way stuff currently works, all SA1111 interrupts are mutually
exclusive of each other - if youâ€™re processing one interrupt from the
SA1111 and another comes in, you have to wait for that interrupt to
finish processing before you can service the new interrupt.  Eg, an
IDE PIO-based interrupt on the SA1111 excludes all other SA1111 and
SMC9196 interrupts until it has finished transferring its multi-sector
data, which can be a long time.  Note also that since we loop in the
SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.”…””}”(hjC  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K hh£hžhubhØ)”}”(hŒ,The new approach brings several new ideas...”h]”hŒ,The new approach brings several new ideas...”…””}”(hjQ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K*hh£hžhubhØ)”}”(hŒ¦We introduce the concept of a "parent" and a "child".  For example,
to the Neponset handler, the "parent" is GPIO25, and the "children"d
are SA1111, SMC9196 and USAR.”h]”hŒ¶We introduce the concept of a â€œparentâ€ and a â€œchildâ€.  For example,
to the Neponset handler, the â€œparentâ€ is GPIO25, and the â€œchildrenâ€d
are SA1111, SMC9196 and USAR.”…””}”(hj_  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K,hh£hžhubhØ)”}”(hX  We also bring the idea of an IRQ "chip" (mainly to reduce the size of
the irqdesc array).  This doesn't have to be a real "IC"; indeed the
SA11x0 IRQs are handled by two separate "chip" structures, one for
GPIO0-10, and another for all the rest.  It is just a container for
the various operations (maybe this'll change to a better name).
This structure has the following operations::”h]”hXŽ  We also bring the idea of an IRQ â€œchipâ€ (mainly to reduce the size of
the irqdesc array).  This doesnâ€™t have to be a real â€œICâ€; indeed the
SA11x0 IRQs are handled by two separate â€œchipâ€ structures, one for
GPIO0-10, and another for all the rest.  It is just a container for
the various operations (maybe thisâ€™ll change to a better name).
This structure has the following operations:”…””}”(hjm  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K0hh£hžhubj2  )”}”(hXn  struct irqchip {
        /*
         * Acknowledge the IRQ.
         * If this is a level-based IRQ, then it is expected to mask the IRQ
         * as well.
         */
        void (*ack)(unsigned int irq);
        /*
         * Mask the IRQ in hardware.
         */
        void (*mask)(unsigned int irq);
        /*
         * Unmask the IRQ in hardware.
         */
        void (*unmask)(unsigned int irq);
        /*
         * Re-run the IRQ
         */
        void (*rerun)(unsigned int irq);
        /*
         * Set the type of the IRQ.
         */
        int (*type)(unsigned int irq, unsigned int, type);
};”h]”hXn  struct irqchip {
        /*
         * Acknowledge the IRQ.
         * If this is a level-based IRQ, then it is expected to mask the IRQ
         * as well.
         */
        void (*ack)(unsigned int irq);
        /*
         * Mask the IRQ in hardware.
         */
        void (*mask)(unsigned int irq);
        /*
         * Unmask the IRQ in hardware.
         */
        void (*unmask)(unsigned int irq);
        /*
         * Re-run the IRQ
         */
        void (*rerun)(unsigned int irq);
        /*
         * Set the type of the IRQ.
         */
        int (*type)(unsigned int irq, unsigned int, type);
};”…””}”hj{  sbah}”(h]”h ]”h"]”h$]”h&]”jA  jB  uh1j1  hŸh¶h K7hh£hžhubh¸)”}”(hhh]”(h½)”}”(hŒUack
- required.  May be the same function as mask for IRQs
  handled by do_level_IRQ.”h]”(hÃ)”}”(hŒack”h]”hŒack”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h KQhjŒ  ubhÓ)”}”(hhh]”hŒbullet_list”“”)”}”(hhh]”hŒ	list_item”“”)”}”(hŒMrequired.  May be the same function as mask for IRQs
handled by do_level_IRQ.”h]”hØ)”}”(hŒMrequired.  May be the same function as mask for IRQs
handled by do_level_IRQ.”h]”hŒMrequired.  May be the same function as mask for IRQs
handled by do_level_IRQ.”…””}”(hj¬  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KQhj¨  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj£  ubah}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j¡  hŸh¶h KQhjž  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhjŒ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h KQhj‰  ubh½)”}”(hŒmask
- required.”h]”(hÃ)”}”(hŒmask”h]”hŒmask”…””}”(hjØ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h KShjÔ  ubhÓ)”}”(hhh]”j¢  )”}”(hhh]”j§  )”}”(hŒ	required.”h]”hØ)”}”(hjî  h]”hŒ	required.”…””}”(hjð  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KThjì  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjé  ubah}”(h]”h ]”h"]”h$]”h&]”jÆ  jÇ  uh1j¡  hŸh¶h KThjæ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhjÔ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h KShj‰  hžhubh½)”}”(hŒunmask
- required.”h]”(hÃ)”}”(hŒunmask”h]”hŒunmask”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h KUhj  ubhÓ)”}”(hhh]”j¢  )”}”(hhh]”j§  )”}”(hŒ	required.”h]”hØ)”}”(hj/  h]”hŒ	required.”…””}”(hj1  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KVhj-  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj*  ubah}”(h]”h ]”h"]”h$]”h&]”jÆ  jÇ  uh1j¡  hŸh¶h KVhj'  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h KUhj‰  hžhubh½)”}”(hŒÐrerun
- optional.  Not required if you're using do_level_IRQ for all
  IRQs that use this 'irqchip'.  Generally expected to re-trigger
  the hardware IRQ if possible.  If not, may call the handler
  directly.”h]”(hÃ)”}”(hŒrerun”h]”hŒrerun”…””}”(hjZ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h KZhjV  ubhÓ)”}”(hhh]”j¢  )”}”(hhh]”j§  )”}”(hŒÂoptional.  Not required if you're using do_level_IRQ for all
IRQs that use this 'irqchip'.  Generally expected to re-trigger
the hardware IRQ if possible.  If not, may call the handler
directly.”h]”hØ)”}”(hŒÂoptional.  Not required if you're using do_level_IRQ for all
IRQs that use this 'irqchip'.  Generally expected to re-trigger
the hardware IRQ if possible.  If not, may call the handler
directly.”h]”hŒÈoptional.  Not required if youâ€™re using do_level_IRQ for all
IRQs that use this â€˜irqchipâ€™.  Generally expected to re-trigger
the hardware IRQ if possible.  If not, may call the handler
directly.”…””}”(hjr  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KXhjn  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjk  ubah}”(h]”h ]”h"]”h$]”h&]”jÆ  jÇ  uh1j¡  hŸh¶h KXhjh  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhjV  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h KZhj‰  hžhubh½)”}”(hŒ—type
- optional.  If you don't support changing the type of an IRQ,
  it should be null so people can detect if they are unable to
  set the IRQ type.
”h]”(hÃ)”}”(hŒtype”h]”hŒtype”…””}”(hjœ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h K_hj˜  ubhÓ)”}”(hhh]”j¢  )”}”(hhh]”j§  )”}”(hŒŒoptional.  If you don't support changing the type of an IRQ,
it should be null so people can detect if they are unable to
set the IRQ type.
”h]”hØ)”}”(hŒ‹optional.  If you don't support changing the type of an IRQ,
it should be null so people can detect if they are unable to
set the IRQ type.”h]”hŒoptional.  If you donâ€™t support changing the type of an IRQ,
it should be null so people can detect if they are unable to
set the IRQ type.”…””}”(hj´  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K]hj°  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj­  ubah}”(h]”h ]”h"]”h$]”h&]”jÆ  jÇ  uh1j¡  hŸh¶h K]hjª  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhj˜  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h K_hj‰  hžhubeh}”(h]”h ]”h"]”h$]”h&]”uh1h·hh£hžhhŸNh NubhØ)”}”(hŒ0For each IRQ, we keep the following information:”h]”hŒ0For each IRQ, we keep the following information:”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kahh£hžhubhŒblock_quote”“”)”}”(hŒû- "disable" depth (number of disable_irq()s without enable_irq()s)
- flags indicating what we can do with this IRQ (valid, probe,
  noautounmask) as before
- status of the IRQ (probing, enable, etc)
- chip
- per-IRQ handler
- irqaction structure list
”h]”j¢  )”}”(hhh]”(j§  )”}”(hŒ@"disable" depth (number of disable_irq()s without enable_irq()s)”h]”hØ)”}”(hjù  h]”hŒDâ€œdisableâ€ depth (number of disable_irq()s without enable_irq()s)”…””}”(hjû  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kchj÷  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjô  ubj§  )”}”(hŒTflags indicating what we can do with this IRQ (valid, probe,
noautounmask) as before”h]”hØ)”}”(hŒTflags indicating what we can do with this IRQ (valid, probe,
noautounmask) as before”h]”hŒTflags indicating what we can do with this IRQ (valid, probe,
noautounmask) as before”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kdhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjô  ubj§  )”}”(hŒ(status of the IRQ (probing, enable, etc)”h]”hØ)”}”(hj(  h]”hŒ(status of the IRQ (probing, enable, etc)”…””}”(hj*  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kfhj&  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjô  ubj§  )”}”(hŒchip”h]”hØ)”}”(hj?  h]”hŒchip”…””}”(hjA  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kghj=  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjô  ubj§  )”}”(hŒper-IRQ handler”h]”hØ)”}”(hjV  h]”hŒper-IRQ handler”…””}”(hjX  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KhhjT  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjô  ubj§  )”}”(hŒirqaction structure list
”h]”hØ)”}”(hŒirqaction structure list”h]”hŒirqaction structure list”…””}”(hjo  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kihjk  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hjô  ubeh}”(h]”h ]”h"]”h$]”h&]”jÆ  jÇ  uh1j¡  hŸh¶h Kchjð  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jî  hŸh¶h Kchh£hžhubhØ)”}”(hŒ“The handler can be one of the 3 standard handlers - "level", "edge" and
"simple", or your own specific handler if you need to do something special.”h]”hŒŸThe handler can be one of the 3 standard handlers - â€œlevelâ€, â€œedgeâ€ and
â€œsimpleâ€, or your own specific handler if you need to do something special.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kkhh£hžhubhØ)”}”(hXº  The "level" handler is what we currently have - its pretty simple.
"edge" knows about the brokenness of such IRQ implementations - that you
need to leave the hardware IRQ enabled while processing it, and queueing
further IRQ events should the IRQ happen again while processing.  The
"simple" handler is very basic, and does not perform any hardware
manipulation, nor state tracking.  This is useful for things like the
SMC9196 and USAR above.”h]”hXÆ  The â€œlevelâ€ handler is what we currently have - its pretty simple.
â€œedgeâ€ knows about the brokenness of such IRQ implementations - that you
need to leave the hardware IRQ enabled while processing it, and queueing
further IRQ events should the IRQ happen again while processing.  The
â€œsimpleâ€ handler is very basic, and does not perform any hardware
manipulation, nor state tracking.  This is useful for things like the
SMC9196 and USAR above.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Knhh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒSo, what's changed?”h]”hŒSo, whatâ€™s changed?”…””}”(hj®  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj«  hžhhŸh¶h KwubhŒenumerated_list”“”)”}”(hhh]”(j§  )”}”(hŒ=Machine implementations must not write to the irqdesc array.
”h]”hØ)”}”(hŒ<Machine implementations must not write to the irqdesc array.”h]”hŒ<Machine implementations must not write to the irqdesc array.”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KyhjÁ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubj§  )”}”(hX³  New functions to manipulate the irqdesc array.  The first 4 are expected
to be useful only to machine specific code.  The last is recommended to
only be used by machine specific code, but may be used in drivers if
absolutely necessary.

     set_irq_chip(irq,chip)
             Set the mask/unmask methods for handling this IRQ

     set_irq_handler(irq,handler)
             Set the handler for this IRQ (level, edge, simple)

     set_irq_chained_handler(irq,handler)
             Set a "chained" handler for this IRQ - automatically
             enables this IRQ (eg, Neponset and SA1111 handlers).

     set_irq_flags(irq,flags)
             Set the valid/probe/noautoenable flags.

     set_irq_type(irq,type)
             Set active the IRQ edge(s)/level.  This replaces the
             SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
             function.  Type should be one of IRQ_TYPE_xxx defined in
             <linux/irq.h>
”h]”(hØ)”}”(hŒëNew functions to manipulate the irqdesc array.  The first 4 are expected
to be useful only to machine specific code.  The last is recommended to
only be used by machine specific code, but may be used in drivers if
absolutely necessary.”h]”hŒëNew functions to manipulate the irqdesc array.  The first 4 are expected
to be useful only to machine specific code.  The last is recommended to
only be used by machine specific code, but may be used in drivers if
absolutely necessary.”…””}”(hjÝ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K{hjÙ  ubjï  )”}”(hX€  set_irq_chip(irq,chip)
        Set the mask/unmask methods for handling this IRQ

set_irq_handler(irq,handler)
        Set the handler for this IRQ (level, edge, simple)

set_irq_chained_handler(irq,handler)
        Set a "chained" handler for this IRQ - automatically
        enables this IRQ (eg, Neponset and SA1111 handlers).

set_irq_flags(irq,flags)
        Set the valid/probe/noautoenable flags.

set_irq_type(irq,type)
        Set active the IRQ edge(s)/level.  This replaces the
        SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
        function.  Type should be one of IRQ_TYPE_xxx defined in
        <linux/irq.h>
”h]”h¸)”}”(hhh]”(h½)”}”(hŒIset_irq_chip(irq,chip)
Set the mask/unmask methods for handling this IRQ
”h]”(hÃ)”}”(hŒset_irq_chip(irq,chip)”h]”hŒset_irq_chip(irq,chip)”…””}”(hjö  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h Khjò  ubhÓ)”}”(hhh]”hØ)”}”(hŒ1Set the mask/unmask methods for handling this IRQ”h]”hŒ1Set the mask/unmask methods for handling this IRQ”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhjò  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Khjï  ubh½)”}”(hŒPset_irq_handler(irq,handler)
Set the handler for this IRQ (level, edge, simple)
”h]”(hÃ)”}”(hŒset_irq_handler(irq,handler)”h]”hŒset_irq_handler(irq,handler)”…””}”(hj%  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h K„hj!  ubhÓ)”}”(hhh]”hØ)”}”(hŒ2Set the handler for this IRQ (level, edge, simple)”h]”hŒ2Set the handler for this IRQ (level, edge, simple)”…””}”(hj6  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K„hj3  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhj!  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h K„hjï  ubh½)”}”(hŒset_irq_chained_handler(irq,handler)
Set a "chained" handler for this IRQ - automatically
enables this IRQ (eg, Neponset and SA1111 handlers).
”h]”(hÃ)”}”(hŒ$set_irq_chained_handler(irq,handler)”h]”hŒ$set_irq_chained_handler(irq,handler)”…””}”(hjT  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h KˆhjP  ubhÓ)”}”(hhh]”hØ)”}”(hŒiSet a "chained" handler for this IRQ - automatically
enables this IRQ (eg, Neponset and SA1111 handlers).”h]”hŒmSet a â€œchainedâ€ handler for this IRQ - automatically
enables this IRQ (eg, Neponset and SA1111 handlers).”…””}”(hje  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K‡hjb  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhjP  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Kˆhjï  ubh½)”}”(hŒAset_irq_flags(irq,flags)
Set the valid/probe/noautoenable flags.
”h]”(hÃ)”}”(hŒset_irq_flags(irq,flags)”h]”hŒset_irq_flags(irq,flags)”…””}”(hjƒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h K‹hj  ubhÓ)”}”(hhh]”hØ)”}”(hŒ'Set the valid/probe/noautoenable flags.”h]”hŒ'Set the valid/probe/noautoenable flags.”…””}”(hj”  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K‹hj‘  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h K‹hjï  ubh½)”}”(hŒËset_irq_type(irq,type)
Set active the IRQ edge(s)/level.  This replaces the
SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
function.  Type should be one of IRQ_TYPE_xxx defined in
<linux/irq.h>
”h]”(hÃ)”}”(hŒset_irq_type(irq,type)”h]”hŒset_irq_type(irq,type)”…””}”(hj²  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h K‘hj®  ubhÓ)”}”(hhh]”hØ)”}”(hŒ³Set active the IRQ edge(s)/level.  This replaces the
SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
function.  Type should be one of IRQ_TYPE_xxx defined in
<linux/irq.h>”h]”hŒ³Set active the IRQ edge(s)/level.  This replaces the
SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
function.  Type should be one of IRQ_TYPE_xxx defined in
<linux/irq.h>”…””}”(hjÃ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h KŽhjÀ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhj®  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h K‘hjï  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h·hjë  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jî  hŸh¶h K€hjÙ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubj§  )”}”(hŒIset_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.
”h]”hØ)”}”(hŒHset_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.”h]”hŒHset_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.”…””}”(hjó  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K“hjï  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubj§  )”}”(hŒIDirect access to SA1111 INTPOL is deprecated.  Use set_irq_type instead.
”h]”hØ)”}”(hŒHDirect access to SA1111 INTPOL is deprecated.  Use set_irq_type instead.”h]”hŒHDirect access to SA1111 INTPOL is deprecated.  Use set_irq_type instead.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K•hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubj§  )”}”(hX  A handler is expected to perform any necessary acknowledgement of the
parent IRQ via the correct chip specific function.  For instance, if
the SA1111 is directly connected to a SA1110 GPIO, then you should
acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status.
”h]”hØ)”}”(hX  A handler is expected to perform any necessary acknowledgement of the
parent IRQ via the correct chip specific function.  For instance, if
the SA1111 is directly connected to a SA1110 GPIO, then you should
acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status.”h]”hX  A handler is expected to perform any necessary acknowledgement of the
parent IRQ via the correct chip specific function.  For instance, if
the SA1111 is directly connected to a SA1110 GPIO, then you should
acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status.”…””}”(hj#  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K—hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubj§  )”}”(hX®  For any child which doesn't have its own IRQ enable/disable controls
(eg, SMC9196), the handler must mask or acknowledge the parent IRQ
while the child handler is called, and the child handler should be the
"simple" handler (not "edge" nor "level").  After the handler completes,
the parent IRQ should be unmasked, and the status of all children must
be re-checked for pending events.  (see the Neponset IRQ handler for
details).
”h]”hØ)”}”(hX­  For any child which doesn't have its own IRQ enable/disable controls
(eg, SMC9196), the handler must mask or acknowledge the parent IRQ
while the child handler is called, and the child handler should be the
"simple" handler (not "edge" nor "level").  After the handler completes,
the parent IRQ should be unmasked, and the status of all children must
be re-checked for pending events.  (see the Neponset IRQ handler for
details).”h]”hX»  For any child which doesnâ€™t have its own IRQ enable/disable controls
(eg, SMC9196), the handler must mask or acknowledge the parent IRQ
while the child handler is called, and the child handler should be the
â€œsimpleâ€ handler (not â€œedgeâ€ nor â€œlevelâ€).  After the handler completes,
the parent IRQ should be unmasked, and the status of all children must
be re-checked for pending events.  (see the Neponset IRQ handler for
details).”…””}”(hj;  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h Kœhj7  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubj§  )”}”(hŒ@fixup_irq() is gone, as is `arch/arm/mach-*/include/mach/irq.h`
”h]”hØ)”}”(hŒ?fixup_irq() is gone, as is `arch/arm/mach-*/include/mach/irq.h`”h]”(hŒfixup_irq() is gone, as is ”…””}”(hjS  hžhhŸNh NubhŒtitle_reference”“”)”}”(hŒ$`arch/arm/mach-*/include/mach/irq.h`”h]”hŒ"arch/arm/mach-*/include/mach/irq.h”…””}”(hj]  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j[  hjS  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K¤hjO  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¦  hj¾  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1j¼  hj«  hžhhŸh¶h KyubhØ)”}”(hX  Please note that this will not solve all problems - some of them are
hardware based.  Mixing level-based and edge-based IRQs on the same
parent signal (eg neponset) is one such area where a software based
solution can't provide the full answer to low IRQ latency.”h]”hX	  Please note that this will not solve all problems - some of them are
hardware based.  Mixing level-based and edge-based IRQs on the same
parent signal (eg neponset) is one such area where a software based
solution canâ€™t provide the full answer to low IRQ latency.”…””}”(hj‚  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h×hŸh¶h K¦hj«  hžhubeh}”(h]”Œso-what-s-changed”ah ]”h"]”Œso, what's changed?”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kwubeh}”(h]”Œ
interrupts”ah ]”h"]”Œ
interrupts”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jÃ  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¶Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j  jš  j•  j’  uŒ	nametypes”}”(j  ‰j•  ‰uh}”(jš  h£j’  j«  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.