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YEN SIGN h]h¥}hjLsbah}(h]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(h/``intel_pstate`` CPU Performance Scaling Driverh](hliteral)}(h``intel_pstate``h]h intel_pstate}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjbubh CPU Performance Scaling Driver}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1j`hj]hhhhhKubh field_list)}(hhh](hfield)}(hhh](h field_name)}(h Copyrighth]h Copyright}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhKubh field_body)}(h|copy| 2017 Intel Corporation h]h paragraph)}(h|copy| 2017 Intel Corporationh](h©}(hjhhhNhNubh 2017 Intel Corporation}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hhh](j)}(hAuthorh]hAuthor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjhhhKubj)}(h0Rafael J. Wysocki h]j)}(h.Rafael J. Wysocki h](hRafael J. Wysocki <}(hjhhhNhNubh reference)}(hrafael.j.wysocki@intel.comh]hrafael.j.wysocki@intel.com}(hjhhhNhNubah}(h]h ]h"]h$]h&]refuri!mailto:rafael.j.wysocki@intel.comuh1jhjubh>}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK hjhhubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj\)}(hhh](ja)}(hGeneral Informationh]hGeneral Information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhKubj)}(hX``intel_pstate`` is a part of the :doc:`CPU performance scaling subsystem ` in the Linux kernel (``CPUFreq``). It is a scaling driver for the Sandy Bridge and later generations of Intel processors. Note, however, that some of those processors may not be supported. [To understand ``intel_pstate`` it is necessary to know how ``CPUFreq`` works in general, so this is the time to read Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]h](jg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh is a part of the }(hjhhhNhNubh)}(h2:doc:`CPU performance scaling subsystem `h]hinline)}(hj4h]h!CPU performance scaling subsystem}(hj8hhhNhNubah}(h]h ](xrefstdstd-doceh"]h$]h&]uh1j6hj2ubah}(h]h ]h"]h$]h&]refdocadmin-guide/pm/intel_pstate refdomainjCreftypedoc refexplicitrefwarn reftargetcpufrequh1hhhhKhjubh in the Linux kernel (}(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh). It is a scaling driver for the Sandy Bridge and later generations of Intel processors. Note, however, that some of those processors may not be supported. [To understand }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh it is necessary to know how }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhw works in general, so this is the time to read Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hXFor the processors supported by ``intel_pstate``, the P-state concept is broader than just an operating frequency or an operating performance point (see the LinuxCon Europe 2015 presentation by Kristen Accardi [1]_ for more information about that). For this reason, the representation of P-states used by ``intel_pstate`` internally follows the hardware specification (for details refer to Intel Software Developer’s Manual [2]_). However, the ``CPUFreq`` core uses frequencies for identifying operating performance points of CPUs and frequencies are involved in the user space interface exposed by it, so ``intel_pstate`` maps its internal representation of P-states to frequencies too (fortunately, that mapping is unambiguous). At the same time, it would not be practical for ``intel_pstate`` to supply the ``CPUFreq`` core with a table of available frequencies due to the possible size of it, so the driver does not do that. Some functionality of the core is limited by that.h](h For the processors supported by }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh, the P-state concept is broader than just an operating frequency or an operating performance point (see the LinuxCon Europe 2015 presentation by Kristen Accardi }(hjhhhNhNubhfootnote_reference)}(h[1]_h]h1}(hjhhhNhNubah}(h]id1ah ]h"]h$]h&]refidid8docnamejOuh1jhjresolvedKubh\ for more information about that). For this reason, the representation of P-states used by }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhi internally follows the hardware specification (for details refer to Intel Software Developer’s Manual }(hjhhhNhNubj)}(h[2]_h]h2}(hjhhhNhNubah}(h]id2ah ]h"]h$]h&]jid9jjOuh1jhjjKubh). However, the }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh core uses frequencies for identifying operating performance points of CPUs and frequencies are involved in the user space interface exposed by it, so }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh maps its internal representation of P-states to frequencies too (fortunately, that mapping is unambiguous). At the same time, it would not be practical for }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh to supply the }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh core with a table of available frequencies due to the possible size of it, so the driver does not do that. Some functionality of the core is limited by that.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hXSince the hardware P-state selection interface used by ``intel_pstate`` is available at the logical CPU level, the driver always works with individual CPUs. Consequently, if ``intel_pstate`` is in use, every ``CPUFreq`` policy object corresponds to one logical CPU and ``CPUFreq`` policies are effectively equivalent to CPUs. In particular, this means that they become "inactive" every time the corresponding CPU is taken offline and need to be re-initialized when it goes back online.h](h7Since the hardware P-state selection interface used by }(hj>hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj>ubhh is available at the logical CPU level, the driver always works with individual CPUs. Consequently, if }(hj>hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj>ubh is in use, every }(hj>hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj>ubh2 policy object corresponds to one logical CPU and }(hj>hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj>ubh policies are effectively equivalent to CPUs. In particular, this means that they become “inactive” every time the corresponding CPU is taken offline and need to be re-initialized when it goes back online.}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK&hj hhubj)}(hX``intel_pstate`` is not modular, so it cannot be unloaded, which means that the only way to pass early-configuration-time parameters to it is via the kernel command line. However, its configuration can be adjusted via ``sysfs`` to a great extent. In some configurations it even is possible to unregister it via ``sysfs`` which allows another ``CPUFreq`` scaling driver to be loaded and registered (see :ref:`below `).h](jg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh is not modular, so it cannot be unloaded, which means that the only way to pass early-configuration-time parameters to it is via the kernel command line. However, its configuration can be adjusted via }(hjhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhU to a great extent. In some configurations it even is possible to unregister it via }(hjhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh which allows another }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh1 scaling driver to be loaded and registered (see }(hjhhhNhNubh)}(h:ref:`below `h]j7)}(hjh]hbelow}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU status_attruh1hhhhK.hjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK.hj hhubhtarget)}(h.. _operation_modes:h]h}(h]h ]h"]h$]h&]joperation-modesuh1j hKhj hhhhubeh}(h]general-informationah ]h"]general informationah$]h&]uh1j[hj]hhhhhKubj\)}(hhh](ja)}(hOperation Modesh]hOperation Modes}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjhhhhhK8ubj)}(hX``intel_pstate`` can operate in two different modes, active or passive. In the active mode, it uses its own internal performance scaling governor algorithm or allows the hardware to do performance scaling by itself, while in the passive mode it responds to requests made by a generic ``CPUFreq`` governor implementing a certain performance scaling algorithm. Which of them will be in effect depends on what kernel command line options are used and on the capabilities of the processor.h](jg)}(h``intel_pstate``h]h intel_pstate}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj0ubhX  can operate in two different modes, active or passive. In the active mode, it uses its own internal performance scaling governor algorithm or allows the hardware to do performance scaling by itself, while in the passive mode it responds to requests made by a generic }(hj0hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj0ubh governor implementing a certain performance scaling algorithm. Which of them will be in effect depends on what kernel command line options are used and on the capabilities of the processor.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK:hjhhubj )}(h.. _active_mode:h]h}(h]h ]h"]h$]h&]j active-modeuh1j hKhjhhhhubj\)}(hhh](ja)}(h Active Modeh]h Active Mode}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjihhhhhKEubj)}(hXThis is the default operation mode of ``intel_pstate`` for processors with hardware-managed P-states (HWP) support. If it works in this mode, the ``scaling_driver`` policy attribute in ``sysfs`` for all ``CPUFreq`` policies contains the string "intel_pstate".h](h&This is the default operation mode of }(hjzhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjzubh] for processors with hardware-managed P-states (HWP) support. If it works in this mode, the }(hjzhhhNhNubjg)}(h``scaling_driver``h]hscaling_driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjzubh policy attribute in }(hjzhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjzubh for all }(hjzhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjzubh1 policies contains the string “intel_pstate”.}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKGhjihhubj)}(hXIn this mode the driver bypasses the scaling governors layer of ``CPUFreq`` and provides its own scaling algorithms for P-state selection. Those algorithms can be applied to ``CPUFreq`` policies in the same way as generic scaling governors (that is, through the ``scaling_governor`` policy attribute in ``sysfs``). [Note that different P-state selection algorithms may be chosen for different policies, but that is not recommended.]h](h@In this mode the driver bypasses the scaling governors layer of }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhd and provides its own scaling algorithms for P-state selection. Those algorithms can be applied to }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhM policies in the same way as generic scaling governors (that is, through the }(hjhhhNhNubjg)}(h``scaling_governor``h]hscaling_governor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh policy attribute in }(hjhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhy). [Note that different P-state selection algorithms may be chosen for different policies, but that is not recommended.]}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKLhjihhubj)}(hXThey are not generic scaling governors, but their names are the same as the names of some of those governors. Moreover, confusingly enough, they generally do not work in the same way as the generic governors they share the names with. For example, the ``powersave`` P-state selection algorithm provided by ``intel_pstate`` is not a counterpart of the generic ``powersave`` governor (roughly, it corresponds to the ``schedutil`` and ``ondemand`` governors).h](hThey are not generic scaling governors, but their names are the same as the names of some of those governors. Moreover, confusingly enough, they generally do not work in the same way as the generic governors they share the names with. For example, the }(hj& hhhNhNubjg)}(h ``powersave``h]h powersave}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj& ubh) P-state selection algorithm provided by }(hj& hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj& ubh% is not a counterpart of the generic }(hj& hhhNhNubjg)}(h ``powersave``h]h powersave}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj& ubh* governor (roughly, it corresponds to the }(hj& hhhNhNubjg)}(h ``schedutil``h]h schedutil}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj& ubh and }(hj& hhhNhNubjg)}(h ``ondemand``h]hondemand}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj& ubh governors).}(hj& hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKShjihhubj)}(hX&There are two P-state selection algorithms provided by ``intel_pstate`` in the active mode: ``powersave`` and ``performance``. The way they both operate depends on whether or not the hardware-managed P-states (HWP) feature has been enabled in the processor and possibly on the processor model.h](h7There are two P-state selection algorithms provided by }(hj hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh in the active mode: }(hj hhhNhNubjg)}(h ``powersave``h]h powersave}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh and }(hj hhhNhNubjg)}(h``performance``h]h performance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh. The way they both operate depends on whether or not the hardware-managed P-states (HWP) feature has been enabled in the processor and possibly on the processor model.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKZhjihhubj)}(hX-Which of the P-state selection algorithms is used by default depends on the :c:macro:`CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE` kernel configuration option. Namely, if that option is set, the ``performance`` algorithm will be used by default, and the other one will be used by default if it is not set.h](hLWhich of the P-state selection algorithms is used by default depends on the }(hj hhhNhNubh)}(h2:c:macro:`CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE`h]jg)}(hj h]h'CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE}(hj hhhNhNubah}(h]h ](jBcc-macroeh"]h$]h&]uh1jfhj ubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftypemacro refexplicitrefwarnjU'CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCEuh1hhhhK_hj ubhA kernel configuration option. Namely, if that option is set, the }(hj hhhNhNubjg)}(h``performance``h]h performance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh_ algorithm will be used by default, and the other one will be used by default if it is not set.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK_hjihhubj )}(h.. _active_mode_hwp:h]h}(h]h ]h"]h$]h&]jactive-mode-hwpuh1j hKhjihhhhubj\)}(hhh](ja)}(hActive Mode With HWPh]hActive Mode With HWP}(hj$ hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj! hhhhhKgubj)}(hIf the processor supports the HWP feature, it will be enabled during the processor initialization and cannot be disabled after that. It is possible to avoid enabling it by passing the ``intel_pstate=no_hwp`` argument to the kernel in the command line.h](hIf the processor supports the HWP feature, it will be enabled during the processor initialization and cannot be disabled after that. It is possible to avoid enabling it by passing the }(hj2 hhhNhNubjg)}(h``intel_pstate=no_hwp``h]hintel_pstate=no_hwp}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj2 ubh, argument to the kernel in the command line.}(hj2 hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKihj! hhubj)}(hXGIf the HWP feature has been enabled, ``intel_pstate`` relies on the processor to select P-states by itself, but still it can give hints to the processor's internal P-state selection logic. What those hints are depends on which P-state selection algorithm has been applied to the given policy (or to the CPU it corresponds to).h](h%If the HWP feature has been enabled, }(hjR hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjR ubhX relies on the processor to select P-states by itself, but still it can give hints to the processor’s internal P-state selection logic. What those hints are depends on which P-state selection algorithm has been applied to the given policy (or to the CPU it corresponds to).}(hjR hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKnhj! hhubj)}(hXEven though the P-state selection is carried out by the processor automatically, ``intel_pstate`` registers utilization update callbacks with the CPU scheduler in this mode. However, they are not used for running a P-state selection algorithm, but for periodic updates of the current CPU frequency information to be made available from the ``scaling_cur_freq`` policy attribute in ``sysfs``.h](hQEven though the P-state selection is carried out by the processor automatically, }(hjr hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjr ubh registers utilization update callbacks with the CPU scheduler in this mode. However, they are not used for running a P-state selection algorithm, but for periodic updates of the current CPU frequency information to be made available from the }(hjr hhhNhNubjg)}(h``scaling_cur_freq``h]hscaling_cur_freq}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjr ubh policy attribute in }(hjr hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjr ubh.}(hjr hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKthj! hhubj\)}(hhh](ja)}(hHWP + ``performance``h](hHWP + }(hj hhhNhNubjg)}(h``performance``h]h performance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubeh}(h]h ]h"]h$]h&]uh1j`hj hhhhhK{ubj)}(hX%In this configuration ``intel_pstate`` will write 0 to the processor's Energy-Performance Preference (EPP) knob (if supported) or its Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's internal P-state selection logic is expected to focus entirely on performance.h](hIn this configuration }(hj hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhX will write 0 to the processor’s Energy-Performance Preference (EPP) knob (if supported) or its Energy-Performance Bias (EPB) knob (otherwise), which means that the processor’s internal P-state selection logic is expected to focus entirely on performance.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK}hj hhubj)}(hXThis will override the EPP/EPB setting coming from the ``sysfs`` interface (see :ref:`energy_performance_hints` below). Moreover, any attempts to change the EPP/EPB to a value different from 0 ("performance") via ``sysfs`` in this configuration will be rejected.h](h7This will override the EPP/EPB setting coming from the }(hj hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh interface (see }(hj hhhNhNubh)}(h:ref:`energy_performance_hints`h]j7)}(hj h]henergy_performance_hints}(hj hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj ubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftyperef refexplicitrefwarnjUenergy_performance_hintsuh1hhhhKhj ubhk below). Moreover, any attempts to change the EPP/EPB to a value different from 0 (“performance”) via }(hj hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh( in this configuration will be rejected.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hAlso, in this configuration the range of P-states available to the processor's internal P-state selection logic is always restricted to the upper boundary (that is, the maximum P-state that the driver is allowed to use).h]hAlso, in this configuration the range of P-states available to the processor’s internal P-state selection logic is always restricted to the upper boundary (that is, the maximum P-state that the driver is allowed to use).}(hjK hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj hhubeh}(h]hwp-performanceah ]h"]hwp + performanceah$]h&]uh1j[hj! hhhhhK{ubj\)}(hhh](ja)}(hHWP + ``powersave``h](hHWP + }(hjd hhhNhNubjg)}(h ``powersave``h]h powersave}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjd ubeh}(h]h ]h"]h$]h&]uh1j`hja hhhhhKubj)}(hXIn this configuration ``intel_pstate`` will set the processor's Energy-Performance Preference (EPP) knob (if supported) or its Energy-Performance Bias (EPB) knob (otherwise) to whatever value it was previously set to via ``sysfs`` (or whatever default value it was set to by the platform firmware). This usually causes the processor's internal P-state selection logic to be less performance-focused.h](hIn this configuration }(hj hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh will set the processor’s Energy-Performance Preference (EPP) knob (if supported) or its Energy-Performance Bias (EPB) knob (otherwise) to whatever value it was previously set to via }(hj hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh (or whatever default value it was set to by the platform firmware). This usually causes the processor’s internal P-state selection logic to be less performance-focused.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhja hhubeh}(h] hwp-powersaveah ]h"]hwp + powersaveah$]h&]uh1j[hj! hhhhhKubeh}(h](active-mode-with-hwpj eh ]h"](active mode with hwpactive_mode_hwpeh$]h&]uh1j[hjihhhhhKgexpect_referenced_by_name}j j sexpect_referenced_by_id}j j subj\)}(hhh](ja)}(hActive Mode Without HWPh]hActive Mode Without HWP}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhKubj)}(hXThis operation mode is optional for processors that do not support the HWP feature or when the ``intel_pstate=no_hwp`` argument is passed to the kernel in the command line. The active mode is used in those cases if the ``intel_pstate=active`` argument is passed to the kernel in the command line. In this mode ``intel_pstate`` may refuse to work with processors that are not recognized by it. [Note that ``intel_pstate`` will never refuse to work with any processor with the HWP feature enabled.]h](h_This operation mode is optional for processors that do not support the HWP feature or when the }(hj hhhNhNubjg)}(h``intel_pstate=no_hwp``h]hintel_pstate=no_hwp}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhf argument is passed to the kernel in the command line. The active mode is used in those cases if the }(hj hhhNhNubjg)}(h``intel_pstate=active``h]hintel_pstate=active}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhD argument is passed to the kernel in the command line. In this mode }(hj hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhO may refuse to work with processors that are not recognized by it. [Note that }(hj hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhL will never refuse to work with any processor with the HWP feature enabled.]}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hXIn this mode ``intel_pstate`` registers utilization update callbacks with the CPU scheduler in order to run a P-state selection algorithm, either ``powersave`` or ``performance``, depending on the ``scaling_governor`` policy setting in ``sysfs``. The current CPU frequency information to be made available from the ``scaling_cur_freq`` policy attribute in ``sysfs`` is periodically updated by those utilization update callbacks too.h](h In this mode }(hj. hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubhu registers utilization update callbacks with the CPU scheduler in order to run a P-state selection algorithm, either }(hj. hhhNhNubjg)}(h ``powersave``h]h powersave}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubh or }(hj. hhhNhNubjg)}(h``performance``h]h performance}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubh, depending on the }(hj. hhhNhNubjg)}(h``scaling_governor``h]hscaling_governor}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubh policy setting in }(hj. hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubhG. The current CPU frequency information to be made available from the }(hj. hhhNhNubjg)}(h``scaling_cur_freq``h]hscaling_cur_freq}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubh policy attribute in }(hj. hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj. ubhC is periodically updated by those utilization update callbacks too.}(hj. hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj\)}(hhh](ja)}(h``performance``h]jg)}(hj h]h performance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhKubj)}(h~Without HWP, this P-state selection algorithm is always the same regardless of the processor model and platform configuration.h]h~Without HWP, this P-state selection algorithm is always the same regardless of the processor model and platform configuration.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hIt selects the maximum P-state it is allowed to use, subject to limits set via ``sysfs``, every time the driver configuration for the given CPU is updated (e.g. via ``sysfs``).h](hOIt selects the maximum P-state it is allowed to use, subject to limits set via }(hj hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhM, every time the driver configuration for the given CPU is updated (e.g. via }(hj hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh).}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hThis is the default P-state selection algorithm if the :c:macro:`CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE` kernel configuration option is set.h](h7This is the default P-state selection algorithm if the }(hj hhhNhNubh)}(h2:c:macro:`CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE`h]jg)}(hj h]h'CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE}(hj hhhNhNubah}(h]h ](jBj c-macroeh"]h$]h&]uh1jfhj ubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftypemacro refexplicitrefwarnjU'CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCEuh1hhhhKhj ubh$ kernel configuration option is set.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubeh}(h] performanceah ]h"] performanceah$]h&]uh1j[hj hhhhhKubj\)}(hhh](ja)}(h ``powersave``h]jg)}(hjR h]h powersave}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjP ubah}(h]h ]h"]h$]h&]uh1j`hjM hhhhhKubj)}(hX<Without HWP, this P-state selection algorithm is similar to the algorithm implemented by the generic ``schedutil`` scaling governor except that the utilization metric used by it is based on numbers coming from feedback registers of the CPU. It generally selects P-states proportional to the current CPU utilization.h](heWithout HWP, this P-state selection algorithm is similar to the algorithm implemented by the generic }(hjg hhhNhNubjg)}(h ``schedutil``h]h schedutil}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjg ubh scaling governor except that the utilization metric used by it is based on numbers coming from feedback registers of the CPU. It generally selects P-states proportional to the current CPU utilization.}(hjg hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjM hhubj)}(hX.This algorithm is run by the driver's utilization update callback for the given CPU when it is invoked by the CPU scheduler, but not more often than every 10 ms. Like in the ``performance`` case, the hardware configuration is not touched if the new P-state turns out to be the same as the current one.h](hThis algorithm is run by the driver’s utilization update callback for the given CPU when it is invoked by the CPU scheduler, but not more often than every 10 ms. Like in the }(hj hhhNhNubjg)}(h``performance``h]h performance}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubhp case, the hardware configuration is not touched if the new P-state turns out to be the same as the current one.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjM hhubj)}(hThis is the default P-state selection algorithm if the :c:macro:`CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE` kernel configuration option is not set.h](h7This is the default P-state selection algorithm if the }(hj hhhNhNubh)}(h2:c:macro:`CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE`h]jg)}(hj h]h'CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE}(hj hhhNhNubah}(h]h ](jBj c-macroeh"]h$]h&]uh1jfhj ubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftypemacro refexplicitrefwarnjU'CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCEuh1hhhhKhj ubh( kernel configuration option is not set.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjM hhubj )}(h.. _passive_mode:h]h}(h]h ]h"]h$]h&]j passive-modeuh1j hMhjM hhhhubeh}(h] powersaveah ]h"] powersaveah$]h&]uh1j[hj hhhhhKubeh}(h]active-mode-without-hwpah ]h"]active mode without hwpah$]h&]uh1j[hjihhhhhKubeh}(h](jhid4eh ]h"]( active mode active_modeeh$]h&]uh1j[hjhhhhhKEj }j j^sj }jhj^subj\)}(hhh](ja)}(h Passive Modeh]h Passive Mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhKubj)}(hXThis is the default operation mode of ``intel_pstate`` for processors without hardware-managed P-states (HWP) support. It is always used if the ``intel_pstate=passive`` argument is passed to the kernel in the command line regardless of whether or not the given processor supports HWP. [Note that the ``intel_pstate=no_hwp`` setting causes the driver to start in the passive mode if it is not combined with ``intel_pstate=active``.] Like in the active mode without HWP support, in this mode ``intel_pstate`` may refuse to work with processors that are not recognized by it if HWP is prevented from being enabled through the kernel command line.h](h&This is the default operation mode of }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh[ for processors without hardware-managed P-states (HWP) support. It is always used if the }(hjhhhNhNubjg)}(h``intel_pstate=passive``h]hintel_pstate=passive}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh argument is passed to the kernel in the command line regardless of whether or not the given processor supports HWP. [Note that the }(hjhhhNhNubjg)}(h``intel_pstate=no_hwp``h]hintel_pstate=no_hwp}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhS setting causes the driver to start in the passive mode if it is not combined with }(hjhhhNhNubjg)}(h``intel_pstate=active``h]hintel_pstate=active}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh>.] Like in the active mode without HWP support, in this mode }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh may refuse to work with processors that are not recognized by it if HWP is prevented from being enabled through the kernel command line.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hXIf the driver works in this mode, the ``scaling_driver`` policy attribute in ``sysfs`` for all ``CPUFreq`` policies contains the string "intel_cpufreq". Then, the driver behaves like a regular ``CPUFreq`` scaling driver. That is, it is invoked by generic scaling governors when necessary to talk to the hardware in order to change the P-state of a CPU (in particular, the ``schedutil`` governor can invoke it directly from scheduler context).h](h&If the driver works in this mode, the }(hjwhhhNhNubjg)}(h``scaling_driver``h]hscaling_driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjwubh policy attribute in }(hjwhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjwubh for all }(hjwhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjwubh[ policies contains the string “intel_cpufreq”. Then, the driver behaves like a regular }(hjwhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjwubh scaling driver. That is, it is invoked by generic scaling governors when necessary to talk to the hardware in order to change the P-state of a CPU (in particular, the }(hjwhhhNhNubjg)}(h ``schedutil``h]h schedutil}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjwubh9 governor can invoke it directly from scheduler context).}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj)}(hXWhile in this mode, ``intel_pstate`` can be used with all of the (generic) scaling governors listed by the ``scaling_available_governors`` policy attribute in ``sysfs`` (and the P-state selection algorithms described above are not used). Then, it is responsible for the configuration of policy objects corresponding to CPUs and provides the ``CPUFreq`` core (and the scaling governors attached to the policy objects) with accurate information on the maximum and minimum operating frequencies supported by the hardware (including the so-called "turbo" frequency ranges). In other words, in the passive mode the entire range of available P-states is exposed by ``intel_pstate`` to the ``CPUFreq`` core. However, in this mode the driver does not register utilization update callbacks with the CPU scheduler and the ``scaling_cur_freq`` information comes from the ``CPUFreq`` core (and is the last frequency selected by the current scaling governor for the given policy).h](hWhile in this mode, }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhG can be used with all of the (generic) scaling governors listed by the }(hjhhhNhNubjg)}(h``scaling_available_governors``h]hscaling_available_governors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh policy attribute in }(hjhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh (and the P-state selection algorithms described above are not used). Then, it is responsible for the configuration of policy objects corresponding to CPUs and provides the }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhX8 core (and the scaling governors attached to the policy objects) with accurate information on the maximum and minimum operating frequencies supported by the hardware (including the so-called “turbo” frequency ranges). In other words, in the passive mode the entire range of available P-states is exposed by }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh to the }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhw core. However, in this mode the driver does not register utilization update callbacks with the CPU scheduler and the }(hjhhhNhNubjg)}(h``scaling_cur_freq``h]hscaling_cur_freq}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh information comes from the }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh` core (and is the last frequency selected by the current scaling governor for the given policy).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj hhubj )}(h .. _turbo:h]h}(h]h ]h"]h$]h&]jturbouh1j hMChj hhhhubeh}(h](j id5eh ]h"]( passive mode passive_modeeh$]h&]uh1j[hjhhhhhKj }jj sj }j j subeh}(h](jid3eh ]h"](operation modesoperation_modeseh$]h&]uh1j[hj]hhhhhK8j }jj sj }jj subj\)}(hhh](ja)}(hTurbo P-states Supporth]hTurbo P-states Support}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjhhhhhKubj)}(hXIn the majority of cases, the entire range of P-states available to ``intel_pstate`` can be divided into two sub-ranges that correspond to different types of processor behavior, above and below a boundary that will be referred to as the "turbo threshold" in what follows.h](hDIn the majority of cases, the entire range of P-states available to }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh can be divided into two sub-ranges that correspond to different types of processor behavior, above and below a boundary that will be referred to as the “turbo threshold” in what follows.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hXThe P-states above the turbo threshold are referred to as "turbo P-states" and the whole sub-range of P-states they belong to is referred to as the "turbo range". These names are related to the Turbo Boost technology allowing a multicore processor to opportunistically increase the P-state of one or more cores if there is enough power to do that and if that is not going to cause the thermal envelope of the processor package to be exceeded.h]hXThe P-states above the turbo threshold are referred to as “turbo P-states” and the whole sub-range of P-states they belong to is referred to as the “turbo range”. These names are related to the Turbo Boost technology allowing a multicore processor to opportunistically increase the P-state of one or more cores if there is enough power to do that and if that is not going to cause the thermal envelope of the processor package to be exceeded.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hXsSpecifically, if software sets the P-state of a CPU core within the turbo range (that is, above the turbo threshold), the processor is permitted to take over performance scaling control for that core and put it into turbo P-states of its choice going forward. However, that permission is interpreted differently by different processor generations. Namely, the Sandy Bridge generation of processors will never use any P-states above the last one set by software for the given core, even if it is within the turbo range, whereas all of the later processor generations will take it as a license to use any P-states from the turbo range, even above the one set by software. In other words, on those processors setting any P-state from the turbo range will enable the processor to put the given core into all turbo P-states up to and including the maximum supported one as it sees fit.h]hXsSpecifically, if software sets the P-state of a CPU core within the turbo range (that is, above the turbo threshold), the processor is permitted to take over performance scaling control for that core and put it into turbo P-states of its choice going forward. However, that permission is interpreted differently by different processor generations. Namely, the Sandy Bridge generation of processors will never use any P-states above the last one set by software for the given core, even if it is within the turbo range, whereas all of the later processor generations will take it as a license to use any P-states from the turbo range, even above the one set by software. In other words, on those processors setting any P-state from the turbo range will enable the processor to put the given core into all turbo P-states up to and including the maximum supported one as it sees fit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hXsOne important property of turbo P-states is that they are not sustainable. More precisely, there is no guarantee that any CPUs will be able to stay in any of those states indefinitely, because the power distribution within the processor package may change over time or the thermal envelope it was designed for might be exceeded if a turbo P-state was used for too long.h]hXsOne important property of turbo P-states is that they are not sustainable. More precisely, there is no guarantee that any CPUs will be able to stay in any of those states indefinitely, because the power distribution within the processor package may change over time or the thermal envelope it was designed for might be exceeded if a turbo P-state was used for too long.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM hjhhubj)}(hXfIn turn, the P-states below the turbo threshold generally are sustainable. In fact, if one of them is set by software, the processor is not expected to change it to a lower one unless in a thermal stress or a power limit violation situation (a higher P-state may still be used if it is set for another CPU in the same package at the same time, for example).h]hXfIn turn, the P-states below the turbo threshold generally are sustainable. In fact, if one of them is set by software, the processor is not expected to change it to a lower one unless in a thermal stress or a power limit violation situation (a higher P-state may still be used if it is set for another CPU in the same package at the same time, for example).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hXSome processors allow multiple cores to be in turbo P-states at the same time, but the maximum P-state that can be set for them generally depends on the number of cores running concurrently. The maximum turbo P-state that can be set for 3 cores at the same time usually is lower than the analogous maximum P-state for 2 cores, which in turn usually is lower than the maximum turbo P-state that can be set for 1 core. The one-core maximum turbo P-state is thus the maximum supported one overall.h]hXSome processors allow multiple cores to be in turbo P-states at the same time, but the maximum P-state that can be set for them generally depends on the number of cores running concurrently. The maximum turbo P-state that can be set for 3 cores at the same time usually is lower than the analogous maximum P-state for 2 cores, which in turn usually is lower than the maximum turbo P-state that can be set for 1 core. The one-core maximum turbo P-state is thus the maximum supported one overall.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hXThe maximum supported turbo P-state, the turbo threshold (the maximum supported non-turbo P-state) and the minimum supported P-state are specific to the processor model and can be determined by reading the processor's model-specific registers (MSRs). Moreover, some processors support the Configurable TDP (Thermal Design Power) feature and, when that feature is enabled, the turbo threshold effectively becomes a configurable value that can be set by the platform firmware.h]hXThe maximum supported turbo P-state, the turbo threshold (the maximum supported non-turbo P-state) and the minimum supported P-state are specific to the processor model and can be determined by reading the processor’s model-specific registers (MSRs). Moreover, some processors support the Configurable TDP (Thermal Design Power) feature and, when that feature is enabled, the turbo threshold effectively becomes a configurable value that can be set by the platform firmware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hXUnlike ``_PSS`` objects in the ACPI tables, ``intel_pstate`` always exposes the entire range of available P-states, including the whole turbo range, to the ``CPUFreq`` core and (in the passive mode) to generic scaling governors. This generally causes turbo P-states to be set more often when ``intel_pstate`` is used relative to ACPI-based CPU performance scaling (see :ref:`below ` for more information).nh](hUnlike }(hj#hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh objects in the ACPI tables, }(hj#hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh` always exposes the entire range of available P-states, including the whole turbo range, to the }(hj#hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh~ core and (in the passive mode) to generic scaling governors. This generally causes turbo P-states to be set more often when }(hj#hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh= is used relative to ACPI-based CPU performance scaling (see }(hj#hhhNhNubh)}(h:ref:`below `h]j7)}(hjuh]hbelow}(hjwhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjsubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU acpi-cpufrequh1hhhhM'hj#ubh for more information).}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM'hjhhubj)}(hXpMoreover, since ``intel_pstate`` always knows what the real turbo threshold is (even if the Configurable TDP feature is enabled in the processor), its ``no_turbo`` attribute in ``sysfs`` (described :ref:`below `) should work as expected in all cases (that is, if set to disable turbo P-states, it always should prevent ``intel_pstate`` from using them).h](hMoreover, since }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhw always knows what the real turbo threshold is (even if the Configurable TDP feature is enabled in the processor), its }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh attribute in }(hjhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh (described }(hjhhhNhNubh)}(h:ref:`below `h]j7)}(hjh]hbelow}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU no_turbo_attruh1hhhhM.hjubhl) should work as expected in all cases (that is, if set to disable turbo P-states, it always should prevent }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh from using them).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM.hjhhubeh}(h](turbo-p-states-supportjeh ]h"](turbo p-states supportturboeh$]h&]uh1j[hj]hhhhhKj }jj}sj }jj}subj\)}(hhh](ja)}(hProcessor Supporth]hProcessor Support}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj"hhhhhM6ubj)}(hTo handle a given processor ``intel_pstate`` requires a number of different pieces of information on it to be known, including:h](hTo handle a given processor }(hj3hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj3ubhS requires a number of different pieces of information on it to be known, including:}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM8hj"hhubh block_quote)}(hXy* The minimum supported P-state. * The maximum supported :ref:`non-turbo P-state `. * Whether or not turbo P-states are supported at all. * The maximum supported :ref:`one-core turbo P-state ` (if turbo P-states are supported). * The scaling formula to translate the driver's internal representation of P-states into frequencies and the other way around. h]h bullet_list)}(hhh](h list_item)}(hThe minimum supported P-state. h]j)}(hThe minimum supported P-state.h]hThe minimum supported P-state.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM;hj`ubah}(h]h ]h"]h$]h&]uh1j^hj[ubj_)}(h8The maximum supported :ref:`non-turbo P-state `. h]j)}(h7The maximum supported :ref:`non-turbo P-state `.h](hThe maximum supported }(hj|hhhNhNubh)}(h :ref:`non-turbo P-state `h]j7)}(hjh]hnon-turbo P-state}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUturbouh1hhhhM=hj|ubh.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM=hjxubah}(h]h ]h"]h$]h&]uh1j^hj[ubj_)}(h4Whether or not turbo P-states are supported at all. h]j)}(h3Whether or not turbo P-states are supported at all.h]h3Whether or not turbo P-states are supported at all.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM?hjubah}(h]h ]h"]h$]h&]uh1j^hj[ubj_)}(h_The maximum supported :ref:`one-core turbo P-state ` (if turbo P-states are supported). h]j)}(h^The maximum supported :ref:`one-core turbo P-state ` (if turbo P-states are supported).h](hThe maximum supported }(hjhhhNhNubh)}(h%:ref:`one-core turbo P-state `h]j7)}(hjh]hone-core turbo P-state}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUturbouh1hhhhMAhjubh# (if turbo P-states are supported).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMAhjubah}(h]h ]h"]h$]h&]uh1j^hj[ubj_)}(h}The scaling formula to translate the driver's internal representation of P-states into frequencies and the other way around. h]j)}(h|The scaling formula to translate the driver's internal representation of P-states into frequencies and the other way around.h]h~The scaling formula to translate the driver’s internal representation of P-states into frequencies and the other way around.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMDhjubah}(h]h ]h"]h$]h&]uh1j^hj[ubeh}(h]h ]h"]h$]h&]bullet*uh1jYhhhM;hjUubah}(h]h ]h"]h$]h&]uh1jShhhM;hj"hhubj)}(hXGenerally, ways to obtain that information are specific to the processor model or family. Although it often is possible to obtain all of it from the processor itself (using model-specific registers), there are cases in which hardware manuals need to be consulted to get to it too.h]hXGenerally, ways to obtain that information are specific to the processor model or family. Although it often is possible to obtain all of it from the processor itself (using model-specific registers), there are cases in which hardware manuals need to be consulted to get to it too.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMGhj"hhubj)}(hX~For this reason, there is a list of supported processors in ``intel_pstate`` and the driver initialization will fail if the detected processor is not in that list, unless it supports the HWP feature. [The interface to obtain all of the information listed above is the same for all of the processors supporting the HWP feature, which is why ``intel_pstate`` works with all of them.]h](hSince CAS takes CPU capacities into account, it does not require CPU prioritization and it allows tasks to be distributed more symmetrically among the more performant and less performant CPUs. Once placed on a CPU with enough capacity to accommodate it, a task may just continue to run there regardless of whether or not the other CPUs are fully loaded, so on average CAS reduces the utilization of the more performant CPUs which causes the energy usage to be more balanced because the more performant CPUs are generally less energy-efficient than the less performant ones.h]hX>Since CAS takes CPU capacities into account, it does not require CPU prioritization and it allows tasks to be distributed more symmetrically among the more performant and less performant CPUs. Once placed on a CPU with enough capacity to accommodate it, a task may just continue to run there regardless of whether or not the other CPUs are fully loaded, so on average CAS reduces the utilization of the more performant CPUs which causes the energy usage to be more balanced because the more performant CPUs are generally less energy-efficient than the less performant ones.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj)}(hIn order to use CAS, the scheduler needs to know the capacity of each CPU in the system and it needs to be able to compute scale-invariant utilization of CPUs, so ``intel_pstate`` provides it with the requisite information.h](hIn order to use CAS, the scheduler needs to know the capacity of each CPU in the system and it needs to be able to compute scale-invariant utilization of CPUs, so }(hjJhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjJubh, provides it with the requisite information.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj)}(hXFirst of all, the capacity of each CPU is represented by the ratio of its highest HWP performance level, multiplied by 1024, to the highest HWP performance level of the most performant CPU in the system, which works because the HWP performance units are the same for all CPUs. Second, the frequency-invariance computations, carried out by the scheduler to always express CPU utilization in the same units regardless of the frequency it is currently running at, are adjusted to take the CPU capacity into account. All of this happens when ``intel_pstate`` has registered itself with the ``CPUFreq`` core and it has figured out that it is running on a hybrid processor without SMT.h](hXFirst of all, the capacity of each CPU is represented by the ratio of its highest HWP performance level, multiplied by 1024, to the highest HWP performance level of the most performant CPU in the system, which works because the HWP performance units are the same for all CPUs. Second, the frequency-invariance computations, carried out by the scheduler to always express CPU utilization in the same units regardless of the frequency it is currently running at, are adjusted to take the CPU capacity into account. All of this happens when }(hjjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjjubh has registered itself with the }(hjjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjjubhR core and it has figured out that it is running on a hybrid processor without SMT.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubeh}(h](!capacity-aware-scheduling-supportjeh ]h"](!capacity-aware scheduling supportcaseh$]h&]uh1j[hjvhhhhhMwj }jjsj }jjsubj\)}(hhh](ja)}(hEnergy-Aware Scheduling Supporth]hEnergy-Aware Scheduling Support}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjhhhhhMubj)}(hXIf ``CONFIG_ENERGY_MODEL`` has been set during kernel configuration and ``intel_pstate`` runs on a hybrid processor without SMT, in addition to enabling :ref:`CAS` it registers an Energy Model for the processor. This allows the Energy-Aware Scheduling (EAS) support to be enabled in the CPU scheduler if ``schedutil`` is used as the ``CPUFreq`` governor which requires ``intel_pstate`` to operate in the :ref:`passive mode `.h](hIf }(hjhhhNhNubjg)}(h``CONFIG_ENERGY_MODEL``h]hCONFIG_ENERGY_MODEL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh. has been set during kernel configuration and }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhA runs on a hybrid processor without SMT, in addition to enabling }(hjhhhNhNubh)}(h :ref:`CAS`h]j7)}(hjh]hCAS}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUcasuh1hhhhMhjubh it registers an Energy Model for the processor. This allows the Energy-Aware Scheduling (EAS) support to be enabled in the CPU scheduler if }(hjhhhNhNubjg)}(h ``schedutil``h]h schedutil}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh is used as the }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh governor which requires }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh to operate in the }(hjhhhNhNubh)}(h":ref:`passive mode `h]j7)}(hj@h]h passive mode}(hjBhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj>ubah}(h]h ]h"]h$]h&]refdocjO refdomainjLreftyperef refexplicitrefwarnjU passive_modeuh1hhhhMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hXThe Energy Model registered by ``intel_pstate`` is artificial (that is, it is based on abstract cost values and it does not include any real power numbers) and it is relatively simple to avoid unnecessary computations in the scheduler. There is a performance domain in it for every CPU in the system and the cost values for these performance domains have been chosen so that running a task on a less performant (small) CPU appears to be always cheaper than running that task on a more performant (big) CPU. However, for two CPUs of the same type, the cost difference depends on their current utilization, and the CPU whose current utilization is higher generally appears to be a more expensive destination for a given task. This helps to balance the load among CPUs of the same type.h](hThe Energy Model registered by }(hjhhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjhubhX is artificial (that is, it is based on abstract cost values and it does not include any real power numbers) and it is relatively simple to avoid unnecessary computations in the scheduler. There is a performance domain in it for every CPU in the system and the cost values for these performance domains have been chosen so that running a task on a less performant (small) CPU appears to be always cheaper than running that task on a more performant (big) CPU. However, for two CPUs of the same type, the cost difference depends on their current utilization, and the CPU whose current utilization is higher generally appears to be a more expensive destination for a given task. This helps to balance the load among CPUs of the same type.}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hXSince EAS works on top of CAS, high-utilization tasks are always migrated to CPUs with enough capacity to accommodate them, but thanks to EAS, low-utilization tasks tend to be placed on the CPUs that look less expensive to the scheduler. Effectively, this causes the less performant and less loaded CPUs to be preferred as long as they have enough spare capacity to run the given task which generally leads to reduced energy usage.h]hXSince EAS works on top of CAS, high-utilization tasks are always migrated to CPUs with enough capacity to accommodate them, but thanks to EAS, low-utilization tasks tend to be placed on the CPUs that look less expensive to the scheduler. Effectively, this causes the less performant and less loaded CPUs to be preferred as long as they have enough spare capacity to run the given task which generally leads to reduced energy usage.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hThe Energy Model created by ``intel_pstate`` can be inspected by looking at the ``energy_model`` directory in ``debugfs`` (typlically mounted on ``/sys/kernel/debug/``).h](hThe Energy Model created by }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh$ can be inspected by looking at the }(hjhhhNhNubjg)}(h``energy_model``h]h energy_model}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh directory in }(hjhhhNhNubjg)}(h ``debugfs``h]hdebugfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh (typlically mounted on }(hjhhhNhNubjg)}(h``/sys/kernel/debug/``h]h/sys/kernel/debug/}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubeh}(h]energy-aware-scheduling-supportah ]h"]energy-aware scheduling supportah$]h&]uh1j[hjvhhhhhMubeh}(h]support-for-hybrid-processorsah ]h"]support for hybrid processorsah$]h&]uh1j[hj]hhhhhMTubj\)}(hhh](ja)}(h!User Space Interface in ``sysfs``h](hUser Space Interface in }(hjhhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubeh}(h]h ]h"]h$]h&]uh1j`hjhhhhhMubj )}(h.. _global_attributes:h]h}(h]h ]h"]h$]h&]jglobal-attributesuh1j hMhjhhhhubj\)}(hhh](ja)}(hGlobal Attributesh]hGlobal Attributes}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj&hhhhhMubj)}(h``intel_pstate`` exposes several global attributes (files) in ``sysfs`` to control its functionality at the system level. They are located in the ``/sys/devices/system/cpu/intel_pstate/`` directory and affect all CPUs.h](jg)}(h``intel_pstate``h]h intel_pstate}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj7ubh. exposes several global attributes (files) in }(hj7hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj7ubhL to control its functionality at the system level. They are located in the }(hj7hhhNhNubjg)}(h)``/sys/devices/system/cpu/intel_pstate/``h]h%/sys/devices/system/cpu/intel_pstate/}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj7ubh directory and affect all CPUs.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj&hhubj)}(h~Some of them are not present if the ``intel_pstate=per_cpu_perf_limits`` argument is passed to the kernel in the command line.h](h$Some of them are not present if the }(hjwhhhNhNubjg)}(h$``intel_pstate=per_cpu_perf_limits``h]h intel_pstate=per_cpu_perf_limits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjwubh6 argument is passed to the kernel in the command line.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj&hhubhdefinition_list)}(hhh](hdefinition_list_item)}(hX*``max_perf_pct`` Maximum P-state the driver is allowed to set in percent of the maximum supported performance level (the highest supported :ref:`turbo P-state `). This attribute will not be exposed if the ``intel_pstate=per_cpu_perf_limits`` argument is present in the kernel command line. h](hterm)}(h``max_perf_pct``h]jg)}(hjh]h max_perf_pct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubah}(h]h ]h"]h$]h&]uh1jhhhMhjubh definition)}(hhh](j)}(hMaximum P-state the driver is allowed to set in percent of the maximum supported performance level (the highest supported :ref:`turbo P-state `).h](hzMaximum P-state the driver is allowed to set in percent of the maximum supported performance level (the highest supported }(hjhhhNhNubh)}(h:ref:`turbo P-state `h]j7)}(hjh]h turbo P-state}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUturbouh1hhhhMhjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(h~This attribute will not be exposed if the ``intel_pstate=per_cpu_perf_limits`` argument is present in the kernel command line.h](h*This attribute will not be exposed if the }(hjhhhNhNubjg)}(h$``intel_pstate=per_cpu_perf_limits``h]h intel_pstate=per_cpu_perf_limits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh0 argument is present in the kernel command line.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hX*``min_perf_pct`` Minimum P-state the driver is allowed to set in percent of the maximum supported performance level (the highest supported :ref:`turbo P-state `). This attribute will not be exposed if the ``intel_pstate=per_cpu_perf_limits`` argument is present in the kernel command line. h](j)}(h``min_perf_pct``h]jg)}(hj$h]h min_perf_pct}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj"ubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhh](j)}(hMinimum P-state the driver is allowed to set in percent of the maximum supported performance level (the highest supported :ref:`turbo P-state `).h](hzMinimum P-state the driver is allowed to set in percent of the maximum supported performance level (the highest supported }(hj<hhhNhNubh)}(h:ref:`turbo P-state `h]j7)}(hjFh]h turbo P-state}(hjHhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjDubah}(h]h ]h"]h$]h&]refdocjO refdomainjRreftyperef refexplicitrefwarnjUturbouh1hhhhMhj<ubh).}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj9ubj)}(h~This attribute will not be exposed if the ``intel_pstate=per_cpu_perf_limits`` argument is present in the kernel command line.h](h*This attribute will not be exposed if the }(hjnhhhNhNubjg)}(h$``intel_pstate=per_cpu_perf_limits``h]h intel_pstate=per_cpu_perf_limits}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjnubh0 argument is present in the kernel command line.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj9ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hX``num_pstates`` Number of P-states supported by the processor (between 0 and 255 inclusive) including both turbo and non-turbo P-states (see :ref:`turbo`). This attribute is present only if the value exposed by it is the same for all of the CPUs in the system. The value of this attribute is not affected by the ``no_turbo`` setting described :ref:`below `. This attribute is read-only. h](j)}(h``num_pstates``h]jg)}(hjh]h num_pstates}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhh](j)}(hNumber of P-states supported by the processor (between 0 and 255 inclusive) including both turbo and non-turbo P-states (see :ref:`turbo`).h](h}Number of P-states supported by the processor (between 0 and 255 inclusive) including both turbo and non-turbo P-states (see }(hjhhhNhNubh)}(h :ref:`turbo`h]j7)}(hjh]hturbo}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUturbouh1hhhhMhjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhThis attribute is present only if the value exposed by it is the same for all of the CPUs in the system.h]hhThis attribute is present only if the value exposed by it is the same for all of the CPUs in the system.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hoThe value of this attribute is not affected by the ``no_turbo`` setting described :ref:`below `.h](h3The value of this attribute is not affected by the }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh setting described }(hjhhhNhNubh)}(h:ref:`below `h]j7)}(hjh]hbelow}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftyperef refexplicitrefwarnjU no_turbo_attruh1hhhhMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hThis attribute is read-only.h]hThis attribute is read-only.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubj)}(hX``turbo_pct`` Ratio of the :ref:`turbo range ` size to the size of the entire range of supported P-states, in percent. This attribute is present only if the value exposed by it is the same for all of the CPUs in the system. This attribute is read-only. h](j)}(h ``turbo_pct``h]jg)}(hj\h]h turbo_pct}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjZubah}(h]h ]h"]h$]h&]uh1jhhhMhjVubj)}(hhh](j)}(hoRatio of the :ref:`turbo range ` size to the size of the entire range of supported P-states, in percent.h](h Ratio of the }(hjthhhNhNubh)}(h:ref:`turbo range `h]j7)}(hj~h]h turbo range}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj|ubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUturbouh1hhhhMhjtubhH size to the size of the entire range of supported P-states, in percent.}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjqubj)}(hhThis attribute is present only if the value exposed by it is the same for all of the CPUs in the system.h]hhThis attribute is present only if the value exposed by it is the same for all of the CPUs in the system.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjqubj)}(hThis attribute is read-only.h]hThis attribute is read-only.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjqubeh}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubeh}(h]h ]h"]h$]h&]uh1jhj&hhhhhNubj )}(h.. _no_turbo_attr:h]h}(h]h ]h"]h$]h&]j no-turbo-attruh1j hMEhj&hhhhubj)}(hhh](j)}(hXm``no_turbo`` If set (equal to 1), the driver is not allowed to set any turbo P-states (see :ref:`turbo`). If unset (equal to 0, which is the default), turbo P-states can be set by the driver. [Note that ``intel_pstate`` does not support the general ``boost`` attribute (supported by some other scaling drivers) which is replaced by this one.] This attribute does not affect the maximum supported frequency value supplied to the ``CPUFreq`` core and exposed via the policy interface, but it affects the maximum possible value of per-policy P-state limits (see :ref:`policy_attributes_interpretation` below for details). h](j)}(h ``no_turbo``h]jg)}(hjh]hno_turbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhh](j)}(hXJIf set (equal to 1), the driver is not allowed to set any turbo P-states (see :ref:`turbo`). If unset (equal to 0, which is the default), turbo P-states can be set by the driver. [Note that ``intel_pstate`` does not support the general ``boost`` attribute (supported by some other scaling drivers) which is replaced by this one.]h](hNIf set (equal to 1), the driver is not allowed to set any turbo P-states (see }(hjhhhNhNubh)}(h :ref:`turbo`h]j7)}(hj h]hturbo}(hj hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUturbouh1hhhhMhjubhe). If unset (equal to 0, which is the default), turbo P-states can be set by the driver. [Note that }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh does not support the general }(hjhhhNhNubjg)}(h ``boost``h]hboost}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhT attribute (supported by some other scaling drivers) which is replaced by this one.]}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hXThis attribute does not affect the maximum supported frequency value supplied to the ``CPUFreq`` core and exposed via the policy interface, but it affects the maximum possible value of per-policy P-state limits (see :ref:`policy_attributes_interpretation` below for details).h](hUThis attribute does not affect the maximum supported frequency value supplied to the }(hjVhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjVubhx core and exposed via the policy interface, but it affects the maximum possible value of per-policy P-state limits (see }(hjVhhhNhNubh)}(h':ref:`policy_attributes_interpretation`h]j7)}(hjrh]h policy_attributes_interpretation}(hjthhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjpubah}(h]h ]h"]h$]h&]refdocjO refdomainj~reftyperef refexplicitrefwarnjU policy_attributes_interpretationuh1hhhhMhjVubh below for details).}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hX&``hwp_dynamic_boost`` This attribute is only present if ``intel_pstate`` works in the :ref:`active mode with the HWP feature enabled ` in the processor. If set (equal to 1), it causes the minimum P-state limit to be increased dynamically for a short time whenever a task previously waiting on I/O is selected to run on a given logical CPU (the purpose of this mechanism is to improve performance). This setting has no effect on logical CPUs whose minimum P-state limit is directly set to the highest non-turbo P-state or above it. h](j)}(h``hwp_dynamic_boost``h]jg)}(hjh]hhwp_dynamic_boost}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhh](j)}(hXThis attribute is only present if ``intel_pstate`` works in the :ref:`active mode with the HWP feature enabled ` in the processor. If set (equal to 1), it causes the minimum P-state limit to be increased dynamically for a short time whenever a task previously waiting on I/O is selected to run on a given logical CPU (the purpose of this mechanism is to improve performance).h](h"This attribute is only present if }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh works in the }(hjhhhNhNubh)}(hA:ref:`active mode with the HWP feature enabled `h]j7)}(hjh]h(active mode with the HWP feature enabled}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUactive_mode_hwpuh1hhhhMhjubhX in the processor. If set (equal to 1), it causes the minimum P-state limit to be increased dynamically for a short time whenever a task previously waiting on I/O is selected to run on a given logical CPU (the purpose of this mechanism is to improve performance).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hThis setting has no effect on logical CPUs whose minimum P-state limit is directly set to the highest non-turbo P-state or above it.h]hThis setting has no effect on logical CPUs whose minimum P-state limit is directly set to the highest non-turbo P-state or above it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjhhubeh}(h]jah ]h"] no_turbo_attrah$]h&]uh1jhj&hhhhhNj }j&jsj }jjsubj )}(h.. _status_attr:h]h}(h]h ]h"]h$]h&]j status-attruh1j hM_hj&hhhhubj)}(hhh](j)}(hX"``status`` Operation mode of the driver: "active", "passive" or "off". "active" The driver is functional and in the :ref:`active mode `. "passive" The driver is functional and in the :ref:`passive mode `. "off" The driver is not functional (it is not registered as a scaling driver with the ``CPUFreq`` core). This attribute can be written to in order to change the driver's operation mode or to unregister it. The string written to it must be one of the possible values of it and, if successful, the write will cause the driver to switch over to the operation mode represented by that string - or to be unregistered in the "off" case. [Actually, switching over from the active mode to the passive mode or the other way around causes the driver to be unregistered and registered again with a different set of callbacks, so all of its settings (the global as well as the per-policy ones) are then reset to their default values, possibly depending on the target operation mode.] h](j)}(h ``status``h]jg)}(hj?h]hstatus}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj=ubah}(h]h ]h"]h$]h&]uh1jhhhM#hj9ubj)}(hhh](j)}(h;Operation mode of the driver: "active", "passive" or "off".h]hGOperation mode of the driver: “active”, “passive” or “off”.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM hjTubj)}(hhh](j)}(hO"active" The driver is functional and in the :ref:`active mode `. h](j)}(h"active"h]h “active”}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjhubj)}(hhh]j)}(hEThe driver is functional and in the :ref:`active mode `.h](h$The driver is functional and in the }(hj}hhhNhNubh)}(h :ref:`active mode `h]j7)}(hjh]h active mode}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU active_modeuh1hhhhMhj}ubh.}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjzubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jhhhMhjeubj)}(hR"passive" The driver is functional and in the :ref:`passive mode `. h](j)}(h "passive"h]h “passive”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhh]j)}(hGThe driver is functional and in the :ref:`passive mode `.h](h$The driver is functional and in the }(hjhhhNhNubh)}(h":ref:`passive mode `h]j7)}(hjh]h passive mode}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU passive_modeuh1hhhhMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjeubj)}(hi"off" The driver is not functional (it is not registered as a scaling driver with the ``CPUFreq`` core). h](j)}(h"off"h]h “off”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjubj)}(hhh]j)}(hbThe driver is not functional (it is not registered as a scaling driver with the ``CPUFreq`` core).h](hPThe driver is not functional (it is not registered as a scaling driver with the }(hj#hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh core).}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhMhjeubeh}(h]h ]h"]h$]h&]uh1jhjTubj)}(hXThis attribute can be written to in order to change the driver's operation mode or to unregister it. The string written to it must be one of the possible values of it and, if successful, the write will cause the driver to switch over to the operation mode represented by that string - or to be unregistered in the "off" case. [Actually, switching over from the active mode to the passive mode or the other way around causes the driver to be unregistered and registered again with a different set of callbacks, so all of its settings (the global as well as the per-policy ones) are then reset to their default values, possibly depending on the target operation mode.]h]hXThis attribute can be written to in order to change the driver’s operation mode or to unregister it. The string written to it must be one of the possible values of it and, if successful, the write will cause the driver to switch over to the operation mode represented by that string - or to be unregistered in the “off” case. [Actually, switching over from the active mode to the passive mode or the other way around causes the driver to be unregistered and registered again with a different set of callbacks, so all of its settings (the global as well as the per-policy ones) are then reset to their default values, possibly depending on the target operation mode.]}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjTubeh}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhhhM#hj6ubj)}(hXW``energy_efficiency`` This attribute is only present on platforms with CPUs matching the Kaby Lake or Coffee Lake desktop CPU model. By default, energy-efficiency optimizations are disabled on these CPU models if HWP is enabled. Enabling energy-efficiency optimizations may limit maximum operating frequency with or without the HWP feature. With HWP enabled, the optimizations are done only in the turbo frequency range. Without it, they are done in the entire available frequency range. Setting this attribute to "1" enables the energy-efficiency optimizations and setting to "0" disables them. h](j)}(h``energy_efficiency``h]jg)}(hjuh]henergy_efficiency}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjsubah}(h]h ]h"]h$]h&]uh1jhhhM.hjoubj)}(hhh]j)}(hX@This attribute is only present on platforms with CPUs matching the Kaby Lake or Coffee Lake desktop CPU model. By default, energy-efficiency optimizations are disabled on these CPU models if HWP is enabled. Enabling energy-efficiency optimizations may limit maximum operating frequency with or without the HWP feature. With HWP enabled, the optimizations are done only in the turbo frequency range. Without it, they are done in the entire available frequency range. Setting this attribute to "1" enables the energy-efficiency optimizations and setting to "0" disables them.h]hXHThis attribute is only present on platforms with CPUs matching the Kaby Lake or Coffee Lake desktop CPU model. By default, energy-efficiency optimizations are disabled on these CPU models if HWP is enabled. Enabling energy-efficiency optimizations may limit maximum operating frequency with or without the HWP feature. With HWP enabled, the optimizations are done only in the turbo frequency range. Without it, they are done in the entire available frequency range. Setting this attribute to “1” enables the energy-efficiency optimizations and setting to “0” disables them.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM&hjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jhhhM.hj6hhubeh}(h]j5ah ]h"] status_attrah$]h&]uh1jhj&hhhhhNj }jj+sj }j5j+subj )}(h%.. _policy_attributes_interpretation:h]h}(h]h ]h"]h$]h&]j policy-attributes-interpretationuh1j hMhj&hhhhubeh}(h](j%id6eh ]h"](global attributesglobal_attributeseh$]h&]uh1j[hjhhhhhMj }jjsj }j%jsubj\)}(hhh](ja)}(h#Interpretation of Policy Attributesh]h#Interpretation of Policy Attributes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjhhhhhM3ubj)}(hThe interpretation of some ``CPUFreq`` policy attributes described in Documentation/admin-guide/pm/cpufreq.rst is special with ``intel_pstate`` as the current scaling driver and it generally depends on the driver's :ref:`operation mode `.h](hThe interpretation of some }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhY policy attributes described in Documentation/admin-guide/pm/cpufreq.rst is special with }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhJ as the current scaling driver and it generally depends on the driver’s }(hjhhhNhNubh)}(h':ref:`operation mode `h]j7)}(hjh]hoperation mode}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjUoperation_modesuh1hhhhM5hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM5hjhhubj)}(hXFirst of all, the values of the ``cpuinfo_max_freq``, ``cpuinfo_min_freq`` and ``scaling_cur_freq`` attributes are produced by applying a processor-specific multiplier to the internal P-state representation used by ``intel_pstate``. Also, the values of the ``scaling_max_freq`` and ``scaling_min_freq`` attributes are capped by the frequency corresponding to the maximum P-state that the driver is allowed to set.h](h First of all, the values of the }(hj-hhhNhNubjg)}(h``cpuinfo_max_freq``h]hcpuinfo_max_freq}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj-ubh, }(hj-hhhNhNubjg)}(h``cpuinfo_min_freq``h]hcpuinfo_min_freq}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj-ubh and }(hj-hhhNhNubjg)}(h``scaling_cur_freq``h]hscaling_cur_freq}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj-ubht attributes are produced by applying a processor-specific multiplier to the internal P-state representation used by }(hj-hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj-ubh. Also, the values of the }(hj-hhhNhNubjg)}(h``scaling_max_freq``h]hscaling_max_freq}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj-ubh and }(hj-hhhNhNubjg)}(h``scaling_min_freq``h]hscaling_min_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj-ubho attributes are capped by the frequency corresponding to the maximum P-state that the driver is allowed to set.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM:hjhhubj)}(hX@If the ``no_turbo`` :ref:`global attribute ` is set, the driver is not allowed to use turbo P-states, so the maximum value of ``scaling_max_freq`` and ``scaling_min_freq`` is limited to the maximum non-turbo P-state frequency. Accordingly, setting ``no_turbo`` causes ``scaling_max_freq`` and ``scaling_min_freq`` to go down to that value if they were above it before. However, the old values of ``scaling_max_freq`` and ``scaling_min_freq`` will be restored after unsetting ``no_turbo``, unless these attributes have been written to after ``no_turbo`` was set.h](hIf the }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh }(hjhhhNhNubh)}(h':ref:`global attribute `h]j7)}(hjh]hglobal attribute}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU no_turbo_attruh1hhhhMAhjubhR is set, the driver is not allowed to use turbo P-states, so the maximum value of }(hjhhhNhNubjg)}(h``scaling_max_freq``h]hscaling_max_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh and }(hjhhhNhNubjg)}(h``scaling_min_freq``h]hscaling_min_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhM is limited to the maximum non-turbo P-state frequency. Accordingly, setting }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh causes }(hjhhhNhNubjg)}(h``scaling_max_freq``h]hscaling_max_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh and }(hjhhhNhNubjg)}(h``scaling_min_freq``h]hscaling_min_freq}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhS to go down to that value if they were above it before. However, the old values of }(hjhhhNhNubjg)}(h``scaling_max_freq``h]hscaling_max_freq}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh and }hjsbjg)}(h``scaling_min_freq``h]hscaling_min_freq}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh" will be restored after unsetting }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh5, unless these attributes have been written to after }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh was set.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMAhjhhubj)}(hIf ``no_turbo`` is not set, the maximum possible value of ``scaling_max_freq`` and ``scaling_min_freq`` corresponds to the maximum supported turbo P-state, which also is the value of ``cpuinfo_max_freq`` in either case.h](hIf }(hjhhhNhNubjg)}(h ``no_turbo``h]hno_turbo}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh+ is not set, the maximum possible value of }(hjhhhNhNubjg)}(h``scaling_max_freq``h]hscaling_max_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh and }(hjhhhNhNubjg)}(h``scaling_min_freq``h]hscaling_min_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhP corresponds to the maximum supported turbo P-state, which also is the value of }(hjhhhNhNubjg)}(h``cpuinfo_max_freq``h]hcpuinfo_max_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh in either case.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMKhjhhubj)}(h}Next, the following policy attributes have special meaning if ``intel_pstate`` works in the :ref:`active mode `:h](h>Next, the following policy attributes have special meaning if }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh works in the }(hjhhhNhNubh)}(h :ref:`active mode `h]j7)}(hjh]h active mode}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftyperef refexplicitrefwarnjU active_modeuh1hhhhMOhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMOhjhhubj)}(hhh](j)}(hc``scaling_available_governors`` List of P-state selection algorithms provided by ``intel_pstate``. h](j)}(h``scaling_available_governors``h]jg)}(hj0h]hscaling_available_governors}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj.ubah}(h]h ]h"]h$]h&]uh1jhhhMShj*ubj)}(hhh]j)}(hBList of P-state selection algorithms provided by ``intel_pstate``.h](h1List of P-state selection algorithms provided by }(hjHhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjHubh.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMShjEubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhhhMShj'ubj)}(hv``scaling_governor`` P-state selection algorithm provided by ``intel_pstate`` currently in use with the given policy. h](j)}(h``scaling_governor``h]jg)}(hjzh]hscaling_governor}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjxubah}(h]h ]h"]h$]h&]uh1jhhhMWhjtubj)}(hhh]j)}(h`P-state selection algorithm provided by ``intel_pstate`` currently in use with the given policy.h](h(P-state selection algorithm provided by }(hjhhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh( currently in use with the given policy.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMVhjubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jhhhMWhj'hhubj)}(h``scaling_cur_freq`` Frequency of the average P-state of the CPU represented by the given policy for the time interval between the last two invocations of the driver's utilization update callback by the CPU scheduler for that CPU. h](j)}(h``scaling_cur_freq``h]jg)}(hjh]hscaling_cur_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubah}(h]h ]h"]h$]h&]uh1jhhhM\hjubj)}(hhh]j)}(hFrequency of the average P-state of the CPU represented by the given policy for the time interval between the last two invocations of the driver's utilization update callback by the CPU scheduler for that CPU.h]hFrequency of the average P-state of the CPU represented by the given policy for the time interval between the last two invocations of the driver’s utilization update callback by the CPU scheduler for that CPU.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMZhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhM\hj'hhubeh}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hTOne more policy attribute is present if the HWP feature is enabled in the processor:h]hTOne more policy attribute is present if the HWP feature is enabled in the processor:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM^hjhhubj)}(hhh]j)}(hw``base_frequency`` Shows the base frequency of the CPU. Any frequency above this will be in the turbo frequency range. h](j)}(h``base_frequency``h]jg)}(hjh]hbase_frequency}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubah}(h]h ]h"]h$]h&]uh1jhhhMchj ubj)}(hhh]j)}(hcShows the base frequency of the CPU. Any frequency above this will be in the turbo frequency range.h]hcShows the base frequency of the CPU. Any frequency above this will be in the turbo frequency range.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMbhj(ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhMchj ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hsThe meaning of these attributes in the :ref:`passive mode ` is the same as for other scaling drivers.h](h'The meaning of these attributes in the }(hjKhhhNhNubh)}(h":ref:`passive mode `h]j7)}(hjUh]h passive mode}(hjWhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjSubah}(h]h ]h"]h$]h&]refdocjO refdomainjareftyperef refexplicitrefwarnjU passive_modeuh1hhhhMehjKubh* is the same as for other scaling drivers.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMehjhhubj)}(hX Additionally, the value of the ``scaling_driver`` attribute for ``intel_pstate`` depends on the operation mode of the driver. Namely, it is either "intel_pstate" (in the :ref:`active mode `) or "intel_cpufreq" (in the :ref:`passive mode `).h](hAdditionally, the value of the }(hj}hhhNhNubjg)}(h``scaling_driver``h]hscaling_driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj}ubh attribute for }(hj}hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj}ubh_ depends on the operation mode of the driver. Namely, it is either “intel_pstate” (in the }(hj}hhhNhNubh)}(h :ref:`active mode `h]j7)}(hjh]h active mode}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU active_modeuh1hhhhMhhj}ubh!) or “intel_cpufreq” (in the }(hj}hhhNhNubh)}(h":ref:`passive mode `h]j7)}(hjh]h passive mode}(hjhhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjubah}(h]h ]h"]h$]h&]refdocjO refdomainjreftyperef refexplicitrefwarnjU passive_modeuh1hhhhMhhj}ubh).}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhhjhhubj )}(h.. _pstate_limits_coordination:h]h}(h]h ]h"]h$]h&]jpstate-limits-coordinationuh1j hMhjhhhhubeh}(h](#interpretation-of-policy-attributesjeh ]h"](#interpretation of policy attributes policy_attributes_interpretationeh$]h&]uh1j[hjhhhhhM3j }jjsj }jjsubj\)}(hhh](ja)}(hCoordination of P-State Limitsh]hCoordination of P-State Limits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhMpubj)}(hX}``intel_pstate`` allows P-state limits to be set in two ways: with the help of the ``max_perf_pct`` and ``min_perf_pct`` :ref:`global attributes ` or via the ``scaling_max_freq`` and ``scaling_min_freq`` ``CPUFreq`` policy attributes. The coordination between those limits is based on the following rules, regardless of the current operation mode of the driver:h](jg)}(h``intel_pstate``h]h intel_pstate}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubhC allows P-state limits to be set in two ways: with the help of the }(hjhhhNhNubjg)}(h``max_perf_pct``h]h max_perf_pct}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh and }(hjhhhNhNubjg)}(h``min_perf_pct``h]h min_perf_pct}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh }(hjhhhNhNubh)}(h,:ref:`global attributes `h]j7)}(hjZh]hglobal attributes}(hj\hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjXubah}(h]h ]h"]h$]h&]refdocjO refdomainjfreftyperef refexplicitrefwarnjUglobal_attributesuh1hhhhMrhjubh or via the }(hjhhhNhNubjg)}(h``scaling_max_freq``h]hscaling_max_freq}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh and }hjsbjg)}(h``scaling_min_freq``h]hscaling_min_freq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh }(hjhhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjubh policy attributes. The coordination between those limits is based on the following rules, regardless of the current operation mode of the driver:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMrhj hhubjT)}(hX*1. All CPUs are affected by the global limits (that is, none of them can be requested to run faster than the global maximum and none of them can be requested to run slower than the global minimum). 2. Each individual CPU is affected by its own per-policy limits (that is, it cannot be requested to run faster than its own per-policy maximum and it cannot be requested to run slower than its own per-policy minimum). The effective performance depends on whether the platform supports per core P-states, hyper-threading is enabled and on current performance requests from other CPUs. When platform doesn't support per core P-states, the effective performance can be more than the policy limits set on a CPU, if other CPUs are requesting higher performance at that moment. Even with per core P-states support, when hyper-threading is enabled, if the sibling CPU is requesting higher performance, the other siblings will get higher performance than their policy limits. 3. The global and per-policy limits can be set independently. h]henumerated_list)}(hhh](j_)}(hAll CPUs are affected by the global limits (that is, none of them can be requested to run faster than the global maximum and none of them can be requested to run slower than the global minimum). h]j)}(hAll CPUs are affected by the global limits (that is, none of them can be requested to run faster than the global maximum and none of them can be requested to run slower than the global minimum).h]hAll CPUs are affected by the global limits (that is, none of them can be requested to run faster than the global maximum and none of them can be requested to run slower than the global minimum).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMxhjubah}(h]h ]h"]h$]h&]uh1j^hjubj_)}(hXEach individual CPU is affected by its own per-policy limits (that is, it cannot be requested to run faster than its own per-policy maximum and it cannot be requested to run slower than its own per-policy minimum). The effective performance depends on whether the platform supports per core P-states, hyper-threading is enabled and on current performance requests from other CPUs. When platform doesn't support per core P-states, the effective performance can be more than the policy limits set on a CPU, if other CPUs are requesting higher performance at that moment. Even with per core P-states support, when hyper-threading is enabled, if the sibling CPU is requesting higher performance, the other siblings will get higher performance than their policy limits. h]j)}(hXEach individual CPU is affected by its own per-policy limits (that is, it cannot be requested to run faster than its own per-policy maximum and it cannot be requested to run slower than its own per-policy minimum). The effective performance depends on whether the platform supports per core P-states, hyper-threading is enabled and on current performance requests from other CPUs. When platform doesn't support per core P-states, the effective performance can be more than the policy limits set on a CPU, if other CPUs are requesting higher performance at that moment. Even with per core P-states support, when hyper-threading is enabled, if the sibling CPU is requesting higher performance, the other siblings will get higher performance than their policy limits.h]hXEach individual CPU is affected by its own per-policy limits (that is, it cannot be requested to run faster than its own per-policy maximum and it cannot be requested to run slower than its own per-policy minimum). The effective performance depends on whether the platform supports per core P-states, hyper-threading is enabled and on current performance requests from other CPUs. When platform doesn’t support per core P-states, the effective performance can be more than the policy limits set on a CPU, if other CPUs are requesting higher performance at that moment. Even with per core P-states support, when hyper-threading is enabled, if the sibling CPU is requesting higher performance, the other siblings will get higher performance than their policy limits.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM|hjubah}(h]h ]h"]h$]h&]uh1j^hjubj_)}(h;The global and per-policy limits can be set independently. h]j)}(h:The global and per-policy limits can be set independently.h]h:The global and per-policy limits can be set independently.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjubah}(h]h ]h"]h$]h&]uh1j^hjubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jhjubah}(h]h ]h"]h$]h&]uh1jShhhMxhj hhubj)}(hXIn the :ref:`active mode with the HWP feature enabled `, the resulting effective values are written into hardware registers whenever the limits change in order to request its internal P-state selection logic to always set P-states within these limits. Otherwise, the limits are taken into account by scaling governors (in the :ref:`passive mode `) and by the driver every time before setting a new P-state for a CPU.h](hIn the }(hj hhhNhNubh)}(hA:ref:`active mode with the HWP feature enabled `h]j7)}(hj$ h]h(active mode with the HWP feature enabled}(hj& hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj" ubah}(h]h ]h"]h$]h&]refdocjO refdomainj0 reftyperef refexplicitrefwarnjUactive_mode_hwpuh1hhhhMhj ubhX, the resulting effective values are written into hardware registers whenever the limits change in order to request its internal P-state selection logic to always set P-states within these limits. Otherwise, the limits are taken into account by scaling governors (in the }(hj hhhNhNubh)}(h":ref:`passive mode `h]j7)}(hjH h]h passive mode}(hjJ hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjF ubah}(h]h ]h"]h$]h&]refdocjO refdomainjT reftyperef refexplicitrefwarnjU passive_modeuh1hhhhMhj ubhF) and by the driver every time before setting a new P-state for a CPU.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj)}(hAdditionally, if the ``intel_pstate=per_cpu_perf_limits`` command line argument is passed to the kernel, ``max_perf_pct`` and ``min_perf_pct`` are not exposed at all and the only way to set the limits is by using the policy attributes.h](hAdditionally, if the }(hjp hhhNhNubjg)}(h$``intel_pstate=per_cpu_perf_limits``h]h intel_pstate=per_cpu_perf_limits}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjp ubh0 command line argument is passed to the kernel, }(hjp hhhNhNubjg)}(h``max_perf_pct``h]h max_perf_pct}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjp ubh and }(hjp hhhNhNubjg)}(h``min_perf_pct``h]h min_perf_pct}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjp ubh] are not exposed at all and the only way to set the limits is by using the policy attributes.}(hjp hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj )}(h.. _energy_performance_hints:h]h}(h]h ]h"]h$]h&]jenergy-performance-hintsuh1j hMhj hhhhubeh}(h](coordination-of-p-state-limitsjeh ]h"](coordination of p-state limitspstate_limits_coordinationeh$]h&]uh1j[hjhhhhhMpj }j jsj }jjsubj\)}(hhh](ja)}(hEnergy vs Performance Hintsh]hEnergy vs Performance Hints}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhMubj)}(hXuIf the hardware-managed P-states (HWP) is enabled in the processor, additional attributes, intended to allow user space to help ``intel_pstate`` to adjust the processor's internal P-state selection logic by focusing it on performance or on energy-efficiency, or somewhere between the two extremes, are present in every ``CPUFreq`` policy directory in ``sysfs``. They are :h](hIf the hardware-managed P-states (HWP) is enabled in the processor, additional attributes, intended to allow user space to help }(hj hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh to adjust the processor’s internal P-state selection logic by focusing it on performance or on energy-efficiency, or somewhere between the two extremes, are present in every }(hj hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh policy directory in }(hj hhhNhNubjg)}(h ``sysfs``h]hsysfs}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj ubh . They are :}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj)}(hhh](j)}(h``energy_performance_preference`` Current value of the energy vs performance hint for the given policy (or the CPU represented by it). The hint can be changed by writing to this attribute. h](j)}(h!``energy_performance_preference``h]jg)}(hj(!h]henergy_performance_preference}(hj*!hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&!ubah}(h]h ]h"]h$]h&]uh1jhhhMhj"!ubj)}(hhh](j)}(hdCurrent value of the energy vs performance hint for the given policy (or the CPU represented by it).h]hdCurrent value of the energy vs performance hint for the given policy (or the CPU represented by it).}(hj@!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhj=!ubj)}(h5The hint can be changed by writing to this attribute.h]h5The hint can be changed by writing to this attribute.}(hjN!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhj=!ubeh}(h]h ]h"]h$]h&]uh1jhj"!ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj!ubj)}(hX4``energy_performance_available_preferences`` List of strings that can be written to the ``energy_performance_preference`` attribute. They represent different energy vs performance hints and should be self-explanatory, except that ``default`` represents whatever hint value was set by the platform firmware. h](j)}(h,``energy_performance_available_preferences``h]jg)}(hjn!h]h(energy_performance_available_preferences}(hjp!hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjl!ubah}(h]h ]h"]h$]h&]uh1jhhhMhjh!ubj)}(hhh](j)}(hWList of strings that can be written to the ``energy_performance_preference`` attribute.h](h+List of strings that can be written to the }(hj!hhhNhNubjg)}(h!``energy_performance_preference``h]henergy_performance_preference}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj!ubh attribute.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj!ubj)}(hThey represent different energy vs performance hints and should be self-explanatory, except that ``default`` represents whatever hint value was set by the platform firmware.h](haThey represent different energy vs performance hints and should be self-explanatory, except that }(hj!hhhNhNubjg)}(h ``default``h]hdefault}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj!ubhA represents whatever hint value was set by the platform firmware.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj!ubeh}(h]h ]h"]h$]h&]uh1jhjh!ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj!hhubeh}(h]h ]h"]h$]h&]uh1jhj hhhhhNubj)}(hXStrings written to the ``energy_performance_preference`` attribute are internally translated to integer values written to the processor's Energy-Performance Preference (EPP) knob (if supported) or its Energy-Performance Bias (EPB) knob. It is also possible to write a positive integer value between 0 to 255, if the EPP feature is present. If the EPP feature is not present, writing integer value to this attribute is not supported. In this case, user can use the "/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.h](hStrings written to the }(hj!hhhNhNubjg)}(h!``energy_performance_preference``h]henergy_performance_preference}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj!ubhX attribute are internally translated to integer values written to the processor’s Energy-Performance Preference (EPP) knob (if supported) or its Energy-Performance Bias (EPB) knob. It is also possible to write a positive integer value between 0 to 255, if the EPP feature is present. If the EPP feature is not present, writing integer value to this attribute is not supported. In this case, user can use the “/sys/devices/system/cpu/cpu*/power/energy_perf_bias” interface.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj)}(hXr[Note that tasks may by migrated from one CPU to another by the scheduler's load-balancing algorithm and if different energy vs performance hints are set for those CPUs, that may lead to undesirable outcomes. To avoid such issues it is better to set the same energy vs performance hint for all CPUs or to pin every task potentially sensitive to them to a specific CPU.]h]hXt[Note that tasks may by migrated from one CPU to another by the scheduler’s load-balancing algorithm and if different energy vs performance hints are set for those CPUs, that may lead to undesirable outcomes. To avoid such issues it is better to set the same energy vs performance hint for all CPUs or to pin every task potentially sensitive to them to a specific CPU.]}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhj hhubj )}(h.. _acpi-cpufreq:h]h}(h]h ]h"]h$]h&]j acpi-cpufrequh1j hMhj hhhhubeh}(h](energy-vs-performance-hintsj eh ]h"](energy vs performance hintsenergy_performance_hintseh$]h&]uh1j[hjhhhhhMj }j"j sj }j j subeh}(h]user-space-interface-in-sysfsah ]h"]user space interface in sysfsah$]h&]uh1j[hj]hhhhhMubj\)}(hhh](ja)}(h$``intel_pstate`` vs ``acpi-cpufreq``h](jg)}(h``intel_pstate``h]h intel_pstate}(hj+"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj'"ubh vs }(hj'"hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj="hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj'"ubeh}(h]h ]h"]h$]h&]uh1j`hj$"hhhhhMubj)}(hXFOn the majority of systems supported by ``intel_pstate``, the ACPI tables provided by the platform firmware contain ``_PSS`` objects returning information that can be used for CPU performance scaling (refer to the ACPI specification [3]_ for details on the ``_PSS`` objects and the format of the information returned by them).h](h(On the majority of systems supported by }(hjQ"hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjY"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjQ"ubh<, the ACPI tables provided by the platform firmware contain }(hjQ"hhhNhNubjg)}(h``_PSS``h]h_PSS}(hjk"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjQ"ubhm objects returning information that can be used for CPU performance scaling (refer to the ACPI specification }(hjQ"hhhNhNubj)}(h[3]_h]h3}(hj}"hhhNhNubah}(h]id7ah ]h"]h$]h&]jid10jjOuh1jhjQ"jKubh for details on the }(hjQ"hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjQ"ubh= objects and the format of the information returned by them).}(hjQ"hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubj)}(hX+The information returned by the ACPI ``_PSS`` objects is used by the ``acpi-cpufreq`` scaling driver. On systems supported by ``intel_pstate`` the ``acpi-cpufreq`` driver uses the same hardware CPU performance scaling interface, but the set of P-states it can use is limited by the ``_PSS`` output.h](h%The information returned by the ACPI }(hj"hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj"ubh objects is used by the }(hj"hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj"ubh* scaling driver. On systems supported by }(hj"hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj"ubh the }(hj"hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj"ubhw driver uses the same hardware CPU performance scaling interface, but the set of P-states it can use is limited by the }(hj"hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj"ubh output.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubj)}(hXOn those systems each ``_PSS`` object returns a list of P-states supported by the corresponding CPU which basically is a subset of the P-states range that can be used by ``intel_pstate`` on the same system, with one exception: the whole :ref:`turbo range ` is represented by one item in it (the topmost one). By convention, the frequency returned by ``_PSS`` for that item is greater by 1 MHz than the frequency of the highest non-turbo P-state listed by it, but the corresponding P-state representation (following the hardware specification) returned for it matches the maximum supported turbo P-state (or is the special value 255 meaning essentially "go as high as you can get").h](hOn those systems each }(hj#hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh object returns a list of P-states supported by the corresponding CPU which basically is a subset of the P-states range that can be used by }(hj#hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj+#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubh3 on the same system, with one exception: the whole }(hj#hhhNhNubh)}(h:ref:`turbo range `h]j7)}(hj?#h]h turbo range}(hjA#hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj=#ubah}(h]h ]h"]h$]h&]refdocjO refdomainjK#reftyperef refexplicitrefwarnjUturbouh1hhhhMhj#ubh^ is represented by one item in it (the topmost one). By convention, the frequency returned by }(hj#hhhNhNubjg)}(h``_PSS``h]h_PSS}(hja#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj#ubhXG for that item is greater by 1 MHz than the frequency of the highest non-turbo P-state listed by it, but the corresponding P-state representation (following the hardware specification) returned for it matches the maximum supported turbo P-state (or is the special value 255 meaning essentially “go as high as you can get”).}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubj)}(hX|The list of P-states returned by ``_PSS`` is reflected by the table of available frequencies supplied by ``acpi-cpufreq`` to the ``CPUFreq`` core and scaling governors and the minimum and maximum supported frequencies reported by it come from that list as well. In particular, given the special representation of the turbo range described above, this means that the maximum supported frequency reported by ``acpi-cpufreq`` is higher by 1 MHz than the frequency of the highest supported non-turbo P-state listed by ``_PSS`` which, of course, affects decisions made by the scaling governors, except for ``powersave`` and ``performance``.h](h!The list of P-states returned by }(hjy#hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubh@ is reflected by the table of available frequencies supplied by }(hjy#hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubh to the }(hjy#hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubhX  core and scaling governors and the minimum and maximum supported frequencies reported by it come from that list as well. In particular, given the special representation of the turbo range described above, this means that the maximum supported frequency reported by }(hjy#hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubh\ is higher by 1 MHz than the frequency of the highest supported non-turbo P-state listed by }(hjy#hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubhO which, of course, affects decisions made by the scaling governors, except for }(hjy#hhhNhNubjg)}(h ``powersave``h]h powersave}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubh and }(hjy#hhhNhNubjg)}(h``performance``h]h performance}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjy#ubh.}(hjy#hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubj)}(hX}For example, if a given governor attempts to select a frequency proportional to estimated CPU load and maps the load of 100% to the maximum supported frequency (possibly multiplied by a constant), then it will tend to choose P-states below the turbo threshold if ``acpi-cpufreq`` is used as the scaling driver, because in that case the turbo range corresponds to a small fraction of the frequency band it can use (1 MHz vs 1 GHz or more). In consequence, it will only go to the turbo range for the highest loads and the other loads above 50% that might benefit from running at turbo frequencies will be given non-turbo P-states instead.h](hXFor example, if a given governor attempts to select a frequency proportional to estimated CPU load and maps the load of 100% to the maximum supported frequency (possibly multiplied by a constant), then it will tend to choose P-states below the turbo threshold if }(hj$hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj $hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj$ubhXf is used as the scaling driver, because in that case the turbo range corresponds to a small fraction of the frequency band it can use (1 MHz vs 1 GHz or more). In consequence, it will only go to the turbo range for the highest loads and the other loads above 50% that might benefit from running at turbo frequencies will be given non-turbo P-states instead.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubj)}(hXOne more issue related to that may appear on systems supporting the :ref:`Configurable TDP feature ` allowing the platform firmware to set the turbo threshold. Namely, if that is not coordinated with the lists of P-states returned by ``_PSS`` properly, there may be more than one item corresponding to a turbo P-state in those lists and there may be a problem with avoiding the turbo range (if desirable or necessary). Usually, to avoid using turbo P-states overall, ``acpi-cpufreq`` simply avoids using the topmost state listed by ``_PSS``, but that is not sufficient when there are other turbo P-states in the list returned by it.h](hDOne more issue related to that may appear on systems supporting the }(hj%$hhhNhNubh)}(h':ref:`Configurable TDP feature `h]j7)}(hj/$h]hConfigurable TDP feature}(hj1$hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj-$ubah}(h]h ]h"]h$]h&]refdocjO refdomainj;$reftyperef refexplicitrefwarnjUturbouh1hhhhMhj%$ubh allowing the platform firmware to set the turbo threshold. Namely, if that is not coordinated with the lists of P-states returned by }(hj%$hhhNhNubjg)}(h``_PSS``h]h_PSS}(hjQ$hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%$ubh properly, there may be more than one item corresponding to a turbo P-state in those lists and there may be a problem with avoiding the turbo range (if desirable or necessary). Usually, to avoid using turbo P-states overall, }(hj%$hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hjc$hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%$ubh1 simply avoids using the topmost state listed by }(hj%$hhhNhNubjg)}(h``_PSS``h]h_PSS}(hju$hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%$ubh\, but that is not sufficient when there are other turbo P-states in the list returned by it.}(hj%$hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubj)}(hApart from the above, ``acpi-cpufreq`` works like ``intel_pstate`` in the :ref:`passive mode `, except that the number of P-states it can set is limited to the ones listed by the ACPI ``_PSS`` objects.h](hApart from the above, }(hj$hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj$ubh works like }(hj$hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj$ubh in the }(hj$hhhNhNubh)}(h":ref:`passive mode `h]j7)}(hj$h]h passive mode}(hj$hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj$ubah}(h]h ]h"]h$]h&]refdocjO refdomainj$reftyperef refexplicitrefwarnjU passive_modeuh1hhhhMhj$ubhZ, except that the number of P-states it can set is limited to the ones listed by the ACPI }(hj$hhhNhNubjg)}(h``_PSS``h]h_PSS}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj$ubh objects.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$"hhubeh}(h](intel-pstate-vs-acpi-cpufreqj"eh ]h"](intel_pstate vs acpi-cpufreq acpi-cpufreqeh$]h&]uh1j[hj]hhhhhMj }j$j"sj }j"j"subj\)}(hhh](ja)}(h0Kernel Command Line Options for ``intel_pstate``h](h Kernel Command Line Options for }(hj%hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj %hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%ubeh}(h]h ]h"]h$]h&]uh1j`hj%hhhhhMubj)}(hSeveral kernel command line options can be used to pass early-configuration-time parameters to ``intel_pstate`` in order to enforce specific behavior of it. All of them have to be prepended with the ``intel_pstate=`` prefix.h](h_Several kernel command line options can be used to pass early-configuration-time parameters to }(hj%hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj'%hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%ubhY in order to enforce specific behavior of it. All of them have to be prepended with the }(hj%hhhNhNubjg)}(h``intel_pstate=``h]h intel_pstate=}(hj9%hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%ubh prefix.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj%hhubj)}(hhh](j)}(hm``disable`` Do not register ``intel_pstate`` as the scaling driver even if the processor is supported by it. h](j)}(h ``disable``h]jg)}(hjZ%h]hdisable}(hj\%hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjX%ubah}(h]h ]h"]h$]h&]uh1jhhhMhjT%ubj)}(hhh]j)}(h`Do not register ``intel_pstate`` as the scaling driver even if the processor is supported by it.h](hDo not register }(hjr%hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjz%hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjr%ubh@ as the scaling driver even if the processor is supported by it.}(hjr%hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhjo%ubah}(h]h ]h"]h$]h&]uh1jhjT%ubeh}(h]h ]h"]h$]h&]uh1jhhhMhjQ%ubj)}(h\``active`` Register ``intel_pstate`` in the :ref:`active mode ` to start with. h](j)}(h ``active``h]jg)}(hj%h]hactive}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%ubah}(h]h ]h"]h$]h&]uh1jhhhMhj%ubj)}(hhh]j)}(hPRegister ``intel_pstate`` in the :ref:`active mode ` to start with.h](h Register }(hj%hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj%ubh in the }(hj%hhhNhNubh)}(h :ref:`active mode `h]j7)}(hj%h]h active mode}(hj%hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj%ubah}(h]h ]h"]h$]h&]refdocjO refdomainj%reftyperef refexplicitrefwarnjU active_modeuh1hhhhMhj%ubh to start with.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj%ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jhhhMhjQ%hhubj)}(h_``passive`` Register ``intel_pstate`` in the :ref:`passive mode ` to start with. h](j)}(h ``passive``h]jg)}(hj&h]hpassive}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&ubah}(h]h ]h"]h$]h&]uh1jhhhM hj &ubj)}(hhh]j)}(hRRegister ``intel_pstate`` in the :ref:`passive mode ` to start with.h](h Register }(hj*&hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj2&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj*&ubh in the }(hj*&hhhNhNubh)}(h":ref:`passive mode `h]j7)}(hjF&h]h passive mode}(hjH&hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjD&ubah}(h]h ]h"]h$]h&]refdocjO refdomainjR&reftyperef refexplicitrefwarnjU passive_modeuh1hhhhM hj*&ubh to start with.}(hj*&hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM hj'&ubah}(h]h ]h"]h$]h&]uh1jhj &ubeh}(h]h ]h"]h$]h&]uh1jhhhM hjQ%hhubj)}(hX``force`` Register ``intel_pstate`` as the scaling driver instead of ``acpi-cpufreq`` even if the latter is preferred on the given system. This may prevent some platform features (such as thermal controls and power capping) that rely on the availability of ACPI P-states information from functioning as expected, so it should be used with caution. This option does not work with processors that are not supported by ``intel_pstate`` and on platforms where the ``pcc-cpufreq`` scaling driver is used instead of ``acpi-cpufreq``. h](j)}(h ``force``h]jg)}(hj&h]hforce}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj~&ubah}(h]h ]h"]h$]h&]uh1jhhhMhjz&ubj)}(hhh](j)}(hRegister ``intel_pstate`` as the scaling driver instead of ``acpi-cpufreq`` even if the latter is preferred on the given system.h](h Register }(hj&hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&ubh" as the scaling driver instead of }(hj&hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&ubh5 even if the latter is preferred on the given system.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj&ubj)}(hThis may prevent some platform features (such as thermal controls and power capping) that rely on the availability of ACPI P-states information from functioning as expected, so it should be used with caution.h]hThis may prevent some platform features (such as thermal controls and power capping) that rely on the availability of ACPI P-states information from functioning as expected, so it should be used with caution.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhj&ubj)}(hThis option does not work with processors that are not supported by ``intel_pstate`` and on platforms where the ``pcc-cpufreq`` scaling driver is used instead of ``acpi-cpufreq``.h](hDThis option does not work with processors that are not supported by }(hj&hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&ubh and on platforms where the }(hj&hhhNhNubjg)}(h``pcc-cpufreq``h]h pcc-cpufreq}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&ubh# scaling driver is used instead of }(hj&hhhNhNubjg)}(h``acpi-cpufreq``h]h acpi-cpufreq}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj&ubh.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMhj&ubeh}(h]h ]h"]h$]h&]uh1jhjz&ubeh}(h]h ]h"]h$]h&]uh1jhhhMhjQ%hhubj)}(ho``no_hwp`` Do not enable the hardware-managed P-states (HWP) feature even if it is supported by the processor. h](j)}(h ``no_hwp``h]jg)}(hj.'h]hno_hwp}(hj0'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj,'ubah}(h]h ]h"]h$]h&]uh1jhhhMhj('ubj)}(hhh]j)}(hcDo not enable the hardware-managed P-states (HWP) feature even if it is supported by the processor.h]hcDo not enable the hardware-managed P-states (HWP) feature even if it is supported by the processor.}(hjF'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhMhjC'ubah}(h]h ]h"]h$]h&]uh1jhj('ubeh}(h]h ]h"]h$]h&]uh1jhhhMhjQ%hhubj)}(h``hwp_only`` Register ``intel_pstate`` as the scaling driver only if the hardware-managed P-states (HWP) feature is supported by the processor. h](j)}(h ``hwp_only``h]jg)}(hjf'h]hhwp_only}(hjh'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjd'ubah}(h]h ]h"]h$]h&]uh1jhhhM!hj`'ubj)}(hhh]j)}(hRegister ``intel_pstate`` as the scaling driver only if the hardware-managed P-states (HWP) feature is supported by the processor.h](h Register }(hj~'hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj~'ubhi as the scaling driver only if the hardware-managed P-states (HWP) feature is supported by the processor.}(hj~'hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM hj{'ubah}(h]h ]h"]h$]h&]uh1jhj`'ubeh}(h]h ]h"]h$]h&]uh1jhhhM!hjQ%hhubj)}(hX0``support_acpi_ppc`` Take ACPI ``_PPC`` performance limits into account. If the preferred power management profile in the FADT (Fixed ACPI Description Table) is set to "Enterprise Server" or "Performance Server", the ACPI ``_PPC`` limits are taken into account by default and this option has no effect. h](j)}(h``support_acpi_ppc``h]jg)}(hj'h]hsupport_acpi_ppc}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj'ubah}(h]h ]h"]h$]h&]uh1jhhhM)hj'ubj)}(hhh](j)}(h3Take ACPI ``_PPC`` performance limits into account.h](h Take ACPI }(hj'hhhNhNubjg)}(h``_PPC``h]h_PPC}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj'ubh! performance limits into account.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM$hj'ubj)}(hIf the preferred power management profile in the FADT (Fixed ACPI Description Table) is set to "Enterprise Server" or "Performance Server", the ACPI ``_PPC`` limits are taken into account by default and this option has no effect.h](hIf the preferred power management profile in the FADT (Fixed ACPI Description Table) is set to “Enterprise Server” or “Performance Server”, the ACPI }(hj'hhhNhNubjg)}(h``_PPC``h]h_PPC}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj'ubhH limits are taken into account by default and this option has no effect.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM&hj'ubeh}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhhhM)hjQ%hhubj)}(hp``per_cpu_perf_limits`` Use per-logical-CPU P-State limits (see :ref:`pstate_limits_coordination` for details). h](j)}(h``per_cpu_perf_limits``h]jg)}(hj(h]hper_cpu_perf_limits}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubah}(h]h ]h"]h$]h&]uh1jhhhM-hj(ubj)}(hhh]j)}(hWUse per-logical-CPU P-State limits (see :ref:`pstate_limits_coordination` for details).h](h(Use per-logical-CPU P-State limits (see }(hj2(hhhNhNubh)}(h!:ref:`pstate_limits_coordination`h]j7)}(hj<(h]hpstate_limits_coordination}(hj>(hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj:(ubah}(h]h ]h"]h$]h&]refdocjO refdomainjH(reftyperef refexplicitrefwarnjUpstate_limits_coordinationuh1hhhhM,hj2(ubh for details).}(hj2(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM,hj/(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhhhM-hjQ%hhubj)}(h{``no_cas`` Do not enable :ref:`capacity-aware scheduling ` which is enabled by default on hybrid systems without SMT. h](j)}(h ``no_cas``h]jg)}(hjv(h]hno_cas}(hjx(hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjt(ubah}(h]h ]h"]h$]h&]uh1jhhhM1hjp(ubj)}(hhh]j)}(hoDo not enable :ref:`capacity-aware scheduling ` which is enabled by default on hybrid systems without SMT.h](hDo not enable }(hj(hhhNhNubh)}(h&:ref:`capacity-aware scheduling `h]j7)}(hj(h]hcapacity-aware scheduling}(hj(hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj(ubah}(h]h ]h"]h$]h&]refdocjO refdomainj(reftyperef refexplicitrefwarnjUcasuh1hhhhM0hj(ubh; which is enabled by default on hybrid systems without SMT.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM0hj(ubah}(h]h ]h"]h$]h&]uh1jhjp(ubeh}(h]h ]h"]h$]h&]uh1jhhhM1hjQ%hhubeh}(h]h ]h"]h$]h&]uh1jhj%hhhhhNubeh}(h],kernel-command-line-options-for-intel-pstateah ]h"],kernel command line options for intel_pstateah$]h&]uh1j[hj]hhhhhMubj\)}(hhh](ja)}(hDiagnostics and Tuningh]hDiagnostics and Tuning}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj(hhhhhM4ubj\)}(hhh](ja)}(h Trace Eventsh]h Trace Events}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj(hhhhhM7ubj)}(hXdThere are two static trace events that can be used for ``intel_pstate`` diagnostics. One of them is the ``cpu_frequency`` trace event generally used by ``CPUFreq``, and the other one is the ``pstate_sample`` trace event specific to ``intel_pstate``. Both of them are triggered by ``intel_pstate`` only if it works in the :ref:`active mode `.h](h7There are two static trace events that can be used for }(hj(hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubh" diagnostics. One of them is the }(hj(hhhNhNubjg)}(h``cpu_frequency``h]h cpu_frequency}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubh trace event generally used by }(hj(hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj()hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubh, and the other one is the }(hj(hhhNhNubjg)}(h``pstate_sample``h]h pstate_sample}(hj:)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubh trace event specific to }(hj(hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjL)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubh!. Both of them are triggered by }(hj(hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj^)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj(ubh only if it works in the }(hj(hhhNhNubh)}(h :ref:`active mode `h]j7)}(hjr)h]h active mode}(hjt)hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hjp)ubah}(h]h ]h"]h$]h&]refdocjO refdomainj~)reftyperef refexplicitrefwarnjU active_modeuh1hhhhM9hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhM9hj(hhubj)}(hThe following sequence of shell commands can be used to enable them and see their output (if the kernel is generally configured to support event tracing)::h]hThe following sequence of shell commands can be used to enable them and see their output (if the kernel is generally configured to support event tracing):}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhM?hj(hhubh literal_block)}(hXb# cd /sys/kernel/tracing/ # echo 1 > events/power/pstate_sample/enable # echo 1 > events/power/cpu_frequency/enable # cat trace gnome-terminal--4510 [001] ..s. 1177.680733: pstate_sample: core_busy=107 scaled=94 from=26 to=26 mperf=1143818 aperf=1230607 tsc=29838618 freq=2474476 cat-5235 [002] ..s. 1177.681723: cpu_frequency: state=2900000 cpu_id=2h]hXb# cd /sys/kernel/tracing/ # echo 1 > events/power/pstate_sample/enable # echo 1 > events/power/cpu_frequency/enable # cat trace gnome-terminal--4510 [001] ..s. 1177.680733: pstate_sample: core_busy=107 scaled=94 from=26 to=26 mperf=1143818 aperf=1230607 tsc=29838618 freq=2474476 cat-5235 [002] ..s. 1177.681723: cpu_frequency: state=2900000 cpu_id=2}hj)sbah}(h]h ]h"]h$]h&]hhuh1j)hhhMBhj(hhubj)}(hXIf ``intel_pstate`` works in the :ref:`passive mode `, the ``cpu_frequency`` trace event will be triggered either by the ``schedutil`` scaling governor (for the policies it is attached to), or by the ``CPUFreq`` core (for the policies with other scaling governors).h](hIf }(hj)hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj)ubh works in the }(hj)hhhNhNubh)}(h":ref:`passive mode `h]j7)}(hj)h]h passive mode}(hj)hhhNhNubah}(h]h ](jBstdstd-refeh"]h$]h&]uh1j6hj)ubah}(h]h ]h"]h$]h&]refdocjO refdomainj)reftyperef refexplicitrefwarnjU passive_modeuh1hhhhMIhj)ubh, the }(hj)hhhNhNubjg)}(h``cpu_frequency``h]h cpu_frequency}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj)ubh- trace event will be triggered either by the }(hj)hhhNhNubjg)}(h ``schedutil``h]h schedutil}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj)ubhB scaling governor (for the policies it is attached to), or by the }(hj)hhhNhNubjg)}(h ``CPUFreq``h]hCPUFreq}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj)ubh6 core (for the policies with other scaling governors).}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMIhj(hhubeh}(h] trace-eventsah ]h"] trace eventsah$]h&]uh1j[hj(hhhhhM7ubj\)}(hhh](ja)}(h ``ftrace``h]jg)}(hj?*h]hftrace}(hjA*hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhj=*ubah}(h]h ]h"]h$]h&]uh1j`hj:*hhhhhMOubj)}(hThe ``ftrace`` interface can be used for low-level diagnostics of ``intel_pstate``. For example, to check how often the function to set a P-state is called, the ``ftrace`` filter can be set to :c:func:`intel_pstate_set_pstate`::h](hThe }(hjT*hhhNhNubjg)}(h ``ftrace``h]hftrace}(hj\*hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjT*ubh4 interface can be used for low-level diagnostics of }(hjT*hhhNhNubjg)}(h``intel_pstate``h]h intel_pstate}(hjn*hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjT*ubhP. For example, to check how often the function to set a P-state is called, the }(hjT*hhhNhNubjg)}(h ``ftrace``h]hftrace}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjT*ubh filter can be set to }(hjT*hhhNhNubh)}(h!:c:func:`intel_pstate_set_pstate`h]jg)}(hj*h]hintel_pstate_set_pstate()}(hj*hhhNhNubah}(h]h ](jBj c-funceh"]h$]h&]uh1jfhj*ubah}(h]h ]h"]h$]h&]refdocjO refdomainj reftypefunc refexplicitrefwarnjUintel_pstate_set_pstateuh1hhhhMQhjT*ubh:}(hjT*hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhMQhj:*hhubj))}(hX'# cd /sys/kernel/tracing/ # cat available_filter_functions | grep -i pstate intel_pstate_set_pstate intel_pstate_cpu_init ... # echo intel_pstate_set_pstate > set_ftrace_filter # echo function > current_tracer # cat trace | head -15 # tracer: function # # entries-in-buffer/entries-written: 80/80 #P:4 # # _-----=> irqs-off # / _----=> need-resched # | / _---=> hardirq/softirq # || / _--=> preempt-depth # ||| / delay # TASK-PID CPU# |||| TIMESTAMP FUNCTION # | | | |||| | | Xorg-3129 [000] ..s. 2537.644844: intel_pstate_set_pstate <-intel_pstate_timer_func gnome-terminal--4510 [002] ..s. 2537.649844: intel_pstate_set_pstate <-intel_pstate_timer_func gnome-shell-3409 [001] ..s. 2537.650850: intel_pstate_set_pstate <-intel_pstate_timer_func -0 [000] ..s. 2537.654843: intel_pstate_set_pstate <-intel_pstate_timer_funch]hX'# cd /sys/kernel/tracing/ # cat available_filter_functions | grep -i pstate intel_pstate_set_pstate intel_pstate_cpu_init ... # echo intel_pstate_set_pstate > set_ftrace_filter # echo function > current_tracer # cat trace | head -15 # tracer: function # # entries-in-buffer/entries-written: 80/80 #P:4 # # _-----=> irqs-off # / _----=> need-resched # | / _---=> hardirq/softirq # || / _--=> preempt-depth # ||| / delay # TASK-PID CPU# |||| TIMESTAMP FUNCTION # | | | |||| | | Xorg-3129 [000] ..s. 2537.644844: intel_pstate_set_pstate <-intel_pstate_timer_func gnome-terminal--4510 [002] ..s. 2537.649844: intel_pstate_set_pstate <-intel_pstate_timer_func gnome-shell-3409 [001] ..s. 2537.650850: intel_pstate_set_pstate <-intel_pstate_timer_func -0 [000] ..s. 2537.654843: intel_pstate_set_pstate <-intel_pstate_timer_func}hj*sbah}(h]h ]h"]h$]h&]hhuh1j)hhhMVhj:*hhubeh}(h]ftraceah ]h"]ftraceah$]h&]uh1j[hj(hhhhhMOubeh}(h]diagnostics-and-tuningah ]h"]diagnostics and tuningah$]h&]uh1j[hj]hhhhhM4ubj\)}(hhh](ja)}(h Referencesh]h References}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj*hhhhhMpubhfootnote)}(hKristen Accardi, *Balancing Power and Performance in the Linux Kernel*, https://events.static.linuxfound.org/sites/events/files/slides/LinuxConEurope_2015.pdf h](hlabel)}(h1h]h1}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j*hj*ubj)}(hKristen Accardi, *Balancing Power and Performance in the Linux Kernel*, https://events.static.linuxfound.org/sites/events/files/slides/LinuxConEurope_2015.pdfh](hKristen Accardi, }(hj+hhhNhNubhemphasis)}(h5*Balancing Power and Performance in the Linux Kernel*h]h3Balancing Power and Performance in the Linux Kernel}(hj +hhhNhNubah}(h]h ]h"]h$]h&]uh1j+hj+ubh, }(hj+hhhNhNubj)}(hVhttps://events.static.linuxfound.org/sites/events/files/slides/LinuxConEurope_2015.pdfh]hVhttps://events.static.linuxfound.org/sites/events/files/slides/LinuxConEurope_2015.pdf}(hj+hhhNhNubah}(h]h ]h"]h$]h&]refurij+uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhhhMrhj*ubeh}(h]jah ]h"]1ah$]h&]jajjOuh1j*hhhMrhj*hhjKubj*)}(h*Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide*, https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html h](j*)}(h2h]h2}(hj<+hhhNhNubah}(h]h ]h"]h$]h&]uh1j*hj8+ubj)}(h*Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide*, https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.htmlh](j +)}(he*Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide*h]hcIntel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide}(hjN+hhhNhNubah}(h]h ]h"]h$]h&]uh1j+hjJ+ubh, }(hjJ+hhhNhNubj)}(hhttps://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.htmlh]hhttps://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html}(hj`+hhhNhNubah}(h]h ]h"]h$]h&]refurijb+uh1jhjJ+ubeh}(h]h ]h"]h$]h&]uh1jhhhMuhj8+ubeh}(h]jah ]h"]2ah$]h&]jajjOuh1j*hhhMuhj*hhjKubj*)}(h*Advanced Configuration and Power Interface Specification*, https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdfh](j*)}(h3h]h3}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j*hj|+ubj)}(h*Advanced Configuration and Power Interface Specification*, https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdfh](j +)}(h:*Advanced Configuration and Power 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