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YEN SIGN h]h¥}hj8sbah}(h]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(h&Intel Performance and Energy Bias Hinth]h&Intel Performance and Energy Bias Hint}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjIhhhhhKubh field_list)}(hhh](hfield)}(hhh](h field_name)}(h Copyrighth]h Copyright}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjchhhKubh field_body)}(h|copy| 2019 Intel Corporation h]h paragraph)}(h|copy| 2019 Intel Corporationh](h©}(hj~hhhNhNubh 2019 Intel Corporation}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1j|hhhKhjxubah}(h]h ]h"]h$]h&]uh1jvhjcubeh}(h]h ]h"]h$]h&]uh1jahhhKhj^hhubjb)}(hhh](jg)}(hAuthorh]hAuthor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjhhhKubjw)}(h0Rafael J. Wysocki h]j})}(h.Rafael J. Wysocki h](hRafael J. Wysocki <}(hjhhhNhNubh reference)}(hrafael.j.wysocki@intel.comh]hrafael.j.wysocki@intel.com}(hjhhhNhNubah}(h]h ]h"]h$]h&]refuri!mailto:rafael.j.wysocki@intel.comuh1jhjubh>}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j|hhhK hjubah}(h]h ]h"]h$]h&]uh1jvhjubeh}(h]h ]h"]h$]h&]uh1jahhhK hj^hhubeh}(h]h ]h"]h$]h&]uh1j\hjIhhhhhKubj})}(hXWThe Performance and Energy Bias Hint (EPB) allows software to specify its preference with respect to the power-performance tradeoffs present in the processor. Generally, the EPB is expected to be set by user space (directly via sysfs or with the help of the x86_energy_perf_policy tool), but there are two reasons for the kernel to update it.h]hXWThe Performance and Energy Bias Hint (EPB) allows software to specify its preference with respect to the power-performance tradeoffs present in the processor. Generally, the EPB is expected to be set by user space (directly via sysfs or with the help of the x86_energy_perf_policy tool), but there are two reasons for the kernel to update it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hh/var/lib/git/docbuild/linux/Documentation/admin-guide/pm/intel_epb:99: ./arch/x86/kernel/cpu/intel_epb.chKhjIhhubj})}(hXFirst, there are systems where the platform firmware resets the EPB during system-wide transitions from sleep states back into the working state effectively causing the previous EPB updates by user space to be lost. Thus the kernel needs to save the current EPB values for all CPUs during system-wide transitions to sleep states and restore them on the way back to the working state. That can be achieved by saving EPB for secondary CPUs when they are taken offline during transitions into system sleep states and for the boot CPU in a syscore suspend operation, so that it can be restored for the boot CPU in a syscore resume operation and for the other CPUs when they are brought back online. However, CPUs that are already offline when a system-wide PM transition is started are not taken offline again, but their EPB values may still be reset by the platform firmware during the transition, so in fact it is necessary to save the EPB of any CPU taken offline and to restore it when the given CPU goes back online at all times.h]hXFirst, there are systems where the platform firmware resets the EPB during system-wide transitions from sleep states back into the working state effectively causing the previous EPB updates by user space to be lost. Thus the kernel needs to save the current EPB values for all CPUs during system-wide transitions to sleep states and restore them on the way back to the working state. That can be achieved by saving EPB for secondary CPUs when they are taken offline during transitions into system sleep states and for the boot CPU in a syscore suspend operation, so that it can be restored for the boot CPU in a syscore resume operation and for the other CPUs when they are brought back online. However, CPUs that are already offline when a system-wide PM transition is started are not taken offline again, but their EPB values may still be reset by the platform firmware during the transition, so in fact it is necessary to save the EPB of any CPU taken offline and to restore it when the given CPU goes back online at all times.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hh/var/lib/git/docbuild/linux/Documentation/admin-guide/pm/intel_epb:99: ./arch/x86/kernel/cpu/intel_epb.chKhjIhhubj})}(hXSecond, on many systems the initial EPB value coming from the platform firmware is 0 ('performance') and at least on some of them that is because the platform firmware does not initialize EPB at all with the assumption that the OS will do that anyway. That sometimes is problematic, as it may cause the system battery to drain too fast, for example, so it is better to adjust it on CPU bring-up and if the initial EPB value for a given CPU is 0, the kernel changes it to 6 ('normal').h]hXSecond, on many systems the initial EPB value coming from the platform firmware is 0 (‘performance’) and at least on some of them that is because the platform firmware does not initialize EPB at all with the assumption that the OS will do that anyway. That sometimes is problematic, as it may cause the system battery to drain too fast, for example, so it is better to adjust it on CPU bring-up and if the initial EPB value for a given CPU is 0, the kernel changes it to 6 (‘normal’).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hh/var/lib/git/docbuild/linux/Documentation/admin-guide/pm/intel_epb:99: ./arch/x86/kernel/cpu/intel_epb.chK-hjIhhubjH)}(hhh](jM)}(h8Intel Performance and Energy Bias Attribute in ``sysfs``h](h/Intel Performance and Energy Bias Attribute in }(hjhhhNhNubhliteral)}(h ``sysfs``h]hsysfs}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jLhjhhhhhKubj})}(hXThe Intel Performance and Energy Bias Hint (EPB) value for a given (logical) CPU can be checked or updated through a ``sysfs`` attribute (file) under :file:`/sys/devices/system/cpu/cpu/power/`, where the CPU number ```` is allocated at the system initialization time:h](huThe Intel Performance and Energy Bias Hint (EPB) value for a given (logical) CPU can be checked or updated through a }(hj5hhhNhNubj )}(h ``sysfs``h]hsysfs}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5ubh attribute (file) under }(hj5hhhNhNubj )}(h-:file:`/sys/devices/system/cpu/cpu/power/`h]h%/sys/devices/system/cpu/cpu/power/}(hjOhhhNhNubah}(h]h ]fileah"]h$]h&]rolefileuh1jhj5ubh, where the CPU number }(hj5hhhNhNubj )}(h````h]h}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj5ubh0 is allocated at the system initialization time:}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubhdefinition_list)}(hhh]hdefinition_list_item)}(hXL``energy_perf_bias`` Shows the current EPB value for the CPU in a sliding scale 0 - 15, where a value of 0 corresponds to a hint preference for highest performance and a value of 15 corresponds to the maximum energy savings. In order to update the EPB value for the CPU, this attribute can be written to, either with a number in the 0 - 15 sliding scale above, or with one of the strings: "performance", "balance-performance", "normal", "balance-power", "power" that represent values reflected by their meaning. This attribute is present for all online CPUs supporting the EPB feature. h](hterm)}(h``energy_perf_bias``h]j )}(hjh]henergy_perf_bias}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhhhK$hjubh definition)}(hhh](j})}(hShows the current EPB value for the CPU in a sliding scale 0 - 15, where a value of 0 corresponds to a hint preference for highest performance and a value of 15 corresponds to the maximum energy savings.h]hShows the current EPB value for the CPU in a sliding scale 0 - 15, where a value of 0 corresponds to a hint preference for highest performance and a value of 15 corresponds to the maximum energy savings.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjubj})}(hXIn order to update the EPB value for the CPU, this attribute can be written to, either with a number in the 0 - 15 sliding scale above, or with one of the strings: "performance", "balance-performance", "normal", "balance-power", "power" that represent values reflected by their meaning.h]hX2In order to update the EPB value for the CPU, this attribute can be written to, either with a number in the 0 - 15 sliding scale above, or with one of the strings: “performance”, “balance-performance”, “normal”, “balance-power”, “power” that represent values reflected by their meaning.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjubj})}(hIThis attribute is present for all online CPUs supporting the EPB feature.h]hIThis attribute is present for all online CPUs supporting the EPB feature.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhK#hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK$hj~ubah}(h]h ]h"]h$]h&]uh1j|hjhhhhhNubj})}(hX4Note that while the EPB interface to the processor is defined at the logical CPU level, the physical register backing it may be shared by multiple CPUs (for example, SMT siblings or cores in one package). For this reason, updating the EPB value for one CPU may cause the EPB values for other CPUs to change.h]hX4Note that while the EPB interface to the processor is defined at the logical CPU level, the physical register backing it may be shared by multiple CPUs (for example, SMT siblings or cores in one package). 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