€•8      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ5/translations/zh_CN/admin-guide/pm/intel-speed-select”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ5/translations/zh_TW/admin-guide/pm/intel-speed-select”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ5/translations/it_IT/admin-guide/pm/intel-speed-select”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ5/translations/ja_JP/admin-guide/pm/intel-speed-select”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ5/translations/ko_KR/admin-guide/pm/intel-speed-select”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ5/translations/sp_SP/admin-guide/pm/intel-speed-select”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒO/var/lib/git/docbuild/linux/Documentation/admin-guide/pm/intel-speed-select.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ+Intel(R) Speed Select Technology User Guide”h]”hŒ+Intel(R) Speed Select Technology User Guide”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hX  The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
collection of features that give more granular control over CPU performance.
With Intel(R) SST, one server can be configured for power and performance for a
variety of diverse workload requirements.”h]”hX  The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
collection of features that give more granular control over CPU performance.
With Intel(R) SST, one server can be configured for power and performance for a
variety of diverse workload requirements.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒ;Refer to the links below for an overview of the technology:”h]”hŒ;Refer to the links below for an overview of the technology:”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒhhttps://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-article.html”h]”hÊ)”}”(hhðh]”hŒ	reference”“”)”}”(hhðh]”hŒhhttps://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-article.html”…””}”(hh÷hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”hðuh1hõhhòubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhîubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhhéhžhhŸh³h Nubhí)”}”(hŒwhttps://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enhancing-performance.pdf
”h]”hÊ)”}”(hŒvhttps://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enhancing-performance.pdf”h]”hö)”}”(hj  h]”hŒvhttps://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enhancing-performance.pdf”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”j  uh1hõhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhhéhžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1hçhŸh³h Khh¶hžhubhÊ)”}”(hXu  These capabilities are further enhanced in some of the newer generations of
server platforms where these features can be enumerated and controlled
dynamically without pre-configuring via BIOS setup options. This dynamic
configuration is done via mailbox commands to the hardware. One way to enumerate
and configure these features is by using the Intel Speed Select utility.”h]”hXu  These capabilities are further enhanced in some of the newer generations of
server platforms where these features can be enumerated and controlled
dynamically without pre-configuring via BIOS setup options. This dynamic
configuration is done via mailbox commands to the hardware. One way to enumerate
and configure these features is by using the Intel Speed Select utility.”…””}”(hj;  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hXp  This document explains how to use the Intel Speed Select tool to enumerate and
control Intel(R) SST features. This document gives example commands and explains
how these commands change the power and performance profile of the system under
test. Using this tool as an example, customers can replicate the messaging
implemented in the tool in their production software.”h]”hXp  This document explains how to use the Intel Speed Select tool to enumerate and
control Intel(R) SST features. This document gives example commands and explains
how these commands change the power and performance profile of the system under
test. Using this tool as an example, customers can replicate the messaging
implemented in the tool in their production software.”…””}”(hjI  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒ%intel-speed-select configuration tool”h]”hŒ%intel-speed-select configuration tool”…””}”(hjZ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjW  hžhhŸh³h KubhÊ)”}”(hŒâMost Linux distribution packages may include the "intel-speed-select" tool. If not,
it can be built by downloading the Linux kernel tree from kernel.org. Once
downloaded, the tool can be built without building the full kernel.”h]”hŒæMost Linux distribution packages may include the â€œintel-speed-selectâ€ tool. If not,
it can be built by downloading the Linux kernel tree from kernel.org. Once
downloaded, the tool can be built without building the full kernel.”…””}”(hjh  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hjW  hžhubhÊ)”}”(hŒ2From the kernel tree, run the following commands::”h]”hŒ1From the kernel tree, run the following commands:”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K$hjW  hžhubhŒliteral_block”“”)”}”(hŒ># cd tools/power/x86/intel-speed-select/
# make
# make install”h]”hŒ># cd tools/power/x86/intel-speed-select/
# make
# make install”…””}”hj†  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K&hjW  hžhubhµ)”}”(hhh]”(hº)”}”(hŒGetting Help”h]”hŒGetting Help”…””}”(hj—  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj”  hžhhŸh³h K+ubhÊ)”}”(hŒ6To get help with the tool, execute the command below::”h]”hŒ5To get help with the tool, execute the command below:”…””}”(hj¥  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K-hj”  hžhubj…  )”}”(hŒ# intel-speed-select --help”h]”hŒ# intel-speed-select --help”…””}”hj³  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K/hj”  hžhubhÊ)”}”(hŒ­The top-level help describes arguments and features. Notice that there is a
multi-level help structure in the tool. For example, to get help for the feature "perf-profile"::”h]”hŒ°The top-level help describes arguments and features. Notice that there is a
multi-level help structure in the tool. For example, to get help for the feature â€œperf-profileâ€:”…””}”(hjÁ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K1hj”  hžhubj…  )”}”(hŒ(# intel-speed-select perf-profile --help”h]”hŒ(# intel-speed-select perf-profile --help”…””}”hjÏ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K4hj”  hžhubhÊ)”}”(hŒfTo get help on a command, another level of help is provided. For example for the command info "info"::”h]”hŒiTo get help on a command, another level of help is provided. For example for the command info â€œinfoâ€:”…””}”(hjÝ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K6hj”  hžhubj…  )”}”(hŒ-# intel-speed-select perf-profile info --help”h]”hŒ-# intel-speed-select perf-profile info --help”…””}”hjë  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K8hj”  hžhubeh}”(h]”Œgetting-help”ah ]”h"]”Œgetting help”ah$]”h&]”uh1h´hjW  hžhhŸh³h K+ubhµ)”}”(hhh]”(hº)”}”(hŒSummary of platform capability”h]”hŒSummary of platform capability”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h K;ubhÊ)”}”(hŒ@To check the current platform and driver capabilities, execute::”h]”hŒ?To check the current platform and driver capabilities, execute:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K<hj  hžhubj…  )”}”(hŒ#intel-speed-select --info”h]”hŒ#intel-speed-select --info”…””}”hj   sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K>hj  hžhubhÊ)”}”(hŒFor example on a test system::”h]”hŒFor example on a test system:”…””}”(hj.  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K@hj  hžhubj…  )”}”(hXÇ  # intel-speed-select --info
Intel(R) Speed Select Technology
Executing on CPU model: X
Platform: API version : 1
Platform: Driver version : 1
Platform: mbox supported : 1
Platform: mmio supported : 1
Intel(R) SST-PP (feature perf-profile) is supported
TDP level change control is unlocked, max level: 4
Intel(R) SST-TF (feature turbo-freq) is supported
Intel(R) SST-BF (feature base-freq) is not supported
Intel(R) SST-CP (feature core-power) is supported”h]”hXÇ  # intel-speed-select --info
Intel(R) Speed Select Technology
Executing on CPU model: X
Platform: API version : 1
Platform: Driver version : 1
Platform: mbox supported : 1
Platform: mmio supported : 1
Intel(R) SST-PP (feature perf-profile) is supported
TDP level change control is unlocked, max level: 4
Intel(R) SST-TF (feature turbo-freq) is supported
Intel(R) SST-BF (feature base-freq) is not supported
Intel(R) SST-CP (feature core-power) is supported”…””}”hj<  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h KBhj  hžhubeh}”(h]”Œsummary-of-platform-capability”ah ]”h"]”Œsummary of platform capability”ah$]”h&]”uh1h´hjW  hžhhŸh³h K;ubhµ)”}”(hhh]”(hº)”}”(hŒHIntel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP)”h]”hŒHIntel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP)”…””}”(hjU  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjR  hžhhŸh³h KPubhÊ)”}”(hXï  This feature allows configuration of a server dynamically based on workload
performance requirements. This helps users during deployment as they do not have
to choose a specific server configuration statically.  This Intel(R) Speed Select
Technology - Performance Profile (Intel(R) SST-PP) feature introduces a mechanism
that allows multiple optimized performance profiles per system. Each profile
defines a set of CPUs that need to be online and rest offline to sustain a
guaranteed base frequency. Once the user issues a command to use a specific
performance profile and meet CPU online/offline requirement, the user can expect
a change in the base frequency dynamically. This feature is called
"perf-profile" when using the Intel Speed Select tool.”h]”hXó  This feature allows configuration of a server dynamically based on workload
performance requirements. This helps users during deployment as they do not have
to choose a specific server configuration statically.  This Intel(R) Speed Select
Technology - Performance Profile (Intel(R) SST-PP) feature introduces a mechanism
that allows multiple optimized performance profiles per system. Each profile
defines a set of CPUs that need to be online and rest offline to sustain a
guaranteed base frequency. Once the user issues a command to use a specific
performance profile and meet CPU online/offline requirement, the user can expect
a change in the base frequency dynamically. This feature is called
â€œperf-profileâ€ when using the Intel Speed Select tool.”…””}”(hjc  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KRhjR  hžhubhµ)”}”(hhh]”(hº)”}”(hŒNumber or performance levels”h]”hŒNumber or performance levels”…””}”(hjt  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjq  hžhhŸh³h K^ubhÊ)”}”(hŒrThere can be multiple performance profiles on a system. To get the number of
profiles, execute the command below::”h]”hŒqThere can be multiple performance profiles on a system. To get the number of
profiles, execute the command below:”…””}”(hj‚  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K`hjq  hžhubj…  )”}”(hŒÙ# intel-speed-select perf-profile get-config-levels
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
       get-config-levels:4
package-1
 die-0
   cpu-14
       get-config-levels:4”h]”hŒÙ# intel-speed-select perf-profile get-config-levels
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
       get-config-levels:4
package-1
 die-0
   cpu-14
       get-config-levels:4”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Kchjq  hžhubhÊ)”}”(hŒ‡On this system under test, there are 4 performance profiles in addition to the
base performance profile (which is performance level 0).”h]”hŒ‡On this system under test, there are 4 performance profiles in addition to the
base performance profile (which is performance level 0).”…””}”(hjž  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kohjq  hžhubeh}”(h]”Œnumber-or-performance-levels”ah ]”h"]”Œnumber or performance levels”ah$]”h&]”uh1h´hjR  hžhhŸh³h K^ubhµ)”}”(hhh]”(hº)”}”(hŒLock/Unlock status”h]”hŒLock/Unlock status”…””}”(hj·  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj´  hžhhŸh³h KsubhÊ)”}”(hŒýEven if there are multiple performance profiles, it is possible that they
are locked. If they are locked, users cannot issue a command to change the
performance state. It is possible that there is a BIOS setup to unlock or check
with your system vendor.”h]”hŒýEven if there are multiple performance profiles, it is possible that they
are locked. If they are locked, users cannot issue a command to change the
performance state. It is possible that there is a BIOS setup to unlock or check
with your system vendor.”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kuhj´  hžhubhÊ)”}”(hŒATo check if the system is locked, execute the following command::”h]”hŒ@To check if the system is locked, execute the following command:”…””}”(hjÓ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kzhj´  hžhubj…  )”}”(hŒÓ# intel-speed-select perf-profile get-lock-status
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
       get-lock-status:0
package-1
 die-0
   cpu-14
       get-lock-status:0”h]”hŒÓ# intel-speed-select perf-profile get-lock-status
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
       get-lock-status:0
package-1
 die-0
   cpu-14
       get-lock-status:0”…””}”hjá  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K|hj´  hžhubhÊ)”}”(hŒHIn this case, lock status is 0, which means that the system is unlocked.”h]”hŒHIn this case, lock status is 0, which means that the system is unlocked.”…””}”(hjï  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kˆhj´  hžhubeh}”(h]”Œlock-unlock-status”ah ]”h"]”Œlock/unlock status”ah$]”h&]”uh1h´hjR  hžhhŸh³h Ksubhµ)”}”(hhh]”(hº)”}”(hŒ!Properties of a performance level”h]”hŒ!Properties of a performance level”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h K‹ubhÊ)”}”(hŒsTo get properties of a specific performance level (For example for the level 0, below), execute the command below::”h]”hŒrTo get properties of a specific performance level (For example for the level 0, below), execute the command below:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj  hžhubj…  )”}”(hXâ  # intel-speed-select perf-profile info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-0
       cpu-count:28
       enable-cpu-mask:000003ff,f0003fff
       enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,28,29,30,31,32,33,34,35,36,37,38,39,40,41
       thermal-design-power-ratio:26
       base-frequency(MHz):2600
       speed-select-turbo-freq:disabled
       speed-select-base-freq:disabled
       ...
       ...”h]”hXâ  # intel-speed-select perf-profile info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-0
       cpu-count:28
       enable-cpu-mask:000003ff,f0003fff
       enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,28,29,30,31,32,33,34,35,36,37,38,39,40,41
       thermal-design-power-ratio:26
       base-frequency(MHz):2600
       speed-select-turbo-freq:disabled
       speed-select-base-freq:disabled
       ...
       ...”…””}”hj$  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Khj  hžhubhÊ)”}”(hŒ6Here -l option is used to specify a performance level.”h]”hŒ6Here -l option is used to specify a performance level.”…””}”(hj2  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hj  hžhubhÊ)”}”(hŒ¬If the option -l is omitted, then this command will print information about all
the performance levels. The above command is printing properties of the
performance level 0.”h]”hŒ¬If the option -l is omitted, then this command will print information about all
the performance levels. The above command is printing properties of the
performance level 0.”…””}”(hj@  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¢hj  hžhubhÊ)”}”(hX)  For this performance profile, the list of CPUs displayed by the
"enable-cpu-mask/enable-cpu-list" at the max can be "online." When that
condition is met, then base frequency of 2600 MHz can be maintained. To
understand more, execute "intel-speed-select perf-profile info" for performance
level 4::”h]”hX4  For this performance profile, the list of CPUs displayed by the
â€œenable-cpu-mask/enable-cpu-listâ€ at the max can be â€œonline.â€ When that
condition is met, then base frequency of 2600 MHz can be maintained. To
understand more, execute â€œintel-speed-select perf-profile infoâ€ for performance
level 4:”…””}”(hjN  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K¦hj  hžhubj…  )”}”(hXÏ  # intel-speed-select perf-profile info -l 4
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-4
       cpu-count:28
       enable-cpu-mask:000000fa,f0000faf
       enable-cpu-list:0,1,2,3,5,7,8,9,10,11,28,29,30,31,33,35,36,37,38,39
       thermal-design-power-ratio:28
       base-frequency(MHz):2800
       speed-select-turbo-freq:disabled
       speed-select-base-freq:unsupported
       ...
       ...”h]”hXÏ  # intel-speed-select perf-profile info -l 4
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-4
       cpu-count:28
       enable-cpu-mask:000000fa,f0000faf
       enable-cpu-list:0,1,2,3,5,7,8,9,10,11,28,29,30,31,33,35,36,37,38,39
       thermal-design-power-ratio:28
       base-frequency(MHz):2800
       speed-select-turbo-freq:disabled
       speed-select-base-freq:unsupported
       ...
       ...”…””}”hj\  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h K¬hj  hžhubhÊ)”}”(hŒéThere are fewer CPUs in the "enable-cpu-mask/enable-cpu-list". Consequently, if
the user only keeps these CPUs online and the rest "offline," then the base
frequency is increased to 2.8 GHz compared to 2.6 GHz at performance level 0.”h]”hŒñThere are fewer CPUs in the â€œenable-cpu-mask/enable-cpu-listâ€. Consequently, if
the user only keeps these CPUs online and the rest â€œoffline,â€ then the base
frequency is increased to 2.8 GHz compared to 2.6 GHz at performance level 0.”…””}”(hjj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K½hj  hžhubeh}”(h]”Œ!properties-of-a-performance-level”ah ]”h"]”Œ!properties of a performance level”ah$]”h&]”uh1h´hjR  hžhhŸh³h K‹ubhµ)”}”(hhh]”(hº)”}”(hŒGet current performance level”h]”hŒGet current performance level”…””}”(hjƒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj€  hžhhŸh³h KÂubhÊ)”}”(hŒ/To get the current performance level, execute::”h]”hŒ.To get the current performance level, execute:”…””}”(hj‘  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KÄhj€  hžhubj…  )”}”(hŒ±# intel-speed-select perf-profile get-config-current-level
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
       get-config-current_level:0”h]”hŒ±# intel-speed-select perf-profile get-config-current-level
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
       get-config-current_level:0”…””}”hjŸ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h KÆhj€  hžhubhÊ)”}”(hŒPFirst verify that the base_frequency displayed by the cpufreq sysfs is correct::”h]”hŒOFirst verify that the base_frequency displayed by the cpufreq sysfs is correct:”…””}”(hj­  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KÎhj€  hžhubj…  )”}”(hŒA# cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
2600000”h]”hŒA# cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
2600000”…””}”hj»  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h KÐhj€  hžhubhÊ)”}”(hŒ–This matches the base-frequency (MHz) field value displayed from the
"perf-profile info" command for performance level 0(cpufreq frequency is in
KHz).”h]”hŒšThis matches the base-frequency (MHz) field value displayed from the
â€œperf-profile infoâ€ command for performance level 0(cpufreq frequency is in
KHz).”…””}”(hjÉ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KÓhj€  hžhubhÊ)”}”(hŒjTo check if the average frequency is equal to the base frequency for a 100% busy
workload, disable turbo::”h]”hŒiTo check if the average frequency is equal to the base frequency for a 100% busy
workload, disable turbo:”…””}”(hj×  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K×hj€  hžhubj…  )”}”(hŒ8# echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo”h]”hŒ8# echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo”…””}”hjå  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h KÚhj€  hžhubhÊ)”}”(hŒ4Then runs a busy workload on all CPUs, for example::”h]”hŒ3Then runs a busy workload on all CPUs, for example:”…””}”(hjó  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KÜhj€  hžhubj…  )”}”(hŒ#stress -c 64”h]”hŒ#stress -c 64”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h KÞhj€  hžhubhÊ)”}”(hŒ-To verify the base frequency, run turbostat::”h]”hŒ,To verify the base frequency, run turbostat:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kàhj€  hžhubj…  )”}”(hXX  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1

 Package       Core    CPU     Bzy_MHz
               -       -       2600
 0             0       0       2600
 0             1       1       2600
 0             2       2       2600
 0             3       3       2600
 0             4       4       2600
 .             .       .       .”h]”hXX  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1

 Package       Core    CPU     Bzy_MHz
               -       -       2600
 0             0       0       2600
 0             1       1       2600
 0             2       2       2600
 0             3       3       2600
 0             4       4       2600
 .             .       .       .”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Kâhj€  hžhubeh}”(h]”Œget-current-performance-level”ah ]”h"]”Œget current performance level”ah$]”h&]”uh1h´hjR  hžhhŸh³h KÂubhµ)”}”(hhh]”(hº)”}”(hŒChanging performance level”h]”hŒChanging performance level”…””}”(hj6  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj3  hžhhŸh³h KïubhÊ)”}”(hŒ3To the change the performance level to 4, execute::”h]”hŒ2To the change the performance level to 4, execute:”…””}”(hjD  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kñhj3  hžhubj…  )”}”(hŒÁ# intel-speed-select -d perf-profile set-config-level -l 4 -o
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile
       set_tdp_level:success”h]”hŒÁ# intel-speed-select -d perf-profile set-config-level -l 4 -o
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile
       set_tdp_level:success”…””}”hjR  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Kóhj3  hžhubhÊ)”}”(hŒ£In the command above, "-o" is optional. If it is specified, then it will also
offline CPUs which are not present in the enable_cpu_mask for this performance
level.”h]”hŒ§In the command above, â€œ-oâ€ is optional. If it is specified, then it will also
offline CPUs which are not present in the enable_cpu_mask for this performance
level.”…””}”(hj`  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kühj3  hžhubhÊ)”}”(hŒ&Now if the base_frequency is checked::”h]”hŒ%Now if the base_frequency is checked:”…””}”(hjn  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M hj3  hžhubj…  )”}”(hŒ@#cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
2800000”h]”hŒ@#cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
2800000”…””}”hj|  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mhj3  hžhubhÊ)”}”(hŒëWhich shows that the base frequency now increased from 2600 MHz at performance
level 0 to 2800 MHz at performance level 4. As a result, any workload, which can
use fewer CPUs, can see a boost of 200 MHz compared to performance level 0.”h]”hŒëWhich shows that the base frequency now increased from 2600 MHz at performance
level 0 to 2800 MHz at performance level 4. As a result, any workload, which can
use fewer CPUs, can see a boost of 200 MHz compared to performance level 0.”…””}”(hjŠ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj3  hžhubeh}”(h]”Œchanging-performance-level”ah ]”h"]”Œchanging performance level”ah$]”h&]”uh1h´hjR  hžhhŸh³h Kïubhµ)”}”(hhh]”(hº)”}”(hŒ,Changing performance level via BMC Interface”h]”hŒ,Changing performance level via BMC Interface”…””}”(hj£  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj   hžhhŸh³h M
ubhÊ)”}”(hXý  It is possible to change SST-PP level using out of band (OOB) agent (Via some
remote management console, through BMC "Baseboard Management Controller"
interface). This mode is supported from the Sapphire Rapids processor
generation. The kernel and tool change to support this mode is added to Linux
kernel version 5.18. To enable this feature, kernel config
"CONFIG_INTEL_HFI_THERMAL" is required. The minimum version of the tool
is "v1.12" to support this feature, which is part of Linux kernel version 5.18.”h]”hX	  It is possible to change SST-PP level using out of band (OOB) agent (Via some
remote management console, through BMC â€œBaseboard Management Controllerâ€
interface). This mode is supported from the Sapphire Rapids processor
generation. The kernel and tool change to support this mode is added to Linux
kernel version 5.18. To enable this feature, kernel config
â€œCONFIG_INTEL_HFI_THERMALâ€ is required. The minimum version of the tool
is â€œv1.12â€ to support this feature, which is part of Linux kernel version 5.18.”…””}”(hj±  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj   hžhubhÊ)”}”(hŒcTo support such configuration, this tool can be used as a daemon. Add
a command line option --oob::”h]”hŒbTo support such configuration, this tool can be used as a daemon. Add
a command line option --oob:”…””}”(hj¿  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj   hžhubj…  )”}”(hŒ‡# intel-speed-select --oob
Intel(R) Speed Select Technology
Executing on CPU model:143[0x8f]
OOB mode is enabled and will run as daemon”h]”hŒ‡# intel-speed-select --oob
Intel(R) Speed Select Technology
Executing on CPU model:143[0x8f]
OOB mode is enabled and will run as daemon”…””}”hjÍ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mhj   hžhubhÊ)”}”(hŒRIn this mode the tool will online/offline CPUs based on the new performance
level.”h]”hŒRIn this mode the tool will online/offline CPUs based on the new performance
level.”…””}”(hjÛ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj   hžhubeh}”(h]”Œ,changing-performance-level-via-bmc-interface”ah ]”h"]”Œ,changing performance level via bmc interface”ah$]”h&]”uh1h´hjR  hžhhŸh³h M
ubeh}”(h]”ŒBintel-r-speed-select-technology-performance-profile-intel-r-sst-pp”ah ]”h"]”ŒHintel(r) speed select technology - performance profile (intel(r) sst-pp)”ah$]”h&]”uh1h´hjW  hžhhŸh³h KPubhµ)”}”(hhh]”(hº)”}”(hŒ-Check presence of other Intel(R) SST features”h]”hŒ-Check presence of other Intel(R) SST features”…””}”(hjü  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjù  hžhhŸh³h M ubhÊ)”}”(hŒøEach of the performance profiles also specifies weather there is support of
other two Intel(R) SST features (Intel(R) Speed Select Technology - Base Frequency
(Intel(R) SST-BF) and Intel(R) Speed Select Technology - Turbo Frequency (Intel
SST-TF)).”h]”hŒøEach of the performance profiles also specifies weather there is support of
other two Intel(R) SST features (Intel(R) Speed Select Technology - Base Frequency
(Intel(R) SST-BF) and Intel(R) Speed Select Technology - Turbo Frequency (Intel
SST-TF)).”…””}”(hj
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M"hjù  hžhubhÊ)”}”(hŒSFor example, from the output of "perf-profile info" above, for level 0 and level
4:”h]”hŒWFor example, from the output of â€œperf-profile infoâ€ above, for level 0 and level
4:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M'hjù  hžhubhŒdefinition_list”“”)”}”(hhh]”(hŒdefinition_list_item”“”)”}”(hŒOFor level 0::
speed-select-turbo-freq:disabled
speed-select-base-freq:disabled
”h]”(hŒterm”“”)”}”(hŒFor level 0::”h]”hŒFor level 0::”…””}”(hj3  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hŸh³h M,hj-  ubhŒ
definition”“”)”}”(hhh]”hÊ)”}”(hŒ@speed-select-turbo-freq:disabled
speed-select-base-freq:disabled”h]”hŒ@speed-select-turbo-freq:disabled
speed-select-base-freq:disabled”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M+hjC  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jA  hj-  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j+  hŸh³h M,hj(  ubj,  )”}”(hŒRFor level 4::
speed-select-turbo-freq:disabled
speed-select-base-freq:unsupported
”h]”(j2  )”}”(hŒFor level 4::”h]”hŒFor level 4::”…””}”(hjd  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hŸh³h M0hj`  ubjB  )”}”(hhh]”hÊ)”}”(hŒCspeed-select-turbo-freq:disabled
speed-select-base-freq:unsupported”h]”hŒCspeed-select-turbo-freq:disabled
speed-select-base-freq:unsupported”…””}”(hju  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M/hjr  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jA  hj`  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j+  hŸh³h M0hj(  hžhubeh}”(h]”h ]”h"]”h$]”h&]”uh1j&  hjù  hžhhŸh³h NubhÊ)”}”(hŒ˜Given these results, the "speed-select-base-freq" (Intel(R) SST-BF) in level 4
changed from "disabled" to "unsupported" compared to performance level 0.”h]”hŒ¤Given these results, the â€œspeed-select-base-freqâ€ (Intel(R) SST-BF) in level 4
changed from â€œdisabledâ€ to â€œunsupportedâ€ compared to performance level 0.”…””}”(hj•  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M2hjù  hžhubhÊ)”}”(hXm  This means that at performance level 4, the "speed-select-base-freq" feature is
not supported. However, at performance level 0, this feature is "supported", but
currently "disabled", meaning the user has not activated this feature. Whereas
"speed-select-turbo-freq" (Intel(R) SST-TF) is supported at both performance
levels, but currently not activated by the user.”h]”hX}  This means that at performance level 4, the â€œspeed-select-base-freqâ€ feature is
not supported. However, at performance level 0, this feature is â€œsupportedâ€, but
currently â€œdisabledâ€, meaning the user has not activated this feature. Whereas
â€œspeed-select-turbo-freqâ€ (Intel(R) SST-TF) is supported at both performance
levels, but currently not activated by the user.”…””}”(hj£  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M5hjù  hžhubhÊ)”}”(hX  The Intel(R) SST-BF and the Intel(R) SST-TF features are built on a foundation
technology called Intel(R) Speed Select Technology - Core Power (Intel(R) SST-CP).
The platform firmware enables this feature when Intel(R) SST-BF or Intel(R) SST-TF
is supported on a platform.”h]”hX  The Intel(R) SST-BF and the Intel(R) SST-TF features are built on a foundation
technology called Intel(R) Speed Select Technology - Core Power (Intel(R) SST-CP).
The platform firmware enables this feature when Intel(R) SST-BF or Intel(R) SST-TF
is supported on a platform.”…””}”(hj±  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M;hjù  hžhubeh}”(h]”Œ,check-presence-of-other-intel-r-sst-features”ah ]”h"]”Œ-check presence of other intel(r) sst features”ah$]”h&]”uh1h´hjW  hžhhŸh³h M ubhµ)”}”(hhh]”(hº)”}”(hŒ=Intel(R) Speed Select Technology Core Power (Intel(R) SST-CP)”h]”hŒ=Intel(R) Speed Select Technology Core Power (Intel(R) SST-CP)”…””}”(hjÊ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjÇ  hžhhŸh³h MAubhÊ)”}”(hX  Intel(R) Speed Select Technology Core Power (Intel(R) SST-CP) is an interface that
allows users to define per core priority. This defines a mechanism to distribute
power among cores when there is a power constrained scenario. This defines a
class of service (CLOS) configuration.”h]”hX  Intel(R) Speed Select Technology Core Power (Intel(R) SST-CP) is an interface that
allows users to define per core priority. This defines a mechanism to distribute
power among cores when there is a power constrained scenario. This defines a
class of service (CLOS) configuration.”…””}”(hjØ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MChjÇ  hžhubhÊ)”}”(hXQ  The user can configure up to 4 class of service configurations. Each CLOS group
configuration allows definitions of parameters, which affects how the frequency
can be limited and power is distributed. Each CPU core can be tied to a class of
service and hence an associated priority. The granularity is at core level not
at per CPU level.”h]”hXQ  The user can configure up to 4 class of service configurations. Each CLOS group
configuration allows definitions of parameters, which affects how the frequency
can be limited and power is distributed. Each CPU core can be tied to a class of
service and hence an associated priority. The granularity is at core level not
at per CPU level.”…””}”(hjæ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MHhjÇ  hžhubhµ)”}”(hhh]”(hº)”}”(hŒ Enable CLOS based prioritization”h]”hŒ Enable CLOS based prioritization”…””}”(hj÷  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjô  hžhhŸh³h MOubhÊ)”}”(hŒÐTo use CLOS based prioritization feature, firmware must be informed to enable
and use a priority type. There is a default per platform priority type, which
can be changed with optional command line parameter.”h]”hŒÐTo use CLOS based prioritization feature, firmware must be informed to enable
and use a priority type. There is a default per platform priority type, which
can be changed with optional command line parameter.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MQhjô  hžhubhÊ)”}”(hŒ*To enable and check the options, execute::”h]”hŒ)To enable and check the options, execute:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MUhjô  hžhubj…  )”}”(hŒ÷# intel-speed-select core-power enable --help
Intel(R) Speed Select Technology
Executing on CPU model: X
Enable core-power for a package/die
       Clos Enable: Specify priority type with [--priority|-p]
                0: Proportional, 1: Ordered”h]”hŒ÷# intel-speed-select core-power enable --help
Intel(R) Speed Select Technology
Executing on CPU model: X
Enable core-power for a package/die
       Clos Enable: Specify priority type with [--priority|-p]
                0: Proportional, 1: Ordered”…””}”hj!  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MWhjô  hžhubhÊ)”}”(hŒ&There are two types of priority types:”h]”hŒ&There are two types of priority types:”…””}”(hj/  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M^hjô  hžhubhè)”}”(hhh]”hí)”}”(hŒOrdered
”h]”hÊ)”}”(hŒOrdered”h]”hŒOrdered”…””}”(hjD  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M`hj@  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhj=  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”j9  j:  uh1hçhŸh³h M`hjô  hžhubhÊ)”}”(hŒPriority for ordered throttling is defined based on the index of the assigned
CLOS group. Where CLOS0 gets highest priority (throttled last).”h]”hŒPriority for ordered throttling is defined based on the index of the assigned
CLOS group. Where CLOS0 gets highest priority (throttled last).”…””}”(hj^  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mbhjô  hžhubhÊ)”}”(hŒ1Priority order is:
CLOS0 > CLOS1 > CLOS2 > CLOS3.”h]”hŒ1Priority order is:
CLOS0 > CLOS1 > CLOS2 > CLOS3.”…””}”(hjl  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mehjô  hžhubhè)”}”(hhh]”hí)”}”(hŒProportional
”h]”hÊ)”}”(hŒProportional”h]”hŒProportional”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhhj}  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhjz  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”j9  j:  uh1hçhŸh³h Mhhjô  hžhubhÊ)”}”(hX  When proportional priority is used, there is an additional parameter called
frequency_weight, which can be specified per CLOS group. The goal of
proportional priority is to provide each core with the requested min., then
distribute all remaining (excess/deficit) budgets in proportion to a defined
weight. This proportional priority can be configured using "core-power config"
command.”h]”hX…  When proportional priority is used, there is an additional parameter called
frequency_weight, which can be specified per CLOS group. The goal of
proportional priority is to provide each core with the requested min., then
distribute all remaining (excess/deficit) budgets in proportion to a defined
weight. This proportional priority can be configured using â€œcore-power configâ€
command.”…””}”(hj›  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mjhjô  hžhubhÊ)”}”(hŒ<To enable with the platform default priority type, execute::”h]”hŒ;To enable with the platform default priority type, execute:”…””}”(hj©  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mqhjô  hžhubj…  )”}”(hŒá# intel-speed-select core-power enable
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     core-power
       enable:success
package-1
 die-0
   cpu-6
     core-power
       enable:success”h]”hŒá# intel-speed-select core-power enable
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     core-power
       enable:success
package-1
 die-0
   cpu-6
     core-power
       enable:success”…””}”hj·  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mshjô  hžhubhÊ)”}”(hX   The scope of this enable is per package or die scoped when a package contains
multiple dies. To check if CLOS is enabled and get priority type, "core-power
info" command can be used. For example to check the status of core-power feature
on CPU 0, execute::”h]”hX  The scope of this enable is per package or die scoped when a package contains
multiple dies. To check if CLOS is enabled and get priority type, â€œcore-power
infoâ€ command can be used. For example to check the status of core-power feature
on CPU 0, execute:”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhjô  hžhubj…  )”}”(hX»  # intel-speed-select -c 0 core-power info
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     core-power
       support-status:supported
       enable-status:enabled
       clos-enable-status:enabled
       priority-type:proportional
package-1
 die-0
   cpu-24
     core-power
       support-status:supported
       enable-status:enabled
       clos-enable-status:enabled
       priority-type:proportional”h]”hX»  # intel-speed-select -c 0 core-power info
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     core-power
       support-status:supported
       enable-status:enabled
       clos-enable-status:enabled
       priority-type:proportional
package-1
 die-0
   cpu-24
     core-power
       support-status:supported
       enable-status:enabled
       clos-enable-status:enabled
       priority-type:proportional”…””}”hjÓ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M†hjô  hžhubeh}”(h]”Œ enable-clos-based-prioritization”ah ]”h"]”Œ enable clos based prioritization”ah$]”h&]”uh1h´hjÇ  hžhhŸh³h MOubhµ)”}”(hhh]”(hº)”}”(hŒConfiguring CLOS groups”h]”hŒConfiguring CLOS groups”…””}”(hjì  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjé  hžhhŸh³h M›ubhÊ)”}”(hX"  Each CLOS group has its own attributes including min, max, freq_weight and
desired. These parameters can be configured with "core-power config" command.
Defaults will be used if user skips setting a parameter except clos id, which is
mandatory. To check core-power config options, execute::”h]”hX%  Each CLOS group has its own attributes including min, max, freq_weight and
desired. These parameters can be configured with â€œcore-power configâ€ command.
Defaults will be used if user skips setting a parameter except clos id, which is
mandatory. To check core-power config options, execute:”…””}”(hjú  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhjé  hžhubj…  )”}”(hXi  # intel-speed-select core-power config --help
Intel(R) Speed Select Technology
Executing on CPU model: X
Set core-power configuration for one of the four clos ids
       Specify targeted clos id with [--clos|-c]
       Specify clos Proportional Priority [--weight|-w]
       Specify clos min in MHz with [--min|-n]
       Specify clos max in MHz with [--max|-m]”h]”hXi  # intel-speed-select core-power config --help
Intel(R) Speed Select Technology
Executing on CPU model: X
Set core-power configuration for one of the four clos ids
       Specify targeted clos id with [--clos|-c]
       Specify clos Proportional Priority [--weight|-w]
       Specify clos min in MHz with [--min|-n]
       Specify clos max in MHz with [--max|-m]”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M¢hjé  hžhubhÊ)”}”(hŒFor example::”h]”hŒFor example:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M«hjé  hžhubj…  )”}”(hXÁ  # intel-speed-select core-power config -c 0
Intel(R) Speed Select Technology
Executing on CPU model: X
clos epp is not specified, default: 0
clos frequency weight is not specified, default: 0
clos min is not specified, default: 0 MHz
clos max is not specified, default: 25500 MHz
clos desired is not specified, default: 0
package-0
 die-0
   cpu-0
     core-power
       config:success
package-1
 die-0
   cpu-6
     core-power
       config:success”h]”hXÁ  # intel-speed-select core-power config -c 0
Intel(R) Speed Select Technology
Executing on CPU model: X
clos epp is not specified, default: 0
clos frequency weight is not specified, default: 0
clos min is not specified, default: 0 MHz
clos max is not specified, default: 25500 MHz
clos desired is not specified, default: 0
package-0
 die-0
   cpu-0
     core-power
       config:success
package-1
 die-0
   cpu-6
     core-power
       config:success”…””}”hj$  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M­hjé  hžhubhÊ)”}”(hŒšThe user has the option to change defaults. For example, the user can change the
"min" and set the base frequency to always get guaranteed base frequency.”h]”hŒžThe user has the option to change defaults. For example, the user can change the
â€œminâ€ and set the base frequency to always get guaranteed base frequency.”…””}”(hj2  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MÀhjé  hžhubeh}”(h]”Œconfiguring-clos-groups”ah ]”h"]”Œconfiguring clos groups”ah$]”h&]”uh1h´hjÇ  hžhhŸh³h M›ubhµ)”}”(hhh]”(hº)”}”(hŒ"Get the current CLOS configuration”h]”hŒ"Get the current CLOS configuration”…””}”(hjK  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjH  hžhhŸh³h MÄubhÊ)”}”(hŒzTo check the current configuration, "core-power get-config" can be used. For
example, to get the configuration of CLOS 0::”h]”hŒ}To check the current configuration, â€œcore-power get-configâ€ can be used. For
example, to get the configuration of CLOS 0:”…””}”(hjY  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MÆhjH  hžhubj…  )”}”(hXå  # intel-speed-select core-power get-config -c 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     core-power
       clos:0
       epp:0
       clos-proportional-priority:0
       clos-min:0 MHz
       clos-max:Max Turbo frequency
       clos-desired:0 MHz
package-1
 die-0
   cpu-24
     core-power
       clos:0
       epp:0
       clos-proportional-priority:0
       clos-min:0 MHz
       clos-max:Max Turbo frequency
       clos-desired:0 MHz”h]”hXå  # intel-speed-select core-power get-config -c 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     core-power
       clos:0
       epp:0
       clos-proportional-priority:0
       clos-min:0 MHz
       clos-max:Max Turbo frequency
       clos-desired:0 MHz
package-1
 die-0
   cpu-24
     core-power
       clos:0
       epp:0
       clos-proportional-priority:0
       clos-min:0 MHz
       clos-max:Max Turbo frequency
       clos-desired:0 MHz”…””}”hjg  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MÉhjH  hžhubeh}”(h]”Œ"get-the-current-clos-configuration”ah ]”h"]”Œ"get the current clos configuration”ah$]”h&]”uh1h´hjÇ  hžhhŸh³h MÄubhµ)”}”(hhh]”(hº)”}”(hŒ#Associating a CPU with a CLOS group”h]”hŒ#Associating a CPU with a CLOS group”…””}”(hj€  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj}  hžhhŸh³h MâubhÊ)”}”(hŒKTo associate a CPU to a CLOS group "core-power assoc" command can be used::”h]”hŒNTo associate a CPU to a CLOS group â€œcore-power assocâ€ command can be used:”…””}”(hjŽ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mähj}  hžhubj…  )”}”(hŒµ# intel-speed-select core-power assoc --help
Intel(R) Speed Select Technology
Executing on CPU model: X
Associate a clos id to a CPU
       Specify targeted clos id with [--clos|-c]”h]”hŒµ# intel-speed-select core-power assoc --help
Intel(R) Speed Select Technology
Executing on CPU model: X
Associate a clos id to a CPU
       Specify targeted clos id with [--clos|-c]”…””}”hjœ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mæhj}  hžhubhÊ)”}”(hŒ:For example to associate CPU 10 to CLOS group 3, execute::”h]”hŒ9For example to associate CPU 10 to CLOS group 3, execute:”…””}”(hjª  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Míhj}  hžhubj…  )”}”(hŒ«# intel-speed-select -c 10 core-power assoc -c 3
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-10
     core-power
       assoc:success”h]”hŒ«# intel-speed-select -c 10 core-power assoc -c 3
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-10
     core-power
       assoc:success”…””}”hj¸  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mïhj}  hžhubhÊ)”}”(hŒ£Once a CPU is associated, its sibling CPUs are also associated to a CLOS group.
Once associated, avoid changing Linux "cpufreq" subsystem scaling frequency
limits.”h]”hŒ§Once a CPU is associated, its sibling CPUs are also associated to a CLOS group.
Once associated, avoid changing Linux â€œcpufreqâ€ subsystem scaling frequency
limits.”…””}”(hjÆ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Møhj}  hžhubhÊ)”}”(hŒTo check the existing association for a CPU, "core-power get-assoc" command can
be used. For example, to get association of CPU 10, execute::”h]”hŒTo check the existing association for a CPU, â€œcore-power get-assocâ€ command can
be used. For example, to get association of CPU 10, execute:”…””}”(hjÔ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mühj}  hžhubj…  )”}”(hŒ¢# intel-speed-select -c 10 core-power get-assoc
Intel(R) Speed Select Technology
Executing on CPU model: X
package-1
 die-0
   cpu-10
     get-assoc
       clos:3”h]”hŒ¢# intel-speed-select -c 10 core-power get-assoc
Intel(R) Speed Select Technology
Executing on CPU model: X
package-1
 die-0
   cpu-10
     get-assoc
       clos:3”…””}”hjâ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mÿhj}  hžhubhÊ)”}”(hŒ1This shows that CPU 10 is part of a CLOS group 3.”h]”hŒ1This shows that CPU 10 is part of a CLOS group 3.”…””}”(hjð  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj}  hžhubeh}”(h]”Œ#associating-a-cpu-with-a-clos-group”ah ]”h"]”Œ#associating a cpu with a clos group”ah$]”h&]”uh1h´hjÇ  hžhhŸh³h Mâubhµ)”}”(hhh]”(hº)”}”(hŒ!Disable CLOS based prioritization”h]”hŒ!Disable CLOS based prioritization”…””}”(hj	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h MubhÊ)”}”(hŒTo disable, execute::”h]”hŒTo disable, execute:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj  hžhubj…  )”}”(hŒ'# intel-speed-select core-power disable”h]”hŒ'# intel-speed-select core-power disable”…””}”hj%  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mhj  hžhubhÊ)”}”(hXj  Some features like Intel(R) SST-TF can only be enabled when CLOS based prioritization
is enabled. For this reason, disabling while Intel(R) SST-TF is enabled can cause
Intel(R) SST-TF to fail. This will cause the "disable" command to display an error
if Intel(R) SST-TF is already enabled. In turn, to disable, the Intel(R) SST-TF
feature must be disabled first.”h]”hXn  Some features like Intel(R) SST-TF can only be enabled when CLOS based prioritization
is enabled. For this reason, disabling while Intel(R) SST-TF is enabled can cause
Intel(R) SST-TF to fail. This will cause the â€œdisableâ€ command to display an error
if Intel(R) SST-TF is already enabled. In turn, to disable, the Intel(R) SST-TF
feature must be disabled first.”…””}”(hj3  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj  hžhubeh}”(h]”Œ!disable-clos-based-prioritization”ah ]”h"]”Œ!disable clos based prioritization”ah$]”h&]”uh1h´hjÇ  hžhhŸh³h Mubeh}”(h]”Œ9intel-r-speed-select-technology-core-power-intel-r-sst-cp”ah ]”h"]”Œ=intel(r) speed select technology core power (intel(r) sst-cp)”ah$]”h&]”uh1h´hjW  hžhhŸh³h MAubhµ)”}”(hhh]”(hº)”}”(hŒCIntel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF)”h]”hŒCIntel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF)”…””}”(hjT  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjQ  hžhhŸh³h MubhÊ)”}”(hXÆ  The Intel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF) feature lets
the user control base frequency. If some critical workload threads demand
constant high guaranteed performance, then this feature can be used to execute
the thread at higher base frequency on specific sets of CPUs (high priority
CPUs) at the cost of lower base frequency (low priority CPUs) on other CPUs.
This feature does not require offline of the low priority CPUs.”h]”hXÆ  The Intel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF) feature lets
the user control base frequency. If some critical workload threads demand
constant high guaranteed performance, then this feature can be used to execute
the thread at higher base frequency on specific sets of CPUs (high priority
CPUs) at the cost of lower base frequency (low priority CPUs) on other CPUs.
This feature does not require offline of the low priority CPUs.”…””}”(hjb  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MhjQ  hžhubhÊ)”}”(hX“  The support of Intel(R) SST-BF depends on the Intel(R) Speed Select Technology -
Performance Profile (Intel(R) SST-PP) performance level configuration. It is
possible that only certain performance levels support Intel(R) SST-BF. It is also
possible that only base performance level (level = 0) has support of Intel
SST-BF. Consequently, first select the desired performance level to enable this
feature.”h]”hX“  The support of Intel(R) SST-BF depends on the Intel(R) Speed Select Technology -
Performance Profile (Intel(R) SST-PP) performance level configuration. It is
possible that only certain performance levels support Intel(R) SST-BF. It is also
possible that only base performance level (level = 0) has support of Intel
SST-BF. Consequently, first select the desired performance level to enable this
feature.”…””}”(hjp  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M"hjQ  hžhubhÊ)”}”(hŒ’In the system under test here, Intel(R) SST-BF is supported at the base
performance level 0, but currently disabled. For example for the level 0::”h]”hŒ‘In the system under test here, Intel(R) SST-BF is supported at the base
performance level 0, but currently disabled. For example for the level 0:”…””}”(hj~  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M)hjQ  hžhubj…  )”}”(hŒÝ# intel-speed-select -c 0 perf-profile info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-0
       ...

       speed-select-base-freq:disabled
       ...”h]”hŒÝ# intel-speed-select -c 0 perf-profile info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-0
       ...

       speed-select-base-freq:disabled
       ...”…””}”hjŒ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M,hjQ  hžhubhÊ)”}”(hŒ´Before enabling Intel(R) SST-BF and measuring its impact on a workload
performance, execute some workload and measure performance and get a baseline
performance to compare against.”h]”hŒ´Before enabling Intel(R) SST-BF and measuring its impact on a workload
performance, execute some workload and measure performance and get a baseline
performance to compare against.”…””}”(hjš  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M8hjQ  hžhubhÊ)”}”(hŒ‚Here the user wants more guaranteed performance. For this reason, it is likely
that turbo is disabled. To disable turbo, execute::”h]”hŒHere the user wants more guaranteed performance. For this reason, it is likely
that turbo is disabled. To disable turbo, execute:”…””}”(hj¨  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M<hjQ  hžhubj…  )”}”(hŒ7#echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo”h]”hŒ7#echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo”…””}”hj¶  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M?hjQ  hžhubhÊ)”}”(hŒwBased on the output of the "intel-speed-select perf-profile info -l 0" base
frequency of guaranteed frequency 2600 MHz.”h]”hŒ{Based on the output of the â€œintel-speed-select perf-profile info -l 0â€ base
frequency of guaranteed frequency 2600 MHz.”…””}”(hjÄ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MAhjQ  hžhubhµ)”}”(hhh]”(hº)”}”(hŒ+Measure baseline performance for comparison”h]”hŒ+Measure baseline performance for comparison”…””}”(hjÕ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjÒ  hžhhŸh³h MFubhÊ)”}”(hŒ¼To compare, pick a multi-threaded workload where each thread can be scheduled on
separate CPUs. "Hackbench pipe" test is a good example on how to improve
performance using Intel(R) SST-BF.”h]”hŒÀTo compare, pick a multi-threaded workload where each thread can be scheduled on
separate CPUs. â€œHackbench pipeâ€ test is a good example on how to improve
performance using Intel(R) SST-BF.”…””}”(hjã  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MHhjÒ  hžhubhÊ)”}”(hŒoBelow, the workload is measuring average scheduler wakeup latency, so a lower
number means better performance::”h]”hŒnBelow, the workload is measuring average scheduler wakeup latency, so a lower
number means better performance:”…””}”(hjñ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MLhjÒ  hžhubj…  )”}”(hŒÓ# taskset -c 3,4 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 6.102 [sec]
      6.102445 usecs/op
        163868 ops/sec”h]”hŒÓ# taskset -c 3,4 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 6.102 [sec]
      6.102445 usecs/op
        163868 ops/sec”…””}”hjÿ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MOhjÒ  hžhubhÊ)”}”(hŒ×While running the above test, if we take turbostat output, it will show us that
2 of the CPUs are busy and reaching max. frequency (which would be the base
frequency as the turbo is disabled). The turbostat output::”h]”hŒÖWhile running the above test, if we take turbostat output, it will show us that
2 of the CPUs are busy and reaching max. frequency (which would be the base
frequency as the turbo is disabled). The turbostat output:”…””}”(hj	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MVhjÒ  hžhubj…  )”}”(hXU  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
0              0       0       1000
0              1       1       1005
0              2       2       1000
0              3       3       2600
0              4       4       2600
0              5       5       1000
0              6       6       1000
0              7       7       1005
0              8       8       1005
0              9       9       1000
0              10      10      1000
0              11      11      995
0              12      12      1000
0              13      13      1000”h]”hXU  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
0              0       0       1000
0              1       1       1005
0              2       2       1000
0              3       3       2600
0              4       4       2600
0              5       5       1000
0              6       6       1000
0              7       7       1005
0              8       8       1005
0              9       9       1000
0              10      10      1000
0              11      11      995
0              12      12      1000
0              13      13      1000”…””}”hj	  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MZhjÒ  hžhubhÊ)”}”(hŒsFrom the above turbostat output, both CPU 3 and 4 are very busy and reaching
full guaranteed frequency of 2600 MHz.”h]”hŒsFrom the above turbostat output, both CPU 3 and 4 are very busy and reaching
full guaranteed frequency of 2600 MHz.”…””}”(hj)	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MkhjÒ  hžhubeh}”(h]”Œ+measure-baseline-performance-for-comparison”ah ]”h"]”Œ+measure baseline performance for comparison”ah$]”h&]”uh1h´hjQ  hžhhŸh³h MFubhµ)”}”(hhh]”(hº)”}”(hŒIntel(R) SST-BF Capabilities”h]”hŒIntel(R) SST-BF Capabilities”…””}”(hjB	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj?	  hžhhŸh³h MoubhÊ)”}”(hŒUTo get capabilities of Intel(R) SST-BF for the current performance level 0,
execute::”h]”hŒTTo get capabilities of Intel(R) SST-BF for the current performance level 0,
execute:”…””}”(hjP	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mqhj?	  hžhubj…  )”}”(hXž  # intel-speed-select base-freq info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     speed-select-base-freq
       high-priority-base-frequency(MHz):3000
       high-priority-cpu-mask:00000216,00002160
       high-priority-cpu-list:5,6,8,13,33,34,36,41
       low-priority-base-frequency(MHz):2400
       tjunction-temperature(C):125
       thermal-design-power(W):205”h]”hXž  # intel-speed-select base-freq info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     speed-select-base-freq
       high-priority-base-frequency(MHz):3000
       high-priority-cpu-mask:00000216,00002160
       high-priority-cpu-list:5,6,8,13,33,34,36,41
       low-priority-base-frequency(MHz):2400
       tjunction-temperature(C):125
       thermal-design-power(W):205”…””}”hj^	  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mthj?	  hžhubhÊ)”}”(hXº  The above capabilities show that there are some CPUs on this system that can
offer base frequency of 3000 MHz compared to the standard base frequency at this
performance levels. Nevertheless, these CPUs are fixed, and they are presented
via high-priority-cpu-list/high-priority-cpu-mask. But if this Intel(R) SST-BF
feature is selected, the low priorities CPUs (which are not in
high-priority-cpu-list) can only offer up to 2400 MHz. As a result, if this
clipping of low priority CPUs is acceptable, then the user can enable Intel
SST-BF feature particularly for the above "sched pipe" workload since only two
CPUs are used, they can be scheduled on high priority CPUs and can get boost of
400 MHz.”h]”hX¾  The above capabilities show that there are some CPUs on this system that can
offer base frequency of 3000 MHz compared to the standard base frequency at this
performance levels. Nevertheless, these CPUs are fixed, and they are presented
via high-priority-cpu-list/high-priority-cpu-mask. But if this Intel(R) SST-BF
feature is selected, the low priorities CPUs (which are not in
high-priority-cpu-list) can only offer up to 2400 MHz. As a result, if this
clipping of low priority CPUs is acceptable, then the user can enable Intel
SST-BF feature particularly for the above â€œsched pipeâ€ workload since only two
CPUs are used, they can be scheduled on high priority CPUs and can get boost of
400 MHz.”…””}”(hjl	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M‚hj?	  hžhubeh}”(h]”Œintel-r-sst-bf-capabilities”ah ]”h"]”Œintel(r) sst-bf capabilities”ah$]”h&]”uh1h´hjQ  hžhhŸh³h Moubhµ)”}”(hhh]”(hº)”}”(hŒEnable Intel(R) SST-BF”h]”hŒEnable Intel(R) SST-BF”…””}”(hj…	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj‚	  hžhhŸh³h MŽubhÊ)”}”(hŒ,To enable Intel(R) SST-BF feature, execute::”h]”hŒ+To enable Intel(R) SST-BF feature, execute:”…””}”(hj“	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj‚	  hžhubj…  )”}”(hŒâ# intel-speed-select base-freq enable -a
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     base-freq
       enable:success
package-1
 die-0
   cpu-14
     base-freq
       enable:success”h]”hŒâ# intel-speed-select base-freq enable -a
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     base-freq
       enable:success
package-1
 die-0
   cpu-14
     base-freq
       enable:success”…””}”hj¡	  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M’hj‚	  hžhubhÊ)”}”(hX¤  In this case, -a option is optional. This not only enables Intel(R) SST-BF, but it
also adjusts the priority of cores using Intel(R) Speed Select Technology Core
Power (Intel(R) SST-CP) features. This option sets the minimum performance of each
Intel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP) class to
maximum performance so that the hardware will give maximum performance possible
for each CPU.”h]”hX¤  In this case, -a option is optional. This not only enables Intel(R) SST-BF, but it
also adjusts the priority of cores using Intel(R) Speed Select Technology Core
Power (Intel(R) SST-CP) features. This option sets the minimum performance of each
Intel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP) class to
maximum performance so that the hardware will give maximum performance possible
for each CPU.”…””}”(hj¯	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M hj‚	  hžhubhÊ)”}”(hŒ`If -a option is not used, then the following steps are required before enabling
Intel(R) SST-BF:”h]”hŒ`If -a option is not used, then the following steps are required before enabling
Intel(R) SST-BF:”…””}”(hj½	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M§hj‚	  hžhubhè)”}”(hhh]”(hí)”}”(hŒFDiscover Intel(R) SST-BF and note low and high priority base frequency”h]”hÊ)”}”(hjÐ	  h]”hŒFDiscover Intel(R) SST-BF and note low and high priority base frequency”…””}”(hjÒ	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MªhjÎ	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhjË	  hžhhŸh³h Nubhí)”}”(hŒNote the high priority CPU list”h]”hÊ)”}”(hjç	  h]”hŒNote the high priority CPU list”…””}”(hjé	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M«hjå	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhjË	  hžhhŸh³h Nubhí)”}”(hŒ(Enable CLOS using core-power feature set”h]”hÊ)”}”(hjþ	  h]”hŒ(Enable CLOS using core-power feature set”…””}”(hj 
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M¬hjü	  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhjË	  hžhhŸh³h Nubhí)”}”(hŒEConfigure CLOS parameters. Use CLOS.min to set to minimum performance”•Ág      h]”hÊ)”}”(hj
  h]”hŒEConfigure CLOS parameters. Use CLOS.min to set to minimum performance”…””}”(hj
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M­hj
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhjË	  hžhhŸh³h Nubhí)”}”(hŒ&Subscribe desired CPUs to CLOS groups
”h]”hÊ)”}”(hŒ%Subscribe desired CPUs to CLOS groups”h]”hŒ%Subscribe desired CPUs to CLOS groups”…””}”(hj.
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M®hj*
  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhjË	  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”j9  j:  uh1hçhŸh³h Mªhj‚	  hžhubhÊ)”}”(hŒ„With this configuration, if the same workload is executed by pinning the
workload to high priority CPUs (CPU 5 and 6 in this case)::”h]”hŒƒWith this configuration, if the same workload is executed by pinning the
workload to high priority CPUs (CPU 5 and 6 in this case):”…””}”(hjH
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M°hj‚	  hžhubj…  )”}”(hŒÒ#taskset -c 5,6 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 5.627 [sec]
      5.627922 usecs/op
        177685 ops/sec”h]”hŒÒ#taskset -c 5,6 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 5.627 [sec]
      5.627922 usecs/op
        177685 ops/sec”…””}”hjV
  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M³hj‚	  hžhubhÊ)”}”(hŒøThis way, by enabling Intel(R) SST-BF, the performance of this benchmark is
improved (latency reduced) by 7.79%. From the turbostat output, it can be
observed that the high priority CPUs reached 3000 MHz compared to 2600 MHz.
The turbostat output::”h]”hŒ÷This way, by enabling Intel(R) SST-BF, the performance of this benchmark is
improved (latency reduced) by 7.79%. From the turbostat output, it can be
observed that the high priority CPUs reached 3000 MHz compared to 2600 MHz.
The turbostat output:”…””}”(hjd
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mºhj‚	  hžhubj…  )”}”(hXV  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
0              0       0       2151
0              1       1       2166
0              2       2       2175
0              3       3       2175
0              4       4       2175
0              5       5       3000
0              6       6       3000
0              7       7       2180
0              8       8       2662
0              9       9       2176
0              10      10      2175
0              11      11      2176
0              12      12      2176
0              13      13      2661”h]”hXV  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
0              0       0       2151
0              1       1       2166
0              2       2       2175
0              3       3       2175
0              4       4       2175
0              5       5       3000
0              6       6       3000
0              7       7       2180
0              8       8       2662
0              9       9       2176
0              10      10      2175
0              11      11      2176
0              12      12      2176
0              13      13      2661”…””}”hjr
  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M¿hj‚	  hžhubeh}”(h]”Œenable-intel-r-sst-bf”ah ]”h"]”Œenable intel(r) sst-bf”ah$]”h&]”uh1h´hjQ  hžhhŸh³h MŽubhµ)”}”(hhh]”(hº)”}”(hŒDisable Intel(R) SST-BF”h]”hŒDisable Intel(R) SST-BF”…””}”(hj‹
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjˆ
  hžhhŸh³h MÑubhÊ)”}”(hŒ1To disable the Intel(R) SST-BF feature, execute::”h]”hŒ0To disable the Intel(R) SST-BF feature, execute:”…””}”(hj™
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MÓhjˆ
  hžhubj…  )”}”(hŒ)# intel-speed-select base-freq disable -a”h]”hŒ)# intel-speed-select base-freq disable -a”…””}”hj§
  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MÕhjˆ
  hžhubeh}”(h]”Œdisable-intel-r-sst-bf”ah ]”h"]”Œdisable intel(r) sst-bf”ah$]”h&]”uh1h´hjQ  hžhhŸh³h MÑubeh}”(h]”Œ=intel-r-speed-select-technology-base-frequency-intel-r-sst-bf”ah ]”h"]”ŒCintel(r) speed select technology - base frequency (intel(r) sst-bf)”ah$]”h&]”uh1h´hjW  hžhhŸh³h Mubhµ)”}”(hhh]”(hº)”}”(hŒDIntel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)”h]”hŒDIntel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)”…””}”(hjÈ
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjÅ
  hžhhŸh³h MÙubhÊ)”}”(hX,  This feature enables the ability to set different "All core turbo ratio limits"
to cores based on the priority. By using this feature, some cores can be
configured to get higher turbo frequency by designating them as high priority at
the cost of lower or no turbo frequency on the low priority cores.”h]”hX0  This feature enables the ability to set different â€œAll core turbo ratio limitsâ€
to cores based on the priority. By using this feature, some cores can be
configured to get higher turbo frequency by designating them as high priority at
the cost of lower or no turbo frequency on the low priority cores.”…””}”(hjÖ
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MÛhjÅ
  hžhubhÊ)”}”(hŒ¦For this reason, this feature is only useful when system is busy utilizing all
CPUs, but the user wants some configurable option to get high performance on
some CPUs.”h]”hŒ¦For this reason, this feature is only useful when system is busy utilizing all
CPUs, but the user wants some configurable option to get high performance on
some CPUs.”…””}”(hjä
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MàhjÅ
  hžhubhÊ)”}”(hXË  The support of Intel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
depends on the Intel(R) Speed Select Technology - Performance Profile (Intel
SST-PP) performance level configuration. It is possible that only a certain
performance level supports Intel(R) SST-TF. It is also possible that only the base
performance level (level = 0) has the support of Intel(R) SST-TF. Hence, first
select the desired performance level to enable this feature.”h]”hXË  The support of Intel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
depends on the Intel(R) Speed Select Technology - Performance Profile (Intel
SST-PP) performance level configuration. It is possible that only a certain
performance level supports Intel(R) SST-TF. It is also possible that only the base
performance level (level = 0) has the support of Intel(R) SST-TF. Hence, first
select the desired performance level to enable this feature.”…””}”(hjò
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MähjÅ
  hžhubhÊ)”}”(hŒuIn the system under test here, Intel(R) SST-TF is supported at the base
performance level 0, but currently disabled::”h]”hŒtIn the system under test here, Intel(R) SST-TF is supported at the base
performance level 0, but currently disabled:”…””}”(hj   hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MëhjÅ
  hžhubj…  )”}”(hŒÙ# intel-speed-select -c 0 perf-profile info -l 0
Intel(R) Speed Select Technology
package-0
 die-0
   cpu-0
     perf-profile-level-0
       ...
       ...
       speed-select-turbo-freq:disabled
       ...
       ...”h]”hŒÙ# intel-speed-select -c 0 perf-profile info -l 0
Intel(R) Speed Select Technology
package-0
 die-0
   cpu-0
     perf-profile-level-0
       ...
       ...
       speed-select-turbo-freq:disabled
       ...
       ...”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MîhjÅ
  hžhubhÊ)”}”(hŒ¿To check if performance can be improved using Intel(R) SST-TF feature, get the turbo
frequency properties with Intel(R) SST-TF enabled and compare to the base turbo
capability of this system.”h]”hŒ¿To check if performance can be improved using Intel(R) SST-TF feature, get the turbo
frequency properties with Intel(R) SST-TF enabled and compare to the base turbo
capability of this system.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MûhjÅ
  hžhubhµ)”}”(hhh]”(hº)”}”(hŒGet Base turbo capability”h]”hŒGet Base turbo capability”…””}”(hj-  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj*  hžhhŸh³h M ubhÊ)”}”(hŒBTo get the base turbo capability of performance level 0, execute::”h]”hŒATo get the base turbo capability of performance level 0, execute:”…””}”(hj;  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhj*  hžhubj…  )”}”(hXj  # intel-speed-select perf-profile info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-0
       ...
       ...
       turbo-ratio-limits-sse
         bucket-0
           core-count:2
           max-turbo-frequency(MHz):3200
         bucket-1
           core-count:4
           max-turbo-frequency(MHz):3100
         bucket-2
           core-count:6
           max-turbo-frequency(MHz):3100
         bucket-3
           core-count:8
           max-turbo-frequency(MHz):3100
         bucket-4
           core-count:10
           max-turbo-frequency(MHz):3100
         bucket-5
           core-count:12
           max-turbo-frequency(MHz):3100
         bucket-6
           core-count:14
           max-turbo-frequency(MHz):3100
         bucket-7
           core-count:16
           max-turbo-frequency(MHz):3100”h]”hXj  # intel-speed-select perf-profile info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     perf-profile-level-0
       ...
       ...
       turbo-ratio-limits-sse
         bucket-0
           core-count:2
           max-turbo-frequency(MHz):3200
         bucket-1
           core-count:4
           max-turbo-frequency(MHz):3100
         bucket-2
           core-count:6
           max-turbo-frequency(MHz):3100
         bucket-3
           core-count:8
           max-turbo-frequency(MHz):3100
         bucket-4
           core-count:10
           max-turbo-frequency(MHz):3100
         bucket-5
           core-count:12
           max-turbo-frequency(MHz):3100
         bucket-6
           core-count:14
           max-turbo-frequency(MHz):3100
         bucket-7
           core-count:16
           max-turbo-frequency(MHz):3100”…””}”hjI  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mhj*  hžhubhÊ)”}”(hŒÙBased on the data above, when all the CPUS are busy, the max. frequency of 3100
MHz can be achieved. If there is some busy workload on cpu 0 - 11 (e.g. stress)
and on CPU 12 and 13, execute "hackbench pipe" workload::”h]”hŒÜBased on the data above, when all the CPUS are busy, the max. frequency of 3100
MHz can be achieved. If there is some busy workload on cpu 0 - 11 (e.g. stress)
and on CPU 12 and 13, execute â€œhackbench pipeâ€ workload:”…””}”(hjW  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M'hj*  hžhubj…  )”}”(hŒÕ# taskset -c 12,13 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 5.705 [sec]
      5.705488 usecs/op
        175269 ops/sec”h]”hŒÕ# taskset -c 12,13 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 5.705 [sec]
      5.705488 usecs/op
        175269 ops/sec”…””}”hje  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M+hj*  hžhubhÊ)”}”(hŒThe turbostat output::”h]”hŒThe turbostat output:”…””}”(hjs  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M2hj*  hžhubj…  )”}”(hXV  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
0              0       0       3000
0              1       1       3000
0              2       2       3000
0              3       3       3000
0              4       4       3000
0              5       5       3100
0              6       6       3100
0              7       7       3000
0              8       8       3100
0              9       9       3000
0              10      10      3000
0              11      11      3000
0              12      12      3100
0              13      13      3100”h]”hXV  #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
0              0       0       3000
0              1       1       3000
0              2       2       3000
0              3       3       3000
0              4       4       3000
0              5       5       3100
0              6       6       3100
0              7       7       3000
0              8       8       3100
0              9       9       3000
0              10      10      3000
0              11      11      3000
0              12      12      3100
0              13      13      3100”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M4hj*  hžhubhÊ)”}”(hŒöBased on turbostat output, the performance is limited by frequency cap of 3100
MHz. To check if the hackbench performance can be improved for CPU 12 and CPU
13, first check the capability of the Intel(R) SST-TF feature for this performance
level.”h]”hŒöBased on turbostat output, the performance is limited by frequency cap of 3100
MHz. To check if the hackbench performance can be improved for CPU 12 and CPU
13, first check the capability of the Intel(R) SST-TF feature for this performance
level.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MEhj*  hžhubeh}”(h]”Œget-base-turbo-capability”ah ]”h"]”Œget base turbo capability”ah$]”h&]”uh1h´hjÅ
  hžhhŸh³h M ubhµ)”}”(hhh]”(hº)”}”(hŒGet Intel(R) SST-TF Capability”h]”hŒGet Intel(R) SST-TF Capability”…””}”(hj¨  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj¥  hžhhŸh³h MKubhÊ)”}”(hŒBTo get the capability, the "turbo-freq info" command can be used::”h]”hŒETo get the capability, the â€œturbo-freq infoâ€ command can be used:”…””}”(hj¶  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h MMhj¥  hžhubj…  )”}”(hXñ  # intel-speed-select turbo-freq info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     speed-select-turbo-freq
         bucket-0
           high-priority-cores-count:2
           high-priority-max-frequency(MHz):3200
           high-priority-max-avx2-frequency(MHz):3200
           high-priority-max-avx512-frequency(MHz):3100
         bucket-1
           high-priority-cores-count:4
           high-priority-max-frequency(MHz):3100
           high-priority-max-avx2-frequency(MHz):3000
           high-priority-max-avx512-frequency(MHz):2900
         bucket-2
           high-priority-cores-count:6
           high-priority-max-frequency(MHz):3100
           high-priority-max-avx2-frequency(MHz):3000
           high-priority-max-avx512-frequency(MHz):2900
         speed-select-turbo-freq-clip-frequencies
           low-priority-max-frequency(MHz):2600
           low-priority-max-avx2-frequency(MHz):2400
           low-priority-max-avx512-frequency(MHz):2100”h]”hXñ  # intel-speed-select turbo-freq info -l 0
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-0
     speed-select-turbo-freq
         bucket-0
           high-priority-cores-count:2
           high-priority-max-frequency(MHz):3200
           high-priority-max-avx2-frequency(MHz):3200
           high-priority-max-avx512-frequency(MHz):3100
         bucket-1
           high-priority-cores-count:4
           high-priority-max-frequency(MHz):3100
           high-priority-max-avx2-frequency(MHz):3000
           high-priority-max-avx512-frequency(MHz):2900
         bucket-2
           high-priority-cores-count:6
           high-priority-max-frequency(MHz):3100
           high-priority-max-avx2-frequency(MHz):3000
           high-priority-max-avx512-frequency(MHz):2900
         speed-select-turbo-freq-clip-frequencies
           low-priority-max-frequency(MHz):2600
           low-priority-max-avx2-frequency(MHz):2400
           low-priority-max-avx512-frequency(MHz):2100”…””}”hjÄ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h MOhj¥  hžhubhÊ)”}”(hX  Based on the output above, there is an Intel(R) SST-TF bucket for which there are
two high priority cores. If only two high priority cores are set, then max.
turbo frequency on those cores can be increased to 3200 MHz. This is 100 MHz
more than the base turbo capability for all cores.”h]”hX  Based on the output above, there is an Intel(R) SST-TF bucket for which there are
two high priority cores. If only two high priority cores are set, then max.
turbo frequency on those cores can be increased to 3200 MHz. This is 100 MHz
more than the base turbo capability for all cores.”…””}”(hjÒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mjhj¥  hžhubhÊ)”}”(hŒÒIn turn, for the hackbench workload, two CPUs can be set as high priority and
rest as low priority. One side effect is that once enabled, the low priority
cores will be clipped to a lower frequency of 2600 MHz.”h]”hŒÒIn turn, for the hackbench workload, two CPUs can be set as high priority and
rest as low priority. One side effect is that once enabled, the low priority
cores will be clipped to a lower frequency of 2600 MHz.”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mohj¥  hžhubeh}”(h]”Œget-intel-r-sst-tf-capability”ah ]”h"]”Œget intel(r) sst-tf capability”ah$]”h&]”uh1h´hjÅ
  hžhhŸh³h MKubhµ)”}”(hhh]”(hº)”}”(hŒEnable Intel(R) SST-TF”h]”hŒEnable Intel(R) SST-TF”…””}”(hjù  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjö  hžhhŸh³h MtubhÊ)”}”(hŒ$To enable Intel(R) SST-TF, execute::”h]”hŒ#To enable Intel(R) SST-TF, execute:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mvhjö  hžhubj…  )”}”(hX8  # intel-speed-select -c 12,13 turbo-freq enable -a
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-12
     turbo-freq
       enable:success
package-0
 die-0
   cpu-13
     turbo-freq
       enable:success
package--1
 die-0
   cpu-63
     turbo-freq --auto
       enable:success”h]”hX8  # intel-speed-select -c 12,13 turbo-freq enable -a
Intel(R) Speed Select Technology
Executing on CPU model: X
package-0
 die-0
   cpu-12
     turbo-freq
       enable:success
package-0
 die-0
   cpu-13
     turbo-freq
       enable:success
package--1
 die-0
   cpu-63
     turbo-freq --auto
       enable:success”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mxhjö  hžhubhÊ)”}”(hX0  In this case, the option "-a" is optional. If set, it enables Intel(R) SST-TF
feature and also sets the CPUs to high and low priority using Intel Speed
Select Technology Core Power (Intel(R) SST-CP) features. The CPU numbers passed
with "-c" arguments are marked as high priority, including its siblings.”h]”hX8  In this case, the option â€œ-aâ€ is optional. If set, it enables Intel(R) SST-TF
feature and also sets the CPUs to high and low priority using Intel Speed
Select Technology Core Power (Intel(R) SST-CP) features. The CPU numbers passed
with â€œ-câ€ arguments are marked as high priority, including its siblings.”…””}”(hj#  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M‹hjö  hžhubhÊ)”}”(hŒ`If -a option is not used, then the following steps are required before enabling
Intel(R) SST-TF:”h]”hŒ`If -a option is not used, then the following steps are required before enabling
Intel(R) SST-TF:”…””}”(hj1  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Mhjö  hžhubhè)”}”(hhh]”(hí)”}”(hŒWDiscover Intel(R) SST-TF and note buckets of high priority cores and maximum frequency
”h]”hÊ)”}”(hŒVDiscover Intel(R) SST-TF and note buckets of high priority cores and maximum frequency”h]”hŒVDiscover Intel(R) SST-TF and note buckets of high priority cores and maximum frequency”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M“hjB  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhj?  hžhhŸh³h Nubhí)”}”(hŒEEnable CLOS using core-power feature set - Configure CLOS parameters
”h]”hÊ)”}”(hŒDEnable CLOS using core-power feature set - Configure CLOS parameters”h]”hŒDEnable CLOS using core-power feature set - Configure CLOS parameters”…””}”(hj^  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M•hjZ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhj?  hžhhŸh³h Nubhí)”}”(hŒlSubscribe desired CPUs to CLOS groups making sure that high priority cores are set to the maximum frequency
”h]”hÊ)”}”(hŒkSubscribe desired CPUs to CLOS groups making sure that high priority cores are set to the maximum frequency”h]”hŒkSubscribe desired CPUs to CLOS groups making sure that high priority cores are set to the maximum frequency”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M—hjr  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hìhj?  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”j9  j:  uh1hçhŸh³h M“hjö  hžhubhÊ)”}”(hŒ^If the same hackbench workload is executed, schedule hackbench threads on high
priority CPUs::”h]”hŒ]If the same hackbench workload is executed, schedule hackbench threads on high
priority CPUs:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M™hjö  hžhubj…  )”}”(hŒÔ#taskset -c 12,13 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 5.510 [sec]
      5.510165 usecs/op
        180826 ops/sec”h]”hŒÔ#taskset -c 12,13 perf bench -r 100 sched pipe
# Running 'sched/pipe' benchmark:
# Executed 1000000 pipe operations between two processes
    Total time: 5.510 [sec]
      5.510165 usecs/op
        180826 ops/sec”…””}”hjž  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h Mœhjö  hžhubhÊ)”}”(hŒ·This improved performance by around 3.3% improvement on a busy system. Here the
turbostat output will show that the CPU 12 and CPU 13 are getting 100 MHz boost.
The turbostat output::”h]”hŒ¶This improved performance by around 3.3% improvement on a busy system. Here the
turbostat output will show that the CPU 12 and CPU 13 are getting 100 MHz boost.
The turbostat output:”…””}”(hj¬  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h M£hjö  hžhubj…  )”}”(hŒª#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
...
0              12      12      3200
0              13      13      3200”h]”hŒª#turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
Package        Core    CPU     Bzy_MHz
...
0              12      12      3200
0              13      13      3200”…””}”hjº  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j„  hŸh³h M§hjö  hžhubeh}”(h]”Œenable-intel-r-sst-tf”ah ]”h"]”Œenable intel(r) sst-tf”ah$]”h&]”uh1h´hjÅ
  hžhhŸh³h Mtubeh}”(h]”Œ>intel-r-speed-select-technology-turbo-frequency-intel-r-sst-tf”ah ]”h"]”ŒDintel(r) speed select technology - turbo frequency (intel(r) sst-tf)”ah$]”h&]”uh1h´hjW  hžhhŸh³h MÙubeh}”(h]”Œ%intel-speed-select-configuration-tool”ah ]”h"]”Œ%intel-speed-select configuration tool”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubeh}”(h]”Œ*intel-r-speed-select-technology-user-guide”ah ]”h"]”Œ+intel(r) speed select technology user guide”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jå  jâ  jÝ  jÚ  jþ  jû  jO  jL  jö  jó  j±  j®  j  jÿ  j}  jz  j0  j-  j  jš  jî  jë  jÄ  jÁ  jN  jK  jæ  jã  jE  jB  jz  jw  j  j   jF  jC  jÂ
  j¿
  j<	  j9	  j	  j|	  j…
  j‚
  jº
  j·
  jÕ  jÒ  j¢  jŸ  jó  jð  jÍ  jÊ  uŒ	nametypes”}”(jå  ‰jÝ  ‰jþ  ‰jO  ‰jö  ‰j±  ‰j  ‰j}  ‰j0  ‰j  ‰jî  ‰jÄ  ‰jN  ‰jæ  ‰jE  ‰jz  ‰j  ‰jF  ‰jÂ
  ‰j<	  ‰j	  ‰j…
  ‰jº
  ‰jÕ  ‰j¢  ‰jó  ‰jÍ  ‰uh}”(jâ  h¶jÚ  jW  jû  j”  jL  j  jó  jR  j®  jq  jÿ  j´  jz  j  j-  j€  jš  j3  jë  j   jÁ  jù  jK  jÇ  jã  jô  jB  jé  jw  jH  j   j}  jC  j  j¿
  jQ  j9	  jÒ  j|	  j?	  j‚
  j‚	  j·
  jˆ
  jÒ  jÅ
  jŸ  j*  jð  j¥  jÊ  jö  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”(hŒsystem_message”“”)”}”(hhh]”hÊ)”}”(hŒ`Blank line missing before literal block (after the "::")? Interpreted as a definition list item.”h]”hŒdBlank line missing before literal block (after the â€œ::â€)? Interpreted as a definition list item.”…””}”(hjr  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhjo  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œline”M-Œsource”h³uh1jm  hjC  ubjn  )”}”(hhh]”hÊ)”}”(hŒ`Blank line missing before literal block (after the "::")? Interpreted as a definition list item.”h]”hŒdBlank line missing before literal block (after the â€œ::â€)? Interpreted as a definition list item.”…””}”(hjŽ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhj‹  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”jˆ  Œline”M1Œsource”h³uh1jm  hjr  ubeŒtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.