€•ì.Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ(/translations/zh_CN/admin-guide/perf/cxl”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/zh_TW/admin-guide/perf/cxl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/it_IT/admin-guide/perf/cxl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/ja_JP/admin-guide/perf/cxl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/ko_KR/admin-guide/perf/cxl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ(/translations/sp_SP/admin-guide/perf/cxl”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1h¡hhhžhhŸŒB/var/lib/git/docbuild/linux/Documentation/admin-guide/perf/cxl.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ&CXL Performance Monitoring Unit (CPMU)”h]”hŒ&CXL Performance Monitoring Unit (CPMU)”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ paragraph”“”)”}”(hŒThe CXL rev 3.0 specification provides a definition of CXL Performance Monitoring Unit in section 13.2: Performance Monitoring.”h]”hŒThe CXL rev 3.0 specification provides a definition of CXL Performance Monitoring Unit in section 13.2: Performance Monitoring.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hXPCXL components (e.g. Root Port, Switch Upstream Port, End Point) may have any number of CPMU instances. CPMU capabilities are fully discoverable from the devices. The specification provides event definitions for all CXL protocol message types and a set of additional events for things commonly counted on CXL devices (e.g. DRAM events).”h]”hXPCXL components (e.g. Root Port, Switch Upstream Port, End Point) may have any number of CPMU instances. CPMU capabilities are fully discoverable from the devices. The specification provides event definitions for all CXL protocol message types and a set of additional events for things commonly counted on CXL devices (e.g. DRAM events).”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒ CPMU driver”h]”hŒ CPMU driver”…””}”(hhêhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhçhžhhŸh³h KubhÊ)”}”(hŒtThe CPMU driver registers a perf PMU with the name pmu_mem. on the CXL bus representing the Yth CPMU for memX.”h]”hŒtThe CPMU driver registers a perf PMU with the name pmu_mem. on the CXL bus representing the Yth CPMU for memX.”…””}”(hhøhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhçhžhubhŒ block_quote”“”)”}”(hŒ#/sys/bus/cxl/device/pmu_mem. ”h]”hÊ)”}”(hŒ"/sys/bus/cxl/device/pmu_mem.”h]”hŒ"/sys/bus/cxl/device/pmu_mem.”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhŸh³h KhhçhžhubhÊ)”}”(hŒ#The associated PMU is registered as”h]”hŒ#The associated PMU is registered as”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhçhžhubj)”}”(hŒ2/sys/bus/event_sources/devices/cxl_pmu_mem. ”h]”hÊ)”}”(hŒ1/sys/bus/event_sources/devices/cxl_pmu_mem.”h]”hŒ1/sys/bus/event_sources/devices/cxl_pmu_mem.”…””}”(hj2hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj.ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhŸh³h KhhçhžhubhÊ)”}”(hŒºIn common with other CXL bus devices, the id has no specific meaning and the relationship to specific CXL device should be established via the device parent of the device on the CXL bus.”h]”hŒºIn common with other CXL bus devices, the id has no specific meaning and the relationship to specific CXL device should be established via the device parent of the device on the CXL bus.”…””}”(hjFhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhçhžhubhÊ)”}”(hŒPPMU driver provides description of available events and filter options in sysfs.”h]”hŒPPMU driver provides description of available events and filter options in sysfs.”…””}”(hjThžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hhçhžhubhÊ)”}”(hXThe "format" directory describes all formats of the config (event vendor id, group id and mask) config1 (threshold, filter enables) and config2 (filter parameters) fields of the perf_event_attr structure. The "events" directory describes all documented events show in perf list.”h]”hXThe “format†directory describes all formats of the config (event vendor id, group id and mask) config1 (threshold, filter enables) and config2 (filter parameters) fields of the perf_event_attr structure. The “events†directory describes all documented events show in perf list.”…””}”(hjbhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K"hhçhžhubhÊ)”}”(hX#The events shown in perf list are the most fine grained events with a single bit of the event mask set. More general events may be enable by setting multiple mask bits in config. For example, all Device to Host Read Requests may be captured on a single counter by setting the bits for all of”h]”hX#The events shown in perf list are the most fine grained events with a single bit of the event mask set. More general events may be enable by setting multiple mask bits in config. For example, all Device to Host Read Requests may be captured on a single counter by setting the bits for all of”…””}”(hjphžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K'hhçhžhubhŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒd2h_req_rdcurr”h]”hÊ)”}”(hj‡h]”hŒd2h_req_rdcurr”…””}”(hj‰hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K,hj…ubah}”(h]”h ]”h"]”h$]”h&]”uh1jƒhj€hžhhŸh³h Nubj„)”}”(hŒ d2h_req_rdown”h]”hÊ)”}”(hjžh]”hŒ d2h_req_rdown”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K-hjœubah}”(h]”h ]”h"]”h$]”h&]”uh1jƒhj€hžhhŸh³h Nubj„)”}”(hŒd2h_req_rdshared”h]”hÊ)”}”(hjµh]”hŒd2h_req_rdshared”…””}”(hj·hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K.hj³ubah}”(h]”h ]”h"]”h$]”h&]”uh1jƒhj€hžhhŸh³h Nubj„)”}”(hŒ d2h_req_rdany”h]”hÊ)”}”(hjÌh]”hŒ d2h_req_rdany”…””}”(hjÎhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K/hjÊubah}”(h]”h ]”h"]”h$]”h&]”uh1jƒhj€hžhhŸh³h Nubj„)”}”(hŒd2h_req_rdownnodata ”h]”hÊ)”}”(hŒd2h_req_rdownnodata”h]”hŒd2h_req_rdownnodata”…””}”(hjåhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K0hjáubah}”(h]”h ]”h"]”h$]”h&]”uh1jƒhj€hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1j~hŸh³h K,hhçhžhubhÊ)”}”(hŒExample of usage::”h]”hŒExample of usage:”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K2hhçhžhubhŒ literal_block”“”)”}”(hXù$#perf list cxl_pmu_mem0.0/clock_ticks/ [Kernel PMU event] cxl_pmu_mem0.0/d2h_req_rdshared/ [Kernel PMU event] cxl_pmu_mem0.0/h2d_req_snpcur/ [Kernel PMU event] cxl_pmu_mem0.0/h2d_req_snpdata/ [Kernel PMU event] cxl_pmu_mem0.0/h2d_req_snpinv/ [Kernel PMU event] ----------------------------------------------------------- $# perf stat -a -e cxl_pmu_mem0.0/clock_ticks/ -e cxl_pmu_mem0.0/d2h_req_rdshared/”h]”hXù$#perf list cxl_pmu_mem0.0/clock_ticks/ [Kernel PMU event] cxl_pmu_mem0.0/d2h_req_rdshared/ [Kernel PMU event] cxl_pmu_mem0.0/h2d_req_snpcur/ [Kernel PMU event] cxl_pmu_mem0.0/h2d_req_snpdata/ [Kernel PMU event] cxl_pmu_mem0.0/h2d_req_snpinv/ [Kernel PMU event] ----------------------------------------------------------- $# perf stat -a -e cxl_pmu_mem0.0/clock_ticks/ -e cxl_pmu_mem0.0/d2h_req_rdshared/”…””}”hjsbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1jhŸh³h K4hhçhžhubhÊ)”}”(hŒFVendor specific events may also be available and if so can be used via”h]”hŒFVendor specific events may also be available and if so can be used via”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K>hhçhžhubj)”}”(hŒ=$# perf stat -a -e cxl_pmu_mem0.0/vid=VID,gid=GID,mask=MASK/ ”h]”hÊ)”}”(hŒ<$# perf stat -a -e cxl_pmu_mem0.0/vid=VID,gid=GID,mask=MASK/”h]”hŒ<$# perf stat -a -e cxl_pmu_mem0.0/vid=VID,gid=GID,mask=MASK/”…””}”(hj1hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K@hj-ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhŸh³h K@hhçhžhubhÊ)”}”(hŒ’The driver does not support sampling so "perf record" is unsupported. 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