€•h8      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ+/translations/zh_CN/admin-guide/media/rkcif”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ+/translations/zh_TW/admin-guide/media/rkcif”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ+/translations/it_IT/admin-guide/media/rkcif”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ+/translations/ja_JP/admin-guide/media/rkcif”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ+/translations/ko_KR/admin-guide/media/rkcif”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ+/translations/sp_SP/admin-guide/media/rkcif”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒE/var/lib/git/docbuild/linux/Documentation/admin-guide/media/rkcif.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒRockchip Camera Interface (CIF)”h]”hŒRockchip Camera Interface (CIF)”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒIntroduction”h]”hŒIntroduction”…””}”(hhÌhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhÉhžhhŸh³h KubhŒ	paragraph”“”)”}”(hŒ§The Rockchip Camera Interface (CIF) is featured in many Rockchip SoCs in
different variants.
The different variants are combinations of common building blocks, such as”h]”hŒ§The Rockchip Camera Interface (CIF) is featured in many Rockchip SoCs in
different variants.
The different variants are combinations of common building blocks, such as”…””}”(hhÜhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K
hhÉhžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ™INTERFACE blocks of different types, namely

* the Digital Video Port (DVP, a parallel data interface)
* the interface block for the MIPI CSI-2 receiver
”h]”(hÛ)”}”(hŒ+INTERFACE blocks of different types, namely”h]”hŒ+INTERFACE blocks of different types, namely”…””}”(hhõhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khhñubhë)”}”(hhh]”(hð)”}”(hŒ7the Digital Video Port (DVP, a parallel data interface)”h]”hÛ)”}”(hj  h]”hŒ7the Digital Video Port (DVP, a parallel data interface)”…””}”(hj
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhj  ubhð)”}”(hŒ0the interface block for the MIPI CSI-2 receiver
”h]”hÛ)”}”(hŒ/the interface block for the MIPI CSI-2 receiver”h]”hŒ/the interface block for the MIPI CSI-2 receiver”…””}”(hj!  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhj  ubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hêhŸh³h Khhñubeh}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸNh Nubhð)”}”(hŒCROP units
”h]”hÛ)”}”(hŒ
CROP units”h]”hŒ
CROP units”…””}”(hjG  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KhjC  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸh³h Nubhð)”}”(hŒïMIPI CSI-2 receiver (not available on all variants): This unit is referred
to as MIPI CSI HOST in the Rockchip documentation.
Technically, it is a separate hardware block, but it is strongly coupled to
the CIF and therefore included here.
”h]”hÛ)”}”(hŒîMIPI CSI-2 receiver (not available on all variants): This unit is referred
to as MIPI CSI HOST in the Rockchip documentation.
Technically, it is a separate hardware block, but it is strongly coupled to
the CIF and therefore included here.”h]”hŒîMIPI CSI-2 receiver (not available on all variants): This unit is referred
to as MIPI CSI HOST in the Rockchip documentation.
Technically, it is a separate hardware block, but it is strongly coupled to
the CIF and therefore included here.”…””}”(hj_  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khj[  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸh³h Nubhð)”}”(hŒfMUX units (not available on all variants) that pass the video data to an
image signal processor (ISP)
”h]”hÛ)”}”(hŒeMUX units (not available on all variants) that pass the video data to an
image signal processor (ISP)”h]”hŒeMUX units (not available on all variants) that pass the video data to an
image signal processor (ISP)”…””}”(hjw  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khjs  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸh³h Nubhð)”}”(hŒ,SCALE units (not available on all variants)
”h]”hÛ)”}”(hŒ+SCALE units (not available on all variants)”h]”hŒ+SCALE units (not available on all variants)”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khj‹  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸh³h Nubhð)”}”(hŒqDMA engines that transfer video data into system memory using a
double-buffering mechanism called ping-pong mode
”h]”hÛ)”}”(hŒpDMA engines that transfer video data into system memory using a
double-buffering mechanism called ping-pong mode”h]”hŒpDMA engines that transfer video data into system memory using a
double-buffering mechanism called ping-pong mode”…””}”(hj§  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khj£  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸh³h Nubhð)”}”(hŒzSupport for four streams per INTERFACE block (not available on all
variants), e.g., for MIPI CSI-2 Virtual Channels (VCs)
”h]”hÛ)”}”(hŒySupport for four streams per INTERFACE block (not available on all
variants), e.g., for MIPI CSI-2 Virtual Channels (VCs)”h]”hŒySupport for four streams per INTERFACE block (not available on all
variants), e.g., for MIPI CSI-2 Virtual Channels (VCs)”…””}”(hj¿  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K"hj»  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhhìhžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”j;  j<  uh1hêhŸh³h KhhÉhžhubhÛ)”}”(hŒäThis document describes the different variants of the CIF, their hardware
layout, as well as their representation in the media controller centric rkcif
device driver, which is located under drivers/media/platform/rockchip/rkcif.”h]”hŒäThis document describes the different variants of the CIF, their hardware
layout, as well as their representation in the media controller centric rkcif
device driver, which is located under drivers/media/platform/rockchip/rkcif.”…””}”(hjÙ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K%hhÉhžhubeh}”(h]”Œintroduction”ah ]”h"]”Œintroduction”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒVariants”h]”hŒVariants”…””}”(hjò  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjï  hžhhŸh³h K*ubhµ)”}”(hhh]”(hº)”}”(hŒ)Rockchip PX30 Video Input Processor (VIP)”h]”hŒ)Rockchip PX30 Video Input Processor (VIP)”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj   hžhhŸh³h K-ubhÛ)”}”(hŒøThe PX30 Video Input Processor (VIP) features a digital video port that accepts
parallel video data or BT.656.
Since these protocols do not feature multiple streams, the VIP has one DMA
engine that transfers the input video data into system memory.”h]”hŒøThe PX30 Video Input Processor (VIP) features a digital video port that accepts
parallel video data or BT.656.
Since these protocols do not feature multiple streams, the VIP has one DMA
engine that transfers the input video data into system memory.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K/hj   hžhubhÛ)”}”(hŒ™The rkcif driver represents this hardware variant by exposing one V4L2 subdevice
(the DVP INTERFACE/CROP block) and one V4L2 device (the DVP DMA engine).”h]”hŒ™The rkcif driver represents this hardware variant by exposing one V4L2 subdevice
(the DVP INTERFACE/CROP block) and one V4L2 device (the DVP DMA engine).”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K4hj   hžhubeh}”(h]”Œ'rockchip-px30-video-input-processor-vip”ah ]”h"]”Œ)rockchip px30 video input processor (vip)”ah$]”h&]”uh1h´hjï  hžhhŸh³h K-ubhµ)”}”(hhh]”(hº)”}”(hŒ%Rockchip RK3568 Video Capture (VICAP)”h]”hŒ%Rockchip RK3568 Video Capture (VICAP)”…””}”(hj8  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj5  hžhhŸh³h K8ubhÛ)”}”(hXÇ  The RK3568 Video Capture (VICAP) unit features a digital video port and a MIPI
CSI-2 receiver that can receive video data independently.
The DVP accepts parallel video data, BT.656 and BT.1120.
Since the BT.1120 protocol may feature more than one stream, the RK3568 VICAP
DVP features four DMA engines that can capture different streams.
Similarly, the RK3568 VICAP MIPI CSI-2 receiver features four DMA engines to
handle different Virtual Channels (VCs).”h]”hXÇ  The RK3568 Video Capture (VICAP) unit features a digital video port and a MIPI
CSI-2 receiver that can receive video data independently.
The DVP accepts parallel video data, BT.656 and BT.1120.
Since the BT.1120 protocol may feature more than one stream, the RK3568 VICAP
DVP features four DMA engines that can capture different streams.
Similarly, the RK3568 VICAP MIPI CSI-2 receiver features four DMA engines to
handle different Virtual Channels (VCs).”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K:hj5  hžhubhÛ)”}”(hŒ_The rkcif driver represents this hardware variant by exposing up the following
V4L2 subdevices:”h]”hŒ_The rkcif driver represents this hardware variant by exposing up the following
V4L2 subdevices:”…””}”(hjT  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KBhj5  hžhubhë)”}”(hhh]”hð)”}”(hŒ-rkcif-dvp0: INTERFACE/CROP block for the DVP
”h]”hÛ)”}”(hŒ,rkcif-dvp0: INTERFACE/CROP block for the DVP”h]”hŒ,rkcif-dvp0: INTERFACE/CROP block for the DVP”…””}”(hji  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KEhje  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhjb  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”j;  j<  uh1hêhŸh³h KEhj5  hžhubhÛ)”}”(hŒ and the following video devices:”h]”hŒ and the following video devices:”…””}”(hjƒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KGhj5  hžhubhë)”}”(hhh]”hð)”}”(hŒÄrkcif-dvp0-id0: The support for multiple streams on the DVP is not yet
implemented, as it is hard to find test hardware. Thus, this video device
represents the first DMA engine of the RK3568 DVP.
”h]”hÛ)”}”(hŒÃrkcif-dvp0-id0: The support for multiple streams on the DVP is not yet
implemented, as it is hard to find test hardware. Thus, this video device
represents the first DMA engine of the RK3568 DVP.”h]”hŒÃrkcif-dvp0-id0: The support for multiple streams on the DVP is not yet
implemented, as it is hard to find test hardware. Thus, this video device
represents the first DMA engine of the RK3568 DVP.”…””}”(hj˜  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KIhj”  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hïhj‘  hžhhŸh³h Nubah}”(h]”h ]”h"]”h$]”h&]”j;  j<  uh1hêhŸh³h KIhj5  hžhubŒkfigure”Œkernel_figure”“”)”}”(hhh]”hŒfigure”“”)”}”(hhh]”hŒimage”“”)”}”(hŒz.. kernel-figure:: rkcif-rk3568-vicap.dot
    :alt:   Topology of the RK3568 Video Capture (VICAP) unit
    :align: center”h]”h}”(h]”h ]”h"]”h$]”h&]”Œalt”Œ1Topology of the RK3568 Video Capture (VICAP) unit”Œuri”Œ(admin-guide/media/rkcif-rk3568-vicap.dot”Œ
candidates”}”j<  jÌ  suh1j½  hjº  hŸh³h K ubah}”(h]”h ]”h"]”h$]”h&]”Œalign”Œcenter”uh1j¸  hjµ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j³  hj5  hžhhŸh³h Nubeh}”(h]”Œ#rockchip-rk3568-video-capture-vicap”ah ]”h"]”Œ%rockchip rk3568 video capture (vicap)”ah$]”h&]”uh1h´hjï  hžhhŸh³h K8ubeh}”(h]”Œvariants”ah ]”h"]”Œvariants”ah$]”h&]”uh1h´hh¶hžhhŸh³h K*ubeh}”(h]”Œrockchip-camera-interface-cif”ah ]”h"]”Œrockchip camera interface (cif)”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jò  jï  jì  jé  jê  jç  j2  j/  jâ  jß  uŒ	nametypes”}”(jò  ‰jì  ‰jê  ‰j2  ‰jâ  ‰uh}”(jï  h¶jé  hÉjç  jï  j/  j   jß  j5  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
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