€•œ9Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ+/translations/zh_CN/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ+/translations/zh_TW/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ+/translations/it_IT/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ+/translations/ja_JP/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ+/translations/ko_KR/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ+/translations/pt_BR/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ+/translations/sp_SP/admin-guide/media/rkcif”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hµhhh²hh³ŒE/var/lib/git/docbuild/linux/Documentation/admin-guide/media/rkcif.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒRockchip Camera Interface (CIF)”h]”hŒRockchip Camera Interface (CIF)”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒ Introduction”h]”hŒ Introduction”…””}”(hhàh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÝh²hh³hÇh´KubhŒ paragraph”“”)”}”(hŒ§The Rockchip Camera Interface (CIF) is featured in many Rockchip SoCs in different variants. The different variants are combinations of common building blocks, such as”h]”hŒ§The Rockchip Camera Interface (CIF) is featured in many Rockchip SoCs in different variants. The different variants are combinations of common building blocks, such as”…””}”(hhðh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K hhÝh²hubhŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒ™INTERFACE blocks of different types, namely * the Digital Video Port (DVP, a parallel data interface) * the interface block for the MIPI CSI-2 receiver ”h]”(hï)”}”(hŒ+INTERFACE blocks of different types, namely”h]”hŒ+INTERFACE blocks of different types, namely”…””}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Khjubhÿ)”}”(hhh]”(j)”}”(hŒ7the Digital Video Port (DVP, a parallel data interface)”h]”hï)”}”(hjh]”hŒ7the Digital Video Port (DVP, a parallel data interface)”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjubj)”}”(hŒ0the interface block for the MIPI CSI-2 receiver ”h]”hï)”}”(hŒ/the interface block for the MIPI CSI-2 receiver”h]”hŒ/the interface block for the MIPI CSI-2 receiver”…””}”(hj5h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Khj1ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1hþh³hÇh´Khjubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³Nh´Nubj)”}”(hŒ CROP units ”h]”hï)”}”(hŒ CROP units”h]”hŒ CROP units”…””}”(hj[h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KhjWubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubj)”}”(hŒïMIPI CSI-2 receiver (not available on all variants): This unit is referred to as MIPI CSI HOST in the Rockchip documentation. Technically, it is a separate hardware block, but it is strongly coupled to the CIF and therefore included here. ”h]”hï)”}”(hŒîMIPI CSI-2 receiver (not available on all variants): This unit is referred to as MIPI CSI HOST in the Rockchip documentation. Technically, it is a separate hardware block, but it is strongly coupled to the CIF and therefore included here.”h]”hŒîMIPI CSI-2 receiver (not available on all variants): This unit is referred to as MIPI CSI HOST in the Rockchip documentation. Technically, it is a separate hardware block, but it is strongly coupled to the CIF and therefore included here.”…””}”(hjsh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Khjoubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubj)”}”(hŒfMUX units (not available on all variants) that pass the video data to an image signal processor (ISP) ”h]”hï)”}”(hŒeMUX units (not available on all variants) that pass the video data to an image signal processor (ISP)”h]”hŒeMUX units (not available on all variants) that pass the video data to an image signal processor (ISP)”…””}”(hj‹h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Khj‡ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubj)”}”(hŒ,SCALE units (not available on all variants) ”h]”hï)”}”(hŒ+SCALE units (not available on all variants)”h]”hŒ+SCALE units (not available on all variants)”…””}”(hj£h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KhjŸubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubj)”}”(hŒqDMA engines that transfer video data into system memory using a double-buffering mechanism called ping-pong mode ”h]”hï)”}”(hŒpDMA engines that transfer video data into system memory using a double-buffering mechanism called ping-pong mode”h]”hŒpDMA engines that transfer video data into system memory using a double-buffering mechanism called ping-pong mode”…””}”(hj»h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Khj·ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubj)”}”(hŒzSupport for four streams per INTERFACE block (not available on all variants), e.g., for MIPI CSI-2 Virtual Channels (VCs) ”h]”hï)”}”(hŒySupport for four streams per INTERFACE block (not available on all variants), e.g., for MIPI CSI-2 Virtual Channels (VCs)”h]”hŒySupport for four streams per INTERFACE block (not available on all variants), e.g., for MIPI CSI-2 Virtual Channels (VCs)”…””}”(hjÓh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K"hjÏubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”jOjPuh1hþh³hÇh´KhhÝh²hubhï)”}”(hŒäThis document describes the different variants of the CIF, their hardware layout, as well as their representation in the media controller centric rkcif device driver, which is located under drivers/media/platform/rockchip/rkcif.”h]”hŒäThis document describes the different variants of the CIF, their hardware layout, as well as their representation in the media controller centric rkcif device driver, which is located under drivers/media/platform/rockchip/rkcif.”…””}”(hjíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K%hhÝh²hubeh}”(h]”Œ introduction”ah ]”h"]”Œ introduction”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒVariants”h]”hŒVariants”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjh²hh³hÇh´K*ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ)Rockchip PX30 Video Input Processor (VIP)”h]”hŒ)Rockchip PX30 Video Input Processor (VIP)”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjh²hh³hÇh´K-ubhï)”}”(hŒøThe PX30 Video Input Processor (VIP) features a digital video port that accepts parallel video data or BT.656. Since these protocols do not feature multiple streams, the VIP has one DMA engine that transfers the input video data into system memory.”h]”hŒøThe PX30 Video Input Processor (VIP) features a digital video port that accepts parallel video data or BT.656. Since these protocols do not feature multiple streams, the VIP has one DMA engine that transfers the input video data into system memory.”…””}”(hj%h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K/hjh²hubhï)”}”(hŒ™The rkcif driver represents this hardware variant by exposing one V4L2 subdevice (the DVP INTERFACE/CROP block) and one V4L2 device (the DVP DMA engine).”h]”hŒ™The rkcif driver represents this hardware variant by exposing one V4L2 subdevice (the DVP INTERFACE/CROP block) and one V4L2 device (the DVP DMA engine).”…””}”(hj3h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K4hjh²hubeh}”(h]”Œ'rockchip-px30-video-input-processor-vip”ah ]”h"]”Œ)rockchip px30 video input processor (vip)”ah$]”h&]”uh1hÈhjh²hh³hÇh´K-ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ%Rockchip RK3568 Video Capture (VICAP)”h]”hŒ%Rockchip RK3568 Video Capture (VICAP)”…””}”(hjLh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjIh²hh³hÇh´K8ubhï)”}”(hXÇThe RK3568 Video Capture (VICAP) unit features a digital video port and a MIPI CSI-2 receiver that can receive video data independently. The DVP accepts parallel video data, BT.656 and BT.1120. Since the BT.1120 protocol may feature more than one stream, the RK3568 VICAP DVP features four DMA engines that can capture different streams. Similarly, the RK3568 VICAP MIPI CSI-2 receiver features four DMA engines to handle different Virtual Channels (VCs).”h]”hXÇThe RK3568 Video Capture (VICAP) unit features a digital video port and a MIPI CSI-2 receiver that can receive video data independently. The DVP accepts parallel video data, BT.656 and BT.1120. Since the BT.1120 protocol may feature more than one stream, the RK3568 VICAP DVP features four DMA engines that can capture different streams. Similarly, the RK3568 VICAP MIPI CSI-2 receiver features four DMA engines to handle different Virtual Channels (VCs).”…””}”(hjZh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K:hjIh²hubhï)”}”(hŒ_The rkcif driver represents this hardware variant by exposing up the following V4L2 subdevices:”h]”hŒ_The rkcif driver represents this hardware variant by exposing up the following V4L2 subdevices:”…””}”(hjhh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KBhjIh²hubhÿ)”}”(hhh]”j)”}”(hŒ-rkcif-dvp0: INTERFACE/CROP block for the DVP ”h]”hï)”}”(hŒ,rkcif-dvp0: INTERFACE/CROP block for the DVP”h]”hŒ,rkcif-dvp0: INTERFACE/CROP block for the DVP”…””}”(hj}h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KEhjyubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjvh²hh³hÇh´Nubah}”(h]”h ]”h"]”h$]”h&]”jOjPuh1hþh³hÇh´KEhjIh²hubhï)”}”(hŒ and the following video devices:”h]”hŒ and the following video devices:”…””}”(hj—h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KGhjIh²hubhÿ)”}”(hhh]”j)”}”(hŒÄrkcif-dvp0-id0: The support for multiple streams on the DVP is not yet implemented, as it is hard to find test hardware. Thus, this video device represents the first DMA engine of the RK3568 DVP. ”h]”hï)”}”(hŒÃrkcif-dvp0-id0: The support for multiple streams on the DVP is not yet implemented, as it is hard to find test hardware. Thus, this video device represents the first DMA engine of the RK3568 DVP.”h]”hŒÃrkcif-dvp0-id0: The support for multiple streams on the DVP is not yet implemented, as it is hard to find test hardware. Thus, this video device represents the first DMA engine of the RK3568 DVP.”…””}”(hj¬h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KIhj¨ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj¥h²hh³hÇh´Nubah}”(h]”h ]”h"]”h$]”h&]”jOjPuh1hþh³hÇh´KIhjIh²hubŒkfigure”Œ kernel_figure”“”)”}”(hhh]”hŒfigure”“”)”}”(hhh]”hŒimage”“”)”}”(hŒz.. kernel-figure:: rkcif-rk3568-vicap.dot :alt: Topology of the RK3568 Video Capture (VICAP) unit :align: center”h]”h}”(h]”h ]”h"]”h$]”h&]”Œalt”Œ1Topology of the RK3568 Video Capture (VICAP) unit”Œuri”Œ(admin-guide/media/rkcif-rk3568-vicap.dot”Œ candidates”}”jPjàsuh1jÑhjÎh³hÇh´Kubah}”(h]”h ]”h"]”h$]”h&]”Œalign”Œcenter”uh1jÌhjÉubah}”(h]”h ]”h"]”h$]”h&]”uh1jÇhjIh²hh³hÇh´Nubeh}”(h]”Œ#rockchip-rk3568-video-capture-vicap”ah ]”h"]”Œ%rockchip rk3568 video capture (vicap)”ah$]”h&]”uh1hÈhjh²hh³hÇh´K8ubeh}”(h]”Œvariants”ah ]”h"]”Œvariants”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K*ubeh}”(h]”Œrockchip-camera-interface-cif”ah ]”h"]”Œrockchip camera interface (cif)”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hÍNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j,Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jjjjýjþjûjFjCjöjóuŒ nametypes”}”(j‰j‰jþ‰jF‰jö‰uh}”(jhÊjýhÝjûjjCjjójIuŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.