€• …      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ#/translations/zh_CN/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ#/translations/zh_TW/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ#/translations/it_IT/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ#/translations/ja_JP/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ#/translations/ko_KR/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ#/translations/pt_BR/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ#/translations/sp_SP/accel/qaic/qaic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ%SPDX-License-Identifier: GPL-2.0-only”h]”hŒ%SPDX-License-Identifier: GPL-2.0-only”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1hµhhh²hh³Œ=/var/lib/git/docbuild/linux/Documentation/accel/qaic/qaic.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒQAIC driver”h]”hŒQAIC driver”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhŒ	paragraph”“”)”}”(hŒaThe QAIC driver is the Kernel Mode Driver (KMD) for the AIC100 family of AI
accelerator products.”h]”hŒaThe QAIC driver is the Kernel Mode Driver (KMD) for the AIC100 family of AI
accelerator products.”…””}”(hhßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KhhÊh²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒ
Interrupts”h]”hŒ
Interrupts”…””}”(hhðh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhíh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒIRQ Storm Mitigation”h]”hŒIRQ Storm Mitigation”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhþh²hh³hÇh´KubhÞ)”}”(hX4  While the AIC100 DMA Bridge hardware implements an IRQ storm mitigation
mechanism, it is still possible for an IRQ storm to occur. A storm can happen
if the workload is particularly quick, and the host is responsive. If the host
can drain the response FIFO as quickly as the device can insert elements into
it, then the device will frequently transition the response FIFO from empty to
non-empty and generate MSIs at a rate equivalent to the speed of the
workload's ability to process inputs. The lprnet (license plate reader network)
workload is known to trigger this condition, and can generate in excess of 100k
MSIs per second. It has been observed that most systems cannot tolerate this
for long, and will crash due to some form of watchdog due to the overhead of
the interrupt controller interrupting the host CPU.”h]”hX6  While the AIC100 DMA Bridge hardware implements an IRQ storm mitigation
mechanism, it is still possible for an IRQ storm to occur. A storm can happen
if the workload is particularly quick, and the host is responsive. If the host
can drain the response FIFO as quickly as the device can insert elements into
it, then the device will frequently transition the response FIFO from empty to
non-empty and generate MSIs at a rate equivalent to the speed of the
workloadâ€™s ability to process inputs. The lprnet (license plate reader network)
workload is known to trigger this condition, and can generate in excess of 100k
MSIs per second. It has been observed that most systems cannot tolerate this
for long, and will crash due to some form of watchdog due to the overhead of
the interrupt controller interrupting the host CPU.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khhþh²hubhÞ)”}”(hXø  To mitigate this issue, the QAIC driver implements specific IRQ handling. When
QAIC receives an IRQ, it disables that line. This prevents the interrupt
controller from interrupting the CPU. Then AIC drains the FIFO. Once the FIFO
is drained, QAIC implements a "last chance" polling algorithm where QAIC will
sleep for a time to see if the workload will generate more activity. The IRQ
line remains disabled during this time. If no activity is detected, QAIC exits
polling mode and reenables the IRQ line.”h]”hXü  To mitigate this issue, the QAIC driver implements specific IRQ handling. When
QAIC receives an IRQ, it disables that line. This prevents the interrupt
controller from interrupting the CPU. Then AIC drains the FIFO. Once the FIFO
is drained, QAIC implements a â€œlast chanceâ€ polling algorithm where QAIC will
sleep for a time to see if the workload will generate more activity. The IRQ
line remains disabled during this time. If no activity is detected, QAIC exits
polling mode and reenables the IRQ line.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khhþh²hubhÞ)”}”(hX)  This mitigation in QAIC is very effective. The same lprnet usecase that
generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64
IRQs over 5 minutes while keeping the host system stable, and having the same
workload throughput performance (within run-to-run noise variation).”h]”hX)  This mitigation in QAIC is very effective. The same lprnet usecase that
generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64
IRQs over 5 minutes while keeping the host system stable, and having the same
workload throughput performance (within run-to-run noise variation).”…””}”(hj+  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K$hhþh²hubeh}”(h]”Œirq-storm-mitigation”ah ]”h"]”Œirq storm mitigation”ah$]”h&]”uh1hÈhhíh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒSingle MSI Mode”h]”hŒSingle MSI Mode”…””}”(hjD  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjA  h²hh³hÇh´K*ubhÞ)”}”(hX'  MultiMSI is not well supported on all systems; virtualized ones even less so
(circa 2023). Between hypervisors masking the PCIe MSI capability structure to
large memory requirements for vIOMMUs (required for supporting MultiMSI), it is
useful to be able to fall back to a single MSI when needed.”h]”hX'  MultiMSI is not well supported on all systems; virtualized ones even less so
(circa 2023). Between hypervisors masking the PCIe MSI capability structure to
large memory requirements for vIOMMUs (required for supporting MultiMSI), it is
useful to be able to fall back to a single MSI when needed.”…””}”(hjR  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K,hjA  h²hubhÞ)”}”(hX  To support this fallback, we allow the case where only one MSI is able to be
allocated, and share that one MSI between MHI and the DBCs. The device detects
when only one MSI has been configured and directs the interrupts for the DBCs
to the interrupt normally used for MHI. Unfortunately, this means that the
interrupt handlers for every DBC and MHI wake up for every interrupt that
arrives; however, the DBC threaded irq handlers only are started when work to be
done is detected (MHI will always start its threaded handler).”h]”hX  To support this fallback, we allow the case where only one MSI is able to be
allocated, and share that one MSI between MHI and the DBCs. The device detects
when only one MSI has been configured and directs the interrupts for the DBCs
to the interrupt normally used for MHI. Unfortunately, this means that the
interrupt handlers for every DBC and MHI wake up for every interrupt that
arrives; however, the DBC threaded irq handlers only are started when work to be
done is detected (MHI will always start its threaded handler).”…””}”(hj`  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K1hjA  h²hubhÞ)”}”(hŒæIf the DBC is configured to force MSI interrupts, this can circumvent the
software IRQ storm mitigation mentioned above. Since the MSI is shared it is
never disabled, allowing each new entry to the FIFO to trigger a new interrupt.”h]”hŒæIf the DBC is configured to force MSI interrupts, this can circumvent the
software IRQ storm mitigation mentioned above. Since the MSI is shared it is
never disabled, allowing each new entry to the FIFO to trigger a new interrupt.”…””}”(hjn  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K9hjA  h²hubeh}”(h]”Œsingle-msi-mode”ah ]”h"]”Œsingle msi mode”ah$]”h&]”uh1hÈhhíh²hh³hÇh´K*ubeh}”(h]”Œ
interrupts”ah ]”h"]”Œ
interrupts”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒ%Neural Network Control (NNC) Protocol”h]”hŒ%Neural Network Control (NNC) Protocol”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjŒ  h²hh³hÇh´K?ubhÞ)”}”(hX¡  The implementation of NNC is split between the KMD (QAIC) and UMD. In general,
QAIC understands how to encode/decode NNC wire protocol, and elements of the
protocol which requires kernel space knowledge to process (for example, mapping
host memory to device IOVAs). QAIC understands the structure of a message, and
all of the transactions. QAIC does not understand commands (the payload of a
passthrough transaction).”h]”hX¡  The implementation of NNC is split between the KMD (QAIC) and UMD. In general,
QAIC understands how to encode/decode NNC wire protocol, and elements of the
protocol which requires kernel space knowledge to process (for example, mapping
host memory to device IOVAs). QAIC understands the structure of a message, and
all of the transactions. QAIC does not understand commands (the payload of a
passthrough transaction).”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KAhjŒ  h²hubhÞ)”}”(hŒßQAIC handles and enforces the required little endianness and 64-bit alignment,
to the degree that it can. Since QAIC does not know the contents of a
passthrough transaction, it relies on the UMD to satisfy the requirements.”h]”hŒßQAIC handles and enforces the required little endianness and 64-bit alignment,
to the degree that it can. Since QAIC does not know the contents of a
passthrough transaction, it relies on the UMD to satisfy the requirements.”…””}”(hj«  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KHhjŒ  h²hubhÞ)”}”(hXÜ  The terminate transaction is of particular use to QAIC. QAIC is not aware of
the resources that are loaded onto a device since the majority of that activity
occurs within NNC commands. As a result, QAIC does not have the means to
roll back userspace activity. To ensure that a userspace client's resources
are fully released in the case of a process crash, or a bug, QAIC uses the
terminate command to let QSM know when a user has gone away, and the resources
can be released.”h]”hXÞ  The terminate transaction is of particular use to QAIC. QAIC is not aware of
the resources that are loaded onto a device since the majority of that activity
occurs within NNC commands. As a result, QAIC does not have the means to
roll back userspace activity. To ensure that a userspace clientâ€™s resources
are fully released in the case of a process crash, or a bug, QAIC uses the
terminate command to let QSM know when a user has gone away, and the resources
can be released.”…””}”(hj¹  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KLhjŒ  h²hubhÞ)”}”(hŒzQSM can report a version number of the NNC protocol it supports. This is in the
form of a Major number and a Minor number.”h]”hŒzQSM can report a version number of the NNC protocol it supports. This is in the
form of a Major number and a Minor number.”…””}”(hjÇ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KThjŒ  h²hubhÞ)”}”(hŒzMajor number updates indicate changes to the NNC protocol which impact the
message format, or transactions (impacts QAIC).”h]”hŒzMajor number updates indicate changes to the NNC protocol which impact the
message format, or transactions (impacts QAIC).”…””}”(hjÕ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KWhjŒ  h²hubhÞ)”}”(hŒkMinor number updates indicate changes to the NNC protocol which impact the
commands (does not impact QAIC).”h]”hŒkMinor number updates indicate changes to the NNC protocol which impact the
commands (does not impact QAIC).”…””}”(hjã  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KZhjŒ  h²hubeh}”(h]”Œ#neural-network-control-nnc-protocol”ah ]”h"]”Œ%neural network control (nnc) protocol”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K?ubhÉ)”}”(hhh]”(hÎ)”}”(hŒuAPI”h]”hŒuAPI”…””}”(hjü  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjù  h²hh³hÇh´K^ubhÞ)”}”(hŒQAIC creates an accel device per physical PCIe device. This accel device exists
for as long as the PCIe device is known to Linux.”h]”hŒQAIC creates an accel device per physical PCIe device. This accel device exists
for as long as the PCIe device is known to Linux.”…””}”(hj
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K`hjù  h²hubhÞ)”}”(hX+  The PCIe device may not be in the state to accept requests from userspace at
all times. QAIC will trigger KOBJ_ONLINE/OFFLINE uevents to advertise when the
device can accept requests (ONLINE) and when the device is no longer accepting
requests (OFFLINE) because of a reset or other state transition.”h]”hX+  The PCIe device may not be in the state to accept requests from userspace at
all times. QAIC will trigger KOBJ_ONLINE/OFFLINE uevents to advertise when the
device can accept requests (ONLINE) and when the device is no longer accepting
requests (OFFLINE) because of a reset or other state transition.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kchjù  h²hubhÞ)”}”(hŒMQAIC defines a number of driver specific IOCTLs as part of the userspace API.”h]”hŒMQAIC defines a number of driver specific IOCTLs as part of the userspace API.”…””}”(hj&  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khhjù  h²hubhŒdefinition_list”“”)”}”(hhh]”(hŒdefinition_list_item”“”)”}”(hŒ¤DRM_IOCTL_QAIC_MANAGE
This IOCTL allows userspace to send a NNC request to the QSM. The call will
block until a response is received, or the request has timed out.
”h]”(hŒterm”“”)”}”(hŒDRM_IOCTL_QAIC_MANAGE”h]”hŒDRM_IOCTL_QAIC_MANAGE”…””}”(hjA  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´Klhj;  ubhŒ
definition”“”)”}”(hhh]”hÞ)”}”(hŒThis IOCTL allows userspace to send a NNC request to the QSM. The call will
block until a response is received, or the request has timed out.”h]”hŒThis IOCTL allows userspace to send a NNC request to the QSM. The call will
block until a response is received, or the request has timed out.”…””}”(hjT  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KkhjQ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hj;  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´Klhj6  ubj:  )”}”(hX"  DRM_IOCTL_QAIC_CREATE_BO
This IOCTL allows userspace to allocate a buffer object (BO) which can send
or receive data from a workload. The call will return a GEM handle that
represents the allocated buffer. The BO is not usable until it has been
sliced (see DRM_IOCTL_QAIC_ATTACH_SLICE_BO).
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_CREATE_BO”h]”hŒDRM_IOCTL_QAIC_CREATE_BO”…””}”(hjr  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´Krhjn  ubjP  )”}”(hhh]”hÞ)”}”(hX  This IOCTL allows userspace to allocate a buffer object (BO) which can send
or receive data from a workload. The call will return a GEM handle that
represents the allocated buffer. The BO is not usable until it has been
sliced (see DRM_IOCTL_QAIC_ATTACH_SLICE_BO).”h]”hX  This IOCTL allows userspace to allocate a buffer object (BO) which can send
or receive data from a workload. The call will return a GEM handle that
represents the allocated buffer. The BO is not usable until it has been
sliced (see DRM_IOCTL_QAIC_ATTACH_SLICE_BO).”…””}”(hjƒ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kohj€  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hjn  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´Krhj6  h²hubj:  )”}”(hŒwDRM_IOCTL_QAIC_MMAP_BO
This IOCTL allows userspace to prepare an allocated BO to be mmap'd into the
userspace process.
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_MMAP_BO”h]”hŒDRM_IOCTL_QAIC_MMAP_BO”…””}”(hj¡  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´Kvhj  ubjP  )”}”(hhh]”hÞ)”}”(hŒ_This IOCTL allows userspace to prepare an allocated BO to be mmap'd into the
userspace process.”h]”hŒaThis IOCTL allows userspace to prepare an allocated BO to be mmapâ€™d into the
userspace process.”…””}”(hj²  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kuhj¯  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´Kvhj6  h²hubj:  )”}”(hX;  DRM_IOCTL_QAIC_ATTACH_SLICE_BO
This IOCTL allows userspace to slice a BO in preparation for sending the BO
to the device. Slicing is the operation of describing what portions of a BO
get sent where to a workload. This requires a set of DMA transfers for the
DMA Bridge, and as such, locks the BO to a specific DBC.
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_ATTACH_SLICE_BO”h]”hŒDRM_IOCTL_QAIC_ATTACH_SLICE_BO”…””}”(hjÐ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´K|hjÌ  ubjP  )”}”(hhh]”hÞ)”}”(hX  This IOCTL allows userspace to slice a BO in preparation for sending the BO
to the device. Slicing is the operation of describing what portions of a BO
get sent where to a workload. This requires a set of DMA transfers for the
DMA Bridge, and as such, locks the BO to a specific DBC.”h]”hX  This IOCTL allows userspace to slice a BO in preparation for sending the BO
to the device. Slicing is the operation of describing what portions of a BO
get sent where to a workload. This requires a set of DMA transfers for the
DMA Bridge, and as such, locks the BO to a specific DBC.”…””}”(hjá  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KyhjÞ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hjÌ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´K|hj6  h²hubj:  )”}”(hŒñDRM_IOCTL_QAIC_EXECUTE_BO
This IOCTL allows userspace to submit a set of sliced BOs to the device. The
call is non-blocking. Success only indicates that the BOs have been queued
to the device, but does not guarantee they have been executed.
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_EXECUTE_BO”h]”hŒDRM_IOCTL_QAIC_EXECUTE_BO”…””}”(hjÿ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´Khjû  ubjP  )”}”(hhh]”hÞ)”}”(hŒÖThis IOCTL allows userspace to submit a set of sliced BOs to the device. The
call is non-blocking. Success only indicates that the BOs have been queued
to the device, but does not guarantee they have been executed.”h]”hŒÖThis IOCTL allows userspace to submit a set of sliced BOs to the device. The
call is non-blocking. Success only indicates that the BOs have been queued
to the device, but does not guarantee they have been executed.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hjû  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´Khj6  h²hubj:  )”}”(hX	  DRM_IOCTL_QAIC_PARTIAL_EXECUTE_BO
This IOCTL operates like DRM_IOCTL_QAIC_EXECUTE_BO, but it allows userspace
to shrink the BOs sent to the device for this specific call. If a BO
typically has N inputs, but only a subset of those is available, this IOCTL
allows userspace to indicate that only the first M bytes of the BO should be
sent to the device to minimize data transfer overhead. This IOCTL dynamically
recomputes the slicing, and therefore has some processing overhead before the
BOs can be queued to the device.
”h]”(j@  )”}”(hŒ!DRM_IOCTL_QAIC_PARTIAL_EXECUTE_BO”h]”hŒ!DRM_IOCTL_QAIC_PARTIAL_EXECUTE_BO”…””}”(hj.  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´KŠhj*  ubjP  )”}”(hhh]”hÞ)”}”(hXæ  This IOCTL operates like DRM_IOCTL_QAIC_EXECUTE_BO, but it allows userspace
to shrink the BOs sent to the device for this specific call. If a BO
typically has N inputs, but only a subset of those is available, this IOCTL
allows userspace to indicate that only the first M bytes of the BO should be
sent to the device to minimize data transfer overhead. This IOCTL dynamically
recomputes the slicing, and therefore has some processing overhead before the
BOs can be queued to the device.”h]”hXæ  This IOCTL operates like DRM_IOCTL_QAIC_EXECUTE_BO, but it allows userspace
to shrink the BOs sent to the device for this specific call. If a BO
typically has N inputs, but only a subset of those is available, this IOCTL
allows userspace to indicate that only the first M bytes of the BO should be
sent to the device to minimize data transfer overhead. This IOCTL dynamically
recomputes the slicing, and therefore has some processing overhead before the
BOs can be queued to the device.”…””}”(hj?  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K„hj<  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hj*  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´KŠhj6  h²hubj:  )”}”(hŒëDRM_IOCTL_QAIC_WAIT_BO
This IOCTL allows userspace to determine when a particular BO has been
processed by the device. The call will block until either the BO has been
processed and can be re-queued to the device, or a timeout occurs.
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_WAIT_BO”h]”hŒDRM_IOCTL_QAIC_WAIT_BO”…””}”(hj]  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´KhjY  ubjP  )”}”(hhh]”hÞ)”}”(hŒÓThis IOCTL allows userspace to determine when a particular BO has been
processed by the device. The call will block until either the BO has been
processed and can be re-queued to the device, or a timeout occurs.”h]”hŒÓThis IOCTL allows userspace to determine when a particular BO has been
processed by the device. The call will block until either the BO has been
processed and can be re-queued to the device, or a timeout occurs.”…””}”(hjn  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Khjk  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hjY  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´Khj6  h²hubj:  )”}”(hŒìDRM_IOCTL_QAIC_PERF_STATS_BO
This IOCTL allows userspace to collect performance statistics on the most
recent execution of a BO. This allows userspace to construct an end to end
timeline of the BO processing for a performance analysis.
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_PERF_STATS_BO”h]”hŒDRM_IOCTL_QAIC_PERF_STATS_BO”…””}”(hjŒ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´K”hjˆ  ubjP  )”}”(hhh]”hÞ)”}”(hŒÎThis IOCTL allows userspace to collect performance statistics on the most
recent execution of a BO. This allows userspace to construct an end to end
timeline of the BO processing for a performance analysis.”h]”hŒÎThis IOCTL allows userspace to collect performance statistics on the most
recent execution of a BO. This allows userspace to construct an end to end
timeline of the BO processing for a performance analysis.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K’hjš  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hjˆ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´K”hj6  h²hubj:  )”}”(hXw  DRM_IOCTL_QAIC_DETACH_SLICE_BO
This IOCTL allows userspace to remove the slicing information from a BO that
was originally provided by a call to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. This
is the inverse of DRM_IOCTL_QAIC_ATTACH_SLICE_BO. The BO must be idle for
DRM_IOCTL_QAIC_DETACH_SLICE_BO to be called. After a successful detach slice
operation the BO may have new slicing information attached with a new call
to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. After detach slice, the BO cannot be
executed until after a new attach slice operation. Combining attach slice
and detach slice calls allows userspace to use a BO with multiple workloads.
”h]”(j@  )”}”(hŒDRM_IOCTL_QAIC_DETACH_SLICE_BO”h]”hŒDRM_IOCTL_QAIC_DETACH_SLICE_BO”…””}”(hj»  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j?  h³hÇh´Kžhj·  ubjP  )”}”(hhh]”hÞ)”}”(hXW  This IOCTL allows userspace to remove the slicing information from a BO that
was originally provided by a call to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. This
is the inverse of DRM_IOCTL_QAIC_ATTACH_SLICE_BO. The BO must be idle for
DRM_IOCTL_QAIC_DETACH_SLICE_BO to be called. After a successful detach slice
operation the BO may have new slicing information attached with a new call
to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. After detach slice, the BO cannot be
executed until after a new attach slice operation. Combining attach slice
and detach slice calls allows userspace to use a BO with multiple workloads.”h]”hXW  This IOCTL allows userspace to remove the slicing information from a BO that
was originally provided by a call to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. This
is the inverse of DRM_IOCTL_QAIC_ATTACH_SLICE_BO. The BO must be idle for
DRM_IOCTL_QAIC_DETACH_SLICE_BO to be called. After a successful detach slice
operation the BO may have new slicing information attached with a new call
to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. After detach slice, the BO cannot be
executed until after a new attach slice operation. Combining attach slice
and detach slice calls allows userspace to use a BO with multiple workloads.”…””}”(hjÌ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K—hjÉ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1jO  hj·  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j9  h³hÇh´Kžhj6  h²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1j4  hjù  h²hh³hÇh´Nubeh}”(h]”Œuapi”ah ]”h"]”Œuapi”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K^ubhÉ)”}”(hhh]”(hÎ)”}”(hŒUserspace Client Isolation”h]”hŒUserspace Client Isolation”…””}”(hj÷  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjô  h²hh³hÇh´K¡ubhÞ)”}”(hX  AIC100 supports multiple clients. Multiple DBCs can be consumed by a single
client, and multiple clients can each consume one or more DBCs. Workloads
may contain sensitive information therefore only the client that owns the
workload should be allowed to interface with the DBC.”h]”hX  AIC100 supports multiple clients. Multiple DBCs can be consumed by a single
client, and multiple clients can each consume one or more DBCs. Workloads
may contain sensitive information therefore only the client that owns the
workload should be allowed to interface with the DBC.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K£hjô  h²hubhÞ)”}”(hŒèClients are identified by the instance associated with their open(). A client
may only use memory they allocate, and DBCs that are assigned to their
workloads. Attempts to access resources assigned to other clients will be
rejected.”h]”hŒèClients are identified by the instance associated with their open(). A client
may only use memory they allocate, and DBCs that are assigned to their
workloads. Attempts to access resources assigned to other clients will be
rejected.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K¨hjô  h²hubeh}”(h]”Œuserspace-client-isolation”ah ]”h"]”Œuserspace client isolation”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K¡ubhÉ)”}”(hhh]”(hÎ)”}”(hŒModule parameters”h]”hŒModule parameters”…””}”(hj,  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj)  h²hh³hÇh´K®ubhÞ)”}”(hŒ.QAIC supports the following module parameters:”h]”hŒ.QAIC supports the following module parameters:”…””}”(hj:  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K°hj)  h²hubhÞ)”}”(hŒ**datapath_polling (bool)**”h]”hŒstrong”“”)”}”(hjJ  h]”hŒdatapath_polling (bool)”…””}”(hjN  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jL  hjH  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K²hj)  h²hubhÞ)”}”(hŒÒConfigures QAIC to use a polling thread for datapath events instead of relying
on the device interrupts. Useful for platforms with broken multiMSI. Must be
set at QAIC driver initialization. Default is 0 (off).”h]”hŒÒConfigures QAIC to use a polling thread for datapath events instead of relying
on the device interrupts. Useful for platforms with broken multiMSI. Must be
set at QAIC driver initialization. Default is 0 (off).”…””}”(hja  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K´hj)  h²hubhÞ)”}”(hŒ!**mhi_timeout_ms (unsigned int)**”h]”jM  )”}”(hjq  h]”hŒmhi_timeout_ms (unsigned int)”…””}”(hjs  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jL  hjo  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K¸hj)  h²hubhÞ)”}”(hŒ‘Sets the timeout value for MHI operations in milliseconds (ms). Must be set
at the time the driver detects a device. Default is 2000 (2 seconds).”h]”hŒ‘Sets the timeout value for MHI operations in milliseconds (ms). Must be set
at the time the driver detects a device. Default is 2000 (2 seconds).”…””}”(hj†  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´Kºhj)  h²hubhÞ)”}”(hŒ)**control_resp_timeout_s (unsigned int)**”h]”jM  )”}”(hj–  h]”hŒ%control_resp_timeout_s (unsigned int)”…””}”(hj˜  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jL  hj”  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K½hj)  h²hubhÞ)”}”(hŒ¤Sets the timeout value for QSM responses to NNC messages in seconds (s). Must
be set at the time the driver is sending a request to QSM. Default is 60 (one
minute).”h]”hŒ¤Sets the timeout value for QSM responses to NNC messages in seconds (s). Must
be set at the time the driver is sending a request to QSM. Default is 60 (one
minute).”…””}”(hj«  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´K¿hj)  h²hubhÞ)”}”(hŒ/**wait_exec_default_timeout_ms (unsigned int)**”h]”jM  )”}”(hj»  h]”hŒ+wait_exec_default_timeout_ms (unsigned int)”…””}”(hj½  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jL  hj¹  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÃhj)  h²hubhÞ)”}”(hŒÔSets the default timeout for the wait_exec ioctl in milliseconds (ms). Must be
set prior to the waic_exec ioctl call. A value specified in the ioctl call
overrides this for that call. Default is 5000 (5 seconds).”h]”hŒÔSets the default timeout for the wait_exec ioctl in milliseconds (ms). Must be
set prior to the waic_exec ioctl call. A value specified in the ioctl call
overrides this for that call. Default is 5000 (5 seconds).”…””}”(hjÐ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÅhj)  h²hubhÞ)”}”(hŒ,**datapath_poll_interval_us (unsigned int)**”h]”jM  )”}”(hjà  h]”hŒ(datapath_poll_interval_us (unsigned int)”…””}”(hjâ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jL  hjÞ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÉhj)  h²hubhÞ)”}”(hŒ“Sets the polling interval in microseconds (us) when datapath polling is active.
Takes effect at the next polling interval. Default is 100 (100 us).”h]”hŒ“Sets the polling interval in microseconds (us) when datapath polling is active.
Takes effect at the next polling interval. Default is 100 (100 us).”…””}”(hjõ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KËhj)  h²hubhÞ)”}”(hŒ$**timesync_delay_ms (unsigned int)**”h]”jM  )”}”(hj  h]”hŒ timesync_delay_ms (unsigned int)”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jL  hj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÎhj)  h²hubhÞ)”}”(hŒsSets the time interval in milliseconds (ms) between two consecutive timesync
operations. Default is 1000 (1000 ms).”h]”hŒsSets the time interval in milliseconds (ms) between two consecutive timesync
operations. Default is 1000 (1000 ms).”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÝh³hÇh´KÐhj)  h²hubeh}”(h]”Œmodule-parameters”ah ]”h"]”Œmodule parameters”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K®ubeh}”(h]”Œqaic-driver”ah ]”h"]”Œqaic driver”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hÍNŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j[  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j5  j2  j‰  j†  j>  j;  j  j~  jö  jó  jñ  jî  j&  j#  j-  j*  uŒ	nametypes”}”(j5  ‰j‰  ‰j>  ‰j  ‰jö  ‰jñ  ‰j&  ‰j-  ‰uh}”(j2  hÊj†  híj;  hþj~  jA  jó  jŒ  jî  jù  j#  jô  j*  j)  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nh²hub.